clang/test/CodeGenCXX/attr-target-version.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --check-globals --include-generated-funcs
   2 // RUN: %clang_cc1 -std=c++11 -triple aarch64-linux-gnu -emit-llvm %s -o - | FileCheck %s
   3
   4 int __attribute__((target_version("sme-f64f64+bf16"))) foo(int) { return 1; }
   5 int __attribute__((target_version("default"))) foo(int) { return 2; }
   6 int __attribute__((target_version("sm4+ebf16"))) foo(void) { return 3; }
   7 int __attribute__((target_version("default"))) foo(void) { return 4; }
   8
   9 struct MyClass {
  10   int __attribute__((target_version("dotprod"))) goo(int);
  11   int __attribute__((target_version("crc"))) goo(int);
  12   int __attribute__((target_version("default"))) goo(int);
  13 };
  14
  15 int __attribute__((target_version("default"))) MyClass::goo(int) { return 1; }
  16 int __attribute__((target_version("crc"))) MyClass::goo(int) { return 2; }
  17 int __attribute__((target_version("dotprod"))) MyClass::goo(int) { return 3; }
  18
  19 int bar() {
  20   MyClass m;
  21   return m.goo(1) + foo(1) + foo();
  22 }
  23
  24
  25 // CHECK: @__aarch64_cpu_features = external dso_local global { i64 }
  26 // CHECK: @_ZN7MyClass3gooEi.ifunc = weak_odr ifunc i32 (ptr, i32), ptr @_ZN7MyClass3gooEi.resolver
  27 // CHECK: @_Z3fooi.ifunc = weak_odr ifunc i32 (i32), ptr @_Z3fooi.resolver
  28 // CHECK: @_Z3foov.ifunc = weak_odr ifunc i32 (), ptr @_Z3foov.resolver
  29
  30 // CHECK-LABEL: @_Z3fooi._Mbf16Msme-f64f64(
  31 // CHECK-NEXT:  entry:
  32 // CHECK-NEXT:    [[DOTADDR:%.*]] = alloca i32, align 4
  33 // CHECK-NEXT:    store i32 [[TMP0:%.*]], ptr [[DOTADDR]], align 4
  34 // CHECK-NEXT:    ret i32 1
  35 // CHECK-LABEL: @_Z3fooi(
  36 // CHECK-NEXT:  entry:
  37 // CHECK-NEXT:    [[DOTADDR:%.*]] = alloca i32, align 4
  38 // CHECK-NEXT:    store i32 [[TMP0:%.*]], ptr [[DOTADDR]], align 4
  39 // CHECK-NEXT:    ret i32 2
  40 // CHECK-LABEL: @_Z3foov._Msm4Mebf16(
  41 // CHECK-NEXT:  entry:
  42 // CHECK-NEXT:    ret i32 3
  43 // CHECK-LABEL: @_Z3foov(
  44 // CHECK-NEXT:  entry:
  45 // CHECK-NEXT:    ret i32 4
  46 // CHECK-LABEL: @_ZN7MyClass3gooEi(
  47 // CHECK-NEXT:  entry:
  48 // CHECK-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
  49 // CHECK-NEXT:    [[DOTADDR:%.*]] = alloca i32, align 4
  50 // CHECK-NEXT:    store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
  51 // CHECK-NEXT:    store i32 [[TMP0:%.*]], ptr [[DOTADDR]], align 4
  52 // CHECK-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
  53 // CHECK-NEXT:    ret i32 1
  54 // CHECK-LABEL: @_ZN7MyClass3gooEi._Mcrc(
  55 // CHECK-NEXT:  entry:
  56 // CHECK-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
  57 // CHECK-NEXT:    [[DOTADDR:%.*]] = alloca i32, align 4
  58 // CHECK-NEXT:    store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
  59 // CHECK-NEXT:    store i32 [[TMP0:%.*]], ptr [[DOTADDR]], align 4
  60 // CHECK-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
  61 // CHECK-NEXT:    ret i32 2
  62 // CHECK-LABEL: @_ZN7MyClass3gooEi._Mdotprod(
  63 // CHECK-NEXT:  entry:
  64 // CHECK-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
  65 // CHECK-NEXT:    [[DOTADDR:%.*]] = alloca i32, align 4
  66 // CHECK-NEXT:    store ptr [[THIS:%.*]], ptr [[THIS_ADDR]], align 8
  67 // CHECK-NEXT:    store i32 [[TMP0:%.*]], ptr [[DOTADDR]], align 4
  68 // CHECK-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
  69 // CHECK-NEXT:    ret i32 3
  70 // CHECK-LABEL: @_Z3barv(
  71 // CHECK-NEXT:  entry:
  72 // CHECK-NEXT:    [[M:%.*]] = alloca [[STRUCT_MYCLASS:%.*]], align 1
  73 // CHECK-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN7MyClass3gooEi.ifunc(ptr noundef nonnull align 1 dereferenceable(1) [[M]], i32 noundef 1)
  74 // CHECK-NEXT:    [[CALL1:%.*]] = call noundef i32 @_Z3fooi.ifunc(i32 noundef 1)
  75 // CHECK-NEXT:    [[ADD:%.*]] = add nsw i32 [[CALL]], [[CALL1]]
  76 // CHECK-NEXT:    [[CALL2:%.*]] = call noundef i32 @_Z3foov.ifunc()
  77 // CHECK-NEXT:    [[ADD3:%.*]] = add nsw i32 [[ADD]], [[CALL2]]
  78 // CHECK-NEXT:    ret i32 [[ADD3]]
  79 // CHECK-LABEL: @_ZN7MyClass3gooEi.resolver(
  80 // CHECK-NEXT:  resolver_entry:
  81 // CHECK-NEXT:    call void @__init_cpu_features_resolver()
  82 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
  83 // CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 1024
  84 // CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 1024
  85 // CHECK-NEXT:    [[TMP3:%.*]] = and i1 true, [[TMP2]]
  86 // CHECK-NEXT:    br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]
  87 // CHECK:       resolver_return:
  88 // CHECK-NEXT:    ret ptr @_ZN7MyClass3gooEi._Mcrc
  89 // CHECK:       resolver_else:
  90 // CHECK-NEXT:    [[TMP4:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
  91 // CHECK-NEXT:    [[TMP5:%.*]] = and i64 [[TMP4]], 16
  92 // CHECK-NEXT:    [[TMP6:%.*]] = icmp eq i64 [[TMP5]], 16
  93 // CHECK-NEXT:    [[TMP7:%.*]] = and i1 true, [[TMP6]]
  94 // CHECK-NEXT:    br i1 [[TMP7]], label [[RESOLVER_RETURN1:%.*]], label [[RESOLVER_ELSE2:%.*]]
  95 // CHECK:       resolver_return1:
  96 // CHECK-NEXT:    ret ptr @_ZN7MyClass3gooEi._Mdotprod
  97 // CHECK:       resolver_else2:
  98 // CHECK-NEXT:    ret ptr @_ZN7MyClass3gooEi
  99 // CHECK-LABEL: @_Z3fooi.resolver(
 100 // CHECK-NEXT:  resolver_entry:
 101 // CHECK-NEXT:    call void @__init_cpu_features_resolver()
 102 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
 103 // CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 36028797153181696
 104 // CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 36028797153181696
 105 // CHECK-NEXT:    [[TMP3:%.*]] = and i1 true, [[TMP2]]
 106 // CHECK-NEXT:    br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]
 107 // CHECK:       resolver_return:
 108 // CHECK-NEXT:    ret ptr @_Z3fooi._Mbf16Msme-f64f64
 109 // CHECK:       resolver_else:
 110 // CHECK-NEXT:    ret ptr @_Z3fooi
 111 // CHECK-LABEL: @_Z3foov.resolver(
 112 // CHECK-NEXT:  resolver_entry:
 113 // CHECK-NEXT:    call void @__init_cpu_features_resolver()
 114 // CHECK-NEXT:    [[TMP0:%.*]] = load i64, ptr @__aarch64_cpu_features, align 8
 115 // CHECK-NEXT:    [[TMP1:%.*]] = and i64 [[TMP0]], 268435488
 116 // CHECK-NEXT:    [[TMP2:%.*]] = icmp eq i64 [[TMP1]], 268435488
 117 // CHECK-NEXT:    [[TMP3:%.*]] = and i1 true, [[TMP2]]
 118 // CHECK-NEXT:    br i1 [[TMP3]], label [[RESOLVER_RETURN:%.*]], label [[RESOLVER_ELSE:%.*]]
 119 // CHECK:       resolver_return:
 120 // CHECK-NEXT:    ret ptr @_Z3foov._Msm4Mebf16
 121 // CHECK:       resolver_else:
 122 // CHECK-NEXT:    ret ptr @_Z3foov
 123
 124 // CHECK: attributes #0 = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+sme,+sme-f64f64" }
 125 // CHECK: attributes #1 = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" }
 126 // CHECK: attributes #2 = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+bf16,+fp-armv8,+neon,+sm4" }
 127 // CHECK: attributes #3 = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+crc" }
 128 // CHECK: attributes #4 = { mustprogress noinline nounwind optnone "no-trapping-math"="true" "stack-protector-buffer-size"="8" "target-features"="+dotprod,+fp-armv8,+neon" }