clang/test/Headers/openmp_new_nothrow.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --version 2
   2 // RUN: %clang_cc1 -std=c++03 -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -internal-isystem %S/Inputs/include -verify -fopenmp -x c++ -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm -fopenmp-is-target-device -o - %s | FileCheck -check-prefixes=NVPTX,NVPTX-CXX03 %s
   3 // RUN: %clang_cc1 -std=c++11 -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -internal-isystem %S/Inputs/include -verify -fopenmp -x c++ -triple nvptx64-nvidia-cuda -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm -fopenmp-is-target-device -o - %s | FileCheck -check-prefixes=NVPTX,NVPTX-NVPTX-CXX11 %s
   4
   5 // RUN: %clang_cc1 -std=c++03 -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -internal-isystem %S/Inputs/include -verify -fopenmp -x c++ -triple amdgcn-amd-amdhsa -fopenmp-targets=amdgcn-amd-amdhsa -emit-llvm -fopenmp-is-target-device -o - %s | FileCheck -check-prefixes=AMDGPU,AMDGPU-CXX03 %s
   6 // RUN: %clang_cc1 -std=c++11 -internal-isystem %S/../../lib/Headers/openmp_wrappers -include __clang_openmp_device_functions.h -internal-isystem %S/Inputs/include -verify -fopenmp -x c++ -triple amdgcn-amd-amdhsa -fopenmp-targets=amdgcn-amd-amdhsa -emit-llvm -fopenmp-is-target-device -o - %s | FileCheck -check-prefixes=AMDGPU,AMDGPU-CXX11 %s
   7
   8
   9 // expected-no-diagnostics
  10
  11 #include <new>
  12
  13 #pragma omp begin declare target
  14 extern const std::nothrow_t nothrow;
  15
  16 // NVPTX-LABEL: define hidden noundef ptr @_Z17new_stuff_nothrowv
  17 // NVPTX-SAME: () #[[ATTR0:[0-9]+]] {
  18 // NVPTX-NEXT:  entry:
  19 // NVPTX-NEXT:    [[CALL:%.*]] = call noalias noundef ptr @_ZnwmRKSt9nothrow_t(i64 noundef 4, ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR4:[0-9]+]]
  20 // NVPTX-NEXT:    ret ptr [[CALL]]
  21 //
  22 // AMDGPU-LABEL: define hidden noundef ptr @_Z17new_stuff_nothrowv
  23 // AMDGPU-SAME: () #[[ATTR0:[0-9]+]] {
  24 // AMDGPU-NEXT:  entry:
  25 // AMDGPU-NEXT:    [[RETVAL:%.*]] = alloca ptr, align 8, addrspace(5)
  26 // AMDGPU-NEXT:    [[RETVAL_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RETVAL]] to ptr
  27 // AMDGPU-NEXT:    [[CALL:%.*]] = call noalias noundef ptr @_ZnwmRKSt9nothrow_t(i64 noundef 4, ptr noundef nonnull align 1 dereferenceable(1) addrspacecast (ptr addrspace(1) @nothrow to ptr)) #[[ATTR4:[0-9]+]]
  28 // AMDGPU-NEXT:    ret ptr [[CALL]]
  29 //
  30 int* new_stuff_nothrow() {
  31   return new (nothrow) int;
  32 }
  33
  34 //
  35 // NVPTX-CXX11-LABEL: define hidden noundef ptr @_Z23new_array_stuff_nothrowv
  36 // NVPTX-CXX11-SAME: () #[[ATTR0]] {
  37 // NVPTX-CXX11-NEXT:  entry:
  38 // NVPTX-CXX11-NEXT:    [[CALL:%.*]] = call noalias noundef ptr @_ZnamRKSt9nothrow_t(i64 noundef 136, ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR7:[0-9]+]]
  39 // NVPTX-CXX11-NEXT:    ret ptr [[CALL]]
  40 // NVPTX-CXX03-LABEL: define hidden noundef ptr @_Z23new_array_stuff_nothrowv
  41 // NVPTX-CXX03-SAME: () #[[ATTR0]] {
  42 // NVPTX-CXX03-NEXT:  entry:
  43 // NVPTX-CXX03-NEXT:    [[CALL:%.*]] = call noalias noundef ptr @_ZnamRKSt9nothrow_t(i64 noundef 136, ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR4]]
  44 // NVPTX-CXX03-NEXT:    ret ptr [[CALL]]
  45 //
  46 // NVPTX-NVPTX-CXX11-LABEL: define hidden noundef ptr @_Z23new_array_stuff_nothrowv
  47 // NVPTX-NVPTX-CXX11-SAME: () #[[ATTR0]] {
  48 // NVPTX-NVPTX-CXX11-NEXT:  entry:
  49 // NVPTX-NVPTX-CXX11-NEXT:    [[CALL:%.*]] = call noalias noundef ptr @_ZnamRKSt9nothrow_t(i64 noundef 136, ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR7:[0-9]+]]
  50 // NVPTX-NVPTX-CXX11-NEXT:    ret ptr [[CALL]]
  51 //
  52 // AMDGPU-CXX03-LABEL: define hidden noundef ptr @_Z23new_array_stuff_nothrowv
  53 // AMDGPU-CXX03-SAME: () #[[ATTR0]] {
  54 // AMDGPU-CXX03-NEXT:  entry:
  55 // AMDGPU-CXX03-NEXT:    [[RETVAL:%.*]] = alloca ptr, align 8, addrspace(5)
  56 // AMDGPU-CXX03-NEXT:    [[RETVAL_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RETVAL]] to ptr
  57 // AMDGPU-CXX03-NEXT:    [[CALL:%.*]] = call noalias noundef ptr @_ZnamRKSt9nothrow_t(i64 noundef 136, ptr noundef nonnull align 1 dereferenceable(1) addrspacecast (ptr addrspace(1) @nothrow to ptr)) #[[ATTR4]]
  58 // AMDGPU-CXX03-NEXT:    ret ptr [[CALL]]
  59 //
  60 // AMDGPU-CXX11-LABEL: define hidden noundef ptr @_Z23new_array_stuff_nothrowv
  61 // AMDGPU-CXX11-SAME: () #[[ATTR0]] {
  62 // AMDGPU-CXX11-NEXT:  entry:
  63 // AMDGPU-CXX11-NEXT:    [[RETVAL:%.*]] = alloca ptr, align 8, addrspace(5)
  64 // AMDGPU-CXX11-NEXT:    [[RETVAL_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[RETVAL]] to ptr
  65 // AMDGPU-CXX11-NEXT:    [[CALL:%.*]] = call noalias noundef ptr @_ZnamRKSt9nothrow_t(i64 noundef 136, ptr noundef nonnull align 1 dereferenceable(1) addrspacecast (ptr addrspace(1) @nothrow to ptr)) #[[ATTR7:[0-9]+]]
  66 // AMDGPU-CXX11-NEXT:    ret ptr [[CALL]]
  67 //
  68 int* new_array_stuff_nothrow() {
  69   return new (nothrow) int[34];
  70 }
  71
  72 //
  73 // NVPTX-CXX11-LABEL: define hidden void @_Z20delete_stuff_nothrowPi
  74 // NVPTX-CXX11-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
  75 // NVPTX-CXX11-NEXT:  entry:
  76 // NVPTX-CXX11-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8
  77 // NVPTX-CXX11-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
  78 // NVPTX-CXX11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
  79 // NVPTX-CXX11-NEXT:    call void @_ZdlPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR8:[0-9]+]]
  80 // NVPTX-CXX11-NEXT:    ret void
  81 // NVPTX-CXX03-LABEL: define hidden void @_Z20delete_stuff_nothrowPi
  82 // NVPTX-CXX03-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
  83 // NVPTX-CXX03-NEXT:  entry:
  84 // NVPTX-CXX03-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8
  85 // NVPTX-CXX03-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
  86 // NVPTX-CXX03-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
  87 // NVPTX-CXX03-NEXT:    call void @_ZdlPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR6:[0-9]+]]
  88 // NVPTX-CXX03-NEXT:    ret void
  89 //
  90 // NVPTX-NVPTX-CXX11-LABEL: define hidden void @_Z20delete_stuff_nothrowPi
  91 // NVPTX-NVPTX-CXX11-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
  92 // NVPTX-NVPTX-CXX11-NEXT:  entry:
  93 // NVPTX-NVPTX-CXX11-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8
  94 // NVPTX-NVPTX-CXX11-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
  95 // NVPTX-NVPTX-CXX11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
  96 // NVPTX-NVPTX-CXX11-NEXT:    call void @_ZdlPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR8:[0-9]+]]
  97 // NVPTX-NVPTX-CXX11-NEXT:    ret void
  98 //
  99 // AMDGPU-CXX03-LABEL: define hidden void @_Z20delete_stuff_nothrowPi
 100 // AMDGPU-CXX03-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
 101 // AMDGPU-CXX03-NEXT:  entry:
 102 // AMDGPU-CXX03-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
 103 // AMDGPU-CXX03-NEXT:    [[PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR_ADDR]] to ptr
 104 // AMDGPU-CXX03-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR_ASCAST]], align 8
 105 // AMDGPU-CXX03-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR_ASCAST]], align 8
 106 // AMDGPU-CXX03-NEXT:    call void @_ZdlPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) addrspacecast (ptr addrspace(1) @nothrow to ptr)) #[[ATTR6:[0-9]+]]
 107 // AMDGPU-CXX03-NEXT:    ret void
 108 //
 109 // AMDGPU-CXX11-LABEL: define hidden void @_Z20delete_stuff_nothrowPi
 110 // AMDGPU-CXX11-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
 111 // AMDGPU-CXX11-NEXT:  entry:
 112 // AMDGPU-CXX11-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
 113 // AMDGPU-CXX11-NEXT:    [[PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR_ADDR]] to ptr
 114 // AMDGPU-CXX11-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR_ASCAST]], align 8
 115 // AMDGPU-CXX11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR_ASCAST]], align 8
 116 // AMDGPU-CXX11-NEXT:    call void @_ZdlPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) addrspacecast (ptr addrspace(1) @nothrow to ptr)) #[[ATTR8:[0-9]+]]
 117 // AMDGPU-CXX11-NEXT:    ret void
 118 //
 119 void delete_stuff_nothrow(int* ptr) {
 120   operator delete(ptr, nothrow);
 121 }
 122
 123 //
 124 // NVPTX-CXX11-LABEL: define hidden void @_Z26delete_array_stuff_nothrowPi
 125 // NVPTX-CXX11-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
 126 // NVPTX-CXX11-NEXT:  entry:
 127 // NVPTX-CXX11-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8
 128 // NVPTX-CXX11-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
 129 // NVPTX-CXX11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
 130 // NVPTX-CXX11-NEXT:    call void @_ZdaPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR8]]
 131 // NVPTX-CXX11-NEXT:    ret void
 132 // NVPTX-CXX03-LABEL: define hidden void @_Z26delete_array_stuff_nothrowPi
 133 // NVPTX-CXX03-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
 134 // NVPTX-CXX03-NEXT:  entry:
 135 // NVPTX-CXX03-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8
 136 // NVPTX-CXX03-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
 137 // NVPTX-CXX03-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
 138 // NVPTX-CXX03-NEXT:    call void @_ZdaPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR6]]
 139 // NVPTX-CXX03-NEXT:    ret void
 140 //
 141 // NVPTX-NVPTX-CXX11-LABEL: define hidden void @_Z26delete_array_stuff_nothrowPi
 142 // NVPTX-NVPTX-CXX11-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
 143 // NVPTX-NVPTX-CXX11-NEXT:  entry:
 144 // NVPTX-NVPTX-CXX11-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8
 145 // NVPTX-NVPTX-CXX11-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR]], align 8
 146 // NVPTX-NVPTX-CXX11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR]], align 8
 147 // NVPTX-NVPTX-CXX11-NEXT:    call void @_ZdaPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) @nothrow) #[[ATTR8]]
 148 // NVPTX-NVPTX-CXX11-NEXT:    ret void
 149 //
 150 // AMDGPU-CXX03-LABEL: define hidden void @_Z26delete_array_stuff_nothrowPi
 151 // AMDGPU-CXX03-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
 152 // AMDGPU-CXX03-NEXT:  entry:
 153 // AMDGPU-CXX03-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
 154 // AMDGPU-CXX03-NEXT:    [[PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR_ADDR]] to ptr
 155 // AMDGPU-CXX03-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR_ASCAST]], align 8
 156 // AMDGPU-CXX03-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR_ASCAST]], align 8
 157 // AMDGPU-CXX03-NEXT:    call void @_ZdaPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) addrspacecast (ptr addrspace(1) @nothrow to ptr)) #[[ATTR6]]
 158 // AMDGPU-CXX03-NEXT:    ret void
 159 //
 160 // AMDGPU-CXX11-LABEL: define hidden void @_Z26delete_array_stuff_nothrowPi
 161 // AMDGPU-CXX11-SAME: (ptr noundef [[PTR:%.*]]) #[[ATTR0]] {
 162 // AMDGPU-CXX11-NEXT:  entry:
 163 // AMDGPU-CXX11-NEXT:    [[PTR_ADDR:%.*]] = alloca ptr, align 8, addrspace(5)
 164 // AMDGPU-CXX11-NEXT:    [[PTR_ADDR_ASCAST:%.*]] = addrspacecast ptr addrspace(5) [[PTR_ADDR]] to ptr
 165 // AMDGPU-CXX11-NEXT:    store ptr [[PTR]], ptr [[PTR_ADDR_ASCAST]], align 8
 166 // AMDGPU-CXX11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[PTR_ADDR_ASCAST]], align 8
 167 // AMDGPU-CXX11-NEXT:    call void @_ZdaPvRKSt9nothrow_t(ptr noundef [[TMP0]], ptr noundef nonnull align 1 dereferenceable(1) addrspacecast (ptr addrspace(1) @nothrow to ptr)) #[[ATTR8]]
 168 // AMDGPU-CXX11-NEXT:    ret void
 169 //
 170 void delete_array_stuff_nothrow(int* ptr) {
 171   operator delete[](ptr, nothrow);
 172 }
 173
 174 #pragma omp end declare target