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Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / OpenMP / distribute_codegen.cpp
blobe3b43002a05185997d38da3fb1cc78f6ae280977
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // Test host codegen.
3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
5 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
6 // RUN: %clang_cc1 -verify -fopenmp-version=45 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
8 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
9 // Test host codegen.
10 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
11 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
13 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
14 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
15 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
16
17 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
18 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
20 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
21 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
22 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
23
24 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
26 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
29 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
30
31 // Test target codegen - host bc file has to be created first. (no significant differences with host version of target region)
32 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
33 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK17
34 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
35 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17
36 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
37 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK19
38 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
39 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19
40
41 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
42 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
43 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
44 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
45 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
46 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
47 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
48 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
49
50 // expected-no-diagnostics
51 #ifndef HEADER
52 #define HEADER
53
54
55 void without_schedule_clause(float *a, float *b, float *c, float *d) {
56 #pragma omp target
57 #pragma omp teams
58 #pragma omp distribute
59 for (int i = 33; i < 32000000; i += 7) {
60 a[i] = b[i] * c[i] * d[i];
61 }
62 }
63
64 // ... loop body ...
65
66
67 void static_not_chunked(float *a, float *b, float *c, float *d) {
68 #pragma omp target
69 #pragma omp teams
70 #pragma omp distribute dist_schedule(static)
71 for (int i = 32000000; i > 33; i += -7) {
72 a[i] = b[i] * c[i] * d[i];
73 }
74 }
75
76 // ... loop body ...
77
78
79 void static_chunked(float *a, float *b, float *c, float *d) {
80 #pragma omp target
81 #pragma omp teams
82 #pragma omp distribute dist_schedule(static, 5)
83 for (unsigned i = 131071; i <= 2147483647; i += 127) {
84 a[i] = b[i] * c[i] * d[i];
85 }
86 }
87
88 // ... loop body ...
89
90 void test_precond() {
91 char a = 0;
92 #pragma omp target
93 #pragma omp teams
94 #pragma omp distribute
95 for(char i = a; i < 10; ++i);
96 }
97
98 // a is passed as a parameter to the outlined functions
99 // ..many loads of %0..
100
101 // no templates for now, as these require special handling in target regions and/or declare target
102
103
104 template <typename T>
105 T ftemplate() {
106 short aa = 0;
107
108 #pragma omp target
109 #pragma omp teams
110 #pragma omp distribute dist_schedule(static, aa)
111 for (int i = 0; i < 100; i++) {
112 }
113 return T();
114 }
115
116 int fint(void) { return ftemplate<int>(); }
117
118 #endif
119 // CHECK1-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_
120 // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {
121 // CHECK1-NEXT: entry:
122 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
123 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
124 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
125 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
126 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8
127 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8
128 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8
129 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
130 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
131 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
132 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
133 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
134 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
135 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
136 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
137 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8
138 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8
139 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
140 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 8
141 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
142 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 8
143 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
144 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8
145 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
146 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8
147 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
148 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP8]], align 8
149 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
150 // CHECK1-NEXT: store ptr null, ptr [[TMP9]], align 8
151 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
152 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP10]], align 8
153 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
154 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP11]], align 8
155 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
156 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8
157 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
158 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 8
159 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
160 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 8
161 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
162 // CHECK1-NEXT: store ptr null, ptr [[TMP15]], align 8
163 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
164 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
165 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
166 // CHECK1-NEXT: store i32 2, ptr [[TMP18]], align 4
167 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
168 // CHECK1-NEXT: store i32 4, ptr [[TMP19]], align 4
169 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
170 // CHECK1-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 8
171 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
172 // CHECK1-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 8
173 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
174 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP22]], align 8
175 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
176 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP23]], align 8
177 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
178 // CHECK1-NEXT: store ptr null, ptr [[TMP24]], align 8
179 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
180 // CHECK1-NEXT: store ptr null, ptr [[TMP25]], align 8
181 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
182 // CHECK1-NEXT: store i64 4571424, ptr [[TMP26]], align 8
183 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
184 // CHECK1-NEXT: store i64 0, ptr [[TMP27]], align 8
185 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
186 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4
187 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
188 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4
189 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
190 // CHECK1-NEXT: store i32 0, ptr [[TMP30]], align 4
191 // CHECK1-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56.region_id, ptr [[KERNEL_ARGS]])
192 // CHECK1-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
193 // CHECK1-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
194 // CHECK1: omp_offload.failed:
195 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR2:[0-9]+]]
196 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
197 // CHECK1: omp_offload.cont:
198 // CHECK1-NEXT: ret void
199 //
200 //
201 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56
202 // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] {
203 // CHECK1-NEXT: entry:
204 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
205 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
206 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
207 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
208 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
209 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
210 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
211 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
212 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
213 // CHECK1-NEXT: ret void
214 //
215 //
216 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56.omp_outlined
217 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
218 // CHECK1-NEXT: entry:
219 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
220 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
221 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
222 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
223 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
224 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
225 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
226 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
227 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
228 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
229 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
230 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
231 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
232 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
233 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
234 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
235 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
236 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
237 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
238 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
239 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
240 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8
241 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8
242 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
243 // CHECK1-NEXT: store i32 4571423, ptr [[DOTOMP_UB]], align 4
244 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
245 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
246 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
247 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
248 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
249 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
250 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 4571423
251 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
252 // CHECK1: cond.true:
253 // CHECK1-NEXT: br label [[COND_END:%.*]]
254 // CHECK1: cond.false:
255 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
256 // CHECK1-NEXT: br label [[COND_END]]
257 // CHECK1: cond.end:
258 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
259 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
260 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
261 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
262 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
263 // CHECK1: omp.inner.for.cond:
264 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
265 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
266 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
267 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
268 // CHECK1: omp.inner.for.body:
269 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
270 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 7
271 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 33, [[MUL]]
272 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
273 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 8
274 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
275 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
276 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDXPROM]]
277 // CHECK1-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4
278 // CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 8
279 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
280 // CHECK1-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP16]] to i64
281 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i64 [[IDXPROM2]]
282 // CHECK1-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDX3]], align 4
283 // CHECK1-NEXT: [[MUL4:%.*]] = fmul float [[TMP14]], [[TMP17]]
284 // CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 8
285 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4
286 // CHECK1-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
287 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i64 [[IDXPROM5]]
288 // CHECK1-NEXT: [[TMP20:%.*]] = load float, ptr [[ARRAYIDX6]], align 4
289 // CHECK1-NEXT: [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP20]]
290 // CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 8
291 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[I]], align 4
292 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP22]] to i64
293 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i64 [[IDXPROM8]]
294 // CHECK1-NEXT: store float [[MUL7]], ptr [[ARRAYIDX9]], align 4
295 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
296 // CHECK1: omp.body.continue:
297 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
298 // CHECK1: omp.inner.for.inc:
299 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
300 // CHECK1-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], 1
301 // CHECK1-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
302 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
303 // CHECK1: omp.inner.for.end:
304 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
305 // CHECK1: omp.loop.exit:
306 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
307 // CHECK1-NEXT: ret void
308 //
309 //
310 // CHECK1-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_
311 // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {
312 // CHECK1-NEXT: entry:
313 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
314 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
315 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
316 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
317 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8
318 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8
319 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8
320 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
321 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
322 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
323 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
324 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
325 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
326 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
327 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
328 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8
329 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8
330 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
331 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 8
332 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
333 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 8
334 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
335 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8
336 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
337 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8
338 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
339 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP8]], align 8
340 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
341 // CHECK1-NEXT: store ptr null, ptr [[TMP9]], align 8
342 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
343 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP10]], align 8
344 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
345 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP11]], align 8
346 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
347 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8
348 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
349 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 8
350 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
351 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 8
352 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
353 // CHECK1-NEXT: store ptr null, ptr [[TMP15]], align 8
354 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
355 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
356 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
357 // CHECK1-NEXT: store i32 2, ptr [[TMP18]], align 4
358 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
359 // CHECK1-NEXT: store i32 4, ptr [[TMP19]], align 4
360 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
361 // CHECK1-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 8
362 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
363 // CHECK1-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 8
364 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
365 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP22]], align 8
366 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
367 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP23]], align 8
368 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
369 // CHECK1-NEXT: store ptr null, ptr [[TMP24]], align 8
370 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
371 // CHECK1-NEXT: store ptr null, ptr [[TMP25]], align 8
372 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
373 // CHECK1-NEXT: store i64 4571424, ptr [[TMP26]], align 8
374 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
375 // CHECK1-NEXT: store i64 0, ptr [[TMP27]], align 8
376 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
377 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4
378 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
379 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4
380 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
381 // CHECK1-NEXT: store i32 0, ptr [[TMP30]], align 4
382 // CHECK1-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68.region_id, ptr [[KERNEL_ARGS]])
383 // CHECK1-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
384 // CHECK1-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
385 // CHECK1: omp_offload.failed:
386 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR2]]
387 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
388 // CHECK1: omp_offload.cont:
389 // CHECK1-NEXT: ret void
390 //
391 //
392 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68
393 // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {
394 // CHECK1-NEXT: entry:
395 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
396 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
397 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
398 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
399 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
400 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
401 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
402 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
403 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
404 // CHECK1-NEXT: ret void
405 //
406 //
407 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68.omp_outlined
408 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
409 // CHECK1-NEXT: entry:
410 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
411 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
412 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
413 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
414 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
415 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
416 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
417 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
418 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
419 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
420 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
421 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
422 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
423 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
424 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
425 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
426 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
427 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
428 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
429 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
430 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
431 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8
432 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8
433 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
434 // CHECK1-NEXT: store i32 4571423, ptr [[DOTOMP_UB]], align 4
435 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
436 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
437 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
438 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
439 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
440 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
441 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 4571423
442 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
443 // CHECK1: cond.true:
444 // CHECK1-NEXT: br label [[COND_END:%.*]]
445 // CHECK1: cond.false:
446 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
447 // CHECK1-NEXT: br label [[COND_END]]
448 // CHECK1: cond.end:
449 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
450 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
451 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
452 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
453 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
454 // CHECK1: omp.inner.for.cond:
455 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
456 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
457 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
458 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
459 // CHECK1: omp.inner.for.body:
460 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
461 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 7
462 // CHECK1-NEXT: [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]
463 // CHECK1-NEXT: store i32 [[SUB]], ptr [[I]], align 4
464 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 8
465 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
466 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
467 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDXPROM]]
468 // CHECK1-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4
469 // CHECK1-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 8
470 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
471 // CHECK1-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP16]] to i64
472 // CHECK1-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i64 [[IDXPROM2]]
473 // CHECK1-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDX3]], align 4
474 // CHECK1-NEXT: [[MUL4:%.*]] = fmul float [[TMP14]], [[TMP17]]
475 // CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 8
476 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4
477 // CHECK1-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
478 // CHECK1-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i64 [[IDXPROM5]]
479 // CHECK1-NEXT: [[TMP20:%.*]] = load float, ptr [[ARRAYIDX6]], align 4
480 // CHECK1-NEXT: [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP20]]
481 // CHECK1-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 8
482 // CHECK1-NEXT: [[TMP22:%.*]] = load i32, ptr [[I]], align 4
483 // CHECK1-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP22]] to i64
484 // CHECK1-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i64 [[IDXPROM8]]
485 // CHECK1-NEXT: store float [[MUL7]], ptr [[ARRAYIDX9]], align 4
486 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
487 // CHECK1: omp.body.continue:
488 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
489 // CHECK1: omp.inner.for.inc:
490 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
491 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1
492 // CHECK1-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
493 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
494 // CHECK1: omp.inner.for.end:
495 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
496 // CHECK1: omp.loop.exit:
497 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
498 // CHECK1-NEXT: ret void
499 //
500 //
501 // CHECK1-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_
502 // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {
503 // CHECK1-NEXT: entry:
504 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
505 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
506 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
507 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
508 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8
509 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8
510 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8
511 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
512 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
513 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
514 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
515 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
516 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
517 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
518 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
519 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8
520 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8
521 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
522 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 8
523 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
524 // CHECK1-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 8
525 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
526 // CHECK1-NEXT: store ptr null, ptr [[TMP6]], align 8
527 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
528 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8
529 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
530 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP8]], align 8
531 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
532 // CHECK1-NEXT: store ptr null, ptr [[TMP9]], align 8
533 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
534 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP10]], align 8
535 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
536 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP11]], align 8
537 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
538 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8
539 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
540 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 8
541 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
542 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 8
543 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
544 // CHECK1-NEXT: store ptr null, ptr [[TMP15]], align 8
545 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
546 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
547 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
548 // CHECK1-NEXT: store i32 2, ptr [[TMP18]], align 4
549 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
550 // CHECK1-NEXT: store i32 4, ptr [[TMP19]], align 4
551 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
552 // CHECK1-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 8
553 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
554 // CHECK1-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 8
555 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
556 // CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP22]], align 8
557 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
558 // CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP23]], align 8
559 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
560 // CHECK1-NEXT: store ptr null, ptr [[TMP24]], align 8
561 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
562 // CHECK1-NEXT: store ptr null, ptr [[TMP25]], align 8
563 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
564 // CHECK1-NEXT: store i64 16908289, ptr [[TMP26]], align 8
565 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
566 // CHECK1-NEXT: store i64 0, ptr [[TMP27]], align 8
567 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
568 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4
569 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
570 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4
571 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
572 // CHECK1-NEXT: store i32 0, ptr [[TMP30]], align 4
573 // CHECK1-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80.region_id, ptr [[KERNEL_ARGS]])
574 // CHECK1-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
575 // CHECK1-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
576 // CHECK1: omp_offload.failed:
577 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR2]]
578 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
579 // CHECK1: omp_offload.cont:
580 // CHECK1-NEXT: ret void
581 //
582 //
583 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80
584 // CHECK1-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {
585 // CHECK1-NEXT: entry:
586 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
587 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
588 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
589 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
590 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
591 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
592 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
593 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
594 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
595 // CHECK1-NEXT: ret void
596 //
597 //
598 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80.omp_outlined
599 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR1]] {
600 // CHECK1-NEXT: entry:
601 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
602 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
603 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
604 // CHECK1-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
605 // CHECK1-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
606 // CHECK1-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
607 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
608 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
609 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
610 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
611 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
612 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
613 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
614 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
615 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
616 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
617 // CHECK1-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
618 // CHECK1-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
619 // CHECK1-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
620 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
621 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
622 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8
623 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8
624 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
625 // CHECK1-NEXT: store i32 16908288, ptr [[DOTOMP_UB]], align 4
626 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
627 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
628 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
629 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
630 // CHECK1-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)
631 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
632 // CHECK1: omp.dispatch.cond:
633 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
634 // CHECK1-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 16908288
635 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
636 // CHECK1: cond.true:
637 // CHECK1-NEXT: br label [[COND_END:%.*]]
638 // CHECK1: cond.false:
639 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
640 // CHECK1-NEXT: br label [[COND_END]]
641 // CHECK1: cond.end:
642 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
643 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
644 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
645 // CHECK1-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
646 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
647 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
648 // CHECK1-NEXT: [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]
649 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
650 // CHECK1: omp.dispatch.body:
651 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
652 // CHECK1: omp.inner.for.cond:
653 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
654 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
655 // CHECK1-NEXT: [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]
656 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
657 // CHECK1: omp.inner.for.body:
658 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
659 // CHECK1-NEXT: [[MUL:%.*]] = mul i32 [[TMP13]], 127
660 // CHECK1-NEXT: [[ADD:%.*]] = add i32 131071, [[MUL]]
661 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
662 // CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP10]]
663 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
664 // CHECK1-NEXT: [[IDXPROM:%.*]] = zext i32 [[TMP15]] to i64
665 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP14]], i64 [[IDXPROM]]
666 // CHECK1-NEXT: [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]
667 // CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP10]]
668 // CHECK1-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
669 // CHECK1-NEXT: [[IDXPROM3:%.*]] = zext i32 [[TMP18]] to i64
670 // CHECK1-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP17]], i64 [[IDXPROM3]]
671 // CHECK1-NEXT: [[TMP19:%.*]] = load float, ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP10]]
672 // CHECK1-NEXT: [[MUL5:%.*]] = fmul float [[TMP16]], [[TMP19]]
673 // CHECK1-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP10]]
674 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
675 // CHECK1-NEXT: [[IDXPROM6:%.*]] = zext i32 [[TMP21]] to i64
676 // CHECK1-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds float, ptr [[TMP20]], i64 [[IDXPROM6]]
677 // CHECK1-NEXT: [[TMP22:%.*]] = load float, ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP10]]
678 // CHECK1-NEXT: [[MUL8:%.*]] = fmul float [[MUL5]], [[TMP22]]
679 // CHECK1-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP10]]
680 // CHECK1-NEXT: [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
681 // CHECK1-NEXT: [[IDXPROM9:%.*]] = zext i32 [[TMP24]] to i64
682 // CHECK1-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, ptr [[TMP23]], i64 [[IDXPROM9]]
683 // CHECK1-NEXT: store float [[MUL8]], ptr [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP10]]
684 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
685 // CHECK1: omp.body.continue:
686 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
687 // CHECK1: omp.inner.for.inc:
688 // CHECK1-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
689 // CHECK1-NEXT: [[ADD11:%.*]] = add i32 [[TMP25]], 1
690 // CHECK1-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
691 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
692 // CHECK1: omp.inner.for.end:
693 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
694 // CHECK1: omp.dispatch.inc:
695 // CHECK1-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
696 // CHECK1-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
697 // CHECK1-NEXT: [[ADD12:%.*]] = add i32 [[TMP26]], [[TMP27]]
698 // CHECK1-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_LB]], align 4
699 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
700 // CHECK1-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
701 // CHECK1-NEXT: [[ADD13:%.*]] = add i32 [[TMP28]], [[TMP29]]
702 // CHECK1-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_UB]], align 4
703 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
704 // CHECK1: omp.dispatch.end:
705 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
706 // CHECK1-NEXT: ret void
707 //
708 //
709 // CHECK1-LABEL: define {{[^@]+}}@_Z12test_precondv
710 // CHECK1-SAME: () #[[ATTR0]] {
711 // CHECK1-NEXT: entry:
712 // CHECK1-NEXT: [[A:%.*]] = alloca i8, align 1
713 // CHECK1-NEXT: [[A_CASTED:%.*]] = alloca i64, align 8
714 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
715 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
716 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
717 // CHECK1-NEXT: [[TMP:%.*]] = alloca i8, align 1
718 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
719 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
720 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
721 // CHECK1-NEXT: store i8 0, ptr [[A]], align 1
722 // CHECK1-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
723 // CHECK1-NEXT: store i8 [[TMP0]], ptr [[A_CASTED]], align 1
724 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
725 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
726 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8
727 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
728 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8
729 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
730 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8
731 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
732 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
733 // CHECK1-NEXT: [[TMP7:%.*]] = load i8, ptr [[A]], align 1
734 // CHECK1-NEXT: store i8 [[TMP7]], ptr [[DOTCAPTURE_EXPR_]], align 1
735 // CHECK1-NEXT: [[TMP8:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
736 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP8]] to i32
737 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 10, [[CONV]]
738 // CHECK1-NEXT: [[SUB2:%.*]] = sub i32 [[SUB]], 1
739 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB2]], 1
740 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
741 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
742 // CHECK1-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
743 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
744 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP9]], 1
745 // CHECK1-NEXT: [[TMP10:%.*]] = zext i32 [[ADD4]] to i64
746 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
747 // CHECK1-NEXT: store i32 2, ptr [[TMP11]], align 4
748 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
749 // CHECK1-NEXT: store i32 1, ptr [[TMP12]], align 4
750 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
751 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[TMP13]], align 8
752 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
753 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP14]], align 8
754 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
755 // CHECK1-NEXT: store ptr @.offload_sizes.5, ptr [[TMP15]], align 8
756 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
757 // CHECK1-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP16]], align 8
758 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
759 // CHECK1-NEXT: store ptr null, ptr [[TMP17]], align 8
760 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
761 // CHECK1-NEXT: store ptr null, ptr [[TMP18]], align 8
762 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
763 // CHECK1-NEXT: store i64 [[TMP10]], ptr [[TMP19]], align 8
764 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
765 // CHECK1-NEXT: store i64 0, ptr [[TMP20]], align 8
766 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
767 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP21]], align 4
768 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
769 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP22]], align 4
770 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
771 // CHECK1-NEXT: store i32 0, ptr [[TMP23]], align 4
772 // CHECK1-NEXT: [[TMP24:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92.region_id, ptr [[KERNEL_ARGS]])
773 // CHECK1-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
774 // CHECK1-NEXT: br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
775 // CHECK1: omp_offload.failed:
776 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92(i64 [[TMP1]]) #[[ATTR2]]
777 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
778 // CHECK1: omp_offload.cont:
779 // CHECK1-NEXT: ret void
780 //
781 //
782 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92
783 // CHECK1-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
784 // CHECK1-NEXT: entry:
785 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
786 // CHECK1-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
787 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92.omp_outlined, ptr [[A_ADDR]])
788 // CHECK1-NEXT: ret void
789 //
790 //
791 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92.omp_outlined
792 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] {
793 // CHECK1-NEXT: entry:
794 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
795 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
796 // CHECK1-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
797 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
798 // CHECK1-NEXT: [[TMP:%.*]] = alloca i8, align 1
799 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
800 // CHECK1-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
801 // CHECK1-NEXT: [[I:%.*]] = alloca i8, align 1
802 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
803 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
804 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
805 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
806 // CHECK1-NEXT: [[I5:%.*]] = alloca i8, align 1
807 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
808 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
809 // CHECK1-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
810 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
811 // CHECK1-NEXT: [[TMP1:%.*]] = load i8, ptr [[TMP0]], align 1
812 // CHECK1-NEXT: store i8 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 1
813 // CHECK1-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
814 // CHECK1-NEXT: [[CONV:%.*]] = sext i8 [[TMP2]] to i32
815 // CHECK1-NEXT: [[SUB:%.*]] = sub i32 10, [[CONV]]
816 // CHECK1-NEXT: [[SUB2:%.*]] = sub i32 [[SUB]], 1
817 // CHECK1-NEXT: [[ADD:%.*]] = add i32 [[SUB2]], 1
818 // CHECK1-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
819 // CHECK1-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
820 // CHECK1-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
821 // CHECK1-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
822 // CHECK1-NEXT: store i8 [[TMP3]], ptr [[I]], align 1
823 // CHECK1-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
824 // CHECK1-NEXT: [[CONV4:%.*]] = sext i8 [[TMP4]] to i32
825 // CHECK1-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV4]], 10
826 // CHECK1-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
827 // CHECK1: omp.precond.then:
828 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
829 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
830 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
831 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
832 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
833 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
834 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
835 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
836 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
837 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
838 // CHECK1-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
839 // CHECK1-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
840 // CHECK1: cond.true:
841 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
842 // CHECK1-NEXT: br label [[COND_END:%.*]]
843 // CHECK1: cond.false:
844 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
845 // CHECK1-NEXT: br label [[COND_END]]
846 // CHECK1: cond.end:
847 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
848 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
849 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
850 // CHECK1-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
851 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
852 // CHECK1: omp.inner.for.cond:
853 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
854 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
855 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
856 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
857 // CHECK1: omp.inner.for.body:
858 // CHECK1-NEXT: [[TMP15:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
859 // CHECK1-NEXT: [[CONV8:%.*]] = sext i8 [[TMP15]] to i32
860 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
861 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
862 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], [[MUL]]
863 // CHECK1-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i8
864 // CHECK1-NEXT: store i8 [[CONV10]], ptr [[I5]], align 1
865 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
866 // CHECK1: omp.body.continue:
867 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
868 // CHECK1: omp.inner.for.inc:
869 // CHECK1-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
870 // CHECK1-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP17]], 1
871 // CHECK1-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
872 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
873 // CHECK1: omp.inner.for.end:
874 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
875 // CHECK1: omp.loop.exit:
876 // CHECK1-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
877 // CHECK1-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
878 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])
879 // CHECK1-NEXT: br label [[OMP_PRECOND_END]]
880 // CHECK1: omp.precond.end:
881 // CHECK1-NEXT: ret void
882 //
883 //
884 // CHECK1-LABEL: define {{[^@]+}}@_Z4fintv
885 // CHECK1-SAME: () #[[ATTR0]] {
886 // CHECK1-NEXT: entry:
887 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z9ftemplateIiET_v()
888 // CHECK1-NEXT: ret i32 [[CALL]]
889 //
890 //
891 // CHECK1-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v
892 // CHECK1-SAME: () #[[ATTR0]] comdat {
893 // CHECK1-NEXT: entry:
894 // CHECK1-NEXT: [[AA:%.*]] = alloca i16, align 2
895 // CHECK1-NEXT: [[AA_CASTED:%.*]] = alloca i64, align 8
896 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
897 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
898 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
899 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
900 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
901 // CHECK1-NEXT: store i16 0, ptr [[AA]], align 2
902 // CHECK1-NEXT: [[TMP0:%.*]] = load i16, ptr [[AA]], align 2
903 // CHECK1-NEXT: store i16 [[TMP0]], ptr [[AA_CASTED]], align 2
904 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[AA_CASTED]], align 8
905 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
906 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP2]], align 8
907 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
908 // CHECK1-NEXT: store i64 [[TMP1]], ptr [[TMP3]], align 8
909 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
910 // CHECK1-NEXT: store ptr null, ptr [[TMP4]], align 8
911 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
912 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
913 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
914 // CHECK1-NEXT: store i32 2, ptr [[TMP7]], align 4
915 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
916 // CHECK1-NEXT: store i32 1, ptr [[TMP8]], align 4
917 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
918 // CHECK1-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 8
919 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
920 // CHECK1-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 8
921 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
922 // CHECK1-NEXT: store ptr @.offload_sizes.7, ptr [[TMP11]], align 8
923 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
924 // CHECK1-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP12]], align 8
925 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
926 // CHECK1-NEXT: store ptr null, ptr [[TMP13]], align 8
927 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
928 // CHECK1-NEXT: store ptr null, ptr [[TMP14]], align 8
929 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
930 // CHECK1-NEXT: store i64 100, ptr [[TMP15]], align 8
931 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
932 // CHECK1-NEXT: store i64 0, ptr [[TMP16]], align 8
933 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
934 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4
935 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
936 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4
937 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
938 // CHECK1-NEXT: store i32 0, ptr [[TMP19]], align 4
939 // CHECK1-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108.region_id, ptr [[KERNEL_ARGS]])
940 // CHECK1-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
941 // CHECK1-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
942 // CHECK1: omp_offload.failed:
943 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108(i64 [[TMP1]]) #[[ATTR2]]
944 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
945 // CHECK1: omp_offload.cont:
946 // CHECK1-NEXT: ret i32 0
947 //
948 //
949 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108
950 // CHECK1-SAME: (i64 noundef [[AA:%.*]]) #[[ATTR1]] {
951 // CHECK1-NEXT: entry:
952 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
953 // CHECK1-NEXT: store i64 [[AA]], ptr [[AA_ADDR]], align 8
954 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108.omp_outlined, ptr [[AA_ADDR]])
955 // CHECK1-NEXT: ret void
956 //
957 //
958 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108.omp_outlined
959 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] {
960 // CHECK1-NEXT: entry:
961 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
962 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
963 // CHECK1-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 8
964 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
965 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
966 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
967 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
968 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
969 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
970 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
971 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
972 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
973 // CHECK1-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 8
974 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 8
975 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
976 // CHECK1-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
977 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
978 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
979 // CHECK1-NEXT: [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 2
980 // CHECK1-NEXT: [[CONV:%.*]] = sext i16 [[TMP1]] to i32
981 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
982 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
983 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])
984 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
985 // CHECK1: omp.dispatch.cond:
986 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
987 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
988 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
989 // CHECK1: cond.true:
990 // CHECK1-NEXT: br label [[COND_END:%.*]]
991 // CHECK1: cond.false:
992 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
993 // CHECK1-NEXT: br label [[COND_END]]
994 // CHECK1: cond.end:
995 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
996 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
997 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
998 // CHECK1-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
999 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1000 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1001 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1002 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1003 // CHECK1: omp.dispatch.body:
1004 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1005 // CHECK1: omp.inner.for.cond:
1006 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
1007 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
1008 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1009 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1010 // CHECK1: omp.inner.for.body:
1011 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1012 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1013 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1014 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
1015 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1016 // CHECK1: omp.body.continue:
1017 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1018 // CHECK1: omp.inner.for.inc:
1019 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1020 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1021 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1022 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1023 // CHECK1: omp.inner.for.end:
1024 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1025 // CHECK1: omp.dispatch.inc:
1026 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1027 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1028 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1029 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
1030 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1031 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1032 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1033 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
1034 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
1035 // CHECK1: omp.dispatch.end:
1036 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
1037 // CHECK1-NEXT: ret void
1038 //
1039 //
1040 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1041 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
1042 // CHECK1-NEXT: entry:
1043 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
1044 // CHECK1-NEXT: ret void
1045 //
1046 //
1047 // CHECK3-LABEL: define {{[^@]+}}@_Z23without_schedule_clausePfS_S_S_
1048 // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {
1049 // CHECK3-NEXT: entry:
1050 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1051 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
1052 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
1053 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
1054 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4
1055 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4
1056 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4
1057 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1058 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1059 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1060 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
1061 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
1062 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
1063 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1064 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
1065 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 4
1066 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 4
1067 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1068 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 4
1069 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1070 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 4
1071 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1072 // CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 4
1073 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1074 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 4
1075 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1076 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP8]], align 4
1077 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1078 // CHECK3-NEXT: store ptr null, ptr [[TMP9]], align 4
1079 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1080 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP10]], align 4
1081 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1082 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP11]], align 4
1083 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1084 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4
1085 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1086 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 4
1087 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1088 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 4
1089 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1090 // CHECK3-NEXT: store ptr null, ptr [[TMP15]], align 4
1091 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1092 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1093 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1094 // CHECK3-NEXT: store i32 2, ptr [[TMP18]], align 4
1095 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1096 // CHECK3-NEXT: store i32 4, ptr [[TMP19]], align 4
1097 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1098 // CHECK3-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 4
1099 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1100 // CHECK3-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 4
1101 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1102 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP22]], align 4
1103 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1104 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP23]], align 4
1105 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1106 // CHECK3-NEXT: store ptr null, ptr [[TMP24]], align 4
1107 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1108 // CHECK3-NEXT: store ptr null, ptr [[TMP25]], align 4
1109 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1110 // CHECK3-NEXT: store i64 4571424, ptr [[TMP26]], align 8
1111 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1112 // CHECK3-NEXT: store i64 0, ptr [[TMP27]], align 8
1113 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1114 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4
1115 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1116 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4
1117 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1118 // CHECK3-NEXT: store i32 0, ptr [[TMP30]], align 4
1119 // CHECK3-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56.region_id, ptr [[KERNEL_ARGS]])
1120 // CHECK3-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
1121 // CHECK3-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1122 // CHECK3: omp_offload.failed:
1123 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR2:[0-9]+]]
1124 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1125 // CHECK3: omp_offload.cont:
1126 // CHECK3-NEXT: ret void
1127 //
1128 //
1129 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56
1130 // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1:[0-9]+]] {
1131 // CHECK3-NEXT: entry:
1132 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1133 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
1134 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
1135 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
1136 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1137 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
1138 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
1139 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
1140 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
1141 // CHECK3-NEXT: ret void
1142 //
1143 //
1144 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56.omp_outlined
1145 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {
1146 // CHECK3-NEXT: entry:
1147 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1148 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1149 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1150 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
1151 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
1152 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
1153 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1154 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1155 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1156 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1157 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1158 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1159 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1160 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1161 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1162 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1163 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
1164 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
1165 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
1166 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1167 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
1168 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 4
1169 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 4
1170 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1171 // CHECK3-NEXT: store i32 4571423, ptr [[DOTOMP_UB]], align 4
1172 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1173 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1174 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1175 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1176 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1177 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1178 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 4571423
1179 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1180 // CHECK3: cond.true:
1181 // CHECK3-NEXT: br label [[COND_END:%.*]]
1182 // CHECK3: cond.false:
1183 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1184 // CHECK3-NEXT: br label [[COND_END]]
1185 // CHECK3: cond.end:
1186 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1187 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1188 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1189 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1190 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1191 // CHECK3: omp.inner.for.cond:
1192 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1193 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1194 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1195 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1196 // CHECK3: omp.inner.for.body:
1197 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1198 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 7
1199 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 33, [[MUL]]
1200 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1201 // CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 4
1202 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
1203 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i32 [[TMP13]]
1204 // CHECK3-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4
1205 // CHECK3-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 4
1206 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
1207 // CHECK3-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i32 [[TMP16]]
1208 // CHECK3-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDX2]], align 4
1209 // CHECK3-NEXT: [[MUL3:%.*]] = fmul float [[TMP14]], [[TMP17]]
1210 // CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 4
1211 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4
1212 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i32 [[TMP19]]
1213 // CHECK3-NEXT: [[TMP20:%.*]] = load float, ptr [[ARRAYIDX4]], align 4
1214 // CHECK3-NEXT: [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP20]]
1215 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 4
1216 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[I]], align 4
1217 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i32 [[TMP22]]
1218 // CHECK3-NEXT: store float [[MUL5]], ptr [[ARRAYIDX6]], align 4
1219 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1220 // CHECK3: omp.body.continue:
1221 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1222 // CHECK3: omp.inner.for.inc:
1223 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1224 // CHECK3-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], 1
1225 // CHECK3-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
1226 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1227 // CHECK3: omp.inner.for.end:
1228 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1229 // CHECK3: omp.loop.exit:
1230 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
1231 // CHECK3-NEXT: ret void
1232 //
1233 //
1234 // CHECK3-LABEL: define {{[^@]+}}@_Z18static_not_chunkedPfS_S_S_
1235 // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {
1236 // CHECK3-NEXT: entry:
1237 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1238 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
1239 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
1240 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
1241 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4
1242 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4
1243 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4
1244 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1245 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1246 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1247 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
1248 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
1249 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
1250 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1251 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
1252 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 4
1253 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 4
1254 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1255 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 4
1256 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1257 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 4
1258 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1259 // CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 4
1260 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1261 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 4
1262 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1263 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP8]], align 4
1264 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1265 // CHECK3-NEXT: store ptr null, ptr [[TMP9]], align 4
1266 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1267 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP10]], align 4
1268 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1269 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP11]], align 4
1270 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1271 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4
1272 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1273 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 4
1274 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1275 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 4
1276 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1277 // CHECK3-NEXT: store ptr null, ptr [[TMP15]], align 4
1278 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1279 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1280 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1281 // CHECK3-NEXT: store i32 2, ptr [[TMP18]], align 4
1282 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1283 // CHECK3-NEXT: store i32 4, ptr [[TMP19]], align 4
1284 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1285 // CHECK3-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 4
1286 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1287 // CHECK3-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 4
1288 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1289 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP22]], align 4
1290 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1291 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP23]], align 4
1292 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1293 // CHECK3-NEXT: store ptr null, ptr [[TMP24]], align 4
1294 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1295 // CHECK3-NEXT: store ptr null, ptr [[TMP25]], align 4
1296 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1297 // CHECK3-NEXT: store i64 4571424, ptr [[TMP26]], align 8
1298 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1299 // CHECK3-NEXT: store i64 0, ptr [[TMP27]], align 8
1300 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1301 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4
1302 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1303 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4
1304 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1305 // CHECK3-NEXT: store i32 0, ptr [[TMP30]], align 4
1306 // CHECK3-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68.region_id, ptr [[KERNEL_ARGS]])
1307 // CHECK3-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
1308 // CHECK3-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1309 // CHECK3: omp_offload.failed:
1310 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR2]]
1311 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1312 // CHECK3: omp_offload.cont:
1313 // CHECK3-NEXT: ret void
1314 //
1315 //
1316 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68
1317 // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {
1318 // CHECK3-NEXT: entry:
1319 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1320 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
1321 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
1322 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
1323 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1324 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
1325 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
1326 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
1327 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
1328 // CHECK3-NEXT: ret void
1329 //
1330 //
1331 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68.omp_outlined
1332 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {
1333 // CHECK3-NEXT: entry:
1334 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1335 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1336 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1337 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
1338 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
1339 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
1340 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1341 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1342 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1343 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1344 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1345 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1346 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1347 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1348 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1349 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1350 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
1351 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
1352 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
1353 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1354 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
1355 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 4
1356 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 4
1357 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1358 // CHECK3-NEXT: store i32 4571423, ptr [[DOTOMP_UB]], align 4
1359 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1360 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1361 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1362 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1363 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1364 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1365 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 4571423
1366 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1367 // CHECK3: cond.true:
1368 // CHECK3-NEXT: br label [[COND_END:%.*]]
1369 // CHECK3: cond.false:
1370 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1371 // CHECK3-NEXT: br label [[COND_END]]
1372 // CHECK3: cond.end:
1373 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1374 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1375 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1376 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1377 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1378 // CHECK3: omp.inner.for.cond:
1379 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1380 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1381 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1382 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1383 // CHECK3: omp.inner.for.body:
1384 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1385 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 7
1386 // CHECK3-NEXT: [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]
1387 // CHECK3-NEXT: store i32 [[SUB]], ptr [[I]], align 4
1388 // CHECK3-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 4
1389 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
1390 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i32 [[TMP13]]
1391 // CHECK3-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4
1392 // CHECK3-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 4
1393 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
1394 // CHECK3-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i32 [[TMP16]]
1395 // CHECK3-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDX2]], align 4
1396 // CHECK3-NEXT: [[MUL3:%.*]] = fmul float [[TMP14]], [[TMP17]]
1397 // CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 4
1398 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4
1399 // CHECK3-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i32 [[TMP19]]
1400 // CHECK3-NEXT: [[TMP20:%.*]] = load float, ptr [[ARRAYIDX4]], align 4
1401 // CHECK3-NEXT: [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP20]]
1402 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 4
1403 // CHECK3-NEXT: [[TMP22:%.*]] = load i32, ptr [[I]], align 4
1404 // CHECK3-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i32 [[TMP22]]
1405 // CHECK3-NEXT: store float [[MUL5]], ptr [[ARRAYIDX6]], align 4
1406 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1407 // CHECK3: omp.body.continue:
1408 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1409 // CHECK3: omp.inner.for.inc:
1410 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1411 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1
1412 // CHECK3-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1413 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1414 // CHECK3: omp.inner.for.end:
1415 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1416 // CHECK3: omp.loop.exit:
1417 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
1418 // CHECK3-NEXT: ret void
1419 //
1420 //
1421 // CHECK3-LABEL: define {{[^@]+}}@_Z14static_chunkedPfS_S_S_
1422 // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {
1423 // CHECK3-NEXT: entry:
1424 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1425 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
1426 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
1427 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
1428 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4
1429 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4
1430 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4
1431 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1432 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1433 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1434 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
1435 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
1436 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
1437 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1438 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
1439 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 4
1440 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 4
1441 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1442 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP4]], align 4
1443 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1444 // CHECK3-NEXT: store ptr [[TMP0]], ptr [[TMP5]], align 4
1445 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1446 // CHECK3-NEXT: store ptr null, ptr [[TMP6]], align 4
1447 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1448 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 4
1449 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1450 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP8]], align 4
1451 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1452 // CHECK3-NEXT: store ptr null, ptr [[TMP9]], align 4
1453 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1454 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP10]], align 4
1455 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1456 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP11]], align 4
1457 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1458 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4
1459 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1460 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 4
1461 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1462 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 4
1463 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1464 // CHECK3-NEXT: store ptr null, ptr [[TMP15]], align 4
1465 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1466 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1467 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1468 // CHECK3-NEXT: store i32 2, ptr [[TMP18]], align 4
1469 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1470 // CHECK3-NEXT: store i32 4, ptr [[TMP19]], align 4
1471 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1472 // CHECK3-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 4
1473 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1474 // CHECK3-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 4
1475 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1476 // CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP22]], align 4
1477 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1478 // CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP23]], align 4
1479 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1480 // CHECK3-NEXT: store ptr null, ptr [[TMP24]], align 4
1481 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1482 // CHECK3-NEXT: store ptr null, ptr [[TMP25]], align 4
1483 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1484 // CHECK3-NEXT: store i64 16908289, ptr [[TMP26]], align 8
1485 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1486 // CHECK3-NEXT: store i64 0, ptr [[TMP27]], align 8
1487 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1488 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4
1489 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1490 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4
1491 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1492 // CHECK3-NEXT: store i32 0, ptr [[TMP30]], align 4
1493 // CHECK3-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80.region_id, ptr [[KERNEL_ARGS]])
1494 // CHECK3-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
1495 // CHECK3-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1496 // CHECK3: omp_offload.failed:
1497 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80(ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP2]], ptr [[TMP3]]) #[[ATTR2]]
1498 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1499 // CHECK3: omp_offload.cont:
1500 // CHECK3-NEXT: ret void
1501 //
1502 //
1503 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80
1504 // CHECK3-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR1]] {
1505 // CHECK3-NEXT: entry:
1506 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1507 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
1508 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
1509 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
1510 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1511 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
1512 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
1513 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
1514 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
1515 // CHECK3-NEXT: ret void
1516 //
1517 //
1518 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80.omp_outlined
1519 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR1]] {
1520 // CHECK3-NEXT: entry:
1521 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1522 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1523 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1524 // CHECK3-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
1525 // CHECK3-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
1526 // CHECK3-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
1527 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1528 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1529 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1530 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1531 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1532 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1533 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1534 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1535 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1536 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1537 // CHECK3-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
1538 // CHECK3-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
1539 // CHECK3-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
1540 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1541 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
1542 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 4
1543 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 4
1544 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1545 // CHECK3-NEXT: store i32 16908288, ptr [[DOTOMP_UB]], align 4
1546 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1547 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1548 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1549 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1550 // CHECK3-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)
1551 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1552 // CHECK3: omp.dispatch.cond:
1553 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1554 // CHECK3-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 16908288
1555 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1556 // CHECK3: cond.true:
1557 // CHECK3-NEXT: br label [[COND_END:%.*]]
1558 // CHECK3: cond.false:
1559 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1560 // CHECK3-NEXT: br label [[COND_END]]
1561 // CHECK3: cond.end:
1562 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1563 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1564 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1565 // CHECK3-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1566 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1567 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1568 // CHECK3-NEXT: [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]
1569 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1570 // CHECK3: omp.dispatch.body:
1571 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1572 // CHECK3: omp.inner.for.cond:
1573 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
1574 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1575 // CHECK3-NEXT: [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]
1576 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1577 // CHECK3: omp.inner.for.body:
1578 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1579 // CHECK3-NEXT: [[MUL:%.*]] = mul i32 [[TMP13]], 127
1580 // CHECK3-NEXT: [[ADD:%.*]] = add i32 131071, [[MUL]]
1581 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
1582 // CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP11]]
1583 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
1584 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP14]], i32 [[TMP15]]
1585 // CHECK3-NEXT: [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]
1586 // CHECK3-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP11]]
1587 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
1588 // CHECK3-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP17]], i32 [[TMP18]]
1589 // CHECK3-NEXT: [[TMP19:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP11]]
1590 // CHECK3-NEXT: [[MUL4:%.*]] = fmul float [[TMP16]], [[TMP19]]
1591 // CHECK3-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP11]]
1592 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
1593 // CHECK3-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP20]], i32 [[TMP21]]
1594 // CHECK3-NEXT: [[TMP22:%.*]] = load float, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP11]]
1595 // CHECK3-NEXT: [[MUL6:%.*]] = fmul float [[MUL4]], [[TMP22]]
1596 // CHECK3-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP11]]
1597 // CHECK3-NEXT: [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
1598 // CHECK3-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds float, ptr [[TMP23]], i32 [[TMP24]]
1599 // CHECK3-NEXT: store float [[MUL6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP11]]
1600 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1601 // CHECK3: omp.body.continue:
1602 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1603 // CHECK3: omp.inner.for.inc:
1604 // CHECK3-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1605 // CHECK3-NEXT: [[ADD8:%.*]] = add i32 [[TMP25]], 1
1606 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1607 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1608 // CHECK3: omp.inner.for.end:
1609 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1610 // CHECK3: omp.dispatch.inc:
1611 // CHECK3-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1612 // CHECK3-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1613 // CHECK3-NEXT: [[ADD9:%.*]] = add i32 [[TMP26]], [[TMP27]]
1614 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 4
1615 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1616 // CHECK3-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1617 // CHECK3-NEXT: [[ADD10:%.*]] = add i32 [[TMP28]], [[TMP29]]
1618 // CHECK3-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 4
1619 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
1620 // CHECK3: omp.dispatch.end:
1621 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
1622 // CHECK3-NEXT: ret void
1623 //
1624 //
1625 // CHECK3-LABEL: define {{[^@]+}}@_Z12test_precondv
1626 // CHECK3-SAME: () #[[ATTR0]] {
1627 // CHECK3-NEXT: entry:
1628 // CHECK3-NEXT: [[A:%.*]] = alloca i8, align 1
1629 // CHECK3-NEXT: [[A_CASTED:%.*]] = alloca i32, align 4
1630 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
1631 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
1632 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
1633 // CHECK3-NEXT: [[TMP:%.*]] = alloca i8, align 1
1634 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1635 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1636 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1637 // CHECK3-NEXT: store i8 0, ptr [[A]], align 1
1638 // CHECK3-NEXT: [[TMP0:%.*]] = load i8, ptr [[A]], align 1
1639 // CHECK3-NEXT: store i8 [[TMP0]], ptr [[A_CASTED]], align 1
1640 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
1641 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1642 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP2]], align 4
1643 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1644 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 4
1645 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1646 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4
1647 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1648 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1649 // CHECK3-NEXT: [[TMP7:%.*]] = load i8, ptr [[A]], align 1
1650 // CHECK3-NEXT: store i8 [[TMP7]], ptr [[DOTCAPTURE_EXPR_]], align 1
1651 // CHECK3-NEXT: [[TMP8:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
1652 // CHECK3-NEXT: [[CONV:%.*]] = sext i8 [[TMP8]] to i32
1653 // CHECK3-NEXT: [[SUB:%.*]] = sub i32 10, [[CONV]]
1654 // CHECK3-NEXT: [[SUB2:%.*]] = sub i32 [[SUB]], 1
1655 // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB2]], 1
1656 // CHECK3-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
1657 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
1658 // CHECK3-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1659 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1660 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP9]], 1
1661 // CHECK3-NEXT: [[TMP10:%.*]] = zext i32 [[ADD4]] to i64
1662 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1663 // CHECK3-NEXT: store i32 2, ptr [[TMP11]], align 4
1664 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1665 // CHECK3-NEXT: store i32 1, ptr [[TMP12]], align 4
1666 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1667 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[TMP13]], align 4
1668 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1669 // CHECK3-NEXT: store ptr [[TMP6]], ptr [[TMP14]], align 4
1670 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1671 // CHECK3-NEXT: store ptr @.offload_sizes.5, ptr [[TMP15]], align 4
1672 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1673 // CHECK3-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP16]], align 4
1674 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1675 // CHECK3-NEXT: store ptr null, ptr [[TMP17]], align 4
1676 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1677 // CHECK3-NEXT: store ptr null, ptr [[TMP18]], align 4
1678 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1679 // CHECK3-NEXT: store i64 [[TMP10]], ptr [[TMP19]], align 8
1680 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1681 // CHECK3-NEXT: store i64 0, ptr [[TMP20]], align 8
1682 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1683 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP21]], align 4
1684 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1685 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP22]], align 4
1686 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1687 // CHECK3-NEXT: store i32 0, ptr [[TMP23]], align 4
1688 // CHECK3-NEXT: [[TMP24:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92.region_id, ptr [[KERNEL_ARGS]])
1689 // CHECK3-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1690 // CHECK3-NEXT: br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1691 // CHECK3: omp_offload.failed:
1692 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92(i32 [[TMP1]]) #[[ATTR2]]
1693 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1694 // CHECK3: omp_offload.cont:
1695 // CHECK3-NEXT: ret void
1696 //
1697 //
1698 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92
1699 // CHECK3-SAME: (i32 noundef [[A:%.*]]) #[[ATTR1]] {
1700 // CHECK3-NEXT: entry:
1701 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1702 // CHECK3-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1703 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92.omp_outlined, ptr [[A_ADDR]])
1704 // CHECK3-NEXT: ret void
1705 //
1706 //
1707 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92.omp_outlined
1708 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR1]] {
1709 // CHECK3-NEXT: entry:
1710 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1711 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1712 // CHECK3-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
1713 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1714 // CHECK3-NEXT: [[TMP:%.*]] = alloca i8, align 1
1715 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
1716 // CHECK3-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1717 // CHECK3-NEXT: [[I:%.*]] = alloca i8, align 1
1718 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1719 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1720 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1721 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1722 // CHECK3-NEXT: [[I5:%.*]] = alloca i8, align 1
1723 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1724 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1725 // CHECK3-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
1726 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1727 // CHECK3-NEXT: [[TMP1:%.*]] = load i8, ptr [[TMP0]], align 1
1728 // CHECK3-NEXT: store i8 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 1
1729 // CHECK3-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
1730 // CHECK3-NEXT: [[CONV:%.*]] = sext i8 [[TMP2]] to i32
1731 // CHECK3-NEXT: [[SUB:%.*]] = sub i32 10, [[CONV]]
1732 // CHECK3-NEXT: [[SUB2:%.*]] = sub i32 [[SUB]], 1
1733 // CHECK3-NEXT: [[ADD:%.*]] = add i32 [[SUB2]], 1
1734 // CHECK3-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
1735 // CHECK3-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
1736 // CHECK3-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1737 // CHECK3-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
1738 // CHECK3-NEXT: store i8 [[TMP3]], ptr [[I]], align 1
1739 // CHECK3-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
1740 // CHECK3-NEXT: [[CONV4:%.*]] = sext i8 [[TMP4]] to i32
1741 // CHECK3-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV4]], 10
1742 // CHECK3-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1743 // CHECK3: omp.precond.then:
1744 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1745 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1746 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
1747 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1748 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1749 // CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1750 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1751 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1752 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1753 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1754 // CHECK3-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1755 // CHECK3-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1756 // CHECK3: cond.true:
1757 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1758 // CHECK3-NEXT: br label [[COND_END:%.*]]
1759 // CHECK3: cond.false:
1760 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1761 // CHECK3-NEXT: br label [[COND_END]]
1762 // CHECK3: cond.end:
1763 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1764 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1765 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1766 // CHECK3-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
1767 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1768 // CHECK3: omp.inner.for.cond:
1769 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1770 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1771 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1772 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1773 // CHECK3: omp.inner.for.body:
1774 // CHECK3-NEXT: [[TMP15:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
1775 // CHECK3-NEXT: [[CONV8:%.*]] = sext i8 [[TMP15]] to i32
1776 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1777 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
1778 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], [[MUL]]
1779 // CHECK3-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i8
1780 // CHECK3-NEXT: store i8 [[CONV10]], ptr [[I5]], align 1
1781 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1782 // CHECK3: omp.body.continue:
1783 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1784 // CHECK3: omp.inner.for.inc:
1785 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1786 // CHECK3-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP17]], 1
1787 // CHECK3-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
1788 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
1789 // CHECK3: omp.inner.for.end:
1790 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1791 // CHECK3: omp.loop.exit:
1792 // CHECK3-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1793 // CHECK3-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
1794 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])
1795 // CHECK3-NEXT: br label [[OMP_PRECOND_END]]
1796 // CHECK3: omp.precond.end:
1797 // CHECK3-NEXT: ret void
1798 //
1799 //
1800 // CHECK3-LABEL: define {{[^@]+}}@_Z4fintv
1801 // CHECK3-SAME: () #[[ATTR0]] {
1802 // CHECK3-NEXT: entry:
1803 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_Z9ftemplateIiET_v()
1804 // CHECK3-NEXT: ret i32 [[CALL]]
1805 //
1806 //
1807 // CHECK3-LABEL: define {{[^@]+}}@_Z9ftemplateIiET_v
1808 // CHECK3-SAME: () #[[ATTR0]] comdat {
1809 // CHECK3-NEXT: entry:
1810 // CHECK3-NEXT: [[AA:%.*]] = alloca i16, align 2
1811 // CHECK3-NEXT: [[AA_CASTED:%.*]] = alloca i32, align 4
1812 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
1813 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
1814 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
1815 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1816 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1817 // CHECK3-NEXT: store i16 0, ptr [[AA]], align 2
1818 // CHECK3-NEXT: [[TMP0:%.*]] = load i16, ptr [[AA]], align 2
1819 // CHECK3-NEXT: store i16 [[TMP0]], ptr [[AA_CASTED]], align 2
1820 // CHECK3-NEXT: [[TMP1:%.*]] = load i32, ptr [[AA_CASTED]], align 4
1821 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1822 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP2]], align 4
1823 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1824 // CHECK3-NEXT: store i32 [[TMP1]], ptr [[TMP3]], align 4
1825 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1826 // CHECK3-NEXT: store ptr null, ptr [[TMP4]], align 4
1827 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1828 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1829 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1830 // CHECK3-NEXT: store i32 2, ptr [[TMP7]], align 4
1831 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1832 // CHECK3-NEXT: store i32 1, ptr [[TMP8]], align 4
1833 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1834 // CHECK3-NEXT: store ptr [[TMP5]], ptr [[TMP9]], align 4
1835 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1836 // CHECK3-NEXT: store ptr [[TMP6]], ptr [[TMP10]], align 4
1837 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1838 // CHECK3-NEXT: store ptr @.offload_sizes.7, ptr [[TMP11]], align 4
1839 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1840 // CHECK3-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP12]], align 4
1841 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1842 // CHECK3-NEXT: store ptr null, ptr [[TMP13]], align 4
1843 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1844 // CHECK3-NEXT: store ptr null, ptr [[TMP14]], align 4
1845 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1846 // CHECK3-NEXT: store i64 100, ptr [[TMP15]], align 8
1847 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1848 // CHECK3-NEXT: store i64 0, ptr [[TMP16]], align 8
1849 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1850 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP17]], align 4
1851 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1852 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP18]], align 4
1853 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1854 // CHECK3-NEXT: store i32 0, ptr [[TMP19]], align 4
1855 // CHECK3-NEXT: [[TMP20:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108.region_id, ptr [[KERNEL_ARGS]])
1856 // CHECK3-NEXT: [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
1857 // CHECK3-NEXT: br i1 [[TMP21]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1858 // CHECK3: omp_offload.failed:
1859 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108(i32 [[TMP1]]) #[[ATTR2]]
1860 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
1861 // CHECK3: omp_offload.cont:
1862 // CHECK3-NEXT: ret i32 0
1863 //
1864 //
1865 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108
1866 // CHECK3-SAME: (i32 noundef [[AA:%.*]]) #[[ATTR1]] {
1867 // CHECK3-NEXT: entry:
1868 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
1869 // CHECK3-NEXT: store i32 [[AA]], ptr [[AA_ADDR]], align 4
1870 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108.omp_outlined, ptr [[AA_ADDR]])
1871 // CHECK3-NEXT: ret void
1872 //
1873 //
1874 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108.omp_outlined
1875 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR1]] {
1876 // CHECK3-NEXT: entry:
1877 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1878 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1879 // CHECK3-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 4
1880 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1881 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
1882 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1883 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1884 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1885 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1886 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
1887 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1888 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1889 // CHECK3-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 4
1890 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 4
1891 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1892 // CHECK3-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
1893 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1894 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1895 // CHECK3-NEXT: [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 2
1896 // CHECK3-NEXT: [[CONV:%.*]] = sext i16 [[TMP1]] to i32
1897 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1898 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1899 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])
1900 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1901 // CHECK3: omp.dispatch.cond:
1902 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1903 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
1904 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1905 // CHECK3: cond.true:
1906 // CHECK3-NEXT: br label [[COND_END:%.*]]
1907 // CHECK3: cond.false:
1908 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1909 // CHECK3-NEXT: br label [[COND_END]]
1910 // CHECK3: cond.end:
1911 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1912 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1913 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1914 // CHECK3-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1915 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1916 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1917 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1918 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1919 // CHECK3: omp.dispatch.body:
1920 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1921 // CHECK3: omp.inner.for.cond:
1922 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
1923 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
1924 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1925 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1926 // CHECK3: omp.inner.for.body:
1927 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1928 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1929 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1930 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
1931 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1932 // CHECK3: omp.body.continue:
1933 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1934 // CHECK3: omp.inner.for.inc:
1935 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1936 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1937 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1938 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1939 // CHECK3: omp.inner.for.end:
1940 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1941 // CHECK3: omp.dispatch.inc:
1942 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1943 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1944 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1945 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
1946 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1947 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1948 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1949 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
1950 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
1951 // CHECK3: omp.dispatch.end:
1952 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
1953 // CHECK3-NEXT: ret void
1954 //
1955 //
1956 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1957 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
1958 // CHECK3-NEXT: entry:
1959 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
1960 // CHECK3-NEXT: ret void
1961 //
1962 //
1963 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56
1964 // CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {
1965 // CHECK17-NEXT: entry:
1966 // CHECK17-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
1967 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1968 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
1969 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
1970 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
1971 // CHECK17-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
1972 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1973 // CHECK17-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
1974 // CHECK17-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
1975 // CHECK17-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
1976 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
1977 // CHECK17-NEXT: ret void
1978 //
1979 //
1980 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56.omp_outlined
1981 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] {
1982 // CHECK17-NEXT: entry:
1983 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1984 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1985 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1986 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
1987 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
1988 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
1989 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1990 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
1991 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1992 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1993 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1994 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1995 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
1996 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1997 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1998 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1999 // CHECK17-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
2000 // CHECK17-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
2001 // CHECK17-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
2002 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2003 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
2004 // CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8
2005 // CHECK17-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8
2006 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2007 // CHECK17-NEXT: store i32 4571423, ptr [[DOTOMP_UB]], align 4
2008 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2009 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2010 // CHECK17-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2011 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
2012 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2013 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2014 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 4571423
2015 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2016 // CHECK17: cond.true:
2017 // CHECK17-NEXT: br label [[COND_END:%.*]]
2018 // CHECK17: cond.false:
2019 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2020 // CHECK17-NEXT: br label [[COND_END]]
2021 // CHECK17: cond.end:
2022 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
2023 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2024 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2025 // CHECK17-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
2026 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2027 // CHECK17: omp.inner.for.cond:
2028 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2029 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2030 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2031 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2032 // CHECK17: omp.inner.for.body:
2033 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2034 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 7
2035 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 33, [[MUL]]
2036 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4
2037 // CHECK17-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 8
2038 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
2039 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
2040 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDXPROM]]
2041 // CHECK17-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4
2042 // CHECK17-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 8
2043 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
2044 // CHECK17-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP16]] to i64
2045 // CHECK17-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i64 [[IDXPROM2]]
2046 // CHECK17-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDX3]], align 4
2047 // CHECK17-NEXT: [[MUL4:%.*]] = fmul float [[TMP14]], [[TMP17]]
2048 // CHECK17-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 8
2049 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4
2050 // CHECK17-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
2051 // CHECK17-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i64 [[IDXPROM5]]
2052 // CHECK17-NEXT: [[TMP20:%.*]] = load float, ptr [[ARRAYIDX6]], align 4
2053 // CHECK17-NEXT: [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP20]]
2054 // CHECK17-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 8
2055 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[I]], align 4
2056 // CHECK17-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP22]] to i64
2057 // CHECK17-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i64 [[IDXPROM8]]
2058 // CHECK17-NEXT: store float [[MUL7]], ptr [[ARRAYIDX9]], align 4
2059 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2060 // CHECK17: omp.body.continue:
2061 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2062 // CHECK17: omp.inner.for.inc:
2063 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2064 // CHECK17-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], 1
2065 // CHECK17-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
2066 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
2067 // CHECK17: omp.inner.for.end:
2068 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2069 // CHECK17: omp.loop.exit:
2070 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
2071 // CHECK17-NEXT: ret void
2072 //
2073 //
2074 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68
2075 // CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {
2076 // CHECK17-NEXT: entry:
2077 // CHECK17-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2078 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
2079 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
2080 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
2081 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
2082 // CHECK17-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2083 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
2084 // CHECK17-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
2085 // CHECK17-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
2086 // CHECK17-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
2087 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
2088 // CHECK17-NEXT: ret void
2089 //
2090 //
2091 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68.omp_outlined
2092 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] {
2093 // CHECK17-NEXT: entry:
2094 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2095 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2096 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
2097 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
2098 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
2099 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
2100 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2101 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
2102 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2103 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2104 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2105 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2106 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
2107 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2108 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2109 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
2110 // CHECK17-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
2111 // CHECK17-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
2112 // CHECK17-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
2113 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2114 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
2115 // CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8
2116 // CHECK17-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8
2117 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2118 // CHECK17-NEXT: store i32 4571423, ptr [[DOTOMP_UB]], align 4
2119 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2120 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2121 // CHECK17-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2122 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
2123 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2124 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2125 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 4571423
2126 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2127 // CHECK17: cond.true:
2128 // CHECK17-NEXT: br label [[COND_END:%.*]]
2129 // CHECK17: cond.false:
2130 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2131 // CHECK17-NEXT: br label [[COND_END]]
2132 // CHECK17: cond.end:
2133 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
2134 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2135 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2136 // CHECK17-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
2137 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2138 // CHECK17: omp.inner.for.cond:
2139 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2140 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2141 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2142 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2143 // CHECK17: omp.inner.for.body:
2144 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2145 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 7
2146 // CHECK17-NEXT: [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]
2147 // CHECK17-NEXT: store i32 [[SUB]], ptr [[I]], align 4
2148 // CHECK17-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 8
2149 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
2150 // CHECK17-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
2151 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDXPROM]]
2152 // CHECK17-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4
2153 // CHECK17-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 8
2154 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
2155 // CHECK17-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP16]] to i64
2156 // CHECK17-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i64 [[IDXPROM2]]
2157 // CHECK17-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDX3]], align 4
2158 // CHECK17-NEXT: [[MUL4:%.*]] = fmul float [[TMP14]], [[TMP17]]
2159 // CHECK17-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 8
2160 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4
2161 // CHECK17-NEXT: [[IDXPROM5:%.*]] = sext i32 [[TMP19]] to i64
2162 // CHECK17-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i64 [[IDXPROM5]]
2163 // CHECK17-NEXT: [[TMP20:%.*]] = load float, ptr [[ARRAYIDX6]], align 4
2164 // CHECK17-NEXT: [[MUL7:%.*]] = fmul float [[MUL4]], [[TMP20]]
2165 // CHECK17-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 8
2166 // CHECK17-NEXT: [[TMP22:%.*]] = load i32, ptr [[I]], align 4
2167 // CHECK17-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP22]] to i64
2168 // CHECK17-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i64 [[IDXPROM8]]
2169 // CHECK17-NEXT: store float [[MUL7]], ptr [[ARRAYIDX9]], align 4
2170 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2171 // CHECK17: omp.body.continue:
2172 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2173 // CHECK17: omp.inner.for.inc:
2174 // CHECK17-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2175 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1
2176 // CHECK17-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2177 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
2178 // CHECK17: omp.inner.for.end:
2179 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2180 // CHECK17: omp.loop.exit:
2181 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
2182 // CHECK17-NEXT: ret void
2183 //
2184 //
2185 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80
2186 // CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {
2187 // CHECK17-NEXT: entry:
2188 // CHECK17-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2189 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
2190 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
2191 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
2192 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
2193 // CHECK17-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2194 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
2195 // CHECK17-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
2196 // CHECK17-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
2197 // CHECK17-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
2198 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
2199 // CHECK17-NEXT: ret void
2200 //
2201 //
2202 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80.omp_outlined
2203 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[B:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[D:%.*]]) #[[ATTR0]] {
2204 // CHECK17-NEXT: entry:
2205 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2206 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2207 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
2208 // CHECK17-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
2209 // CHECK17-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
2210 // CHECK17-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
2211 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2212 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
2213 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2214 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2215 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2216 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2217 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
2218 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2219 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2220 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
2221 // CHECK17-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
2222 // CHECK17-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
2223 // CHECK17-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
2224 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2225 // CHECK17-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 8
2226 // CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 8
2227 // CHECK17-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 8
2228 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2229 // CHECK17-NEXT: store i32 16908288, ptr [[DOTOMP_UB]], align 4
2230 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2231 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2232 // CHECK17-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2233 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
2234 // CHECK17-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)
2235 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2236 // CHECK17: omp.dispatch.cond:
2237 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2238 // CHECK17-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 16908288
2239 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2240 // CHECK17: cond.true:
2241 // CHECK17-NEXT: br label [[COND_END:%.*]]
2242 // CHECK17: cond.false:
2243 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2244 // CHECK17-NEXT: br label [[COND_END]]
2245 // CHECK17: cond.end:
2246 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
2247 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2248 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2249 // CHECK17-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
2250 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2251 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2252 // CHECK17-NEXT: [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]
2253 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2254 // CHECK17: omp.dispatch.body:
2255 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2256 // CHECK17: omp.inner.for.cond:
2257 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
2258 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
2259 // CHECK17-NEXT: [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]
2260 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2261 // CHECK17: omp.inner.for.body:
2262 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
2263 // CHECK17-NEXT: [[MUL:%.*]] = mul i32 [[TMP13]], 127
2264 // CHECK17-NEXT: [[ADD:%.*]] = add i32 131071, [[MUL]]
2265 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
2266 // CHECK17-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 8, !llvm.access.group [[ACC_GRP11]]
2267 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
2268 // CHECK17-NEXT: [[IDXPROM:%.*]] = zext i32 [[TMP15]] to i64
2269 // CHECK17-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP14]], i64 [[IDXPROM]]
2270 // CHECK17-NEXT: [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]
2271 // CHECK17-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 8, !llvm.access.group [[ACC_GRP11]]
2272 // CHECK17-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
2273 // CHECK17-NEXT: [[IDXPROM3:%.*]] = zext i32 [[TMP18]] to i64
2274 // CHECK17-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP17]], i64 [[IDXPROM3]]
2275 // CHECK17-NEXT: [[TMP19:%.*]] = load float, ptr [[ARRAYIDX4]], align 4, !llvm.access.group [[ACC_GRP11]]
2276 // CHECK17-NEXT: [[MUL5:%.*]] = fmul float [[TMP16]], [[TMP19]]
2277 // CHECK17-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 8, !llvm.access.group [[ACC_GRP11]]
2278 // CHECK17-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
2279 // CHECK17-NEXT: [[IDXPROM6:%.*]] = zext i32 [[TMP21]] to i64
2280 // CHECK17-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds float, ptr [[TMP20]], i64 [[IDXPROM6]]
2281 // CHECK17-NEXT: [[TMP22:%.*]] = load float, ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP11]]
2282 // CHECK17-NEXT: [[MUL8:%.*]] = fmul float [[MUL5]], [[TMP22]]
2283 // CHECK17-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 8, !llvm.access.group [[ACC_GRP11]]
2284 // CHECK17-NEXT: [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
2285 // CHECK17-NEXT: [[IDXPROM9:%.*]] = zext i32 [[TMP24]] to i64
2286 // CHECK17-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds float, ptr [[TMP23]], i64 [[IDXPROM9]]
2287 // CHECK17-NEXT: store float [[MUL8]], ptr [[ARRAYIDX10]], align 4, !llvm.access.group [[ACC_GRP11]]
2288 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2289 // CHECK17: omp.body.continue:
2290 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2291 // CHECK17: omp.inner.for.inc:
2292 // CHECK17-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
2293 // CHECK17-NEXT: [[ADD11:%.*]] = add i32 [[TMP25]], 1
2294 // CHECK17-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
2295 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2296 // CHECK17: omp.inner.for.end:
2297 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2298 // CHECK17: omp.dispatch.inc:
2299 // CHECK17-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2300 // CHECK17-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2301 // CHECK17-NEXT: [[ADD12:%.*]] = add i32 [[TMP26]], [[TMP27]]
2302 // CHECK17-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_LB]], align 4
2303 // CHECK17-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2304 // CHECK17-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2305 // CHECK17-NEXT: [[ADD13:%.*]] = add i32 [[TMP28]], [[TMP29]]
2306 // CHECK17-NEXT: store i32 [[ADD13]], ptr [[DOTOMP_UB]], align 4
2307 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
2308 // CHECK17: omp.dispatch.end:
2309 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
2310 // CHECK17-NEXT: ret void
2311 //
2312 //
2313 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92
2314 // CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[A:%.*]]) #[[ATTR0]] {
2315 // CHECK17-NEXT: entry:
2316 // CHECK17-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2317 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca i64, align 8
2318 // CHECK17-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2319 // CHECK17-NEXT: store i64 [[A]], ptr [[A_ADDR]], align 8
2320 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92.omp_outlined, ptr [[A_ADDR]])
2321 // CHECK17-NEXT: ret void
2322 //
2323 //
2324 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92.omp_outlined
2325 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] {
2326 // CHECK17-NEXT: entry:
2327 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2328 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2329 // CHECK17-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
2330 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2331 // CHECK17-NEXT: [[TMP:%.*]] = alloca i8, align 1
2332 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2333 // CHECK17-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2334 // CHECK17-NEXT: [[I:%.*]] = alloca i8, align 1
2335 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2336 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2337 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2338 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2339 // CHECK17-NEXT: [[I5:%.*]] = alloca i8, align 1
2340 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2341 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2342 // CHECK17-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
2343 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2344 // CHECK17-NEXT: [[TMP1:%.*]] = load i8, ptr [[TMP0]], align 1
2345 // CHECK17-NEXT: store i8 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 1
2346 // CHECK17-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2347 // CHECK17-NEXT: [[CONV:%.*]] = sext i8 [[TMP2]] to i32
2348 // CHECK17-NEXT: [[SUB:%.*]] = sub i32 10, [[CONV]]
2349 // CHECK17-NEXT: [[SUB2:%.*]] = sub i32 [[SUB]], 1
2350 // CHECK17-NEXT: [[ADD:%.*]] = add i32 [[SUB2]], 1
2351 // CHECK17-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
2352 // CHECK17-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
2353 // CHECK17-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2354 // CHECK17-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2355 // CHECK17-NEXT: store i8 [[TMP3]], ptr [[I]], align 1
2356 // CHECK17-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2357 // CHECK17-NEXT: [[CONV4:%.*]] = sext i8 [[TMP4]] to i32
2358 // CHECK17-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV4]], 10
2359 // CHECK17-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2360 // CHECK17: omp.precond.then:
2361 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2362 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2363 // CHECK17-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
2364 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2365 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2366 // CHECK17-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2367 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
2368 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2369 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2370 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2371 // CHECK17-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2372 // CHECK17-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2373 // CHECK17: cond.true:
2374 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2375 // CHECK17-NEXT: br label [[COND_END:%.*]]
2376 // CHECK17: cond.false:
2377 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2378 // CHECK17-NEXT: br label [[COND_END]]
2379 // CHECK17: cond.end:
2380 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2381 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2382 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2383 // CHECK17-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
2384 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2385 // CHECK17: omp.inner.for.cond:
2386 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2387 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2388 // CHECK17-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2389 // CHECK17-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2390 // CHECK17: omp.inner.for.body:
2391 // CHECK17-NEXT: [[TMP15:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2392 // CHECK17-NEXT: [[CONV8:%.*]] = sext i8 [[TMP15]] to i32
2393 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2394 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2395 // CHECK17-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], [[MUL]]
2396 // CHECK17-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i8
2397 // CHECK17-NEXT: store i8 [[CONV10]], ptr [[I5]], align 1
2398 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2399 // CHECK17: omp.body.continue:
2400 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2401 // CHECK17: omp.inner.for.inc:
2402 // CHECK17-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2403 // CHECK17-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP17]], 1
2404 // CHECK17-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
2405 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]]
2406 // CHECK17: omp.inner.for.end:
2407 // CHECK17-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2408 // CHECK17: omp.loop.exit:
2409 // CHECK17-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2410 // CHECK17-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
2411 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])
2412 // CHECK17-NEXT: br label [[OMP_PRECOND_END]]
2413 // CHECK17: omp.precond.end:
2414 // CHECK17-NEXT: ret void
2415 //
2416 //
2417 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108
2418 // CHECK17-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i64 noundef [[AA:%.*]]) #[[ATTR0]] {
2419 // CHECK17-NEXT: entry:
2420 // CHECK17-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
2421 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca i64, align 8
2422 // CHECK17-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
2423 // CHECK17-NEXT: store i64 [[AA]], ptr [[AA_ADDR]], align 8
2424 // CHECK17-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108.omp_outlined, ptr [[AA_ADDR]])
2425 // CHECK17-NEXT: ret void
2426 //
2427 //
2428 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108.omp_outlined
2429 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] {
2430 // CHECK17-NEXT: entry:
2431 // CHECK17-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2432 // CHECK17-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2433 // CHECK17-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 8
2434 // CHECK17-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2435 // CHECK17-NEXT: [[TMP:%.*]] = alloca i32, align 4
2436 // CHECK17-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2437 // CHECK17-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2438 // CHECK17-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2439 // CHECK17-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2440 // CHECK17-NEXT: [[I:%.*]] = alloca i32, align 4
2441 // CHECK17-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2442 // CHECK17-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2443 // CHECK17-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 8
2444 // CHECK17-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 8
2445 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2446 // CHECK17-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
2447 // CHECK17-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2448 // CHECK17-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2449 // CHECK17-NEXT: [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 2
2450 // CHECK17-NEXT: [[CONV:%.*]] = sext i16 [[TMP1]] to i32
2451 // CHECK17-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2452 // CHECK17-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2453 // CHECK17-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])
2454 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2455 // CHECK17: omp.dispatch.cond:
2456 // CHECK17-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2457 // CHECK17-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2458 // CHECK17-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2459 // CHECK17: cond.true:
2460 // CHECK17-NEXT: br label [[COND_END:%.*]]
2461 // CHECK17: cond.false:
2462 // CHECK17-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2463 // CHECK17-NEXT: br label [[COND_END]]
2464 // CHECK17: cond.end:
2465 // CHECK17-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
2466 // CHECK17-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2467 // CHECK17-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2468 // CHECK17-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
2469 // CHECK17-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2470 // CHECK17-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2471 // CHECK17-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
2472 // CHECK17-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2473 // CHECK17: omp.dispatch.body:
2474 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2475 // CHECK17: omp.inner.for.cond:
2476 // CHECK17-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
2477 // CHECK17-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
2478 // CHECK17-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2479 // CHECK17-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2480 // CHECK17: omp.inner.for.body:
2481 // CHECK17-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
2482 // CHECK17-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2483 // CHECK17-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2484 // CHECK17-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
2485 // CHECK17-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2486 // CHECK17: omp.body.continue:
2487 // CHECK17-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2488 // CHECK17: omp.inner.for.inc:
2489 // CHECK17-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
2490 // CHECK17-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2491 // CHECK17-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
2492 // CHECK17-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
2493 // CHECK17: omp.inner.for.end:
2494 // CHECK17-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2495 // CHECK17: omp.dispatch.inc:
2496 // CHECK17-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2497 // CHECK17-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2498 // CHECK17-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
2499 // CHECK17-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
2500 // CHECK17-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2501 // CHECK17-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2502 // CHECK17-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
2503 // CHECK17-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
2504 // CHECK17-NEXT: br label [[OMP_DISPATCH_COND]]
2505 // CHECK17: omp.dispatch.end:
2506 // CHECK17-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
2507 // CHECK17-NEXT: ret void
2508 //
2509 //
2510 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56
2511 // CHECK19-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {
2512 // CHECK19-NEXT: entry:
2513 // CHECK19-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
2514 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2515 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
2516 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
2517 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
2518 // CHECK19-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
2519 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2520 // CHECK19-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
2521 // CHECK19-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
2522 // CHECK19-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
2523 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
2524 // CHECK19-NEXT: ret void
2525 //
2526 //
2527 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z23without_schedule_clausePfS_S_S__l56.omp_outlined
2528 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {
2529 // CHECK19-NEXT: entry:
2530 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2531 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2532 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2533 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
2534 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
2535 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
2536 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2537 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
2538 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2539 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2540 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2541 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2542 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
2543 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2544 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2545 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2546 // CHECK19-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
2547 // CHECK19-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
2548 // CHECK19-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
2549 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2550 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
2551 // CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 4
2552 // CHECK19-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 4
2553 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2554 // CHECK19-NEXT: store i32 4571423, ptr [[DOTOMP_UB]], align 4
2555 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2556 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2557 // CHECK19-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2558 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
2559 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2560 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2561 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 4571423
2562 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2563 // CHECK19: cond.true:
2564 // CHECK19-NEXT: br label [[COND_END:%.*]]
2565 // CHECK19: cond.false:
2566 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2567 // CHECK19-NEXT: br label [[COND_END]]
2568 // CHECK19: cond.end:
2569 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
2570 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2571 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2572 // CHECK19-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
2573 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2574 // CHECK19: omp.inner.for.cond:
2575 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2576 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2577 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2578 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2579 // CHECK19: omp.inner.for.body:
2580 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2581 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 7
2582 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 33, [[MUL]]
2583 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4
2584 // CHECK19-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 4
2585 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
2586 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i32 [[TMP13]]
2587 // CHECK19-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4
2588 // CHECK19-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 4
2589 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
2590 // CHECK19-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i32 [[TMP16]]
2591 // CHECK19-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDX2]], align 4
2592 // CHECK19-NEXT: [[MUL3:%.*]] = fmul float [[TMP14]], [[TMP17]]
2593 // CHECK19-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 4
2594 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4
2595 // CHECK19-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i32 [[TMP19]]
2596 // CHECK19-NEXT: [[TMP20:%.*]] = load float, ptr [[ARRAYIDX4]], align 4
2597 // CHECK19-NEXT: [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP20]]
2598 // CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 4
2599 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[I]], align 4
2600 // CHECK19-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i32 [[TMP22]]
2601 // CHECK19-NEXT: store float [[MUL5]], ptr [[ARRAYIDX6]], align 4
2602 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2603 // CHECK19: omp.body.continue:
2604 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2605 // CHECK19: omp.inner.for.inc:
2606 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2607 // CHECK19-NEXT: [[ADD7:%.*]] = add nsw i32 [[TMP23]], 1
2608 // CHECK19-NEXT: store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
2609 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
2610 // CHECK19: omp.inner.for.end:
2611 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2612 // CHECK19: omp.loop.exit:
2613 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
2614 // CHECK19-NEXT: ret void
2615 //
2616 //
2617 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68
2618 // CHECK19-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {
2619 // CHECK19-NEXT: entry:
2620 // CHECK19-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
2621 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2622 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
2623 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
2624 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
2625 // CHECK19-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
2626 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2627 // CHECK19-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
2628 // CHECK19-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
2629 // CHECK19-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
2630 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
2631 // CHECK19-NEXT: ret void
2632 //
2633 //
2634 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z18static_not_chunkedPfS_S_S__l68.omp_outlined
2635 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {
2636 // CHECK19-NEXT: entry:
2637 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2638 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2639 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2640 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
2641 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
2642 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
2643 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2644 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
2645 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2646 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2647 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2648 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2649 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
2650 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2651 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2652 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2653 // CHECK19-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
2654 // CHECK19-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
2655 // CHECK19-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
2656 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2657 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
2658 // CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 4
2659 // CHECK19-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 4
2660 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2661 // CHECK19-NEXT: store i32 4571423, ptr [[DOTOMP_UB]], align 4
2662 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2663 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2664 // CHECK19-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2665 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
2666 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2667 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2668 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 4571423
2669 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2670 // CHECK19: cond.true:
2671 // CHECK19-NEXT: br label [[COND_END:%.*]]
2672 // CHECK19: cond.false:
2673 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2674 // CHECK19-NEXT: br label [[COND_END]]
2675 // CHECK19: cond.end:
2676 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 4571423, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
2677 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2678 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2679 // CHECK19-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
2680 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2681 // CHECK19: omp.inner.for.cond:
2682 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2683 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2684 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2685 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2686 // CHECK19: omp.inner.for.body:
2687 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2688 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 7
2689 // CHECK19-NEXT: [[SUB:%.*]] = sub nsw i32 32000000, [[MUL]]
2690 // CHECK19-NEXT: store i32 [[SUB]], ptr [[I]], align 4
2691 // CHECK19-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP1]], align 4
2692 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
2693 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i32 [[TMP13]]
2694 // CHECK19-NEXT: [[TMP14:%.*]] = load float, ptr [[ARRAYIDX]], align 4
2695 // CHECK19-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP2]], align 4
2696 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4
2697 // CHECK19-NEXT: [[ARRAYIDX2:%.*]] = getelementptr inbounds float, ptr [[TMP15]], i32 [[TMP16]]
2698 // CHECK19-NEXT: [[TMP17:%.*]] = load float, ptr [[ARRAYIDX2]], align 4
2699 // CHECK19-NEXT: [[MUL3:%.*]] = fmul float [[TMP14]], [[TMP17]]
2700 // CHECK19-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP3]], align 4
2701 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[I]], align 4
2702 // CHECK19-NEXT: [[ARRAYIDX4:%.*]] = getelementptr inbounds float, ptr [[TMP18]], i32 [[TMP19]]
2703 // CHECK19-NEXT: [[TMP20:%.*]] = load float, ptr [[ARRAYIDX4]], align 4
2704 // CHECK19-NEXT: [[MUL5:%.*]] = fmul float [[MUL3]], [[TMP20]]
2705 // CHECK19-NEXT: [[TMP21:%.*]] = load ptr, ptr [[TMP0]], align 4
2706 // CHECK19-NEXT: [[TMP22:%.*]] = load i32, ptr [[I]], align 4
2707 // CHECK19-NEXT: [[ARRAYIDX6:%.*]] = getelementptr inbounds float, ptr [[TMP21]], i32 [[TMP22]]
2708 // CHECK19-NEXT: store float [[MUL5]], ptr [[ARRAYIDX6]], align 4
2709 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2710 // CHECK19: omp.body.continue:
2711 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2712 // CHECK19: omp.inner.for.inc:
2713 // CHECK19-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2714 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP23]], 1
2715 // CHECK19-NEXT: store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2716 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
2717 // CHECK19: omp.inner.for.end:
2718 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2719 // CHECK19: omp.loop.exit:
2720 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
2721 // CHECK19-NEXT: ret void
2722 //
2723 //
2724 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80
2725 // CHECK19-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0]] {
2726 // CHECK19-NEXT: entry:
2727 // CHECK19-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
2728 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2729 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
2730 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
2731 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
2732 // CHECK19-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
2733 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2734 // CHECK19-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
2735 // CHECK19-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
2736 // CHECK19-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
2737 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80.omp_outlined, ptr [[A_ADDR]], ptr [[B_ADDR]], ptr [[C_ADDR]], ptr [[D_ADDR]])
2738 // CHECK19-NEXT: ret void
2739 //
2740 //
2741 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z14static_chunkedPfS_S_S__l80.omp_outlined
2742 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) #[[ATTR0]] {
2743 // CHECK19-NEXT: entry:
2744 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2745 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2746 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2747 // CHECK19-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 4
2748 // CHECK19-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 4
2749 // CHECK19-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 4
2750 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2751 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
2752 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2753 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2754 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2755 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2756 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
2757 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2758 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2759 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2760 // CHECK19-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 4
2761 // CHECK19-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 4
2762 // CHECK19-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 4
2763 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2764 // CHECK19-NEXT: [[TMP1:%.*]] = load ptr, ptr [[B_ADDR]], align 4
2765 // CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[C_ADDR]], align 4
2766 // CHECK19-NEXT: [[TMP3:%.*]] = load ptr, ptr [[D_ADDR]], align 4
2767 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2768 // CHECK19-NEXT: store i32 16908288, ptr [[DOTOMP_UB]], align 4
2769 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2770 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2771 // CHECK19-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2772 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
2773 // CHECK19-NEXT: call void @__kmpc_for_static_init_4u(ptr @[[GLOB1]], i32 [[TMP5]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 5)
2774 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2775 // CHECK19: omp.dispatch.cond:
2776 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2777 // CHECK19-NEXT: [[CMP:%.*]] = icmp ugt i32 [[TMP6]], 16908288
2778 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2779 // CHECK19: cond.true:
2780 // CHECK19-NEXT: br label [[COND_END:%.*]]
2781 // CHECK19: cond.false:
2782 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2783 // CHECK19-NEXT: br label [[COND_END]]
2784 // CHECK19: cond.end:
2785 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 16908288, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
2786 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2787 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2788 // CHECK19-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
2789 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2790 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2791 // CHECK19-NEXT: [[CMP1:%.*]] = icmp ule i32 [[TMP9]], [[TMP10]]
2792 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2793 // CHECK19: omp.dispatch.body:
2794 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2795 // CHECK19: omp.inner.for.cond:
2796 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
2797 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]
2798 // CHECK19-NEXT: [[CMP2:%.*]] = icmp ule i32 [[TMP11]], [[TMP12]]
2799 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2800 // CHECK19: omp.inner.for.body:
2801 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
2802 // CHECK19-NEXT: [[MUL:%.*]] = mul i32 [[TMP13]], 127
2803 // CHECK19-NEXT: [[ADD:%.*]] = add i32 131071, [[MUL]]
2804 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
2805 // CHECK19-NEXT: [[TMP14:%.*]] = load ptr, ptr [[TMP1]], align 4, !llvm.access.group [[ACC_GRP12]]
2806 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
2807 // CHECK19-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP14]], i32 [[TMP15]]
2808 // CHECK19-NEXT: [[TMP16:%.*]] = load float, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]
2809 // CHECK19-NEXT: [[TMP17:%.*]] = load ptr, ptr [[TMP2]], align 4, !llvm.access.group [[ACC_GRP12]]
2810 // CHECK19-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
2811 // CHECK19-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP17]], i32 [[TMP18]]
2812 // CHECK19-NEXT: [[TMP19:%.*]] = load float, ptr [[ARRAYIDX3]], align 4, !llvm.access.group [[ACC_GRP12]]
2813 // CHECK19-NEXT: [[MUL4:%.*]] = fmul float [[TMP16]], [[TMP19]]
2814 // CHECK19-NEXT: [[TMP20:%.*]] = load ptr, ptr [[TMP3]], align 4, !llvm.access.group [[ACC_GRP12]]
2815 // CHECK19-NEXT: [[TMP21:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
2816 // CHECK19-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP20]], i32 [[TMP21]]
2817 // CHECK19-NEXT: [[TMP22:%.*]] = load float, ptr [[ARRAYIDX5]], align 4, !llvm.access.group [[ACC_GRP12]]
2818 // CHECK19-NEXT: [[MUL6:%.*]] = fmul float [[MUL4]], [[TMP22]]
2819 // CHECK19-NEXT: [[TMP23:%.*]] = load ptr, ptr [[TMP0]], align 4, !llvm.access.group [[ACC_GRP12]]
2820 // CHECK19-NEXT: [[TMP24:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
2821 // CHECK19-NEXT: [[ARRAYIDX7:%.*]] = getelementptr inbounds float, ptr [[TMP23]], i32 [[TMP24]]
2822 // CHECK19-NEXT: store float [[MUL6]], ptr [[ARRAYIDX7]], align 4, !llvm.access.group [[ACC_GRP12]]
2823 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2824 // CHECK19: omp.body.continue:
2825 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2826 // CHECK19: omp.inner.for.inc:
2827 // CHECK19-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
2828 // CHECK19-NEXT: [[ADD8:%.*]] = add i32 [[TMP25]], 1
2829 // CHECK19-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
2830 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2831 // CHECK19: omp.inner.for.end:
2832 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2833 // CHECK19: omp.dispatch.inc:
2834 // CHECK19-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2835 // CHECK19-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2836 // CHECK19-NEXT: [[ADD9:%.*]] = add i32 [[TMP26]], [[TMP27]]
2837 // CHECK19-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 4
2838 // CHECK19-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2839 // CHECK19-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2840 // CHECK19-NEXT: [[ADD10:%.*]] = add i32 [[TMP28]], [[TMP29]]
2841 // CHECK19-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 4
2842 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
2843 // CHECK19: omp.dispatch.end:
2844 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
2845 // CHECK19-NEXT: ret void
2846 //
2847 //
2848 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92
2849 // CHECK19-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[A:%.*]]) #[[ATTR0]] {
2850 // CHECK19-NEXT: entry:
2851 // CHECK19-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
2852 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2853 // CHECK19-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
2854 // CHECK19-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
2855 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92.omp_outlined, ptr [[A_ADDR]])
2856 // CHECK19-NEXT: ret void
2857 //
2858 //
2859 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z12test_precondv_l92.omp_outlined
2860 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 1 dereferenceable(1) [[A:%.*]]) #[[ATTR0]] {
2861 // CHECK19-NEXT: entry:
2862 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2863 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2864 // CHECK19-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2865 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2866 // CHECK19-NEXT: [[TMP:%.*]] = alloca i8, align 1
2867 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i8, align 1
2868 // CHECK19-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2869 // CHECK19-NEXT: [[I:%.*]] = alloca i8, align 1
2870 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2871 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2872 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2873 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2874 // CHECK19-NEXT: [[I5:%.*]] = alloca i8, align 1
2875 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2876 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2877 // CHECK19-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2878 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2879 // CHECK19-NEXT: [[TMP1:%.*]] = load i8, ptr [[TMP0]], align 1
2880 // CHECK19-NEXT: store i8 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 1
2881 // CHECK19-NEXT: [[TMP2:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2882 // CHECK19-NEXT: [[CONV:%.*]] = sext i8 [[TMP2]] to i32
2883 // CHECK19-NEXT: [[SUB:%.*]] = sub i32 10, [[CONV]]
2884 // CHECK19-NEXT: [[SUB2:%.*]] = sub i32 [[SUB]], 1
2885 // CHECK19-NEXT: [[ADD:%.*]] = add i32 [[SUB2]], 1
2886 // CHECK19-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], 1
2887 // CHECK19-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
2888 // CHECK19-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2889 // CHECK19-NEXT: [[TMP3:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2890 // CHECK19-NEXT: store i8 [[TMP3]], ptr [[I]], align 1
2891 // CHECK19-NEXT: [[TMP4:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2892 // CHECK19-NEXT: [[CONV4:%.*]] = sext i8 [[TMP4]] to i32
2893 // CHECK19-NEXT: [[CMP:%.*]] = icmp slt i32 [[CONV4]], 10
2894 // CHECK19-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2895 // CHECK19: omp.precond.then:
2896 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2897 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2898 // CHECK19-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
2899 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2900 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2901 // CHECK19-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2902 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
2903 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2904 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2905 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2906 // CHECK19-NEXT: [[CMP6:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2907 // CHECK19-NEXT: br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2908 // CHECK19: cond.true:
2909 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2910 // CHECK19-NEXT: br label [[COND_END:%.*]]
2911 // CHECK19: cond.false:
2912 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2913 // CHECK19-NEXT: br label [[COND_END]]
2914 // CHECK19: cond.end:
2915 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2916 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2917 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2918 // CHECK19-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
2919 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2920 // CHECK19: omp.inner.for.cond:
2921 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2922 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2923 // CHECK19-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2924 // CHECK19-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2925 // CHECK19: omp.inner.for.body:
2926 // CHECK19-NEXT: [[TMP15:%.*]] = load i8, ptr [[DOTCAPTURE_EXPR_]], align 1
2927 // CHECK19-NEXT: [[CONV8:%.*]] = sext i8 [[TMP15]] to i32
2928 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2929 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP16]], 1
2930 // CHECK19-NEXT: [[ADD9:%.*]] = add nsw i32 [[CONV8]], [[MUL]]
2931 // CHECK19-NEXT: [[CONV10:%.*]] = trunc i32 [[ADD9]] to i8
2932 // CHECK19-NEXT: store i8 [[CONV10]], ptr [[I5]], align 1
2933 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2934 // CHECK19: omp.body.continue:
2935 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2936 // CHECK19: omp.inner.for.inc:
2937 // CHECK19-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2938 // CHECK19-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP17]], 1
2939 // CHECK19-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
2940 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]]
2941 // CHECK19: omp.inner.for.end:
2942 // CHECK19-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2943 // CHECK19: omp.loop.exit:
2944 // CHECK19-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2945 // CHECK19-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
2946 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])
2947 // CHECK19-NEXT: br label [[OMP_PRECOND_END]]
2948 // CHECK19: omp.precond.end:
2949 // CHECK19-NEXT: ret void
2950 //
2951 //
2952 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108
2953 // CHECK19-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], i32 noundef [[AA:%.*]]) #[[ATTR0]] {
2954 // CHECK19-NEXT: entry:
2955 // CHECK19-NEXT: [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
2956 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca i32, align 4
2957 // CHECK19-NEXT: store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
2958 // CHECK19-NEXT: store i32 [[AA]], ptr [[AA_ADDR]], align 4
2959 // CHECK19-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108.omp_outlined, ptr [[AA_ADDR]])
2960 // CHECK19-NEXT: ret void
2961 //
2962 //
2963 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIiET_v_l108.omp_outlined
2964 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 2 dereferenceable(2) [[AA:%.*]]) #[[ATTR0]] {
2965 // CHECK19-NEXT: entry:
2966 // CHECK19-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2967 // CHECK19-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2968 // CHECK19-NEXT: [[AA_ADDR:%.*]] = alloca ptr, align 4
2969 // CHECK19-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2970 // CHECK19-NEXT: [[TMP:%.*]] = alloca i32, align 4
2971 // CHECK19-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2972 // CHECK19-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2973 // CHECK19-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2974 // CHECK19-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2975 // CHECK19-NEXT: [[I:%.*]] = alloca i32, align 4
2976 // CHECK19-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2977 // CHECK19-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2978 // CHECK19-NEXT: store ptr [[AA]], ptr [[AA_ADDR]], align 4
2979 // CHECK19-NEXT: [[TMP0:%.*]] = load ptr, ptr [[AA_ADDR]], align 4
2980 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2981 // CHECK19-NEXT: store i32 99, ptr [[DOTOMP_UB]], align 4
2982 // CHECK19-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2983 // CHECK19-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2984 // CHECK19-NEXT: [[TMP1:%.*]] = load i16, ptr [[TMP0]], align 2
2985 // CHECK19-NEXT: [[CONV:%.*]] = sext i16 [[TMP1]] to i32
2986 // CHECK19-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2987 // CHECK19-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
2988 // CHECK19-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[CONV]])
2989 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2990 // CHECK19: omp.dispatch.cond:
2991 // CHECK19-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2992 // CHECK19-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 99
2993 // CHECK19-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2994 // CHECK19: cond.true:
2995 // CHECK19-NEXT: br label [[COND_END:%.*]]
2996 // CHECK19: cond.false:
2997 // CHECK19-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2998 // CHECK19-NEXT: br label [[COND_END]]
2999 // CHECK19: cond.end:
3000 // CHECK19-NEXT: [[COND:%.*]] = phi i32 [ 99, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
3001 // CHECK19-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3002 // CHECK19-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3003 // CHECK19-NEXT: store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
3004 // CHECK19-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3005 // CHECK19-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3006 // CHECK19-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
3007 // CHECK19-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3008 // CHECK19: omp.dispatch.body:
3009 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3010 // CHECK19: omp.inner.for.cond:
3011 // CHECK19-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
3012 // CHECK19-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
3013 // CHECK19-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3014 // CHECK19-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3015 // CHECK19: omp.inner.for.body:
3016 // CHECK19-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
3017 // CHECK19-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3018 // CHECK19-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3019 // CHECK19-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
3020 // CHECK19-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3021 // CHECK19: omp.body.continue:
3022 // CHECK19-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3023 // CHECK19: omp.inner.for.inc:
3024 // CHECK19-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
3025 // CHECK19-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
3026 // CHECK19-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
3027 // CHECK19-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
3028 // CHECK19: omp.inner.for.end:
3029 // CHECK19-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3030 // CHECK19: omp.dispatch.inc:
3031 // CHECK19-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3032 // CHECK19-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3033 // CHECK19-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3034 // CHECK19-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
3035 // CHECK19-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3036 // CHECK19-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3037 // CHECK19-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
3038 // CHECK19-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
3039 // CHECK19-NEXT: br label [[OMP_DISPATCH_COND]]
3040 // CHECK19: omp.dispatch.end:
3041 // CHECK19-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
3042 // CHECK19-NEXT: ret void
3043 //
LLVM monorepo