clang/test/OpenMP/distribute_parallel_for_firstprivate_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
   6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
   7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
   8
   9 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  11 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  12 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  14
  15 // RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8
  16 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  17 // RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK8
  18 // RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10
  19 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  20 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK10
  21
  22 // RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  23 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  24 // RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  25 // RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  26 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  27 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  28 // expected-no-diagnostics
  29 #ifndef HEADER
  30 #define HEADER
  31
  32 template <class T>
  33 struct S {
  34   T f;
  35   S(T a) : f(a) {}
  36   S() : f() {}
  37   operator T() { return T(); }
  38   ~S() {}
  39 };
  40
  41 template <typename T>
  42 T tmain() {
  43   S<T> test;
  44   T t_var = T();
  45   T vec[] = {1, 2};
  46   S<T> s_arr[] = {1, 2};
  47   S<T> &var = test;
  48   #pragma omp target
  49   #pragma omp teams
  50   #pragma omp distribute parallel for firstprivate(t_var, vec, s_arr, s_arr, var, var)
  51   for (int i = 0; i < 2; ++i) {
  52     vec[i] = t_var;
  53     s_arr[i] = var;
  54   }
  55   return T();
  56 }
  57
  58 int main() {
  59   static int svar;
  60   volatile double g;
  61   volatile double &g1 = g;
  62
  63   #ifdef LAMBDA
  64   [&]() {
  65     static float sfvar;
  66
  67     #pragma omp target
  68     #pragma omp teams
  69     #pragma omp distribute parallel for firstprivate(g, g1, svar, sfvar)
  70     for (int i = 0; i < 2; ++i) {
  71
  72       // addr alloca's
  73
  74       // private alloca's
  75
  76       // transfer input parameters into addr alloca's
  77
  78
  79       // init private alloca's with addr alloca's
  80       // g
  81
  82       // g1
  83
  84       // svar
  85
  86       // sfvar
  87
  88       // pass firstprivate parameters to parallel outlined function
  89       // g
  90
  91       // g1
  92
  93       // svar
  94
  95       // sfvar
  96
  97
  98
  99       // skip initial params
 100
 101       // addr alloca's
 102
 103       // private alloca's (only for 32-bit)
 104
 105       // transfer input parameters into addr alloca's
 106
 107       // prepare parameters for lambda
 108       // g
 109
 110       // g1
 111
 112       // svar
 113
 114       // sfvar
 115
 116       g = 1;
 117       g1 = 1;
 118       svar = 3;
 119       sfvar = 4.0;
 120
 121       // pass params to inner lambda
 122       [&]() {
 123         g = 2;
 124         g1 = 2;
 125         svar = 4;
 126         sfvar = 8.0;
 127
 128       }();
 129     }
 130   }();
 131   return 0;
 132   #else
 133   S<float> test;
 134   int t_var = 0;
 135   int vec[] = {1, 2};
 136   S<float> s_arr[] = {1, 2};
 137   S<float> &var = test;
 138
 139   #pragma omp target
 140   #pragma omp teams
 141   #pragma omp distribute parallel for firstprivate(t_var, vec, s_arr, s_arr, var, var, svar)
 142   for (int i = 0; i < 2; ++i) {
 143     vec[i] = t_var;
 144     s_arr[i] = var;
 145   }
 146   return tmain<int>();
 147   #endif
 148 }
 149
 150
 151
 152
 153 // addr alloca's
 154
 155 // skip loop alloca's
 156
 157 // private alloca's
 158
 159
 160 // init addr alloca's with input values
 161
 162 // init private alloca's with addr alloca's
 163 // t-var
 164
 165 // vec
 166
 167 // s_arr
 168
 169 // var
 170
 171 // svar
 172
 173 // pass private alloca's to fork
 174 // not dag to distinguish with S_VAR_CAST
 175
 176 // call destructors: var..
 177
 178 // ..and s_arr
 179
 180
 181 // By OpenMP specifications, 'firstprivate' applies to both distribute and parallel for.
 182 // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel'
 183 // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for'
 184 // in combination
 185
 186 // addr alloca's
 187
 188 // skip loop alloca's
 189
 190 // private alloca's
 191
 192
 193 // init addr alloca's with input values
 194
 195 // init private alloca's with addr alloca's
 196 // vec
 197
 198 // s_arr
 199
 200 // var
 201
 202
 203 // call destructors: var..
 204
 205 // ..and s_arr
 206
 207
 208 // template tmain with S_INT_TY
 209
 210
 211
 212 // addr alloca's
 213
 214 // skip loop alloca's
 215
 216 // private alloca's
 217
 218
 219 // init addr alloca's with input values
 220
 221 // init private alloca's with addr alloca's
 222 // t-var
 223
 224 // vec
 225
 226 // s_arr
 227
 228 // var
 229
 230 // pass private alloca's to fork
 231 // not dag to distinguish with S_VAR_CAST
 232
 233 // call destructors: var..
 234
 235 // ..and s_arr
 236
 237
 238 // By OpenMP specifications, 'firstprivate' applies to both distribute and parallel for.
 239 // However, the support for 'firstprivate' of 'parallel' is only used when 'parallel'
 240 // is found alone. Therefore we only have one 'firstprivate' support for 'parallel for'
 241 // in combination
 242
 243 // addr alloca's
 244
 245 // skip loop alloca's
 246
 247 // private alloca's
 248
 249
 250 // init addr alloca's with input values
 251
 252 // init private alloca's with addr alloca's
 253 // vec
 254
 255 // s_arr
 256
 257 // var
 258
 259
 260 // call destructors: var..
 261
 262 // ..and s_arr
 263
 264
 265 #endif
 266 // CHECK1-LABEL: define {{[^@]+}}@main
 267 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 268 // CHECK1-NEXT:  entry:
 269 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 270 // CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8
 271 // CHECK1-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 272 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
 273 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 274 // CHECK1-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 275 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
 276 // CHECK1-NEXT:    store ptr [[G]], ptr [[TMP0]], align 8
 277 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
 278 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8
 279 // CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 8
 280 // CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
 281 // CHECK1-NEXT:    ret i32 0
 282 //
 283 //
 284 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
 285 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
 286 // CHECK1-NEXT:  entry:
 287 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8
 288 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8
 289 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
 290 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8
 291 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 292 // CHECK1-NEXT:    store i64 [[G]], ptr [[G_ADDR]], align 8
 293 // CHECK1-NEXT:    store i64 [[G1]], ptr [[G1_ADDR]], align 8
 294 // CHECK1-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
 295 // CHECK1-NEXT:    store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
 296 // CHECK1-NEXT:    store ptr [[G1_ADDR]], ptr [[TMP]], align 8
 297 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8
 298 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])
 299 // CHECK1-NEXT:    ret void
 300 //
 301 //
 302 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
 303 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
 304 // CHECK1-NEXT:  entry:
 305 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 306 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 307 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 308 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 8
 309 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8
 310 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 8
 311 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 312 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
 313 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 314 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
 315 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 316 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 317 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 318 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 319 // CHECK1-NEXT:    [[G3:%.*]] = alloca double, align 8
 320 // CHECK1-NEXT:    [[G14:%.*]] = alloca double, align 8
 321 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8
 322 // CHECK1-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4
 323 // CHECK1-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4
 324 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 325 // CHECK1-NEXT:    [[G_CASTED:%.*]] = alloca i64, align 8
 326 // CHECK1-NEXT:    [[G1_CASTED:%.*]] = alloca i64, align 8
 327 // CHECK1-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
 328 // CHECK1-NEXT:    [[SFVAR_CASTED:%.*]] = alloca i64, align 8
 329 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 330 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 331 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 332 // CHECK1-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 8
 333 // CHECK1-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
 334 // CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
 335 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 336 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8
 337 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
 338 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8
 339 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
 340 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
 341 // CHECK1-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 8
 342 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 343 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 344 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 345 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 346 // CHECK1-NEXT:    [[TMP5:%.*]] = load double, ptr [[TMP0]], align 8
 347 // CHECK1-NEXT:    store double [[TMP5]], ptr [[G3]], align 8
 348 // CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 8
 349 // CHECK1-NEXT:    [[TMP7:%.*]] = load double, ptr [[TMP6]], align 8
 350 // CHECK1-NEXT:    store double [[TMP7]], ptr [[G14]], align 8
 351 // CHECK1-NEXT:    store ptr [[G14]], ptr [[_TMP5]], align 8
 352 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 4
 353 // CHECK1-NEXT:    store i32 [[TMP8]], ptr [[SVAR6]], align 4
 354 // CHECK1-NEXT:    [[TMP9:%.*]] = load float, ptr [[TMP3]], align 4
 355 // CHECK1-NEXT:    store float [[TMP9]], ptr [[SFVAR7]], align 4
 356 // CHECK1-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 357 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
 358 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 359 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 360 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
 361 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 362 // CHECK1:       cond.true:
 363 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 364 // CHECK1:       cond.false:
 365 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 366 // CHECK1-NEXT:    br label [[COND_END]]
 367 // CHECK1:       cond.end:
 368 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
 369 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 370 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 371 // CHECK1-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
 372 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 373 // CHECK1:       omp.inner.for.cond:
 374 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 375 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 376 // CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
 377 // CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 378 // CHECK1:       omp.inner.for.body:
 379 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 380 // CHECK1-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
 381 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 382 // CHECK1-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
 383 // CHECK1-NEXT:    [[TMP21:%.*]] = load double, ptr [[G3]], align 8
 384 // CHECK1-NEXT:    store double [[TMP21]], ptr [[G_CASTED]], align 8
 385 // CHECK1-NEXT:    [[TMP22:%.*]] = load i64, ptr [[G_CASTED]], align 8
 386 // CHECK1-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[_TMP5]], align 8
 387 // CHECK1-NEXT:    [[TMP24:%.*]] = load volatile double, ptr [[TMP23]], align 8
 388 // CHECK1-NEXT:    store double [[TMP24]], ptr [[G1_CASTED]], align 8
 389 // CHECK1-NEXT:    [[TMP25:%.*]] = load i64, ptr [[G1_CASTED]], align 8
 390 // CHECK1-NEXT:    [[TMP26:%.*]] = load i32, ptr [[SVAR6]], align 4
 391 // CHECK1-NEXT:    store i32 [[TMP26]], ptr [[SVAR_CASTED]], align 4
 392 // CHECK1-NEXT:    [[TMP27:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8
 393 // CHECK1-NEXT:    [[TMP28:%.*]] = load float, ptr [[SFVAR7]], align 4
 394 // CHECK1-NEXT:    store float [[TMP28]], ptr [[SFVAR_CASTED]], align 4
 395 // CHECK1-NEXT:    [[TMP29:%.*]] = load i64, ptr [[SFVAR_CASTED]], align 8
 396 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP22]], i64 [[TMP25]], i64 [[TMP27]], i64 [[TMP29]])
 397 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 398 // CHECK1:       omp.inner.for.inc:
 399 // CHECK1-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 400 // CHECK1-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 401 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP30]], [[TMP31]]
 402 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 403 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 404 // CHECK1:       omp.inner.for.end:
 405 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 406 // CHECK1:       omp.loop.exit:
 407 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP11]])
 408 // CHECK1-NEXT:    ret void
 409 //
 410 //
 411 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
 412 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] {
 413 // CHECK1-NEXT:  entry:
 414 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 415 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 416 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 417 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 418 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8
 419 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8
 420 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
 421 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8
 422 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 423 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 424 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 425 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 426 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 427 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 428 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 429 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 430 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
 431 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 432 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 433 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 434 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 435 // CHECK1-NEXT:    store i64 [[G]], ptr [[G_ADDR]], align 8
 436 // CHECK1-NEXT:    store i64 [[G1]], ptr [[G1_ADDR]], align 8
 437 // CHECK1-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
 438 // CHECK1-NEXT:    store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
 439 // CHECK1-NEXT:    store ptr [[G1_ADDR]], ptr [[TMP]], align 8
 440 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 441 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 442 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 443 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 444 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 445 // CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
 446 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 447 // CHECK1-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
 448 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 449 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 450 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 451 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 452 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 453 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 454 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
 455 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 456 // CHECK1:       cond.true:
 457 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 458 // CHECK1:       cond.false:
 459 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 460 // CHECK1-NEXT:    br label [[COND_END]]
 461 // CHECK1:       cond.end:
 462 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 463 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 464 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 465 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 466 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 467 // CHECK1:       omp.inner.for.cond:
 468 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 469 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 470 // CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 471 // CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 472 // CHECK1:       omp.inner.for.body:
 473 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 474 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 475 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 476 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 477 // CHECK1-NEXT:    store double 1.000000e+00, ptr [[G_ADDR]], align 8
 478 // CHECK1-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[TMP]], align 8
 479 // CHECK1-NEXT:    store volatile double 1.000000e+00, ptr [[TMP10]], align 8
 480 // CHECK1-NEXT:    store i32 3, ptr [[SVAR_ADDR]], align 4
 481 // CHECK1-NEXT:    store float 4.000000e+00, ptr [[SFVAR_ADDR]], align 4
 482 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
 483 // CHECK1-NEXT:    store ptr [[G_ADDR]], ptr [[TMP11]], align 8
 484 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
 485 // CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP]], align 8
 486 // CHECK1-NEXT:    store ptr [[TMP13]], ptr [[TMP12]], align 8
 487 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
 488 // CHECK1-NEXT:    store ptr [[SVAR_ADDR]], ptr [[TMP14]], align 8
 489 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
 490 // CHECK1-NEXT:    store ptr [[SFVAR_ADDR]], ptr [[TMP15]], align 8
 491 // CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
 492 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 493 // CHECK1:       omp.body.continue:
 494 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 495 // CHECK1:       omp.inner.for.inc:
 496 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 497 // CHECK1-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP16]], 1
 498 // CHECK1-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4
 499 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 500 // CHECK1:       omp.inner.for.end:
 501 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 502 // CHECK1:       omp.loop.exit:
 503 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
 504 // CHECK1-NEXT:    ret void
 505 //
 506 //
 507 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 508 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
 509 // CHECK1-NEXT:  entry:
 510 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
 511 // CHECK1-NEXT:    ret void
 512 //
 513 //
 514 // CHECK3-LABEL: define {{[^@]+}}@main
 515 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
 516 // CHECK3-NEXT:  entry:
 517 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 518 // CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8
 519 // CHECK3-NEXT:    [[G1:%.*]] = alloca ptr, align 4
 520 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
 521 // CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 522 // CHECK3-NEXT:    store ptr [[G]], ptr [[G1]], align 4
 523 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
 524 // CHECK3-NEXT:    store ptr [[G]], ptr [[TMP0]], align 4
 525 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
 526 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4
 527 // CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 4
 528 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
 529 // CHECK3-NEXT:    ret i32 0
 530 //
 531 //
 532 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67
 533 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
 534 // CHECK3-NEXT:  entry:
 535 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
 536 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4
 537 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
 538 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4
 539 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
 540 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
 541 // CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8
 542 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4
 543 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
 544 // CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4
 545 // CHECK3-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
 546 // CHECK3-NEXT:    store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
 547 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
 548 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
 549 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4
 550 // CHECK3-NEXT:    [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8
 551 // CHECK3-NEXT:    store double [[TMP2]], ptr [[G2]], align 8
 552 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
 553 // CHECK3-NEXT:    [[TMP4:%.*]] = load volatile double, ptr [[TMP3]], align 4
 554 // CHECK3-NEXT:    store double [[TMP4]], ptr [[G13]], align 8
 555 // CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4
 556 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4
 557 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])
 558 // CHECK3-NEXT:    ret void
 559 //
 560 //
 561 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined
 562 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
 563 // CHECK3-NEXT:  entry:
 564 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 565 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 566 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
 567 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4
 568 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4
 569 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 4
 570 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
 571 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
 572 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 573 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
 574 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 575 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 576 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 577 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 578 // CHECK3-NEXT:    [[G3:%.*]] = alloca double, align 8
 579 // CHECK3-NEXT:    [[G14:%.*]] = alloca double, align 8
 580 // CHECK3-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 4
 581 // CHECK3-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4
 582 // CHECK3-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4
 583 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 584 // CHECK3-NEXT:    [[G1_CASTED:%.*]] = alloca i32, align 4
 585 // CHECK3-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
 586 // CHECK3-NEXT:    [[SFVAR_CASTED:%.*]] = alloca i32, align 4
 587 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 588 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 589 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
 590 // CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4
 591 // CHECK3-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
 592 // CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
 593 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
 594 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
 595 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
 596 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4
 597 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4
 598 // CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
 599 // CHECK3-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 4
 600 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 601 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 602 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 603 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 604 // CHECK3-NEXT:    [[TMP5:%.*]] = load double, ptr [[TMP0]], align 8
 605 // CHECK3-NEXT:    store double [[TMP5]], ptr [[G3]], align 8
 606 // CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 4
 607 // CHECK3-NEXT:    [[TMP7:%.*]] = load double, ptr [[TMP6]], align 4
 608 // CHECK3-NEXT:    store double [[TMP7]], ptr [[G14]], align 8
 609 // CHECK3-NEXT:    store ptr [[G14]], ptr [[_TMP5]], align 4
 610 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP2]], align 4
 611 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[SVAR6]], align 4
 612 // CHECK3-NEXT:    [[TMP9:%.*]] = load float, ptr [[TMP3]], align 4
 613 // CHECK3-NEXT:    store float [[TMP9]], ptr [[SFVAR7]], align 4
 614 // CHECK3-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 615 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
 616 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 617 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 618 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
 619 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 620 // CHECK3:       cond.true:
 621 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 622 // CHECK3:       cond.false:
 623 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 624 // CHECK3-NEXT:    br label [[COND_END]]
 625 // CHECK3:       cond.end:
 626 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
 627 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 628 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 629 // CHECK3-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
 630 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 631 // CHECK3:       omp.inner.for.cond:
 632 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 633 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 634 // CHECK3-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
 635 // CHECK3-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 636 // CHECK3:       omp.inner.for.body:
 637 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 638 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 639 // CHECK3-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP5]], align 4
 640 // CHECK3-NEXT:    [[TMP20:%.*]] = load volatile double, ptr [[TMP19]], align 4
 641 // CHECK3-NEXT:    store double [[TMP20]], ptr [[G1_CASTED]], align 4
 642 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[G1_CASTED]], align 4
 643 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[SVAR6]], align 4
 644 // CHECK3-NEXT:    store i32 [[TMP22]], ptr [[SVAR_CASTED]], align 4
 645 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4
 646 // CHECK3-NEXT:    [[TMP24:%.*]] = load float, ptr [[SFVAR7]], align 4
 647 // CHECK3-NEXT:    store float [[TMP24]], ptr [[SFVAR_CASTED]], align 4
 648 // CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[SFVAR_CASTED]], align 4
 649 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[G3]], i32 [[TMP21]], i32 [[TMP23]], i32 [[TMP25]])
 650 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 651 // CHECK3:       omp.inner.for.inc:
 652 // CHECK3-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 653 // CHECK3-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 654 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
 655 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 656 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
 657 // CHECK3:       omp.inner.for.end:
 658 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 659 // CHECK3:       omp.loop.exit:
 660 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP11]])
 661 // CHECK3-NEXT:    ret void
 662 //
 663 //
 664 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l67.omp_outlined.omp_outlined
 665 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], i32 noundef [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] {
 666 // CHECK3-NEXT:  entry:
 667 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 668 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 669 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
 670 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
 671 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
 672 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca i32, align 4
 673 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
 674 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4
 675 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
 676 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 677 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 678 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 679 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 680 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 681 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 682 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
 683 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 684 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
 685 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 686 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 687 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 688 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 689 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
 690 // CHECK3-NEXT:    store i32 [[G1]], ptr [[G1_ADDR]], align 4
 691 // CHECK3-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
 692 // CHECK3-NEXT:    store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
 693 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
 694 // CHECK3-NEXT:    store ptr [[G1_ADDR]], ptr [[TMP]], align 4
 695 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 696 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 697 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 698 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 699 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
 700 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
 701 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 702 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 703 // CHECK3-NEXT:    [[TMP3:%.*]] = load double, ptr [[TMP0]], align 8
 704 // CHECK3-NEXT:    store double [[TMP3]], ptr [[G2]], align 8
 705 // CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 706 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
 707 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 708 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 709 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
 710 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 711 // CHECK3:       cond.true:
 712 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 713 // CHECK3:       cond.false:
 714 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 715 // CHECK3-NEXT:    br label [[COND_END]]
 716 // CHECK3:       cond.end:
 717 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
 718 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 719 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 720 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
 721 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 722 // CHECK3:       omp.inner.for.cond:
 723 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 724 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 725 // CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
 726 // CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 727 // CHECK3:       omp.inner.for.body:
 728 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 729 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
 730 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 731 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 732 // CHECK3-NEXT:    store double 1.000000e+00, ptr [[G2]], align 8
 733 // CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP]], align 4
 734 // CHECK3-NEXT:    store volatile double 1.000000e+00, ptr [[TMP12]], align 4
 735 // CHECK3-NEXT:    store i32 3, ptr [[SVAR_ADDR]], align 4
 736 // CHECK3-NEXT:    store float 4.000000e+00, ptr [[SFVAR_ADDR]], align 4
 737 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
 738 // CHECK3-NEXT:    store ptr [[G2]], ptr [[TMP13]], align 4
 739 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
 740 // CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP]], align 4
 741 // CHECK3-NEXT:    store ptr [[TMP15]], ptr [[TMP14]], align 4
 742 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
 743 // CHECK3-NEXT:    store ptr [[SVAR_ADDR]], ptr [[TMP16]], align 4
 744 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
 745 // CHECK3-NEXT:    store ptr [[SFVAR_ADDR]], ptr [[TMP17]], align 4
 746 // CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]])
 747 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 748 // CHECK3:       omp.body.continue:
 749 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 750 // CHECK3:       omp.inner.for.inc:
 751 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 752 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], 1
 753 // CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4
 754 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
 755 // CHECK3:       omp.inner.for.end:
 756 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 757 // CHECK3:       omp.loop.exit:
 758 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
 759 // CHECK3-NEXT:    ret void
 760 //
 761 //
 762 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 763 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
 764 // CHECK3-NEXT:  entry:
 765 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
 766 // CHECK3-NEXT:    ret void
 767 //
 768 //
 769 // CHECK8-LABEL: define {{[^@]+}}@main
 770 // CHECK8-SAME: () #[[ATTR0:[0-9]+]] {
 771 // CHECK8-NEXT:  entry:
 772 // CHECK8-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 773 // CHECK8-NEXT:    [[G:%.*]] = alloca double, align 8
 774 // CHECK8-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 775 // CHECK8-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 776 // CHECK8-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
 777 // CHECK8-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
 778 // CHECK8-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
 779 // CHECK8-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
 780 // CHECK8-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 781 // CHECK8-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
 782 // CHECK8-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
 783 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8
 784 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8
 785 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8
 786 // CHECK8-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 787 // CHECK8-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 788 // CHECK8-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 789 // CHECK8-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 790 // CHECK8-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
 791 // CHECK8-NEXT:    store i32 0, ptr [[T_VAR]], align 4
 792 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
 793 // CHECK8-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
 794 // CHECK8-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
 795 // CHECK8-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
 796 // CHECK8-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
 797 // CHECK8-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
 798 // CHECK8-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
 799 // CHECK8-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8
 800 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
 801 // CHECK8-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
 802 // CHECK8-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
 803 // CHECK8-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
 804 // CHECK8-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4
 805 // CHECK8-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4
 806 // CHECK8-NEXT:    [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8
 807 // CHECK8-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8
 808 // CHECK8-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8
 809 // CHECK8-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 810 // CHECK8-NEXT:    store i64 [[TMP2]], ptr [[TMP8]], align 8
 811 // CHECK8-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 812 // CHECK8-NEXT:    store i64 [[TMP2]], ptr [[TMP9]], align 8
 813 // CHECK8-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 814 // CHECK8-NEXT:    store ptr null, ptr [[TMP10]], align 8
 815 // CHECK8-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 816 // CHECK8-NEXT:    store ptr [[VEC]], ptr [[TMP11]], align 8
 817 // CHECK8-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 818 // CHECK8-NEXT:    store ptr [[VEC]], ptr [[TMP12]], align 8
 819 // CHECK8-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
 820 // CHECK8-NEXT:    store ptr null, ptr [[TMP13]], align 8
 821 // CHECK8-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
 822 // CHECK8-NEXT:    store ptr [[S_ARR]], ptr [[TMP14]], align 8
 823 // CHECK8-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
 824 // CHECK8-NEXT:    store ptr [[S_ARR]], ptr [[TMP15]], align 8
 825 // CHECK8-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
 826 // CHECK8-NEXT:    store ptr null, ptr [[TMP16]], align 8
 827 // CHECK8-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
 828 // CHECK8-NEXT:    store ptr [[TMP6]], ptr [[TMP17]], align 8
 829 // CHECK8-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
 830 // CHECK8-NEXT:    store ptr [[TMP7]], ptr [[TMP18]], align 8
 831 // CHECK8-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
 832 // CHECK8-NEXT:    store ptr null, ptr [[TMP19]], align 8
 833 // CHECK8-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
 834 // CHECK8-NEXT:    store i64 [[TMP5]], ptr [[TMP20]], align 8
 835 // CHECK8-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
 836 // CHECK8-NEXT:    store i64 [[TMP5]], ptr [[TMP21]], align 8
 837 // CHECK8-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
 838 // CHECK8-NEXT:    store ptr null, ptr [[TMP22]], align 8
 839 // CHECK8-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 840 // CHECK8-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 841 // CHECK8-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 842 // CHECK8-NEXT:    store i32 2, ptr [[TMP25]], align 4
 843 // CHECK8-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 844 // CHECK8-NEXT:    store i32 5, ptr [[TMP26]], align 4
 845 // CHECK8-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 846 // CHECK8-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
 847 // CHECK8-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 848 // CHECK8-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
 849 // CHECK8-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 850 // CHECK8-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 8
 851 // CHECK8-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 852 // CHECK8-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 8
 853 // CHECK8-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 854 // CHECK8-NEXT:    store ptr null, ptr [[TMP31]], align 8
 855 // CHECK8-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 856 // CHECK8-NEXT:    store ptr null, ptr [[TMP32]], align 8
 857 // CHECK8-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 858 // CHECK8-NEXT:    store i64 2, ptr [[TMP33]], align 8
 859 // CHECK8-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 860 // CHECK8-NEXT:    store i64 0, ptr [[TMP34]], align 8
 861 // CHECK8-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 862 // CHECK8-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
 863 // CHECK8-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 864 // CHECK8-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
 865 // CHECK8-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 866 // CHECK8-NEXT:    store i32 0, ptr [[TMP37]], align 4
 867 // CHECK8-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]])
 868 // CHECK8-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
 869 // CHECK8-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 870 // CHECK8:       omp_offload.failed:
 871 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]
 872 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 873 // CHECK8:       omp_offload.cont:
 874 // CHECK8-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
 875 // CHECK8-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
 876 // CHECK8-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
 877 // CHECK8-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 878 // CHECK8-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 879 // CHECK8:       arraydestroy.body:
 880 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 881 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 882 // CHECK8-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
 883 // CHECK8-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
 884 // CHECK8-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
 885 // CHECK8:       arraydestroy.done2:
 886 // CHECK8-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
 887 // CHECK8-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
 888 // CHECK8-NEXT:    ret i32 [[TMP41]]
 889 //
 890 //
 891 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
 892 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
 893 // CHECK8-NEXT:  entry:
 894 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 895 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 896 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 897 // CHECK8-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
 898 // CHECK8-NEXT:    ret void
 899 //
 900 //
 901 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
 902 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
 903 // CHECK8-NEXT:  entry:
 904 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 905 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
 906 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 907 // CHECK8-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
 908 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 909 // CHECK8-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
 910 // CHECK8-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
 911 // CHECK8-NEXT:    ret void
 912 //
 913 //
 914 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
 915 // CHECK8-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
 916 // CHECK8-NEXT:  entry:
 917 // CHECK8-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
 918 // CHECK8-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
 919 // CHECK8-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
 920 // CHECK8-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
 921 // CHECK8-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
 922 // CHECK8-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 923 // CHECK8-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
 924 // CHECK8-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
 925 // CHECK8-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
 926 // CHECK8-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
 927 // CHECK8-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
 928 // CHECK8-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
 929 // CHECK8-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
 930 // CHECK8-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
 931 // CHECK8-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
 932 // CHECK8-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
 933 // CHECK8-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])
 934 // CHECK8-NEXT:    ret void
 935 //
 936 //
 937 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined
 938 // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
 939 // CHECK8-NEXT:  entry:
 940 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 941 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 942 // CHECK8-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
 943 // CHECK8-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
 944 // CHECK8-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
 945 // CHECK8-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
 946 // CHECK8-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8
 947 // CHECK8-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 948 // CHECK8-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
 949 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 950 // CHECK8-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
 951 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 952 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 953 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 954 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 955 // CHECK8-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
 956 // CHECK8-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
 957 // CHECK8-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
 958 // CHECK8-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 959 // CHECK8-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 8
 960 // CHECK8-NEXT:    [[SVAR9:%.*]] = alloca i32, align 4
 961 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
 962 // CHECK8-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
 963 // CHECK8-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
 964 // CHECK8-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 965 // CHECK8-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 966 // CHECK8-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
 967 // CHECK8-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
 968 // CHECK8-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
 969 // CHECK8-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
 970 // CHECK8-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
 971 // CHECK8-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
 972 // CHECK8-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
 973 // CHECK8-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
 974 // CHECK8-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
 975 // CHECK8-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
 976 // CHECK8-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
 977 // CHECK8-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8
 978 // CHECK8-NEXT:    store ptr [[TMP5]], ptr [[_TMP1]], align 8
 979 // CHECK8-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 980 // CHECK8-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 981 // CHECK8-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 982 // CHECK8-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 983 // CHECK8-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 4
 984 // CHECK8-NEXT:    store i32 [[TMP6]], ptr [[T_VAR3]], align 4
 985 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i64 8, i1 false)
 986 // CHECK8-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
 987 // CHECK8-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 988 // CHECK8-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP7]]
 989 // CHECK8-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
 990 // CHECK8:       omp.arraycpy.body:
 991 // CHECK8-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
 992 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
 993 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
 994 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
 995 // CHECK8-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
 996 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP7]]
 997 // CHECK8-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
 998 // CHECK8:       omp.arraycpy.done6:
 999 // CHECK8-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP1]], align 8
1000 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VAR7]], ptr align 4 [[TMP8]], i64 4, i1 false)
1001 // CHECK8-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 8
1002 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP4]], align 4
1003 // CHECK8-NEXT:    store i32 [[TMP9]], ptr [[SVAR9]], align 4
1004 // CHECK8-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1005 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
1006 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1007 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1008 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
1009 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1010 // CHECK8:       cond.true:
1011 // CHECK8-NEXT:    br label [[COND_END:%.*]]
1012 // CHECK8:       cond.false:
1013 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1014 // CHECK8-NEXT:    br label [[COND_END]]
1015 // CHECK8:       cond.end:
1016 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
1017 // CHECK8-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1018 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1019 // CHECK8-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
1020 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1021 // CHECK8:       omp.inner.for.cond:
1022 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1023 // CHECK8-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1024 // CHECK8-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
1025 // CHECK8-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1026 // CHECK8:       omp.inner.for.cond.cleanup:
1027 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1028 // CHECK8:       omp.inner.for.body:
1029 // CHECK8-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1030 // CHECK8-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
1031 // CHECK8-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1032 // CHECK8-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
1033 // CHECK8-NEXT:    [[TMP21:%.*]] = load i32, ptr [[T_VAR3]], align 4
1034 // CHECK8-NEXT:    store i32 [[TMP21]], ptr [[T_VAR_CASTED]], align 4
1035 // CHECK8-NEXT:    [[TMP22:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
1036 // CHECK8-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[_TMP8]], align 8
1037 // CHECK8-NEXT:    [[TMP24:%.*]] = load i32, ptr [[SVAR9]], align 4
1038 // CHECK8-NEXT:    store i32 [[TMP24]], ptr [[SVAR_CASTED]], align 4
1039 // CHECK8-NEXT:    [[TMP25:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8
1040 // CHECK8-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[VEC4]], i64 [[TMP22]], ptr [[S_ARR5]], ptr [[TMP23]], i64 [[TMP25]])
1041 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1042 // CHECK8:       omp.inner.for.inc:
1043 // CHECK8-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1044 // CHECK8-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1045 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
1046 // CHECK8-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1047 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
1048 // CHECK8:       omp.inner.for.end:
1049 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1050 // CHECK8:       omp.loop.exit:
1051 // CHECK8-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1052 // CHECK8-NEXT:    [[TMP29:%.*]] = load i32, ptr [[TMP28]], align 4
1053 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP29]])
1054 // CHECK8-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1055 // CHECK8-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1056 // CHECK8-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i64 2
1057 // CHECK8-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1058 // CHECK8:       arraydestroy.body:
1059 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1060 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1061 // CHECK8-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1062 // CHECK8-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
1063 // CHECK8-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
1064 // CHECK8:       arraydestroy.done12:
1065 // CHECK8-NEXT:    ret void
1066 //
1067 //
1068 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined
1069 // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] {
1070 // CHECK8-NEXT:  entry:
1071 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1072 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1073 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1074 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1075 // CHECK8-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1076 // CHECK8-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1077 // CHECK8-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1078 // CHECK8-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1079 // CHECK8-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
1080 // CHECK8-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1081 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1082 // CHECK8-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1083 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1084 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1085 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1086 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1087 // CHECK8-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
1088 // CHECK8-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
1089 // CHECK8-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1090 // CHECK8-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
1091 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
1092 // CHECK8-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1093 // CHECK8-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1094 // CHECK8-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1095 // CHECK8-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1096 // CHECK8-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1097 // CHECK8-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1098 // CHECK8-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1099 // CHECK8-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1100 // CHECK8-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
1101 // CHECK8-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1102 // CHECK8-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1103 // CHECK8-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1104 // CHECK8-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
1105 // CHECK8-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1106 // CHECK8-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1107 // CHECK8-NEXT:    [[TMP3:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1108 // CHECK8-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP3]] to i32
1109 // CHECK8-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1110 // CHECK8-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP4]] to i32
1111 // CHECK8-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1112 // CHECK8-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
1113 // CHECK8-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1114 // CHECK8-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1115 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC3]], ptr align 4 [[TMP0]], i64 8, i1 false)
1116 // CHECK8-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
1117 // CHECK8-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
1118 // CHECK8-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP5]]
1119 // CHECK8-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE5:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1120 // CHECK8:       omp.arraycpy.body:
1121 // CHECK8-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1122 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1123 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1124 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1125 // CHECK8-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1126 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
1127 // CHECK8-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_BODY]]
1128 // CHECK8:       omp.arraycpy.done5:
1129 // CHECK8-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8
1130 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VAR6]], ptr align 4 [[TMP6]], i64 4, i1 false)
1131 // CHECK8-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
1132 // CHECK8-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1133 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1134 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1135 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1136 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1137 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1138 // CHECK8:       cond.true:
1139 // CHECK8-NEXT:    br label [[COND_END:%.*]]
1140 // CHECK8:       cond.false:
1141 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1142 // CHECK8-NEXT:    br label [[COND_END]]
1143 // CHECK8:       cond.end:
1144 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1145 // CHECK8-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1146 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1147 // CHECK8-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1148 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1149 // CHECK8:       omp.inner.for.cond:
1150 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1151 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1152 // CHECK8-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1153 // CHECK8-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1154 // CHECK8:       omp.inner.for.cond.cleanup:
1155 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1156 // CHECK8:       omp.inner.for.body:
1157 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1158 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1159 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1160 // CHECK8-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1161 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4
1162 // CHECK8-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
1163 // CHECK8-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1164 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]
1165 // CHECK8-NEXT:    store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4
1166 // CHECK8-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 8
1167 // CHECK8-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4
1168 // CHECK8-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP18]] to i64
1169 // CHECK8-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM9]]
1170 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP17]], i64 4, i1 false)
1171 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1172 // CHECK8:       omp.body.continue:
1173 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1174 // CHECK8:       omp.inner.for.inc:
1175 // CHECK8-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1176 // CHECK8-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP19]], 1
1177 // CHECK8-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
1178 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
1179 // CHECK8:       omp.inner.for.end:
1180 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1181 // CHECK8:       omp.loop.exit:
1182 // CHECK8-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1183 // CHECK8-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
1184 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
1185 // CHECK8-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1186 // CHECK8-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
1187 // CHECK8-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
1188 // CHECK8-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1189 // CHECK8:       arraydestroy.body:
1190 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1191 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1192 // CHECK8-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1193 // CHECK8-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
1194 // CHECK8-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
1195 // CHECK8:       arraydestroy.done13:
1196 // CHECK8-NEXT:    ret void
1197 //
1198 //
1199 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1200 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1201 // CHECK8-NEXT:  entry:
1202 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1203 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1204 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1205 // CHECK8-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1206 // CHECK8-NEXT:    ret void
1207 //
1208 //
1209 // CHECK8-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1210 // CHECK8-SAME: () #[[ATTR5:[0-9]+]] comdat {
1211 // CHECK8-NEXT:  entry:
1212 // CHECK8-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1213 // CHECK8-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1214 // CHECK8-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1215 // CHECK8-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1216 // CHECK8-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1217 // CHECK8-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
1218 // CHECK8-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1219 // CHECK8-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1220 // CHECK8-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8
1221 // CHECK8-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8
1222 // CHECK8-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8
1223 // CHECK8-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1224 // CHECK8-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1225 // CHECK8-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1226 // CHECK8-NEXT:    store i32 0, ptr [[T_VAR]], align 4
1227 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
1228 // CHECK8-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
1229 // CHECK8-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
1230 // CHECK8-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
1231 // CHECK8-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
1232 // CHECK8-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
1233 // CHECK8-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
1234 // CHECK8-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8
1235 // CHECK8-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1236 // CHECK8-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
1237 // CHECK8-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
1238 // CHECK8-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
1239 // CHECK8-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1240 // CHECK8-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8
1241 // CHECK8-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1242 // CHECK8-NEXT:    store i64 [[TMP2]], ptr [[TMP6]], align 8
1243 // CHECK8-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1244 // CHECK8-NEXT:    store i64 [[TMP2]], ptr [[TMP7]], align 8
1245 // CHECK8-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1246 // CHECK8-NEXT:    store ptr null, ptr [[TMP8]], align 8
1247 // CHECK8-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1248 // CHECK8-NEXT:    store ptr [[VEC]], ptr [[TMP9]], align 8
1249 // CHECK8-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1250 // CHECK8-NEXT:    store ptr [[VEC]], ptr [[TMP10]], align 8
1251 // CHECK8-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1252 // CHECK8-NEXT:    store ptr null, ptr [[TMP11]], align 8
1253 // CHECK8-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1254 // CHECK8-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 8
1255 // CHECK8-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1256 // CHECK8-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 8
1257 // CHECK8-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1258 // CHECK8-NEXT:    store ptr null, ptr [[TMP14]], align 8
1259 // CHECK8-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1260 // CHECK8-NEXT:    store ptr [[TMP4]], ptr [[TMP15]], align 8
1261 // CHECK8-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1262 // CHECK8-NEXT:    store ptr [[TMP5]], ptr [[TMP16]], align 8
1263 // CHECK8-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1264 // CHECK8-NEXT:    store ptr null, ptr [[TMP17]], align 8
1265 // CHECK8-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1266 // CHECK8-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1267 // CHECK8-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1268 // CHECK8-NEXT:    store i32 2, ptr [[TMP20]], align 4
1269 // CHECK8-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1270 // CHECK8-NEXT:    store i32 4, ptr [[TMP21]], align 4
1271 // CHECK8-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1272 // CHECK8-NEXT:    store ptr [[TMP18]], ptr [[TMP22]], align 8
1273 // CHECK8-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1274 // CHECK8-NEXT:    store ptr [[TMP19]], ptr [[TMP23]], align 8
1275 // CHECK8-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1276 // CHECK8-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP24]], align 8
1277 // CHECK8-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1278 // CHECK8-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP25]], align 8
1279 // CHECK8-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1280 // CHECK8-NEXT:    store ptr null, ptr [[TMP26]], align 8
1281 // CHECK8-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1282 // CHECK8-NEXT:    store ptr null, ptr [[TMP27]], align 8
1283 // CHECK8-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1284 // CHECK8-NEXT:    store i64 2, ptr [[TMP28]], align 8
1285 // CHECK8-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1286 // CHECK8-NEXT:    store i64 0, ptr [[TMP29]], align 8
1287 // CHECK8-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1288 // CHECK8-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4
1289 // CHECK8-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1290 // CHECK8-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP31]], align 4
1291 // CHECK8-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1292 // CHECK8-NEXT:    store i32 0, ptr [[TMP32]], align 4
1293 // CHECK8-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, ptr [[KERNEL_ARGS]])
1294 // CHECK8-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
1295 // CHECK8-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1296 // CHECK8:       omp_offload.failed:
1297 // CHECK8-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]
1298 // CHECK8-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1299 // CHECK8:       omp_offload.cont:
1300 // CHECK8-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1301 // CHECK8-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1302 // CHECK8-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1303 // CHECK8-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1304 // CHECK8:       arraydestroy.body:
1305 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1306 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1307 // CHECK8-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1308 // CHECK8-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1309 // CHECK8-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1310 // CHECK8:       arraydestroy.done2:
1311 // CHECK8-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1312 // CHECK8-NEXT:    [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4
1313 // CHECK8-NEXT:    ret i32 [[TMP36]]
1314 //
1315 //
1316 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1317 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1318 // CHECK8-NEXT:  entry:
1319 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1320 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1321 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1322 // CHECK8-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1323 // CHECK8-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
1324 // CHECK8-NEXT:    ret void
1325 //
1326 //
1327 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1328 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1329 // CHECK8-NEXT:  entry:
1330 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1331 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1332 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1333 // CHECK8-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
1334 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1335 // CHECK8-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1336 // CHECK8-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1337 // CHECK8-NEXT:    store float [[TMP0]], ptr [[F]], align 4
1338 // CHECK8-NEXT:    ret void
1339 //
1340 //
1341 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1342 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1343 // CHECK8-NEXT:  entry:
1344 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1345 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1346 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1347 // CHECK8-NEXT:    ret void
1348 //
1349 //
1350 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1351 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1352 // CHECK8-NEXT:  entry:
1353 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1354 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1355 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1356 // CHECK8-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1357 // CHECK8-NEXT:    ret void
1358 //
1359 //
1360 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1361 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1362 // CHECK8-NEXT:  entry:
1363 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1364 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1365 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1366 // CHECK8-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1367 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1368 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1369 // CHECK8-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
1370 // CHECK8-NEXT:    ret void
1371 //
1372 //
1373 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48
1374 // CHECK8-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1375 // CHECK8-NEXT:  entry:
1376 // CHECK8-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1377 // CHECK8-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1378 // CHECK8-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1379 // CHECK8-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1380 // CHECK8-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1381 // CHECK8-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1382 // CHECK8-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1383 // CHECK8-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1384 // CHECK8-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1385 // CHECK8-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1386 // CHECK8-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1387 // CHECK8-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1388 // CHECK8-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
1389 // CHECK8-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
1390 // CHECK8-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])
1391 // CHECK8-NEXT:    ret void
1392 //
1393 //
1394 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined
1395 // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1396 // CHECK8-NEXT:  entry:
1397 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1398 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1399 // CHECK8-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
1400 // CHECK8-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1401 // CHECK8-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1402 // CHECK8-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1403 // CHECK8-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1404 // CHECK8-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
1405 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1406 // CHECK8-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1407 // CHECK8-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1408 // CHECK8-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1409 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1410 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1411 // CHECK8-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
1412 // CHECK8-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1413 // CHECK8-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1414 // CHECK8-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1415 // CHECK8-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 8
1416 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
1417 // CHECK8-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1418 // CHECK8-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1419 // CHECK8-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1420 // CHECK8-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1421 // CHECK8-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1422 // CHECK8-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1423 // CHECK8-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1424 // CHECK8-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1425 // CHECK8-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1426 // CHECK8-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1427 // CHECK8-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1428 // CHECK8-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
1429 // CHECK8-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1430 // CHECK8-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 8
1431 // CHECK8-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1432 // CHECK8-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
1433 // CHECK8-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1434 // CHECK8-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1435 // CHECK8-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4
1436 // CHECK8-NEXT:    store i32 [[TMP5]], ptr [[T_VAR3]], align 4
1437 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i64 8, i1 false)
1438 // CHECK8-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1439 // CHECK8-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1440 // CHECK8-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP6]]
1441 // CHECK8-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1442 // CHECK8:       omp.arraycpy.body:
1443 // CHECK8-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1444 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1445 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1446 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1447 // CHECK8-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1448 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]]
1449 // CHECK8-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1450 // CHECK8:       omp.arraycpy.done6:
1451 // CHECK8-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[_TMP1]], align 8
1452 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VAR7]], ptr align 4 [[TMP7]], i64 4, i1 false)
1453 // CHECK8-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 8
1454 // CHECK8-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1455 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
1456 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1457 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1458 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
1459 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1460 // CHECK8:       cond.true:
1461 // CHECK8-NEXT:    br label [[COND_END:%.*]]
1462 // CHECK8:       cond.false:
1463 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1464 // CHECK8-NEXT:    br label [[COND_END]]
1465 // CHECK8:       cond.end:
1466 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1467 // CHECK8-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1468 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1469 // CHECK8-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
1470 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1471 // CHECK8:       omp.inner.for.cond:
1472 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1473 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1474 // CHECK8-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1475 // CHECK8-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1476 // CHECK8:       omp.inner.for.cond.cleanup:
1477 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1478 // CHECK8:       omp.inner.for.body:
1479 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1480 // CHECK8-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
1481 // CHECK8-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1482 // CHECK8-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
1483 // CHECK8-NEXT:    [[TMP19:%.*]] = load i32, ptr [[T_VAR3]], align 4
1484 // CHECK8-NEXT:    store i32 [[TMP19]], ptr [[T_VAR_CASTED]], align 4
1485 // CHECK8-NEXT:    [[TMP20:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
1486 // CHECK8-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[_TMP8]], align 8
1487 // CHECK8-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], ptr [[VEC4]], i64 [[TMP20]], ptr [[S_ARR5]], ptr [[TMP21]])
1488 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1489 // CHECK8:       omp.inner.for.inc:
1490 // CHECK8-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1491 // CHECK8-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1492 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
1493 // CHECK8-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1494 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
1495 // CHECK8:       omp.inner.for.end:
1496 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1497 // CHECK8:       omp.loop.exit:
1498 // CHECK8-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1499 // CHECK8-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
1500 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP25]])
1501 // CHECK8-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1502 // CHECK8-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1503 // CHECK8-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2
1504 // CHECK8-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1505 // CHECK8:       arraydestroy.body:
1506 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP26]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1507 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1508 // CHECK8-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1509 // CHECK8-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
1510 // CHECK8-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
1511 // CHECK8:       arraydestroy.done11:
1512 // CHECK8-NEXT:    ret void
1513 //
1514 //
1515 // CHECK8-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined.omp_outlined
1516 // CHECK8-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1517 // CHECK8-NEXT:  entry:
1518 // CHECK8-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1519 // CHECK8-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1520 // CHECK8-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1521 // CHECK8-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1522 // CHECK8-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1523 // CHECK8-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1524 // CHECK8-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1525 // CHECK8-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1526 // CHECK8-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1527 // CHECK8-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1528 // CHECK8-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1529 // CHECK8-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1530 // CHECK8-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1531 // CHECK8-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1532 // CHECK8-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1533 // CHECK8-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
1534 // CHECK8-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
1535 // CHECK8-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1536 // CHECK8-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
1537 // CHECK8-NEXT:    [[I:%.*]] = alloca i32, align 4
1538 // CHECK8-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1539 // CHECK8-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1540 // CHECK8-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1541 // CHECK8-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1542 // CHECK8-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1543 // CHECK8-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1544 // CHECK8-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1545 // CHECK8-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1546 // CHECK8-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1547 // CHECK8-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1548 // CHECK8-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1549 // CHECK8-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
1550 // CHECK8-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1551 // CHECK8-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1552 // CHECK8-NEXT:    [[TMP3:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1553 // CHECK8-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP3]] to i32
1554 // CHECK8-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1555 // CHECK8-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP4]] to i32
1556 // CHECK8-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1557 // CHECK8-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
1558 // CHECK8-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1559 // CHECK8-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1560 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC3]], ptr align 4 [[TMP0]], i64 8, i1 false)
1561 // CHECK8-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
1562 // CHECK8-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1563 // CHECK8-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP5]]
1564 // CHECK8-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE5:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1565 // CHECK8:       omp.arraycpy.body:
1566 // CHECK8-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1567 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1568 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1569 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1570 // CHECK8-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1571 // CHECK8-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
1572 // CHECK8-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE5]], label [[OMP_ARRAYCPY_BODY]]
1573 // CHECK8:       omp.arraycpy.done5:
1574 // CHECK8-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8
1575 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VAR6]], ptr align 4 [[TMP6]], i64 4, i1 false)
1576 // CHECK8-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
1577 // CHECK8-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1578 // CHECK8-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1579 // CHECK8-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1580 // CHECK8-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1581 // CHECK8-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1582 // CHECK8-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1583 // CHECK8:       cond.true:
1584 // CHECK8-NEXT:    br label [[COND_END:%.*]]
1585 // CHECK8:       cond.false:
1586 // CHECK8-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1587 // CHECK8-NEXT:    br label [[COND_END]]
1588 // CHECK8:       cond.end:
1589 // CHECK8-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1590 // CHECK8-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1591 // CHECK8-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1592 // CHECK8-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1593 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1594 // CHECK8:       omp.inner.for.cond:
1595 // CHECK8-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1596 // CHECK8-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1597 // CHECK8-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1598 // CHECK8-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1599 // CHECK8:       omp.inner.for.cond.cleanup:
1600 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1601 // CHECK8:       omp.inner.for.body:
1602 // CHECK8-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1603 // CHECK8-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1604 // CHECK8-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1605 // CHECK8-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1606 // CHECK8-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4
1607 // CHECK8-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
1608 // CHECK8-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1609 // CHECK8-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]
1610 // CHECK8-NEXT:    store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4
1611 // CHECK8-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 8
1612 // CHECK8-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4
1613 // CHECK8-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP18]] to i64
1614 // CHECK8-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM9]]
1615 // CHECK8-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP17]], i64 4, i1 false)
1616 // CHECK8-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1617 // CHECK8:       omp.body.continue:
1618 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1619 // CHECK8:       omp.inner.for.inc:
1620 // CHECK8-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1621 // CHECK8-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP19]], 1
1622 // CHECK8-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
1623 // CHECK8-NEXT:    br label [[OMP_INNER_FOR_COND]]
1624 // CHECK8:       omp.inner.for.end:
1625 // CHECK8-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1626 // CHECK8:       omp.loop.exit:
1627 // CHECK8-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1628 // CHECK8-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
1629 // CHECK8-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
1630 // CHECK8-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1631 // CHECK8-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
1632 // CHECK8-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
1633 // CHECK8-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1634 // CHECK8:       arraydestroy.body:
1635 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1636 // CHECK8-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1637 // CHECK8-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1638 // CHECK8-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
1639 // CHECK8-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
1640 // CHECK8:       arraydestroy.done13:
1641 // CHECK8-NEXT:    ret void
1642 //
1643 //
1644 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1645 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1646 // CHECK8-NEXT:  entry:
1647 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1648 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1649 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1650 // CHECK8-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1651 // CHECK8-NEXT:    ret void
1652 //
1653 //
1654 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1655 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1656 // CHECK8-NEXT:  entry:
1657 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1658 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1659 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1660 // CHECK8-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1661 // CHECK8-NEXT:    store i32 0, ptr [[F]], align 4
1662 // CHECK8-NEXT:    ret void
1663 //
1664 //
1665 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1666 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1667 // CHECK8-NEXT:  entry:
1668 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1669 // CHECK8-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1670 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1671 // CHECK8-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1672 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1673 // CHECK8-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1674 // CHECK8-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1675 // CHECK8-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
1676 // CHECK8-NEXT:    ret void
1677 //
1678 //
1679 // CHECK8-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1680 // CHECK8-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1681 // CHECK8-NEXT:  entry:
1682 // CHECK8-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1683 // CHECK8-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1684 // CHECK8-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1685 // CHECK8-NEXT:    ret void
1686 //
1687 //
1688 // CHECK8-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1689 // CHECK8-SAME: () #[[ATTR6:[0-9]+]] {
1690 // CHECK8-NEXT:  entry:
1691 // CHECK8-NEXT:    call void @__tgt_register_requires(i64 1)
1692 // CHECK8-NEXT:    ret void
1693 //
1694 //
1695 // CHECK10-LABEL: define {{[^@]+}}@main
1696 // CHECK10-SAME: () #[[ATTR0:[0-9]+]] {
1697 // CHECK10-NEXT:  entry:
1698 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1699 // CHECK10-NEXT:    [[G:%.*]] = alloca double, align 8
1700 // CHECK10-NEXT:    [[G1:%.*]] = alloca ptr, align 4
1701 // CHECK10-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1702 // CHECK10-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1703 // CHECK10-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1704 // CHECK10-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1705 // CHECK10-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
1706 // CHECK10-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
1707 // CHECK10-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1708 // CHECK10-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
1709 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4
1710 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4
1711 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4
1712 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1713 // CHECK10-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1714 // CHECK10-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1715 // CHECK10-NEXT:    store ptr [[G]], ptr [[G1]], align 4
1716 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1717 // CHECK10-NEXT:    store i32 0, ptr [[T_VAR]], align 4
1718 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)
1719 // CHECK10-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1720 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1721 // CHECK10-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i32 1
1722 // CHECK10-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1723 // CHECK10-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
1724 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
1725 // CHECK10-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 4
1726 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1727 // CHECK10-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
1728 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
1729 // CHECK10-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1730 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4
1731 // CHECK10-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4
1732 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4
1733 // CHECK10-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4
1734 // CHECK10-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4
1735 // CHECK10-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1736 // CHECK10-NEXT:    store i32 [[TMP2]], ptr [[TMP8]], align 4
1737 // CHECK10-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1738 // CHECK10-NEXT:    store i32 [[TMP2]], ptr [[TMP9]], align 4
1739 // CHECK10-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1740 // CHECK10-NEXT:    store ptr null, ptr [[TMP10]], align 4
1741 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1742 // CHECK10-NEXT:    store ptr [[VEC]], ptr [[TMP11]], align 4
1743 // CHECK10-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1744 // CHECK10-NEXT:    store ptr [[VEC]], ptr [[TMP12]], align 4
1745 // CHECK10-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1746 // CHECK10-NEXT:    store ptr null, ptr [[TMP13]], align 4
1747 // CHECK10-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1748 // CHECK10-NEXT:    store ptr [[S_ARR]], ptr [[TMP14]], align 4
1749 // CHECK10-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1750 // CHECK10-NEXT:    store ptr [[S_ARR]], ptr [[TMP15]], align 4
1751 // CHECK10-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1752 // CHECK10-NEXT:    store ptr null, ptr [[TMP16]], align 4
1753 // CHECK10-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1754 // CHECK10-NEXT:    store ptr [[TMP6]], ptr [[TMP17]], align 4
1755 // CHECK10-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1756 // CHECK10-NEXT:    store ptr [[TMP7]], ptr [[TMP18]], align 4
1757 // CHECK10-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1758 // CHECK10-NEXT:    store ptr null, ptr [[TMP19]], align 4
1759 // CHECK10-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1760 // CHECK10-NEXT:    store i32 [[TMP5]], ptr [[TMP20]], align 4
1761 // CHECK10-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1762 // CHECK10-NEXT:    store i32 [[TMP5]], ptr [[TMP21]], align 4
1763 // CHECK10-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1764 // CHECK10-NEXT:    store ptr null, ptr [[TMP22]], align 4
1765 // CHECK10-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1766 // CHECK10-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1767 // CHECK10-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1768 // CHECK10-NEXT:    store i32 2, ptr [[TMP25]], align 4
1769 // CHECK10-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1770 // CHECK10-NEXT:    store i32 5, ptr [[TMP26]], align 4
1771 // CHECK10-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1772 // CHECK10-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
1773 // CHECK10-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1774 // CHECK10-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
1775 // CHECK10-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1776 // CHECK10-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 4
1777 // CHECK10-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1778 // CHECK10-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 4
1779 // CHECK10-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1780 // CHECK10-NEXT:    store ptr null, ptr [[TMP31]], align 4
1781 // CHECK10-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1782 // CHECK10-NEXT:    store ptr null, ptr [[TMP32]], align 4
1783 // CHECK10-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1784 // CHECK10-NEXT:    store i64 2, ptr [[TMP33]], align 8
1785 // CHECK10-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1786 // CHECK10-NEXT:    store i64 0, ptr [[TMP34]], align 8
1787 // CHECK10-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1788 // CHECK10-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
1789 // CHECK10-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1790 // CHECK10-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
1791 // CHECK10-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1792 // CHECK10-NEXT:    store i32 0, ptr [[TMP37]], align 4
1793 // CHECK10-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]])
1794 // CHECK10-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
1795 // CHECK10-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1796 // CHECK10:       omp_offload.failed:
1797 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]
1798 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1799 // CHECK10:       omp_offload.cont:
1800 // CHECK10-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1801 // CHECK10-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
1802 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1803 // CHECK10-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1804 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1805 // CHECK10:       arraydestroy.body:
1806 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1807 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1808 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1809 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1810 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1811 // CHECK10:       arraydestroy.done2:
1812 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1813 // CHECK10-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
1814 // CHECK10-NEXT:    ret i32 [[TMP41]]
1815 //
1816 //
1817 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1818 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1819 // CHECK10-NEXT:  entry:
1820 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1821 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1822 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1823 // CHECK10-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1824 // CHECK10-NEXT:    ret void
1825 //
1826 //
1827 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1828 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1829 // CHECK10-NEXT:  entry:
1830 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1831 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1832 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1833 // CHECK10-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
1834 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1835 // CHECK10-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1836 // CHECK10-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1837 // CHECK10-NEXT:    ret void
1838 //
1839 //
1840 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
1841 // CHECK10-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1842 // CHECK10-NEXT:  entry:
1843 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1844 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
1845 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1846 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
1847 // CHECK10-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
1848 // CHECK10-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
1849 // CHECK10-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1850 // CHECK10-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1851 // CHECK10-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1852 // CHECK10-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1853 // CHECK10-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
1854 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1855 // CHECK10-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1856 // CHECK10-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1857 // CHECK10-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 4
1858 // CHECK10-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1859 // CHECK10-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])
1860 // CHECK10-NEXT:    ret void
1861 //
1862 //
1863 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined
1864 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1865 // CHECK10-NEXT:  entry:
1866 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1867 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1868 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
1869 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
1870 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1871 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
1872 // CHECK10-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4
1873 // CHECK10-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
1874 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
1875 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1876 // CHECK10-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1877 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1878 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1879 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1880 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1881 // CHECK10-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
1882 // CHECK10-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1883 // CHECK10-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1884 // CHECK10-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1885 // CHECK10-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 4
1886 // CHECK10-NEXT:    [[SVAR9:%.*]] = alloca i32, align 4
1887 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
1888 // CHECK10-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1889 // CHECK10-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
1890 // CHECK10-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1891 // CHECK10-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1892 // CHECK10-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1893 // CHECK10-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1894 // CHECK10-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1895 // CHECK10-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1896 // CHECK10-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
1897 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
1898 // CHECK10-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1899 // CHECK10-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1900 // CHECK10-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1901 // CHECK10-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
1902 // CHECK10-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 4
1903 // CHECK10-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4
1904 // CHECK10-NEXT:    store ptr [[TMP5]], ptr [[_TMP1]], align 4
1905 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1906 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
1907 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1908 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1909 // CHECK10-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP0]], align 4
1910 // CHECK10-NEXT:    store i32 [[TMP6]], ptr [[T_VAR3]], align 4
1911 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i32 8, i1 false)
1912 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1913 // CHECK10-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1914 // CHECK10-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP7]]
1915 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1916 // CHECK10:       omp.arraycpy.body:
1917 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1918 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1919 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
1920 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1921 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1922 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP7]]
1923 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
1924 // CHECK10:       omp.arraycpy.done6:
1925 // CHECK10-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP1]], align 4
1926 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VAR7]], ptr align 4 [[TMP8]], i32 4, i1 false)
1927 // CHECK10-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 4
1928 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP4]], align 4
1929 // CHECK10-NEXT:    store i32 [[TMP9]], ptr [[SVAR9]], align 4
1930 // CHECK10-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1931 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
1932 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP11]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1933 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1934 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP12]], 1
1935 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1936 // CHECK10:       cond.true:
1937 // CHECK10-NEXT:    br label [[COND_END:%.*]]
1938 // CHECK10:       cond.false:
1939 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1940 // CHECK10-NEXT:    br label [[COND_END]]
1941 // CHECK10:       cond.end:
1942 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
1943 // CHECK10-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1944 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1945 // CHECK10-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
1946 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1947 // CHECK10:       omp.inner.for.cond:
1948 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1949 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1950 // CHECK10-NEXT:    [[CMP10:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
1951 // CHECK10-NEXT:    br i1 [[CMP10]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1952 // CHECK10:       omp.inner.for.cond.cleanup:
1953 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1954 // CHECK10:       omp.inner.for.body:
1955 // CHECK10-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1956 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1957 // CHECK10-NEXT:    [[TMP19:%.*]] = load i32, ptr [[T_VAR3]], align 4
1958 // CHECK10-NEXT:    store i32 [[TMP19]], ptr [[T_VAR_CASTED]], align 4
1959 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
1960 // CHECK10-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[_TMP8]], align 4
1961 // CHECK10-NEXT:    [[TMP22:%.*]] = load i32, ptr [[SVAR9]], align 4
1962 // CHECK10-NEXT:    store i32 [[TMP22]], ptr [[SVAR_CASTED]], align 4
1963 // CHECK10-NEXT:    [[TMP23:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4
1964 // CHECK10-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[VEC4]], i32 [[TMP20]], ptr [[S_ARR5]], ptr [[TMP21]], i32 [[TMP23]])
1965 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1966 // CHECK10:       omp.inner.for.inc:
1967 // CHECK10-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1968 // CHECK10-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1969 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
1970 // CHECK10-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1971 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
1972 // CHECK10:       omp.inner.for.end:
1973 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1974 // CHECK10:       omp.loop.exit:
1975 // CHECK10-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1976 // CHECK10-NEXT:    [[TMP27:%.*]] = load i32, ptr [[TMP26]], align 4
1977 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP27]])
1978 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
1979 // CHECK10-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1980 // CHECK10-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
1981 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1982 // CHECK10:       arraydestroy.body:
1983 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1984 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1985 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1986 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
1987 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
1988 // CHECK10:       arraydestroy.done12:
1989 // CHECK10-NEXT:    ret void
1990 //
1991 //
1992 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined
1993 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] {
1994 // CHECK10-NEXT:  entry:
1995 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1996 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1997 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1998 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1999 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2000 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2001 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2002 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2003 // CHECK10-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
2004 // CHECK10-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2005 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2006 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2007 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2008 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2009 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2010 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2011 // CHECK10-NEXT:    [[VEC2:%.*]] = alloca [2 x i32], align 4
2012 // CHECK10-NEXT:    [[S_ARR3:%.*]] = alloca [2 x %struct.S], align 4
2013 // CHECK10-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2014 // CHECK10-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 4
2015 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
2016 // CHECK10-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2017 // CHECK10-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2018 // CHECK10-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2019 // CHECK10-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2020 // CHECK10-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2021 // CHECK10-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2022 // CHECK10-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2023 // CHECK10-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2024 // CHECK10-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
2025 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2026 // CHECK10-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2027 // CHECK10-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2028 // CHECK10-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 4
2029 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2030 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2031 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2032 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2033 // CHECK10-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_LB]], align 4
2034 // CHECK10-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
2035 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2036 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2037 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC2]], ptr align 4 [[TMP0]], i32 8, i1 false)
2038 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 0
2039 // CHECK10-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
2040 // CHECK10-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP5]]
2041 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2042 // CHECK10:       omp.arraycpy.body:
2043 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2044 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2045 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2046 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2047 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2048 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
2049 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
2050 // CHECK10:       omp.arraycpy.done4:
2051 // CHECK10-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4
2052 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VAR5]], ptr align 4 [[TMP6]], i32 4, i1 false)
2053 // CHECK10-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 4
2054 // CHECK10-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2055 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2056 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2057 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2058 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
2059 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2060 // CHECK10:       cond.true:
2061 // CHECK10-NEXT:    br label [[COND_END:%.*]]
2062 // CHECK10:       cond.false:
2063 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2064 // CHECK10-NEXT:    br label [[COND_END]]
2065 // CHECK10:       cond.end:
2066 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2067 // CHECK10-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2068 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2069 // CHECK10-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2070 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2071 // CHECK10:       omp.inner.for.cond:
2072 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2073 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2074 // CHECK10-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2075 // CHECK10-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2076 // CHECK10:       omp.inner.for.cond.cleanup:
2077 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2078 // CHECK10:       omp.inner.for.body:
2079 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2080 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2081 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2082 // CHECK10-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2083 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4
2084 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
2085 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC2]], i32 0, i32 [[TMP16]]
2086 // CHECK10-NEXT:    store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4
2087 // CHECK10-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP6]], align 4
2088 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4
2089 // CHECK10-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 [[TMP18]]
2090 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP17]], i32 4, i1 false)
2091 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2092 // CHECK10:       omp.body.continue:
2093 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2094 // CHECK10:       omp.inner.for.inc:
2095 // CHECK10-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2096 // CHECK10-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], 1
2097 // CHECK10-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
2098 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
2099 // CHECK10:       omp.inner.for.end:
2100 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2101 // CHECK10:       omp.loop.exit:
2102 // CHECK10-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2103 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
2104 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
2105 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2106 // CHECK10-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR3]], i32 0, i32 0
2107 // CHECK10-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i32 2
2108 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2109 // CHECK10:       arraydestroy.body:
2110 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2111 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2112 // CHECK10-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2113 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2114 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2115 // CHECK10:       arraydestroy.done11:
2116 // CHECK10-NEXT:    ret void
2117 //
2118 //
2119 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2120 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2121 // CHECK10-NEXT:  entry:
2122 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2123 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2124 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2125 // CHECK10-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2126 // CHECK10-NEXT:    ret void
2127 //
2128 //
2129 // CHECK10-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2130 // CHECK10-SAME: () #[[ATTR5:[0-9]+]] comdat {
2131 // CHECK10-NEXT:  entry:
2132 // CHECK10-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2133 // CHECK10-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2134 // CHECK10-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2135 // CHECK10-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2136 // CHECK10-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2137 // CHECK10-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
2138 // CHECK10-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2139 // CHECK10-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2140 // CHECK10-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4
2141 // CHECK10-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4
2142 // CHECK10-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4
2143 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2144 // CHECK10-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2145 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2146 // CHECK10-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2147 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
2148 // CHECK10-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2149 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
2150 // CHECK10-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i32 1
2151 // CHECK10-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
2152 // CHECK10-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
2153 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
2154 // CHECK10-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 4
2155 // CHECK10-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
2156 // CHECK10-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
2157 // CHECK10-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
2158 // CHECK10-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
2159 // CHECK10-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
2160 // CHECK10-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4
2161 // CHECK10-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2162 // CHECK10-NEXT:    store i32 [[TMP2]], ptr [[TMP6]], align 4
2163 // CHECK10-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2164 // CHECK10-NEXT:    store i32 [[TMP2]], ptr [[TMP7]], align 4
2165 // CHECK10-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2166 // CHECK10-NEXT:    store ptr null, ptr [[TMP8]], align 4
2167 // CHECK10-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2168 // CHECK10-NEXT:    store ptr [[VEC]], ptr [[TMP9]], align 4
2169 // CHECK10-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2170 // CHECK10-NEXT:    store ptr [[VEC]], ptr [[TMP10]], align 4
2171 // CHECK10-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2172 // CHECK10-NEXT:    store ptr null, ptr [[TMP11]], align 4
2173 // CHECK10-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2174 // CHECK10-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 4
2175 // CHECK10-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2176 // CHECK10-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 4
2177 // CHECK10-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2178 // CHECK10-NEXT:    store ptr null, ptr [[TMP14]], align 4
2179 // CHECK10-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2180 // CHECK10-NEXT:    store ptr [[TMP4]], ptr [[TMP15]], align 4
2181 // CHECK10-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2182 // CHECK10-NEXT:    store ptr [[TMP5]], ptr [[TMP16]], align 4
2183 // CHECK10-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2184 // CHECK10-NEXT:    store ptr null, ptr [[TMP17]], align 4
2185 // CHECK10-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2186 // CHECK10-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2187 // CHECK10-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2188 // CHECK10-NEXT:    store i32 2, ptr [[TMP20]], align 4
2189 // CHECK10-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2190 // CHECK10-NEXT:    store i32 4, ptr [[TMP21]], align 4
2191 // CHECK10-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2192 // CHECK10-NEXT:    store ptr [[TMP18]], ptr [[TMP22]], align 4
2193 // CHECK10-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2194 // CHECK10-NEXT:    store ptr [[TMP19]], ptr [[TMP23]], align 4
2195 // CHECK10-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2196 // CHECK10-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP24]], align 4
2197 // CHECK10-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2198 // CHECK10-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP25]], align 4
2199 // CHECK10-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2200 // CHECK10-NEXT:    store ptr null, ptr [[TMP26]], align 4
2201 // CHECK10-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2202 // CHECK10-NEXT:    store ptr null, ptr [[TMP27]], align 4
2203 // CHECK10-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2204 // CHECK10-NEXT:    store i64 2, ptr [[TMP28]], align 8
2205 // CHECK10-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2206 // CHECK10-NEXT:    store i64 0, ptr [[TMP29]], align 8
2207 // CHECK10-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2208 // CHECK10-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4
2209 // CHECK10-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2210 // CHECK10-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP31]], align 4
2211 // CHECK10-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2212 // CHECK10-NEXT:    store i32 0, ptr [[TMP32]], align 4
2213 // CHECK10-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.region_id, ptr [[KERNEL_ARGS]])
2214 // CHECK10-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
2215 // CHECK10-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2216 // CHECK10:       omp_offload.failed:
2217 // CHECK10-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]
2218 // CHECK10-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2219 // CHECK10:       omp_offload.cont:
2220 // CHECK10-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2221 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2222 // CHECK10-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2223 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2224 // CHECK10:       arraydestroy.body:
2225 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2226 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2227 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2228 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2229 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2230 // CHECK10:       arraydestroy.done2:
2231 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2232 // CHECK10-NEXT:    [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4
2233 // CHECK10-NEXT:    ret i32 [[TMP36]]
2234 //
2235 //
2236 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2237 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2238 // CHECK10-NEXT:  entry:
2239 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2240 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2241 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2242 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2243 // CHECK10-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
2244 // CHECK10-NEXT:    ret void
2245 //
2246 //
2247 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2248 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2249 // CHECK10-NEXT:  entry:
2250 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2251 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2252 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2253 // CHECK10-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
2254 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2255 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2256 // CHECK10-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2257 // CHECK10-NEXT:    store float [[TMP0]], ptr [[F]], align 4
2258 // CHECK10-NEXT:    ret void
2259 //
2260 //
2261 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2262 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2263 // CHECK10-NEXT:  entry:
2264 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2265 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2266 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2267 // CHECK10-NEXT:    ret void
2268 //
2269 //
2270 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2271 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2272 // CHECK10-NEXT:  entry:
2273 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2274 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2275 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2276 // CHECK10-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2277 // CHECK10-NEXT:    ret void
2278 //
2279 //
2280 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2281 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2282 // CHECK10-NEXT:  entry:
2283 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2284 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2285 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2286 // CHECK10-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2287 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2288 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2289 // CHECK10-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
2290 // CHECK10-NEXT:    ret void
2291 //
2292 //
2293 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48
2294 // CHECK10-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2295 // CHECK10-NEXT:  entry:
2296 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2297 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2298 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2299 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2300 // CHECK10-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2301 // CHECK10-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2302 // CHECK10-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2303 // CHECK10-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2304 // CHECK10-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2305 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2306 // CHECK10-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2307 // CHECK10-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2308 // CHECK10-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 4
2309 // CHECK10-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
2310 // CHECK10-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])
2311 // CHECK10-NEXT:    ret void
2312 //
2313 //
2314 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined
2315 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2316 // CHECK10-NEXT:  entry:
2317 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2318 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2319 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
2320 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2321 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2322 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2323 // CHECK10-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2324 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
2325 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2326 // CHECK10-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2327 // CHECK10-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2328 // CHECK10-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2329 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2330 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2331 // CHECK10-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
2332 // CHECK10-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
2333 // CHECK10-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2334 // CHECK10-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2335 // CHECK10-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 4
2336 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
2337 // CHECK10-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2338 // CHECK10-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2339 // CHECK10-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2340 // CHECK10-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2341 // CHECK10-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2342 // CHECK10-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2343 // CHECK10-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2344 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
2345 // CHECK10-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2346 // CHECK10-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2347 // CHECK10-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2348 // CHECK10-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 4
2349 // CHECK10-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
2350 // CHECK10-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 4
2351 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2352 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
2353 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2354 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2355 // CHECK10-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4
2356 // CHECK10-NEXT:    store i32 [[TMP5]], ptr [[T_VAR3]], align 4
2357 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC4]], ptr align 4 [[TMP1]], i32 8, i1 false)
2358 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
2359 // CHECK10-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2360 // CHECK10-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP6]]
2361 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE6:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2362 // CHECK10:       omp.arraycpy.body:
2363 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2364 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2365 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2366 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2367 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2368 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP6]]
2369 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_BODY]]
2370 // CHECK10:       omp.arraycpy.done6:
2371 // CHECK10-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[_TMP1]], align 4
2372 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VAR7]], ptr align 4 [[TMP7]], i32 4, i1 false)
2373 // CHECK10-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 4
2374 // CHECK10-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2375 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
2376 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2377 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2378 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
2379 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2380 // CHECK10:       cond.true:
2381 // CHECK10-NEXT:    br label [[COND_END:%.*]]
2382 // CHECK10:       cond.false:
2383 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2384 // CHECK10-NEXT:    br label [[COND_END]]
2385 // CHECK10:       cond.end:
2386 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2387 // CHECK10-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2388 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2389 // CHECK10-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
2390 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2391 // CHECK10:       omp.inner.for.cond:
2392 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2393 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2394 // CHECK10-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2395 // CHECK10-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2396 // CHECK10:       omp.inner.for.cond.cleanup:
2397 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2398 // CHECK10:       omp.inner.for.body:
2399 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2400 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2401 // CHECK10-NEXT:    [[TMP17:%.*]] = load i32, ptr [[T_VAR3]], align 4
2402 // CHECK10-NEXT:    store i32 [[TMP17]], ptr [[T_VAR_CASTED]], align 4
2403 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
2404 // CHECK10-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[_TMP8]], align 4
2405 // CHECK10-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], ptr [[VEC4]], i32 [[TMP18]], ptr [[S_ARR5]], ptr [[TMP19]])
2406 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2407 // CHECK10:       omp.inner.for.inc:
2408 // CHECK10-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2409 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2410 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
2411 // CHECK10-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2412 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
2413 // CHECK10:       omp.inner.for.end:
2414 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2415 // CHECK10:       omp.loop.exit:
2416 // CHECK10-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2417 // CHECK10-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
2418 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
2419 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2420 // CHECK10-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
2421 // CHECK10-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
2422 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2423 // CHECK10:       arraydestroy.body:
2424 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2425 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2426 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2427 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2428 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2429 // CHECK10:       arraydestroy.done11:
2430 // CHECK10-NEXT:    ret void
2431 //
2432 //
2433 // CHECK10-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l48.omp_outlined.omp_outlined
2434 // CHECK10-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2435 // CHECK10-NEXT:  entry:
2436 // CHECK10-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2437 // CHECK10-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2438 // CHECK10-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2439 // CHECK10-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2440 // CHECK10-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2441 // CHECK10-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2442 // CHECK10-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2443 // CHECK10-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2444 // CHECK10-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2445 // CHECK10-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2446 // CHECK10-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2447 // CHECK10-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2448 // CHECK10-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2449 // CHECK10-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2450 // CHECK10-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2451 // CHECK10-NEXT:    [[VEC2:%.*]] = alloca [2 x i32], align 4
2452 // CHECK10-NEXT:    [[S_ARR3:%.*]] = alloca [2 x %struct.S.0], align 4
2453 // CHECK10-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2454 // CHECK10-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 4
2455 // CHECK10-NEXT:    [[I:%.*]] = alloca i32, align 4
2456 // CHECK10-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2457 // CHECK10-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2458 // CHECK10-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2459 // CHECK10-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2460 // CHECK10-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2461 // CHECK10-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2462 // CHECK10-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2463 // CHECK10-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2464 // CHECK10-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2465 // CHECK10-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2466 // CHECK10-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2467 // CHECK10-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 4
2468 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2469 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2470 // CHECK10-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2471 // CHECK10-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2472 // CHECK10-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_LB]], align 4
2473 // CHECK10-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_UB]], align 4
2474 // CHECK10-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2475 // CHECK10-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2476 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC2]], ptr align 4 [[TMP0]], i32 8, i1 false)
2477 // CHECK10-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR3]], i32 0, i32 0
2478 // CHECK10-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2479 // CHECK10-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP5]]
2480 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2481 // CHECK10:       omp.arraycpy.body:
2482 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2483 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2484 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2485 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2486 // CHECK10-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2487 // CHECK10-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP5]]
2488 // CHECK10-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
2489 // CHECK10:       omp.arraycpy.done4:
2490 // CHECK10-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4
2491 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VAR5]], ptr align 4 [[TMP6]], i32 4, i1 false)
2492 // CHECK10-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 4
2493 // CHECK10-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2494 // CHECK10-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2495 // CHECK10-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2496 // CHECK10-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2497 // CHECK10-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
2498 // CHECK10-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2499 // CHECK10:       cond.true:
2500 // CHECK10-NEXT:    br label [[COND_END:%.*]]
2501 // CHECK10:       cond.false:
2502 // CHECK10-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2503 // CHECK10-NEXT:    br label [[COND_END]]
2504 // CHECK10:       cond.end:
2505 // CHECK10-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2506 // CHECK10-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2507 // CHECK10-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2508 // CHECK10-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2509 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2510 // CHECK10:       omp.inner.for.cond:
2511 // CHECK10-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2512 // CHECK10-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2513 // CHECK10-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2514 // CHECK10-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2515 // CHECK10:       omp.inner.for.cond.cleanup:
2516 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2517 // CHECK10:       omp.inner.for.body:
2518 // CHECK10-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2519 // CHECK10-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2520 // CHECK10-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2521 // CHECK10-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2522 // CHECK10-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4
2523 // CHECK10-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
2524 // CHECK10-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC2]], i32 0, i32 [[TMP16]]
2525 // CHECK10-NEXT:    store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4
2526 // CHECK10-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP6]], align 4
2527 // CHECK10-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4
2528 // CHECK10-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR3]], i32 0, i32 [[TMP18]]
2529 // CHECK10-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP17]], i32 4, i1 false)
2530 // CHECK10-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2531 // CHECK10:       omp.body.continue:
2532 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2533 // CHECK10:       omp.inner.for.inc:
2534 // CHECK10-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2535 // CHECK10-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], 1
2536 // CHECK10-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
2537 // CHECK10-NEXT:    br label [[OMP_INNER_FOR_COND]]
2538 // CHECK10:       omp.inner.for.end:
2539 // CHECK10-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2540 // CHECK10:       omp.loop.exit:
2541 // CHECK10-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2542 // CHECK10-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
2543 // CHECK10-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
2544 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2545 // CHECK10-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR3]], i32 0, i32 0
2546 // CHECK10-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
2547 // CHECK10-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2548 // CHECK10:       arraydestroy.body:
2549 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP22]], [[OMP_LOOP_EXIT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2550 // CHECK10-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2551 // CHECK10-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2552 // CHECK10-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2553 // CHECK10-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2554 // CHECK10:       arraydestroy.done11:
2555 // CHECK10-NEXT:    ret void
2556 //
2557 //
2558 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2559 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2560 // CHECK10-NEXT:  entry:
2561 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2562 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2563 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2564 // CHECK10-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2565 // CHECK10-NEXT:    ret void
2566 //
2567 //
2568 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2569 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2570 // CHECK10-NEXT:  entry:
2571 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2572 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2573 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2574 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2575 // CHECK10-NEXT:    store i32 0, ptr [[F]], align 4
2576 // CHECK10-NEXT:    ret void
2577 //
2578 //
2579 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2580 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2581 // CHECK10-NEXT:  entry:
2582 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2583 // CHECK10-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2584 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2585 // CHECK10-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2586 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2587 // CHECK10-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2588 // CHECK10-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2589 // CHECK10-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
2590 // CHECK10-NEXT:    ret void
2591 //
2592 //
2593 // CHECK10-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2594 // CHECK10-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2595 // CHECK10-NEXT:  entry:
2596 // CHECK10-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2597 // CHECK10-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2598 // CHECK10-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2599 // CHECK10-NEXT:    ret void
2600 //
2601 //
2602 // CHECK10-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2603 // CHECK10-SAME: () #[[ATTR6:[0-9]+]] {
2604 // CHECK10-NEXT:  entry:
2605 // CHECK10-NEXT:    call void @__tgt_register_requires(i64 1)
2606 // CHECK10-NEXT:    ret void
2607 //