clang/test/OpenMP/distribute_parallel_for_simd_lastprivate_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
   6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
   7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
   8
   9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5
  10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5
  12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7
  13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7
  15
  16 // RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
  17 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  18 // RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
  19 // RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
  20 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  21 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
  22
  23 // RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13
  24 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  25 // RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13
  26 // RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15
  27 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  28 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15
  29 // expected-no-diagnostics
  30 #ifndef HEADER
  31 #define HEADER
  32
  33 template <class T>
  34 struct S {
  35   T f;
  36   S(T a) : f(a) {}
  37   S() : f() {}
  38   operator T() { return T(); }
  39   ~S() {}
  40 };
  41
  42 template <typename T>
  43 T tmain() {
  44   S<T> test;
  45   T t_var = T();
  46   T vec[] = {1, 2};
  47   S<T> s_arr[] = {1, 2};
  48   S<T> &var = test;
  49   #pragma omp target
  50   #pragma omp teams
  51 #pragma omp distribute parallel for simd lastprivate(t_var, vec, s_arr, s_arr, var, var)
  52   for (int i = 0; i < 2; ++i) {
  53     vec[i] = t_var;
  54     s_arr[i] = var;
  55   }
  56   return T();
  57 }
  58
  59 int main() {
  60   static int svar;
  61   volatile double g;
  62   volatile double &g1 = g;
  63
  64   #ifdef LAMBDA
  65   [&]() {
  66     static float sfvar;
  67
  68     #pragma omp target
  69     #pragma omp teams
  70 #pragma omp distribute parallel for simd lastprivate(g, g1, svar, sfvar)
  71     for (int i = 0; i < 2; ++i) {
  72       // loop variables
  73
  74       // init addr alloca's
  75
  76       // init private variables
  77
  78
  79       // linear counter
  80
  81       // lastprivate
  82
  83
  84
  85       g = 1;
  86       g1 = 1;
  87       svar = 3;
  88       sfvar = 4.0;
  89       // outlined function for 'parallel for'
  90
  91       // addr alloca's
  92
  93       // loop variables
  94
  95       // private alloca's
  96
  97             // init addr alloca's
  98
  99       // init private variables
 100
 101
 102
 103       // loop body
 104
 105
 106       // lastprivate
 107
 108       [&]() {
 109         g = 2;
 110         g1 = 2;
 111         svar = 4;
 112         sfvar = 8.0;
 113
 114       }();
 115     }
 116   }();
 117   return 0;
 118   #else
 119   S<float> test;
 120   int t_var = 0;
 121   int vec[] = {1, 2};
 122   S<float> s_arr[] = {1, 2};
 123   S<float> &var = test;
 124
 125   #pragma omp target
 126   #pragma omp teams
 127 #pragma omp distribute parallel for simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)
 128   for (int i = 0; i < 2; ++i) {
 129     vec[i] = t_var;
 130     s_arr[i] = var;
 131   }
 132   int i;
 133
 134   return tmain<int>();
 135   #endif
 136 }
 137
 138
 139 // skip loop variables
 140
 141 // copy from parameters to local address variables
 142
 143 // load content of local address variables
 144
 145 // call constructor for s_arr
 146
 147 // the distribute loop
 148
 149
 150 // lastprivates
 151
 152
 153 // outlined function for 'parallel for'
 154
 155 // skip loop variables
 156
 157 // copy from parameters to local address variables
 158
 159 // load content of local address variables
 160
 161 // call constructor for s_arr
 162
 163
 164 // loop body
 165 // assignment: vec[i] = t_var;
 166
 167 // assignment: s_arr[i] = var;
 168
 169
 170 // lastprivates
 171
 172
 173 // template tmain
 174
 175
 176 // skip alloca of global_tid and bound_tid
 177 // skip loop variables
 178
 179 // skip init of bound and global tid
 180 // copy from parameters to local address variables
 181
 182 // load content of local address variables
 183
 184
 185
 186 // lastprivates
 187
 188
 189 // outlined function for 'parallel for'
 190
 191 // skip loop variables
 192
 193 // copy from parameters to local address variables
 194
 195 // load content of local address variables
 196
 197 // call constructor for s_arr
 198
 199
 200 // assignment: vec[i] = t_var;
 201
 202 // assignment: s_arr[i] = var;
 203
 204
 205 // lastprivates
 206
 207
 208 #endif
 209
 210 // CHECK1-LABEL: define {{[^@]+}}@main
 211 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 212 // CHECK1-NEXT:  entry:
 213 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 214 // CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8
 215 // CHECK1-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 216 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
 217 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 218 // CHECK1-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 219 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
 220 // CHECK1-NEXT:    store ptr [[G]], ptr [[TMP0]], align 8
 221 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
 222 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8
 223 // CHECK1-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 8
 224 // CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
 225 // CHECK1-NEXT:    ret i32 0
 226 //
 227 //
 228 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
 229 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
 230 // CHECK1-NEXT:  entry:
 231 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca i64, align 8
 232 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca i64, align 8
 233 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
 234 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i64, align 8
 235 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 236 // CHECK1-NEXT:    store i64 [[G]], ptr [[G_ADDR]], align 8
 237 // CHECK1-NEXT:    store i64 [[G1]], ptr [[G1_ADDR]], align 8
 238 // CHECK1-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
 239 // CHECK1-NEXT:    store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
 240 // CHECK1-NEXT:    store ptr [[G1_ADDR]], ptr [[TMP]], align 8
 241 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8
 242 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])
 243 // CHECK1-NEXT:    ret void
 244 //
 245 //
 246 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
 247 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
 248 // CHECK1-NEXT:  entry:
 249 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 250 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 251 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 252 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 8
 253 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8
 254 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 8
 255 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 256 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
 257 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 258 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
 259 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 260 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 261 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 262 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 263 // CHECK1-NEXT:    [[G3:%.*]] = alloca double, align 8
 264 // CHECK1-NEXT:    [[G14:%.*]] = alloca double, align 8
 265 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8
 266 // CHECK1-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4
 267 // CHECK1-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4
 268 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 269 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 270 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 271 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 272 // CHECK1-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 8
 273 // CHECK1-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
 274 // CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
 275 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 276 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8
 277 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
 278 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8
 279 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
 280 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
 281 // CHECK1-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 8
 282 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 283 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 284 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 285 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 286 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
 287 // CHECK1-NEXT:    store ptr [[G14]], ptr [[_TMP5]], align 8
 288 // CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 289 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
 290 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 291 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 292 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
 293 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 294 // CHECK1:       cond.true:
 295 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 296 // CHECK1:       cond.false:
 297 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 298 // CHECK1-NEXT:    br label [[COND_END]]
 299 // CHECK1:       cond.end:
 300 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
 301 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 302 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 303 // CHECK1-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
 304 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 305 // CHECK1:       omp.inner.for.cond:
 306 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]
 307 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP4]]
 308 // CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
 309 // CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 310 // CHECK1:       omp.inner.for.body:
 311 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP4]]
 312 // CHECK1-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i64
 313 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP4]]
 314 // CHECK1-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
 315 // CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP5]], align 8, !llvm.access.group [[ACC_GRP4]]
 316 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i64 [[TMP14]], i64 [[TMP16]], ptr [[G3]], ptr [[TMP17]], ptr [[SVAR6]], ptr [[SFVAR7]]), !llvm.access.group [[ACC_GRP4]]
 317 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 318 // CHECK1:       omp.inner.for.inc:
 319 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
 320 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP4]]
 321 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
 322 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
 323 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
 324 // CHECK1:       omp.inner.for.end:
 325 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 326 // CHECK1:       omp.loop.exit:
 327 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])
 328 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 329 // CHECK1-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
 330 // CHECK1-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 331 // CHECK1:       .omp.final.then:
 332 // CHECK1-NEXT:    store i32 2, ptr [[I]], align 4
 333 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 334 // CHECK1:       .omp.final.done:
 335 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 336 // CHECK1-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
 337 // CHECK1-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 338 // CHECK1:       .omp.lastprivate.then:
 339 // CHECK1-NEXT:    [[TMP24:%.*]] = load double, ptr [[G3]], align 8
 340 // CHECK1-NEXT:    store volatile double [[TMP24]], ptr [[TMP0]], align 8
 341 // CHECK1-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[_TMP5]], align 8
 342 // CHECK1-NEXT:    [[TMP26:%.*]] = load double, ptr [[TMP25]], align 8
 343 // CHECK1-NEXT:    store volatile double [[TMP26]], ptr [[TMP5]], align 8
 344 // CHECK1-NEXT:    [[TMP27:%.*]] = load i32, ptr [[SVAR6]], align 4
 345 // CHECK1-NEXT:    store i32 [[TMP27]], ptr [[TMP2]], align 4
 346 // CHECK1-NEXT:    [[TMP28:%.*]] = load float, ptr [[SFVAR7]], align 4
 347 // CHECK1-NEXT:    store float [[TMP28]], ptr [[TMP3]], align 4
 348 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 349 // CHECK1:       .omp.lastprivate.done:
 350 // CHECK1-NEXT:    ret void
 351 //
 352 //
 353 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
 354 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
 355 // CHECK1-NEXT:  entry:
 356 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 357 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 358 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 359 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 360 // CHECK1-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
 361 // CHECK1-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 8
 362 // CHECK1-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8
 363 // CHECK1-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 8
 364 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 365 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 366 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 367 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 368 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 369 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 370 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 371 // CHECK1-NEXT:    [[G3:%.*]] = alloca double, align 8
 372 // CHECK1-NEXT:    [[G14:%.*]] = alloca double, align 8
 373 // CHECK1-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 8
 374 // CHECK1-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4
 375 // CHECK1-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4
 376 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 377 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
 378 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 379 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 380 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 381 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 382 // CHECK1-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
 383 // CHECK1-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 8
 384 // CHECK1-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
 385 // CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
 386 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8
 387 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8
 388 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
 389 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8
 390 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
 391 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 392 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 393 // CHECK1-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 394 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP4]] to i32
 395 // CHECK1-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 396 // CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32
 397 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 398 // CHECK1-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
 399 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 400 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 401 // CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8
 402 // CHECK1-NEXT:    store ptr [[G14]], ptr [[_TMP5]], align 8
 403 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 404 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
 405 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 406 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 407 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
 408 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 409 // CHECK1:       cond.true:
 410 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 411 // CHECK1:       cond.false:
 412 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 413 // CHECK1-NEXT:    br label [[COND_END]]
 414 // CHECK1:       cond.end:
 415 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
 416 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 417 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 418 // CHECK1-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
 419 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 420 // CHECK1:       omp.inner.for.cond:
 421 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]
 422 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]
 423 // CHECK1-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 424 // CHECK1-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 425 // CHECK1:       omp.inner.for.body:
 426 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
 427 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
 428 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 429 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]
 430 // CHECK1-NEXT:    store double 1.000000e+00, ptr [[G3]], align 8, !llvm.access.group [[ACC_GRP8]]
 431 // CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP5]], align 8, !llvm.access.group [[ACC_GRP8]]
 432 // CHECK1-NEXT:    store volatile double 1.000000e+00, ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP8]]
 433 // CHECK1-NEXT:    store i32 3, ptr [[SVAR6]], align 4, !llvm.access.group [[ACC_GRP8]]
 434 // CHECK1-NEXT:    store float 4.000000e+00, ptr [[SFVAR7]], align 4, !llvm.access.group [[ACC_GRP8]]
 435 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
 436 // CHECK1-NEXT:    store ptr [[G3]], ptr [[TMP16]], align 8, !llvm.access.group [[ACC_GRP8]]
 437 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
 438 // CHECK1-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP5]], align 8, !llvm.access.group [[ACC_GRP8]]
 439 // CHECK1-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 8, !llvm.access.group [[ACC_GRP8]]
 440 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
 441 // CHECK1-NEXT:    store ptr [[SVAR6]], ptr [[TMP19]], align 8, !llvm.access.group [[ACC_GRP8]]
 442 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
 443 // CHECK1-NEXT:    store ptr [[SFVAR7]], ptr [[TMP20]], align 8, !llvm.access.group [[ACC_GRP8]]
 444 // CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP8]]
 445 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 446 // CHECK1:       omp.body.continue:
 447 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 448 // CHECK1:       omp.inner.for.inc:
 449 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
 450 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP21]], 1
 451 // CHECK1-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
 452 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
 453 // CHECK1:       omp.inner.for.end:
 454 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 455 // CHECK1:       omp.loop.exit:
 456 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP8]])
 457 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 458 // CHECK1-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
 459 // CHECK1-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 460 // CHECK1:       .omp.final.then:
 461 // CHECK1-NEXT:    store i32 2, ptr [[I]], align 4
 462 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 463 // CHECK1:       .omp.final.done:
 464 // CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 465 // CHECK1-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
 466 // CHECK1-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 467 // CHECK1:       .omp.lastprivate.then:
 468 // CHECK1-NEXT:    [[TMP26:%.*]] = load double, ptr [[G3]], align 8
 469 // CHECK1-NEXT:    store volatile double [[TMP26]], ptr [[TMP0]], align 8
 470 // CHECK1-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP5]], align 8
 471 // CHECK1-NEXT:    [[TMP28:%.*]] = load double, ptr [[TMP27]], align 8
 472 // CHECK1-NEXT:    store volatile double [[TMP28]], ptr [[TMP6]], align 8
 473 // CHECK1-NEXT:    [[TMP29:%.*]] = load i32, ptr [[SVAR6]], align 4
 474 // CHECK1-NEXT:    store i32 [[TMP29]], ptr [[TMP2]], align 4
 475 // CHECK1-NEXT:    [[TMP30:%.*]] = load float, ptr [[SFVAR7]], align 4
 476 // CHECK1-NEXT:    store float [[TMP30]], ptr [[TMP3]], align 4
 477 // CHECK1-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 478 // CHECK1:       .omp.lastprivate.done:
 479 // CHECK1-NEXT:    ret void
 480 //
 481 //
 482 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 483 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
 484 // CHECK1-NEXT:  entry:
 485 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
 486 // CHECK1-NEXT:    ret void
 487 //
 488 //
 489 // CHECK3-LABEL: define {{[^@]+}}@main
 490 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
 491 // CHECK3-NEXT:  entry:
 492 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 493 // CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8
 494 // CHECK3-NEXT:    [[G1:%.*]] = alloca ptr, align 4
 495 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
 496 // CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 497 // CHECK3-NEXT:    store ptr [[G]], ptr [[G1]], align 4
 498 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
 499 // CHECK3-NEXT:    store ptr [[G]], ptr [[TMP0]], align 4
 500 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
 501 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4
 502 // CHECK3-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 4
 503 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
 504 // CHECK3-NEXT:    ret i32 0
 505 //
 506 //
 507 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
 508 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
 509 // CHECK3-NEXT:  entry:
 510 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
 511 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4
 512 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
 513 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca i32, align 4
 514 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
 515 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
 516 // CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8
 517 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4
 518 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
 519 // CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4
 520 // CHECK3-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
 521 // CHECK3-NEXT:    store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
 522 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
 523 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
 524 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4
 525 // CHECK3-NEXT:    [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8
 526 // CHECK3-NEXT:    store double [[TMP2]], ptr [[G2]], align 8
 527 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
 528 // CHECK3-NEXT:    [[TMP4:%.*]] = load volatile double, ptr [[TMP3]], align 4
 529 // CHECK3-NEXT:    store double [[TMP4]], ptr [[G13]], align 8
 530 // CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4
 531 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4
 532 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])
 533 // CHECK3-NEXT:    ret void
 534 //
 535 //
 536 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
 537 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
 538 // CHECK3-NEXT:  entry:
 539 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 540 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 541 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
 542 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4
 543 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4
 544 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 4
 545 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
 546 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
 547 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 548 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
 549 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 550 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 551 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 552 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 553 // CHECK3-NEXT:    [[G3:%.*]] = alloca double, align 8
 554 // CHECK3-NEXT:    [[G14:%.*]] = alloca double, align 8
 555 // CHECK3-NEXT:    [[_TMP5:%.*]] = alloca ptr, align 4
 556 // CHECK3-NEXT:    [[SVAR6:%.*]] = alloca i32, align 4
 557 // CHECK3-NEXT:    [[SFVAR7:%.*]] = alloca float, align 4
 558 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 559 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 560 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 561 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
 562 // CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4
 563 // CHECK3-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
 564 // CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
 565 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
 566 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
 567 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
 568 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4
 569 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4
 570 // CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
 571 // CHECK3-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 4
 572 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 573 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 574 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 575 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 576 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4
 577 // CHECK3-NEXT:    store ptr [[G14]], ptr [[_TMP5]], align 4
 578 // CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 579 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
 580 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 581 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 582 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
 583 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 584 // CHECK3:       cond.true:
 585 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 586 // CHECK3:       cond.false:
 587 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 588 // CHECK3-NEXT:    br label [[COND_END]]
 589 // CHECK3:       cond.end:
 590 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
 591 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 592 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 593 // CHECK3-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
 594 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 595 // CHECK3:       omp.inner.for.cond:
 596 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
 597 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
 598 // CHECK3-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
 599 // CHECK3-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 600 // CHECK3:       omp.inner.for.body:
 601 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]]
 602 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
 603 // CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP5]], align 4, !llvm.access.group [[ACC_GRP5]]
 604 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i32 [[TMP13]], i32 [[TMP14]], ptr [[G3]], ptr [[TMP15]], ptr [[SVAR6]], ptr [[SFVAR7]]), !llvm.access.group [[ACC_GRP5]]
 605 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 606 // CHECK3:       omp.inner.for.inc:
 607 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
 608 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]]
 609 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
 610 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
 611 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
 612 // CHECK3:       omp.inner.for.end:
 613 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 614 // CHECK3:       omp.loop.exit:
 615 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])
 616 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 617 // CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
 618 // CHECK3-NEXT:    br i1 [[TMP19]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 619 // CHECK3:       .omp.final.then:
 620 // CHECK3-NEXT:    store i32 2, ptr [[I]], align 4
 621 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 622 // CHECK3:       .omp.final.done:
 623 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 624 // CHECK3-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
 625 // CHECK3-NEXT:    br i1 [[TMP21]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 626 // CHECK3:       .omp.lastprivate.then:
 627 // CHECK3-NEXT:    [[TMP22:%.*]] = load double, ptr [[G3]], align 8
 628 // CHECK3-NEXT:    store volatile double [[TMP22]], ptr [[TMP0]], align 8
 629 // CHECK3-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[_TMP5]], align 4
 630 // CHECK3-NEXT:    [[TMP24:%.*]] = load double, ptr [[TMP23]], align 4
 631 // CHECK3-NEXT:    store volatile double [[TMP24]], ptr [[TMP5]], align 4
 632 // CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[SVAR6]], align 4
 633 // CHECK3-NEXT:    store i32 [[TMP25]], ptr [[TMP2]], align 4
 634 // CHECK3-NEXT:    [[TMP26:%.*]] = load float, ptr [[SFVAR7]], align 4
 635 // CHECK3-NEXT:    store float [[TMP26]], ptr [[TMP3]], align 4
 636 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 637 // CHECK3:       .omp.lastprivate.done:
 638 // CHECK3-NEXT:    ret void
 639 //
 640 //
 641 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
 642 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
 643 // CHECK3-NEXT:  entry:
 644 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 645 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 646 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
 647 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
 648 // CHECK3-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 4
 649 // CHECK3-NEXT:    [[G1_ADDR:%.*]] = alloca ptr, align 4
 650 // CHECK3-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4
 651 // CHECK3-NEXT:    [[SFVAR_ADDR:%.*]] = alloca ptr, align 4
 652 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
 653 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 654 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 655 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 656 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 657 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 658 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 659 // CHECK3-NEXT:    [[G2:%.*]] = alloca double, align 8
 660 // CHECK3-NEXT:    [[G13:%.*]] = alloca double, align 8
 661 // CHECK3-NEXT:    [[_TMP4:%.*]] = alloca ptr, align 4
 662 // CHECK3-NEXT:    [[SVAR5:%.*]] = alloca i32, align 4
 663 // CHECK3-NEXT:    [[SFVAR6:%.*]] = alloca float, align 4
 664 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 665 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
 666 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 667 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 668 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 669 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 670 // CHECK3-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 4
 671 // CHECK3-NEXT:    store ptr [[G1]], ptr [[G1_ADDR]], align 4
 672 // CHECK3-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
 673 // CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
 674 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
 675 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
 676 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
 677 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4
 678 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 4
 679 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 680 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 681 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 682 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 683 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_LB]], align 4
 684 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
 685 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 686 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 687 // CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4
 688 // CHECK3-NEXT:    store ptr [[G13]], ptr [[_TMP4]], align 4
 689 // CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 690 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
 691 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 692 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 693 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
 694 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 695 // CHECK3:       cond.true:
 696 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 697 // CHECK3:       cond.false:
 698 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 699 // CHECK3-NEXT:    br label [[COND_END]]
 700 // CHECK3:       cond.end:
 701 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
 702 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 703 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 704 // CHECK3-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
 705 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 706 // CHECK3:       omp.inner.for.cond:
 707 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
 708 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
 709 // CHECK3-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 710 // CHECK3-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 711 // CHECK3:       omp.inner.for.body:
 712 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 713 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
 714 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 715 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
 716 // CHECK3-NEXT:    store double 1.000000e+00, ptr [[G2]], align 8, !llvm.access.group [[ACC_GRP9]]
 717 // CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP4]], align 4, !llvm.access.group [[ACC_GRP9]]
 718 // CHECK3-NEXT:    store volatile double 1.000000e+00, ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP9]]
 719 // CHECK3-NEXT:    store i32 3, ptr [[SVAR5]], align 4, !llvm.access.group [[ACC_GRP9]]
 720 // CHECK3-NEXT:    store float 4.000000e+00, ptr [[SFVAR6]], align 4, !llvm.access.group [[ACC_GRP9]]
 721 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
 722 // CHECK3-NEXT:    store ptr [[G2]], ptr [[TMP16]], align 4, !llvm.access.group [[ACC_GRP9]]
 723 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
 724 // CHECK3-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP4]], align 4, !llvm.access.group [[ACC_GRP9]]
 725 // CHECK3-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 4, !llvm.access.group [[ACC_GRP9]]
 726 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
 727 // CHECK3-NEXT:    store ptr [[SVAR5]], ptr [[TMP19]], align 4, !llvm.access.group [[ACC_GRP9]]
 728 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
 729 // CHECK3-NEXT:    store ptr [[SFVAR6]], ptr [[TMP20]], align 4, !llvm.access.group [[ACC_GRP9]]
 730 // CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP9]]
 731 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 732 // CHECK3:       omp.body.continue:
 733 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 734 // CHECK3:       omp.inner.for.inc:
 735 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 736 // CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], 1
 737 // CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 738 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
 739 // CHECK3:       omp.inner.for.end:
 740 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 741 // CHECK3:       omp.loop.exit:
 742 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP8]])
 743 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 744 // CHECK3-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
 745 // CHECK3-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 746 // CHECK3:       .omp.final.then:
 747 // CHECK3-NEXT:    store i32 2, ptr [[I]], align 4
 748 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 749 // CHECK3:       .omp.final.done:
 750 // CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 751 // CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
 752 // CHECK3-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
 753 // CHECK3:       .omp.lastprivate.then:
 754 // CHECK3-NEXT:    [[TMP26:%.*]] = load double, ptr [[G2]], align 8
 755 // CHECK3-NEXT:    store volatile double [[TMP26]], ptr [[TMP0]], align 8
 756 // CHECK3-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP4]], align 4
 757 // CHECK3-NEXT:    [[TMP28:%.*]] = load double, ptr [[TMP27]], align 4
 758 // CHECK3-NEXT:    store volatile double [[TMP28]], ptr [[TMP6]], align 4
 759 // CHECK3-NEXT:    [[TMP29:%.*]] = load i32, ptr [[SVAR5]], align 4
 760 // CHECK3-NEXT:    store i32 [[TMP29]], ptr [[TMP2]], align 4
 761 // CHECK3-NEXT:    [[TMP30:%.*]] = load float, ptr [[SFVAR6]], align 4
 762 // CHECK3-NEXT:    store float [[TMP30]], ptr [[TMP3]], align 4
 763 // CHECK3-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
 764 // CHECK3:       .omp.lastprivate.done:
 765 // CHECK3-NEXT:    ret void
 766 //
 767 //
 768 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 769 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
 770 // CHECK3-NEXT:  entry:
 771 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
 772 // CHECK3-NEXT:    ret void
 773 //
 774 //
 775 // CHECK5-LABEL: define {{[^@]+}}@main
 776 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
 777 // CHECK5-NEXT:  entry:
 778 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 779 // CHECK5-NEXT:    [[G:%.*]] = alloca double, align 8
 780 // CHECK5-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 781 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
 782 // CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 783 // CHECK5-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 784 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
 785 // CHECK5-NEXT:    store ptr [[G]], ptr [[TMP0]], align 8
 786 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
 787 // CHECK5-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8
 788 // CHECK5-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 8
 789 // CHECK5-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
 790 // CHECK5-NEXT:    ret i32 0
 791 //
 792 //
 793 // CHECK7-LABEL: define {{[^@]+}}@main
 794 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
 795 // CHECK7-NEXT:  entry:
 796 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 797 // CHECK7-NEXT:    [[G:%.*]] = alloca double, align 8
 798 // CHECK7-NEXT:    [[G1:%.*]] = alloca ptr, align 4
 799 // CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
 800 // CHECK7-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 801 // CHECK7-NEXT:    store ptr [[G]], ptr [[G1]], align 4
 802 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
 803 // CHECK7-NEXT:    store ptr [[G]], ptr [[TMP0]], align 4
 804 // CHECK7-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
 805 // CHECK7-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4
 806 // CHECK7-NEXT:    store ptr [[TMP2]], ptr [[TMP1]], align 4
 807 // CHECK7-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
 808 // CHECK7-NEXT:    ret i32 0
 809 //
 810 //
 811 // CHECK9-LABEL: define {{[^@]+}}@main
 812 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
 813 // CHECK9-NEXT:  entry:
 814 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 815 // CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8
 816 // CHECK9-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 817 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 818 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
 819 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
 820 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
 821 // CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
 822 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 823 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
 824 // CHECK9-NEXT:    [[SVAR_CASTED:%.*]] = alloca i64, align 8
 825 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8
 826 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8
 827 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8
 828 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 829 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 830 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
 831 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 832 // CHECK9-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 833 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
 834 // CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4
 835 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
 836 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
 837 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
 838 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
 839 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
 840 // CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
 841 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
 842 // CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8
 843 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
 844 // CHECK9-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
 845 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
 846 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
 847 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4
 848 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4
 849 // CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8
 850 // CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8
 851 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8
 852 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 853 // CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP8]], align 8
 854 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 855 // CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP9]], align 8
 856 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 857 // CHECK9-NEXT:    store ptr null, ptr [[TMP10]], align 8
 858 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 859 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP11]], align 8
 860 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 861 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP12]], align 8
 862 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
 863 // CHECK9-NEXT:    store ptr null, ptr [[TMP13]], align 8
 864 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
 865 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP14]], align 8
 866 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
 867 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP15]], align 8
 868 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
 869 // CHECK9-NEXT:    store ptr null, ptr [[TMP16]], align 8
 870 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
 871 // CHECK9-NEXT:    store ptr [[TMP6]], ptr [[TMP17]], align 8
 872 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
 873 // CHECK9-NEXT:    store ptr [[TMP7]], ptr [[TMP18]], align 8
 874 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
 875 // CHECK9-NEXT:    store ptr null, ptr [[TMP19]], align 8
 876 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
 877 // CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP20]], align 8
 878 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
 879 // CHECK9-NEXT:    store i64 [[TMP5]], ptr [[TMP21]], align 8
 880 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
 881 // CHECK9-NEXT:    store ptr null, ptr [[TMP22]], align 8
 882 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 883 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 884 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 885 // CHECK9-NEXT:    store i32 2, ptr [[TMP25]], align 4
 886 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 887 // CHECK9-NEXT:    store i32 5, ptr [[TMP26]], align 4
 888 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 889 // CHECK9-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
 890 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 891 // CHECK9-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
 892 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 893 // CHECK9-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 8
 894 // CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 895 // CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 8
 896 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 897 // CHECK9-NEXT:    store ptr null, ptr [[TMP31]], align 8
 898 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 899 // CHECK9-NEXT:    store ptr null, ptr [[TMP32]], align 8
 900 // CHECK9-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 901 // CHECK9-NEXT:    store i64 2, ptr [[TMP33]], align 8
 902 // CHECK9-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 903 // CHECK9-NEXT:    store i64 0, ptr [[TMP34]], align 8
 904 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 905 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
 906 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 907 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
 908 // CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 909 // CHECK9-NEXT:    store i32 0, ptr [[TMP37]], align 4
 910 // CHECK9-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.region_id, ptr [[KERNEL_ARGS]])
 911 // CHECK9-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
 912 // CHECK9-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 913 // CHECK9:       omp_offload.failed:
 914 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]
 915 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 916 // CHECK9:       omp_offload.cont:
 917 // CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
 918 // CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
 919 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
 920 // CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 921 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 922 // CHECK9:       arraydestroy.body:
 923 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 924 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 925 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
 926 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
 927 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
 928 // CHECK9:       arraydestroy.done2:
 929 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
 930 // CHECK9-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
 931 // CHECK9-NEXT:    ret i32 [[TMP41]]
 932 //
 933 //
 934 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
 935 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
 936 // CHECK9-NEXT:  entry:
 937 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 938 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 939 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 940 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
 941 // CHECK9-NEXT:    ret void
 942 //
 943 //
 944 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
 945 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
 946 // CHECK9-NEXT:  entry:
 947 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 948 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
 949 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 950 // CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
 951 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 952 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
 953 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
 954 // CHECK9-NEXT:    ret void
 955 //
 956 //
 957 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125
 958 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
 959 // CHECK9-NEXT:  entry:
 960 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
 961 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
 962 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
 963 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
 964 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca i64, align 8
 965 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 966 // CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
 967 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
 968 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
 969 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
 970 // CHECK9-NEXT:    store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
 971 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
 972 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
 973 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
 974 // CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
 975 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
 976 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])
 977 // CHECK9-NEXT:    ret void
 978 //
 979 //
 980 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined
 981 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
 982 // CHECK9-NEXT:  entry:
 983 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 984 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 985 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
 986 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
 987 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
 988 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
 989 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8
 990 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 991 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
 992 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 993 // CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
 994 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 995 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 996 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 997 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 998 // CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
 999 // CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1000 // CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1001 // CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1002 // CHECK9-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
1003 // CHECK9-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4
1004 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1005 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1006 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1007 // CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1008 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1009 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1010 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1011 // CHECK9-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
1012 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1013 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1014 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1015 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1016 // CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
1017 // CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
1018 // CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8
1019 // CHECK9-NEXT:    store ptr [[TMP5]], ptr [[_TMP1]], align 8
1020 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1021 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
1022 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1023 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1024 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1025 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
1026 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1027 // CHECK9:       arrayctor.loop:
1028 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1029 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1030 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
1031 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1032 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1033 // CHECK9:       arrayctor.cont:
1034 // CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 8
1035 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1036 // CHECK9-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
1037 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1038 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1039 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1040 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1041 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1042 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1043 // CHECK9:       cond.true:
1044 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1045 // CHECK9:       cond.false:
1046 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1047 // CHECK9-NEXT:    br label [[COND_END]]
1048 // CHECK9:       cond.end:
1049 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1050 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1051 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1052 // CHECK9-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1053 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1054 // CHECK9:       omp.inner.for.cond:
1055 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
1056 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
1057 // CHECK9-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1058 // CHECK9-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1059 // CHECK9:       omp.inner.for.cond.cleanup:
1060 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1061 // CHECK9:       omp.inner.for.body:
1062 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]]
1063 // CHECK9-NEXT:    [[TMP15:%.*]] = zext i32 [[TMP14]] to i64
1064 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
1065 // CHECK9-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
1066 // CHECK9-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP5]]
1067 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined.omp_outlined, i64 [[TMP15]], i64 [[TMP17]], ptr [[VEC4]], ptr [[T_VAR3]], ptr [[S_ARR5]], ptr [[TMP18]], ptr [[SVAR8]]), !llvm.access.group [[ACC_GRP5]]
1068 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1069 // CHECK9:       omp.inner.for.inc:
1070 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
1071 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]]
1072 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1073 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
1074 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
1075 // CHECK9:       omp.inner.for.end:
1076 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1077 // CHECK9:       omp.loop.exit:
1078 // CHECK9-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1079 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1080 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
1081 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1082 // CHECK9-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1083 // CHECK9-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1084 // CHECK9:       .omp.final.then:
1085 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
1086 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1087 // CHECK9:       .omp.final.done:
1088 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1089 // CHECK9-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1090 // CHECK9-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1091 // CHECK9:       .omp.lastprivate.then:
1092 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[T_VAR3]], align 4
1093 // CHECK9-NEXT:    store i32 [[TMP27]], ptr [[TMP0]], align 4
1094 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i64 8, i1 false)
1095 // CHECK9-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
1096 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i64 2
1097 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP28]]
1098 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1099 // CHECK9:       omp.arraycpy.body:
1100 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1101 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1102 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1103 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1104 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1105 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]
1106 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
1107 // CHECK9:       omp.arraycpy.done11:
1108 // CHECK9-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[_TMP7]], align 8
1109 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP29]], i64 4, i1 false)
1110 // CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr [[SVAR8]], align 4
1111 // CHECK9-NEXT:    store i32 [[TMP30]], ptr [[TMP4]], align 4
1112 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1113 // CHECK9:       .omp.lastprivate.done:
1114 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1115 // CHECK9-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1116 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
1117 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1118 // CHECK9:       arraydestroy.body:
1119 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1120 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1121 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1122 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
1123 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
1124 // CHECK9:       arraydestroy.done13:
1125 // CHECK9-NEXT:    ret void
1126 //
1127 //
1128 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined.omp_outlined
1129 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1130 // CHECK9-NEXT:  entry:
1131 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1132 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1133 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1134 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1135 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1136 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
1137 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1138 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1139 // CHECK9-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 8
1140 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1141 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1142 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1143 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1144 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1145 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1146 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1147 // CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
1148 // CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1149 // CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1150 // CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1151 // CHECK9-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
1152 // CHECK9-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4
1153 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1154 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1155 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1156 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1157 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1158 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1159 // CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1160 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1161 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1162 // CHECK9-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
1163 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1164 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1165 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1166 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1167 // CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
1168 // CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
1169 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1170 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1171 // CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1172 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP5]] to i32
1173 // CHECK9-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1174 // CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
1175 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1176 // CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
1177 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1178 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1179 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1180 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
1181 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1182 // CHECK9:       arrayctor.loop:
1183 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1184 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1185 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
1186 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1187 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1188 // CHECK9:       arrayctor.cont:
1189 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8
1190 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1191 // CHECK9-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
1192 // CHECK9-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1193 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
1194 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1195 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1196 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
1197 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1198 // CHECK9:       cond.true:
1199 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1200 // CHECK9:       cond.false:
1201 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1202 // CHECK9-NEXT:    br label [[COND_END]]
1203 // CHECK9:       cond.end:
1204 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1205 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1206 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1207 // CHECK9-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
1208 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1209 // CHECK9:       omp.inner.for.cond:
1210 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
1211 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
1212 // CHECK9-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1213 // CHECK9-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1214 // CHECK9:       omp.inner.for.cond.cleanup:
1215 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1216 // CHECK9:       omp.inner.for.body:
1217 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1218 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1219 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1220 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
1221 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP9]]
1222 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
1223 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP17]] to i64
1224 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]
1225 // CHECK9-NEXT:    store i32 [[TMP16]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]
1226 // CHECK9-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP9]]
1227 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
1228 // CHECK9-NEXT:    [[IDXPROM10:%.*]] = sext i32 [[TMP19]] to i64
1229 // CHECK9-NEXT:    [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
1230 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX11]], ptr align 4 [[TMP18]], i64 4, i1 false), !llvm.access.group [[ACC_GRP9]]
1231 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1232 // CHECK9:       omp.body.continue:
1233 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1234 // CHECK9:       omp.inner.for.inc:
1235 // CHECK9-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1236 // CHECK9-NEXT:    [[ADD12:%.*]] = add nsw i32 [[TMP20]], 1
1237 // CHECK9-NEXT:    store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
1238 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
1239 // CHECK9:       omp.inner.for.end:
1240 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1241 // CHECK9:       omp.loop.exit:
1242 // CHECK9-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1243 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
1244 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
1245 // CHECK9-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1246 // CHECK9-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1247 // CHECK9-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1248 // CHECK9:       .omp.final.then:
1249 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
1250 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1251 // CHECK9:       .omp.final.done:
1252 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1253 // CHECK9-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
1254 // CHECK9-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1255 // CHECK9:       .omp.lastprivate.then:
1256 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[T_VAR3]], align 4
1257 // CHECK9-NEXT:    store i32 [[TMP27]], ptr [[TMP1]], align 4
1258 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC4]], i64 8, i1 false)
1259 // CHECK9-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
1260 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i64 2
1261 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN13]], [[TMP28]]
1262 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1263 // CHECK9:       omp.arraycpy.body:
1264 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1265 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1266 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1267 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1268 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1269 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]
1270 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
1271 // CHECK9:       omp.arraycpy.done14:
1272 // CHECK9-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[_TMP7]], align 8
1273 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP7]], ptr align 4 [[TMP29]], i64 4, i1 false)
1274 // CHECK9-NEXT:    [[TMP30:%.*]] = load i32, ptr [[SVAR8]], align 4
1275 // CHECK9-NEXT:    store i32 [[TMP30]], ptr [[TMP4]], align 4
1276 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1277 // CHECK9:       .omp.lastprivate.done:
1278 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1279 // CHECK9-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1280 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
1281 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1282 // CHECK9:       arraydestroy.body:
1283 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1284 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1285 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1286 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
1287 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
1288 // CHECK9:       arraydestroy.done16:
1289 // CHECK9-NEXT:    ret void
1290 //
1291 //
1292 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1293 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1294 // CHECK9-NEXT:  entry:
1295 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1296 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1297 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1298 // CHECK9-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1299 // CHECK9-NEXT:    ret void
1300 //
1301 //
1302 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1303 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
1304 // CHECK9-NEXT:  entry:
1305 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1306 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1307 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1308 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1309 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1310 // CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
1311 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1312 // CHECK9-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i64, align 8
1313 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8
1314 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8
1315 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8
1316 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1317 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1318 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1319 // CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4
1320 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
1321 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
1322 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
1323 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
1324 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
1325 // CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
1326 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
1327 // CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8
1328 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1329 // CHECK9-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
1330 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
1331 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
1332 // CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1333 // CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8
1334 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1335 // CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP6]], align 8
1336 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1337 // CHECK9-NEXT:    store i64 [[TMP2]], ptr [[TMP7]], align 8
1338 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1339 // CHECK9-NEXT:    store ptr null, ptr [[TMP8]], align 8
1340 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1341 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP9]], align 8
1342 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1343 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[TMP10]], align 8
1344 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1345 // CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 8
1346 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1347 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 8
1348 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1349 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 8
1350 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1351 // CHECK9-NEXT:    store ptr null, ptr [[TMP14]], align 8
1352 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1353 // CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP15]], align 8
1354 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1355 // CHECK9-NEXT:    store ptr [[TMP5]], ptr [[TMP16]], align 8
1356 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
1357 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
1358 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1359 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1360 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1361 // CHECK9-NEXT:    store i32 2, ptr [[TMP20]], align 4
1362 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1363 // CHECK9-NEXT:    store i32 4, ptr [[TMP21]], align 4
1364 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1365 // CHECK9-NEXT:    store ptr [[TMP18]], ptr [[TMP22]], align 8
1366 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1367 // CHECK9-NEXT:    store ptr [[TMP19]], ptr [[TMP23]], align 8
1368 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1369 // CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP24]], align 8
1370 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1371 // CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP25]], align 8
1372 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1373 // CHECK9-NEXT:    store ptr null, ptr [[TMP26]], align 8
1374 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1375 // CHECK9-NEXT:    store ptr null, ptr [[TMP27]], align 8
1376 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1377 // CHECK9-NEXT:    store i64 2, ptr [[TMP28]], align 8
1378 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1379 // CHECK9-NEXT:    store i64 0, ptr [[TMP29]], align 8
1380 // CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1381 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4
1382 // CHECK9-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1383 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP31]], align 4
1384 // CHECK9-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1385 // CHECK9-NEXT:    store i32 0, ptr [[TMP32]], align 4
1386 // CHECK9-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])
1387 // CHECK9-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
1388 // CHECK9-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1389 // CHECK9:       omp_offload.failed:
1390 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]
1391 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1392 // CHECK9:       omp_offload.cont:
1393 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1394 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1395 // CHECK9-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1396 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1397 // CHECK9:       arraydestroy.body:
1398 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1399 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1400 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1401 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1402 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1403 // CHECK9:       arraydestroy.done2:
1404 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1405 // CHECK9-NEXT:    [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4
1406 // CHECK9-NEXT:    ret i32 [[TMP36]]
1407 //
1408 //
1409 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1410 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1411 // CHECK9-NEXT:  entry:
1412 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1413 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1414 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1415 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1416 // CHECK9-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
1417 // CHECK9-NEXT:    ret void
1418 //
1419 //
1420 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1421 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1422 // CHECK9-NEXT:  entry:
1423 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1424 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1425 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1426 // CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
1427 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1428 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1429 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1430 // CHECK9-NEXT:    store float [[TMP0]], ptr [[F]], align 4
1431 // CHECK9-NEXT:    ret void
1432 //
1433 //
1434 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1435 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1436 // CHECK9-NEXT:  entry:
1437 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1438 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1439 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1440 // CHECK9-NEXT:    ret void
1441 //
1442 //
1443 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1444 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1445 // CHECK9-NEXT:  entry:
1446 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1447 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1448 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1449 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1450 // CHECK9-NEXT:    ret void
1451 //
1452 //
1453 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1454 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1455 // CHECK9-NEXT:  entry:
1456 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1457 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1458 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1459 // CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1460 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1461 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1462 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
1463 // CHECK9-NEXT:    ret void
1464 //
1465 //
1466 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1467 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1468 // CHECK9-NEXT:  entry:
1469 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1470 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1471 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1472 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1473 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1474 // CHECK9-NEXT:    store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1475 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1476 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1477 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1478 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1479 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1480 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1481 // CHECK9-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 8
1482 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
1483 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])
1484 // CHECK9-NEXT:    ret void
1485 //
1486 //
1487 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
1488 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1489 // CHECK9-NEXT:  entry:
1490 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1491 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1492 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
1493 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1494 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1495 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1496 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1497 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
1498 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1499 // CHECK9-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
1500 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1501 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1502 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1503 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1504 // CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
1505 // CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1506 // CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1507 // CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1508 // CHECK9-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
1509 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1510 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1511 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1512 // CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1513 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1514 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1515 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1516 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1517 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1518 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1519 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1520 // CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
1521 // CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1522 // CHECK9-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 8
1523 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1524 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
1525 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1526 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1527 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1528 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1529 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1530 // CHECK9:       arrayctor.loop:
1531 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1532 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1533 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
1534 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1535 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1536 // CHECK9:       arrayctor.cont:
1537 // CHECK9-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
1538 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1539 // CHECK9-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
1540 // CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1541 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1542 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1543 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1544 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1545 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1546 // CHECK9:       cond.true:
1547 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1548 // CHECK9:       cond.false:
1549 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1550 // CHECK9-NEXT:    br label [[COND_END]]
1551 // CHECK9:       cond.end:
1552 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1553 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1554 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1555 // CHECK9-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
1556 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1557 // CHECK9:       omp.inner.for.cond:
1558 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
1559 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
1560 // CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1561 // CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1562 // CHECK9:       omp.inner.for.cond.cleanup:
1563 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1564 // CHECK9:       omp.inner.for.body:
1565 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP14]]
1566 // CHECK9-NEXT:    [[TMP14:%.*]] = zext i32 [[TMP13]] to i64
1567 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
1568 // CHECK9-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
1569 // CHECK9-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP14]]
1570 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i64 [[TMP14]], i64 [[TMP16]], ptr [[VEC4]], ptr [[T_VAR3]], ptr [[S_ARR5]], ptr [[TMP17]]), !llvm.access.group [[ACC_GRP14]]
1571 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1572 // CHECK9:       omp.inner.for.inc:
1573 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1574 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP14]]
1575 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1576 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1577 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1578 // CHECK9:       omp.inner.for.end:
1579 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1580 // CHECK9:       omp.loop.exit:
1581 // CHECK9-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1582 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
1583 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
1584 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1585 // CHECK9-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1586 // CHECK9-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1587 // CHECK9:       .omp.final.then:
1588 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
1589 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1590 // CHECK9:       .omp.final.done:
1591 // CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1592 // CHECK9-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1593 // CHECK9-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1594 // CHECK9:       .omp.lastprivate.then:
1595 // CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[T_VAR3]], align 4
1596 // CHECK9-NEXT:    store i32 [[TMP26]], ptr [[TMP0]], align 4
1597 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i64 8, i1 false)
1598 // CHECK9-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
1599 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i64 2
1600 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN9]], [[TMP27]]
1601 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1602 // CHECK9:       omp.arraycpy.body:
1603 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1604 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1605 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1606 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1607 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1608 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
1609 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
1610 // CHECK9:       omp.arraycpy.done10:
1611 // CHECK9-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP7]], align 8
1612 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP28]], i64 4, i1 false)
1613 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1614 // CHECK9:       .omp.lastprivate.done:
1615 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1616 // CHECK9-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1617 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 2
1618 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1619 // CHECK9:       arraydestroy.body:
1620 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1621 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1622 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1623 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
1624 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
1625 // CHECK9:       arraydestroy.done12:
1626 // CHECK9-NEXT:    ret void
1627 //
1628 //
1629 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
1630 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1631 // CHECK9-NEXT:  entry:
1632 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1633 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1634 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1635 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1636 // CHECK9-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1637 // CHECK9-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
1638 // CHECK9-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1639 // CHECK9-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1640 // CHECK9-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1641 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1642 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1643 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1644 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1645 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1646 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1647 // CHECK9-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
1648 // CHECK9-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
1649 // CHECK9-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1650 // CHECK9-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1651 // CHECK9-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 8
1652 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1653 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1654 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1655 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1656 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1657 // CHECK9-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1658 // CHECK9-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1659 // CHECK9-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1660 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1661 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1662 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1663 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1664 // CHECK9-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1665 // CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 8
1666 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1667 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1668 // CHECK9-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1669 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP4]] to i32
1670 // CHECK9-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1671 // CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP5]] to i32
1672 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1673 // CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
1674 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1675 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1676 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1677 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1678 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1679 // CHECK9:       arrayctor.loop:
1680 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1681 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1682 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
1683 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1684 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1685 // CHECK9:       arrayctor.cont:
1686 // CHECK9-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8
1687 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1688 // CHECK9-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 8
1689 // CHECK9-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1690 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1691 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1692 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1693 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1694 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1695 // CHECK9:       cond.true:
1696 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1697 // CHECK9:       cond.false:
1698 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1699 // CHECK9-NEXT:    br label [[COND_END]]
1700 // CHECK9:       cond.end:
1701 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1702 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1703 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1704 // CHECK9-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1705 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1706 // CHECK9:       omp.inner.for.cond:
1707 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]]
1708 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP17]]
1709 // CHECK9-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1710 // CHECK9-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1711 // CHECK9:       omp.inner.for.cond.cleanup:
1712 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1713 // CHECK9:       omp.inner.for.body:
1714 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1715 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1716 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1717 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]
1718 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP17]]
1719 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]
1720 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1721 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]
1722 // CHECK9-NEXT:    store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP17]]
1723 // CHECK9-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP17]]
1724 // CHECK9-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]
1725 // CHECK9-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP18]] to i64
1726 // CHECK9-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
1727 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group [[ACC_GRP17]]
1728 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1729 // CHECK9:       omp.body.continue:
1730 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1731 // CHECK9:       omp.inner.for.inc:
1732 // CHECK9-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1733 // CHECK9-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP19]], 1
1734 // CHECK9-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1735 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
1736 // CHECK9:       omp.inner.for.end:
1737 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1738 // CHECK9:       omp.loop.exit:
1739 // CHECK9-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1740 // CHECK9-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
1741 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
1742 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1743 // CHECK9-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1744 // CHECK9-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1745 // CHECK9:       .omp.final.then:
1746 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
1747 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1748 // CHECK9:       .omp.final.done:
1749 // CHECK9-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1750 // CHECK9-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1751 // CHECK9-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1752 // CHECK9:       .omp.lastprivate.then:
1753 // CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[T_VAR3]], align 4
1754 // CHECK9-NEXT:    store i32 [[TMP26]], ptr [[TMP1]], align 4
1755 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC4]], i64 8, i1 false)
1756 // CHECK9-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
1757 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
1758 // CHECK9-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP27]]
1759 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1760 // CHECK9:       omp.arraycpy.body:
1761 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1762 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1763 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1764 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1765 // CHECK9-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1766 // CHECK9-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
1767 // CHECK9-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
1768 // CHECK9:       omp.arraycpy.done13:
1769 // CHECK9-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP7]], align 8
1770 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i64 4, i1 false)
1771 // CHECK9-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
1772 // CHECK9:       .omp.lastprivate.done:
1773 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1774 // CHECK9-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1775 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
1776 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1777 // CHECK9:       arraydestroy.body:
1778 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1779 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1780 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1781 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1782 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1783 // CHECK9:       arraydestroy.done15:
1784 // CHECK9-NEXT:    ret void
1785 //
1786 //
1787 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1788 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1789 // CHECK9-NEXT:  entry:
1790 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1791 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1792 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1793 // CHECK9-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1794 // CHECK9-NEXT:    ret void
1795 //
1796 //
1797 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1798 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1799 // CHECK9-NEXT:  entry:
1800 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1801 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1802 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1803 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1804 // CHECK9-NEXT:    store i32 0, ptr [[F]], align 4
1805 // CHECK9-NEXT:    ret void
1806 //
1807 //
1808 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1809 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1810 // CHECK9-NEXT:  entry:
1811 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1812 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1813 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1814 // CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1815 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1816 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1817 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1818 // CHECK9-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
1819 // CHECK9-NEXT:    ret void
1820 //
1821 //
1822 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1823 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1824 // CHECK9-NEXT:  entry:
1825 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1826 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1827 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1828 // CHECK9-NEXT:    ret void
1829 //
1830 //
1831 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1832 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1833 // CHECK9-NEXT:  entry:
1834 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
1835 // CHECK9-NEXT:    ret void
1836 //
1837 //
1838 // CHECK11-LABEL: define {{[^@]+}}@main
1839 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
1840 // CHECK11-NEXT:  entry:
1841 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1842 // CHECK11-NEXT:    [[G:%.*]] = alloca double, align 8
1843 // CHECK11-NEXT:    [[G1:%.*]] = alloca ptr, align 4
1844 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1845 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1846 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1847 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1848 // CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
1849 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
1850 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1851 // CHECK11-NEXT:    [[SVAR_CASTED:%.*]] = alloca i32, align 4
1852 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4
1853 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4
1854 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4
1855 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1856 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1857 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1858 // CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1859 // CHECK11-NEXT:    store ptr [[G]], ptr [[G1]], align 4
1860 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1861 // CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 4
1862 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)
1863 // CHECK11-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1864 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1865 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i32 1
1866 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1867 // CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
1868 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
1869 // CHECK11-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 4
1870 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1871 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
1872 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
1873 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1874 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4
1875 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4
1876 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4
1877 // CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4
1878 // CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4
1879 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1880 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP8]], align 4
1881 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1882 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP9]], align 4
1883 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1884 // CHECK11-NEXT:    store ptr null, ptr [[TMP10]], align 4
1885 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1886 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP11]], align 4
1887 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1888 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP12]], align 4
1889 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1890 // CHECK11-NEXT:    store ptr null, ptr [[TMP13]], align 4
1891 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1892 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP14]], align 4
1893 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1894 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP15]], align 4
1895 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1896 // CHECK11-NEXT:    store ptr null, ptr [[TMP16]], align 4
1897 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1898 // CHECK11-NEXT:    store ptr [[TMP6]], ptr [[TMP17]], align 4
1899 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1900 // CHECK11-NEXT:    store ptr [[TMP7]], ptr [[TMP18]], align 4
1901 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1902 // CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 4
1903 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1904 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP20]], align 4
1905 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1906 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP21]], align 4
1907 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1908 // CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 4
1909 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1910 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1911 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1912 // CHECK11-NEXT:    store i32 2, ptr [[TMP25]], align 4
1913 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1914 // CHECK11-NEXT:    store i32 5, ptr [[TMP26]], align 4
1915 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1916 // CHECK11-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
1917 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1918 // CHECK11-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
1919 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1920 // CHECK11-NEXT:    store ptr @.offload_sizes, ptr [[TMP29]], align 4
1921 // CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1922 // CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP30]], align 4
1923 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1924 // CHECK11-NEXT:    store ptr null, ptr [[TMP31]], align 4
1925 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1926 // CHECK11-NEXT:    store ptr null, ptr [[TMP32]], align 4
1927 // CHECK11-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1928 // CHECK11-NEXT:    store i64 2, ptr [[TMP33]], align 8
1929 // CHECK11-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1930 // CHECK11-NEXT:    store i64 0, ptr [[TMP34]], align 8
1931 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1932 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
1933 // CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1934 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
1935 // CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1936 // CHECK11-NEXT:    store i32 0, ptr [[TMP37]], align 4
1937 // CHECK11-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.region_id, ptr [[KERNEL_ARGS]])
1938 // CHECK11-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
1939 // CHECK11-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1940 // CHECK11:       omp_offload.failed:
1941 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]
1942 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1943 // CHECK11:       omp_offload.cont:
1944 // CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1945 // CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
1946 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1947 // CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1948 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1949 // CHECK11:       arraydestroy.body:
1950 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1951 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1952 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1953 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1954 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1955 // CHECK11:       arraydestroy.done2:
1956 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1957 // CHECK11-NEXT:    [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
1958 // CHECK11-NEXT:    ret i32 [[TMP41]]
1959 //
1960 //
1961 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1962 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1963 // CHECK11-NEXT:  entry:
1964 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1965 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1966 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1967 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1968 // CHECK11-NEXT:    ret void
1969 //
1970 //
1971 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1972 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1973 // CHECK11-NEXT:  entry:
1974 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1975 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1976 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1977 // CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
1978 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1979 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1980 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1981 // CHECK11-NEXT:    ret void
1982 //
1983 //
1984 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125
1985 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1986 // CHECK11-NEXT:  entry:
1987 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1988 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
1989 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1990 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
1991 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca i32, align 4
1992 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
1993 // CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1994 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1995 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1996 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1997 // CHECK11-NEXT:    store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
1998 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1999 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2000 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2001 // CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 4
2002 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
2003 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])
2004 // CHECK11-NEXT:    ret void
2005 //
2006 //
2007 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined
2008 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2009 // CHECK11-NEXT:  entry:
2010 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2011 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2012 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
2013 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2014 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2015 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2016 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4
2017 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2018 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
2019 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2020 // CHECK11-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2021 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2022 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2023 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2024 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2025 // CHECK11-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
2026 // CHECK11-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
2027 // CHECK11-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
2028 // CHECK11-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2029 // CHECK11-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 4
2030 // CHECK11-NEXT:    [[SVAR8:%.*]] = alloca i32, align 4
2031 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2032 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2033 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2034 // CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2035 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2036 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2037 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2038 // CHECK11-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
2039 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
2040 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2041 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2042 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2043 // CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
2044 // CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 4
2045 // CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4
2046 // CHECK11-NEXT:    store ptr [[TMP5]], ptr [[_TMP1]], align 4
2047 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2048 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
2049 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2050 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2051 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
2052 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
2053 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2054 // CHECK11:       arrayctor.loop:
2055 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2056 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2057 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
2058 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2059 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2060 // CHECK11:       arrayctor.cont:
2061 // CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 4
2062 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
2063 // CHECK11-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 4
2064 // CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2065 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2066 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2067 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2068 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
2069 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2070 // CHECK11:       cond.true:
2071 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2072 // CHECK11:       cond.false:
2073 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2074 // CHECK11-NEXT:    br label [[COND_END]]
2075 // CHECK11:       cond.end:
2076 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2077 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2078 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2079 // CHECK11-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2080 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2081 // CHECK11:       omp.inner.for.cond:
2082 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
2083 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
2084 // CHECK11-NEXT:    [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2085 // CHECK11-NEXT:    br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2086 // CHECK11:       omp.inner.for.cond.cleanup:
2087 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2088 // CHECK11:       omp.inner.for.body:
2089 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP6]]
2090 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
2091 // CHECK11-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 4, !llvm.access.group [[ACC_GRP6]]
2092 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 7, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined.omp_outlined, i32 [[TMP14]], i32 [[TMP15]], ptr [[VEC4]], ptr [[T_VAR3]], ptr [[S_ARR5]], ptr [[TMP16]], ptr [[SVAR8]]), !llvm.access.group [[ACC_GRP6]]
2093 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2094 // CHECK11:       omp.inner.for.inc:
2095 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
2096 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP6]]
2097 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2098 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
2099 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2100 // CHECK11:       omp.inner.for.end:
2101 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2102 // CHECK11:       omp.loop.exit:
2103 // CHECK11-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2104 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
2105 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
2106 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2107 // CHECK11-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
2108 // CHECK11-NEXT:    br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2109 // CHECK11:       .omp.final.then:
2110 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
2111 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2112 // CHECK11:       .omp.final.done:
2113 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2114 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2115 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2116 // CHECK11:       .omp.lastprivate.then:
2117 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[T_VAR3]], align 4
2118 // CHECK11-NEXT:    store i32 [[TMP25]], ptr [[TMP0]], align 4
2119 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i32 8, i1 false)
2120 // CHECK11-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
2121 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i32 2
2122 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP26]]
2123 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2124 // CHECK11:       omp.arraycpy.body:
2125 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2126 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2127 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2128 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2129 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2130 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]
2131 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
2132 // CHECK11:       omp.arraycpy.done11:
2133 // CHECK11-NEXT:    [[TMP27:%.*]] = load ptr, ptr [[_TMP7]], align 4
2134 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP27]], i32 4, i1 false)
2135 // CHECK11-NEXT:    [[TMP28:%.*]] = load i32, ptr [[SVAR8]], align 4
2136 // CHECK11-NEXT:    store i32 [[TMP28]], ptr [[TMP4]], align 4
2137 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2138 // CHECK11:       .omp.lastprivate.done:
2139 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2140 // CHECK11-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
2141 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i32 2
2142 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2143 // CHECK11:       arraydestroy.body:
2144 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2145 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2146 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2147 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
2148 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
2149 // CHECK11:       arraydestroy.done13:
2150 // CHECK11-NEXT:    ret void
2151 //
2152 //
2153 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l125.omp_outlined.omp_outlined
2154 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
2155 // CHECK11-NEXT:  entry:
2156 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2157 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2158 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2159 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2160 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2161 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
2162 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2163 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2164 // CHECK11-NEXT:    [[SVAR_ADDR:%.*]] = alloca ptr, align 4
2165 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2166 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2167 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2168 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2169 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2170 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2171 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2172 // CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2173 // CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2174 // CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
2175 // CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2176 // CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 4
2177 // CHECK11-NEXT:    [[SVAR7:%.*]] = alloca i32, align 4
2178 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2179 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2180 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2181 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2182 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2183 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2184 // CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2185 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2186 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2187 // CHECK11-NEXT:    store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
2188 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2189 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
2190 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2191 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2192 // CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
2193 // CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 4
2194 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2195 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2196 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2197 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2198 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_LB]], align 4
2199 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
2200 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2201 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2202 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
2203 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
2204 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2205 // CHECK11:       arrayctor.loop:
2206 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2207 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2208 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
2209 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2210 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2211 // CHECK11:       arrayctor.cont:
2212 // CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4
2213 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2214 // CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 4
2215 // CHECK11-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2216 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
2217 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2218 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2219 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP10]], 1
2220 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2221 // CHECK11:       cond.true:
2222 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2223 // CHECK11:       cond.false:
2224 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2225 // CHECK11-NEXT:    br label [[COND_END]]
2226 // CHECK11:       cond.end:
2227 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2228 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2229 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2230 // CHECK11-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
2231 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2232 // CHECK11:       omp.inner.for.cond:
2233 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
2234 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
2235 // CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2236 // CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2237 // CHECK11:       omp.inner.for.cond.cleanup:
2238 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2239 // CHECK11:       omp.inner.for.body:
2240 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2241 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2242 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2243 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
2244 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP10]]
2245 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
2246 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP17]]
2247 // CHECK11-NEXT:    store i32 [[TMP16]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]
2248 // CHECK11-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP10]]
2249 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
2250 // CHECK11-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP19]]
2251 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP18]], i32 4, i1 false), !llvm.access.group [[ACC_GRP10]]
2252 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2253 // CHECK11:       omp.body.continue:
2254 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2255 // CHECK11:       omp.inner.for.inc:
2256 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2257 // CHECK11-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP20]], 1
2258 // CHECK11-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
2259 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
2260 // CHECK11:       omp.inner.for.end:
2261 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2262 // CHECK11:       omp.loop.exit:
2263 // CHECK11-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2264 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
2265 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
2266 // CHECK11-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2267 // CHECK11-NEXT:    [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
2268 // CHECK11-NEXT:    br i1 [[TMP24]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2269 // CHECK11:       .omp.final.then:
2270 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
2271 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2272 // CHECK11:       .omp.final.done:
2273 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2274 // CHECK11-NEXT:    [[TMP26:%.*]] = icmp ne i32 [[TMP25]], 0
2275 // CHECK11-NEXT:    br i1 [[TMP26]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2276 // CHECK11:       .omp.lastprivate.then:
2277 // CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[T_VAR2]], align 4
2278 // CHECK11-NEXT:    store i32 [[TMP27]], ptr [[TMP1]], align 4
2279 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)
2280 // CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
2281 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
2282 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP28]]
2283 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2284 // CHECK11:       omp.arraycpy.body:
2285 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2286 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2287 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2288 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2289 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2290 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP28]]
2291 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
2292 // CHECK11:       omp.arraycpy.done12:
2293 // CHECK11-NEXT:    [[TMP29:%.*]] = load ptr, ptr [[_TMP6]], align 4
2294 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP7]], ptr align 4 [[TMP29]], i32 4, i1 false)
2295 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[SVAR7]], align 4
2296 // CHECK11-NEXT:    store i32 [[TMP30]], ptr [[TMP4]], align 4
2297 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2298 // CHECK11:       .omp.lastprivate.done:
2299 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2300 // CHECK11-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
2301 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
2302 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2303 // CHECK11:       arraydestroy.body:
2304 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP31]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2305 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2306 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2307 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2308 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2309 // CHECK11:       arraydestroy.done14:
2310 // CHECK11-NEXT:    ret void
2311 //
2312 //
2313 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2314 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2315 // CHECK11-NEXT:  entry:
2316 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2317 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2318 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2319 // CHECK11-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2320 // CHECK11-NEXT:    ret void
2321 //
2322 //
2323 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2324 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
2325 // CHECK11-NEXT:  entry:
2326 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2327 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2328 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2329 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2330 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2331 // CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
2332 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2333 // CHECK11-NEXT:    [[T_VAR_CASTED:%.*]] = alloca i32, align 4
2334 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4
2335 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4
2336 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4
2337 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2338 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2339 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2340 // CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2341 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
2342 // CHECK11-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2343 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
2344 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i32 1
2345 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
2346 // CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
2347 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
2348 // CHECK11-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 4
2349 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
2350 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
2351 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
2352 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
2353 // CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
2354 // CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4
2355 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2356 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP6]], align 4
2357 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2358 // CHECK11-NEXT:    store i32 [[TMP2]], ptr [[TMP7]], align 4
2359 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2360 // CHECK11-NEXT:    store ptr null, ptr [[TMP8]], align 4
2361 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2362 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP9]], align 4
2363 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2364 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[TMP10]], align 4
2365 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2366 // CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 4
2367 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2368 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP12]], align 4
2369 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2370 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[TMP13]], align 4
2371 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2372 // CHECK11-NEXT:    store ptr null, ptr [[TMP14]], align 4
2373 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
2374 // CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP15]], align 4
2375 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
2376 // CHECK11-NEXT:    store ptr [[TMP5]], ptr [[TMP16]], align 4
2377 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
2378 // CHECK11-NEXT:    store ptr null, ptr [[TMP17]], align 4
2379 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2380 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2381 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2382 // CHECK11-NEXT:    store i32 2, ptr [[TMP20]], align 4
2383 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2384 // CHECK11-NEXT:    store i32 4, ptr [[TMP21]], align 4
2385 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2386 // CHECK11-NEXT:    store ptr [[TMP18]], ptr [[TMP22]], align 4
2387 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2388 // CHECK11-NEXT:    store ptr [[TMP19]], ptr [[TMP23]], align 4
2389 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2390 // CHECK11-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP24]], align 4
2391 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2392 // CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP25]], align 4
2393 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2394 // CHECK11-NEXT:    store ptr null, ptr [[TMP26]], align 4
2395 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2396 // CHECK11-NEXT:    store ptr null, ptr [[TMP27]], align 4
2397 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2398 // CHECK11-NEXT:    store i64 2, ptr [[TMP28]], align 8
2399 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2400 // CHECK11-NEXT:    store i64 0, ptr [[TMP29]], align 8
2401 // CHECK11-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2402 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4
2403 // CHECK11-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2404 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP31]], align 4
2405 // CHECK11-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2406 // CHECK11-NEXT:    store i32 0, ptr [[TMP32]], align 4
2407 // CHECK11-NEXT:    [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])
2408 // CHECK11-NEXT:    [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
2409 // CHECK11-NEXT:    br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2410 // CHECK11:       omp_offload.failed:
2411 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]
2412 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2413 // CHECK11:       omp_offload.cont:
2414 // CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2415 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2416 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2417 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2418 // CHECK11:       arraydestroy.body:
2419 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2420 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2421 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2422 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
2423 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
2424 // CHECK11:       arraydestroy.done2:
2425 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2426 // CHECK11-NEXT:    [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4
2427 // CHECK11-NEXT:    ret i32 [[TMP36]]
2428 //
2429 //
2430 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2431 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2432 // CHECK11-NEXT:  entry:
2433 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2434 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2435 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2436 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2437 // CHECK11-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
2438 // CHECK11-NEXT:    ret void
2439 //
2440 //
2441 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2442 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2443 // CHECK11-NEXT:  entry:
2444 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2445 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2446 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2447 // CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
2448 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2449 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2450 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2451 // CHECK11-NEXT:    store float [[TMP0]], ptr [[F]], align 4
2452 // CHECK11-NEXT:    ret void
2453 //
2454 //
2455 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2456 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2457 // CHECK11-NEXT:  entry:
2458 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2459 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2460 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2461 // CHECK11-NEXT:    ret void
2462 //
2463 //
2464 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2465 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2466 // CHECK11-NEXT:  entry:
2467 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2468 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2469 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2470 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2471 // CHECK11-NEXT:    ret void
2472 //
2473 //
2474 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2475 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2476 // CHECK11-NEXT:  entry:
2477 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2478 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2479 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2480 // CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2481 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2482 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2483 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
2484 // CHECK11-NEXT:    ret void
2485 //
2486 //
2487 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
2488 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2489 // CHECK11-NEXT:  entry:
2490 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca i32, align 4
2491 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2492 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2493 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2494 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2495 // CHECK11-NEXT:    store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2496 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2497 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2498 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2499 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2500 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2501 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2502 // CHECK11-NEXT:    store ptr [[TMP2]], ptr [[TMP]], align 4
2503 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
2504 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])
2505 // CHECK11-NEXT:    ret void
2506 //
2507 //
2508 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
2509 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2510 // CHECK11-NEXT:  entry:
2511 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2512 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2513 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
2514 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2515 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2516 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2517 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2518 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
2519 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2520 // CHECK11-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
2521 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2522 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2523 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2524 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2525 // CHECK11-NEXT:    [[T_VAR3:%.*]] = alloca i32, align 4
2526 // CHECK11-NEXT:    [[VEC4:%.*]] = alloca [2 x i32], align 4
2527 // CHECK11-NEXT:    [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
2528 // CHECK11-NEXT:    [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2529 // CHECK11-NEXT:    [[_TMP7:%.*]] = alloca ptr, align 4
2530 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2531 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2532 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2533 // CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2534 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2535 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2536 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2537 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
2538 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2539 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2540 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2541 // CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 4
2542 // CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
2543 // CHECK11-NEXT:    store ptr [[TMP4]], ptr [[_TMP1]], align 4
2544 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2545 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
2546 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2547 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2548 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
2549 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2550 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2551 // CHECK11:       arrayctor.loop:
2552 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2553 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2554 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
2555 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2556 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2557 // CHECK11:       arrayctor.cont:
2558 // CHECK11-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4
2559 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
2560 // CHECK11-NEXT:    store ptr [[VAR6]], ptr [[_TMP7]], align 4
2561 // CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2562 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
2563 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2564 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2565 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
2566 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2567 // CHECK11:       cond.true:
2568 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2569 // CHECK11:       cond.false:
2570 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2571 // CHECK11-NEXT:    br label [[COND_END]]
2572 // CHECK11:       cond.end:
2573 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
2574 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2575 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2576 // CHECK11-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
2577 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2578 // CHECK11:       omp.inner.for.cond:
2579 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
2580 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
2581 // CHECK11-NEXT:    [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
2582 // CHECK11-NEXT:    br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2583 // CHECK11:       omp.inner.for.cond.cleanup:
2584 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2585 // CHECK11:       omp.inner.for.body:
2586 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP15]]
2587 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
2588 // CHECK11-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[_TMP7]], align 4, !llvm.access.group [[ACC_GRP15]]
2589 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i32 [[TMP13]], i32 [[TMP14]], ptr [[VEC4]], ptr [[T_VAR3]], ptr [[S_ARR5]], ptr [[TMP15]]), !llvm.access.group [[ACC_GRP15]]
2590 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2591 // CHECK11:       omp.inner.for.inc:
2592 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
2593 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP15]]
2594 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2595 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
2596 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
2597 // CHECK11:       omp.inner.for.end:
2598 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2599 // CHECK11:       omp.loop.exit:
2600 // CHECK11-NEXT:    [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2601 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
2602 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])
2603 // CHECK11-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2604 // CHECK11-NEXT:    [[TMP21:%.*]] = icmp ne i32 [[TMP20]], 0
2605 // CHECK11-NEXT:    br i1 [[TMP21]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2606 // CHECK11:       .omp.final.then:
2607 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
2608 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2609 // CHECK11:       .omp.final.done:
2610 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2611 // CHECK11-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2612 // CHECK11-NEXT:    br i1 [[TMP23]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2613 // CHECK11:       .omp.lastprivate.then:
2614 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[T_VAR3]], align 4
2615 // CHECK11-NEXT:    store i32 [[TMP24]], ptr [[TMP0]], align 4
2616 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i32 8, i1 false)
2617 // CHECK11-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
2618 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 2
2619 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN9]], [[TMP25]]
2620 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE10:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2621 // CHECK11:       omp.arraycpy.body:
2622 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2623 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN9]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2624 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2625 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2626 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2627 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP25]]
2628 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE10]], label [[OMP_ARRAYCPY_BODY]]
2629 // CHECK11:       omp.arraycpy.done10:
2630 // CHECK11-NEXT:    [[TMP26:%.*]] = load ptr, ptr [[_TMP7]], align 4
2631 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP26]], i32 4, i1 false)
2632 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2633 // CHECK11:       .omp.lastprivate.done:
2634 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
2635 // CHECK11-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
2636 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2
2637 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2638 // CHECK11:       arraydestroy.body:
2639 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP27]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2640 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2641 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2642 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN11]]
2643 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE12:%.*]], label [[ARRAYDESTROY_BODY]]
2644 // CHECK11:       arraydestroy.done12:
2645 // CHECK11-NEXT:    ret void
2646 //
2647 //
2648 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
2649 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
2650 // CHECK11-NEXT:  entry:
2651 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2652 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2653 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2654 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2655 // CHECK11-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 4
2656 // CHECK11-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
2657 // CHECK11-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
2658 // CHECK11-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 4
2659 // CHECK11-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
2660 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2661 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
2662 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2663 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2664 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2665 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2666 // CHECK11-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2667 // CHECK11-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2668 // CHECK11-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
2669 // CHECK11-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2670 // CHECK11-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 4
2671 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
2672 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2673 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2674 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2675 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2676 // CHECK11-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
2677 // CHECK11-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
2678 // CHECK11-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
2679 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
2680 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
2681 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
2682 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
2683 // CHECK11-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
2684 // CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP]], align 4
2685 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2686 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2687 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2688 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2689 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_LB]], align 4
2690 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
2691 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2692 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2693 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
2694 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2695 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2696 // CHECK11:       arrayctor.loop:
2697 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2698 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2699 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
2700 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2701 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2702 // CHECK11:       arrayctor.cont:
2703 // CHECK11-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4
2704 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2705 // CHECK11-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 4
2706 // CHECK11-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2707 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2708 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP8]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2709 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2710 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
2711 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2712 // CHECK11:       cond.true:
2713 // CHECK11-NEXT:    br label [[COND_END:%.*]]
2714 // CHECK11:       cond.false:
2715 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2716 // CHECK11-NEXT:    br label [[COND_END]]
2717 // CHECK11:       cond.end:
2718 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
2719 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2720 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2721 // CHECK11-NEXT:    store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
2722 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2723 // CHECK11:       omp.inner.for.cond:
2724 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
2725 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
2726 // CHECK11-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2727 // CHECK11-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2728 // CHECK11:       omp.inner.for.cond.cleanup:
2729 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2730 // CHECK11:       omp.inner.for.body:
2731 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
2732 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2733 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2734 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
2735 // CHECK11-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP18]]
2736 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
2737 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP16]]
2738 // CHECK11-NEXT:    store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]
2739 // CHECK11-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP18]]
2740 // CHECK11-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
2741 // CHECK11-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP18]]
2742 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group [[ACC_GRP18]]
2743 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2744 // CHECK11:       omp.body.continue:
2745 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2746 // CHECK11:       omp.inner.for.inc:
2747 // CHECK11-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
2748 // CHECK11-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], 1
2749 // CHECK11-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
2750 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
2751 // CHECK11:       omp.inner.for.end:
2752 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2753 // CHECK11:       omp.loop.exit:
2754 // CHECK11-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2755 // CHECK11-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
2756 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
2757 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2758 // CHECK11-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
2759 // CHECK11-NEXT:    br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
2760 // CHECK11:       .omp.final.then:
2761 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
2762 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
2763 // CHECK11:       .omp.final.done:
2764 // CHECK11-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
2765 // CHECK11-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
2766 // CHECK11-NEXT:    br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
2767 // CHECK11:       .omp.lastprivate.then:
2768 // CHECK11-NEXT:    [[TMP26:%.*]] = load i32, ptr [[T_VAR2]], align 4
2769 // CHECK11-NEXT:    store i32 [[TMP26]], ptr [[TMP1]], align 4
2770 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)
2771 // CHECK11-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
2772 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
2773 // CHECK11-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP27]]
2774 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2775 // CHECK11:       omp.arraycpy.body:
2776 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2777 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2778 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2779 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2780 // CHECK11-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2781 // CHECK11-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
2782 // CHECK11-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
2783 // CHECK11:       omp.arraycpy.done11:
2784 // CHECK11-NEXT:    [[TMP28:%.*]] = load ptr, ptr [[_TMP6]], align 4
2785 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i32 4, i1 false)
2786 // CHECK11-NEXT:    br label [[DOTOMP_LASTPRIVATE_DONE]]
2787 // CHECK11:       .omp.lastprivate.done:
2788 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2789 // CHECK11-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
2790 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2
2791 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2792 // CHECK11:       arraydestroy.body:
2793 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP29]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2794 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2795 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2796 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
2797 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
2798 // CHECK11:       arraydestroy.done13:
2799 // CHECK11-NEXT:    ret void
2800 //
2801 //
2802 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2803 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2804 // CHECK11-NEXT:  entry:
2805 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2806 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2807 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2808 // CHECK11-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2809 // CHECK11-NEXT:    ret void
2810 //
2811 //
2812 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2813 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2814 // CHECK11-NEXT:  entry:
2815 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2816 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2817 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2818 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2819 // CHECK11-NEXT:    store i32 0, ptr [[F]], align 4
2820 // CHECK11-NEXT:    ret void
2821 //
2822 //
2823 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2824 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2825 // CHECK11-NEXT:  entry:
2826 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2827 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2828 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2829 // CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2830 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2831 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2832 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2833 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
2834 // CHECK11-NEXT:    ret void
2835 //
2836 //
2837 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2838 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2839 // CHECK11-NEXT:  entry:
2840 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2841 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2842 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2843 // CHECK11-NEXT:    ret void
2844 //
2845 //
2846 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2847 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
2848 // CHECK11-NEXT:  entry:
2849 // CHECK11-NEXT:    call void @__tgt_register_requires(i64 1)
2850 // CHECK11-NEXT:    ret void
2851 //
2852 //
2853 // CHECK13-LABEL: define {{[^@]+}}@main
2854 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
2855 // CHECK13-NEXT:  entry:
2856 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2857 // CHECK13-NEXT:    [[G:%.*]] = alloca double, align 8
2858 // CHECK13-NEXT:    [[G1:%.*]] = alloca ptr, align 8
2859 // CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2860 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2861 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2862 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2863 // CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
2864 // CHECK13-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2865 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
2866 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
2867 // CHECK13-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
2868 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2869 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2870 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2871 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
2872 // CHECK13-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
2873 // CHECK13-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
2874 // CHECK13-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
2875 // CHECK13-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S]], align 4
2876 // CHECK13-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 8
2877 // CHECK13-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
2878 // CHECK13-NEXT:    [[I16:%.*]] = alloca i32, align 4
2879 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2880 // CHECK13-NEXT:    store ptr [[G]], ptr [[G1]], align 8
2881 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2882 // CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2883 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
2884 // CHECK13-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
2885 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
2886 // CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
2887 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
2888 // CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
2889 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
2890 // CHECK13-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8
2891 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8
2892 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
2893 // CHECK13-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 8
2894 // CHECK13-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 8
2895 // CHECK13-NEXT:    store ptr [[TMP3]], ptr [[_TMP2]], align 8
2896 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2897 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2898 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2899 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2900 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 0
2901 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
2902 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2903 // CHECK13:       arrayctor.loop:
2904 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2905 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2906 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
2907 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2908 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2909 // CHECK13:       arrayctor.cont:
2910 // CHECK13-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 8
2911 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])
2912 // CHECK13-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 8
2913 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2914 // CHECK13:       omp.inner.for.cond:
2915 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
2916 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
2917 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2918 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2919 // CHECK13:       omp.inner.for.cond.cleanup:
2920 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2921 // CHECK13:       omp.inner.for.body:
2922 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2923 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2924 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2925 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2926 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP2]]
2927 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2928 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
2929 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i64 0, i64 [[IDXPROM]]
2930 // CHECK13-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]
2931 // CHECK13-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 8, !llvm.access.group [[ACC_GRP2]]
2932 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2933 // CHECK13-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP12]] to i64
2934 // CHECK13-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i64 0, i64 [[IDXPROM9]]
2935 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP11]], i64 4, i1 false), !llvm.access.group [[ACC_GRP2]]
2936 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2937 // CHECK13:       omp.body.continue:
2938 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2939 // CHECK13:       omp.inner.for.inc:
2940 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2941 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP13]], 1
2942 // CHECK13-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2943 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2944 // CHECK13:       omp.inner.for.end:
2945 // CHECK13-NEXT:    store i32 2, ptr [[I]], align 4
2946 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 4
2947 // CHECK13-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 4
2948 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i64 8, i1 false)
2949 // CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2950 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
2951 // CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP15]]
2952 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2953 // CHECK13:       omp.arraycpy.body:
2954 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2955 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2956 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
2957 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2958 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2959 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
2960 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
2961 // CHECK13:       omp.arraycpy.done13:
2962 // CHECK13-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 8
2963 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i64 4, i1 false)
2964 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SVAR]], align 4
2965 // CHECK13-NEXT:    store i32 [[TMP17]], ptr @_ZZ4mainE4svar, align 4
2966 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4:[0-9]+]]
2967 // CHECK13-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 0
2968 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2
2969 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2970 // CHECK13:       arraydestroy.body:
2971 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2972 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2973 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2974 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
2975 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
2976 // CHECK13:       arraydestroy.done15:
2977 // CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
2978 // CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
2979 // CHECK13-NEXT:    [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2980 // CHECK13-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN17]], i64 2
2981 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY18:%.*]]
2982 // CHECK13:       arraydestroy.body18:
2983 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST19:%.*]] = phi ptr [ [[TMP19]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT20:%.*]], [[ARRAYDESTROY_BODY18]] ]
2984 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT20]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST19]], i64 -1
2985 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT20]]) #[[ATTR4]]
2986 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE21:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT20]], [[ARRAY_BEGIN17]]
2987 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_DONE22:%.*]], label [[ARRAYDESTROY_BODY18]]
2988 // CHECK13:       arraydestroy.done22:
2989 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2990 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[RETVAL]], align 4
2991 // CHECK13-NEXT:    ret i32 [[TMP20]]
2992 //
2993 //
2994 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2995 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
2996 // CHECK13-NEXT:  entry:
2997 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2998 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2999 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3000 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3001 // CHECK13-NEXT:    ret void
3002 //
3003 //
3004 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3005 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3006 // CHECK13-NEXT:  entry:
3007 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3008 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3009 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3010 // CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
3011 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3012 // CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
3013 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
3014 // CHECK13-NEXT:    ret void
3015 //
3016 //
3017 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3018 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3019 // CHECK13-NEXT:  entry:
3020 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3021 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3022 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3023 // CHECK13-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3024 // CHECK13-NEXT:    ret void
3025 //
3026 //
3027 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3028 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat {
3029 // CHECK13-NEXT:  entry:
3030 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3031 // CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3032 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3033 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3034 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3035 // CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
3036 // CHECK13-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
3037 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
3038 // CHECK13-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
3039 // CHECK13-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
3040 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3041 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3042 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3043 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
3044 // CHECK13-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
3045 // CHECK13-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
3046 // CHECK13-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 4
3047 // CHECK13-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 4
3048 // CHECK13-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 8
3049 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
3050 // CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 4
3051 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
3052 // CHECK13-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
3053 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
3054 // CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
3055 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
3056 // CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
3057 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
3058 // CHECK13-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 8
3059 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8
3060 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
3061 // CHECK13-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 8
3062 // CHECK13-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 8
3063 // CHECK13-NEXT:    store ptr [[TMP3]], ptr [[_TMP2]], align 8
3064 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3065 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3066 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3067 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3068 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 0
3069 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
3070 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3071 // CHECK13:       arrayctor.loop:
3072 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3073 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3074 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
3075 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3076 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3077 // CHECK13:       arrayctor.cont:
3078 // CHECK13-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 8
3079 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])
3080 // CHECK13-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 8
3081 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3082 // CHECK13:       omp.inner.for.cond:
3083 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
3084 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
3085 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3086 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3087 // CHECK13:       omp.inner.for.cond.cleanup:
3088 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3089 // CHECK13:       omp.inner.for.body:
3090 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
3091 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3092 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3093 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
3094 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP6]]
3095 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
3096 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
3097 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i64 0, i64 [[IDXPROM]]
3098 // CHECK13-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]
3099 // CHECK13-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 8, !llvm.access.group [[ACC_GRP6]]
3100 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
3101 // CHECK13-NEXT:    [[IDXPROM9:%.*]] = sext i32 [[TMP12]] to i64
3102 // CHECK13-NEXT:    [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i64 0, i64 [[IDXPROM9]]
3103 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP11]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]]
3104 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3105 // CHECK13:       omp.body.continue:
3106 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3107 // CHECK13:       omp.inner.for.inc:
3108 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
3109 // CHECK13-NEXT:    [[ADD11:%.*]] = add nsw i32 [[TMP13]], 1
3110 // CHECK13-NEXT:    store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
3111 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3112 // CHECK13:       omp.inner.for.end:
3113 // CHECK13-NEXT:    store i32 2, ptr [[I]], align 4
3114 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 4
3115 // CHECK13-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 4
3116 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i64 8, i1 false)
3117 // CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
3118 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
3119 // CHECK13-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP15]]
3120 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3121 // CHECK13:       omp.arraycpy.body:
3122 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3123 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3124 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
3125 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3126 // CHECK13-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3127 // CHECK13-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
3128 // CHECK13-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
3129 // CHECK13:       omp.arraycpy.done13:
3130 // CHECK13-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 8
3131 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i64 4, i1 false)
3132 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
3133 // CHECK13-NEXT:    [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 0
3134 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
3135 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3136 // CHECK13:       arraydestroy.body:
3137 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3138 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
3139 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3140 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
3141 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
3142 // CHECK13:       arraydestroy.done15:
3143 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3144 // CHECK13-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
3145 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN16]], i64 2
3146 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]
3147 // CHECK13:       arraydestroy.body17:
3148 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
3149 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1
3150 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]]
3151 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
3152 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
3153 // CHECK13:       arraydestroy.done21:
3154 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3155 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 4
3156 // CHECK13-NEXT:    ret i32 [[TMP19]]
3157 //
3158 //
3159 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3160 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3161 // CHECK13-NEXT:  entry:
3162 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3163 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3164 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3165 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3166 // CHECK13-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
3167 // CHECK13-NEXT:    ret void
3168 //
3169 //
3170 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3171 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3172 // CHECK13-NEXT:  entry:
3173 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3174 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3175 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3176 // CHECK13-NEXT:    ret void
3177 //
3178 //
3179 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3180 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3181 // CHECK13-NEXT:  entry:
3182 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3183 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3184 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3185 // CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
3186 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3187 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3188 // CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
3189 // CHECK13-NEXT:    store float [[TMP0]], ptr [[F]], align 4
3190 // CHECK13-NEXT:    ret void
3191 //
3192 //
3193 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3194 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3195 // CHECK13-NEXT:  entry:
3196 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3197 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3198 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3199 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3200 // CHECK13-NEXT:    ret void
3201 //
3202 //
3203 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3204 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3205 // CHECK13-NEXT:  entry:
3206 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3207 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3208 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3209 // CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3210 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3211 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3212 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
3213 // CHECK13-NEXT:    ret void
3214 //
3215 //
3216 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3217 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3218 // CHECK13-NEXT:  entry:
3219 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3220 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3221 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3222 // CHECK13-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3223 // CHECK13-NEXT:    ret void
3224 //
3225 //
3226 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3227 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3228 // CHECK13-NEXT:  entry:
3229 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3230 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3231 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3232 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
3233 // CHECK13-NEXT:    store i32 0, ptr [[F]], align 4
3234 // CHECK13-NEXT:    ret void
3235 //
3236 //
3237 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3238 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3239 // CHECK13-NEXT:  entry:
3240 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3241 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3242 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3243 // CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3244 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3245 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
3246 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3247 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
3248 // CHECK13-NEXT:    ret void
3249 //
3250 //
3251 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3252 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3253 // CHECK13-NEXT:  entry:
3254 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3255 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3256 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3257 // CHECK13-NEXT:    ret void
3258 //
3259 //
3260 // CHECK15-LABEL: define {{[^@]+}}@main
3261 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
3262 // CHECK15-NEXT:  entry:
3263 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3264 // CHECK15-NEXT:    [[G:%.*]] = alloca double, align 8
3265 // CHECK15-NEXT:    [[G1:%.*]] = alloca ptr, align 4
3266 // CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
3267 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3268 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3269 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
3270 // CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
3271 // CHECK15-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
3272 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
3273 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4
3274 // CHECK15-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
3275 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3276 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3277 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3278 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
3279 // CHECK15-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
3280 // CHECK15-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
3281 // CHECK15-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
3282 // CHECK15-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S]], align 4
3283 // CHECK15-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 4
3284 // CHECK15-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
3285 // CHECK15-NEXT:    [[I15:%.*]] = alloca i32, align 4
3286 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3287 // CHECK15-NEXT:    store ptr [[G]], ptr [[G1]], align 4
3288 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
3289 // CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 4
3290 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)
3291 // CHECK15-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
3292 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
3293 // CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i32 1
3294 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
3295 // CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
3296 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
3297 // CHECK15-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 4
3298 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4
3299 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4
3300 // CHECK15-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 4
3301 // CHECK15-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 4
3302 // CHECK15-NEXT:    store ptr [[TMP3]], ptr [[_TMP2]], align 4
3303 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3304 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3305 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3306 // CHECK15-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3307 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 0
3308 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
3309 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3310 // CHECK15:       arrayctor.loop:
3311 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3312 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3313 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
3314 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3315 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3316 // CHECK15:       arrayctor.cont:
3317 // CHECK15-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 4
3318 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])
3319 // CHECK15-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 4
3320 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3321 // CHECK15:       omp.inner.for.cond:
3322 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]
3323 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]
3324 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3325 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3326 // CHECK15:       omp.inner.for.cond.cleanup:
3327 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3328 // CHECK15:       omp.inner.for.body:
3329 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
3330 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3331 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3332 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
3333 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP3]]
3334 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
3335 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i32 0, i32 [[TMP10]]
3336 // CHECK15-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]
3337 // CHECK15-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 4, !llvm.access.group [[ACC_GRP3]]
3338 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
3339 // CHECK15-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 [[TMP12]]
3340 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP11]], i32 4, i1 false), !llvm.access.group [[ACC_GRP3]]
3341 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3342 // CHECK15:       omp.body.continue:
3343 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3344 // CHECK15:       omp.inner.for.inc:
3345 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
3346 // CHECK15-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP13]], 1
3347 // CHECK15-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
3348 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3349 // CHECK15:       omp.inner.for.end:
3350 // CHECK15-NEXT:    store i32 2, ptr [[I]], align 4
3351 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 4
3352 // CHECK15-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 4
3353 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i32 8, i1 false)
3354 // CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
3355 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
3356 // CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP15]]
3357 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3358 // CHECK15:       omp.arraycpy.body:
3359 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3360 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3361 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
3362 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3363 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3364 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
3365 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
3366 // CHECK15:       omp.arraycpy.done12:
3367 // CHECK15-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 4
3368 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i32 4, i1 false)
3369 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[SVAR]], align 4
3370 // CHECK15-NEXT:    store i32 [[TMP17]], ptr @_ZZ4mainE4svar, align 4
3371 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4:[0-9]+]]
3372 // CHECK15-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 0
3373 // CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
3374 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3375 // CHECK15:       arraydestroy.body:
3376 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3377 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3378 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3379 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
3380 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
3381 // CHECK15:       arraydestroy.done14:
3382 // CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
3383 // CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
3384 // CHECK15-NEXT:    [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
3385 // CHECK15-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN16]], i32 2
3386 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY17:%.*]]
3387 // CHECK15:       arraydestroy.body17:
3388 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP19]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
3389 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i32 -1
3390 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]]
3391 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
3392 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
3393 // CHECK15:       arraydestroy.done21:
3394 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3395 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[RETVAL]], align 4
3396 // CHECK15-NEXT:    ret i32 [[TMP20]]
3397 //
3398 //
3399 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
3400 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
3401 // CHECK15-NEXT:  entry:
3402 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3403 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3404 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3405 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3406 // CHECK15-NEXT:    ret void
3407 //
3408 //
3409 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
3410 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3411 // CHECK15-NEXT:  entry:
3412 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3413 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3414 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3415 // CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
3416 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3417 // CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
3418 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
3419 // CHECK15-NEXT:    ret void
3420 //
3421 //
3422 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
3423 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3424 // CHECK15-NEXT:  entry:
3425 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3426 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3427 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3428 // CHECK15-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3429 // CHECK15-NEXT:    ret void
3430 //
3431 //
3432 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
3433 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat {
3434 // CHECK15-NEXT:  entry:
3435 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
3436 // CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
3437 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
3438 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
3439 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
3440 // CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
3441 // CHECK15-NEXT:    [[TMP:%.*]] = alloca ptr, align 4
3442 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
3443 // CHECK15-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4
3444 // CHECK15-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
3445 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3446 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3447 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3448 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
3449 // CHECK15-NEXT:    [[T_VAR4:%.*]] = alloca i32, align 4
3450 // CHECK15-NEXT:    [[VEC5:%.*]] = alloca [2 x i32], align 4
3451 // CHECK15-NEXT:    [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 4
3452 // CHECK15-NEXT:    [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 4
3453 // CHECK15-NEXT:    [[_TMP8:%.*]] = alloca ptr, align 4
3454 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
3455 // CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 4
3456 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
3457 // CHECK15-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
3458 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
3459 // CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i32 1
3460 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
3461 // CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
3462 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
3463 // CHECK15-NEXT:    store ptr [[TMP0]], ptr [[TMP]], align 4
3464 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4
3465 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4
3466 // CHECK15-NEXT:    store ptr [[TMP2]], ptr [[_TMP1]], align 4
3467 // CHECK15-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 4
3468 // CHECK15-NEXT:    store ptr [[TMP3]], ptr [[_TMP2]], align 4
3469 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3470 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
3471 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3472 // CHECK15-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
3473 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 0
3474 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
3475 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
3476 // CHECK15:       arrayctor.loop:
3477 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
3478 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
3479 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
3480 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
3481 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
3482 // CHECK15:       arrayctor.cont:
3483 // CHECK15-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 4
3484 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])
3485 // CHECK15-NEXT:    store ptr [[VAR7]], ptr [[_TMP8]], align 4
3486 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3487 // CHECK15:       omp.inner.for.cond:
3488 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
3489 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]]
3490 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3491 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
3492 // CHECK15:       omp.inner.for.cond.cleanup:
3493 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
3494 // CHECK15:       omp.inner.for.body:
3495 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
3496 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
3497 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3498 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
3499 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP7]]
3500 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
3501 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i32 0, i32 [[TMP10]]
3502 // CHECK15-NEXT:    store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]]
3503 // CHECK15-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 4, !llvm.access.group [[ACC_GRP7]]
3504 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
3505 // CHECK15-NEXT:    [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 [[TMP12]]
3506 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP11]], i32 4, i1 false), !llvm.access.group [[ACC_GRP7]]
3507 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3508 // CHECK15:       omp.body.continue:
3509 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3510 // CHECK15:       omp.inner.for.inc:
3511 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
3512 // CHECK15-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP13]], 1
3513 // CHECK15-NEXT:    store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
3514 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
3515 // CHECK15:       omp.inner.for.end:
3516 // CHECK15-NEXT:    store i32 2, ptr [[I]], align 4
3517 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 4
3518 // CHECK15-NEXT:    store i32 [[TMP14]], ptr [[T_VAR]], align 4
3519 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i32 8, i1 false)
3520 // CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
3521 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2
3522 // CHECK15-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP15]]
3523 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
3524 // CHECK15:       omp.arraycpy.body:
3525 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3526 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
3527 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
3528 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
3529 // CHECK15-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
3530 // CHECK15-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
3531 // CHECK15-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
3532 // CHECK15:       omp.arraycpy.done12:
3533 // CHECK15-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 4
3534 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i32 4, i1 false)
3535 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
3536 // CHECK15-NEXT:    [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 0
3537 // CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i32 2
3538 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
3539 // CHECK15:       arraydestroy.body:
3540 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
3541 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
3542 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
3543 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
3544 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
3545 // CHECK15:       arraydestroy.done14:
3546 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
3547 // CHECK15-NEXT:    [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
3548 // CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN15]], i32 2
3549 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY16:%.*]]
3550 // CHECK15:       arraydestroy.body16:
3551 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
3552 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i32 -1
3553 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]]
3554 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
3555 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
3556 // CHECK15:       arraydestroy.done20:
3557 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
3558 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 4
3559 // CHECK15-NEXT:    ret i32 [[TMP19]]
3560 //
3561 //
3562 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
3563 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3564 // CHECK15-NEXT:  entry:
3565 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3566 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3567 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3568 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3569 // CHECK15-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
3570 // CHECK15-NEXT:    ret void
3571 //
3572 //
3573 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
3574 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3575 // CHECK15-NEXT:  entry:
3576 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3577 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3578 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3579 // CHECK15-NEXT:    ret void
3580 //
3581 //
3582 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
3583 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3584 // CHECK15-NEXT:  entry:
3585 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3586 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
3587 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3588 // CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
3589 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3590 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
3591 // CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
3592 // CHECK15-NEXT:    store float [[TMP0]], ptr [[F]], align 4
3593 // CHECK15-NEXT:    ret void
3594 //
3595 //
3596 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
3597 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3598 // CHECK15-NEXT:  entry:
3599 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3600 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3601 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3602 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
3603 // CHECK15-NEXT:    ret void
3604 //
3605 //
3606 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
3607 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3608 // CHECK15-NEXT:  entry:
3609 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3610 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3611 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3612 // CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3613 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3614 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3615 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
3616 // CHECK15-NEXT:    ret void
3617 //
3618 //
3619 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
3620 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3621 // CHECK15-NEXT:  entry:
3622 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3623 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3624 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3625 // CHECK15-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
3626 // CHECK15-NEXT:    ret void
3627 //
3628 //
3629 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
3630 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3631 // CHECK15-NEXT:  entry:
3632 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3633 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3634 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3635 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
3636 // CHECK15-NEXT:    store i32 0, ptr [[F]], align 4
3637 // CHECK15-NEXT:    ret void
3638 //
3639 //
3640 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
3641 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3642 // CHECK15-NEXT:  entry:
3643 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3644 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3645 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3646 // CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3647 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3648 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
3649 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3650 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
3651 // CHECK15-NEXT:    ret void
3652 //
3653 //
3654 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
3655 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
3656 // CHECK15-NEXT:  entry:
3657 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3658 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3659 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3660 // CHECK15-NEXT:    ret void
3661 //