clang/test/OpenMP/distribute_parallel_for_simd_private_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
   6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
   7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
   8
   9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
  10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
  13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
  15
  16 // RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
  17 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  18 // RUN: %clang_cc1  -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
  19 // RUN: %clang_cc1  -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
  20 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  21 // RUN: %clang_cc1  -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
  22
  23 // RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
  24 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  25 // RUN: %clang_cc1  -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
  26 // RUN: %clang_cc1  -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
  27 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  28 // RUN: %clang_cc1  -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
  29 // expected-no-diagnostics
  30 #ifndef HEADER
  31 #define HEADER
  32
  33 template <class T>
  34 struct S {
  35   T f;
  36   S(T a) : f(a) {}
  37   S() : f() {}
  38   operator T() { return T(); }
  39   ~S() {}
  40 };
  41
  42 template <typename T>
  43 T tmain() {
  44   S<T> test;
  45   T t_var = T();
  46   T vec[] = {1, 2};
  47   S<T> s_arr[] = {1, 2};
  48   S<T> &var = test;
  49   #pragma omp target
  50   #pragma omp teams
  51   #pragma omp distribute parallel for simd private(t_var, vec, s_arr, s_arr, var, var)
  52   for (int i = 0; i < 2; ++i) {
  53     vec[i] = t_var;
  54     s_arr[i] = var;
  55   }
  56   return T();
  57 }
  58
  59 int main() {
  60   static int svar;
  61   volatile double g;
  62   volatile double &g1 = g;
  63
  64   #ifdef LAMBDA
  65   [&]() {
  66     static float sfvar;
  67
  68     #pragma omp target
  69     #pragma omp teams
  70     #pragma omp distribute parallel for simd private(g, g1, svar, sfvar)
  71     for (int i = 0; i < 2; ++i) {
  72
  73
  74       g = 1;
  75       g1 = 1;
  76       svar = 3;
  77       sfvar = 4.0;
  78       [&]() {
  79         g = 2;
  80         g1 = 2;
  81         svar = 4;
  82         sfvar = 8.0;
  83
  84       }();
  85     }
  86   }();
  87   return 0;
  88   #else
  89   S<float> test;
  90   int t_var = 0;
  91   int vec[] = {1, 2};
  92   S<float> s_arr[] = {1, 2};
  93   S<float> &var = test;
  94
  95   #pragma omp target
  96   #pragma omp teams
  97   #pragma omp distribute parallel for simd private(t_var, vec, s_arr, s_arr, var, var, svar)
  98   for (int i = 0; i < 2; ++i) {
  99     vec[i] = t_var;
 100     s_arr[i] = var;
 101   }
 102   return tmain<int>();
 103   #endif
 104 }
 105
 106
 107
 108 // this is the ctor loop
 109
 110 // call destructors: var..
 111
 112 // ..and s_arr
 113
 114
 115 // By OpenMP specifications, private applies to both distribute and parallel for.
 116 // However, the support for 'private' of 'parallel' is only used when 'parallel'
 117 // is found alone. Therefore we only have one 'private' support for 'parallel for'
 118 // in combination
 119 // this is the ctor loop
 120
 121 // call destructors: var..
 122
 123 // ..and s_arr
 124
 125
 126 // template tmain with S_INT_TY
 127
 128
 129
 130 // this is the ctor loop
 131
 132 // call destructors: var..
 133
 134 // ..and s_arr
 135
 136
 137 #endif
 138 // CHECK1-LABEL: define {{[^@]+}}@main
 139 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 140 // CHECK1-NEXT:  entry:
 141 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 142 // CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8
 143 // CHECK1-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 144 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
 145 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 146 // CHECK1-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 147 // CHECK1-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
 148 // CHECK1-NEXT:    ret i32 0
 149 //
 150 //
 151 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
 152 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] {
 153 // CHECK1-NEXT:  entry:
 154 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)
 155 // CHECK1-NEXT:    ret void
 156 //
 157 //
 158 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
 159 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
 160 // CHECK1-NEXT:  entry:
 161 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 162 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 163 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 164 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 165 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
 166 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 167 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 168 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 169 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 170 // CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8
 171 // CHECK1-NEXT:    [[G1:%.*]] = alloca double, align 8
 172 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
 173 // CHECK1-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
 174 // CHECK1-NEXT:    [[SFVAR:%.*]] = alloca float, align 4
 175 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 176 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 177 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 178 // CHECK1-NEXT:    store ptr undef, ptr [[_TMP1]], align 8
 179 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 180 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 181 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 182 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 183 // CHECK1-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 8
 184 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 185 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 186 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 187 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 188 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
 189 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 190 // CHECK1:       cond.true:
 191 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 192 // CHECK1:       cond.false:
 193 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 194 // CHECK1-NEXT:    br label [[COND_END]]
 195 // CHECK1:       cond.end:
 196 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 197 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 198 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 199 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 200 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 201 // CHECK1:       omp.inner.for.cond:
 202 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]
 203 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP4]]
 204 // CHECK1-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 205 // CHECK1-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 206 // CHECK1:       omp.inner.for.body:
 207 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP4]]
 208 // CHECK1-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 209 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP4]]
 210 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 211 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP4]]
 212 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 213 // CHECK1:       omp.inner.for.inc:
 214 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
 215 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP4]]
 216 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 217 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
 218 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
 219 // CHECK1:       omp.inner.for.end:
 220 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 221 // CHECK1:       omp.loop.exit:
 222 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 223 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 224 // CHECK1-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 225 // CHECK1-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 226 // CHECK1:       .omp.final.then:
 227 // CHECK1-NEXT:    store i32 2, ptr [[I]], align 4
 228 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 229 // CHECK1:       .omp.final.done:
 230 // CHECK1-NEXT:    ret void
 231 //
 232 //
 233 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
 234 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] {
 235 // CHECK1-NEXT:  entry:
 236 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 237 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 238 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 239 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 240 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 241 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 242 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
 243 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 244 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 245 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 246 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 247 // CHECK1-NEXT:    [[G:%.*]] = alloca double, align 8
 248 // CHECK1-NEXT:    [[G1:%.*]] = alloca double, align 8
 249 // CHECK1-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
 250 // CHECK1-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
 251 // CHECK1-NEXT:    [[SFVAR:%.*]] = alloca float, align 4
 252 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 253 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
 254 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 255 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 256 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 257 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 258 // CHECK1-NEXT:    store ptr undef, ptr [[_TMP1]], align 8
 259 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 260 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 261 // CHECK1-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 262 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 263 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 264 // CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
 265 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 266 // CHECK1-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
 267 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 268 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 269 // CHECK1-NEXT:    store ptr [[G1]], ptr [[_TMP3]], align 8
 270 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 271 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 272 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 273 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 274 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
 275 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 276 // CHECK1:       cond.true:
 277 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 278 // CHECK1:       cond.false:
 279 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 280 // CHECK1-NEXT:    br label [[COND_END]]
 281 // CHECK1:       cond.end:
 282 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 283 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 284 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 285 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 286 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 287 // CHECK1:       omp.inner.for.cond:
 288 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]
 289 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]
 290 // CHECK1-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 291 // CHECK1-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 292 // CHECK1:       omp.inner.for.body:
 293 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
 294 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 295 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 296 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]
 297 // CHECK1-NEXT:    store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP8]]
 298 // CHECK1-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP3]], align 8, !llvm.access.group [[ACC_GRP8]]
 299 // CHECK1-NEXT:    store volatile double 1.000000e+00, ptr [[TMP10]], align 8, !llvm.access.group [[ACC_GRP8]]
 300 // CHECK1-NEXT:    store i32 3, ptr [[SVAR]], align 4, !llvm.access.group [[ACC_GRP8]]
 301 // CHECK1-NEXT:    store float 4.000000e+00, ptr [[SFVAR]], align 4, !llvm.access.group [[ACC_GRP8]]
 302 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
 303 // CHECK1-NEXT:    store ptr [[G]], ptr [[TMP11]], align 8, !llvm.access.group [[ACC_GRP8]]
 304 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
 305 // CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[_TMP3]], align 8, !llvm.access.group [[ACC_GRP8]]
 306 // CHECK1-NEXT:    store ptr [[TMP13]], ptr [[TMP12]], align 8, !llvm.access.group [[ACC_GRP8]]
 307 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
 308 // CHECK1-NEXT:    store ptr [[SVAR]], ptr [[TMP14]], align 8, !llvm.access.group [[ACC_GRP8]]
 309 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
 310 // CHECK1-NEXT:    store ptr [[SFVAR]], ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP8]]
 311 // CHECK1-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP8]]
 312 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 313 // CHECK1:       omp.body.continue:
 314 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 315 // CHECK1:       omp.inner.for.inc:
 316 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
 317 // CHECK1-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP16]], 1
 318 // CHECK1-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
 319 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
 320 // CHECK1:       omp.inner.for.end:
 321 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 322 // CHECK1:       omp.loop.exit:
 323 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
 324 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 325 // CHECK1-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
 326 // CHECK1-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 327 // CHECK1:       .omp.final.then:
 328 // CHECK1-NEXT:    store i32 2, ptr [[I]], align 4
 329 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 330 // CHECK1:       .omp.final.done:
 331 // CHECK1-NEXT:    ret void
 332 //
 333 //
 334 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 335 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
 336 // CHECK1-NEXT:  entry:
 337 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
 338 // CHECK1-NEXT:    ret void
 339 //
 340 //
 341 // CHECK3-LABEL: define {{[^@]+}}@main
 342 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
 343 // CHECK3-NEXT:  entry:
 344 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 345 // CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8
 346 // CHECK3-NEXT:    [[G1:%.*]] = alloca ptr, align 4
 347 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
 348 // CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 349 // CHECK3-NEXT:    store ptr [[G]], ptr [[G1]], align 4
 350 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
 351 // CHECK3-NEXT:    ret i32 0
 352 //
 353 //
 354 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
 355 // CHECK3-SAME: () #[[ATTR2:[0-9]+]] {
 356 // CHECK3-NEXT:  entry:
 357 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined)
 358 // CHECK3-NEXT:    ret void
 359 //
 360 //
 361 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
 362 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR2]] {
 363 // CHECK3-NEXT:  entry:
 364 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 365 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 366 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 367 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 368 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
 369 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 370 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 371 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 372 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 373 // CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8
 374 // CHECK3-NEXT:    [[G1:%.*]] = alloca double, align 8
 375 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4
 376 // CHECK3-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
 377 // CHECK3-NEXT:    [[SFVAR:%.*]] = alloca float, align 4
 378 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 379 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 380 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 381 // CHECK3-NEXT:    store ptr undef, ptr [[_TMP1]], align 4
 382 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 383 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 384 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 385 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 386 // CHECK3-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 4
 387 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 388 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 389 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 390 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 391 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
 392 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 393 // CHECK3:       cond.true:
 394 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 395 // CHECK3:       cond.false:
 396 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 397 // CHECK3-NEXT:    br label [[COND_END]]
 398 // CHECK3:       cond.end:
 399 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 400 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 401 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 402 // CHECK3-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 403 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 404 // CHECK3:       omp.inner.for.cond:
 405 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
 406 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
 407 // CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 408 // CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 409 // CHECK3:       omp.inner.for.body:
 410 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]]
 411 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
 412 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group [[ACC_GRP5]]
 413 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 414 // CHECK3:       omp.inner.for.inc:
 415 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
 416 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]]
 417 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
 418 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
 419 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
 420 // CHECK3:       omp.inner.for.end:
 421 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 422 // CHECK3:       omp.loop.exit:
 423 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
 424 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 425 // CHECK3-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
 426 // CHECK3-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 427 // CHECK3:       .omp.final.then:
 428 // CHECK3-NEXT:    store i32 2, ptr [[I]], align 4
 429 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 430 // CHECK3:       .omp.final.done:
 431 // CHECK3-NEXT:    ret void
 432 //
 433 //
 434 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined.omp_outlined
 435 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR2]] {
 436 // CHECK3-NEXT:  entry:
 437 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 438 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 439 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
 440 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
 441 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 442 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 443 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
 444 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 445 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 446 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 447 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 448 // CHECK3-NEXT:    [[G:%.*]] = alloca double, align 8
 449 // CHECK3-NEXT:    [[G1:%.*]] = alloca double, align 8
 450 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4
 451 // CHECK3-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
 452 // CHECK3-NEXT:    [[SFVAR:%.*]] = alloca float, align 4
 453 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 454 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
 455 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 456 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 457 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 458 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 459 // CHECK3-NEXT:    store ptr undef, ptr [[_TMP1]], align 4
 460 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 461 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 462 // CHECK3-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 463 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 464 // CHECK3-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
 465 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
 466 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 467 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 468 // CHECK3-NEXT:    store ptr [[G1]], ptr [[_TMP2]], align 4
 469 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 470 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 471 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 472 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 473 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
 474 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 475 // CHECK3:       cond.true:
 476 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 477 // CHECK3:       cond.false:
 478 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 479 // CHECK3-NEXT:    br label [[COND_END]]
 480 // CHECK3:       cond.end:
 481 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 482 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 483 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 484 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 485 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 486 // CHECK3:       omp.inner.for.cond:
 487 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
 488 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
 489 // CHECK3-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 490 // CHECK3-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 491 // CHECK3:       omp.inner.for.body:
 492 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 493 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 494 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 495 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
 496 // CHECK3-NEXT:    store double 1.000000e+00, ptr [[G]], align 8, !llvm.access.group [[ACC_GRP9]]
 497 // CHECK3-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP9]]
 498 // CHECK3-NEXT:    store volatile double 1.000000e+00, ptr [[TMP10]], align 4, !llvm.access.group [[ACC_GRP9]]
 499 // CHECK3-NEXT:    store i32 3, ptr [[SVAR]], align 4, !llvm.access.group [[ACC_GRP9]]
 500 // CHECK3-NEXT:    store float 4.000000e+00, ptr [[SFVAR]], align 4, !llvm.access.group [[ACC_GRP9]]
 501 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
 502 // CHECK3-NEXT:    store ptr [[G]], ptr [[TMP11]], align 4, !llvm.access.group [[ACC_GRP9]]
 503 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
 504 // CHECK3-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP9]]
 505 // CHECK3-NEXT:    store ptr [[TMP13]], ptr [[TMP12]], align 4, !llvm.access.group [[ACC_GRP9]]
 506 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
 507 // CHECK3-NEXT:    store ptr [[SVAR]], ptr [[TMP14]], align 4, !llvm.access.group [[ACC_GRP9]]
 508 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
 509 // CHECK3-NEXT:    store ptr [[SFVAR]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP9]]
 510 // CHECK3-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP9]]
 511 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 512 // CHECK3:       omp.body.continue:
 513 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 514 // CHECK3:       omp.inner.for.inc:
 515 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 516 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP16]], 1
 517 // CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 518 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
 519 // CHECK3:       omp.inner.for.end:
 520 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 521 // CHECK3:       omp.loop.exit:
 522 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
 523 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 524 // CHECK3-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
 525 // CHECK3-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 526 // CHECK3:       .omp.final.then:
 527 // CHECK3-NEXT:    store i32 2, ptr [[I]], align 4
 528 // CHECK3-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 529 // CHECK3:       .omp.final.done:
 530 // CHECK3-NEXT:    ret void
 531 //
 532 //
 533 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 534 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
 535 // CHECK3-NEXT:  entry:
 536 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
 537 // CHECK3-NEXT:    ret void
 538 //
 539 //
 540 // CHECK5-LABEL: define {{[^@]+}}@main
 541 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
 542 // CHECK5-NEXT:  entry:
 543 // CHECK5-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 544 // CHECK5-NEXT:    [[G:%.*]] = alloca double, align 8
 545 // CHECK5-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 546 // CHECK5-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
 547 // CHECK5-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 548 // CHECK5-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 549 // CHECK5-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
 550 // CHECK5-NEXT:    ret i32 0
 551 //
 552 //
 553 // CHECK7-LABEL: define {{[^@]+}}@main
 554 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
 555 // CHECK7-NEXT:  entry:
 556 // CHECK7-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 557 // CHECK7-NEXT:    [[G:%.*]] = alloca double, align 8
 558 // CHECK7-NEXT:    [[G1:%.*]] = alloca ptr, align 4
 559 // CHECK7-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
 560 // CHECK7-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 561 // CHECK7-NEXT:    store ptr [[G]], ptr [[G1]], align 4
 562 // CHECK7-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
 563 // CHECK7-NEXT:    ret i32 0
 564 //
 565 //
 566 // CHECK9-LABEL: define {{[^@]+}}@main
 567 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
 568 // CHECK9-NEXT:  entry:
 569 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 570 // CHECK9-NEXT:    [[G:%.*]] = alloca double, align 8
 571 // CHECK9-NEXT:    [[G1:%.*]] = alloca ptr, align 8
 572 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 573 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
 574 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
 575 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
 576 // CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
 577 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 578 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
 579 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 580 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 581 // CHECK9-NEXT:    store ptr [[G]], ptr [[G1]], align 8
 582 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
 583 // CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4
 584 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
 585 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
 586 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
 587 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
 588 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
 589 // CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
 590 // CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8
 591 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 592 // CHECK9-NEXT:    store i32 2, ptr [[TMP0]], align 4
 593 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 594 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
 595 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 596 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
 597 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 598 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
 599 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 600 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
 601 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 602 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
 603 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 604 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
 605 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 606 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
 607 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 608 // CHECK9-NEXT:    store i64 2, ptr [[TMP8]], align 8
 609 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 610 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
 611 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 612 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
 613 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 614 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
 615 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 616 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
 617 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, ptr [[KERNEL_ARGS]])
 618 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 619 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 620 // CHECK9:       omp_offload.failed:
 621 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]]
 622 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 623 // CHECK9:       omp_offload.cont:
 624 // CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
 625 // CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
 626 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
 627 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 628 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 629 // CHECK9:       arraydestroy.body:
 630 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 631 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 632 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
 633 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
 634 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
 635 // CHECK9:       arraydestroy.done2:
 636 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
 637 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4
 638 // CHECK9-NEXT:    ret i32 [[TMP16]]
 639 //
 640 //
 641 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
 642 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
 643 // CHECK9-NEXT:  entry:
 644 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 645 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 646 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 647 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
 648 // CHECK9-NEXT:    ret void
 649 //
 650 //
 651 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
 652 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
 653 // CHECK9-NEXT:  entry:
 654 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 655 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
 656 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 657 // CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
 658 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 659 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
 660 // CHECK9-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
 661 // CHECK9-NEXT:    ret void
 662 //
 663 //
 664 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95
 665 // CHECK9-SAME: () #[[ATTR3:[0-9]+]] {
 666 // CHECK9-NEXT:  entry:
 667 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined)
 668 // CHECK9-NEXT:    ret void
 669 //
 670 //
 671 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined
 672 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
 673 // CHECK9-NEXT:  entry:
 674 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 675 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 676 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 677 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 678 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
 679 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 680 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 681 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 682 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 683 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
 684 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
 685 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
 686 // CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 687 // CHECK9-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
 688 // CHECK9-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
 689 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
 690 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 691 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 692 // CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8
 693 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 694 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 695 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 696 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 697 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
 698 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 699 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
 700 // CHECK9:       arrayctor.loop:
 701 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
 702 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
 703 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
 704 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
 705 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
 706 // CHECK9:       arrayctor.cont:
 707 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])
 708 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 8
 709 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 710 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 711 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 712 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 713 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
 714 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 715 // CHECK9:       cond.true:
 716 // CHECK9-NEXT:    br label [[COND_END:%.*]]
 717 // CHECK9:       cond.false:
 718 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 719 // CHECK9-NEXT:    br label [[COND_END]]
 720 // CHECK9:       cond.end:
 721 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 722 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 723 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 724 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 725 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 726 // CHECK9:       omp.inner.for.cond:
 727 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
 728 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
 729 // CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 730 // CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
 731 // CHECK9:       omp.inner.for.cond.cleanup:
 732 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
 733 // CHECK9:       omp.inner.for.body:
 734 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP5]]
 735 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
 736 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
 737 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 738 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP5]]
 739 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 740 // CHECK9:       omp.inner.for.inc:
 741 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
 742 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP5]]
 743 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 744 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
 745 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
 746 // CHECK9:       omp.inner.for.end:
 747 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 748 // CHECK9:       omp.loop.exit:
 749 // CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 750 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
 751 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])
 752 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 753 // CHECK9-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
 754 // CHECK9-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 755 // CHECK9:       .omp.final.then:
 756 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
 757 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 758 // CHECK9:       .omp.final.done:
 759 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
 760 // CHECK9-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
 761 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN4]], i64 2
 762 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 763 // CHECK9:       arraydestroy.body:
 764 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 765 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 766 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
 767 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
 768 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
 769 // CHECK9:       arraydestroy.done5:
 770 // CHECK9-NEXT:    ret void
 771 //
 772 //
 773 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined
 774 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
 775 // CHECK9-NEXT:  entry:
 776 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 777 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 778 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 779 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 780 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 781 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 782 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
 783 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 784 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 785 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 786 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 787 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
 788 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
 789 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
 790 // CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 791 // CHECK9-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
 792 // CHECK9-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
 793 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
 794 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 795 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 796 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 797 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 798 // CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8
 799 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 800 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 801 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 802 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
 803 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 804 // CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
 805 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 806 // CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
 807 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 808 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 809 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
 810 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 811 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
 812 // CHECK9:       arrayctor.loop:
 813 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
 814 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
 815 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
 816 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
 817 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
 818 // CHECK9:       arrayctor.cont:
 819 // CHECK9-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])
 820 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP3]], align 8
 821 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 822 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 823 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 824 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 825 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
 826 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 827 // CHECK9:       cond.true:
 828 // CHECK9-NEXT:    br label [[COND_END:%.*]]
 829 // CHECK9:       cond.false:
 830 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 831 // CHECK9-NEXT:    br label [[COND_END]]
 832 // CHECK9:       cond.end:
 833 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 834 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 835 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 836 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 837 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 838 // CHECK9:       omp.inner.for.cond:
 839 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
 840 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
 841 // CHECK9-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 842 // CHECK9-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
 843 // CHECK9:       omp.inner.for.cond.cleanup:
 844 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
 845 // CHECK9:       omp.inner.for.body:
 846 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 847 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
 848 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 849 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
 850 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP9]]
 851 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
 852 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
 853 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]
 854 // CHECK9-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]
 855 // CHECK9-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP3]], align 8, !llvm.access.group [[ACC_GRP9]]
 856 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
 857 // CHECK9-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64
 858 // CHECK9-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 [[IDXPROM5]]
 859 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[TMP12]], i64 4, i1 false), !llvm.access.group [[ACC_GRP9]]
 860 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 861 // CHECK9:       omp.body.continue:
 862 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 863 // CHECK9:       omp.inner.for.inc:
 864 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 865 // CHECK9-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP14]], 1
 866 // CHECK9-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
 867 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
 868 // CHECK9:       omp.inner.for.end:
 869 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 870 // CHECK9:       omp.loop.exit:
 871 // CHECK9-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 872 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4
 873 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP16]])
 874 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
 875 // CHECK9-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
 876 // CHECK9-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
 877 // CHECK9:       .omp.final.then:
 878 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
 879 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 880 // CHECK9:       .omp.final.done:
 881 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
 882 // CHECK9-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
 883 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN8]], i64 2
 884 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 885 // CHECK9:       arraydestroy.body:
 886 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 887 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 888 // CHECK9-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
 889 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]
 890 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]
 891 // CHECK9:       arraydestroy.done9:
 892 // CHECK9-NEXT:    ret void
 893 //
 894 //
 895 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
 896 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
 897 // CHECK9-NEXT:  entry:
 898 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 899 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 900 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 901 // CHECK9-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
 902 // CHECK9-NEXT:    ret void
 903 //
 904 //
 905 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
 906 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
 907 // CHECK9-NEXT:  entry:
 908 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 909 // CHECK9-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
 910 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
 911 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
 912 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
 913 // CHECK9-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
 914 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 915 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
 916 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 917 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
 918 // CHECK9-NEXT:    store i32 0, ptr [[T_VAR]], align 4
 919 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
 920 // CHECK9-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
 921 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
 922 // CHECK9-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
 923 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
 924 // CHECK9-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
 925 // CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8
 926 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 927 // CHECK9-NEXT:    store i32 2, ptr [[TMP0]], align 4
 928 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 929 // CHECK9-NEXT:    store i32 0, ptr [[TMP1]], align 4
 930 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 931 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
 932 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 933 // CHECK9-NEXT:    store ptr null, ptr [[TMP3]], align 8
 934 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 935 // CHECK9-NEXT:    store ptr null, ptr [[TMP4]], align 8
 936 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 937 // CHECK9-NEXT:    store ptr null, ptr [[TMP5]], align 8
 938 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 939 // CHECK9-NEXT:    store ptr null, ptr [[TMP6]], align 8
 940 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 941 // CHECK9-NEXT:    store ptr null, ptr [[TMP7]], align 8
 942 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 943 // CHECK9-NEXT:    store i64 2, ptr [[TMP8]], align 8
 944 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 945 // CHECK9-NEXT:    store i64 0, ptr [[TMP9]], align 8
 946 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 947 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
 948 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 949 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
 950 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 951 // CHECK9-NEXT:    store i32 0, ptr [[TMP12]], align 4
 952 // CHECK9-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])
 953 // CHECK9-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
 954 // CHECK9-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 955 // CHECK9:       omp_offload.failed:
 956 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]
 957 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 958 // CHECK9:       omp_offload.cont:
 959 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 960 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
 961 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
 962 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 963 // CHECK9:       arraydestroy.body:
 964 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 965 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 966 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
 967 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
 968 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
 969 // CHECK9:       arraydestroy.done2:
 970 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
 971 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4
 972 // CHECK9-NEXT:    ret i32 [[TMP16]]
 973 //
 974 //
 975 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
 976 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
 977 // CHECK9-NEXT:  entry:
 978 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 979 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 980 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 981 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
 982 // CHECK9-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
 983 // CHECK9-NEXT:    ret void
 984 //
 985 //
 986 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
 987 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
 988 // CHECK9-NEXT:  entry:
 989 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 990 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
 991 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 992 // CHECK9-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
 993 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 994 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
 995 // CHECK9-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
 996 // CHECK9-NEXT:    store float [[TMP0]], ptr [[F]], align 4
 997 // CHECK9-NEXT:    ret void
 998 //
 999 //
1000 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1001 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1002 // CHECK9-NEXT:  entry:
1003 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1004 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1005 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1006 // CHECK9-NEXT:    ret void
1007 //
1008 //
1009 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1010 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1011 // CHECK9-NEXT:  entry:
1012 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1013 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1014 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1015 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1016 // CHECK9-NEXT:    ret void
1017 //
1018 //
1019 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1020 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1021 // CHECK9-NEXT:  entry:
1022 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1023 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1024 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1025 // CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1026 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1027 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1028 // CHECK9-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
1029 // CHECK9-NEXT:    ret void
1030 //
1031 //
1032 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1033 // CHECK9-SAME: () #[[ATTR3]] {
1034 // CHECK9-NEXT:  entry:
1035 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined)
1036 // CHECK9-NEXT:    ret void
1037 //
1038 //
1039 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
1040 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1041 // CHECK9-NEXT:  entry:
1042 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1043 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1044 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1045 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1046 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
1047 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1048 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1049 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1050 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1051 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1052 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1053 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1054 // CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1055 // CHECK9-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
1056 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1057 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1058 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1059 // CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8
1060 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1061 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
1062 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1063 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1064 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1065 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1066 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1067 // CHECK9:       arrayctor.loop:
1068 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1069 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1070 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
1071 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1072 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1073 // CHECK9:       arrayctor.cont:
1074 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])
1075 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 8
1076 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1077 // CHECK9-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1078 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1079 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1080 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1081 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1082 // CHECK9:       cond.true:
1083 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1084 // CHECK9:       cond.false:
1085 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1086 // CHECK9-NEXT:    br label [[COND_END]]
1087 // CHECK9:       cond.end:
1088 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1089 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1090 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1091 // CHECK9-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1092 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1093 // CHECK9:       omp.inner.for.cond:
1094 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
1095 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
1096 // CHECK9-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1097 // CHECK9-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1098 // CHECK9:       omp.inner.for.cond.cleanup:
1099 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1100 // CHECK9:       omp.inner.for.body:
1101 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP14]]
1102 // CHECK9-NEXT:    [[TMP8:%.*]] = zext i32 [[TMP7]] to i64
1103 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
1104 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1105 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i64 [[TMP8]], i64 [[TMP10]]), !llvm.access.group [[ACC_GRP14]]
1106 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1107 // CHECK9:       omp.inner.for.inc:
1108 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1109 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP14]]
1110 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
1111 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1112 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1113 // CHECK9:       omp.inner.for.end:
1114 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1115 // CHECK9:       omp.loop.exit:
1116 // CHECK9-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1117 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
1118 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP14]])
1119 // CHECK9-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1120 // CHECK9-NEXT:    [[TMP16:%.*]] = icmp ne i32 [[TMP15]], 0
1121 // CHECK9-NEXT:    br i1 [[TMP16]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1122 // CHECK9:       .omp.final.then:
1123 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
1124 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1125 // CHECK9:       .omp.final.done:
1126 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1127 // CHECK9-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1128 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i64 2
1129 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1130 // CHECK9:       arraydestroy.body:
1131 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1132 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1133 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1134 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
1135 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
1136 // CHECK9:       arraydestroy.done5:
1137 // CHECK9-NEXT:    ret void
1138 //
1139 //
1140 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
1141 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
1142 // CHECK9-NEXT:  entry:
1143 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1144 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1145 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1146 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1147 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1148 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1149 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
1150 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1151 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1152 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1153 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1154 // CHECK9-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1155 // CHECK9-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1156 // CHECK9-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1157 // CHECK9-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1158 // CHECK9-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
1159 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1160 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1161 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1162 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1163 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1164 // CHECK9-NEXT:    store ptr undef, ptr [[_TMP1]], align 8
1165 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1166 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1167 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1168 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP0]] to i32
1169 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1170 // CHECK9-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP1]] to i32
1171 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1172 // CHECK9-NEXT:    store i32 [[CONV2]], ptr [[DOTOMP_UB]], align 4
1173 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1174 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1175 // CHECK9-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1176 // CHECK9-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1177 // CHECK9-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1178 // CHECK9:       arrayctor.loop:
1179 // CHECK9-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1180 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1181 // CHECK9-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
1182 // CHECK9-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1183 // CHECK9-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1184 // CHECK9:       arrayctor.cont:
1185 // CHECK9-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])
1186 // CHECK9-NEXT:    store ptr [[VAR]], ptr [[_TMP3]], align 8
1187 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1188 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1189 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1190 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1191 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
1192 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1193 // CHECK9:       cond.true:
1194 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1195 // CHECK9:       cond.false:
1196 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1197 // CHECK9-NEXT:    br label [[COND_END]]
1198 // CHECK9:       cond.end:
1199 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1200 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1201 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1202 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1203 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1204 // CHECK9:       omp.inner.for.cond:
1205 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17:![0-9]+]]
1206 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP17]]
1207 // CHECK9-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1208 // CHECK9-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1209 // CHECK9:       omp.inner.for.cond.cleanup:
1210 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1211 // CHECK9:       omp.inner.for.body:
1212 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1213 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1214 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1215 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]
1216 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP17]]
1217 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]
1218 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1219 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 [[IDXPROM]]
1220 // CHECK9-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP17]]
1221 // CHECK9-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP3]], align 8, !llvm.access.group [[ACC_GRP17]]
1222 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP17]]
1223 // CHECK9-NEXT:    [[IDXPROM5:%.*]] = sext i32 [[TMP13]] to i64
1224 // CHECK9-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 [[IDXPROM5]]
1225 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[TMP12]], i64 4, i1 false), !llvm.access.group [[ACC_GRP17]]
1226 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1227 // CHECK9:       omp.body.continue:
1228 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1229 // CHECK9:       omp.inner.for.inc:
1230 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1231 // CHECK9-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP14]], 1
1232 // CHECK9-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP17]]
1233 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP18:![0-9]+]]
1234 // CHECK9:       omp.inner.for.end:
1235 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1236 // CHECK9:       omp.loop.exit:
1237 // CHECK9-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1238 // CHECK9-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4
1239 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP16]])
1240 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1241 // CHECK9-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1242 // CHECK9-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1243 // CHECK9:       .omp.final.then:
1244 // CHECK9-NEXT:    store i32 2, ptr [[I]], align 4
1245 // CHECK9-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1246 // CHECK9:       .omp.final.done:
1247 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1248 // CHECK9-NEXT:    [[ARRAY_BEGIN8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1249 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN8]], i64 2
1250 // CHECK9-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1251 // CHECK9:       arraydestroy.body:
1252 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1253 // CHECK9-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1254 // CHECK9-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1255 // CHECK9-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN8]]
1256 // CHECK9-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE9:%.*]], label [[ARRAYDESTROY_BODY]]
1257 // CHECK9:       arraydestroy.done9:
1258 // CHECK9-NEXT:    ret void
1259 //
1260 //
1261 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1262 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1263 // CHECK9-NEXT:  entry:
1264 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1265 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1266 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1267 // CHECK9-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1268 // CHECK9-NEXT:    ret void
1269 //
1270 //
1271 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1272 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1273 // CHECK9-NEXT:  entry:
1274 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1275 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1276 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1277 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1278 // CHECK9-NEXT:    store i32 0, ptr [[F]], align 4
1279 // CHECK9-NEXT:    ret void
1280 //
1281 //
1282 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1283 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1284 // CHECK9-NEXT:  entry:
1285 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1286 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1287 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1288 // CHECK9-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1289 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1290 // CHECK9-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1291 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1292 // CHECK9-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
1293 // CHECK9-NEXT:    ret void
1294 //
1295 //
1296 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1297 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1298 // CHECK9-NEXT:  entry:
1299 // CHECK9-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1300 // CHECK9-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1301 // CHECK9-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1302 // CHECK9-NEXT:    ret void
1303 //
1304 //
1305 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1306 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1307 // CHECK9-NEXT:  entry:
1308 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
1309 // CHECK9-NEXT:    ret void
1310 //
1311 //
1312 // CHECK11-LABEL: define {{[^@]+}}@main
1313 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
1314 // CHECK11-NEXT:  entry:
1315 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1316 // CHECK11-NEXT:    [[G:%.*]] = alloca double, align 8
1317 // CHECK11-NEXT:    [[G1:%.*]] = alloca ptr, align 4
1318 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1319 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1320 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1321 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1322 // CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
1323 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1324 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
1325 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1326 // CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1327 // CHECK11-NEXT:    store ptr [[G]], ptr [[G1]], align 4
1328 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1329 // CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 4
1330 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)
1331 // CHECK11-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1332 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1333 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i32 1
1334 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1335 // CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
1336 // CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 4
1337 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1338 // CHECK11-NEXT:    store i32 2, ptr [[TMP0]], align 4
1339 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1340 // CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 4
1341 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1342 // CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 4
1343 // CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1344 // CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 4
1345 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1346 // CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 4
1347 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1348 // CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 4
1349 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1350 // CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 4
1351 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1352 // CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 4
1353 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1354 // CHECK11-NEXT:    store i64 2, ptr [[TMP8]], align 8
1355 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1356 // CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 8
1357 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1358 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
1359 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1360 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
1361 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1362 // CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 4
1363 // CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.region_id, ptr [[KERNEL_ARGS]])
1364 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1365 // CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1366 // CHECK11:       omp_offload.failed:
1367 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95() #[[ATTR4:[0-9]+]]
1368 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1369 // CHECK11:       omp_offload.cont:
1370 // CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1371 // CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
1372 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1373 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1374 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1375 // CHECK11:       arraydestroy.body:
1376 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1377 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1378 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1379 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1380 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1381 // CHECK11:       arraydestroy.done2:
1382 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1383 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4
1384 // CHECK11-NEXT:    ret i32 [[TMP16]]
1385 //
1386 //
1387 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1388 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1389 // CHECK11-NEXT:  entry:
1390 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1391 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1392 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1393 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1394 // CHECK11-NEXT:    ret void
1395 //
1396 //
1397 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1398 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1399 // CHECK11-NEXT:  entry:
1400 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1401 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1402 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1403 // CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
1404 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1405 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1406 // CHECK11-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1407 // CHECK11-NEXT:    ret void
1408 //
1409 //
1410 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95
1411 // CHECK11-SAME: () #[[ATTR3:[0-9]+]] {
1412 // CHECK11-NEXT:  entry:
1413 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined)
1414 // CHECK11-NEXT:    ret void
1415 //
1416 //
1417 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined
1418 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1419 // CHECK11-NEXT:  entry:
1420 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1421 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1422 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1423 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1424 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
1425 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1426 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1427 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1428 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1429 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1430 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1431 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1432 // CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1433 // CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4
1434 // CHECK11-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
1435 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1436 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1437 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1438 // CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 4
1439 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1440 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
1441 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1442 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1443 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1444 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1445 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1446 // CHECK11:       arrayctor.loop:
1447 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1448 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1449 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
1450 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1451 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1452 // CHECK11:       arrayctor.cont:
1453 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])
1454 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 4
1455 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1456 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1457 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1458 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1459 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1460 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1461 // CHECK11:       cond.true:
1462 // CHECK11-NEXT:    br label [[COND_END:%.*]]
1463 // CHECK11:       cond.false:
1464 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1465 // CHECK11-NEXT:    br label [[COND_END]]
1466 // CHECK11:       cond.end:
1467 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1468 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1469 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1470 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1471 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1472 // CHECK11:       omp.inner.for.cond:
1473 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
1474 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
1475 // CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1476 // CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1477 // CHECK11:       omp.inner.for.cond.cleanup:
1478 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1479 // CHECK11:       omp.inner.for.body:
1480 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP6]]
1481 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
1482 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group [[ACC_GRP6]]
1483 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1484 // CHECK11:       omp.inner.for.inc:
1485 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
1486 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP6]]
1487 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
1488 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
1489 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1490 // CHECK11:       omp.inner.for.end:
1491 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1492 // CHECK11:       omp.loop.exit:
1493 // CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1494 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
1495 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]])
1496 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1497 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1498 // CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1499 // CHECK11:       .omp.final.then:
1500 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
1501 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1502 // CHECK11:       .omp.final.done:
1503 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1504 // CHECK11-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1505 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN4]], i32 2
1506 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1507 // CHECK11:       arraydestroy.body:
1508 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1509 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1510 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1511 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
1512 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
1513 // CHECK11:       arraydestroy.done5:
1514 // CHECK11-NEXT:    ret void
1515 //
1516 //
1517 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l95.omp_outlined.omp_outlined
1518 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
1519 // CHECK11-NEXT:  entry:
1520 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1521 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1522 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1523 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1524 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1525 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1526 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
1527 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1528 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1529 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1530 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1531 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1532 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1533 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1534 // CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1535 // CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4
1536 // CHECK11-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
1537 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1538 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1539 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1540 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1541 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1542 // CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 4
1543 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1544 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1545 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1546 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1547 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
1548 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
1549 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1550 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1551 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1552 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1553 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1554 // CHECK11:       arrayctor.loop:
1555 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1556 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1557 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
1558 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1559 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1560 // CHECK11:       arrayctor.cont:
1561 // CHECK11-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])
1562 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 4
1563 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1564 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1565 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1566 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1567 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
1568 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1569 // CHECK11:       cond.true:
1570 // CHECK11-NEXT:    br label [[COND_END:%.*]]
1571 // CHECK11:       cond.false:
1572 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1573 // CHECK11-NEXT:    br label [[COND_END]]
1574 // CHECK11:       cond.end:
1575 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1576 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1577 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1578 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1579 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1580 // CHECK11:       omp.inner.for.cond:
1581 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
1582 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
1583 // CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1584 // CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1585 // CHECK11:       omp.inner.for.cond.cleanup:
1586 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1587 // CHECK11:       omp.inner.for.body:
1588 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
1589 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1590 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1591 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
1592 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP10]]
1593 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
1594 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]]
1595 // CHECK11-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]
1596 // CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP10]]
1597 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
1598 // CHECK11-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 [[TMP13]]
1599 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP12]], i32 4, i1 false), !llvm.access.group [[ACC_GRP10]]
1600 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1601 // CHECK11:       omp.body.continue:
1602 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1603 // CHECK11:       omp.inner.for.inc:
1604 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
1605 // CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1
1606 // CHECK11-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
1607 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1608 // CHECK11:       omp.inner.for.end:
1609 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1610 // CHECK11:       omp.loop.exit:
1611 // CHECK11-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1612 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4
1613 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP16]])
1614 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1615 // CHECK11-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1616 // CHECK11-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1617 // CHECK11:       .omp.final.then:
1618 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
1619 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1620 // CHECK11:       .omp.final.done:
1621 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1622 // CHECK11-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1623 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN6]], i32 2
1624 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1625 // CHECK11:       arraydestroy.body:
1626 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1627 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1628 // CHECK11-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1629 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]
1630 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]
1631 // CHECK11:       arraydestroy.done7:
1632 // CHECK11-NEXT:    ret void
1633 //
1634 //
1635 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1636 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1637 // CHECK11-NEXT:  entry:
1638 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1639 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1640 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1641 // CHECK11-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1642 // CHECK11-NEXT:    ret void
1643 //
1644 //
1645 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1646 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
1647 // CHECK11-NEXT:  entry:
1648 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1649 // CHECK11-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1650 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1651 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1652 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1653 // CHECK11-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
1654 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1655 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
1656 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1657 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1658 // CHECK11-NEXT:    store i32 0, ptr [[T_VAR]], align 4
1659 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
1660 // CHECK11-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1661 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
1662 // CHECK11-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i32 1
1663 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
1664 // CHECK11-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
1665 // CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 4
1666 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1667 // CHECK11-NEXT:    store i32 2, ptr [[TMP0]], align 4
1668 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1669 // CHECK11-NEXT:    store i32 0, ptr [[TMP1]], align 4
1670 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1671 // CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 4
1672 // CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1673 // CHECK11-NEXT:    store ptr null, ptr [[TMP3]], align 4
1674 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1675 // CHECK11-NEXT:    store ptr null, ptr [[TMP4]], align 4
1676 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1677 // CHECK11-NEXT:    store ptr null, ptr [[TMP5]], align 4
1678 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1679 // CHECK11-NEXT:    store ptr null, ptr [[TMP6]], align 4
1680 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1681 // CHECK11-NEXT:    store ptr null, ptr [[TMP7]], align 4
1682 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1683 // CHECK11-NEXT:    store i64 2, ptr [[TMP8]], align 8
1684 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1685 // CHECK11-NEXT:    store i64 0, ptr [[TMP9]], align 8
1686 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1687 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP10]], align 4
1688 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1689 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP11]], align 4
1690 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1691 // CHECK11-NEXT:    store i32 0, ptr [[TMP12]], align 4
1692 // CHECK11-NEXT:    [[TMP13:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])
1693 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1694 // CHECK11-NEXT:    br i1 [[TMP14]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1695 // CHECK11:       omp_offload.failed:
1696 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49() #[[ATTR4]]
1697 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1698 // CHECK11:       omp_offload.cont:
1699 // CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1700 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1701 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
1702 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1703 // CHECK11:       arraydestroy.body:
1704 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1705 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1706 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1707 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1708 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1709 // CHECK11:       arraydestroy.done2:
1710 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1711 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[RETVAL]], align 4
1712 // CHECK11-NEXT:    ret i32 [[TMP16]]
1713 //
1714 //
1715 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1716 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1717 // CHECK11-NEXT:  entry:
1718 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1719 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1720 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1721 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1722 // CHECK11-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
1723 // CHECK11-NEXT:    ret void
1724 //
1725 //
1726 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1727 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1728 // CHECK11-NEXT:  entry:
1729 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1730 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1731 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1732 // CHECK11-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
1733 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1734 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1735 // CHECK11-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1736 // CHECK11-NEXT:    store float [[TMP0]], ptr [[F]], align 4
1737 // CHECK11-NEXT:    ret void
1738 //
1739 //
1740 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1741 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1742 // CHECK11-NEXT:  entry:
1743 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1744 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1745 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1746 // CHECK11-NEXT:    ret void
1747 //
1748 //
1749 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1750 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1751 // CHECK11-NEXT:  entry:
1752 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1753 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1754 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1755 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1756 // CHECK11-NEXT:    ret void
1757 //
1758 //
1759 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1760 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1761 // CHECK11-NEXT:  entry:
1762 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1763 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1764 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1765 // CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1766 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1767 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1768 // CHECK11-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
1769 // CHECK11-NEXT:    ret void
1770 //
1771 //
1772 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1773 // CHECK11-SAME: () #[[ATTR3]] {
1774 // CHECK11-NEXT:  entry:
1775 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 0, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined)
1776 // CHECK11-NEXT:    ret void
1777 //
1778 //
1779 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
1780 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3]] {
1781 // CHECK11-NEXT:  entry:
1782 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1783 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1784 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1785 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1786 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
1787 // CHECK11-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1788 // CHECK11-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1789 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1790 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1791 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1792 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1793 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1794 // CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1795 // CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4
1796 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1797 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1798 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1799 // CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 4
1800 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1801 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
1802 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1803 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1804 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1805 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
1806 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1807 // CHECK11:       arrayctor.loop:
1808 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1809 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1810 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
1811 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1812 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1813 // CHECK11:       arrayctor.cont:
1814 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])
1815 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 4
1816 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1817 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1818 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1819 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1820 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 1
1821 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1822 // CHECK11:       cond.true:
1823 // CHECK11-NEXT:    br label [[COND_END:%.*]]
1824 // CHECK11:       cond.false:
1825 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1826 // CHECK11-NEXT:    br label [[COND_END]]
1827 // CHECK11:       cond.end:
1828 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1829 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1830 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1831 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1832 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1833 // CHECK11:       omp.inner.for.cond:
1834 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
1835 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
1836 // CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1837 // CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1838 // CHECK11:       omp.inner.for.cond.cleanup:
1839 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1840 // CHECK11:       omp.inner.for.body:
1841 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4, !llvm.access.group [[ACC_GRP15]]
1842 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
1843 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined, i32 [[TMP7]], i32 [[TMP8]]), !llvm.access.group [[ACC_GRP15]]
1844 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1845 // CHECK11:       omp.inner.for.inc:
1846 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1847 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4, !llvm.access.group [[ACC_GRP15]]
1848 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP9]], [[TMP10]]
1849 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
1850 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
1851 // CHECK11:       omp.inner.for.end:
1852 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1853 // CHECK11:       omp.loop.exit:
1854 // CHECK11-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1855 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
1856 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP12]])
1857 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1858 // CHECK11-NEXT:    [[TMP14:%.*]] = icmp ne i32 [[TMP13]], 0
1859 // CHECK11-NEXT:    br i1 [[TMP14]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1860 // CHECK11:       .omp.final.then:
1861 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
1862 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1863 // CHECK11:       .omp.final.done:
1864 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1865 // CHECK11-NEXT:    [[ARRAY_BEGIN4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1866 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN4]], i32 2
1867 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1868 // CHECK11:       arraydestroy.body:
1869 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP15]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1870 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1871 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1872 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN4]]
1873 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE5:%.*]], label [[ARRAYDESTROY_BODY]]
1874 // CHECK11:       arraydestroy.done5:
1875 // CHECK11-NEXT:    ret void
1876 //
1877 //
1878 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined.omp_outlined
1879 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]]) #[[ATTR3]] {
1880 // CHECK11-NEXT:  entry:
1881 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1882 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1883 // CHECK11-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1884 // CHECK11-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1885 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1886 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1887 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
1888 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1889 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1890 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1891 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1892 // CHECK11-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
1893 // CHECK11-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
1894 // CHECK11-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1895 // CHECK11-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1896 // CHECK11-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 4
1897 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1898 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1899 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1900 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1901 // CHECK11-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1902 // CHECK11-NEXT:    store ptr undef, ptr [[_TMP1]], align 4
1903 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1904 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1905 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1906 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1907 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_LB]], align 4
1908 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_UB]], align 4
1909 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1910 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1911 // CHECK11-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1912 // CHECK11-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
1913 // CHECK11-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
1914 // CHECK11:       arrayctor.loop:
1915 // CHECK11-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1916 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1917 // CHECK11-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
1918 // CHECK11-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1919 // CHECK11-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1920 // CHECK11:       arrayctor.cont:
1921 // CHECK11-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]])
1922 // CHECK11-NEXT:    store ptr [[VAR]], ptr [[_TMP2]], align 4
1923 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1924 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1925 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1926 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1927 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
1928 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1929 // CHECK11:       cond.true:
1930 // CHECK11-NEXT:    br label [[COND_END:%.*]]
1931 // CHECK11:       cond.false:
1932 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1933 // CHECK11-NEXT:    br label [[COND_END]]
1934 // CHECK11:       cond.end:
1935 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1936 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1937 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1938 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1939 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1940 // CHECK11:       omp.inner.for.cond:
1941 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
1942 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
1943 // CHECK11-NEXT:    [[CMP3:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1944 // CHECK11-NEXT:    br i1 [[CMP3]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1945 // CHECK11:       omp.inner.for.cond.cleanup:
1946 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
1947 // CHECK11:       omp.inner.for.body:
1948 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
1949 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
1950 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1951 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
1952 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[T_VAR]], align 4, !llvm.access.group [[ACC_GRP18]]
1953 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
1954 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i32 0, i32 [[TMP11]]
1955 // CHECK11-NEXT:    store i32 [[TMP10]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]
1956 // CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[_TMP2]], align 4, !llvm.access.group [[ACC_GRP18]]
1957 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP18]]
1958 // CHECK11-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 [[TMP13]]
1959 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX4]], ptr align 4 [[TMP12]], i32 4, i1 false), !llvm.access.group [[ACC_GRP18]]
1960 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1961 // CHECK11:       omp.body.continue:
1962 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1963 // CHECK11:       omp.inner.for.inc:
1964 // CHECK11-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
1965 // CHECK11-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP14]], 1
1966 // CHECK11-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
1967 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
1968 // CHECK11:       omp.inner.for.end:
1969 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1970 // CHECK11:       omp.loop.exit:
1971 // CHECK11-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1972 // CHECK11-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4
1973 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP16]])
1974 // CHECK11-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1975 // CHECK11-NEXT:    [[TMP18:%.*]] = icmp ne i32 [[TMP17]], 0
1976 // CHECK11-NEXT:    br i1 [[TMP18]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1977 // CHECK11:       .omp.final.then:
1978 // CHECK11-NEXT:    store i32 2, ptr [[I]], align 4
1979 // CHECK11-NEXT:    br label [[DOTOMP_FINAL_DONE]]
1980 // CHECK11:       .omp.final.done:
1981 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1982 // CHECK11-NEXT:    [[ARRAY_BEGIN6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1983 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN6]], i32 2
1984 // CHECK11-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1985 // CHECK11:       arraydestroy.body:
1986 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP19]], [[DOTOMP_FINAL_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1987 // CHECK11-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1988 // CHECK11-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1989 // CHECK11-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN6]]
1990 // CHECK11-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE7:%.*]], label [[ARRAYDESTROY_BODY]]
1991 // CHECK11:       arraydestroy.done7:
1992 // CHECK11-NEXT:    ret void
1993 //
1994 //
1995 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1996 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1997 // CHECK11-NEXT:  entry:
1998 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1999 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2000 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2001 // CHECK11-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2002 // CHECK11-NEXT:    ret void
2003 //
2004 //
2005 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2006 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2007 // CHECK11-NEXT:  entry:
2008 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2009 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2010 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2011 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2012 // CHECK11-NEXT:    store i32 0, ptr [[F]], align 4
2013 // CHECK11-NEXT:    ret void
2014 //
2015 //
2016 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2017 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2018 // CHECK11-NEXT:  entry:
2019 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2020 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2021 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2022 // CHECK11-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2023 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2024 // CHECK11-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2025 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2026 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
2027 // CHECK11-NEXT:    ret void
2028 //
2029 //
2030 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2031 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2032 // CHECK11-NEXT:  entry:
2033 // CHECK11-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2034 // CHECK11-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2035 // CHECK11-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2036 // CHECK11-NEXT:    ret void
2037 //
2038 //
2039 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2040 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
2041 // CHECK11-NEXT:  entry:
2042 // CHECK11-NEXT:    call void @__tgt_register_requires(i64 1)
2043 // CHECK11-NEXT:    ret void
2044 //
2045 //
2046 // CHECK13-LABEL: define {{[^@]+}}@main
2047 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
2048 // CHECK13-NEXT:  entry:
2049 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2050 // CHECK13-NEXT:    [[G:%.*]] = alloca double, align 8
2051 // CHECK13-NEXT:    [[G1:%.*]] = alloca ptr, align 8
2052 // CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2053 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2054 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2055 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2056 // CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
2057 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2058 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
2059 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2060 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2061 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2062 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
2063 // CHECK13-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2064 // CHECK13-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2065 // CHECK13-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
2066 // CHECK13-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4
2067 // CHECK13-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
2068 // CHECK13-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
2069 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2070 // CHECK13-NEXT:    store ptr [[G]], ptr [[G1]], align 8
2071 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2072 // CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2073 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
2074 // CHECK13-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
2075 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
2076 // CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
2077 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
2078 // CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
2079 // CHECK13-NEXT:    store ptr undef, ptr [[_TMP1]], align 8
2080 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2081 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2082 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2083 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
2084 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
2085 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
2086 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2087 // CHECK13:       arrayctor.loop:
2088 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2089 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2090 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
2091 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2092 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2093 // CHECK13:       arrayctor.cont:
2094 // CHECK13-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2095 // CHECK13-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 8
2096 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2097 // CHECK13:       omp.inner.for.cond:
2098 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
2099 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
2100 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2101 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2102 // CHECK13:       omp.inner.for.cond.cleanup:
2103 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2104 // CHECK13:       omp.inner.for.body:
2105 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2106 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2107 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2108 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2109 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP2]]
2110 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2111 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
2112 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]
2113 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]
2114 // CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP2]]
2115 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2116 // CHECK13-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i64
2117 // CHECK13-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]]
2118 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP6]], i64 4, i1 false), !llvm.access.group [[ACC_GRP2]]
2119 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2120 // CHECK13:       omp.body.continue:
2121 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2122 // CHECK13:       omp.inner.for.inc:
2123 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2124 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP8]], 1
2125 // CHECK13-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2126 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2127 // CHECK13:       omp.inner.for.end:
2128 // CHECK13-NEXT:    store i32 2, ptr [[I]], align 4
2129 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]]
2130 // CHECK13-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
2131 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN10]], i64 2
2132 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2133 // CHECK13:       arraydestroy.body:
2134 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2135 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2136 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2137 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2138 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2139 // CHECK13:       arraydestroy.done11:
2140 // CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
2141 // CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
2142 // CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2143 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
2144 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY13:%.*]]
2145 // CHECK13:       arraydestroy.body13:
2146 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ]
2147 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1
2148 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR4]]
2149 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE16:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]]
2150 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]]
2151 // CHECK13:       arraydestroy.done17:
2152 // CHECK13-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2153 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 4
2154 // CHECK13-NEXT:    ret i32 [[TMP11]]
2155 //
2156 //
2157 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2158 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
2159 // CHECK13-NEXT:  entry:
2160 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2161 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2162 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2163 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2164 // CHECK13-NEXT:    ret void
2165 //
2166 //
2167 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2168 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2169 // CHECK13-NEXT:  entry:
2170 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2171 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2172 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2173 // CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
2174 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2175 // CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2176 // CHECK13-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
2177 // CHECK13-NEXT:    ret void
2178 //
2179 //
2180 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2181 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2182 // CHECK13-NEXT:  entry:
2183 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2184 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2185 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2186 // CHECK13-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2187 // CHECK13-NEXT:    ret void
2188 //
2189 //
2190 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2191 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat {
2192 // CHECK13-NEXT:  entry:
2193 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2194 // CHECK13-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2195 // CHECK13-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2196 // CHECK13-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2197 // CHECK13-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2198 // CHECK13-NEXT:    [[VAR:%.*]] = alloca ptr, align 8
2199 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2200 // CHECK13-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
2201 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2202 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2203 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2204 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
2205 // CHECK13-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2206 // CHECK13-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2207 // CHECK13-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
2208 // CHECK13-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
2209 // CHECK13-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
2210 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2211 // CHECK13-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2212 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
2213 // CHECK13-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
2214 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
2215 // CHECK13-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
2216 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
2217 // CHECK13-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 8
2218 // CHECK13-NEXT:    store ptr undef, ptr [[_TMP1]], align 8
2219 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2220 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2221 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2222 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
2223 // CHECK13-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
2224 // CHECK13-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
2225 // CHECK13-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2226 // CHECK13:       arrayctor.loop:
2227 // CHECK13-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2228 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2229 // CHECK13-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
2230 // CHECK13-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2231 // CHECK13-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2232 // CHECK13:       arrayctor.cont:
2233 // CHECK13-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2234 // CHECK13-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 8
2235 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2236 // CHECK13:       omp.inner.for.cond:
2237 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
2238 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
2239 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2240 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2241 // CHECK13:       omp.inner.for.cond.cleanup:
2242 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2243 // CHECK13:       omp.inner.for.body:
2244 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
2245 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2246 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2247 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
2248 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP6]]
2249 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
2250 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP5]] to i64
2251 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]
2252 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]
2253 // CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 8, !llvm.access.group [[ACC_GRP6]]
2254 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
2255 // CHECK13-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP7]] to i64
2256 // CHECK13-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM7]]
2257 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP6]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]]
2258 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2259 // CHECK13:       omp.body.continue:
2260 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2261 // CHECK13:       omp.inner.for.inc:
2262 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
2263 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP8]], 1
2264 // CHECK13-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
2265 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2266 // CHECK13:       omp.inner.for.end:
2267 // CHECK13-NEXT:    store i32 2, ptr [[I]], align 4
2268 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2269 // CHECK13-NEXT:    [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
2270 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i64 2
2271 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2272 // CHECK13:       arraydestroy.body:
2273 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2274 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2275 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2276 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN10]]
2277 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE11:%.*]], label [[ARRAYDESTROY_BODY]]
2278 // CHECK13:       arraydestroy.done11:
2279 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2280 // CHECK13-NEXT:    [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2281 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
2282 // CHECK13-NEXT:    br label [[ARRAYDESTROY_BODY13:%.*]]
2283 // CHECK13:       arraydestroy.body13:
2284 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENTPAST14:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE11]] ], [ [[ARRAYDESTROY_ELEMENT15:%.*]], [[ARRAYDESTROY_BODY13]] ]
2285 // CHECK13-NEXT:    [[ARRAYDESTROY_ELEMENT15]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST14]], i64 -1
2286 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT15]]) #[[ATTR4]]
2287 // CHECK13-NEXT:    [[ARRAYDESTROY_DONE16:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT15]], [[ARRAY_BEGIN12]]
2288 // CHECK13-NEXT:    br i1 [[ARRAYDESTROY_DONE16]], label [[ARRAYDESTROY_DONE17:%.*]], label [[ARRAYDESTROY_BODY13]]
2289 // CHECK13:       arraydestroy.done17:
2290 // CHECK13-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2291 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 4
2292 // CHECK13-NEXT:    ret i32 [[TMP11]]
2293 //
2294 //
2295 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2296 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2297 // CHECK13-NEXT:  entry:
2298 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2299 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2300 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2301 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2302 // CHECK13-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
2303 // CHECK13-NEXT:    ret void
2304 //
2305 //
2306 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2307 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2308 // CHECK13-NEXT:  entry:
2309 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2310 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2311 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2312 // CHECK13-NEXT:    ret void
2313 //
2314 //
2315 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2316 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2317 // CHECK13-NEXT:  entry:
2318 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2319 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2320 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2321 // CHECK13-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
2322 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2323 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2324 // CHECK13-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2325 // CHECK13-NEXT:    store float [[TMP0]], ptr [[F]], align 4
2326 // CHECK13-NEXT:    ret void
2327 //
2328 //
2329 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2330 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2331 // CHECK13-NEXT:  entry:
2332 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2333 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2334 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2335 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2336 // CHECK13-NEXT:    ret void
2337 //
2338 //
2339 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2340 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2341 // CHECK13-NEXT:  entry:
2342 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2343 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2344 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2345 // CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2346 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2347 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2348 // CHECK13-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
2349 // CHECK13-NEXT:    ret void
2350 //
2351 //
2352 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2353 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2354 // CHECK13-NEXT:  entry:
2355 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2356 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2357 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2358 // CHECK13-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2359 // CHECK13-NEXT:    ret void
2360 //
2361 //
2362 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2363 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2364 // CHECK13-NEXT:  entry:
2365 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2366 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2367 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2368 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2369 // CHECK13-NEXT:    store i32 0, ptr [[F]], align 4
2370 // CHECK13-NEXT:    ret void
2371 //
2372 //
2373 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2374 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2375 // CHECK13-NEXT:  entry:
2376 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2377 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2378 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2379 // CHECK13-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2380 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2381 // CHECK13-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2382 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2383 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
2384 // CHECK13-NEXT:    ret void
2385 //
2386 //
2387 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2388 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2389 // CHECK13-NEXT:  entry:
2390 // CHECK13-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2391 // CHECK13-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2392 // CHECK13-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2393 // CHECK13-NEXT:    ret void
2394 //
2395 //
2396 // CHECK15-LABEL: define {{[^@]+}}@main
2397 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
2398 // CHECK15-NEXT:  entry:
2399 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2400 // CHECK15-NEXT:    [[G:%.*]] = alloca double, align 8
2401 // CHECK15-NEXT:    [[G1:%.*]] = alloca ptr, align 4
2402 // CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2403 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2404 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2405 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2406 // CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
2407 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2408 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
2409 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2410 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2411 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2412 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
2413 // CHECK15-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2414 // CHECK15-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2415 // CHECK15-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
2416 // CHECK15-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S]], align 4
2417 // CHECK15-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 4
2418 // CHECK15-NEXT:    [[SVAR:%.*]] = alloca i32, align 4
2419 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2420 // CHECK15-NEXT:    store ptr [[G]], ptr [[G1]], align 4
2421 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2422 // CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2423 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)
2424 // CHECK15-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2425 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
2426 // CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i32 1
2427 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
2428 // CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
2429 // CHECK15-NEXT:    store ptr undef, ptr [[_TMP1]], align 4
2430 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2431 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2432 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2433 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
2434 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
2435 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
2436 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2437 // CHECK15:       arrayctor.loop:
2438 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2439 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2440 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
2441 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2442 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2443 // CHECK15:       arrayctor.cont:
2444 // CHECK15-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2445 // CHECK15-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 4
2446 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2447 // CHECK15:       omp.inner.for.cond:
2448 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]
2449 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]
2450 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2451 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2452 // CHECK15:       omp.inner.for.cond.cleanup:
2453 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2454 // CHECK15:       omp.inner.for.body:
2455 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
2456 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2457 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2458 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
2459 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP3]]
2460 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
2461 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP5]]
2462 // CHECK15-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]
2463 // CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP3]]
2464 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
2465 // CHECK15-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP7]]
2466 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP6]], i32 4, i1 false), !llvm.access.group [[ACC_GRP3]]
2467 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2468 // CHECK15:       omp.body.continue:
2469 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2470 // CHECK15:       omp.inner.for.inc:
2471 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
2472 // CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1
2473 // CHECK15-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
2474 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
2475 // CHECK15:       omp.inner.for.end:
2476 // CHECK15-NEXT:    store i32 2, ptr [[I]], align 4
2477 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4:[0-9]+]]
2478 // CHECK15-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
2479 // CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN9]], i32 2
2480 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2481 // CHECK15:       arraydestroy.body:
2482 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2483 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2484 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2485 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]
2486 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]
2487 // CHECK15:       arraydestroy.done10:
2488 // CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
2489 // CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
2490 // CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2491 // CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
2492 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY12:%.*]]
2493 // CHECK15:       arraydestroy.body12:
2494 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ]
2495 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1
2496 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR4]]
2497 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE15:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]]
2498 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]]
2499 // CHECK15:       arraydestroy.done16:
2500 // CHECK15-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2501 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 4
2502 // CHECK15-NEXT:    ret i32 [[TMP11]]
2503 //
2504 //
2505 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2506 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2507 // CHECK15-NEXT:  entry:
2508 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2509 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2510 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2511 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2512 // CHECK15-NEXT:    ret void
2513 //
2514 //
2515 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2516 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2517 // CHECK15-NEXT:  entry:
2518 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2519 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2520 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2521 // CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
2522 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2523 // CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2524 // CHECK15-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
2525 // CHECK15-NEXT:    ret void
2526 //
2527 //
2528 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2529 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2530 // CHECK15-NEXT:  entry:
2531 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2532 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2533 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2534 // CHECK15-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2535 // CHECK15-NEXT:    ret void
2536 //
2537 //
2538 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2539 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat {
2540 // CHECK15-NEXT:  entry:
2541 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2542 // CHECK15-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2543 // CHECK15-NEXT:    [[T_VAR:%.*]] = alloca i32, align 4
2544 // CHECK15-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
2545 // CHECK15-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2546 // CHECK15-NEXT:    [[VAR:%.*]] = alloca ptr, align 4
2547 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2548 // CHECK15-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 4
2549 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2550 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2551 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2552 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
2553 // CHECK15-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 4
2554 // CHECK15-NEXT:    [[VEC3:%.*]] = alloca [2 x i32], align 4
2555 // CHECK15-NEXT:    [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
2556 // CHECK15-NEXT:    [[VAR5:%.*]] = alloca [[STRUCT_S_0]], align 4
2557 // CHECK15-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 4
2558 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2559 // CHECK15-NEXT:    store i32 0, ptr [[T_VAR]], align 4
2560 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
2561 // CHECK15-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2562 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
2563 // CHECK15-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i32 1
2564 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
2565 // CHECK15-NEXT:    store ptr [[TEST]], ptr [[VAR]], align 4
2566 // CHECK15-NEXT:    store ptr undef, ptr [[_TMP1]], align 4
2567 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2568 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
2569 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2570 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[DOTOMP_IV]], align 4
2571 // CHECK15-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
2572 // CHECK15-NEXT:    [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2573 // CHECK15-NEXT:    br label [[ARRAYCTOR_LOOP:%.*]]
2574 // CHECK15:       arrayctor.loop:
2575 // CHECK15-NEXT:    [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2576 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2577 // CHECK15-NEXT:    [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
2578 // CHECK15-NEXT:    [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2579 // CHECK15-NEXT:    br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2580 // CHECK15:       arrayctor.cont:
2581 // CHECK15-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
2582 // CHECK15-NEXT:    store ptr [[VAR5]], ptr [[_TMP6]], align 4
2583 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2584 // CHECK15:       omp.inner.for.cond:
2585 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
2586 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]]
2587 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP1]], [[TMP2]]
2588 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2589 // CHECK15:       omp.inner.for.cond.cleanup:
2590 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
2591 // CHECK15:       omp.inner.for.body:
2592 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
2593 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP3]], 1
2594 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2595 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
2596 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[T_VAR2]], align 4, !llvm.access.group [[ACC_GRP7]]
2597 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
2598 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP5]]
2599 // CHECK15-NEXT:    store i32 [[TMP4]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]]
2600 // CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP6]], align 4, !llvm.access.group [[ACC_GRP7]]
2601 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
2602 // CHECK15-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP7]]
2603 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX7]], ptr align 4 [[TMP6]], i32 4, i1 false), !llvm.access.group [[ACC_GRP7]]
2604 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2605 // CHECK15:       omp.body.continue:
2606 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2607 // CHECK15:       omp.inner.for.inc:
2608 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
2609 // CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP8]], 1
2610 // CHECK15-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
2611 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
2612 // CHECK15:       omp.inner.for.end:
2613 // CHECK15-NEXT:    store i32 2, ptr [[I]], align 4
2614 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
2615 // CHECK15-NEXT:    [[ARRAY_BEGIN9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
2616 // CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN9]], i32 2
2617 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
2618 // CHECK15:       arraydestroy.body:
2619 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP9]], [[OMP_INNER_FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2620 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2621 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2622 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN9]]
2623 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE10:%.*]], label [[ARRAYDESTROY_BODY]]
2624 // CHECK15:       arraydestroy.done10:
2625 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2626 // CHECK15-NEXT:    [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2627 // CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2
2628 // CHECK15-NEXT:    br label [[ARRAYDESTROY_BODY12:%.*]]
2629 // CHECK15:       arraydestroy.body12:
2630 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENTPAST13:%.*]] = phi ptr [ [[TMP10]], [[ARRAYDESTROY_DONE10]] ], [ [[ARRAYDESTROY_ELEMENT14:%.*]], [[ARRAYDESTROY_BODY12]] ]
2631 // CHECK15-NEXT:    [[ARRAYDESTROY_ELEMENT14]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST13]], i32 -1
2632 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT14]]) #[[ATTR4]]
2633 // CHECK15-NEXT:    [[ARRAYDESTROY_DONE15:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT14]], [[ARRAY_BEGIN11]]
2634 // CHECK15-NEXT:    br i1 [[ARRAYDESTROY_DONE15]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY12]]
2635 // CHECK15:       arraydestroy.done16:
2636 // CHECK15-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2637 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[RETVAL]], align 4
2638 // CHECK15-NEXT:    ret i32 [[TMP11]]
2639 //
2640 //
2641 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2642 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2643 // CHECK15-NEXT:  entry:
2644 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2645 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2646 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2647 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2648 // CHECK15-NEXT:    store float 0.000000e+00, ptr [[F]], align 4
2649 // CHECK15-NEXT:    ret void
2650 //
2651 //
2652 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2653 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2654 // CHECK15-NEXT:  entry:
2655 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2656 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2657 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2658 // CHECK15-NEXT:    ret void
2659 //
2660 //
2661 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2662 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2663 // CHECK15-NEXT:  entry:
2664 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2665 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
2666 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2667 // CHECK15-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
2668 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2669 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2670 // CHECK15-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2671 // CHECK15-NEXT:    store float [[TMP0]], ptr [[F]], align 4
2672 // CHECK15-NEXT:    ret void
2673 //
2674 //
2675 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2676 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2677 // CHECK15-NEXT:  entry:
2678 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2679 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2680 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2681 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2682 // CHECK15-NEXT:    ret void
2683 //
2684 //
2685 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2686 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2687 // CHECK15-NEXT:  entry:
2688 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2689 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2690 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2691 // CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2692 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2693 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2694 // CHECK15-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
2695 // CHECK15-NEXT:    ret void
2696 //
2697 //
2698 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2699 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2700 // CHECK15-NEXT:  entry:
2701 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2702 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2703 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2704 // CHECK15-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2705 // CHECK15-NEXT:    ret void
2706 //
2707 //
2708 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2709 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2710 // CHECK15-NEXT:  entry:
2711 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2712 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2713 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2714 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2715 // CHECK15-NEXT:    store i32 0, ptr [[F]], align 4
2716 // CHECK15-NEXT:    ret void
2717 //
2718 //
2719 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2720 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2721 // CHECK15-NEXT:  entry:
2722 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2723 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
2724 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2725 // CHECK15-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
2726 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2727 // CHECK15-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2728 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2729 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
2730 // CHECK15-NEXT:    ret void
2731 //
2732 //
2733 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2734 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2735 // CHECK15-NEXT:  entry:
2736 // CHECK15-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2737 // CHECK15-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2738 // CHECK15-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2739 // CHECK15-NEXT:    ret void
2740 //