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Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / OpenMP / distribute_simd_lastprivate_codegen.cpp
blob84806e722ebd5282dbe13c2bc956432bd842f164
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK3
8
9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5
10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK5
12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7
13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK7
15
16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK11
22
23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13
24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK13
26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15
27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - -Wno-openmp-mapping | FileCheck %s --check-prefix=CHECK15
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
32
33 template <class T>
34 struct S {
35 T f;
36 S(T a) : f(a) {}
37 S() : f() {}
38 operator T() { return T(); }
39 ~S() {}
40 };
41
42 template <typename T>
43 T tmain() {
44 S<T> test;
45 T t_var = T();
46 T vec[] = {1, 2};
47 S<T> s_arr[] = {1, 2};
48 S<T> &var = test;
49 #pragma omp target
50 #pragma omp teams
51 #pragma omp distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var)
52 for (int i = 0; i < 2; ++i) {
53 vec[i] = t_var;
54 s_arr[i] = var;
55 }
56 return T();
57 }
58
59 int main() {
60 static int svar;
61 volatile double g;
62 volatile double &g1 = g;
63
64 #ifdef LAMBDA
65 [&]() {
66 static float sfvar;
67
68 #pragma omp target
69 #pragma omp teams
70 #pragma omp distribute simd lastprivate(g, g1, svar, sfvar)
71 for (int i = 0; i < 2; ++i) {
72 // loop variables
73
74 // init private variables
75 g = 1;
76 g1 = 1;
77 svar = 3;
78 sfvar = 4.0;
79
80 // linear counter
81
82
83
84
85 [&]() {
86 g = 2;
87 g1 = 2;
88 svar = 4;
89 sfvar = 8.0;
90
91 }();
92 }
93 }();
94 return 0;
95 #else
96 S<float> test;
97 int t_var = 0;
98 int vec[] = {1, 2};
99 S<float> s_arr[] = {1, 2};
100 S<float> &var = test;
101
102 #pragma omp target
103 #pragma omp teams
104 #pragma omp distribute simd lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)
105 for (int i = 0; i < 2; ++i) {
106 vec[i] = t_var;
107 s_arr[i] = var;
108 }
109 int i;
110
111 return tmain<int>();
112 #endif
113 }
114
115
116 // skip loop variables
117
118 // copy from parameters to local address variables
119
120 // load content of local address variables
121 // the distribute loop
122 // assignment: vec[i] = t_var;
123
124 // assignment: s_arr[i] = var;
125
126 // lastprivates
127
128
129 // template tmain
130
131
132
133 // skip alloca of global_tid and bound_tid
134 // skip loop variables
135
136 // skip init of bound and global tid
137 // copy from parameters to local address variables
138
139 // load content of local address variables
140 // assignment: vec[i] = t_var;
141
142 // assignment: s_arr[i] = var;
143
144 // lastprivates
145
146
147 #endif
148 // CHECK1-LABEL: define {{[^@]+}}@main
149 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
150 // CHECK1-NEXT: entry:
151 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
152 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
153 // CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8
154 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
155 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4
156 // CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8
157 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
158 // CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8
159 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
160 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8
161 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8
162 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
163 // CHECK1-NEXT: ret i32 0
164 //
165 //
166 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
167 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
168 // CHECK1-NEXT: entry:
169 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
170 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
171 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
172 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
173 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8
174 // CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8
175 // CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8
176 // CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
177 // CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
178 // CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8
179 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8
180 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G_ADDR]], ptr [[TMP0]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])
181 // CHECK1-NEXT: ret void
182 //
183 //
184 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
185 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
186 // CHECK1-NEXT: entry:
187 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
188 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
189 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 8
190 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 8
191 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8
192 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 8
193 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8
194 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8
195 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
196 // CHECK1-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
197 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
198 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
199 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
200 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
201 // CHECK1-NEXT: [[G3:%.*]] = alloca double, align 8
202 // CHECK1-NEXT: [[G14:%.*]] = alloca double, align 8
203 // CHECK1-NEXT: [[_TMP5:%.*]] = alloca ptr, align 8
204 // CHECK1-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
205 // CHECK1-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
206 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
207 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
208 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
209 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
210 // CHECK1-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 8
211 // CHECK1-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 8
212 // CHECK1-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
213 // CHECK1-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
214 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8
215 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 8
216 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
217 // CHECK1-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 8
218 // CHECK1-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 8
219 // CHECK1-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
220 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 8
221 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
222 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
223 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
224 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
225 // CHECK1-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
226 // CHECK1-NEXT: store ptr [[G14]], ptr [[_TMP5]], align 8
227 // CHECK1-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
228 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
229 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
230 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
231 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
232 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
233 // CHECK1: cond.true:
234 // CHECK1-NEXT: br label [[COND_END:%.*]]
235 // CHECK1: cond.false:
236 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
237 // CHECK1-NEXT: br label [[COND_END]]
238 // CHECK1: cond.end:
239 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
240 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
241 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
242 // CHECK1-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
243 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
244 // CHECK1: omp.inner.for.cond:
245 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4:![0-9]+]]
246 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP4]]
247 // CHECK1-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
248 // CHECK1-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
249 // CHECK1: omp.inner.for.body:
250 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
251 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
252 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
253 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP4]]
254 // CHECK1-NEXT: store double 1.000000e+00, ptr [[G3]], align 8, !llvm.access.group [[ACC_GRP4]]
255 // CHECK1-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP5]], align 8, !llvm.access.group [[ACC_GRP4]]
256 // CHECK1-NEXT: store volatile double 1.000000e+00, ptr [[TMP14]], align 8, !llvm.access.group [[ACC_GRP4]]
257 // CHECK1-NEXT: store i32 3, ptr [[SVAR6]], align 4, !llvm.access.group [[ACC_GRP4]]
258 // CHECK1-NEXT: store float 4.000000e+00, ptr [[SFVAR7]], align 4, !llvm.access.group [[ACC_GRP4]]
259 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
260 // CHECK1-NEXT: store ptr [[G3]], ptr [[TMP15]], align 8, !llvm.access.group [[ACC_GRP4]]
261 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
262 // CHECK1-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP5]], align 8, !llvm.access.group [[ACC_GRP4]]
263 // CHECK1-NEXT: store ptr [[TMP17]], ptr [[TMP16]], align 8, !llvm.access.group [[ACC_GRP4]]
264 // CHECK1-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
265 // CHECK1-NEXT: store ptr [[SVAR6]], ptr [[TMP18]], align 8, !llvm.access.group [[ACC_GRP4]]
266 // CHECK1-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
267 // CHECK1-NEXT: store ptr [[SFVAR7]], ptr [[TMP19]], align 8, !llvm.access.group [[ACC_GRP4]]
268 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]]), !llvm.access.group [[ACC_GRP4]]
269 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
270 // CHECK1: omp.body.continue:
271 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
272 // CHECK1: omp.inner.for.inc:
273 // CHECK1-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
274 // CHECK1-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
275 // CHECK1-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP4]]
276 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
277 // CHECK1: omp.inner.for.end:
278 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
279 // CHECK1: omp.loop.exit:
280 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])
281 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
282 // CHECK1-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
283 // CHECK1-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
284 // CHECK1: .omp.final.then:
285 // CHECK1-NEXT: store i32 2, ptr [[I]], align 4
286 // CHECK1-NEXT: br label [[DOTOMP_FINAL_DONE]]
287 // CHECK1: .omp.final.done:
288 // CHECK1-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
289 // CHECK1-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
290 // CHECK1-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
291 // CHECK1: .omp.lastprivate.then:
292 // CHECK1-NEXT: [[TMP25:%.*]] = load double, ptr [[G3]], align 8
293 // CHECK1-NEXT: store volatile double [[TMP25]], ptr [[TMP0]], align 8
294 // CHECK1-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP5]], align 8
295 // CHECK1-NEXT: [[TMP27:%.*]] = load double, ptr [[TMP26]], align 8
296 // CHECK1-NEXT: store volatile double [[TMP27]], ptr [[TMP5]], align 8
297 // CHECK1-NEXT: [[TMP28:%.*]] = load i32, ptr [[SVAR6]], align 4
298 // CHECK1-NEXT: store i32 [[TMP28]], ptr [[TMP2]], align 4
299 // CHECK1-NEXT: [[TMP29:%.*]] = load float, ptr [[SFVAR7]], align 4
300 // CHECK1-NEXT: store float [[TMP29]], ptr [[TMP3]], align 4
301 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
302 // CHECK1: .omp.lastprivate.done:
303 // CHECK1-NEXT: ret void
304 //
305 //
306 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
307 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
308 // CHECK1-NEXT: entry:
309 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
310 // CHECK1-NEXT: ret void
311 //
312 //
313 // CHECK3-LABEL: define {{[^@]+}}@main
314 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
315 // CHECK3-NEXT: entry:
316 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
317 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
318 // CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4
319 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
320 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4
321 // CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4
322 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
323 // CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4
324 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
325 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4
326 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4
327 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
328 // CHECK3-NEXT: ret i32 0
329 //
330 //
331 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68
332 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
333 // CHECK3-NEXT: entry:
334 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4
335 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4
336 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
337 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
338 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4
339 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
340 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
341 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4
342 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4
343 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4
344 // CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
345 // CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
346 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
347 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
348 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4
349 // CHECK3-NEXT: [[TMP2:%.*]] = load double, ptr [[TMP0]], align 8
350 // CHECK3-NEXT: store double [[TMP2]], ptr [[G2]], align 8
351 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
352 // CHECK3-NEXT: [[TMP4:%.*]] = load volatile double, ptr [[TMP3]], align 4
353 // CHECK3-NEXT: store double [[TMP4]], ptr [[G13]], align 8
354 // CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4
355 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP4]], align 4
356 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined, ptr [[G2]], ptr [[TMP5]], ptr [[SVAR_ADDR]], ptr [[SFVAR_ADDR]])
357 // CHECK3-NEXT: ret void
358 //
359 //
360 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l68.omp_outlined
361 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SFVAR:%.*]]) #[[ATTR2]] {
362 // CHECK3-NEXT: entry:
363 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
364 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
365 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4
366 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4
367 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 4
368 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca ptr, align 4
369 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4
370 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4
371 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
372 // CHECK3-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
373 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
374 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
375 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
376 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
377 // CHECK3-NEXT: [[G3:%.*]] = alloca double, align 8
378 // CHECK3-NEXT: [[G14:%.*]] = alloca double, align 8
379 // CHECK3-NEXT: [[_TMP5:%.*]] = alloca ptr, align 4
380 // CHECK3-NEXT: [[SVAR6:%.*]] = alloca i32, align 4
381 // CHECK3-NEXT: [[SFVAR7:%.*]] = alloca float, align 4
382 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
383 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
384 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
385 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
386 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4
387 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4
388 // CHECK3-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
389 // CHECK3-NEXT: store ptr [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
390 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
391 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
392 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
393 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[SFVAR_ADDR]], align 4
394 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4
395 // CHECK3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
396 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 4
397 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
398 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
399 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
400 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
401 // CHECK3-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4
402 // CHECK3-NEXT: store ptr [[G14]], ptr [[_TMP5]], align 4
403 // CHECK3-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
404 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
405 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
406 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
407 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
408 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
409 // CHECK3: cond.true:
410 // CHECK3-NEXT: br label [[COND_END:%.*]]
411 // CHECK3: cond.false:
412 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
413 // CHECK3-NEXT: br label [[COND_END]]
414 // CHECK3: cond.end:
415 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
416 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
417 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
418 // CHECK3-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
419 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
420 // CHECK3: omp.inner.for.cond:
421 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
422 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
423 // CHECK3-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
424 // CHECK3-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
425 // CHECK3: omp.inner.for.body:
426 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
427 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
428 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
429 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]
430 // CHECK3-NEXT: store double 1.000000e+00, ptr [[G3]], align 8, !llvm.access.group [[ACC_GRP5]]
431 // CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP5]], align 4, !llvm.access.group [[ACC_GRP5]]
432 // CHECK3-NEXT: store volatile double 1.000000e+00, ptr [[TMP14]], align 4, !llvm.access.group [[ACC_GRP5]]
433 // CHECK3-NEXT: store i32 3, ptr [[SVAR6]], align 4, !llvm.access.group [[ACC_GRP5]]
434 // CHECK3-NEXT: store float 4.000000e+00, ptr [[SFVAR7]], align 4, !llvm.access.group [[ACC_GRP5]]
435 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
436 // CHECK3-NEXT: store ptr [[G3]], ptr [[TMP15]], align 4, !llvm.access.group [[ACC_GRP5]]
437 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
438 // CHECK3-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP5]], align 4, !llvm.access.group [[ACC_GRP5]]
439 // CHECK3-NEXT: store ptr [[TMP17]], ptr [[TMP16]], align 4, !llvm.access.group [[ACC_GRP5]]
440 // CHECK3-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
441 // CHECK3-NEXT: store ptr [[SVAR6]], ptr [[TMP18]], align 4, !llvm.access.group [[ACC_GRP5]]
442 // CHECK3-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
443 // CHECK3-NEXT: store ptr [[SFVAR7]], ptr [[TMP19]], align 4, !llvm.access.group [[ACC_GRP5]]
444 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]]), !llvm.access.group [[ACC_GRP5]]
445 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
446 // CHECK3: omp.body.continue:
447 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
448 // CHECK3: omp.inner.for.inc:
449 // CHECK3-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
450 // CHECK3-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP20]], 1
451 // CHECK3-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
452 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
453 // CHECK3: omp.inner.for.end:
454 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
455 // CHECK3: omp.loop.exit:
456 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP7]])
457 // CHECK3-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
458 // CHECK3-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
459 // CHECK3-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
460 // CHECK3: .omp.final.then:
461 // CHECK3-NEXT: store i32 2, ptr [[I]], align 4
462 // CHECK3-NEXT: br label [[DOTOMP_FINAL_DONE]]
463 // CHECK3: .omp.final.done:
464 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
465 // CHECK3-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
466 // CHECK3-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
467 // CHECK3: .omp.lastprivate.then:
468 // CHECK3-NEXT: [[TMP25:%.*]] = load double, ptr [[G3]], align 8
469 // CHECK3-NEXT: store volatile double [[TMP25]], ptr [[TMP0]], align 8
470 // CHECK3-NEXT: [[TMP26:%.*]] = load ptr, ptr [[_TMP5]], align 4
471 // CHECK3-NEXT: [[TMP27:%.*]] = load double, ptr [[TMP26]], align 4
472 // CHECK3-NEXT: store volatile double [[TMP27]], ptr [[TMP5]], align 4
473 // CHECK3-NEXT: [[TMP28:%.*]] = load i32, ptr [[SVAR6]], align 4
474 // CHECK3-NEXT: store i32 [[TMP28]], ptr [[TMP2]], align 4
475 // CHECK3-NEXT: [[TMP29:%.*]] = load float, ptr [[SFVAR7]], align 4
476 // CHECK3-NEXT: store float [[TMP29]], ptr [[TMP3]], align 4
477 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
478 // CHECK3: .omp.lastprivate.done:
479 // CHECK3-NEXT: ret void
480 //
481 //
482 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
483 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
484 // CHECK3-NEXT: entry:
485 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
486 // CHECK3-NEXT: ret void
487 //
488 //
489 // CHECK5-LABEL: define {{[^@]+}}@main
490 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
491 // CHECK5-NEXT: entry:
492 // CHECK5-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
493 // CHECK5-NEXT: [[G:%.*]] = alloca double, align 8
494 // CHECK5-NEXT: [[G1:%.*]] = alloca ptr, align 8
495 // CHECK5-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
496 // CHECK5-NEXT: store i32 0, ptr [[RETVAL]], align 4
497 // CHECK5-NEXT: store ptr [[G]], ptr [[G1]], align 8
498 // CHECK5-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
499 // CHECK5-NEXT: store ptr [[G]], ptr [[TMP0]], align 8
500 // CHECK5-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
501 // CHECK5-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8
502 // CHECK5-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8
503 // CHECK5-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
504 // CHECK5-NEXT: ret i32 0
505 //
506 //
507 // CHECK7-LABEL: define {{[^@]+}}@main
508 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
509 // CHECK7-NEXT: entry:
510 // CHECK7-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
511 // CHECK7-NEXT: [[G:%.*]] = alloca double, align 8
512 // CHECK7-NEXT: [[G1:%.*]] = alloca ptr, align 4
513 // CHECK7-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
514 // CHECK7-NEXT: store i32 0, ptr [[RETVAL]], align 4
515 // CHECK7-NEXT: store ptr [[G]], ptr [[G1]], align 4
516 // CHECK7-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
517 // CHECK7-NEXT: store ptr [[G]], ptr [[TMP0]], align 4
518 // CHECK7-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
519 // CHECK7-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4
520 // CHECK7-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4
521 // CHECK7-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
522 // CHECK7-NEXT: ret i32 0
523 //
524 //
525 // CHECK9-LABEL: define {{[^@]+}}@main
526 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
527 // CHECK9-NEXT: entry:
528 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
529 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8
530 // CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8
531 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
532 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
533 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
534 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
535 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8
536 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
537 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
538 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
539 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8
540 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8
541 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8
542 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
543 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
544 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
545 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4
546 // CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8
547 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
548 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4
549 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
550 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
551 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
552 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
553 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
554 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8
555 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
556 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8
557 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
558 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
559 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
560 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
561 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4
562 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4
563 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8
564 // CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 8
565 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 8
566 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
567 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8
568 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
569 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8
570 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
571 // CHECK9-NEXT: store ptr null, ptr [[TMP10]], align 8
572 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
573 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 8
574 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
575 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 8
576 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
577 // CHECK9-NEXT: store ptr null, ptr [[TMP13]], align 8
578 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
579 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 8
580 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
581 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 8
582 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
583 // CHECK9-NEXT: store ptr null, ptr [[TMP16]], align 8
584 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
585 // CHECK9-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 8
586 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
587 // CHECK9-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 8
588 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
589 // CHECK9-NEXT: store ptr null, ptr [[TMP19]], align 8
590 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
591 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP20]], align 8
592 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
593 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP21]], align 8
594 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
595 // CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 8
596 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
597 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
598 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
599 // CHECK9-NEXT: store i32 2, ptr [[TMP25]], align 4
600 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
601 // CHECK9-NEXT: store i32 5, ptr [[TMP26]], align 4
602 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
603 // CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8
604 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
605 // CHECK9-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8
606 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
607 // CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 8
608 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
609 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 8
610 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
611 // CHECK9-NEXT: store ptr null, ptr [[TMP31]], align 8
612 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
613 // CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 8
614 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
615 // CHECK9-NEXT: store i64 2, ptr [[TMP33]], align 8
616 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
617 // CHECK9-NEXT: store i64 0, ptr [[TMP34]], align 8
618 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
619 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
620 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
621 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4
622 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
623 // CHECK9-NEXT: store i32 0, ptr [[TMP37]], align 4
624 // CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS]])
625 // CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
626 // CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
627 // CHECK9: omp_offload.failed:
628 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]
629 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
630 // CHECK9: omp_offload.cont:
631 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
632 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
633 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
634 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
635 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
636 // CHECK9: arraydestroy.body:
637 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
638 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
639 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
640 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
641 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
642 // CHECK9: arraydestroy.done2:
643 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
644 // CHECK9-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
645 // CHECK9-NEXT: ret i32 [[TMP41]]
646 //
647 //
648 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
649 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
650 // CHECK9-NEXT: entry:
651 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
652 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
653 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
654 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
655 // CHECK9-NEXT: ret void
656 //
657 //
658 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
659 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
660 // CHECK9-NEXT: entry:
661 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
662 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
663 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
664 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
665 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
666 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
667 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
668 // CHECK9-NEXT: ret void
669 //
670 //
671 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
672 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
673 // CHECK9-NEXT: entry:
674 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
675 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8
676 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
677 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8
678 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
679 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
680 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
681 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
682 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
683 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
684 // CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
685 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
686 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
687 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
688 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
689 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
690 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])
691 // CHECK9-NEXT: ret void
692 //
693 //
694 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined
695 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
696 // CHECK9-NEXT: entry:
697 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
698 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
699 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
700 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8
701 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
702 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8
703 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 8
704 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
705 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8
706 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
707 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
708 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
709 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
710 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
711 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
712 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
713 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
714 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
715 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
716 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca ptr, align 8
717 // CHECK9-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
718 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
719 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
720 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
721 // CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
722 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
723 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
724 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
725 // CHECK9-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 8
726 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
727 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
728 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
729 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
730 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 8
731 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8
732 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8
733 // CHECK9-NEXT: store ptr [[TMP5]], ptr [[_TMP1]], align 8
734 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
735 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
736 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
737 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
738 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
739 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
740 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
741 // CHECK9: arrayctor.loop:
742 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
743 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
744 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
745 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
746 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
747 // CHECK9: arrayctor.cont:
748 // CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 8
749 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
750 // CHECK9-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 8
751 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
752 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
753 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
754 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
755 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
756 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
757 // CHECK9: cond.true:
758 // CHECK9-NEXT: br label [[COND_END:%.*]]
759 // CHECK9: cond.false:
760 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
761 // CHECK9-NEXT: br label [[COND_END]]
762 // CHECK9: cond.end:
763 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
764 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
765 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
766 // CHECK9-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
767 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
768 // CHECK9: omp.inner.for.cond:
769 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5:![0-9]+]]
770 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP5]]
771 // CHECK9-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
772 // CHECK9-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
773 // CHECK9: omp.inner.for.cond.cleanup:
774 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
775 // CHECK9: omp.inner.for.body:
776 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
777 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
778 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
779 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]
780 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP5]]
781 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]
782 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
783 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]
784 // CHECK9-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP5]]
785 // CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP5]]
786 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP5]]
787 // CHECK9-NEXT: [[IDXPROM10:%.*]] = sext i32 [[TMP18]] to i64
788 // CHECK9-NEXT: [[ARRAYIDX11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM10]]
789 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX11]], ptr align 4 [[TMP17]], i64 4, i1 false), !llvm.access.group [[ACC_GRP5]]
790 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
791 // CHECK9: omp.body.continue:
792 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
793 // CHECK9: omp.inner.for.inc:
794 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
795 // CHECK9-NEXT: [[ADD12:%.*]] = add nsw i32 [[TMP19]], 1
796 // CHECK9-NEXT: store i32 [[ADD12]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP5]]
797 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
798 // CHECK9: omp.inner.for.end:
799 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
800 // CHECK9: omp.loop.exit:
801 // CHECK9-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
802 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
803 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
804 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
805 // CHECK9-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
806 // CHECK9-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
807 // CHECK9: .omp.final.then:
808 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4
809 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
810 // CHECK9: .omp.final.done:
811 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
812 // CHECK9-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
813 // CHECK9-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
814 // CHECK9: .omp.lastprivate.then:
815 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[T_VAR3]], align 4
816 // CHECK9-NEXT: store i32 [[TMP26]], ptr [[TMP0]], align 4
817 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i64 8, i1 false)
818 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
819 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i64 2
820 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN13]], [[TMP27]]
821 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE14:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
822 // CHECK9: omp.arraycpy.body:
823 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
824 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN13]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
825 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
826 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
827 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
828 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
829 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE14]], label [[OMP_ARRAYCPY_BODY]]
830 // CHECK9: omp.arraycpy.done14:
831 // CHECK9-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP7]], align 8
832 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i64 4, i1 false)
833 // CHECK9-NEXT: [[TMP29:%.*]] = load i32, ptr [[SVAR8]], align 4
834 // CHECK9-NEXT: store i32 [[TMP29]], ptr [[TMP4]], align 4
835 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
836 // CHECK9: .omp.lastprivate.done:
837 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
838 // CHECK9-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
839 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN15]], i64 2
840 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
841 // CHECK9: arraydestroy.body:
842 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
843 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
844 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
845 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN15]]
846 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE16:%.*]], label [[ARRAYDESTROY_BODY]]
847 // CHECK9: arraydestroy.done16:
848 // CHECK9-NEXT: ret void
849 //
850 //
851 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
852 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
853 // CHECK9-NEXT: entry:
854 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
855 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
856 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
857 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
858 // CHECK9-NEXT: ret void
859 //
860 //
861 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
862 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
863 // CHECK9-NEXT: entry:
864 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
865 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
866 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
867 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
868 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
869 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8
870 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
871 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
872 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8
873 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8
874 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8
875 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
876 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
877 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
878 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4
879 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
880 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
881 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
882 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
883 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
884 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8
885 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
886 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8
887 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
888 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
889 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
890 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
891 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
892 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8
893 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
894 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP6]], align 8
895 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
896 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8
897 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
898 // CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8
899 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
900 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 8
901 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
902 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 8
903 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
904 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8
905 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
906 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 8
907 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
908 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 8
909 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
910 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8
911 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
912 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 8
913 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
914 // CHECK9-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 8
915 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
916 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8
917 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
918 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
919 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
920 // CHECK9-NEXT: store i32 2, ptr [[TMP20]], align 4
921 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
922 // CHECK9-NEXT: store i32 4, ptr [[TMP21]], align 4
923 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
924 // CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 8
925 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
926 // CHECK9-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 8
927 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
928 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 8
929 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
930 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 8
931 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
932 // CHECK9-NEXT: store ptr null, ptr [[TMP26]], align 8
933 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
934 // CHECK9-NEXT: store ptr null, ptr [[TMP27]], align 8
935 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
936 // CHECK9-NEXT: store i64 2, ptr [[TMP28]], align 8
937 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
938 // CHECK9-NEXT: store i64 0, ptr [[TMP29]], align 8
939 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
940 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4
941 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
942 // CHECK9-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP31]], align 4
943 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
944 // CHECK9-NEXT: store i32 0, ptr [[TMP32]], align 4
945 // CHECK9-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])
946 // CHECK9-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
947 // CHECK9-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
948 // CHECK9: omp_offload.failed:
949 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i64 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]
950 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
951 // CHECK9: omp_offload.cont:
952 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4
953 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
954 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
955 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
956 // CHECK9: arraydestroy.body:
957 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
958 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
959 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
960 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
961 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
962 // CHECK9: arraydestroy.done2:
963 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
964 // CHECK9-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4
965 // CHECK9-NEXT: ret i32 [[TMP36]]
966 //
967 //
968 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
969 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
970 // CHECK9-NEXT: entry:
971 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
972 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
973 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
974 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
975 // CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4
976 // CHECK9-NEXT: ret void
977 //
978 //
979 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
980 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
981 // CHECK9-NEXT: entry:
982 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
983 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
984 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
985 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
986 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
987 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
988 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
989 // CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4
990 // CHECK9-NEXT: ret void
991 //
992 //
993 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
994 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
995 // CHECK9-NEXT: entry:
996 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
997 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
998 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
999 // CHECK9-NEXT: ret void
1000 //
1001 //
1002 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1003 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1004 // CHECK9-NEXT: entry:
1005 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1006 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1007 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1008 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1009 // CHECK9-NEXT: ret void
1010 //
1011 //
1012 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1013 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1014 // CHECK9-NEXT: entry:
1015 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1016 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1017 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1018 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1019 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1020 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1021 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
1022 // CHECK9-NEXT: ret void
1023 //
1024 //
1025 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1026 // CHECK9-SAME: (i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1027 // CHECK9-NEXT: entry:
1028 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
1029 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8
1030 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1031 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8
1032 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
1033 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1034 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1035 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1036 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1037 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1038 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1039 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1040 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
1041 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
1042 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])
1043 // CHECK9-NEXT: ret void
1044 //
1045 //
1046 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
1047 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1048 // CHECK9-NEXT: entry:
1049 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1050 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1051 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
1052 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8
1053 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1054 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8
1055 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
1056 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8
1057 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1058 // CHECK9-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1059 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1060 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1061 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1062 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1063 // CHECK9-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1064 // CHECK9-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1065 // CHECK9-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1066 // CHECK9-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1067 // CHECK9-NEXT: [[_TMP7:%.*]] = alloca ptr, align 8
1068 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1069 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1070 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1071 // CHECK9-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1072 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1073 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1074 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1075 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1076 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1077 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1078 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1079 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 8
1080 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1081 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 8
1082 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1083 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
1084 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1085 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1086 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1087 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1088 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1089 // CHECK9: arrayctor.loop:
1090 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1091 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1092 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
1093 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1094 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1095 // CHECK9: arrayctor.cont:
1096 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
1097 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1098 // CHECK9-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 8
1099 // CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1100 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1101 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1102 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1103 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1104 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1105 // CHECK9: cond.true:
1106 // CHECK9-NEXT: br label [[COND_END:%.*]]
1107 // CHECK9: cond.false:
1108 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1109 // CHECK9-NEXT: br label [[COND_END]]
1110 // CHECK9: cond.end:
1111 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1112 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1113 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1114 // CHECK9-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
1115 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1116 // CHECK9: omp.inner.for.cond:
1117 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
1118 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1119 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1120 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1121 // CHECK9: omp.inner.for.cond.cleanup:
1122 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1123 // CHECK9: omp.inner.for.body:
1124 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1125 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
1126 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1127 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
1128 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP11]]
1129 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
1130 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
1131 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i64 0, i64 [[IDXPROM]]
1132 // CHECK9-NEXT: store i32 [[TMP14]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]
1133 // CHECK9-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 8, !llvm.access.group [[ACC_GRP11]]
1134 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
1135 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP17]] to i64
1136 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i64 0, i64 [[IDXPROM9]]
1137 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP16]], i64 4, i1 false), !llvm.access.group [[ACC_GRP11]]
1138 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1139 // CHECK9: omp.body.continue:
1140 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1141 // CHECK9: omp.inner.for.inc:
1142 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1143 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP18]], 1
1144 // CHECK9-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1145 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1146 // CHECK9: omp.inner.for.end:
1147 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1148 // CHECK9: omp.loop.exit:
1149 // CHECK9-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1150 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
1151 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
1152 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1153 // CHECK9-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1154 // CHECK9-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1155 // CHECK9: .omp.final.then:
1156 // CHECK9-NEXT: store i32 2, ptr [[I]], align 4
1157 // CHECK9-NEXT: br label [[DOTOMP_FINAL_DONE]]
1158 // CHECK9: .omp.final.done:
1159 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1160 // CHECK9-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1161 // CHECK9-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1162 // CHECK9: .omp.lastprivate.then:
1163 // CHECK9-NEXT: [[TMP25:%.*]] = load i32, ptr [[T_VAR3]], align 4
1164 // CHECK9-NEXT: store i32 [[TMP25]], ptr [[TMP0]], align 4
1165 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i64 8, i1 false)
1166 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
1167 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
1168 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP26]]
1169 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1170 // CHECK9: omp.arraycpy.body:
1171 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1172 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1173 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1174 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1175 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1176 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]
1177 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
1178 // CHECK9: omp.arraycpy.done13:
1179 // CHECK9-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP7]], align 8
1180 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP27]], i64 4, i1 false)
1181 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1182 // CHECK9: .omp.lastprivate.done:
1183 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1184 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1185 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
1186 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1187 // CHECK9: arraydestroy.body:
1188 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1189 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1190 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1191 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1192 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1193 // CHECK9: arraydestroy.done15:
1194 // CHECK9-NEXT: ret void
1195 //
1196 //
1197 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1198 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1199 // CHECK9-NEXT: entry:
1200 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1201 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1202 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1203 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1204 // CHECK9-NEXT: ret void
1205 //
1206 //
1207 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1208 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1209 // CHECK9-NEXT: entry:
1210 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1211 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1212 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1213 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1214 // CHECK9-NEXT: store i32 0, ptr [[F]], align 4
1215 // CHECK9-NEXT: ret void
1216 //
1217 //
1218 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1219 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1220 // CHECK9-NEXT: entry:
1221 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1222 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1223 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1224 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1225 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1226 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1227 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1228 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 4
1229 // CHECK9-NEXT: ret void
1230 //
1231 //
1232 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1233 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1234 // CHECK9-NEXT: entry:
1235 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1236 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1237 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1238 // CHECK9-NEXT: ret void
1239 //
1240 //
1241 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1242 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1243 // CHECK9-NEXT: entry:
1244 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1245 // CHECK9-NEXT: ret void
1246 //
1247 //
1248 // CHECK11-LABEL: define {{[^@]+}}@main
1249 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
1250 // CHECK11-NEXT: entry:
1251 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1252 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8
1253 // CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 4
1254 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1255 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1256 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1257 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1258 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4
1259 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1260 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1261 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
1262 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4
1263 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4
1264 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4
1265 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1266 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1267 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1268 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4
1269 // CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 4
1270 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1271 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4
1272 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)
1273 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1274 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1275 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i32 1
1276 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1277 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4
1278 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
1279 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4
1280 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1281 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
1282 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
1283 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1284 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4
1285 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4
1286 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4
1287 // CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[TMP]], align 4
1288 // CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP]], align 4
1289 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1290 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 4
1291 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1292 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 4
1293 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1294 // CHECK11-NEXT: store ptr null, ptr [[TMP10]], align 4
1295 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1296 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP11]], align 4
1297 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1298 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP12]], align 4
1299 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1300 // CHECK11-NEXT: store ptr null, ptr [[TMP13]], align 4
1301 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1302 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP14]], align 4
1303 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1304 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP15]], align 4
1305 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1306 // CHECK11-NEXT: store ptr null, ptr [[TMP16]], align 4
1307 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1308 // CHECK11-NEXT: store ptr [[TMP6]], ptr [[TMP17]], align 4
1309 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1310 // CHECK11-NEXT: store ptr [[TMP7]], ptr [[TMP18]], align 4
1311 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1312 // CHECK11-NEXT: store ptr null, ptr [[TMP19]], align 4
1313 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1314 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP20]], align 4
1315 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1316 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP21]], align 4
1317 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1318 // CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 4
1319 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1320 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1321 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1322 // CHECK11-NEXT: store i32 2, ptr [[TMP25]], align 4
1323 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1324 // CHECK11-NEXT: store i32 5, ptr [[TMP26]], align 4
1325 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1326 // CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4
1327 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1328 // CHECK11-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4
1329 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1330 // CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP29]], align 4
1331 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1332 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP30]], align 4
1333 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1334 // CHECK11-NEXT: store ptr null, ptr [[TMP31]], align 4
1335 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1336 // CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 4
1337 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1338 // CHECK11-NEXT: store i64 2, ptr [[TMP33]], align 8
1339 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1340 // CHECK11-NEXT: store i64 0, ptr [[TMP34]], align 8
1341 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1342 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
1343 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1344 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP36]], align 4
1345 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1346 // CHECK11-NEXT: store i32 0, ptr [[TMP37]], align 4
1347 // CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS]])
1348 // CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
1349 // CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1350 // CHECK11: omp_offload.failed:
1351 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]
1352 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1353 // CHECK11: omp_offload.cont:
1354 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1355 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
1356 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1357 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1358 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1359 // CHECK11: arraydestroy.body:
1360 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP40]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1361 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1362 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1363 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1364 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1365 // CHECK11: arraydestroy.done2:
1366 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1367 // CHECK11-NEXT: [[TMP41:%.*]] = load i32, ptr [[RETVAL]], align 4
1368 // CHECK11-NEXT: ret i32 [[TMP41]]
1369 //
1370 //
1371 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1372 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1373 // CHECK11-NEXT: entry:
1374 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1375 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1376 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1377 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1378 // CHECK11-NEXT: ret void
1379 //
1380 //
1381 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1382 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1383 // CHECK11-NEXT: entry:
1384 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1385 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1386 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1387 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
1388 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1389 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1390 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1391 // CHECK11-NEXT: ret void
1392 //
1393 //
1394 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
1395 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1396 // CHECK11-NEXT: entry:
1397 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1398 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4
1399 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1400 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4
1401 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
1402 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1403 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1404 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1405 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1406 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1407 // CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
1408 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1409 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1410 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1411 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4
1412 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1413 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]], ptr [[SVAR_ADDR]])
1414 // CHECK11-NEXT: ret void
1415 //
1416 //
1417 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined
1418 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[SVAR:%.*]]) #[[ATTR3]] {
1419 // CHECK11-NEXT: entry:
1420 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1421 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1422 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
1423 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4
1424 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1425 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4
1426 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca ptr, align 4
1427 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1428 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4
1429 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1430 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1431 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1432 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1433 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1434 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1435 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1436 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1437 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S], align 4
1438 // CHECK11-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1439 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca ptr, align 4
1440 // CHECK11-NEXT: [[SVAR8:%.*]] = alloca i32, align 4
1441 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1442 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1443 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1444 // CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1445 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1446 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1447 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1448 // CHECK11-NEXT: store ptr [[SVAR]], ptr [[SVAR_ADDR]], align 4
1449 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
1450 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1451 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1452 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1453 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[SVAR_ADDR]], align 4
1454 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 4
1455 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4
1456 // CHECK11-NEXT: store ptr [[TMP5]], ptr [[_TMP1]], align 4
1457 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1458 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
1459 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1460 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1461 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1462 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1463 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1464 // CHECK11: arrayctor.loop:
1465 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1466 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1467 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
1468 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1469 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1470 // CHECK11: arrayctor.cont:
1471 // CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[_TMP1]], align 4
1472 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1473 // CHECK11-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 4
1474 // CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1475 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1476 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1477 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1478 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP9]], 1
1479 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1480 // CHECK11: cond.true:
1481 // CHECK11-NEXT: br label [[COND_END:%.*]]
1482 // CHECK11: cond.false:
1483 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1484 // CHECK11-NEXT: br label [[COND_END]]
1485 // CHECK11: cond.end:
1486 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP10]], [[COND_FALSE]] ]
1487 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1488 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1489 // CHECK11-NEXT: store i32 [[TMP11]], ptr [[DOTOMP_IV]], align 4
1490 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1491 // CHECK11: omp.inner.for.cond:
1492 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
1493 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
1494 // CHECK11-NEXT: [[CMP9:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1495 // CHECK11-NEXT: br i1 [[CMP9]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1496 // CHECK11: omp.inner.for.cond.cleanup:
1497 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1498 // CHECK11: omp.inner.for.body:
1499 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
1500 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1501 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1502 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
1503 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP6]]
1504 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
1505 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP16]]
1506 // CHECK11-NEXT: store i32 [[TMP15]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]
1507 // CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[_TMP7]], align 4, !llvm.access.group [[ACC_GRP6]]
1508 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
1509 // CHECK11-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 [[TMP18]]
1510 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP17]], i32 4, i1 false), !llvm.access.group [[ACC_GRP6]]
1511 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1512 // CHECK11: omp.body.continue:
1513 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1514 // CHECK11: omp.inner.for.inc:
1515 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
1516 // CHECK11-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP19]], 1
1517 // CHECK11-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
1518 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
1519 // CHECK11: omp.inner.for.end:
1520 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1521 // CHECK11: omp.loop.exit:
1522 // CHECK11-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1523 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
1524 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
1525 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1526 // CHECK11-NEXT: [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
1527 // CHECK11-NEXT: br i1 [[TMP23]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1528 // CHECK11: .omp.final.then:
1529 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4
1530 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
1531 // CHECK11: .omp.final.done:
1532 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1533 // CHECK11-NEXT: [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
1534 // CHECK11-NEXT: br i1 [[TMP25]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1535 // CHECK11: .omp.lastprivate.then:
1536 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[T_VAR3]], align 4
1537 // CHECK11-NEXT: store i32 [[TMP26]], ptr [[TMP0]], align 4
1538 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i32 8, i1 false)
1539 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i32 0, i32 0
1540 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i32 2
1541 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP27]]
1542 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1543 // CHECK11: omp.arraycpy.body:
1544 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1545 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1546 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
1547 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1548 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1549 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP27]]
1550 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
1551 // CHECK11: omp.arraycpy.done13:
1552 // CHECK11-NEXT: [[TMP28:%.*]] = load ptr, ptr [[_TMP7]], align 4
1553 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP6]], ptr align 4 [[TMP28]], i32 4, i1 false)
1554 // CHECK11-NEXT: [[TMP29:%.*]] = load i32, ptr [[SVAR8]], align 4
1555 // CHECK11-NEXT: store i32 [[TMP29]], ptr [[TMP4]], align 4
1556 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1557 // CHECK11: .omp.lastprivate.done:
1558 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1559 // CHECK11-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR5]], i32 0, i32 0
1560 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i32 2
1561 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1562 // CHECK11: arraydestroy.body:
1563 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP30]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1564 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1565 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1566 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
1567 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
1568 // CHECK11: arraydestroy.done15:
1569 // CHECK11-NEXT: ret void
1570 //
1571 //
1572 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1573 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1574 // CHECK11-NEXT: entry:
1575 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1576 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1577 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1578 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1579 // CHECK11-NEXT: ret void
1580 //
1581 //
1582 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1583 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
1584 // CHECK11-NEXT: entry:
1585 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1586 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1587 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1588 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1589 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1590 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4
1591 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1592 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1593 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4
1594 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4
1595 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4
1596 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1597 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1598 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1599 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4
1600 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
1601 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1602 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
1603 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i32 1
1604 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
1605 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4
1606 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
1607 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4
1608 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1609 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
1610 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
1611 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1612 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
1613 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4
1614 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1615 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP6]], align 4
1616 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1617 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 4
1618 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1619 // CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 4
1620 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1621 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP9]], align 4
1622 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1623 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP10]], align 4
1624 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1625 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4
1626 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1627 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 4
1628 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1629 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 4
1630 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1631 // CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 4
1632 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1633 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP15]], align 4
1634 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1635 // CHECK11-NEXT: store ptr [[TMP5]], ptr [[TMP16]], align 4
1636 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1637 // CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 4
1638 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1639 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1640 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1641 // CHECK11-NEXT: store i32 2, ptr [[TMP20]], align 4
1642 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1643 // CHECK11-NEXT: store i32 4, ptr [[TMP21]], align 4
1644 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1645 // CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP22]], align 4
1646 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1647 // CHECK11-NEXT: store ptr [[TMP19]], ptr [[TMP23]], align 4
1648 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1649 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP24]], align 4
1650 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1651 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP25]], align 4
1652 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1653 // CHECK11-NEXT: store ptr null, ptr [[TMP26]], align 4
1654 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1655 // CHECK11-NEXT: store ptr null, ptr [[TMP27]], align 4
1656 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1657 // CHECK11-NEXT: store i64 2, ptr [[TMP28]], align 8
1658 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1659 // CHECK11-NEXT: store i64 0, ptr [[TMP29]], align 8
1660 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1661 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP30]], align 4
1662 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1663 // CHECK11-NEXT: store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP31]], align 4
1664 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1665 // CHECK11-NEXT: store i32 0, ptr [[TMP32]], align 4
1666 // CHECK11-NEXT: [[TMP33:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 1, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])
1667 // CHECK11-NEXT: [[TMP34:%.*]] = icmp ne i32 [[TMP33]], 0
1668 // CHECK11-NEXT: br i1 [[TMP34]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1669 // CHECK11: omp_offload.failed:
1670 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(i32 [[TMP2]], ptr [[VEC]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]
1671 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1672 // CHECK11: omp_offload.cont:
1673 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4
1674 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1675 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
1676 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1677 // CHECK11: arraydestroy.body:
1678 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP35]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1679 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1680 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1681 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1682 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1683 // CHECK11: arraydestroy.done2:
1684 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1685 // CHECK11-NEXT: [[TMP36:%.*]] = load i32, ptr [[RETVAL]], align 4
1686 // CHECK11-NEXT: ret i32 [[TMP36]]
1687 //
1688 //
1689 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1690 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1691 // CHECK11-NEXT: entry:
1692 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1693 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1694 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1695 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1696 // CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 4
1697 // CHECK11-NEXT: ret void
1698 //
1699 //
1700 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1701 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1702 // CHECK11-NEXT: entry:
1703 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1704 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1705 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1706 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
1707 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1708 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1709 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1710 // CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 4
1711 // CHECK11-NEXT: ret void
1712 //
1713 //
1714 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1715 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1716 // CHECK11-NEXT: entry:
1717 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1718 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1719 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1720 // CHECK11-NEXT: ret void
1721 //
1722 //
1723 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1724 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1725 // CHECK11-NEXT: entry:
1726 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1727 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1728 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1729 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1730 // CHECK11-NEXT: ret void
1731 //
1732 //
1733 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1734 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1735 // CHECK11-NEXT: entry:
1736 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1737 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1738 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1739 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1740 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1741 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1742 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
1743 // CHECK11-NEXT: ret void
1744 //
1745 //
1746 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1747 // CHECK11-SAME: (i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1748 // CHECK11-NEXT: entry:
1749 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1750 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4
1751 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1752 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4
1753 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1754 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1755 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1756 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1757 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1758 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1759 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1760 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1761 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4
1762 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1763 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[T_VAR_ADDR]], ptr [[TMP0]], ptr [[TMP1]], ptr [[TMP3]])
1764 // CHECK11-NEXT: ret void
1765 //
1766 //
1767 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
1768 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1769 // CHECK11-NEXT: entry:
1770 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1771 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1772 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca ptr, align 4
1773 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4
1774 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1775 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4
1776 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1777 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4
1778 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1779 // CHECK11-NEXT: [[_TMP2:%.*]] = alloca i32, align 4
1780 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1781 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1782 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1783 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1784 // CHECK11-NEXT: [[T_VAR3:%.*]] = alloca i32, align 4
1785 // CHECK11-NEXT: [[VEC4:%.*]] = alloca [2 x i32], align 4
1786 // CHECK11-NEXT: [[S_ARR5:%.*]] = alloca [2 x %struct.S.0], align 4
1787 // CHECK11-NEXT: [[VAR6:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1788 // CHECK11-NEXT: [[_TMP7:%.*]] = alloca ptr, align 4
1789 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1790 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1791 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1792 // CHECK11-NEXT: store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1793 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1794 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1795 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1796 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 4
1797 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1798 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1799 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1800 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP]], align 4
1801 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 4
1802 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[_TMP1]], align 4
1803 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1804 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
1805 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1806 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1807 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1808 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
1809 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1810 // CHECK11: arrayctor.loop:
1811 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1812 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1813 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
1814 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1815 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1816 // CHECK11: arrayctor.cont:
1817 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 4
1818 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]])
1819 // CHECK11-NEXT: store ptr [[VAR6]], ptr [[_TMP7]], align 4
1820 // CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1821 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1822 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1823 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1824 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP8]], 1
1825 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1826 // CHECK11: cond.true:
1827 // CHECK11-NEXT: br label [[COND_END:%.*]]
1828 // CHECK11: cond.false:
1829 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1830 // CHECK11-NEXT: br label [[COND_END]]
1831 // CHECK11: cond.end:
1832 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
1833 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1834 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1835 // CHECK11-NEXT: store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
1836 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1837 // CHECK11: omp.inner.for.cond:
1838 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
1839 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]
1840 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
1841 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1842 // CHECK11: omp.inner.for.cond.cleanup:
1843 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1844 // CHECK11: omp.inner.for.body:
1845 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
1846 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP13]], 1
1847 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1848 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
1849 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR3]], align 4, !llvm.access.group [[ACC_GRP12]]
1850 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
1851 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC4]], i32 0, i32 [[TMP15]]
1852 // CHECK11-NEXT: store i32 [[TMP14]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]
1853 // CHECK11-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP7]], align 4, !llvm.access.group [[ACC_GRP12]]
1854 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP12]]
1855 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 [[TMP17]]
1856 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP16]], i32 4, i1 false), !llvm.access.group [[ACC_GRP12]]
1857 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1858 // CHECK11: omp.body.continue:
1859 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1860 // CHECK11: omp.inner.for.inc:
1861 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
1862 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP18]], 1
1863 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
1864 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
1865 // CHECK11: omp.inner.for.end:
1866 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1867 // CHECK11: omp.loop.exit:
1868 // CHECK11-NEXT: [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1869 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
1870 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP20]])
1871 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1872 // CHECK11-NEXT: [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
1873 // CHECK11-NEXT: br i1 [[TMP22]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
1874 // CHECK11: .omp.final.then:
1875 // CHECK11-NEXT: store i32 2, ptr [[I]], align 4
1876 // CHECK11-NEXT: br label [[DOTOMP_FINAL_DONE]]
1877 // CHECK11: .omp.final.done:
1878 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1879 // CHECK11-NEXT: [[TMP24:%.*]] = icmp ne i32 [[TMP23]], 0
1880 // CHECK11-NEXT: br i1 [[TMP24]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1881 // CHECK11: .omp.lastprivate.then:
1882 // CHECK11-NEXT: [[TMP25:%.*]] = load i32, ptr [[T_VAR3]], align 4
1883 // CHECK11-NEXT: store i32 [[TMP25]], ptr [[TMP0]], align 4
1884 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP1]], ptr align 4 [[VEC4]], i32 8, i1 false)
1885 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i32 0, i32 0
1886 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2
1887 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP26]]
1888 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1889 // CHECK11: omp.arraycpy.body:
1890 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR5]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1891 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1892 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
1893 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1894 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1895 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP26]]
1896 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
1897 // CHECK11: omp.arraycpy.done12:
1898 // CHECK11-NEXT: [[TMP27:%.*]] = load ptr, ptr [[_TMP7]], align 4
1899 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP27]], i32 4, i1 false)
1900 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1901 // CHECK11: .omp.lastprivate.done:
1902 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR6]]) #[[ATTR4]]
1903 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR5]], i32 0, i32 0
1904 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i32 2
1905 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1906 // CHECK11: arraydestroy.body:
1907 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP28]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1908 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1909 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1910 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
1911 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
1912 // CHECK11: arraydestroy.done14:
1913 // CHECK11-NEXT: ret void
1914 //
1915 //
1916 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1917 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1918 // CHECK11-NEXT: entry:
1919 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1920 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1921 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1922 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1923 // CHECK11-NEXT: ret void
1924 //
1925 //
1926 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1927 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1928 // CHECK11-NEXT: entry:
1929 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1930 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1931 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1932 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1933 // CHECK11-NEXT: store i32 0, ptr [[F]], align 4
1934 // CHECK11-NEXT: ret void
1935 //
1936 //
1937 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1938 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1939 // CHECK11-NEXT: entry:
1940 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1941 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1942 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1943 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1944 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1945 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1946 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1947 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 4
1948 // CHECK11-NEXT: ret void
1949 //
1950 //
1951 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1952 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1953 // CHECK11-NEXT: entry:
1954 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1955 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1956 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1957 // CHECK11-NEXT: ret void
1958 //
1959 //
1960 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1961 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
1962 // CHECK11-NEXT: entry:
1963 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
1964 // CHECK11-NEXT: ret void
1965 //
1966 //
1967 // CHECK13-LABEL: define {{[^@]+}}@main
1968 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
1969 // CHECK13-NEXT: entry:
1970 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1971 // CHECK13-NEXT: [[G:%.*]] = alloca double, align 8
1972 // CHECK13-NEXT: [[G1:%.*]] = alloca ptr, align 8
1973 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1974 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1975 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1976 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1977 // CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 8
1978 // CHECK13-NEXT: [[TMP:%.*]] = alloca ptr, align 8
1979 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8
1980 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8
1981 // CHECK13-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
1982 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1983 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1984 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1985 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
1986 // CHECK13-NEXT: [[T_VAR4:%.*]] = alloca i32, align 4
1987 // CHECK13-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4
1988 // CHECK13-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
1989 // CHECK13-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S]], align 4
1990 // CHECK13-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8
1991 // CHECK13-NEXT: [[SVAR:%.*]] = alloca i32, align 4
1992 // CHECK13-NEXT: [[I16:%.*]] = alloca i32, align 4
1993 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4
1994 // CHECK13-NEXT: store ptr [[G]], ptr [[G1]], align 8
1995 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1996 // CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 4
1997 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
1998 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
1999 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
2000 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
2001 // CHECK13-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
2002 // CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8
2003 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
2004 // CHECK13-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8
2005 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8
2006 // CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
2007 // CHECK13-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 8
2008 // CHECK13-NEXT: [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 8
2009 // CHECK13-NEXT: store ptr [[TMP3]], ptr [[_TMP2]], align 8
2010 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2011 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
2012 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2013 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2014 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 0
2015 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
2016 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2017 // CHECK13: arrayctor.loop:
2018 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2019 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2020 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
2021 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2022 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2023 // CHECK13: arrayctor.cont:
2024 // CHECK13-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 8
2025 // CHECK13-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])
2026 // CHECK13-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 8
2027 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2028 // CHECK13: omp.inner.for.cond:
2029 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2:![0-9]+]]
2030 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP2]]
2031 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2032 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2033 // CHECK13: omp.inner.for.cond.cleanup:
2034 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2035 // CHECK13: omp.inner.for.body:
2036 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2037 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2038 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2039 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2040 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP2]]
2041 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2042 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
2043 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i64 0, i64 [[IDXPROM]]
2044 // CHECK13-NEXT: store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP2]]
2045 // CHECK13-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 8, !llvm.access.group [[ACC_GRP2]]
2046 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP2]]
2047 // CHECK13-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP12]] to i64
2048 // CHECK13-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i64 0, i64 [[IDXPROM9]]
2049 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP11]], i64 4, i1 false), !llvm.access.group [[ACC_GRP2]]
2050 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2051 // CHECK13: omp.body.continue:
2052 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2053 // CHECK13: omp.inner.for.inc:
2054 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2055 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP13]], 1
2056 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP2]]
2057 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP3:![0-9]+]]
2058 // CHECK13: omp.inner.for.end:
2059 // CHECK13-NEXT: store i32 2, ptr [[I]], align 4
2060 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 4
2061 // CHECK13-NEXT: store i32 [[TMP14]], ptr [[T_VAR]], align 4
2062 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i64 8, i1 false)
2063 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2064 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
2065 // CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP15]]
2066 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2067 // CHECK13: omp.arraycpy.body:
2068 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2069 // CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2070 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
2071 // CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2072 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2073 // CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
2074 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
2075 // CHECK13: omp.arraycpy.done13:
2076 // CHECK13-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 8
2077 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i64 4, i1 false)
2078 // CHECK13-NEXT: [[TMP17:%.*]] = load i32, ptr [[SVAR]], align 4
2079 // CHECK13-NEXT: store i32 [[TMP17]], ptr @_ZZ4mainE4svar, align 4
2080 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4:[0-9]+]]
2081 // CHECK13-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 0
2082 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2
2083 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2084 // CHECK13: arraydestroy.body:
2085 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2086 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2087 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2088 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
2089 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
2090 // CHECK13: arraydestroy.done15:
2091 // CHECK13-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
2092 // CHECK13-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
2093 // CHECK13-NEXT: [[ARRAY_BEGIN17:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2094 // CHECK13-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN17]], i64 2
2095 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY18:%.*]]
2096 // CHECK13: arraydestroy.body18:
2097 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST19:%.*]] = phi ptr [ [[TMP19]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT20:%.*]], [[ARRAYDESTROY_BODY18]] ]
2098 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT20]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST19]], i64 -1
2099 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT20]]) #[[ATTR4]]
2100 // CHECK13-NEXT: [[ARRAYDESTROY_DONE21:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT20]], [[ARRAY_BEGIN17]]
2101 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE21]], label [[ARRAYDESTROY_DONE22:%.*]], label [[ARRAYDESTROY_BODY18]]
2102 // CHECK13: arraydestroy.done22:
2103 // CHECK13-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2104 // CHECK13-NEXT: [[TMP20:%.*]] = load i32, ptr [[RETVAL]], align 4
2105 // CHECK13-NEXT: ret i32 [[TMP20]]
2106 //
2107 //
2108 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2109 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
2110 // CHECK13-NEXT: entry:
2111 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2112 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2113 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2114 // CHECK13-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2115 // CHECK13-NEXT: ret void
2116 //
2117 //
2118 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2119 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2120 // CHECK13-NEXT: entry:
2121 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2122 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2123 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2124 // CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
2125 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2126 // CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2127 // CHECK13-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
2128 // CHECK13-NEXT: ret void
2129 //
2130 //
2131 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2132 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2133 // CHECK13-NEXT: entry:
2134 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2135 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2136 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2137 // CHECK13-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2138 // CHECK13-NEXT: ret void
2139 //
2140 //
2141 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2142 // CHECK13-SAME: () #[[ATTR3:[0-9]+]] comdat {
2143 // CHECK13-NEXT: entry:
2144 // CHECK13-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2145 // CHECK13-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2146 // CHECK13-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2147 // CHECK13-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2148 // CHECK13-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2149 // CHECK13-NEXT: [[VAR:%.*]] = alloca ptr, align 8
2150 // CHECK13-NEXT: [[TMP:%.*]] = alloca ptr, align 8
2151 // CHECK13-NEXT: [[_TMP1:%.*]] = alloca ptr, align 8
2152 // CHECK13-NEXT: [[_TMP2:%.*]] = alloca ptr, align 8
2153 // CHECK13-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
2154 // CHECK13-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2155 // CHECK13-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2156 // CHECK13-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2157 // CHECK13-NEXT: [[I:%.*]] = alloca i32, align 4
2158 // CHECK13-NEXT: [[T_VAR4:%.*]] = alloca i32, align 4
2159 // CHECK13-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4
2160 // CHECK13-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 4
2161 // CHECK13-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 4
2162 // CHECK13-NEXT: [[_TMP8:%.*]] = alloca ptr, align 8
2163 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2164 // CHECK13-NEXT: store i32 0, ptr [[T_VAR]], align 4
2165 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
2166 // CHECK13-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
2167 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
2168 // CHECK13-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
2169 // CHECK13-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
2170 // CHECK13-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8
2171 // CHECK13-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
2172 // CHECK13-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8
2173 // CHECK13-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 8
2174 // CHECK13-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
2175 // CHECK13-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 8
2176 // CHECK13-NEXT: [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 8
2177 // CHECK13-NEXT: store ptr [[TMP3]], ptr [[_TMP2]], align 8
2178 // CHECK13-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2179 // CHECK13-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
2180 // CHECK13-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2181 // CHECK13-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2182 // CHECK13-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 0
2183 // CHECK13-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
2184 // CHECK13-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2185 // CHECK13: arrayctor.loop:
2186 // CHECK13-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2187 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2188 // CHECK13-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
2189 // CHECK13-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2190 // CHECK13-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2191 // CHECK13: arrayctor.cont:
2192 // CHECK13-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 8
2193 // CHECK13-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])
2194 // CHECK13-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 8
2195 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2196 // CHECK13: omp.inner.for.cond:
2197 // CHECK13-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6:![0-9]+]]
2198 // CHECK13-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP6]]
2199 // CHECK13-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2200 // CHECK13-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2201 // CHECK13: omp.inner.for.cond.cleanup:
2202 // CHECK13-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2203 // CHECK13: omp.inner.for.body:
2204 // CHECK13-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
2205 // CHECK13-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2206 // CHECK13-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2207 // CHECK13-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
2208 // CHECK13-NEXT: [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP6]]
2209 // CHECK13-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
2210 // CHECK13-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP10]] to i64
2211 // CHECK13-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i64 0, i64 [[IDXPROM]]
2212 // CHECK13-NEXT: store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP6]]
2213 // CHECK13-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 8, !llvm.access.group [[ACC_GRP6]]
2214 // CHECK13-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP6]]
2215 // CHECK13-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP12]] to i64
2216 // CHECK13-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i64 0, i64 [[IDXPROM9]]
2217 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP11]], i64 4, i1 false), !llvm.access.group [[ACC_GRP6]]
2218 // CHECK13-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2219 // CHECK13: omp.body.continue:
2220 // CHECK13-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2221 // CHECK13: omp.inner.for.inc:
2222 // CHECK13-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
2223 // CHECK13-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP13]], 1
2224 // CHECK13-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP6]]
2225 // CHECK13-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
2226 // CHECK13: omp.inner.for.end:
2227 // CHECK13-NEXT: store i32 2, ptr [[I]], align 4
2228 // CHECK13-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 4
2229 // CHECK13-NEXT: store i32 [[TMP14]], ptr [[T_VAR]], align 4
2230 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i64 8, i1 false)
2231 // CHECK13-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2232 // CHECK13-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i64 2
2233 // CHECK13-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP15]]
2234 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2235 // CHECK13: omp.arraycpy.body:
2236 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2237 // CHECK13-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2238 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
2239 // CHECK13-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2240 // CHECK13-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2241 // CHECK13-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
2242 // CHECK13-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
2243 // CHECK13: omp.arraycpy.done13:
2244 // CHECK13-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 8
2245 // CHECK13-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i64 4, i1 false)
2246 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2247 // CHECK13-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 0
2248 // CHECK13-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN14]], i64 2
2249 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2250 // CHECK13: arraydestroy.body:
2251 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE13]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2252 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
2253 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2254 // CHECK13-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
2255 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
2256 // CHECK13: arraydestroy.done15:
2257 // CHECK13-NEXT: store i32 0, ptr [[RETVAL]], align 4
2258 // CHECK13-NEXT: [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2259 // CHECK13-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN16]], i64 2
2260 // CHECK13-NEXT: br label [[ARRAYDESTROY_BODY17:%.*]]
2261 // CHECK13: arraydestroy.body17:
2262 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE15]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
2263 // CHECK13-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i64 -1
2264 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]]
2265 // CHECK13-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
2266 // CHECK13-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
2267 // CHECK13: arraydestroy.done21:
2268 // CHECK13-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2269 // CHECK13-NEXT: [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 4
2270 // CHECK13-NEXT: ret i32 [[TMP19]]
2271 //
2272 //
2273 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2274 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2275 // CHECK13-NEXT: entry:
2276 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2277 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2278 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2279 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2280 // CHECK13-NEXT: store float 0.000000e+00, ptr [[F]], align 4
2281 // CHECK13-NEXT: ret void
2282 //
2283 //
2284 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2285 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2286 // CHECK13-NEXT: entry:
2287 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2288 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2289 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2290 // CHECK13-NEXT: ret void
2291 //
2292 //
2293 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2294 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2295 // CHECK13-NEXT: entry:
2296 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2297 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2298 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2299 // CHECK13-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
2300 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2301 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2302 // CHECK13-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2303 // CHECK13-NEXT: store float [[TMP0]], ptr [[F]], align 4
2304 // CHECK13-NEXT: ret void
2305 //
2306 //
2307 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2308 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2309 // CHECK13-NEXT: entry:
2310 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2311 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2312 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2313 // CHECK13-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2314 // CHECK13-NEXT: ret void
2315 //
2316 //
2317 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2318 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2319 // CHECK13-NEXT: entry:
2320 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2321 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2322 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2323 // CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
2324 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2325 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2326 // CHECK13-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
2327 // CHECK13-NEXT: ret void
2328 //
2329 //
2330 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2331 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2332 // CHECK13-NEXT: entry:
2333 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2334 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2335 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2336 // CHECK13-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2337 // CHECK13-NEXT: ret void
2338 //
2339 //
2340 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2341 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2342 // CHECK13-NEXT: entry:
2343 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2344 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2345 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2346 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2347 // CHECK13-NEXT: store i32 0, ptr [[F]], align 4
2348 // CHECK13-NEXT: ret void
2349 //
2350 //
2351 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2352 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2353 // CHECK13-NEXT: entry:
2354 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2355 // CHECK13-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2356 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2357 // CHECK13-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
2358 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2359 // CHECK13-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2360 // CHECK13-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2361 // CHECK13-NEXT: store i32 [[TMP0]], ptr [[F]], align 4
2362 // CHECK13-NEXT: ret void
2363 //
2364 //
2365 // CHECK13-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2366 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2367 // CHECK13-NEXT: entry:
2368 // CHECK13-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2369 // CHECK13-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2370 // CHECK13-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2371 // CHECK13-NEXT: ret void
2372 //
2373 //
2374 // CHECK15-LABEL: define {{[^@]+}}@main
2375 // CHECK15-SAME: () #[[ATTR0:[0-9]+]] {
2376 // CHECK15-NEXT: entry:
2377 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2378 // CHECK15-NEXT: [[G:%.*]] = alloca double, align 8
2379 // CHECK15-NEXT: [[G1:%.*]] = alloca ptr, align 4
2380 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
2381 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2382 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2383 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
2384 // CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 4
2385 // CHECK15-NEXT: [[TMP:%.*]] = alloca ptr, align 4
2386 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4
2387 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4
2388 // CHECK15-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
2389 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2390 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2391 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2392 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
2393 // CHECK15-NEXT: [[T_VAR4:%.*]] = alloca i32, align 4
2394 // CHECK15-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4
2395 // CHECK15-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S], align 4
2396 // CHECK15-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S]], align 4
2397 // CHECK15-NEXT: [[_TMP8:%.*]] = alloca ptr, align 4
2398 // CHECK15-NEXT: [[SVAR:%.*]] = alloca i32, align 4
2399 // CHECK15-NEXT: [[I15:%.*]] = alloca i32, align 4
2400 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4
2401 // CHECK15-NEXT: store ptr [[G]], ptr [[G1]], align 4
2402 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2403 // CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 4
2404 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)
2405 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2406 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
2407 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i32 1
2408 // CHECK15-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
2409 // CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4
2410 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
2411 // CHECK15-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4
2412 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4
2413 // CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4
2414 // CHECK15-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 4
2415 // CHECK15-NEXT: [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 4
2416 // CHECK15-NEXT: store ptr [[TMP3]], ptr [[_TMP2]], align 4
2417 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2418 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
2419 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2420 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2421 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 0
2422 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
2423 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2424 // CHECK15: arrayctor.loop:
2425 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2426 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2427 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
2428 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2429 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2430 // CHECK15: arrayctor.cont:
2431 // CHECK15-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 4
2432 // CHECK15-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])
2433 // CHECK15-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 4
2434 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2435 // CHECK15: omp.inner.for.cond:
2436 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]
2437 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]
2438 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2439 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2440 // CHECK15: omp.inner.for.cond.cleanup:
2441 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2442 // CHECK15: omp.inner.for.body:
2443 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
2444 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2445 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2446 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
2447 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP3]]
2448 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
2449 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i32 0, i32 [[TMP10]]
2450 // CHECK15-NEXT: store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP3]]
2451 // CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 4, !llvm.access.group [[ACC_GRP3]]
2452 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
2453 // CHECK15-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 [[TMP12]]
2454 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP11]], i32 4, i1 false), !llvm.access.group [[ACC_GRP3]]
2455 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2456 // CHECK15: omp.body.continue:
2457 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2458 // CHECK15: omp.inner.for.inc:
2459 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
2460 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP13]], 1
2461 // CHECK15-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
2462 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
2463 // CHECK15: omp.inner.for.end:
2464 // CHECK15-NEXT: store i32 2, ptr [[I]], align 4
2465 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 4
2466 // CHECK15-NEXT: store i32 [[TMP14]], ptr [[T_VAR]], align 4
2467 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i32 8, i1 false)
2468 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2469 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
2470 // CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP15]]
2471 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2472 // CHECK15: omp.arraycpy.body:
2473 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2474 // CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2475 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2476 // CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2477 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2478 // CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
2479 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
2480 // CHECK15: omp.arraycpy.done12:
2481 // CHECK15-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 4
2482 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i32 4, i1 false)
2483 // CHECK15-NEXT: [[TMP17:%.*]] = load i32, ptr [[SVAR]], align 4
2484 // CHECK15-NEXT: store i32 [[TMP17]], ptr @_ZZ4mainE4svar, align 4
2485 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4:[0-9]+]]
2486 // CHECK15-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR6]], i32 0, i32 0
2487 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
2488 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2489 // CHECK15: arraydestroy.body:
2490 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP18]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2491 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2492 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2493 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2494 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2495 // CHECK15: arraydestroy.done14:
2496 // CHECK15-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
2497 // CHECK15-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
2498 // CHECK15-NEXT: [[ARRAY_BEGIN16:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
2499 // CHECK15-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN16]], i32 2
2500 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY17:%.*]]
2501 // CHECK15: arraydestroy.body17:
2502 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST18:%.*]] = phi ptr [ [[TMP19]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT19:%.*]], [[ARRAYDESTROY_BODY17]] ]
2503 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT19]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST18]], i32 -1
2504 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT19]]) #[[ATTR4]]
2505 // CHECK15-NEXT: [[ARRAYDESTROY_DONE20:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT19]], [[ARRAY_BEGIN16]]
2506 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE20]], label [[ARRAYDESTROY_DONE21:%.*]], label [[ARRAYDESTROY_BODY17]]
2507 // CHECK15: arraydestroy.done21:
2508 // CHECK15-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2509 // CHECK15-NEXT: [[TMP20:%.*]] = load i32, ptr [[RETVAL]], align 4
2510 // CHECK15-NEXT: ret i32 [[TMP20]]
2511 //
2512 //
2513 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
2514 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
2515 // CHECK15-NEXT: entry:
2516 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2517 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2518 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2519 // CHECK15-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2520 // CHECK15-NEXT: ret void
2521 //
2522 //
2523 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
2524 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2525 // CHECK15-NEXT: entry:
2526 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2527 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2528 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2529 // CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
2530 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2531 // CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2532 // CHECK15-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
2533 // CHECK15-NEXT: ret void
2534 //
2535 //
2536 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
2537 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2538 // CHECK15-NEXT: entry:
2539 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2540 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2541 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2542 // CHECK15-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2543 // CHECK15-NEXT: ret void
2544 //
2545 //
2546 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
2547 // CHECK15-SAME: () #[[ATTR3:[0-9]+]] comdat {
2548 // CHECK15-NEXT: entry:
2549 // CHECK15-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2550 // CHECK15-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
2551 // CHECK15-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
2552 // CHECK15-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
2553 // CHECK15-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
2554 // CHECK15-NEXT: [[VAR:%.*]] = alloca ptr, align 4
2555 // CHECK15-NEXT: [[TMP:%.*]] = alloca ptr, align 4
2556 // CHECK15-NEXT: [[_TMP1:%.*]] = alloca ptr, align 4
2557 // CHECK15-NEXT: [[_TMP2:%.*]] = alloca ptr, align 4
2558 // CHECK15-NEXT: [[_TMP3:%.*]] = alloca i32, align 4
2559 // CHECK15-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2560 // CHECK15-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2561 // CHECK15-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2562 // CHECK15-NEXT: [[I:%.*]] = alloca i32, align 4
2563 // CHECK15-NEXT: [[T_VAR4:%.*]] = alloca i32, align 4
2564 // CHECK15-NEXT: [[VEC5:%.*]] = alloca [2 x i32], align 4
2565 // CHECK15-NEXT: [[S_ARR6:%.*]] = alloca [2 x %struct.S.0], align 4
2566 // CHECK15-NEXT: [[VAR7:%.*]] = alloca [[STRUCT_S_0]], align 4
2567 // CHECK15-NEXT: [[_TMP8:%.*]] = alloca ptr, align 4
2568 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
2569 // CHECK15-NEXT: store i32 0, ptr [[T_VAR]], align 4
2570 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
2571 // CHECK15-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2572 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
2573 // CHECK15-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i32 1
2574 // CHECK15-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
2575 // CHECK15-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4
2576 // CHECK15-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
2577 // CHECK15-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4
2578 // CHECK15-NEXT: [[TMP1:%.*]] = load ptr, ptr [[VAR]], align 4
2579 // CHECK15-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4
2580 // CHECK15-NEXT: store ptr [[TMP2]], ptr [[_TMP1]], align 4
2581 // CHECK15-NEXT: [[TMP3:%.*]] = load ptr, ptr [[_TMP1]], align 4
2582 // CHECK15-NEXT: store ptr [[TMP3]], ptr [[_TMP2]], align 4
2583 // CHECK15-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2584 // CHECK15-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
2585 // CHECK15-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2586 // CHECK15-NEXT: store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2587 // CHECK15-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 0
2588 // CHECK15-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
2589 // CHECK15-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
2590 // CHECK15: arrayctor.loop:
2591 // CHECK15-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
2592 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
2593 // CHECK15-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
2594 // CHECK15-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
2595 // CHECK15-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
2596 // CHECK15: arrayctor.cont:
2597 // CHECK15-NEXT: [[TMP5:%.*]] = load ptr, ptr [[_TMP2]], align 4
2598 // CHECK15-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]])
2599 // CHECK15-NEXT: store ptr [[VAR7]], ptr [[_TMP8]], align 4
2600 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2601 // CHECK15: omp.inner.for.cond:
2602 // CHECK15-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7:![0-9]+]]
2603 // CHECK15-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP7]]
2604 // CHECK15-NEXT: [[CMP:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2605 // CHECK15-NEXT: br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
2606 // CHECK15: omp.inner.for.cond.cleanup:
2607 // CHECK15-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
2608 // CHECK15: omp.inner.for.body:
2609 // CHECK15-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
2610 // CHECK15-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2611 // CHECK15-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2612 // CHECK15-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
2613 // CHECK15-NEXT: [[TMP9:%.*]] = load i32, ptr [[T_VAR4]], align 4, !llvm.access.group [[ACC_GRP7]]
2614 // CHECK15-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
2615 // CHECK15-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC5]], i32 0, i32 [[TMP10]]
2616 // CHECK15-NEXT: store i32 [[TMP9]], ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP7]]
2617 // CHECK15-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP8]], align 4, !llvm.access.group [[ACC_GRP7]]
2618 // CHECK15-NEXT: [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP7]]
2619 // CHECK15-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 [[TMP12]]
2620 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP11]], i32 4, i1 false), !llvm.access.group [[ACC_GRP7]]
2621 // CHECK15-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2622 // CHECK15: omp.body.continue:
2623 // CHECK15-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2624 // CHECK15: omp.inner.for.inc:
2625 // CHECK15-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
2626 // CHECK15-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP13]], 1
2627 // CHECK15-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP7]]
2628 // CHECK15-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
2629 // CHECK15: omp.inner.for.end:
2630 // CHECK15-NEXT: store i32 2, ptr [[I]], align 4
2631 // CHECK15-NEXT: [[TMP14:%.*]] = load i32, ptr [[T_VAR4]], align 4
2632 // CHECK15-NEXT: store i32 [[TMP14]], ptr [[T_VAR]], align 4
2633 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 [[VEC5]], i32 8, i1 false)
2634 // CHECK15-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2635 // CHECK15-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i32 2
2636 // CHECK15-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP15]]
2637 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2638 // CHECK15: omp.arraycpy.body:
2639 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR6]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2640 // CHECK15-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[OMP_INNER_FOR_END]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2641 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
2642 // CHECK15-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2643 // CHECK15-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2644 // CHECK15-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
2645 // CHECK15-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
2646 // CHECK15: omp.arraycpy.done12:
2647 // CHECK15-NEXT: [[TMP16:%.*]] = load ptr, ptr [[_TMP8]], align 4
2648 // CHECK15-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP5]], ptr align 4 [[TMP16]], i32 4, i1 false)
2649 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR7]]) #[[ATTR4]]
2650 // CHECK15-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR6]], i32 0, i32 0
2651 // CHECK15-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i32 2
2652 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
2653 // CHECK15: arraydestroy.body:
2654 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP17]], [[OMP_ARRAYCPY_DONE12]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
2655 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
2656 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
2657 // CHECK15-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
2658 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
2659 // CHECK15: arraydestroy.done14:
2660 // CHECK15-NEXT: store i32 0, ptr [[RETVAL]], align 4
2661 // CHECK15-NEXT: [[ARRAY_BEGIN15:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
2662 // CHECK15-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN15]], i32 2
2663 // CHECK15-NEXT: br label [[ARRAYDESTROY_BODY16:%.*]]
2664 // CHECK15: arraydestroy.body16:
2665 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENTPAST17:%.*]] = phi ptr [ [[TMP18]], [[ARRAYDESTROY_DONE14]] ], [ [[ARRAYDESTROY_ELEMENT18:%.*]], [[ARRAYDESTROY_BODY16]] ]
2666 // CHECK15-NEXT: [[ARRAYDESTROY_ELEMENT18]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST17]], i32 -1
2667 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT18]]) #[[ATTR4]]
2668 // CHECK15-NEXT: [[ARRAYDESTROY_DONE19:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT18]], [[ARRAY_BEGIN15]]
2669 // CHECK15-NEXT: br i1 [[ARRAYDESTROY_DONE19]], label [[ARRAYDESTROY_DONE20:%.*]], label [[ARRAYDESTROY_BODY16]]
2670 // CHECK15: arraydestroy.done20:
2671 // CHECK15-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
2672 // CHECK15-NEXT: [[TMP19:%.*]] = load i32, ptr [[RETVAL]], align 4
2673 // CHECK15-NEXT: ret i32 [[TMP19]]
2674 //
2675 //
2676 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
2677 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2678 // CHECK15-NEXT: entry:
2679 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2680 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2681 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2682 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2683 // CHECK15-NEXT: store float 0.000000e+00, ptr [[F]], align 4
2684 // CHECK15-NEXT: ret void
2685 //
2686 //
2687 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
2688 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2689 // CHECK15-NEXT: entry:
2690 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2691 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2692 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2693 // CHECK15-NEXT: ret void
2694 //
2695 //
2696 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
2697 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2698 // CHECK15-NEXT: entry:
2699 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2700 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
2701 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2702 // CHECK15-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
2703 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2704 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2705 // CHECK15-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
2706 // CHECK15-NEXT: store float [[TMP0]], ptr [[F]], align 4
2707 // CHECK15-NEXT: ret void
2708 //
2709 //
2710 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2711 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2712 // CHECK15-NEXT: entry:
2713 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2714 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2715 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2716 // CHECK15-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2717 // CHECK15-NEXT: ret void
2718 //
2719 //
2720 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2721 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2722 // CHECK15-NEXT: entry:
2723 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2724 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2725 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2726 // CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
2727 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2728 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2729 // CHECK15-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
2730 // CHECK15-NEXT: ret void
2731 //
2732 //
2733 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2734 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2735 // CHECK15-NEXT: entry:
2736 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2737 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2738 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2739 // CHECK15-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2740 // CHECK15-NEXT: ret void
2741 //
2742 //
2743 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2744 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2745 // CHECK15-NEXT: entry:
2746 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2747 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2748 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2749 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2750 // CHECK15-NEXT: store i32 0, ptr [[F]], align 4
2751 // CHECK15-NEXT: ret void
2752 //
2753 //
2754 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2755 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2756 // CHECK15-NEXT: entry:
2757 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2758 // CHECK15-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2759 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2760 // CHECK15-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
2761 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2762 // CHECK15-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2763 // CHECK15-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2764 // CHECK15-NEXT: store i32 [[TMP0]], ptr [[F]], align 4
2765 // CHECK15-NEXT: ret void
2766 //
2767 //
2768 // CHECK15-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2769 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
2770 // CHECK15-NEXT: entry:
2771 // CHECK15-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
2772 // CHECK15-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2773 // CHECK15-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2774 // CHECK15-NEXT: ret void
2775 //
LLVM monorepo