Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / OpenMP / irbuilder_unroll_partial_factor.c
blobb1325390b53ef8a96fb5979dc2c7121e57c420ac
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_ size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -fopenmp-enable-irbuilder -verify -fopenmp -x c -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
3 // expected-no-diagnostics
5 #ifndef HEADER
6 #define HEADER
8 void unroll_partial_factor(float *a, float *b, float *c, float *d) {
9 #pragma omp unroll partial(3)
10 for (int i = 0; i < 2; i++) {
11 a[i] = b[i] * c[i] * d[i];
15 #endif // HEADER
21 // CHECK-LABEL: define {{[^@]+}}@unroll_partial_factor
22 // CHECK-SAME: (ptr noundef [[A:%.*]], ptr noundef [[B:%.*]], ptr noundef [[C:%.*]], ptr noundef [[D:%.*]]) #[[ATTR0:[0-9]+]] {
23 // CHECK-NEXT: entry:
24 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
25 // CHECK-NEXT: [[B_ADDR:%.*]] = alloca ptr, align 8
26 // CHECK-NEXT: [[C_ADDR:%.*]] = alloca ptr, align 8
27 // CHECK-NEXT: [[D_ADDR:%.*]] = alloca ptr, align 8
28 // CHECK-NEXT: [[I:%.*]] = alloca i32, align 4
29 // CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
30 // CHECK-NEXT: [[AGG_CAPTURED1:%.*]] = alloca [[STRUCT_ANON_0:%.*]], align 4
31 // CHECK-NEXT: [[DOTCOUNT_ADDR:%.*]] = alloca i32, align 4
32 // CHECK-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
33 // CHECK-NEXT: store ptr [[B]], ptr [[B_ADDR]], align 8
34 // CHECK-NEXT: store ptr [[C]], ptr [[C_ADDR]], align 8
35 // CHECK-NEXT: store ptr [[D]], ptr [[D_ADDR]], align 8
36 // CHECK-NEXT: store i32 0, ptr [[I]], align 4
37 // CHECK-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0
38 // CHECK-NEXT: store ptr [[I]], ptr [[TMP0]], align 8
39 // CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0]], ptr [[AGG_CAPTURED1]], i32 0, i32 0
40 // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
41 // CHECK-NEXT: store i32 [[TMP2]], ptr [[TMP1]], align 4
42 // CHECK-NEXT: call void @__captured_stmt(ptr [[DOTCOUNT_ADDR]], ptr [[AGG_CAPTURED]])
43 // CHECK-NEXT: [[DOTCOUNT:%.*]] = load i32, ptr [[DOTCOUNT_ADDR]], align 4
44 // CHECK-NEXT: br label [[OMP_LOOP_PREHEADER:%.*]]
45 // CHECK: omp_loop.preheader:
46 // CHECK-NEXT: br label [[OMP_LOOP_HEADER:%.*]]
47 // CHECK: omp_loop.header:
48 // CHECK-NEXT: [[OMP_LOOP_IV:%.*]] = phi i32 [ 0, [[OMP_LOOP_PREHEADER]] ], [ [[OMP_LOOP_NEXT:%.*]], [[OMP_LOOP_INC:%.*]] ]
49 // CHECK-NEXT: br label [[OMP_LOOP_COND:%.*]]
50 // CHECK: omp_loop.cond:
51 // CHECK-NEXT: [[OMP_LOOP_CMP:%.*]] = icmp ult i32 [[OMP_LOOP_IV]], [[DOTCOUNT]]
52 // CHECK-NEXT: br i1 [[OMP_LOOP_CMP]], label [[OMP_LOOP_BODY:%.*]], label [[OMP_LOOP_EXIT:%.*]]
53 // CHECK: omp_loop.body:
54 // CHECK-NEXT: call void @__captured_stmt.1(ptr [[I]], i32 [[OMP_LOOP_IV]], ptr [[AGG_CAPTURED1]])
55 // CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[B_ADDR]], align 8
56 // CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[I]], align 4
57 // CHECK-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP4]] to i64
58 // CHECK-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds float, ptr [[TMP3]], i64 [[IDXPROM]]
59 // CHECK-NEXT: [[TMP5:%.*]] = load float, ptr [[ARRAYIDX]], align 4
60 // CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[C_ADDR]], align 8
61 // CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[I]], align 4
62 // CHECK-NEXT: [[IDXPROM2:%.*]] = sext i32 [[TMP7]] to i64
63 // CHECK-NEXT: [[ARRAYIDX3:%.*]] = getelementptr inbounds float, ptr [[TMP6]], i64 [[IDXPROM2]]
64 // CHECK-NEXT: [[TMP8:%.*]] = load float, ptr [[ARRAYIDX3]], align 4
65 // CHECK-NEXT: [[MUL:%.*]] = fmul float [[TMP5]], [[TMP8]]
66 // CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[D_ADDR]], align 8
67 // CHECK-NEXT: [[TMP10:%.*]] = load i32, ptr [[I]], align 4
68 // CHECK-NEXT: [[IDXPROM4:%.*]] = sext i32 [[TMP10]] to i64
69 // CHECK-NEXT: [[ARRAYIDX5:%.*]] = getelementptr inbounds float, ptr [[TMP9]], i64 [[IDXPROM4]]
70 // CHECK-NEXT: [[TMP11:%.*]] = load float, ptr [[ARRAYIDX5]], align 4
71 // CHECK-NEXT: [[MUL6:%.*]] = fmul float [[MUL]], [[TMP11]]
72 // CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[A_ADDR]], align 8
73 // CHECK-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
74 // CHECK-NEXT: [[IDXPROM7:%.*]] = sext i32 [[TMP13]] to i64
75 // CHECK-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds float, ptr [[TMP12]], i64 [[IDXPROM7]]
76 // CHECK-NEXT: store float [[MUL6]], ptr [[ARRAYIDX8]], align 4
77 // CHECK-NEXT: br label [[OMP_LOOP_INC]]
78 // CHECK: omp_loop.inc:
79 // CHECK-NEXT: [[OMP_LOOP_NEXT]] = add nuw i32 [[OMP_LOOP_IV]], 1
80 // CHECK-NEXT: br label [[OMP_LOOP_HEADER]], !llvm.loop [[LOOP3:![0-9]+]]
81 // CHECK: omp_loop.exit:
82 // CHECK-NEXT: br label [[OMP_LOOP_AFTER:%.*]]
83 // CHECK: omp_loop.after:
84 // CHECK-NEXT: ret void
87 // CHECK-LABEL: define {{[^@]+}}@__captured_stmt
88 // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[DISTANCE:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
89 // CHECK-NEXT: entry:
90 // CHECK-NEXT: [[DISTANCE_ADDR:%.*]] = alloca ptr, align 8
91 // CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
92 // CHECK-NEXT: [[DOTSTART:%.*]] = alloca i32, align 4
93 // CHECK-NEXT: [[DOTSTOP:%.*]] = alloca i32, align 4
94 // CHECK-NEXT: [[DOTSTEP:%.*]] = alloca i32, align 4
95 // CHECK-NEXT: store ptr [[DISTANCE]], ptr [[DISTANCE_ADDR]], align 8
96 // CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8
97 // CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8
98 // CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], ptr [[TMP0]], i32 0, i32 0
99 // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP1]], align 8
100 // CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
101 // CHECK-NEXT: store i32 [[TMP3]], ptr [[DOTSTART]], align 4
102 // CHECK-NEXT: store i32 2, ptr [[DOTSTOP]], align 4
103 // CHECK-NEXT: store i32 1, ptr [[DOTSTEP]], align 4
104 // CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTSTART]], align 4
105 // CHECK-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTSTOP]], align 4
106 // CHECK-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP4]], [[TMP5]]
107 // CHECK-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
108 // CHECK: cond.true:
109 // CHECK-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTSTOP]], align 4
110 // CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTSTART]], align 4
111 // CHECK-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP6]], [[TMP7]]
112 // CHECK-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTSTEP]], align 4
113 // CHECK-NEXT: [[SUB1:%.*]] = sub i32 [[TMP8]], 1
114 // CHECK-NEXT: [[ADD:%.*]] = add i32 [[SUB]], [[SUB1]]
115 // CHECK-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTSTEP]], align 4
116 // CHECK-NEXT: [[DIV:%.*]] = udiv i32 [[ADD]], [[TMP9]]
117 // CHECK-NEXT: br label [[COND_END:%.*]]
118 // CHECK: cond.false:
119 // CHECK-NEXT: br label [[COND_END]]
120 // CHECK: cond.end:
121 // CHECK-NEXT: [[COND:%.*]] = phi i32 [ [[DIV]], [[COND_TRUE]] ], [ 0, [[COND_FALSE]] ]
122 // CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DISTANCE_ADDR]], align 8
123 // CHECK-NEXT: store i32 [[COND]], ptr [[TMP10]], align 4
124 // CHECK-NEXT: ret void
127 // CHECK-LABEL: define {{[^@]+}}@__captured_stmt.1
128 // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[LOOPVAR:%.*]], i32 noundef [[LOGICAL:%.*]], ptr noalias noundef [[__CONTEXT:%.*]]) #[[ATTR0]] {
129 // CHECK-NEXT: entry:
130 // CHECK-NEXT: [[LOOPVAR_ADDR:%.*]] = alloca ptr, align 8
131 // CHECK-NEXT: [[LOGICAL_ADDR:%.*]] = alloca i32, align 4
132 // CHECK-NEXT: [[__CONTEXT_ADDR:%.*]] = alloca ptr, align 8
133 // CHECK-NEXT: store ptr [[LOOPVAR]], ptr [[LOOPVAR_ADDR]], align 8
134 // CHECK-NEXT: store i32 [[LOGICAL]], ptr [[LOGICAL_ADDR]], align 4
135 // CHECK-NEXT: store ptr [[__CONTEXT]], ptr [[__CONTEXT_ADDR]], align 8
136 // CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[__CONTEXT_ADDR]], align 8
137 // CHECK-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[STRUCT_ANON_0:%.*]], ptr [[TMP0]], i32 0, i32 0
138 // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
139 // CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[LOGICAL_ADDR]], align 4
140 // CHECK-NEXT: [[MUL:%.*]] = mul i32 1, [[TMP3]]
141 // CHECK-NEXT: [[ADD:%.*]] = add i32 [[TMP2]], [[MUL]]
142 // CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[LOOPVAR_ADDR]], align 8
143 // CHECK-NEXT: store i32 [[ADD]], ptr [[TMP4]], align 4
144 // CHECK-NEXT: ret void