clang/test/OpenMP/nvptx_nested_parallel_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // Test target codegen - host bc file has to be created first.
   3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
   4 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
   6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK2
   7 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-cuda-mode -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - -disable-llvm-optzns | FileCheck %s --check-prefix=CHECK2
   8
   9 // expected-no-diagnostics
  10 #ifndef HEADER
  11 #define HEADER
  12
  13 void work(int *C) {
  14   #pragma omp atomic
  15   ++(*C);
  16 }
  17
  18 void use(int *C) {
  19   #pragma omp parallel num_threads(2)
  20   work(C);
  21 }
  22
  23 int main() {
  24   int C = 0;
  25   #pragma omp target map(C)
  26   {
  27     use(&C);
  28     #pragma omp parallel num_threads(2)
  29     use(&C);
  30   }
  31
  32   return C;
  33 }
  34
  35 #endif
  36 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25
  37 // CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR0:[0-9]+]] {
  38 // CHECK1-NEXT:  entry:
  39 // CHECK1-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
  40 // CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
  41 // CHECK1-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x ptr], align 8
  42 // CHECK1-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
  43 // CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
  44 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
  45 // CHECK1-NEXT:    [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_kernel_environment, ptr [[DYN_PTR]])
  46 // CHECK1-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
  47 // CHECK1-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
  48 // CHECK1:       user_code.entry:
  49 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
  50 // CHECK1-NEXT:    call void @_Z3usePi(ptr noundef [[TMP0]]) #[[ATTR6:[0-9]+]]
  51 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
  52 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[TMP3]], align 8
  53 // CHECK1-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 2, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_omp_outlined, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i64 1)
  54 // CHECK1-NEXT:    call void @__kmpc_target_deinit()
  55 // CHECK1-NEXT:    ret void
  56 // CHECK1:       worker.exit:
  57 // CHECK1-NEXT:    ret void
  58 //
  59 //
  60 // CHECK1-LABEL: define {{[^@]+}}@_Z3usePi
  61 // CHECK1-SAME: (ptr noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] {
  62 // CHECK1-NEXT:  entry:
  63 // CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
  64 // CHECK1-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x ptr], align 8
  65 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
  66 // CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
  67 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
  68 // CHECK1-NEXT:    store ptr [[C_ADDR]], ptr [[TMP1]], align 8
  69 // CHECK1-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP0]], i32 1, i32 2, i32 -1, ptr @_Z3usePi_omp_outlined, ptr @_Z3usePi_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i64 1)
  70 // CHECK1-NEXT:    ret void
  71 //
  72 //
  73 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_omp_outlined
  74 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2:[0-9]+]] {
  75 // CHECK1-NEXT:  entry:
  76 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
  77 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
  78 // CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
  79 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
  80 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
  81 // CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
  82 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
  83 // CHECK1-NEXT:    call void @_Z3usePi(ptr noundef [[TMP0]]) #[[ATTR6]]
  84 // CHECK1-NEXT:    ret void
  85 //
  86 //
  87 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_omp_outlined_wrapper
  88 // CHECK1-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
  89 // CHECK1-NEXT:  entry:
  90 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i16, align 2
  91 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca i32, align 4
  92 // CHECK1-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
  93 // CHECK1-NEXT:    [[GLOBAL_ARGS:%.*]] = alloca ptr, align 8
  94 // CHECK1-NEXT:    store i16 [[TMP0]], ptr [[DOTADDR]], align 2
  95 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
  96 // CHECK1-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
  97 // CHECK1-NEXT:    call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
  98 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 8
  99 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 0
 100 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 8
 101 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], ptr [[TMP4]]) #[[ATTR4:[0-9]+]]
 102 // CHECK1-NEXT:    ret void
 103 //
 104 //
 105 // CHECK1-LABEL: define {{[^@]+}}@_Z3usePi_omp_outlined
 106 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR2]] {
 107 // CHECK1-NEXT:  entry:
 108 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 109 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 110 // CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
 111 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 112 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 113 // CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
 114 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
 115 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
 116 // CHECK1-NEXT:    call void @_Z4workPi(ptr noundef [[TMP1]]) #[[ATTR6]]
 117 // CHECK1-NEXT:    ret void
 118 //
 119 //
 120 // CHECK1-LABEL: define {{[^@]+}}@_Z4workPi
 121 // CHECK1-SAME: (ptr noundef [[C:%.*]]) #[[ATTR1]] {
 122 // CHECK1-NEXT:  entry:
 123 // CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
 124 // CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
 125 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
 126 // CHECK1-NEXT:    [[TMP1:%.*]] = atomicrmw add ptr [[TMP0]], i32 1 monotonic, align 4
 127 // CHECK1-NEXT:    ret void
 128 //
 129 //
 130 // CHECK1-LABEL: define {{[^@]+}}@_Z3usePi_omp_outlined_wrapper
 131 // CHECK1-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR3]] {
 132 // CHECK1-NEXT:  entry:
 133 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i16, align 2
 134 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca i32, align 4
 135 // CHECK1-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
 136 // CHECK1-NEXT:    [[GLOBAL_ARGS:%.*]] = alloca ptr, align 8
 137 // CHECK1-NEXT:    store i16 [[TMP0]], ptr [[DOTADDR]], align 2
 138 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
 139 // CHECK1-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
 140 // CHECK1-NEXT:    call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
 141 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 8
 142 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 0
 143 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 8
 144 // CHECK1-NEXT:    call void @_Z3usePi_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], ptr [[TMP4]]) #[[ATTR4]]
 145 // CHECK1-NEXT:    ret void
 146 //
 147 //
 148 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25
 149 // CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR0:[0-9]+]] {
 150 // CHECK2-NEXT:  entry:
 151 // CHECK2-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
 152 // CHECK2-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 4
 153 // CHECK2-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x ptr], align 4
 154 // CHECK2-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
 155 // CHECK2-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 4
 156 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
 157 // CHECK2-NEXT:    [[TMP1:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_kernel_environment, ptr [[DYN_PTR]])
 158 // CHECK2-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP1]], -1
 159 // CHECK2-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
 160 // CHECK2:       user_code.entry:
 161 // CHECK2-NEXT:    [[TMP2:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
 162 // CHECK2-NEXT:    call void @_Z3usePi(ptr noundef [[TMP0]]) #[[ATTR6:[0-9]+]]
 163 // CHECK2-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
 164 // CHECK2-NEXT:    store ptr [[TMP0]], ptr [[TMP3]], align 4
 165 // CHECK2-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i32 2, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_omp_outlined, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i32 1)
 166 // CHECK2-NEXT:    call void @__kmpc_target_deinit()
 167 // CHECK2-NEXT:    ret void
 168 // CHECK2:       worker.exit:
 169 // CHECK2-NEXT:    ret void
 170 //
 171 //
 172 // CHECK2-LABEL: define {{[^@]+}}@_Z3usePi
 173 // CHECK2-SAME: (ptr noundef [[C:%.*]]) #[[ATTR1:[0-9]+]] {
 174 // CHECK2-NEXT:  entry:
 175 // CHECK2-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 4
 176 // CHECK2-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x ptr], align 4
 177 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1]])
 178 // CHECK2-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 4
 179 // CHECK2-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
 180 // CHECK2-NEXT:    store ptr [[C_ADDR]], ptr [[TMP1]], align 4
 181 // CHECK2-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP0]], i32 1, i32 2, i32 -1, ptr @_Z3usePi_omp_outlined, ptr @_Z3usePi_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i32 1)
 182 // CHECK2-NEXT:    ret void
 183 //
 184 //
 185 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_omp_outlined
 186 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2:[0-9]+]] {
 187 // CHECK2-NEXT:  entry:
 188 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 189 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 190 // CHECK2-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 4
 191 // CHECK2-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 192 // CHECK2-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 193 // CHECK2-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 4
 194 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
 195 // CHECK2-NEXT:    call void @_Z3usePi(ptr noundef [[TMP0]]) #[[ATTR6]]
 196 // CHECK2-NEXT:    ret void
 197 //
 198 //
 199 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_omp_outlined_wrapper
 200 // CHECK2-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
 201 // CHECK2-NEXT:  entry:
 202 // CHECK2-NEXT:    [[DOTADDR:%.*]] = alloca i16, align 2
 203 // CHECK2-NEXT:    [[DOTADDR1:%.*]] = alloca i32, align 4
 204 // CHECK2-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
 205 // CHECK2-NEXT:    [[GLOBAL_ARGS:%.*]] = alloca ptr, align 4
 206 // CHECK2-NEXT:    store i16 [[TMP0]], ptr [[DOTADDR]], align 2
 207 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
 208 // CHECK2-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
 209 // CHECK2-NEXT:    call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
 210 // CHECK2-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 4
 211 // CHECK2-NEXT:    [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i32 0
 212 // CHECK2-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 4
 213 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l25_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], ptr [[TMP4]]) #[[ATTR4:[0-9]+]]
 214 // CHECK2-NEXT:    ret void
 215 //
 216 //
 217 // CHECK2-LABEL: define {{[^@]+}}@_Z3usePi_omp_outlined
 218 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
 219 // CHECK2-NEXT:  entry:
 220 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 221 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 222 // CHECK2-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 4
 223 // CHECK2-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 224 // CHECK2-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 225 // CHECK2-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 4
 226 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
 227 // CHECK2-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 4
 228 // CHECK2-NEXT:    call void @_Z4workPi(ptr noundef [[TMP1]]) #[[ATTR6]]
 229 // CHECK2-NEXT:    ret void
 230 //
 231 //
 232 // CHECK2-LABEL: define {{[^@]+}}@_Z4workPi
 233 // CHECK2-SAME: (ptr noundef [[C:%.*]]) #[[ATTR1]] {
 234 // CHECK2-NEXT:  entry:
 235 // CHECK2-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 4
 236 // CHECK2-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 4
 237 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 4
 238 // CHECK2-NEXT:    [[TMP1:%.*]] = atomicrmw add ptr [[TMP0]], i32 1 monotonic, align 4
 239 // CHECK2-NEXT:    ret void
 240 //
 241 //
 242 // CHECK2-LABEL: define {{[^@]+}}@_Z3usePi_omp_outlined_wrapper
 243 // CHECK2-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR3]] {
 244 // CHECK2-NEXT:  entry:
 245 // CHECK2-NEXT:    [[DOTADDR:%.*]] = alloca i16, align 2
 246 // CHECK2-NEXT:    [[DOTADDR1:%.*]] = alloca i32, align 4
 247 // CHECK2-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
 248 // CHECK2-NEXT:    [[GLOBAL_ARGS:%.*]] = alloca ptr, align 4
 249 // CHECK2-NEXT:    store i16 [[TMP0]], ptr [[DOTADDR]], align 2
 250 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
 251 // CHECK2-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
 252 // CHECK2-NEXT:    call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
 253 // CHECK2-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 4
 254 // CHECK2-NEXT:    [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i32 0
 255 // CHECK2-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 4
 256 // CHECK2-NEXT:    call void @_Z3usePi_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], ptr [[TMP4]]) #[[ATTR4]]
 257 // CHECK2-NEXT:    ret void
 258 //