clang/test/OpenMP/nvptx_target_teams_distribute_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // Test target codegen - host bc file has to be created first.
   3 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm-bc %s -o %t-ppc-host.bc
   4 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx64-unknown-unknown -fopenmp-targets=nvptx64-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm-bc %s -o %t-x86-host.bc
   6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK2
   7 // RUN: %clang_cc1 -verify -fopenmp -fexceptions -fcxx-exceptions -x c++ -triple nvptx-unknown-unknown -fopenmp-targets=nvptx-nvidia-cuda -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s --check-prefix=CHECK2
   8 // expected-no-diagnostics
   9 #ifndef HEADER
  10 #define HEADER
  11
  12 template<typename tx>
  13 tx ftemplate(int n) {
  14   int i;
  15
  16   #pragma omp target teams distribute
  17   for (i = 0; i < 10; ++i)
  18   {
  19 #pragma omp parallel
  20     ++i;
  21   }
  22
  23   return i;
  24 }
  25
  26 int bar(int n){
  27   int a = 0;
  28
  29   a += ftemplate<char>(n);
  30
  31   return a;
  32 }
  33
  34 #endif
  35 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16
  36 // CHECK1-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0:[0-9]+]] {
  37 // CHECK1-NEXT:  entry:
  38 // CHECK1-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 8
  39 // CHECK1-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
  40 // CHECK1-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
  41 // CHECK1-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 8
  42 // CHECK1-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_kernel_environment, ptr [[DYN_PTR]])
  43 // CHECK1-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
  44 // CHECK1-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
  45 // CHECK1:       user_code.entry:
  46 // CHECK1-NEXT:    [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
  47 // CHECK1-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
  48 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
  49 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR3:[0-9]+]]
  50 // CHECK1-NEXT:    call void @__kmpc_target_deinit()
  51 // CHECK1-NEXT:    ret void
  52 // CHECK1:       worker.exit:
  53 // CHECK1-NEXT:    ret void
  54 //
  55 //
  56 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined
  57 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
  58 // CHECK1-NEXT:  entry:
  59 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
  60 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
  61 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
  62 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
  63 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
  64 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
  65 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
  66 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
  67 // CHECK1-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x ptr], align 8
  68 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
  69 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
  70 // CHECK1-NEXT:    [[I:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i64 4)
  71 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
  72 // CHECK1-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
  73 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
  74 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
  75 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
  76 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
  77 // CHECK1-NEXT:    call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
  78 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
  79 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
  80 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
  81 // CHECK1:       cond.true:
  82 // CHECK1-NEXT:    br label [[COND_END:%.*]]
  83 // CHECK1:       cond.false:
  84 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
  85 // CHECK1-NEXT:    br label [[COND_END]]
  86 // CHECK1:       cond.end:
  87 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
  88 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
  89 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
  90 // CHECK1-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
  91 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
  92 // CHECK1:       omp.inner.for.cond:
  93 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
  94 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
  95 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
  96 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
  97 // CHECK1:       omp.inner.for.body:
  98 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
  99 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
 100 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 101 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 102 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i64 0, i64 0
 103 // CHECK1-NEXT:    store ptr [[I]], ptr [[TMP8]], align 8
 104 // CHECK1-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined_omp_outlined, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i64 1)
 105 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 106 // CHECK1:       omp.body.continue:
 107 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 108 // CHECK1:       omp.inner.for.inc:
 109 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 110 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
 111 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
 112 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 113 // CHECK1:       omp.inner.for.end:
 114 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 115 // CHECK1:       omp.loop.exit:
 116 // CHECK1-NEXT:    call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
 117 // CHECK1-NEXT:    call void @__kmpc_free_shared(ptr [[I]], i64 4)
 118 // CHECK1-NEXT:    ret void
 119 //
 120 //
 121 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined_omp_outlined
 122 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] {
 123 // CHECK1-NEXT:  entry:
 124 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 125 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 126 // CHECK1-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 8
 127 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 128 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 129 // CHECK1-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 8
 130 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 8
 131 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 132 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
 133 // CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP0]], align 4
 134 // CHECK1-NEXT:    ret void
 135 //
 136 //
 137 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined_omp_outlined_wrapper
 138 // CHECK1-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
 139 // CHECK1-NEXT:  entry:
 140 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca i16, align 2
 141 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca i32, align 4
 142 // CHECK1-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
 143 // CHECK1-NEXT:    [[GLOBAL_ARGS:%.*]] = alloca ptr, align 8
 144 // CHECK1-NEXT:    store i16 [[TMP0]], ptr [[DOTADDR]], align 2
 145 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
 146 // CHECK1-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
 147 // CHECK1-NEXT:    call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
 148 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 8
 149 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i64 0
 150 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 8
 151 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], ptr [[TMP4]]) #[[ATTR3]]
 152 // CHECK1-NEXT:    ret void
 153 //
 154 //
 155 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16
 156 // CHECK2-SAME: (ptr noalias noundef [[DYN_PTR:%.*]]) #[[ATTR0:[0-9]+]] {
 157 // CHECK2-NEXT:  entry:
 158 // CHECK2-NEXT:    [[DYN_PTR_ADDR:%.*]] = alloca ptr, align 4
 159 // CHECK2-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
 160 // CHECK2-NEXT:    [[DOTTHREADID_TEMP_:%.*]] = alloca i32, align 4
 161 // CHECK2-NEXT:    store ptr [[DYN_PTR]], ptr [[DYN_PTR_ADDR]], align 4
 162 // CHECK2-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_target_init(ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_kernel_environment, ptr [[DYN_PTR]])
 163 // CHECK2-NEXT:    [[EXEC_USER_CODE:%.*]] = icmp eq i32 [[TMP0]], -1
 164 // CHECK2-NEXT:    br i1 [[EXEC_USER_CODE]], label [[USER_CODE_ENTRY:%.*]], label [[WORKER_EXIT:%.*]]
 165 // CHECK2:       user_code.entry:
 166 // CHECK2-NEXT:    [[TMP1:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB1:[0-9]+]])
 167 // CHECK2-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
 168 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[DOTTHREADID_TEMP_]], align 4
 169 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined(ptr [[DOTTHREADID_TEMP_]], ptr [[DOTZERO_ADDR]]) #[[ATTR3:[0-9]+]]
 170 // CHECK2-NEXT:    call void @__kmpc_target_deinit()
 171 // CHECK2-NEXT:    ret void
 172 // CHECK2:       worker.exit:
 173 // CHECK2-NEXT:    ret void
 174 //
 175 //
 176 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined
 177 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
 178 // CHECK2-NEXT:  entry:
 179 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 180 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 181 // CHECK2-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 182 // CHECK2-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 183 // CHECK2-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 184 // CHECK2-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 185 // CHECK2-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 186 // CHECK2-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 187 // CHECK2-NEXT:    [[CAPTURED_VARS_ADDRS:%.*]] = alloca [1 x ptr], align 4
 188 // CHECK2-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 189 // CHECK2-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 190 // CHECK2-NEXT:    [[I:%.*]] = call align 8 ptr @__kmpc_alloc_shared(i32 4)
 191 // CHECK2-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 192 // CHECK2-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
 193 // CHECK2-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 194 // CHECK2-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 195 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 196 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 197 // CHECK2-NEXT:    call void @__kmpc_distribute_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP1]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 198 // CHECK2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 199 // CHECK2-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
 200 // CHECK2-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 201 // CHECK2:       cond.true:
 202 // CHECK2-NEXT:    br label [[COND_END:%.*]]
 203 // CHECK2:       cond.false:
 204 // CHECK2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 205 // CHECK2-NEXT:    br label [[COND_END]]
 206 // CHECK2:       cond.end:
 207 // CHECK2-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
 208 // CHECK2-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 209 // CHECK2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 210 // CHECK2-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
 211 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 212 // CHECK2:       omp.inner.for.cond:
 213 // CHECK2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 214 // CHECK2-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 215 // CHECK2-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
 216 // CHECK2-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 217 // CHECK2:       omp.inner.for.body:
 218 // CHECK2-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 219 // CHECK2-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
 220 // CHECK2-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 221 // CHECK2-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 222 // CHECK2-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[CAPTURED_VARS_ADDRS]], i32 0, i32 0
 223 // CHECK2-NEXT:    store ptr [[I]], ptr [[TMP8]], align 4
 224 // CHECK2-NEXT:    call void @__kmpc_parallel_51(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i32 -1, i32 -1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined_omp_outlined, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined_omp_outlined_wrapper, ptr [[CAPTURED_VARS_ADDRS]], i32 1)
 225 // CHECK2-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 226 // CHECK2:       omp.body.continue:
 227 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 228 // CHECK2:       omp.inner.for.inc:
 229 // CHECK2-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 230 // CHECK2-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
 231 // CHECK2-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
 232 // CHECK2-NEXT:    br label [[OMP_INNER_FOR_COND]]
 233 // CHECK2:       omp.inner.for.end:
 234 // CHECK2-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 235 // CHECK2:       omp.loop.exit:
 236 // CHECK2-NEXT:    call void @__kmpc_distribute_static_fini(ptr @[[GLOB2]], i32 [[TMP1]])
 237 // CHECK2-NEXT:    call void @__kmpc_free_shared(ptr [[I]], i32 4)
 238 // CHECK2-NEXT:    ret void
 239 //
 240 //
 241 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined_omp_outlined
 242 // CHECK2-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[I:%.*]]) #[[ATTR1]] {
 243 // CHECK2-NEXT:  entry:
 244 // CHECK2-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 245 // CHECK2-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 246 // CHECK2-NEXT:    [[I_ADDR:%.*]] = alloca ptr, align 4
 247 // CHECK2-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 248 // CHECK2-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 249 // CHECK2-NEXT:    store ptr [[I]], ptr [[I_ADDR]], align 4
 250 // CHECK2-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[I_ADDR]], align 4
 251 // CHECK2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 252 // CHECK2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
 253 // CHECK2-NEXT:    store i32 [[INC]], ptr [[TMP0]], align 4
 254 // CHECK2-NEXT:    ret void
 255 //
 256 //
 257 // CHECK2-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined_omp_outlined_wrapper
 258 // CHECK2-SAME: (i16 noundef zeroext [[TMP0:%.*]], i32 noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
 259 // CHECK2-NEXT:  entry:
 260 // CHECK2-NEXT:    [[DOTADDR:%.*]] = alloca i16, align 2
 261 // CHECK2-NEXT:    [[DOTADDR1:%.*]] = alloca i32, align 4
 262 // CHECK2-NEXT:    [[DOTZERO_ADDR:%.*]] = alloca i32, align 4
 263 // CHECK2-NEXT:    [[GLOBAL_ARGS:%.*]] = alloca ptr, align 4
 264 // CHECK2-NEXT:    store i16 [[TMP0]], ptr [[DOTADDR]], align 2
 265 // CHECK2-NEXT:    store i32 [[TMP1]], ptr [[DOTADDR1]], align 4
 266 // CHECK2-NEXT:    store i32 0, ptr [[DOTZERO_ADDR]], align 4
 267 // CHECK2-NEXT:    call void @__kmpc_get_shared_variables(ptr [[GLOBAL_ARGS]])
 268 // CHECK2-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[GLOBAL_ARGS]], align 4
 269 // CHECK2-NEXT:    [[TMP3:%.*]] = getelementptr inbounds ptr, ptr [[TMP2]], i32 0
 270 // CHECK2-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 4
 271 // CHECK2-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z9ftemplateIcET_i_l16_omp_outlined_omp_outlined(ptr [[DOTADDR1]], ptr [[DOTZERO_ADDR]], ptr [[TMP4]]) #[[ATTR3]]
 272 // CHECK2-NEXT:    ret void
 273 //