clang/test/OpenMP/parallel_for_simd_aligned_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   7
   8 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
   9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
  10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  11 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-unknown-linux -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  13 // expected-no-diagnostics
  14 #ifndef HEADER
  15 #define HEADER
  16
  17 void foo(float *c) {
  18 #pragma omp parallel for simd aligned(c)
  19   for (int i = 0; i < 10; ++i);
  20 }
  21
  22 #endif
  23
  24 // CHECK1-LABEL: define {{[^@]+}}@_Z3fooPf
  25 // CHECK1-SAME: (ptr noundef [[C:%.*]]) #[[ATTR0:[0-9]+]] {
  26 // CHECK1-NEXT:  entry:
  27 // CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
  28 // CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
  29 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @_Z3fooPf.omp_outlined, ptr [[C_ADDR]])
  30 // CHECK1-NEXT:    ret void
  31 //
  32 //
  33 // CHECK1-LABEL: define {{[^@]+}}@_Z3fooPf.omp_outlined
  34 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[C:%.*]]) #[[ATTR1:[0-9]+]] {
  35 // CHECK1-NEXT:  entry:
  36 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
  37 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
  38 // CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
  39 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
  40 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
  41 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
  42 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
  43 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
  44 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
  45 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
  46 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
  47 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
  48 // CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
  49 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[C_ADDR]], align 8
  50 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
  51 // CHECK1-NEXT:    call void @llvm.assume(i1 true) [ "align"(ptr [[TMP1]], i64 16) ]
  52 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
  53 // CHECK1-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
  54 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
  55 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
  56 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
  57 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
  58 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
  59 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
  60 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 9
  61 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
  62 // CHECK1:       cond.true:
  63 // CHECK1-NEXT:    br label [[COND_END:%.*]]
  64 // CHECK1:       cond.false:
  65 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
  66 // CHECK1-NEXT:    br label [[COND_END]]
  67 // CHECK1:       cond.end:
  68 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
  69 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
  70 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
  71 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
  72 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
  73 // CHECK1:       omp.inner.for.cond:
  74 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3:![0-9]+]]
  75 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP3]]
  76 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
  77 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
  78 // CHECK1:       omp.inner.for.body:
  79 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
  80 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], 1
  81 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
  82 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP3]]
  83 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
  84 // CHECK1:       omp.body.continue:
  85 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
  86 // CHECK1:       omp.inner.for.inc:
  87 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
  88 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
  89 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP3]]
  90 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
  91 // CHECK1:       omp.inner.for.end:
  92 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
  93 // CHECK1:       omp.loop.exit:
  94 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
  95 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
  96 // CHECK1-NEXT:    [[TMP12:%.*]] = icmp ne i32 [[TMP11]], 0
  97 // CHECK1-NEXT:    br i1 [[TMP12]], label [[DOTOMP_FINAL_THEN:%.*]], label [[DOTOMP_FINAL_DONE:%.*]]
  98 // CHECK1:       .omp.final.then:
  99 // CHECK1-NEXT:    store i32 10, ptr [[I]], align 4
 100 // CHECK1-NEXT:    br label [[DOTOMP_FINAL_DONE]]
 101 // CHECK1:       .omp.final.done:
 102 // CHECK1-NEXT:    ret void
 103 //