clang/test/OpenMP/parallel_generic_loop_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp %s
   3 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -emit-llvm %s -o - | FileCheck %s --check-prefix=IR
   4
   5 // Check same results after serialization round-trip
   6 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -emit-pch -o %t %s
   7 // RUN: %clang_cc1 -verify -triple x86_64-pc-linux-gnu -fopenmp -include-pch %t -emit-llvm %s -o - | FileCheck %s --check-prefix=IR-PCH
   8
   9 // expected-no-diagnostics
  10
  11 #ifndef HEADER
  12 #define HEADER
  13
  14 #define N 64
  15 int foo() {
  16   int x = 0;
  17   int result[N] = {0};
  18
  19  #pragma omp parallel loop num_threads(N) allocate(x) private(x) collapse(2)
  20   for (int i = 0; i < N; i++)
  21     for (int j = 0; j < N; j++)
  22       result[i] = i + j + x;
  23   return 0;
  24 }
  25 #endif
  26 // IR-LABEL: define {{[^@]+}}@_Z3foov
  27 // IR-SAME: () #[[ATTR0:[0-9]+]] {
  28 // IR-NEXT:  entry:
  29 // IR-NEXT:    [[X:%.*]] = alloca i32, align 4
  30 // IR-NEXT:    [[RESULT:%.*]] = alloca [64 x i32], align 16
  31 // IR-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2:[0-9]+]])
  32 // IR-NEXT:    store i32 0, ptr [[X]], align 4
  33 // IR-NEXT:    call void @llvm.memset.p0.i64(ptr align 16 [[RESULT]], i8 0, i64 256, i1 false)
  34 // IR-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB2]], i32 [[TMP0]], i32 64)
  35 // IR-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @_Z3foov.omp_outlined, ptr [[RESULT]])
  36 // IR-NEXT:    ret i32 0
  37 //
  38 //
  39 // IR-LABEL: define {{[^@]+}}@_Z3foov.omp_outlined
  40 // IR-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(256) [[RESULT:%.*]]) #[[ATTR2:[0-9]+]] {
  41 // IR-NEXT:  entry:
  42 // IR-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
  43 // IR-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
  44 // IR-NEXT:    [[RESULT_ADDR:%.*]] = alloca ptr, align 8
  45 // IR-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
  46 // IR-NEXT:    [[TMP:%.*]] = alloca i32, align 4
  47 // IR-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
  48 // IR-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
  49 // IR-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
  50 // IR-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
  51 // IR-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
  52 // IR-NEXT:    [[I:%.*]] = alloca i32, align 4
  53 // IR-NEXT:    [[J:%.*]] = alloca i32, align 4
  54 // IR-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
  55 // IR-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
  56 // IR-NEXT:    store ptr [[RESULT]], ptr [[RESULT_ADDR]], align 8
  57 // IR-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[RESULT_ADDR]], align 8
  58 // IR-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
  59 // IR-NEXT:    store i32 4095, ptr [[DOTOMP_UB]], align 4
  60 // IR-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
  61 // IR-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
  62 // IR-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
  63 // IR-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
  64 // IR-NEXT:    [[DOTX__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP2]], i64 4, ptr null)
  65 // IR-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
  66 // IR-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
  67 // IR-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 4095
  68 // IR-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
  69 // IR:       cond.true:
  70 // IR-NEXT:    br label [[COND_END:%.*]]
  71 // IR:       cond.false:
  72 // IR-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
  73 // IR-NEXT:    br label [[COND_END]]
  74 // IR:       cond.end:
  75 // IR-NEXT:    [[COND:%.*]] = phi i32 [ 4095, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
  76 // IR-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
  77 // IR-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
  78 // IR-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
  79 // IR-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
  80 // IR:       omp.inner.for.cond:
  81 // IR-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
  82 // IR-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
  83 // IR-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
  84 // IR-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
  85 // IR:       omp.inner.for.cond.cleanup:
  86 // IR-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
  87 // IR:       omp.inner.for.body:
  88 // IR-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
  89 // IR-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 64
  90 // IR-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
  91 // IR-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
  92 // IR-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
  93 // IR-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
  94 // IR-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
  95 // IR-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 64
  96 // IR-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 64
  97 // IR-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
  98 // IR-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
  99 // IR-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
 100 // IR-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4
 101 // IR-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
 102 // IR-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4
 103 // IR-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 104 // IR-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTX__VOID_ADDR]], align 4
 105 // IR-NEXT:    [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP13]]
 106 // IR-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4
 107 // IR-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
 108 // IR-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [64 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
 109 // IR-NEXT:    store i32 [[ADD8]], ptr [[ARRAYIDX]], align 4
 110 // IR-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 111 // IR:       omp.body.continue:
 112 // IR-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 113 // IR:       omp.inner.for.inc:
 114 // IR-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 115 // IR-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
 116 // IR-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
 117 // IR-NEXT:    br label [[OMP_INNER_FOR_COND]]
 118 // IR:       omp.inner.for.end:
 119 // IR-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 120 // IR:       omp.loop.exit:
 121 // IR-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 122 // IR-NEXT:    call void @__kmpc_free(i32 [[TMP2]], ptr [[DOTX__VOID_ADDR]], ptr null)
 123 // IR-NEXT:    ret void
 124 //
 125 //
 126 // IR-PCH-LABEL: define {{[^@]+}}@_Z3foov
 127 // IR-PCH-SAME: () #[[ATTR0:[0-9]+]] {
 128 // IR-PCH-NEXT:  entry:
 129 // IR-PCH-NEXT:    [[X:%.*]] = alloca i32, align 4
 130 // IR-PCH-NEXT:    [[RESULT:%.*]] = alloca [64 x i32], align 16
 131 // IR-PCH-NEXT:    [[TMP0:%.*]] = call i32 @__kmpc_global_thread_num(ptr @[[GLOB2:[0-9]+]])
 132 // IR-PCH-NEXT:    store i32 0, ptr [[X]], align 4
 133 // IR-PCH-NEXT:    call void @llvm.memset.p0.i64(ptr align 16 [[RESULT]], i8 0, i64 256, i1 false)
 134 // IR-PCH-NEXT:    call void @__kmpc_push_num_threads(ptr @[[GLOB2]], i32 [[TMP0]], i32 64)
 135 // IR-PCH-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @_Z3foov.omp_outlined, ptr [[RESULT]])
 136 // IR-PCH-NEXT:    ret i32 0
 137 //
 138 //
 139 // IR-PCH-LABEL: define {{[^@]+}}@_Z3foov.omp_outlined
 140 // IR-PCH-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(256) [[RESULT:%.*]]) #[[ATTR2:[0-9]+]] {
 141 // IR-PCH-NEXT:  entry:
 142 // IR-PCH-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 143 // IR-PCH-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 144 // IR-PCH-NEXT:    [[RESULT_ADDR:%.*]] = alloca ptr, align 8
 145 // IR-PCH-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 146 // IR-PCH-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 147 // IR-PCH-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 148 // IR-PCH-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 149 // IR-PCH-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 150 // IR-PCH-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 151 // IR-PCH-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 152 // IR-PCH-NEXT:    [[I:%.*]] = alloca i32, align 4
 153 // IR-PCH-NEXT:    [[J:%.*]] = alloca i32, align 4
 154 // IR-PCH-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 155 // IR-PCH-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 156 // IR-PCH-NEXT:    store ptr [[RESULT]], ptr [[RESULT_ADDR]], align 8
 157 // IR-PCH-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[RESULT_ADDR]], align 8
 158 // IR-PCH-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 159 // IR-PCH-NEXT:    store i32 4095, ptr [[DOTOMP_UB]], align 4
 160 // IR-PCH-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 161 // IR-PCH-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 162 // IR-PCH-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 163 // IR-PCH-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 164 // IR-PCH-NEXT:    [[DOTX__VOID_ADDR:%.*]] = call ptr @__kmpc_alloc(i32 [[TMP2]], i64 4, ptr null)
 165 // IR-PCH-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 166 // IR-PCH-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 167 // IR-PCH-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 4095
 168 // IR-PCH-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 169 // IR-PCH:       cond.true:
 170 // IR-PCH-NEXT:    br label [[COND_END:%.*]]
 171 // IR-PCH:       cond.false:
 172 // IR-PCH-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 173 // IR-PCH-NEXT:    br label [[COND_END]]
 174 // IR-PCH:       cond.end:
 175 // IR-PCH-NEXT:    [[COND:%.*]] = phi i32 [ 4095, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 176 // IR-PCH-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 177 // IR-PCH-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 178 // IR-PCH-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 179 // IR-PCH-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 180 // IR-PCH:       omp.inner.for.cond:
 181 // IR-PCH-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 182 // IR-PCH-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 183 // IR-PCH-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 184 // IR-PCH-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
 185 // IR-PCH:       omp.inner.for.cond.cleanup:
 186 // IR-PCH-NEXT:    br label [[OMP_INNER_FOR_END:%.*]]
 187 // IR-PCH:       omp.inner.for.body:
 188 // IR-PCH-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 189 // IR-PCH-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 64
 190 // IR-PCH-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
 191 // IR-PCH-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 192 // IR-PCH-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 193 // IR-PCH-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 194 // IR-PCH-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 195 // IR-PCH-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 64
 196 // IR-PCH-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 64
 197 // IR-PCH-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
 198 // IR-PCH-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
 199 // IR-PCH-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
 200 // IR-PCH-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4
 201 // IR-PCH-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
 202 // IR-PCH-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4
 203 // IR-PCH-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 204 // IR-PCH-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTX__VOID_ADDR]], align 4
 205 // IR-PCH-NEXT:    [[ADD8:%.*]] = add nsw i32 [[ADD7]], [[TMP13]]
 206 // IR-PCH-NEXT:    [[TMP14:%.*]] = load i32, ptr [[I]], align 4
 207 // IR-PCH-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP14]] to i64
 208 // IR-PCH-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [64 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
 209 // IR-PCH-NEXT:    store i32 [[ADD8]], ptr [[ARRAYIDX]], align 4
 210 // IR-PCH-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 211 // IR-PCH:       omp.body.continue:
 212 // IR-PCH-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 213 // IR-PCH:       omp.inner.for.inc:
 214 // IR-PCH-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 215 // IR-PCH-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP15]], 1
 216 // IR-PCH-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
 217 // IR-PCH-NEXT:    br label [[OMP_INNER_FOR_COND]]
 218 // IR-PCH:       omp.inner.for.end:
 219 // IR-PCH-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 220 // IR-PCH:       omp.loop.exit:
 221 // IR-PCH-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 222 // IR-PCH-NEXT:    call void @__kmpc_free(i32 [[TMP2]], ptr [[DOTX__VOID_ADDR]], ptr null)
 223 // IR-PCH-NEXT:    ret void
 224 //