clang/test/OpenMP/parallel_master_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // expected-no-diagnostics
   3 #ifndef HEADER
   4 #define HEADER
   5
   6 #ifdef CK1
   7 ///==========================================================================///
   8 // RUN: %clang_cc1 -DCK1 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK1
   9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  10 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
  11
  12 // RUN: %clang_cc1 -DCK1 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  13 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  14 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  15
  16
  17 void foo() { extern void mayThrow(); mayThrow(); }
  18
  19 void parallel_master() {
  20 #pragma omp parallel master
  21   foo();
  22 }
  23
  24
  25
  26 #endif
  27
  28 #ifdef CK2
  29 ///==========================================================================///
  30 // RUN: %clang_cc1 -DCK2 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK5
  31 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  32 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  33
  34 // RUN: %clang_cc1 -DCK2 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  35 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  36 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  37
  38
  39 void parallel_master_private() {
  40   int a;
  41 #pragma omp parallel master private(a)
  42   a++;
  43 }
  44
  45
  46
  47 #endif
  48
  49 #ifdef CK3
  50 ///==========================================================================///
  51 // RUN: %clang_cc1 -DCK3 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK9
  52 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  53 // RUN: %clang_cc1 -DCK3 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
  54
  55 // RUN: %clang_cc1 -DCK3 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  56 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  57 // RUN: %clang_cc1 -DCK3 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  58
  59
  60 void parallel_master_private() {
  61   int a;
  62 #pragma omp parallel master default(shared)
  63   a++;
  64 }
  65
  66
  67
  68 #endif
  69
  70 #ifdef CK31
  71 ///==========================================================================///
  72 // RUN: %clang_cc1 -DCK31 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK13
  73 // RUN: %clang_cc1 -DCK31 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  74 // RUN: %clang_cc1 -DCK31 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
  75
  76 // RUN: %clang_cc1 -DCK31 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  77 // RUN: %clang_cc1 -DCK31 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  78 // RUN: %clang_cc1 -DCK31 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  79
  80
  81 void parallel_master_default_firstprivate() {
  82   int a;
  83 #pragma omp parallel master default(firstprivate)
  84   a++;
  85 }
  86
  87
  88
  89
  90
  91 #endif
  92
  93 #ifdef CK32
  94 ///==========================================================================///
  95 // RUN: %clang_cc1 -DCK32 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK17
  96 // RUN: %clang_cc1 -DCK32 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
  97 // RUN: %clang_cc1 -DCK32 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17
  98
  99 // RUN: %clang_cc1 -DCK32 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 100 // RUN: %clang_cc1 -DCK32 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 101 // RUN: %clang_cc1 -DCK32 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 102
 103 struct St {
 104   int a, b;
 105   static int y;
 106   St() : a(0), b(0) {}
 107   ~St() {}
 108 };
 109 int St::y = 0;
 110
 111 void parallel_master_default_firstprivate() {
 112   St a = St();
 113   static int y = 0;
 114 #pragma omp parallel master default(firstprivate)
 115   {
 116     a.a += 1;
 117     a.b += 1;
 118     y++;
 119     a.y++;
 120   }
 121 }
 122
 123
 124
 125
 126
 127
 128
 129
 130 #endif
 131
 132 #ifdef CK4
 133 ///==========================================================================///
 134 // RUN: %clang_cc1 -DCK4 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK21
 135 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 136 // RUN: %clang_cc1 -DCK4 -fopenmp -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK21
 137
 138 // RUN: %clang_cc1 -DCK4 -verify -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 139 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 140 // RUN: %clang_cc1 -DCK4 -fopenmp-simd -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 141
 142
 143 void parallel_master_firstprivate() {
 144   int a;
 145 #pragma omp parallel master firstprivate(a)
 146   a++;
 147 }
 148
 149
 150
 151 #endif
 152
 153 #ifdef CK5
 154 ///==========================================================================///
 155 // RUN: %clang_cc1 -DCK5 -verify -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --check-prefix=CHECK25
 156 // RUN: %clang_cc1 -DCK5 -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 157 // RUN: %clang_cc1 -DCK5 -fopenmp -fopenmp -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK25
 158
 159 // RUN: %clang_cc1 -DCK5 -verify -fopenmp-simd -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -fexceptions -fcxx-exceptions -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 160 // RUN: %clang_cc1 -DCK5 -fopenmp-simd -fnoopenmp-use-tls -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 161 // RUN: %clang_cc1 -DCK5 -fopenmp-simd -fnoopenmp-use-tls -x c++ -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 162
 163 // RUN: %clang_cc1 -DCK5 -verify -fopenmp -x c++ -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK29
 164 // RUN: %clang_cc1 -DCK5 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
 165
 166 // RUN: %clang_cc1 -DCK5 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
 167
 168
 169 int a;
 170 #pragma omp threadprivate(a)
 171
 172 void parallel_master_copyin() {
 173 #pragma omp parallel master copyin(a)
 174   a++;
 175 }
 176
 177
 178
 179
 180
 181
 182 // TLC-CHECK-DAG:   [[INC:%.+]] = add nsw i32 [[TEN]], 1
 183 // TLC-CHECK-DAG:   store i32 [[INC]], ptr [[TEN]]
 184
 185 #endif
 186 #ifdef CK6
 187 ///==========================================================================///
 188 // RUN: %clang_cc1 -DCK6 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
 189
 190 // RUN: %clang_cc1 -DCK6 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -emit-pch -o %t %s
 191
 192
 193 void parallel_master_reduction() {
 194   int g;
 195 #pragma omp parallel master reduction(+:g)
 196   g = 1;
 197 }
 198
 199
 200
 201
 202
 203 // switch
 204
 205 // case 1:
 206
 207 // case 2:
 208
 209 #endif
 210 #ifdef CK7
 211 ///==========================================================================///
 212 // RUN: %clang_cc1 -DCK7 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 213
 214 // RUN: %clang_cc1 -DCK7 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 215
 216
 217 void parallel_master_if() {
 218 #pragma omp parallel master if (parallel: false)
 219   parallel_master_if();
 220 }
 221
 222
 223
 224 #endif
 225 #ifdef CK8
 226 ///==========================================================================///
 227 // RUN: %clang_cc1 -DCK8 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 228
 229 // RUN: %clang_cc1 -DCK8 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 230
 231 typedef __INTPTR_TYPE__ intptr_t;
 232
 233
 234 void foo();
 235
 236 struct S {
 237   intptr_t a, b, c;
 238   S(intptr_t a) : a(a) {}
 239   operator char() { return a; }
 240   ~S() {}
 241 };
 242
 243 template <typename T>
 244 T tmain() {
 245 #pragma omp parallel master proc_bind(master)
 246   foo();
 247   return T();
 248 }
 249
 250 int main() {
 251 #pragma omp parallel master proc_bind(spread)
 252   foo();
 253 #pragma omp parallel master proc_bind(close)
 254   foo();
 255   return tmain<int>();
 256 }
 257
 258
 259
 260
 261 #endif
 262 #ifdef CK9
 263 ///==========================================================================///
 264 // RUN: %clang_cc1 -DCK9 -fopenmp -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 265
 266 // RUN: %clang_cc1 -DCK9 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-unknown-unknown -fexceptions -fcxx-exceptions -emit-pch -o %t %s
 267 typedef void **omp_allocator_handle_t;
 268 extern const omp_allocator_handle_t omp_null_allocator;
 269 extern const omp_allocator_handle_t omp_default_mem_alloc;
 270 extern const omp_allocator_handle_t omp_large_cap_mem_alloc;
 271 extern const omp_allocator_handle_t omp_const_mem_alloc;
 272 extern const omp_allocator_handle_t omp_high_bw_mem_alloc;
 273 extern const omp_allocator_handle_t omp_low_lat_mem_alloc;
 274 extern const omp_allocator_handle_t omp_cgroup_mem_alloc;
 275 extern const omp_allocator_handle_t omp_pteam_mem_alloc;
 276 extern const omp_allocator_handle_t omp_thread_mem_alloc;
 277
 278 void parallel_master_allocate() {
 279   int a;
 280   omp_allocator_handle_t myalloc = nullptr;
 281 #pragma omp parallel master firstprivate(a) allocate(myalloc:a)
 282   a++;
 283 }
 284
 285
 286 #endif
 287 #endif
 288 // CHECK1-LABEL: define {{[^@]+}}@_Z3foov
 289 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 290 // CHECK1-NEXT:  entry:
 291 // CHECK1-NEXT:    call void @_Z8mayThrowv()
 292 // CHECK1-NEXT:    ret void
 293 //
 294 //
 295 // CHECK1-LABEL: define {{[^@]+}}@_Z15parallel_masterv
 296 // CHECK1-SAME: () #[[ATTR2:[0-9]+]] {
 297 // CHECK1-NEXT:  entry:
 298 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 0, ptr @_Z15parallel_masterv.omp_outlined)
 299 // CHECK1-NEXT:    ret void
 300 //
 301 //
 302 // CHECK1-LABEL: define {{[^@]+}}@_Z15parallel_masterv.omp_outlined
 303 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] personality ptr @__gxx_personality_v0 {
 304 // CHECK1-NEXT:  entry:
 305 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 306 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 307 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 308 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 309 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 310 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 311 // CHECK1-NEXT:    [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])
 312 // CHECK1-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
 313 // CHECK1-NEXT:    br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
 314 // CHECK1:       omp_if.then:
 315 // CHECK1-NEXT:    invoke void @_Z3foov()
 316 // CHECK1-NEXT:    to label [[INVOKE_CONT:%.*]] unwind label [[TERMINATE_LPAD:%.*]]
 317 // CHECK1:       invoke.cont:
 318 // CHECK1-NEXT:    call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])
 319 // CHECK1-NEXT:    br label [[OMP_IF_END]]
 320 // CHECK1:       omp_if.end:
 321 // CHECK1-NEXT:    ret void
 322 // CHECK1:       terminate.lpad:
 323 // CHECK1-NEXT:    [[TMP4:%.*]] = landingpad { ptr, i32 }
 324 // CHECK1-NEXT:    catch ptr null
 325 // CHECK1-NEXT:    [[TMP5:%.*]] = extractvalue { ptr, i32 } [[TMP4]], 0
 326 // CHECK1-NEXT:    call void @__clang_call_terminate(ptr [[TMP5]]) #[[ATTR6:[0-9]+]]
 327 // CHECK1-NEXT:    unreachable
 328 //
 329 //
 330 // CHECK1-LABEL: define {{[^@]+}}@__clang_call_terminate
 331 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]]) #[[ATTR5:[0-9]+]] comdat {
 332 // CHECK1-NEXT:    [[TMP2:%.*]] = call ptr @__cxa_begin_catch(ptr [[TMP0]]) #[[ATTR4:[0-9]+]]
 333 // CHECK1-NEXT:    call void @_ZSt9terminatev() #[[ATTR6]]
 334 // CHECK1-NEXT:    unreachable
 335 //
 336 //
 337 // CHECK5-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev
 338 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
 339 // CHECK5-NEXT:  entry:
 340 // CHECK5-NEXT:    [[A:%.*]] = alloca i32, align 4
 341 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 0, ptr @_Z23parallel_master_privatev.omp_outlined)
 342 // CHECK5-NEXT:    ret void
 343 //
 344 //
 345 // CHECK5-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev.omp_outlined
 346 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
 347 // CHECK5-NEXT:  entry:
 348 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 349 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 350 // CHECK5-NEXT:    [[A:%.*]] = alloca i32, align 4
 351 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 352 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 353 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 354 // CHECK5-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 355 // CHECK5-NEXT:    [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])
 356 // CHECK5-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
 357 // CHECK5-NEXT:    br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
 358 // CHECK5:       omp_if.then:
 359 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
 360 // CHECK5-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
 361 // CHECK5-NEXT:    store i32 [[INC]], ptr [[A]], align 4
 362 // CHECK5-NEXT:    call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])
 363 // CHECK5-NEXT:    br label [[OMP_IF_END]]
 364 // CHECK5:       omp_if.end:
 365 // CHECK5-NEXT:    ret void
 366 //
 367 //
 368 // CHECK9-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev
 369 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
 370 // CHECK9-NEXT:  entry:
 371 // CHECK9-NEXT:    [[A:%.*]] = alloca i32, align 4
 372 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @_Z23parallel_master_privatev.omp_outlined, ptr [[A]])
 373 // CHECK9-NEXT:    ret void
 374 //
 375 //
 376 // CHECK9-LABEL: define {{[^@]+}}@_Z23parallel_master_privatev.omp_outlined
 377 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
 378 // CHECK9-NEXT:  entry:
 379 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 380 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 381 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 382 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 383 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 384 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 385 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 386 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 387 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 388 // CHECK9-NEXT:    [[TMP3:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP2]])
 389 // CHECK9-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
 390 // CHECK9-NEXT:    br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
 391 // CHECK9:       omp_if.then:
 392 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4
 393 // CHECK9-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP5]], 1
 394 // CHECK9-NEXT:    store i32 [[INC]], ptr [[TMP0]], align 4
 395 // CHECK9-NEXT:    call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP2]])
 396 // CHECK9-NEXT:    br label [[OMP_IF_END]]
 397 // CHECK9:       omp_if.end:
 398 // CHECK9-NEXT:    ret void
 399 //
 400 //
 401 // CHECK13-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev
 402 // CHECK13-SAME: () #[[ATTR0:[0-9]+]] {
 403 // CHECK13-NEXT:  entry:
 404 // CHECK13-NEXT:    [[A:%.*]] = alloca i32, align 4
 405 // CHECK13-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
 406 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A]], align 4
 407 // CHECK13-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
 408 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
 409 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @_Z36parallel_master_default_firstprivatev.omp_outlined, i64 [[TMP1]])
 410 // CHECK13-NEXT:    ret void
 411 //
 412 //
 413 // CHECK13-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev.omp_outlined
 414 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] {
 415 // CHECK13-NEXT:  entry:
 416 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 417 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 418 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 419 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 420 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 421 // CHECK13-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
 422 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 423 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 424 // CHECK13-NEXT:    [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])
 425 // CHECK13-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
 426 // CHECK13-NEXT:    br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
 427 // CHECK13:       omp_if.then:
 428 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A_ADDR]], align 4
 429 // CHECK13-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
 430 // CHECK13-NEXT:    store i32 [[INC]], ptr [[A_ADDR]], align 4
 431 // CHECK13-NEXT:    call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])
 432 // CHECK13-NEXT:    br label [[OMP_IF_END]]
 433 // CHECK13:       omp_if.end:
 434 // CHECK13-NEXT:    ret void
 435 //
 436 //
 437 // CHECK17-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev
 438 // CHECK17-SAME: () #[[ATTR0:[0-9]+]] {
 439 // CHECK17-NEXT:  entry:
 440 // CHECK17-NEXT:    [[A:%.*]] = alloca [[STRUCT_ST:%.*]], align 4
 441 // CHECK17-NEXT:    [[Y_CASTED:%.*]] = alloca i64, align 8
 442 // CHECK17-NEXT:    [[Y_CASTED1:%.*]] = alloca i64, align 8
 443 // CHECK17-NEXT:    call void @_ZN2StC1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[A]])
 444 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, ptr @_ZZ36parallel_master_default_firstprivatevE1y, align 4
 445 // CHECK17-NEXT:    store i32 [[TMP0]], ptr [[Y_CASTED]], align 4
 446 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[Y_CASTED]], align 8
 447 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr @_ZN2St1yE, align 4
 448 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[Y_CASTED1]], align 4
 449 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, ptr [[Y_CASTED1]], align 8
 450 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 3, ptr @_Z36parallel_master_default_firstprivatev.omp_outlined, ptr [[A]], i64 [[TMP1]], i64 [[TMP3]])
 451 // CHECK17-NEXT:    call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[A]]) #[[ATTR4:[0-9]+]]
 452 // CHECK17-NEXT:    ret void
 453 //
 454 //
 455 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StC1Ev
 456 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
 457 // CHECK17-NEXT:  entry:
 458 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 459 // CHECK17-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 460 // CHECK17-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 461 // CHECK17-NEXT:    call void @_ZN2StC2Ev(ptr noundef nonnull align 4 dereferenceable(8) [[THIS1]])
 462 // CHECK17-NEXT:    ret void
 463 //
 464 //
 465 // CHECK17-LABEL: define {{[^@]+}}@_Z36parallel_master_default_firstprivatev.omp_outlined
 466 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], i64 noundef [[Y:%.*]], i64 noundef [[Y1:%.*]]) #[[ATTR2:[0-9]+]] {
 467 // CHECK17-NEXT:  entry:
 468 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 469 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 470 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 471 // CHECK17-NEXT:    [[Y_ADDR:%.*]] = alloca i64, align 8
 472 // CHECK17-NEXT:    [[Y_ADDR2:%.*]] = alloca i64, align 8
 473 // CHECK17-NEXT:    [[A3:%.*]] = alloca [[STRUCT_ST:%.*]], align 4
 474 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 475 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 476 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 477 // CHECK17-NEXT:    store i64 [[Y]], ptr [[Y_ADDR]], align 8
 478 // CHECK17-NEXT:    store i64 [[Y1]], ptr [[Y_ADDR2]], align 8
 479 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 480 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[A3]], ptr align 4 [[TMP0]], i64 8, i1 false)
 481 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 482 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 483 // CHECK17-NEXT:    [[TMP3:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP2]])
 484 // CHECK17-NEXT:    [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
 485 // CHECK17-NEXT:    br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
 486 // CHECK17:       omp_if.then:
 487 // CHECK17-NEXT:    [[A4:%.*]] = getelementptr inbounds [[STRUCT_ST]], ptr [[A3]], i32 0, i32 0
 488 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A4]], align 4
 489 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP5]], 1
 490 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[A4]], align 4
 491 // CHECK17-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], ptr [[A3]], i32 0, i32 1
 492 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[B]], align 4
 493 // CHECK17-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP6]], 1
 494 // CHECK17-NEXT:    store i32 [[ADD5]], ptr [[B]], align 4
 495 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[Y_ADDR]], align 4
 496 // CHECK17-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP7]], 1
 497 // CHECK17-NEXT:    store i32 [[INC]], ptr [[Y_ADDR]], align 4
 498 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr @_ZN2St1yE, align 4
 499 // CHECK17-NEXT:    [[INC6:%.*]] = add nsw i32 [[TMP8]], 1
 500 // CHECK17-NEXT:    store i32 [[INC6]], ptr @_ZN2St1yE, align 4
 501 // CHECK17-NEXT:    call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP2]])
 502 // CHECK17-NEXT:    br label [[OMP_IF_END]]
 503 // CHECK17:       omp_if.end:
 504 // CHECK17-NEXT:    call void @_ZN2StD1Ev(ptr noundef nonnull align 4 dereferenceable(8) [[A3]]) #[[ATTR4]]
 505 // CHECK17-NEXT:    ret void
 506 //
 507 //
 508 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StD1Ev
 509 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR5:[0-9]+]] comdat align 2 {
 510 // CHECK17-NEXT:  entry:
 511 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 512 // CHECK17-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 513 // CHECK17-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 514 // CHECK17-NEXT:    call void @_ZN2StD2Ev(ptr noundef nonnull align 4 dereferenceable(8) [[THIS1]]) #[[ATTR4]]
 515 // CHECK17-NEXT:    ret void
 516 //
 517 //
 518 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StC2Ev
 519 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR5]] comdat align 2 {
 520 // CHECK17-NEXT:  entry:
 521 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 522 // CHECK17-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 523 // CHECK17-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 524 // CHECK17-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_ST:%.*]], ptr [[THIS1]], i32 0, i32 0
 525 // CHECK17-NEXT:    store i32 0, ptr [[A]], align 4
 526 // CHECK17-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_ST]], ptr [[THIS1]], i32 0, i32 1
 527 // CHECK17-NEXT:    store i32 0, ptr [[B]], align 4
 528 // CHECK17-NEXT:    ret void
 529 //
 530 //
 531 // CHECK17-LABEL: define {{[^@]+}}@_ZN2StD2Ev
 532 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR5]] comdat align 2 {
 533 // CHECK17-NEXT:  entry:
 534 // CHECK17-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 535 // CHECK17-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 536 // CHECK17-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 537 // CHECK17-NEXT:    ret void
 538 //
 539 //
 540 // CHECK21-LABEL: define {{[^@]+}}@_Z28parallel_master_firstprivatev
 541 // CHECK21-SAME: () #[[ATTR0:[0-9]+]] {
 542 // CHECK21-NEXT:  entry:
 543 // CHECK21-NEXT:    [[A:%.*]] = alloca i32, align 4
 544 // CHECK21-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
 545 // CHECK21-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A]], align 4
 546 // CHECK21-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
 547 // CHECK21-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
 548 // CHECK21-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 1, ptr @_Z28parallel_master_firstprivatev.omp_outlined, i64 [[TMP1]])
 549 // CHECK21-NEXT:    ret void
 550 //
 551 //
 552 // CHECK21-LABEL: define {{[^@]+}}@_Z28parallel_master_firstprivatev.omp_outlined
 553 // CHECK21-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1:[0-9]+]] {
 554 // CHECK21-NEXT:  entry:
 555 // CHECK21-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 556 // CHECK21-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 557 // CHECK21-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
 558 // CHECK21-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 559 // CHECK21-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 560 // CHECK21-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
 561 // CHECK21-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 562 // CHECK21-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 563 // CHECK21-NEXT:    [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])
 564 // CHECK21-NEXT:    [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
 565 // CHECK21-NEXT:    br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
 566 // CHECK21:       omp_if.then:
 567 // CHECK21-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A_ADDR]], align 4
 568 // CHECK21-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
 569 // CHECK21-NEXT:    store i32 [[INC]], ptr [[A_ADDR]], align 4
 570 // CHECK21-NEXT:    call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])
 571 // CHECK21-NEXT:    br label [[OMP_IF_END]]
 572 // CHECK21:       omp_if.end:
 573 // CHECK21-NEXT:    ret void
 574 //
 575 //
 576 // CHECK25-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv
 577 // CHECK25-SAME: () #[[ATTR0:[0-9]+]] {
 578 // CHECK25-NEXT:  entry:
 579 // CHECK25-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 0, ptr @_Z22parallel_master_copyinv.omp_outlined)
 580 // CHECK25-NEXT:    ret void
 581 //
 582 //
 583 // CHECK25-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv.omp_outlined
 584 // CHECK25-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR1:[0-9]+]] {
 585 // CHECK25-NEXT:  entry:
 586 // CHECK25-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 587 // CHECK25-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 588 // CHECK25-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 589 // CHECK25-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 590 // CHECK25-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 591 // CHECK25-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 592 // CHECK25-NEXT:    [[TMP2:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP1]], ptr @a, i64 4, ptr @a.cache.)
 593 // CHECK25-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[TMP2]] to i64
 594 // CHECK25-NEXT:    [[TMP4:%.*]] = icmp ne i64 ptrtoint (ptr @a to i64), [[TMP3]]
 595 // CHECK25-NEXT:    br i1 [[TMP4]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]]
 596 // CHECK25:       copyin.not.master:
 597 // CHECK25-NEXT:    [[TMP5:%.*]] = load i32, ptr @a, align 4
 598 // CHECK25-NEXT:    store i32 [[TMP5]], ptr [[TMP2]], align 4
 599 // CHECK25-NEXT:    br label [[COPYIN_NOT_MASTER_END]]
 600 // CHECK25:       copyin.not.master.end:
 601 // CHECK25-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB2:[0-9]+]], i32 [[TMP1]])
 602 // CHECK25-NEXT:    [[TMP6:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])
 603 // CHECK25-NEXT:    [[TMP7:%.*]] = icmp ne i32 [[TMP6]], 0
 604 // CHECK25-NEXT:    br i1 [[TMP7]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
 605 // CHECK25:       omp_if.then:
 606 // CHECK25-NEXT:    [[TMP8:%.*]] = call ptr @__kmpc_threadprivate_cached(ptr @[[GLOB1]], i32 [[TMP1]], ptr @a, i64 4, ptr @a.cache.)
 607 // CHECK25-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
 608 // CHECK25-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP9]], 1
 609 // CHECK25-NEXT:    store i32 [[INC]], ptr [[TMP8]], align 4
 610 // CHECK25-NEXT:    call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])
 611 // CHECK25-NEXT:    br label [[OMP_IF_END]]
 612 // CHECK25:       omp_if.end:
 613 // CHECK25-NEXT:    ret void
 614 //
 615 //
 616 // CHECK29-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv
 617 // CHECK29-SAME: () #[[ATTR0:[0-9]+]] {
 618 // CHECK29-NEXT:  entry:
 619 // CHECK29-NEXT:    [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @a)
 620 // CHECK29-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @_Z22parallel_master_copyinv.omp_outlined, ptr [[TMP0]])
 621 // CHECK29-NEXT:    ret void
 622 //
 623 //
 624 // CHECK29-LABEL: define {{[^@]+}}@_Z22parallel_master_copyinv.omp_outlined
 625 // CHECK29-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
 626 // CHECK29-NEXT:  entry:
 627 // CHECK29-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 628 // CHECK29-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 629 // CHECK29-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 630 // CHECK29-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 631 // CHECK29-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 632 // CHECK29-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 633 // CHECK29-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 634 // CHECK29-NEXT:    [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @a)
 635 // CHECK29-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[TMP0]] to i64
 636 // CHECK29-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[TMP1]] to i64
 637 // CHECK29-NEXT:    [[TMP4:%.*]] = icmp ne i64 [[TMP2]], [[TMP3]]
 638 // CHECK29-NEXT:    br i1 [[TMP4]], label [[COPYIN_NOT_MASTER:%.*]], label [[COPYIN_NOT_MASTER_END:%.*]]
 639 // CHECK29:       copyin.not.master:
 640 // CHECK29-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4
 641 // CHECK29-NEXT:    store i32 [[TMP5]], ptr [[TMP1]], align 4
 642 // CHECK29-NEXT:    br label [[COPYIN_NOT_MASTER_END]]
 643 // CHECK29:       copyin.not.master.end:
 644 // CHECK29-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 645 // CHECK29-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
 646 // CHECK29-NEXT:    call void @__kmpc_barrier(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]])
 647 // CHECK29-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 648 // CHECK29-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
 649 // CHECK29-NEXT:    [[TMP10:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB2]], i32 [[TMP9]])
 650 // CHECK29-NEXT:    [[TMP11:%.*]] = icmp ne i32 [[TMP10]], 0
 651 // CHECK29-NEXT:    br i1 [[TMP11]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
 652 // CHECK29:       omp_if.then:
 653 // CHECK29-NEXT:    [[TMP12:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @a)
 654 // CHECK29-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
 655 // CHECK29-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP13]], 1
 656 // CHECK29-NEXT:    store i32 [[INC]], ptr [[TMP12]], align 4
 657 // CHECK29-NEXT:    call void @__kmpc_end_master(ptr @[[GLOB2]], i32 [[TMP9]])
 658 // CHECK29-NEXT:    br label [[OMP_IF_END]]
 659 // CHECK29:       omp_if.end:
 660 // CHECK29-NEXT:    ret void
 661 //
 662 //
 663 // CHECK29-LABEL: define {{[^@]+}}@_ZTW1a
 664 // CHECK29-SAME: () #[[ATTR5:[0-9]+]] comdat {
 665 // CHECK29-NEXT:    [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @a)
 666 // CHECK29-NEXT:    ret ptr [[TMP1]]
 667 //