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Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / OpenMP / parallel_master_taskloop_firstprivate_codegen.cpp
blob5e3bcae3acacc0bf69cd26de4bdbf0a49c49291c
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -verify -Wno-vla -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s
3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s
5 // RUN: %clang_cc1 -verify -Wno-vla -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck -check-prefix=LAMBDA %s
6 // RUN: %clang_cc1 -verify -Wno-vla -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck -check-prefix=BLOCKS %s
7 // RUN: %clang_cc1 -verify -Wno-vla -fopenmp -x c++ -std=c++11 -DARRAY -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck -check-prefix=ARRAY %s
8
9 // RUN: %clang_cc1 -verify -Wno-vla -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
11 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
12 // RUN: %clang_cc1 -verify -Wno-vla -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY2 %s
13 // RUN: %clang_cc1 -verify -Wno-vla -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY3 %s
14 // RUN: %clang_cc1 -verify -Wno-vla -fopenmp-simd -x c++ -std=c++11 -DARRAY -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY4 %s
15 // expected-no-diagnostics
16
17 #ifndef ARRAY
18 #ifndef HEADER
19 #define HEADER
20
21 template <class T>
22 struct S {
23 T f;
24 S(T a) : f(a) {}
25 S() : f() {}
26 S(const S &s, T t = T()) : f(s.f + t) {}
27 operator T() { return T(); }
28 ~S() {}
29 };
30
31 volatile double g;
32
33 template <typename T>
34 T tmain() {
35 S<T> ttt;
36 S<T> test(ttt);
37 T t_var __attribute__((aligned(128))) = T();
38 T vec[] = {1, 2};
39 S<T> s_arr[] = {1, 2};
40 S<T> var(3);
41 #pragma omp parallel master taskloop firstprivate(t_var, vec, s_arr, s_arr, var, var)
42 for (int i = 0; i < 10; ++i) {
43 vec[0] = t_var;
44 s_arr[0] = var;
45 }
46 return T();
47 }
48
49 int main() {
50 static int sivar;
51 #ifdef LAMBDA
52 [&]() {
53
54
55 #pragma omp parallel master taskloop firstprivate(g, sivar)
56 for (int i = 0; i < 10; ++i) {
57
58 g = 1;
59 sivar = 11;
60 [&]() {
61 g = 2;
62 sivar = 22;
63 }();
64 }
65 }();
66 return 0;
67 #elif defined(BLOCKS)
68 ^{
69
70 #pragma omp parallel master taskloop firstprivate(g, sivar)
71 for (int i = 0; i < 10; ++i) {
72
73 g = 1;
74 sivar = 11;
75 ^{
76 g = 2;
77 sivar = 22;
78 }();
79 }
80 }();
81 return 0;
82 #else
83 S<double> ttt;
84 S<double> test(ttt);
85 int t_var = 0;
86 int vec[] = {1, 2};
87 S<double> s_arr[] = {1, 2};
88 S<double> var(3);
89 #pragma omp parallel master taskloop firstprivate(var, t_var, s_arr, vec, s_arr, var, sivar)
90 for (int i = 0; i < 10; ++i) {
91 vec[0] = t_var;
92 s_arr[0] = var;
93 sivar = 33;
94 }
95 return tmain<int>();
96 #endif
97 }
98
99
100
101 // Store original variables in capture struct.
102
103 // Allocate task.
104 // Returns struct kmp_task_t {
105 // [[KMP_TASK_T]] task_data;
106 // [[KMP_TASK_MAIN_TY]] privates;
107 // };
108
109 // Fill kmp_task_t->shareds by copying from original capture argument.
110
111 // Initialize kmp_task_t->privates with default values (no init for simple types, default constructors for classes).
112 // Also copy address of private copy to the corresponding shareds reference.
113
114 // Constructors for s_arr and var.
115 // s_arr;
116
117 // var;
118
119 // t_var;
120
121 // vec;
122
123 // sivar;
124
125 // Provide pointer to destructor function, which will destroy private variables at the end of the task.
126
127 // Start task.
128
129
130
131
132
133
134 // Privates actually are used.
135
136
137
138
139
140
141
142
143 // Store original variables in capture struct.
144
145 // Allocate task.
146 // Returns struct kmp_task_t {
147 // [[KMP_TASK_T_TY]] task_data;
148 // [[KMP_TASK_TMAIN_TY]] privates;
149 // };
150
151 // Fill kmp_task_t->shareds by copying from original capture argument.
152
153 // Initialize kmp_task_t->privates with default values (no init for simple types, default constructors for classes).
154
155 // t_var;
156
157 // vec;
158
159 // Constructors for s_arr and var.
160 // a_arr;
161
162 // var;
163
164 // Provide pointer to destructor function, which will destroy private variables at the end of the task.
165
166 // Start task.
167
168
169
170 // Privates actually are used.
171
172
173
174
175
176
177 #endif
178 #else
179 struct St {
180 int a, b;
181 St() : a(0), b(0) {}
182 St(const St &) {}
183 ~St() {}
184 };
185
186 void array_func(int n, float a[n], St s[2]) {
187 #pragma omp parallel master taskloop firstprivate(a, s)
188 for (int i = 0; i < 10; ++i)
189 ;
190 }
191 #endif
192
193 // CHECK-LABEL: define {{[^@]+}}@main
194 // CHECK-SAME: () #[[ATTR0:[0-9]+]] {
195 // CHECK-NEXT: entry:
196 // CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
197 // CHECK-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S:%.*]], align 8
198 // CHECK-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S]], align 8
199 // CHECK-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
200 // CHECK-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
201 // CHECK-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 16
202 // CHECK-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 8
203 // CHECK-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
204 // CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4
205 // CHECK-NEXT: call void @_ZN1SIdEC1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]])
206 // CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]], ptr noundef nonnull align 8 dereferenceable(8) [[TTT]], double noundef 0.000000e+00)
207 // CHECK-NEXT: store i32 0, ptr [[T_VAR]], align 4
208 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
209 // CHECK-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
210 // CHECK-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYINIT_BEGIN]], double noundef 1.000000e+00)
211 // CHECK-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
212 // CHECK-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYINIT_ELEMENT]], double noundef 2.000000e+00)
213 // CHECK-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]], double noundef 3.000000e+00)
214 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 4
215 // CHECK-NEXT: store i32 [[TMP0]], ptr [[T_VAR_CASTED]], align 4
216 // CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
217 // CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 4, ptr @main.omp_outlined, ptr [[VEC]], i64 [[TMP1]], ptr [[S_ARR]], ptr [[VAR]])
218 // CHECK-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
219 // CHECK-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
220 // CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]]) #[[ATTR4:[0-9]+]]
221 // CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
222 // CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
223 // CHECK-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
224 // CHECK: arraydestroy.body:
225 // CHECK-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
226 // CHECK-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
227 // CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
228 // CHECK-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
229 // CHECK-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
230 // CHECK: arraydestroy.done1:
231 // CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]]) #[[ATTR4]]
232 // CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]]) #[[ATTR4]]
233 // CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[RETVAL]], align 4
234 // CHECK-NEXT: ret i32 [[TMP3]]
235 //
236 //
237 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ev
238 // CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
239 // CHECK-NEXT: entry:
240 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
241 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
242 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
243 // CHECK-NEXT: call void @_ZN1SIdEC2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]])
244 // CHECK-NEXT: ret void
245 //
246 //
247 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC1ERKS0_d
248 // CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
249 // CHECK-NEXT: entry:
250 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
251 // CHECK-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
252 // CHECK-NEXT: [[T_ADDR:%.*]] = alloca double, align 8
253 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
254 // CHECK-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
255 // CHECK-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
256 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
257 // CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
258 // CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[T_ADDR]], align 8
259 // CHECK-NEXT: call void @_ZN1SIdEC2ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP0]], double noundef [[TMP1]])
260 // CHECK-NEXT: ret void
261 //
262 //
263 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ed
264 // CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
265 // CHECK-NEXT: entry:
266 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
267 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca double, align 8
268 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
269 // CHECK-NEXT: store double [[A]], ptr [[A_ADDR]], align 8
270 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
271 // CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 8
272 // CHECK-NEXT: call void @_ZN1SIdEC2Ed(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], double noundef [[TMP0]])
273 // CHECK-NEXT: ret void
274 //
275 //
276 // CHECK-LABEL: define {{[^@]+}}@main.omp_outlined
277 // CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 8 dereferenceable(16) [[S_ARR:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[VAR:%.*]]) #[[ATTR3:[0-9]+]] {
278 // CHECK-NEXT: entry:
279 // CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
280 // CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
281 // CHECK-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8
282 // CHECK-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
283 // CHECK-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
284 // CHECK-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8
285 // CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
286 // CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4
287 // CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
288 // CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
289 // CHECK-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
290 // CHECK-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
291 // CHECK-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
292 // CHECK-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
293 // CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
294 // CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
295 // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
296 // CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
297 // CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
298 // CHECK-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
299 // CHECK-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0
300 // CHECK-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
301 // CHECK: omp_if.then:
302 // CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0
303 // CHECK-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8
304 // CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 1
305 // CHECK-NEXT: store ptr [[TMP2]], ptr [[TMP8]], align 8
306 // CHECK-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP4]])
307 // CHECK-NEXT: [[TMP9:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP4]], i32 9, i64 120, i64 16, ptr @.omp_task_entry.)
308 // CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP9]], i32 0, i32 0
309 // CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP10]], i32 0, i32 0
310 // CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8
311 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP12]], ptr align 8 [[AGG_CAPTURED]], i64 16, i1 false)
312 // CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP9]], i32 0, i32 1
313 // CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP13]], i32 0, i32 0
314 // CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP14]], i32 0, i32 0
315 // CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 2
316 // CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP15]]
317 // CHECK-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
318 // CHECK: omp.arraycpy.body:
319 // CHECK-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[OMP_IF_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
320 // CHECK-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[OMP_IF_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
321 // CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_ARRAYCPY_SRCELEMENTPAST]], double noundef 0.000000e+00)
322 // CHECK-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
323 // CHECK-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
324 // CHECK-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP15]]
325 // CHECK-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]]
326 // CHECK: omp.arraycpy.done1:
327 // CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP13]], i32 0, i32 1
328 // CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TMP16]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP2]], double noundef 0.000000e+00)
329 // CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP13]], i32 0, i32 2
330 // CHECK-NEXT: [[TMP18:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4
331 // CHECK-NEXT: store i32 [[TMP18]], ptr [[TMP17]], align 8
332 // CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP13]], i32 0, i32 3
333 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP19]], ptr align 4 [[TMP0]], i64 8, i1 false)
334 // CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP13]], i32 0, i32 4
335 // CHECK-NEXT: [[TMP21:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4
336 // CHECK-NEXT: store i32 [[TMP21]], ptr [[TMP20]], align 4
337 // CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 3
338 // CHECK-NEXT: store ptr @.omp_task_destructor., ptr [[TMP22]], align 8
339 // CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 5
340 // CHECK-NEXT: store i64 0, ptr [[TMP23]], align 8
341 // CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 6
342 // CHECK-NEXT: store i64 9, ptr [[TMP24]], align 8
343 // CHECK-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 7
344 // CHECK-NEXT: store i64 1, ptr [[TMP25]], align 8
345 // CHECK-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 9
346 // CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP26]], i8 0, i64 8, i1 false)
347 // CHECK-NEXT: [[TMP27:%.*]] = load i64, ptr [[TMP25]], align 8
348 // CHECK-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP4]], ptr [[TMP9]], i32 1, ptr [[TMP23]], ptr [[TMP24]], i64 [[TMP27]], i32 1, i32 0, i64 0, ptr @.omp_task_dup.)
349 // CHECK-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP4]])
350 // CHECK-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP4]])
351 // CHECK-NEXT: br label [[OMP_IF_END]]
352 // CHECK: omp_if.end:
353 // CHECK-NEXT: ret void
354 //
355 //
356 // CHECK-LABEL: define {{[^@]+}}@.omp_task_privates_map.
357 // CHECK-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]], ptr noalias noundef [[TMP3:%.*]], ptr noalias noundef [[TMP4:%.*]], ptr noalias noundef [[TMP5:%.*]]) #[[ATTR6:[0-9]+]] {
358 // CHECK-NEXT: entry:
359 // CHECK-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
360 // CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
361 // CHECK-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 8
362 // CHECK-NEXT: [[DOTADDR3:%.*]] = alloca ptr, align 8
363 // CHECK-NEXT: [[DOTADDR4:%.*]] = alloca ptr, align 8
364 // CHECK-NEXT: [[DOTADDR5:%.*]] = alloca ptr, align 8
365 // CHECK-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
366 // CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
367 // CHECK-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 8
368 // CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTADDR3]], align 8
369 // CHECK-NEXT: store ptr [[TMP4]], ptr [[DOTADDR4]], align 8
370 // CHECK-NEXT: store ptr [[TMP5]], ptr [[DOTADDR5]], align 8
371 // CHECK-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTADDR]], align 8
372 // CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP6]], i32 0, i32 0
373 // CHECK-NEXT: [[TMP8:%.*]] = load ptr, ptr [[DOTADDR3]], align 8
374 // CHECK-NEXT: store ptr [[TMP7]], ptr [[TMP8]], align 8
375 // CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP6]], i32 0, i32 1
376 // CHECK-NEXT: [[TMP10:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
377 // CHECK-NEXT: store ptr [[TMP9]], ptr [[TMP10]], align 8
378 // CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP6]], i32 0, i32 2
379 // CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[DOTADDR2]], align 8
380 // CHECK-NEXT: store ptr [[TMP11]], ptr [[TMP12]], align 8
381 // CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP6]], i32 0, i32 3
382 // CHECK-NEXT: [[TMP14:%.*]] = load ptr, ptr [[DOTADDR4]], align 8
383 // CHECK-NEXT: store ptr [[TMP13]], ptr [[TMP14]], align 8
384 // CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP6]], i32 0, i32 4
385 // CHECK-NEXT: [[TMP16:%.*]] = load ptr, ptr [[DOTADDR5]], align 8
386 // CHECK-NEXT: store ptr [[TMP15]], ptr [[TMP16]], align 8
387 // CHECK-NEXT: ret void
388 //
389 //
390 // CHECK-LABEL: define {{[^@]+}}@.omp_task_entry.
391 // CHECK-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
392 // CHECK-NEXT: entry:
393 // CHECK-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
394 // CHECK-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
395 // CHECK-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8
396 // CHECK-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8
397 // CHECK-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8
398 // CHECK-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8
399 // CHECK-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8
400 // CHECK-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8
401 // CHECK-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4
402 // CHECK-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8
403 // CHECK-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8
404 // CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8
405 // CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 8
406 // CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca ptr, align 8
407 // CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca ptr, align 8
408 // CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR4_I:%.*]] = alloca ptr, align 8
409 // CHECK-NEXT: [[I_I:%.*]] = alloca i32, align 4
410 // CHECK-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4
411 // CHECK-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
412 // CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
413 // CHECK-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4
414 // CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
415 // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4
416 // CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
417 // CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0
418 // CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
419 // CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
420 // CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
421 // CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1
422 // CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5
423 // CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8
424 // CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6
425 // CHECK-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8
426 // CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7
427 // CHECK-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8
428 // CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8
429 // CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
430 // CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
431 // CHECK-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
432 // CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
433 // CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
434 // CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
435 // CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
436 // CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
437 // CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14
438 // CHECK-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias !14
439 // CHECK-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14
440 // CHECK-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14
441 // CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias !14
442 // CHECK-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias !14
443 // CHECK-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias !14
444 // CHECK-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias !14
445 // CHECK-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias !14
446 // CHECK-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14
447 // CHECK-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !14
448 // CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !14
449 // CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14
450 // CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14
451 // CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]]) #[[ATTR4]]
452 // CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !14
453 // CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !14
454 // CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias !14
455 // CHECK-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias !14
456 // CHECK-NEXT: [[TMP26:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR4_I]], align 8, !noalias !14
457 // CHECK-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias !14
458 // CHECK-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP27]] to i32
459 // CHECK-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias !14
460 // CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
461 // CHECK: omp.inner.for.cond.i:
462 // CHECK-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
463 // CHECK-NEXT: [[CONV5_I:%.*]] = sext i32 [[TMP28]] to i64
464 // CHECK-NEXT: [[TMP29:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias !14
465 // CHECK-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV5_I]], [[TMP29]]
466 // CHECK-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
467 // CHECK: omp.inner.for.body.i:
468 // CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
469 // CHECK-NEXT: store i32 [[TMP30]], ptr [[I_I]], align 4, !noalias !14
470 // CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[TMP23]], align 4
471 // CHECK-NEXT: store i32 [[TMP31]], ptr [[TMP25]], align 4
472 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[TMP24]], ptr align 8 [[TMP22]], i64 8, i1 false)
473 // CHECK-NEXT: store i32 33, ptr [[TMP26]], align 4
474 // CHECK-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
475 // CHECK-NEXT: [[ADD7_I:%.*]] = add nsw i32 [[TMP32]], 1
476 // CHECK-NEXT: store i32 [[ADD7_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias !14
477 // CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I]]
478 // CHECK: .omp_outlined..exit:
479 // CHECK-NEXT: ret i32 0
480 //
481 //
482 // CHECK-LABEL: define {{[^@]+}}@.omp_task_dup.
483 // CHECK-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR7]] {
484 // CHECK-NEXT: entry:
485 // CHECK-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
486 // CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
487 // CHECK-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4
488 // CHECK-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
489 // CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
490 // CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTADDR2]], align 4
491 // CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
492 // CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
493 // CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP4]], i32 0, i32 0
494 // CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP5]], i32 0, i32 0
495 // CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
496 // CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1
497 // CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP8]], i32 0, i32 0
498 // CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON:%.*]], ptr [[TMP7]], i32 0, i32 0
499 // CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
500 // CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP9]], i32 0, i32 0
501 // CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 2
502 // CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP12]]
503 // CHECK-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE3:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
504 // CHECK: omp.arraycpy.body:
505 // CHECK-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP11]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
506 // CHECK-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
507 // CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 8 dereferenceable(8) [[OMP_ARRAYCPY_SRCELEMENTPAST]], double noundef 0.000000e+00)
508 // CHECK-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
509 // CHECK-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
510 // CHECK-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]]
511 // CHECK-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE3]], label [[OMP_ARRAYCPY_BODY]]
512 // CHECK: omp.arraycpy.done3:
513 // CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP8]], i32 0, i32 1
514 // CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON]], ptr [[TMP7]], i32 0, i32 1
515 // CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8
516 // CHECK-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TMP13]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP15]], double noundef 0.000000e+00)
517 // CHECK-NEXT: ret void
518 //
519 //
520 // CHECK-LABEL: define {{[^@]+}}@.omp_task_destructor.
521 // CHECK-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7]] {
522 // CHECK-NEXT: entry:
523 // CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
524 // CHECK-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
525 // CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
526 // CHECK-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4
527 // CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
528 // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
529 // CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP2]], i32 0, i32 1
530 // CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP3]], i32 0, i32 0
531 // CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP3]], i32 0, i32 1
532 // CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TMP5]]) #[[ATTR4]]
533 // CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP4]], i32 0, i32 0
534 // CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[ARRAY_BEGIN]], i64 2
535 // CHECK-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
536 // CHECK: arraydestroy.body:
537 // CHECK-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP6]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
538 // CHECK-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
539 // CHECK-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
540 // CHECK-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
541 // CHECK-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
542 // CHECK: arraydestroy.done2:
543 // CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[RETVAL]], align 4
544 // CHECK-NEXT: ret i32 [[TMP7]]
545 //
546 //
547 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIdED1Ev
548 // CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
549 // CHECK-NEXT: entry:
550 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
551 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
552 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
553 // CHECK-NEXT: call void @_ZN1SIdED2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]]) #[[ATTR4]]
554 // CHECK-NEXT: ret void
555 //
556 //
557 // CHECK-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
558 // CHECK-SAME: () #[[ATTR9:[0-9]+]] {
559 // CHECK-NEXT: entry:
560 // CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
561 // CHECK-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
562 // CHECK-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0]], align 4
563 // CHECK-NEXT: [[T_VAR:%.*]] = alloca i32, align 128
564 // CHECK-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
565 // CHECK-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
566 // CHECK-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 4
567 // CHECK-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
568 // CHECK-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]])
569 // CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]], ptr noundef nonnull align 4 dereferenceable(4) [[TTT]], i32 noundef 0)
570 // CHECK-NEXT: store i32 0, ptr [[T_VAR]], align 128
571 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
572 // CHECK-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
573 // CHECK-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
574 // CHECK-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
575 // CHECK-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
576 // CHECK-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3)
577 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[T_VAR]], align 128
578 // CHECK-NEXT: store i32 [[TMP0]], ptr [[T_VAR_CASTED]], align 4
579 // CHECK-NEXT: [[TMP1:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
580 // CHECK-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1]], i32 4, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[VEC]], i64 [[TMP1]], ptr [[S_ARR]], ptr [[VAR]])
581 // CHECK-NEXT: store i32 0, ptr [[RETVAL]], align 4
582 // CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
583 // CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
584 // CHECK-NEXT: [[TMP2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
585 // CHECK-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
586 // CHECK: arraydestroy.body:
587 // CHECK-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP2]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
588 // CHECK-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
589 // CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
590 // CHECK-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
591 // CHECK-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
592 // CHECK: arraydestroy.done1:
593 // CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
594 // CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]]) #[[ATTR4]]
595 // CHECK-NEXT: [[TMP3:%.*]] = load i32, ptr [[RETVAL]], align 4
596 // CHECK-NEXT: ret i32 [[TMP3]]
597 //
598 //
599 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ev
600 // CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
601 // CHECK-NEXT: entry:
602 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
603 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
604 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
605 // CHECK-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
606 // CHECK-NEXT: store double 0.000000e+00, ptr [[F]], align 8
607 // CHECK-NEXT: ret void
608 //
609 //
610 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC2ERKS0_d
611 // CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
612 // CHECK-NEXT: entry:
613 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
614 // CHECK-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
615 // CHECK-NEXT: [[T_ADDR:%.*]] = alloca double, align 8
616 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
617 // CHECK-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
618 // CHECK-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
619 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
620 // CHECK-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
621 // CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
622 // CHECK-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 0
623 // CHECK-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 8
624 // CHECK-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 8
625 // CHECK-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[TMP2]]
626 // CHECK-NEXT: store double [[ADD]], ptr [[F]], align 8
627 // CHECK-NEXT: ret void
628 //
629 //
630 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ed
631 // CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
632 // CHECK-NEXT: entry:
633 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
634 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca double, align 8
635 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
636 // CHECK-NEXT: store double [[A]], ptr [[A_ADDR]], align 8
637 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
638 // CHECK-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
639 // CHECK-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 8
640 // CHECK-NEXT: store double [[TMP0]], ptr [[F]], align 8
641 // CHECK-NEXT: ret void
642 //
643 //
644 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIdED2Ev
645 // CHECK-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
646 // CHECK-NEXT: entry:
647 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
648 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
649 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
650 // CHECK-NEXT: ret void
651 //
652 //
653 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
654 // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
655 // CHECK-NEXT: entry:
656 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
657 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
658 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
659 // CHECK-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
660 // CHECK-NEXT: ret void
661 //
662 //
663 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_i
664 // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
665 // CHECK-NEXT: entry:
666 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
667 // CHECK-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
668 // CHECK-NEXT: [[T_ADDR:%.*]] = alloca i32, align 4
669 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
670 // CHECK-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
671 // CHECK-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
672 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
673 // CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
674 // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_ADDR]], align 4
675 // CHECK-NEXT: call void @_ZN1SIiEC2ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], i32 noundef [[TMP1]])
676 // CHECK-NEXT: ret void
677 //
678 //
679 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
680 // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
681 // CHECK-NEXT: entry:
682 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
683 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
684 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
685 // CHECK-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
686 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
687 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
688 // CHECK-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
689 // CHECK-NEXT: ret void
690 //
691 //
692 // CHECK-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
693 // CHECK-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
694 // CHECK-NEXT: entry:
695 // CHECK-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
696 // CHECK-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
697 // CHECK-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8
698 // CHECK-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
699 // CHECK-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
700 // CHECK-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8
701 // CHECK-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON_1:%.*]], align 8
702 // CHECK-NEXT: [[TMP:%.*]] = alloca i32, align 4
703 // CHECK-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
704 // CHECK-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
705 // CHECK-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
706 // CHECK-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
707 // CHECK-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
708 // CHECK-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
709 // CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
710 // CHECK-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
711 // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
712 // CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
713 // CHECK-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
714 // CHECK-NEXT: [[TMP5:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP4]])
715 // CHECK-NEXT: [[TMP6:%.*]] = icmp ne i32 [[TMP5]], 0
716 // CHECK-NEXT: br i1 [[TMP6]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
717 // CHECK: omp_if.then:
718 // CHECK-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], ptr [[AGG_CAPTURED]], i32 0, i32 0
719 // CHECK-NEXT: store ptr [[TMP1]], ptr [[TMP7]], align 8
720 // CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], ptr [[AGG_CAPTURED]], i32 0, i32 1
721 // CHECK-NEXT: store ptr [[TMP2]], ptr [[TMP8]], align 8
722 // CHECK-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP4]])
723 // CHECK-NEXT: [[TMP9:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP4]], i32 9, i64 256, i64 16, ptr @.omp_task_entry..3)
724 // CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2:%.*]], ptr [[TMP9]], i32 0, i32 0
725 // CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP10]], i32 0, i32 0
726 // CHECK-NEXT: [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 128
727 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP12]], ptr align 8 [[AGG_CAPTURED]], i64 16, i1 false)
728 // CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2]], ptr [[TMP9]], i32 0, i32 2
729 // CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3:%.*]], ptr [[TMP13]], i32 0, i32 0
730 // CHECK-NEXT: [[TMP15:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4
731 // CHECK-NEXT: store i32 [[TMP15]], ptr [[TMP14]], align 128
732 // CHECK-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP13]], i32 0, i32 1
733 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP16]], ptr align 4 [[TMP0]], i64 8, i1 false)
734 // CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP13]], i32 0, i32 2
735 // CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP17]], i32 0, i32 0
736 // CHECK-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[ARRAY_BEGIN]], i64 2
737 // CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP18]]
738 // CHECK-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE1:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
739 // CHECK: omp.arraycpy.body:
740 // CHECK-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP1]], [[OMP_IF_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
741 // CHECK-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[OMP_IF_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
742 // CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 noundef 0)
743 // CHECK-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
744 // CHECK-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
745 // CHECK-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP18]]
746 // CHECK-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE1]], label [[OMP_ARRAYCPY_BODY]]
747 // CHECK: omp.arraycpy.done1:
748 // CHECK-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP13]], i32 0, i32 3
749 // CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TMP19]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP2]], i32 noundef 0)
750 // CHECK-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 3
751 // CHECK-NEXT: store ptr @.omp_task_destructor..5, ptr [[TMP20]], align 8
752 // CHECK-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 5
753 // CHECK-NEXT: store i64 0, ptr [[TMP21]], align 8
754 // CHECK-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 6
755 // CHECK-NEXT: store i64 9, ptr [[TMP22]], align 16
756 // CHECK-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 7
757 // CHECK-NEXT: store i64 1, ptr [[TMP23]], align 8
758 // CHECK-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP10]], i32 0, i32 9
759 // CHECK-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP24]], i8 0, i64 8, i1 false)
760 // CHECK-NEXT: [[TMP25:%.*]] = load i64, ptr [[TMP23]], align 8
761 // CHECK-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP4]], ptr [[TMP9]], i32 1, ptr [[TMP21]], ptr [[TMP22]], i64 [[TMP25]], i32 1, i32 0, i64 0, ptr @.omp_task_dup..4)
762 // CHECK-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP4]])
763 // CHECK-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP4]])
764 // CHECK-NEXT: br label [[OMP_IF_END]]
765 // CHECK: omp_if.end:
766 // CHECK-NEXT: ret void
767 //
768 //
769 // CHECK-LABEL: define {{[^@]+}}@.omp_task_privates_map..2
770 // CHECK-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]], ptr noalias noundef [[TMP3:%.*]], ptr noalias noundef [[TMP4:%.*]]) #[[ATTR6]] {
771 // CHECK-NEXT: entry:
772 // CHECK-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
773 // CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
774 // CHECK-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 8
775 // CHECK-NEXT: [[DOTADDR3:%.*]] = alloca ptr, align 8
776 // CHECK-NEXT: [[DOTADDR4:%.*]] = alloca ptr, align 8
777 // CHECK-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
778 // CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
779 // CHECK-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 8
780 // CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTADDR3]], align 8
781 // CHECK-NEXT: store ptr [[TMP4]], ptr [[DOTADDR4]], align 8
782 // CHECK-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR]], align 8
783 // CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3:%.*]], ptr [[TMP5]], i32 0, i32 0
784 // CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
785 // CHECK-NEXT: store ptr [[TMP6]], ptr [[TMP7]], align 8
786 // CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP5]], i32 0, i32 1
787 // CHECK-NEXT: [[TMP9:%.*]] = load ptr, ptr [[DOTADDR2]], align 8
788 // CHECK-NEXT: store ptr [[TMP8]], ptr [[TMP9]], align 8
789 // CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP5]], i32 0, i32 2
790 // CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[DOTADDR3]], align 8
791 // CHECK-NEXT: store ptr [[TMP10]], ptr [[TMP11]], align 8
792 // CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP5]], i32 0, i32 3
793 // CHECK-NEXT: [[TMP13:%.*]] = load ptr, ptr [[DOTADDR4]], align 8
794 // CHECK-NEXT: store ptr [[TMP12]], ptr [[TMP13]], align 8
795 // CHECK-NEXT: ret void
796 //
797 //
798 // CHECK-LABEL: define {{[^@]+}}@.omp_task_entry..3
799 // CHECK-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7]] {
800 // CHECK-NEXT: entry:
801 // CHECK-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
802 // CHECK-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
803 // CHECK-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8
804 // CHECK-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8
805 // CHECK-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8
806 // CHECK-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8
807 // CHECK-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8
808 // CHECK-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8
809 // CHECK-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4
810 // CHECK-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8
811 // CHECK-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8
812 // CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8
813 // CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 8
814 // CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR2_I:%.*]] = alloca ptr, align 8
815 // CHECK-NEXT: [[DOTFIRSTPRIV_PTR_ADDR3_I:%.*]] = alloca ptr, align 8
816 // CHECK-NEXT: [[I_I:%.*]] = alloca i32, align 4
817 // CHECK-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4
818 // CHECK-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
819 // CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
820 // CHECK-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4
821 // CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
822 // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4
823 // CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
824 // CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2:%.*]], ptr [[TMP3]], i32 0, i32 0
825 // CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
826 // CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
827 // CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
828 // CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2]], ptr [[TMP3]], i32 0, i32 2
829 // CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5
830 // CHECK-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8
831 // CHECK-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6
832 // CHECK-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 16
833 // CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7
834 // CHECK-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8
835 // CHECK-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8
836 // CHECK-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 64
837 // CHECK-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
838 // CHECK-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
839 // CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META17:![0-9]+]])
840 // CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META20:![0-9]+]])
841 // CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META22:![0-9]+]])
842 // CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META24:![0-9]+]])
843 // CHECK-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META26:![0-9]+]])
844 // CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !28
845 // CHECK-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias !28
846 // CHECK-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !28
847 // CHECK-NEXT: store ptr @.omp_task_privates_map..2, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !28
848 // CHECK-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias !28
849 // CHECK-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias !28
850 // CHECK-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias !28
851 // CHECK-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias !28
852 // CHECK-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias !28
853 // CHECK-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !28
854 // CHECK-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !28
855 // CHECK-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !28
856 // CHECK-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !28
857 // CHECK-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !28
858 // CHECK-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]]) #[[ATTR4]]
859 // CHECK-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !28
860 // CHECK-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !28
861 // CHECK-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR2_I]], align 8, !noalias !28
862 // CHECK-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR3_I]], align 8, !noalias !28
863 // CHECK-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias !28
864 // CHECK-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP26]] to i32
865 // CHECK-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias !28
866 // CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
867 // CHECK: omp.inner.for.cond.i:
868 // CHECK-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !28
869 // CHECK-NEXT: [[CONV4_I:%.*]] = sext i32 [[TMP27]] to i64
870 // CHECK-NEXT: [[TMP28:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias !28
871 // CHECK-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV4_I]], [[TMP28]]
872 // CHECK-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__1_EXIT:%.*]]
873 // CHECK: omp.inner.for.body.i:
874 // CHECK-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !28
875 // CHECK-NEXT: store i32 [[TMP29]], ptr [[I_I]], align 4, !noalias !28
876 // CHECK-NEXT: [[TMP30:%.*]] = load i32, ptr [[TMP22]], align 128
877 // CHECK-NEXT: store i32 [[TMP30]], ptr [[TMP23]], align 4
878 // CHECK-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP24]], ptr align 4 [[TMP25]], i64 4, i1 false)
879 // CHECK-NEXT: [[TMP31:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !28
880 // CHECK-NEXT: [[ADD6_I:%.*]] = add nsw i32 [[TMP31]], 1
881 // CHECK-NEXT: store i32 [[ADD6_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias !28
882 // CHECK-NEXT: br label [[OMP_INNER_FOR_COND_I]]
883 // CHECK: .omp_outlined..1.exit:
884 // CHECK-NEXT: ret i32 0
885 //
886 //
887 // CHECK-LABEL: define {{[^@]+}}@.omp_task_dup..4
888 // CHECK-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]], i32 noundef [[TMP2:%.*]]) #[[ATTR7]] {
889 // CHECK-NEXT: entry:
890 // CHECK-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
891 // CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
892 // CHECK-NEXT: [[DOTADDR2:%.*]] = alloca i32, align 4
893 // CHECK-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
894 // CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
895 // CHECK-NEXT: store i32 [[TMP2]], ptr [[DOTADDR2]], align 4
896 // CHECK-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
897 // CHECK-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
898 // CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2:%.*]], ptr [[TMP4]], i32 0, i32 0
899 // CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP5]], i32 0, i32 0
900 // CHECK-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 128
901 // CHECK-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2]], ptr [[TMP3]], i32 0, i32 2
902 // CHECK-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3:%.*]], ptr [[TMP8]], i32 0, i32 2
903 // CHECK-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_ANON_1:%.*]], ptr [[TMP7]], i32 0, i32 0
904 // CHECK-NEXT: [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
905 // CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP9]], i32 0, i32 0
906 // CHECK-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[ARRAY_BEGIN]], i64 2
907 // CHECK-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN]], [[TMP12]]
908 // CHECK-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE3:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
909 // CHECK: omp.arraycpy.body:
910 // CHECK-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP11]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
911 // CHECK-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
912 // CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr noundef nonnull align 4 dereferenceable(4) [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 noundef 0)
913 // CHECK-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
914 // CHECK-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
915 // CHECK-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP12]]
916 // CHECK-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE3]], label [[OMP_ARRAYCPY_BODY]]
917 // CHECK: omp.arraycpy.done3:
918 // CHECK-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP8]], i32 0, i32 3
919 // CHECK-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_ANON_1]], ptr [[TMP7]], i32 0, i32 1
920 // CHECK-NEXT: [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8
921 // CHECK-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TMP13]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP15]], i32 noundef 0)
922 // CHECK-NEXT: ret void
923 //
924 //
925 // CHECK-LABEL: define {{[^@]+}}@.omp_task_destructor..5
926 // CHECK-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7]] {
927 // CHECK-NEXT: entry:
928 // CHECK-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
929 // CHECK-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
930 // CHECK-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
931 // CHECK-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4
932 // CHECK-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
933 // CHECK-NEXT: [[TMP2:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
934 // CHECK-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES_2:%.*]], ptr [[TMP2]], i32 0, i32 2
935 // CHECK-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3:%.*]], ptr [[TMP3]], i32 0, i32 2
936 // CHECK-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T_3]], ptr [[TMP3]], i32 0, i32 3
937 // CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TMP5]]) #[[ATTR4]]
938 // CHECK-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP4]], i32 0, i32 0
939 // CHECK-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[ARRAY_BEGIN]], i64 2
940 // CHECK-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
941 // CHECK: arraydestroy.body:
942 // CHECK-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP6]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
943 // CHECK-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
944 // CHECK-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
945 // CHECK-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
946 // CHECK-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
947 // CHECK: arraydestroy.done2:
948 // CHECK-NEXT: [[TMP7:%.*]] = load i32, ptr [[RETVAL]], align 4
949 // CHECK-NEXT: ret i32 [[TMP7]]
950 //
951 //
952 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
953 // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
954 // CHECK-NEXT: entry:
955 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
956 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
957 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
958 // CHECK-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
959 // CHECK-NEXT: ret void
960 //
961 //
962 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
963 // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
964 // CHECK-NEXT: entry:
965 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
966 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
967 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
968 // CHECK-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
969 // CHECK-NEXT: store i32 0, ptr [[F]], align 4
970 // CHECK-NEXT: ret void
971 //
972 //
973 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_i
974 // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
975 // CHECK-NEXT: entry:
976 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
977 // CHECK-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
978 // CHECK-NEXT: [[T_ADDR:%.*]] = alloca i32, align 4
979 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
980 // CHECK-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
981 // CHECK-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
982 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
983 // CHECK-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
984 // CHECK-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
985 // CHECK-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 0
986 // CHECK-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 4
987 // CHECK-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 4
988 // CHECK-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
989 // CHECK-NEXT: store i32 [[ADD]], ptr [[F]], align 4
990 // CHECK-NEXT: ret void
991 //
992 //
993 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
994 // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
995 // CHECK-NEXT: entry:
996 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
997 // CHECK-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
998 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
999 // CHECK-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1000 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1001 // CHECK-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1002 // CHECK-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1003 // CHECK-NEXT: store i32 [[TMP0]], ptr [[F]], align 4
1004 // CHECK-NEXT: ret void
1005 //
1006 //
1007 // CHECK-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1008 // CHECK-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1009 // CHECK-NEXT: entry:
1010 // CHECK-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1011 // CHECK-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1012 // CHECK-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1013 // CHECK-NEXT: ret void
1014 //
1015 //
1016 // LAMBDA-LABEL: define {{[^@]+}}@main
1017 // LAMBDA-SAME: () #[[ATTR0:[0-9]+]] {
1018 // LAMBDA-NEXT: entry:
1019 // LAMBDA-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1020 // LAMBDA-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1021 // LAMBDA-NEXT: store i32 0, ptr [[RETVAL]], align 4
1022 // LAMBDA-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
1023 // LAMBDA-NEXT: ret i32 0
1024 //
1025 //
1026 // LAMBDA-LABEL: define {{[^@]+}}@.omp_task_privates_map.
1027 // LAMBDA-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR5:[0-9]+]] {
1028 // LAMBDA-NEXT: entry:
1029 // LAMBDA-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
1030 // LAMBDA-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
1031 // LAMBDA-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 8
1032 // LAMBDA-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
1033 // LAMBDA-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1034 // LAMBDA-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 8
1035 // LAMBDA-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
1036 // LAMBDA-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP3]], i32 0, i32 0
1037 // LAMBDA-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1038 // LAMBDA-NEXT: store ptr [[TMP4]], ptr [[TMP5]], align 8
1039 // LAMBDA-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP3]], i32 0, i32 1
1040 // LAMBDA-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR2]], align 8
1041 // LAMBDA-NEXT: store ptr [[TMP6]], ptr [[TMP7]], align 8
1042 // LAMBDA-NEXT: ret void
1043 //
1044 //
1045 // LAMBDA-LABEL: define {{[^@]+}}@.omp_task_entry.
1046 // LAMBDA-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR6:[0-9]+]] {
1047 // LAMBDA-NEXT: entry:
1048 // LAMBDA-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
1049 // LAMBDA-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
1050 // LAMBDA-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8
1051 // LAMBDA-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8
1052 // LAMBDA-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8
1053 // LAMBDA-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8
1054 // LAMBDA-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8
1055 // LAMBDA-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8
1056 // LAMBDA-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4
1057 // LAMBDA-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8
1058 // LAMBDA-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8
1059 // LAMBDA-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8
1060 // LAMBDA-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 8
1061 // LAMBDA-NEXT: [[I_I:%.*]] = alloca i32, align 4
1062 // LAMBDA-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4
1063 // LAMBDA-NEXT: [[REF_TMP_I:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1064 // LAMBDA-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
1065 // LAMBDA-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
1066 // LAMBDA-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4
1067 // LAMBDA-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1068 // LAMBDA-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4
1069 // LAMBDA-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1070 // LAMBDA-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0
1071 // LAMBDA-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
1072 // LAMBDA-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
1073 // LAMBDA-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
1074 // LAMBDA-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1
1075 // LAMBDA-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5
1076 // LAMBDA-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8
1077 // LAMBDA-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6
1078 // LAMBDA-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8
1079 // LAMBDA-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7
1080 // LAMBDA-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8
1081 // LAMBDA-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8
1082 // LAMBDA-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
1083 // LAMBDA-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
1084 // LAMBDA-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
1085 // LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
1086 // LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
1087 // LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
1088 // LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
1089 // LAMBDA-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
1090 // LAMBDA-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14
1091 // LAMBDA-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias !14
1092 // LAMBDA-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14
1093 // LAMBDA-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14
1094 // LAMBDA-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias !14
1095 // LAMBDA-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias !14
1096 // LAMBDA-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias !14
1097 // LAMBDA-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias !14
1098 // LAMBDA-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias !14
1099 // LAMBDA-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14
1100 // LAMBDA-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !14
1101 // LAMBDA-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !14
1102 // LAMBDA-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14
1103 // LAMBDA-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14
1104 // LAMBDA-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR3:[0-9]+]]
1105 // LAMBDA-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !14
1106 // LAMBDA-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !14
1107 // LAMBDA-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias !14
1108 // LAMBDA-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP24]] to i32
1109 // LAMBDA-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1110 // LAMBDA-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
1111 // LAMBDA: omp.inner.for.cond.i:
1112 // LAMBDA-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1113 // LAMBDA-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP25]] to i64
1114 // LAMBDA-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias !14
1115 // LAMBDA-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP26]]
1116 // LAMBDA-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
1117 // LAMBDA: omp.inner.for.body.i:
1118 // LAMBDA-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1119 // LAMBDA-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias !14
1120 // LAMBDA-NEXT: store double 1.000000e+00, ptr [[TMP22]], align 8
1121 // LAMBDA-NEXT: store i32 11, ptr [[TMP23]], align 4
1122 // LAMBDA-NEXT: store ptr [[TMP22]], ptr [[REF_TMP_I]], align 8, !noalias !14
1123 // LAMBDA-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP_I]], i32 0, i32 1
1124 // LAMBDA-NEXT: store ptr [[TMP23]], ptr [[TMP28]], align 8, !noalias !14
1125 // LAMBDA-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP_I]])
1126 // LAMBDA-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1127 // LAMBDA-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP29]], 1
1128 // LAMBDA-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1129 // LAMBDA-NEXT: br label [[OMP_INNER_FOR_COND_I]]
1130 // LAMBDA: .omp_outlined..exit:
1131 // LAMBDA-NEXT: ret i32 0
1132 //
1133 //
1134 // BLOCKS-LABEL: define {{[^@]+}}@main
1135 // BLOCKS-SAME: () #[[ATTR1:[0-9]+]] {
1136 // BLOCKS-NEXT: entry:
1137 // BLOCKS-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1138 // BLOCKS-NEXT: store i32 0, ptr [[RETVAL]], align 4
1139 // BLOCKS-NEXT: [[TMP0:%.*]] = load ptr, ptr getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr @__block_literal_global, i32 0, i32 3), align 8
1140 // BLOCKS-NEXT: call void [[TMP0]](ptr noundef @__block_literal_global)
1141 // BLOCKS-NEXT: ret i32 0
1142 //
1143 //
1144 // BLOCKS-LABEL: define {{[^@]+}}@__main_block_invoke
1145 // BLOCKS-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] {
1146 // BLOCKS-NEXT: entry:
1147 // BLOCKS-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
1148 // BLOCKS-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
1149 // BLOCKS-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
1150 // BLOCKS-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
1151 // BLOCKS-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 0, ptr @__main_block_invoke.omp_outlined)
1152 // BLOCKS-NEXT: ret void
1153 //
1154 //
1155 // BLOCKS-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
1156 // BLOCKS-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]]) #[[ATTR3:[0-9]+]] {
1157 // BLOCKS-NEXT: entry:
1158 // BLOCKS-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1159 // BLOCKS-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1160 // BLOCKS-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 1
1161 // BLOCKS-NEXT: [[TMP:%.*]] = alloca i32, align 4
1162 // BLOCKS-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1163 // BLOCKS-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1164 // BLOCKS-NEXT: [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1165 // BLOCKS-NEXT: [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1166 // BLOCKS-NEXT: [[TMP2:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP1]])
1167 // BLOCKS-NEXT: [[TMP3:%.*]] = icmp ne i32 [[TMP2]], 0
1168 // BLOCKS-NEXT: br i1 [[TMP3]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
1169 // BLOCKS: omp_if.then:
1170 // BLOCKS-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP1]])
1171 // BLOCKS-NEXT: [[TMP4:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP1]], i32 1, i64 96, i64 1, ptr @.omp_task_entry.)
1172 // BLOCKS-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP4]], i32 0, i32 0
1173 // BLOCKS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP4]], i32 0, i32 1
1174 // BLOCKS-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP6]], i32 0, i32 0
1175 // BLOCKS-NEXT: [[TMP8:%.*]] = load volatile double, ptr @g, align 8
1176 // BLOCKS-NEXT: store volatile double [[TMP8]], ptr [[TMP7]], align 8
1177 // BLOCKS-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP6]], i32 0, i32 1
1178 // BLOCKS-NEXT: [[TMP10:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4
1179 // BLOCKS-NEXT: store i32 [[TMP10]], ptr [[TMP9]], align 8
1180 // BLOCKS-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP5]], i32 0, i32 5
1181 // BLOCKS-NEXT: store i64 0, ptr [[TMP11]], align 8
1182 // BLOCKS-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP5]], i32 0, i32 6
1183 // BLOCKS-NEXT: store i64 9, ptr [[TMP12]], align 8
1184 // BLOCKS-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP5]], i32 0, i32 7
1185 // BLOCKS-NEXT: store i64 1, ptr [[TMP13]], align 8
1186 // BLOCKS-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP5]], i32 0, i32 9
1187 // BLOCKS-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP14]], i8 0, i64 8, i1 false)
1188 // BLOCKS-NEXT: [[TMP15:%.*]] = load i64, ptr [[TMP13]], align 8
1189 // BLOCKS-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP1]], ptr [[TMP4]], i32 1, ptr [[TMP11]], ptr [[TMP12]], i64 [[TMP15]], i32 1, i32 0, i64 0, ptr null)
1190 // BLOCKS-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP1]])
1191 // BLOCKS-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP1]])
1192 // BLOCKS-NEXT: br label [[OMP_IF_END]]
1193 // BLOCKS: omp_if.end:
1194 // BLOCKS-NEXT: ret void
1195 //
1196 //
1197 // BLOCKS-LABEL: define {{[^@]+}}@_block_invoke
1198 // BLOCKS-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {
1199 // BLOCKS-NEXT: entry:
1200 // BLOCKS-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
1201 // BLOCKS-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
1202 // BLOCKS-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
1203 // BLOCKS-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
1204 // BLOCKS-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 5
1205 // BLOCKS-NEXT: store double 2.000000e+00, ptr [[BLOCK_CAPTURE_ADDR]], align 8
1206 // BLOCKS-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
1207 // BLOCKS-NEXT: store i32 22, ptr [[BLOCK_CAPTURE_ADDR1]], align 8
1208 // BLOCKS-NEXT: ret void
1209 //
1210 //
1211 // BLOCKS-LABEL: define {{[^@]+}}@.omp_task_privates_map.
1212 // BLOCKS-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR6:[0-9]+]] {
1213 // BLOCKS-NEXT: entry:
1214 // BLOCKS-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
1215 // BLOCKS-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
1216 // BLOCKS-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 8
1217 // BLOCKS-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
1218 // BLOCKS-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1219 // BLOCKS-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 8
1220 // BLOCKS-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
1221 // BLOCKS-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP3]], i32 0, i32 0
1222 // BLOCKS-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1223 // BLOCKS-NEXT: store ptr [[TMP4]], ptr [[TMP5]], align 8
1224 // BLOCKS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP3]], i32 0, i32 1
1225 // BLOCKS-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR2]], align 8
1226 // BLOCKS-NEXT: store ptr [[TMP6]], ptr [[TMP7]], align 8
1227 // BLOCKS-NEXT: ret void
1228 //
1229 //
1230 // BLOCKS-LABEL: define {{[^@]+}}@.omp_task_entry.
1231 // BLOCKS-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR7:[0-9]+]] {
1232 // BLOCKS-NEXT: entry:
1233 // BLOCKS-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
1234 // BLOCKS-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
1235 // BLOCKS-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8
1236 // BLOCKS-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8
1237 // BLOCKS-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8
1238 // BLOCKS-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8
1239 // BLOCKS-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8
1240 // BLOCKS-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8
1241 // BLOCKS-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4
1242 // BLOCKS-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8
1243 // BLOCKS-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8
1244 // BLOCKS-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8
1245 // BLOCKS-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 8
1246 // BLOCKS-NEXT: [[I_I:%.*]] = alloca i32, align 4
1247 // BLOCKS-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4
1248 // BLOCKS-NEXT: [[BLOCK_I:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, double, i32 }>, align 8
1249 // BLOCKS-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
1250 // BLOCKS-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
1251 // BLOCKS-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4
1252 // BLOCKS-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1253 // BLOCKS-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4
1254 // BLOCKS-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1255 // BLOCKS-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0
1256 // BLOCKS-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
1257 // BLOCKS-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
1258 // BLOCKS-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
1259 // BLOCKS-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1
1260 // BLOCKS-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5
1261 // BLOCKS-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8
1262 // BLOCKS-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6
1263 // BLOCKS-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8
1264 // BLOCKS-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7
1265 // BLOCKS-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8
1266 // BLOCKS-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8
1267 // BLOCKS-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
1268 // BLOCKS-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
1269 // BLOCKS-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
1270 // BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
1271 // BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
1272 // BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
1273 // BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
1274 // BLOCKS-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
1275 // BLOCKS-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14
1276 // BLOCKS-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias !14
1277 // BLOCKS-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14
1278 // BLOCKS-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14
1279 // BLOCKS-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias !14
1280 // BLOCKS-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias !14
1281 // BLOCKS-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias !14
1282 // BLOCKS-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias !14
1283 // BLOCKS-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias !14
1284 // BLOCKS-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14
1285 // BLOCKS-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !14
1286 // BLOCKS-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !14
1287 // BLOCKS-NEXT: [[TMP20:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14
1288 // BLOCKS-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14
1289 // BLOCKS-NEXT: call void [[TMP20]](ptr [[TMP21]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR4:[0-9]+]]
1290 // BLOCKS-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !14
1291 // BLOCKS-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !14
1292 // BLOCKS-NEXT: [[TMP24:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias !14
1293 // BLOCKS-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP24]] to i32
1294 // BLOCKS-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1295 // BLOCKS-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
1296 // BLOCKS: omp.inner.for.cond.i:
1297 // BLOCKS-NEXT: [[TMP25:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1298 // BLOCKS-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP25]] to i64
1299 // BLOCKS-NEXT: [[TMP26:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias !14
1300 // BLOCKS-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP26]]
1301 // BLOCKS-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
1302 // BLOCKS: omp.inner.for.body.i:
1303 // BLOCKS-NEXT: [[TMP27:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1304 // BLOCKS-NEXT: store i32 [[TMP27]], ptr [[I_I]], align 4, !noalias !14
1305 // BLOCKS-NEXT: store double 1.000000e+00, ptr [[TMP22]], align 8
1306 // BLOCKS-NEXT: store i32 11, ptr [[TMP23]], align 4
1307 // BLOCKS-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_I]], align 8, !noalias !14
1308 // BLOCKS-NEXT: [[BLOCK_FLAGS_I:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 1
1309 // BLOCKS-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS_I]], align 8, !noalias !14
1310 // BLOCKS-NEXT: [[BLOCK_RESERVED_I:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 2
1311 // BLOCKS-NEXT: store i32 0, ptr [[BLOCK_RESERVED_I]], align 4, !noalias !14
1312 // BLOCKS-NEXT: [[BLOCK_INVOKE_I:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 3
1313 // BLOCKS-NEXT: store ptr @_block_invoke, ptr [[BLOCK_INVOKE_I]], align 8, !noalias !14
1314 // BLOCKS-NEXT: [[BLOCK_DESCRIPTOR_I:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 4
1315 // BLOCKS-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR_I]], align 8, !noalias !14
1316 // BLOCKS-NEXT: [[BLOCK_CAPTURED_I:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 5
1317 // BLOCKS-NEXT: [[TMP28:%.*]] = load volatile double, ptr [[TMP22]], align 8
1318 // BLOCKS-NEXT: store volatile double [[TMP28]], ptr [[BLOCK_CAPTURED_I]], align 8, !noalias !14
1319 // BLOCKS-NEXT: [[BLOCK_CAPTURED3_I:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK_I]], i32 0, i32 6
1320 // BLOCKS-NEXT: [[TMP29:%.*]] = load i32, ptr [[TMP23]], align 4
1321 // BLOCKS-NEXT: store i32 [[TMP29]], ptr [[BLOCK_CAPTURED3_I]], align 8, !noalias !14
1322 // BLOCKS-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK_I]], i32 0, i32 3
1323 // BLOCKS-NEXT: [[TMP31:%.*]] = load ptr, ptr [[TMP30]], align 8, !noalias !14
1324 // BLOCKS-NEXT: call void [[TMP31]](ptr noundef [[BLOCK_I]]) #[[ATTR4]]
1325 // BLOCKS-NEXT: [[TMP32:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1326 // BLOCKS-NEXT: [[ADD4_I:%.*]] = add nsw i32 [[TMP32]], 1
1327 // BLOCKS-NEXT: store i32 [[ADD4_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1328 // BLOCKS-NEXT: br label [[OMP_INNER_FOR_COND_I]]
1329 // BLOCKS: .omp_outlined..exit:
1330 // BLOCKS-NEXT: ret i32 0
1331 //
1332 //
1333 // ARRAY-LABEL: define {{[^@]+}}@_Z10array_funciPfP2St
1334 // ARRAY-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[S:%.*]]) #[[ATTR0:[0-9]+]] {
1335 // ARRAY-NEXT: entry:
1336 // ARRAY-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
1337 // ARRAY-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1338 // ARRAY-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
1339 // ARRAY-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
1340 // ARRAY-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1341 // ARRAY-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
1342 // ARRAY-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
1343 // ARRAY-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
1344 // ARRAY-NEXT: [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1345 // ARRAY-NEXT: [[TMP3:%.*]] = load ptr, ptr [[S_ADDR]], align 8
1346 // ARRAY-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB1:[0-9]+]], i32 3, ptr @_Z10array_funciPfP2St.omp_outlined, i64 [[TMP1]], ptr [[TMP2]], ptr [[TMP3]])
1347 // ARRAY-NEXT: ret void
1348 //
1349 //
1350 // ARRAY-LABEL: define {{[^@]+}}@_Z10array_funciPfP2St.omp_outlined
1351 // ARRAY-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[VLA:%.*]], ptr noundef [[A:%.*]], ptr noundef [[S:%.*]]) #[[ATTR1:[0-9]+]] {
1352 // ARRAY-NEXT: entry:
1353 // ARRAY-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1354 // ARRAY-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1355 // ARRAY-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1356 // ARRAY-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1357 // ARRAY-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
1358 // ARRAY-NEXT: [[AGG_CAPTURED:%.*]] = alloca [[STRUCT_ANON:%.*]], align 8
1359 // ARRAY-NEXT: [[TMP:%.*]] = alloca i32, align 4
1360 // ARRAY-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1361 // ARRAY-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1362 // ARRAY-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1363 // ARRAY-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1364 // ARRAY-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
1365 // ARRAY-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1366 // ARRAY-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1367 // ARRAY-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1368 // ARRAY-NEXT: [[TMP3:%.*]] = call i32 @__kmpc_master(ptr @[[GLOB1]], i32 [[TMP2]])
1369 // ARRAY-NEXT: [[TMP4:%.*]] = icmp ne i32 [[TMP3]], 0
1370 // ARRAY-NEXT: br i1 [[TMP4]], label [[OMP_IF_THEN:%.*]], label [[OMP_IF_END:%.*]]
1371 // ARRAY: omp_if.then:
1372 // ARRAY-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_ANON]], ptr [[AGG_CAPTURED]], i32 0, i32 0
1373 // ARRAY-NEXT: store i64 [[TMP0]], ptr [[TMP5]], align 8
1374 // ARRAY-NEXT: call void @__kmpc_taskgroup(ptr @[[GLOB1]], i32 [[TMP2]])
1375 // ARRAY-NEXT: [[TMP6:%.*]] = call ptr @__kmpc_omp_task_alloc(ptr @[[GLOB1]], i32 [[TMP2]], i32 1, i64 96, i64 8, ptr @.omp_task_entry.)
1376 // ARRAY-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP6]], i32 0, i32 0
1377 // ARRAY-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP7]], i32 0, i32 0
1378 // ARRAY-NEXT: [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
1379 // ARRAY-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[TMP9]], ptr align 8 [[AGG_CAPTURED]], i64 8, i1 false)
1380 // ARRAY-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP6]], i32 0, i32 1
1381 // ARRAY-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP10]], i32 0, i32 0
1382 // ARRAY-NEXT: [[TMP12:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1383 // ARRAY-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 8
1384 // ARRAY-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP10]], i32 0, i32 1
1385 // ARRAY-NEXT: [[TMP14:%.*]] = load ptr, ptr [[S_ADDR]], align 8
1386 // ARRAY-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 8
1387 // ARRAY-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP7]], i32 0, i32 5
1388 // ARRAY-NEXT: store i64 0, ptr [[TMP15]], align 8
1389 // ARRAY-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP7]], i32 0, i32 6
1390 // ARRAY-NEXT: store i64 9, ptr [[TMP16]], align 8
1391 // ARRAY-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP7]], i32 0, i32 7
1392 // ARRAY-NEXT: store i64 1, ptr [[TMP17]], align 8
1393 // ARRAY-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP7]], i32 0, i32 9
1394 // ARRAY-NEXT: call void @llvm.memset.p0.i64(ptr align 8 [[TMP18]], i8 0, i64 8, i1 false)
1395 // ARRAY-NEXT: [[TMP19:%.*]] = load i64, ptr [[TMP17]], align 8
1396 // ARRAY-NEXT: call void @__kmpc_taskloop(ptr @[[GLOB1]], i32 [[TMP2]], ptr [[TMP6]], i32 1, ptr [[TMP15]], ptr [[TMP16]], i64 [[TMP19]], i32 1, i32 0, i64 0, ptr null)
1397 // ARRAY-NEXT: call void @__kmpc_end_taskgroup(ptr @[[GLOB1]], i32 [[TMP2]])
1398 // ARRAY-NEXT: call void @__kmpc_end_master(ptr @[[GLOB1]], i32 [[TMP2]])
1399 // ARRAY-NEXT: br label [[OMP_IF_END]]
1400 // ARRAY: omp_if.end:
1401 // ARRAY-NEXT: ret void
1402 //
1403 //
1404 // ARRAY-LABEL: define {{[^@]+}}@.omp_task_privates_map.
1405 // ARRAY-SAME: (ptr noalias noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]], ptr noalias noundef [[TMP2:%.*]]) #[[ATTR4:[0-9]+]] {
1406 // ARRAY-NEXT: entry:
1407 // ARRAY-NEXT: [[DOTADDR:%.*]] = alloca ptr, align 8
1408 // ARRAY-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
1409 // ARRAY-NEXT: [[DOTADDR2:%.*]] = alloca ptr, align 8
1410 // ARRAY-NEXT: store ptr [[TMP0]], ptr [[DOTADDR]], align 8
1411 // ARRAY-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1412 // ARRAY-NEXT: store ptr [[TMP2]], ptr [[DOTADDR2]], align 8
1413 // ARRAY-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR]], align 8
1414 // ARRAY-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T:%.*]], ptr [[TMP3]], i32 0, i32 0
1415 // ARRAY-NEXT: [[TMP5:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1416 // ARRAY-NEXT: store ptr [[TMP4]], ptr [[TMP5]], align 8
1417 // ARRAY-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT__KMP_PRIVATES_T]], ptr [[TMP3]], i32 0, i32 1
1418 // ARRAY-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTADDR2]], align 8
1419 // ARRAY-NEXT: store ptr [[TMP6]], ptr [[TMP7]], align 8
1420 // ARRAY-NEXT: ret void
1421 //
1422 //
1423 // ARRAY-LABEL: define {{[^@]+}}@.omp_task_entry.
1424 // ARRAY-SAME: (i32 noundef [[TMP0:%.*]], ptr noalias noundef [[TMP1:%.*]]) #[[ATTR5:[0-9]+]] {
1425 // ARRAY-NEXT: entry:
1426 // ARRAY-NEXT: [[DOTGLOBAL_TID__ADDR_I:%.*]] = alloca i32, align 4
1427 // ARRAY-NEXT: [[DOTPART_ID__ADDR_I:%.*]] = alloca ptr, align 8
1428 // ARRAY-NEXT: [[DOTPRIVATES__ADDR_I:%.*]] = alloca ptr, align 8
1429 // ARRAY-NEXT: [[DOTCOPY_FN__ADDR_I:%.*]] = alloca ptr, align 8
1430 // ARRAY-NEXT: [[DOTTASK_T__ADDR_I:%.*]] = alloca ptr, align 8
1431 // ARRAY-NEXT: [[DOTLB__ADDR_I:%.*]] = alloca i64, align 8
1432 // ARRAY-NEXT: [[DOTUB__ADDR_I:%.*]] = alloca i64, align 8
1433 // ARRAY-NEXT: [[DOTST__ADDR_I:%.*]] = alloca i64, align 8
1434 // ARRAY-NEXT: [[DOTLITER__ADDR_I:%.*]] = alloca i32, align 4
1435 // ARRAY-NEXT: [[DOTREDUCTIONS__ADDR_I:%.*]] = alloca ptr, align 8
1436 // ARRAY-NEXT: [[__CONTEXT_ADDR_I:%.*]] = alloca ptr, align 8
1437 // ARRAY-NEXT: [[DOTFIRSTPRIV_PTR_ADDR_I:%.*]] = alloca ptr, align 8
1438 // ARRAY-NEXT: [[DOTFIRSTPRIV_PTR_ADDR1_I:%.*]] = alloca ptr, align 8
1439 // ARRAY-NEXT: [[I_I:%.*]] = alloca i32, align 4
1440 // ARRAY-NEXT: [[DOTOMP_IV_I:%.*]] = alloca i32, align 4
1441 // ARRAY-NEXT: [[DOTADDR:%.*]] = alloca i32, align 4
1442 // ARRAY-NEXT: [[DOTADDR1:%.*]] = alloca ptr, align 8
1443 // ARRAY-NEXT: store i32 [[TMP0]], ptr [[DOTADDR]], align 4
1444 // ARRAY-NEXT: store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1445 // ARRAY-NEXT: [[TMP2:%.*]] = load i32, ptr [[DOTADDR]], align 4
1446 // ARRAY-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1447 // ARRAY-NEXT: [[TMP4:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES:%.*]], ptr [[TMP3]], i32 0, i32 0
1448 // ARRAY-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T:%.*]], ptr [[TMP4]], i32 0, i32 2
1449 // ARRAY-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 0
1450 // ARRAY-NEXT: [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
1451 // ARRAY-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T_WITH_PRIVATES]], ptr [[TMP3]], i32 0, i32 1
1452 // ARRAY-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 5
1453 // ARRAY-NEXT: [[TMP10:%.*]] = load i64, ptr [[TMP9]], align 8
1454 // ARRAY-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 6
1455 // ARRAY-NEXT: [[TMP12:%.*]] = load i64, ptr [[TMP11]], align 8
1456 // ARRAY-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 7
1457 // ARRAY-NEXT: [[TMP14:%.*]] = load i64, ptr [[TMP13]], align 8
1458 // ARRAY-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 8
1459 // ARRAY-NEXT: [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 8
1460 // ARRAY-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT_KMP_TASK_T]], ptr [[TMP4]], i32 0, i32 9
1461 // ARRAY-NEXT: [[TMP18:%.*]] = load ptr, ptr [[TMP17]], align 8
1462 // ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META3:![0-9]+]])
1463 // ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META6:![0-9]+]])
1464 // ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META8:![0-9]+]])
1465 // ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META10:![0-9]+]])
1466 // ARRAY-NEXT: call void @llvm.experimental.noalias.scope.decl(metadata [[META12:![0-9]+]])
1467 // ARRAY-NEXT: store i32 [[TMP2]], ptr [[DOTGLOBAL_TID__ADDR_I]], align 4, !noalias !14
1468 // ARRAY-NEXT: store ptr [[TMP5]], ptr [[DOTPART_ID__ADDR_I]], align 8, !noalias !14
1469 // ARRAY-NEXT: store ptr [[TMP8]], ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14
1470 // ARRAY-NEXT: store ptr @.omp_task_privates_map., ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14
1471 // ARRAY-NEXT: store ptr [[TMP3]], ptr [[DOTTASK_T__ADDR_I]], align 8, !noalias !14
1472 // ARRAY-NEXT: store i64 [[TMP10]], ptr [[DOTLB__ADDR_I]], align 8, !noalias !14
1473 // ARRAY-NEXT: store i64 [[TMP12]], ptr [[DOTUB__ADDR_I]], align 8, !noalias !14
1474 // ARRAY-NEXT: store i64 [[TMP14]], ptr [[DOTST__ADDR_I]], align 8, !noalias !14
1475 // ARRAY-NEXT: store i32 [[TMP16]], ptr [[DOTLITER__ADDR_I]], align 4, !noalias !14
1476 // ARRAY-NEXT: store ptr [[TMP18]], ptr [[DOTREDUCTIONS__ADDR_I]], align 8, !noalias !14
1477 // ARRAY-NEXT: store ptr [[TMP7]], ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !14
1478 // ARRAY-NEXT: [[TMP19:%.*]] = load ptr, ptr [[__CONTEXT_ADDR_I]], align 8, !noalias !14
1479 // ARRAY-NEXT: [[TMP20:%.*]] = load i64, ptr [[TMP19]], align 8
1480 // ARRAY-NEXT: [[TMP21:%.*]] = load ptr, ptr [[DOTCOPY_FN__ADDR_I]], align 8, !noalias !14
1481 // ARRAY-NEXT: [[TMP22:%.*]] = load ptr, ptr [[DOTPRIVATES__ADDR_I]], align 8, !noalias !14
1482 // ARRAY-NEXT: call void [[TMP21]](ptr [[TMP22]], ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]]) #[[ATTR2:[0-9]+]]
1483 // ARRAY-NEXT: [[TMP23:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR_I]], align 8, !noalias !14
1484 // ARRAY-NEXT: [[TMP24:%.*]] = load ptr, ptr [[DOTFIRSTPRIV_PTR_ADDR1_I]], align 8, !noalias !14
1485 // ARRAY-NEXT: [[TMP25:%.*]] = load i64, ptr [[DOTLB__ADDR_I]], align 8, !noalias !14
1486 // ARRAY-NEXT: [[CONV_I:%.*]] = trunc i64 [[TMP25]] to i32
1487 // ARRAY-NEXT: store i32 [[CONV_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1488 // ARRAY-NEXT: br label [[OMP_INNER_FOR_COND_I:%.*]]
1489 // ARRAY: omp.inner.for.cond.i:
1490 // ARRAY-NEXT: [[TMP26:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1491 // ARRAY-NEXT: [[CONV2_I:%.*]] = sext i32 [[TMP26]] to i64
1492 // ARRAY-NEXT: [[TMP27:%.*]] = load i64, ptr [[DOTUB__ADDR_I]], align 8, !noalias !14
1493 // ARRAY-NEXT: [[CMP_I:%.*]] = icmp ule i64 [[CONV2_I]], [[TMP27]]
1494 // ARRAY-NEXT: br i1 [[CMP_I]], label [[OMP_INNER_FOR_BODY_I:%.*]], label [[DOTOMP_OUTLINED__EXIT:%.*]]
1495 // ARRAY: omp.inner.for.body.i:
1496 // ARRAY-NEXT: [[TMP28:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1497 // ARRAY-NEXT: store i32 [[TMP28]], ptr [[I_I]], align 4, !noalias !14
1498 // ARRAY-NEXT: [[TMP29:%.*]] = load i32, ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1499 // ARRAY-NEXT: [[ADD3_I:%.*]] = add nsw i32 [[TMP29]], 1
1500 // ARRAY-NEXT: store i32 [[ADD3_I]], ptr [[DOTOMP_IV_I]], align 4, !noalias !14
1501 // ARRAY-NEXT: br label [[OMP_INNER_FOR_COND_I]]
1502 // ARRAY: .omp_outlined..exit:
1503 // ARRAY-NEXT: ret i32 0
1504 //
1505 //
1506 // SIMD-ONLY0-LABEL: define {{[^@]+}}@main
1507 // SIMD-ONLY0-SAME: () #[[ATTR0:[0-9]+]] {
1508 // SIMD-ONLY0-NEXT: entry:
1509 // SIMD-ONLY0-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1510 // SIMD-ONLY0-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1511 // SIMD-ONLY0-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S]], align 8
1512 // SIMD-ONLY0-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1513 // SIMD-ONLY0-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1514 // SIMD-ONLY0-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 16
1515 // SIMD-ONLY0-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 8
1516 // SIMD-ONLY0-NEXT: [[I:%.*]] = alloca i32, align 4
1517 // SIMD-ONLY0-NEXT: store i32 0, ptr [[RETVAL]], align 4
1518 // SIMD-ONLY0-NEXT: call void @_ZN1SIdEC1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]])
1519 // SIMD-ONLY0-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]], ptr noundef nonnull align 8 dereferenceable(8) [[TTT]], double noundef 0.000000e+00)
1520 // SIMD-ONLY0-NEXT: store i32 0, ptr [[T_VAR]], align 4
1521 // SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
1522 // SIMD-ONLY0-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
1523 // SIMD-ONLY0-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYINIT_BEGIN]], double noundef 1.000000e+00)
1524 // SIMD-ONLY0-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
1525 // SIMD-ONLY0-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYINIT_ELEMENT]], double noundef 2.000000e+00)
1526 // SIMD-ONLY0-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]], double noundef 3.000000e+00)
1527 // SIMD-ONLY0-NEXT: store i32 0, ptr [[I]], align 4
1528 // SIMD-ONLY0-NEXT: br label [[FOR_COND:%.*]]
1529 // SIMD-ONLY0: for.cond:
1530 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
1531 // SIMD-ONLY0-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
1532 // SIMD-ONLY0-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
1533 // SIMD-ONLY0: for.body:
1534 // SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1535 // SIMD-ONLY0-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 0
1536 // SIMD-ONLY0-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX]], align 4
1537 // SIMD-ONLY0-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
1538 // SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[ARRAYIDX1]], ptr align 8 [[VAR]], i64 8, i1 false)
1539 // SIMD-ONLY0-NEXT: store i32 33, ptr @_ZZ4mainE5sivar, align 4
1540 // SIMD-ONLY0-NEXT: br label [[FOR_INC:%.*]]
1541 // SIMD-ONLY0: for.inc:
1542 // SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
1543 // SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1544 // SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[I]], align 4
1545 // SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
1546 // SIMD-ONLY0: for.end:
1547 // SIMD-ONLY0-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1548 // SIMD-ONLY0-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
1549 // SIMD-ONLY0-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]]) #[[ATTR4:[0-9]+]]
1550 // SIMD-ONLY0-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1551 // SIMD-ONLY0-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
1552 // SIMD-ONLY0-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1553 // SIMD-ONLY0: arraydestroy.body:
1554 // SIMD-ONLY0-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1555 // SIMD-ONLY0-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1556 // SIMD-ONLY0-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1557 // SIMD-ONLY0-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1558 // SIMD-ONLY0-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1559 // SIMD-ONLY0: arraydestroy.done2:
1560 // SIMD-ONLY0-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]]) #[[ATTR4]]
1561 // SIMD-ONLY0-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]]) #[[ATTR4]]
1562 // SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load i32, ptr [[RETVAL]], align 4
1563 // SIMD-ONLY0-NEXT: ret i32 [[TMP4]]
1564 //
1565 //
1566 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ev
1567 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
1568 // SIMD-ONLY0-NEXT: entry:
1569 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1570 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1571 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1572 // SIMD-ONLY0-NEXT: call void @_ZN1SIdEC2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]])
1573 // SIMD-ONLY0-NEXT: ret void
1574 //
1575 //
1576 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC1ERKS0_d
1577 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1578 // SIMD-ONLY0-NEXT: entry:
1579 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1580 // SIMD-ONLY0-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
1581 // SIMD-ONLY0-NEXT: [[T_ADDR:%.*]] = alloca double, align 8
1582 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1583 // SIMD-ONLY0-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
1584 // SIMD-ONLY0-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
1585 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1586 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
1587 // SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load double, ptr [[T_ADDR]], align 8
1588 // SIMD-ONLY0-NEXT: call void @_ZN1SIdEC2ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP0]], double noundef [[TMP1]])
1589 // SIMD-ONLY0-NEXT: ret void
1590 //
1591 //
1592 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ed
1593 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1594 // SIMD-ONLY0-NEXT: entry:
1595 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1596 // SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca double, align 8
1597 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1598 // SIMD-ONLY0-NEXT: store double [[A]], ptr [[A_ADDR]], align 8
1599 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1600 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 8
1601 // SIMD-ONLY0-NEXT: call void @_ZN1SIdEC2Ed(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], double noundef [[TMP0]])
1602 // SIMD-ONLY0-NEXT: ret void
1603 //
1604 //
1605 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1606 // SIMD-ONLY0-SAME: () #[[ATTR3:[0-9]+]] {
1607 // SIMD-ONLY0-NEXT: entry:
1608 // SIMD-ONLY0-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1609 // SIMD-ONLY0-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1610 // SIMD-ONLY0-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0]], align 4
1611 // SIMD-ONLY0-NEXT: [[T_VAR:%.*]] = alloca i32, align 128
1612 // SIMD-ONLY0-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1613 // SIMD-ONLY0-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1614 // SIMD-ONLY0-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 4
1615 // SIMD-ONLY0-NEXT: [[I:%.*]] = alloca i32, align 4
1616 // SIMD-ONLY0-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]])
1617 // SIMD-ONLY0-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]], ptr noundef nonnull align 4 dereferenceable(4) [[TTT]], i32 noundef 0)
1618 // SIMD-ONLY0-NEXT: store i32 0, ptr [[T_VAR]], align 128
1619 // SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
1620 // SIMD-ONLY0-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
1621 // SIMD-ONLY0-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
1622 // SIMD-ONLY0-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
1623 // SIMD-ONLY0-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
1624 // SIMD-ONLY0-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3)
1625 // SIMD-ONLY0-NEXT: store i32 0, ptr [[I]], align 4
1626 // SIMD-ONLY0-NEXT: br label [[FOR_COND:%.*]]
1627 // SIMD-ONLY0: for.cond:
1628 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
1629 // SIMD-ONLY0-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
1630 // SIMD-ONLY0-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
1631 // SIMD-ONLY0: for.body:
1632 // SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 128
1633 // SIMD-ONLY0-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 0
1634 // SIMD-ONLY0-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX]], align 4
1635 // SIMD-ONLY0-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
1636 // SIMD-ONLY0-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX1]], ptr align 4 [[VAR]], i64 4, i1 false)
1637 // SIMD-ONLY0-NEXT: br label [[FOR_INC:%.*]]
1638 // SIMD-ONLY0: for.inc:
1639 // SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
1640 // SIMD-ONLY0-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1641 // SIMD-ONLY0-NEXT: store i32 [[INC]], ptr [[I]], align 4
1642 // SIMD-ONLY0-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1643 // SIMD-ONLY0: for.end:
1644 // SIMD-ONLY0-NEXT: store i32 0, ptr [[RETVAL]], align 4
1645 // SIMD-ONLY0-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1646 // SIMD-ONLY0-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1647 // SIMD-ONLY0-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1648 // SIMD-ONLY0-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1649 // SIMD-ONLY0: arraydestroy.body:
1650 // SIMD-ONLY0-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1651 // SIMD-ONLY0-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1652 // SIMD-ONLY0-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1653 // SIMD-ONLY0-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1654 // SIMD-ONLY0-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1655 // SIMD-ONLY0: arraydestroy.done2:
1656 // SIMD-ONLY0-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1657 // SIMD-ONLY0-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]]) #[[ATTR4]]
1658 // SIMD-ONLY0-NEXT: [[TMP4:%.*]] = load i32, ptr [[RETVAL]], align 4
1659 // SIMD-ONLY0-NEXT: ret i32 [[TMP4]]
1660 //
1661 //
1662 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdED1Ev
1663 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1664 // SIMD-ONLY0-NEXT: entry:
1665 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1666 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1667 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1668 // SIMD-ONLY0-NEXT: call void @_ZN1SIdED2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]]) #[[ATTR4]]
1669 // SIMD-ONLY0-NEXT: ret void
1670 //
1671 //
1672 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ev
1673 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1674 // SIMD-ONLY0-NEXT: entry:
1675 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1676 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1677 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1678 // SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1679 // SIMD-ONLY0-NEXT: store double 0.000000e+00, ptr [[F]], align 8
1680 // SIMD-ONLY0-NEXT: ret void
1681 //
1682 //
1683 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdED2Ev
1684 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1685 // SIMD-ONLY0-NEXT: entry:
1686 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1687 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1688 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1689 // SIMD-ONLY0-NEXT: ret void
1690 //
1691 //
1692 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC2ERKS0_d
1693 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1694 // SIMD-ONLY0-NEXT: entry:
1695 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1696 // SIMD-ONLY0-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
1697 // SIMD-ONLY0-NEXT: [[T_ADDR:%.*]] = alloca double, align 8
1698 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1699 // SIMD-ONLY0-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
1700 // SIMD-ONLY0-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
1701 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1702 // SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1703 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
1704 // SIMD-ONLY0-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 0
1705 // SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 8
1706 // SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 8
1707 // SIMD-ONLY0-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[TMP2]]
1708 // SIMD-ONLY0-NEXT: store double [[ADD]], ptr [[F]], align 8
1709 // SIMD-ONLY0-NEXT: ret void
1710 //
1711 //
1712 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ed
1713 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1714 // SIMD-ONLY0-NEXT: entry:
1715 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1716 // SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca double, align 8
1717 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1718 // SIMD-ONLY0-NEXT: store double [[A]], ptr [[A_ADDR]], align 8
1719 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1720 // SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1721 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 8
1722 // SIMD-ONLY0-NEXT: store double [[TMP0]], ptr [[F]], align 8
1723 // SIMD-ONLY0-NEXT: ret void
1724 //
1725 //
1726 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1727 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1728 // SIMD-ONLY0-NEXT: entry:
1729 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1730 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1731 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1732 // SIMD-ONLY0-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1733 // SIMD-ONLY0-NEXT: ret void
1734 //
1735 //
1736 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_i
1737 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1738 // SIMD-ONLY0-NEXT: entry:
1739 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1740 // SIMD-ONLY0-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
1741 // SIMD-ONLY0-NEXT: [[T_ADDR:%.*]] = alloca i32, align 4
1742 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1743 // SIMD-ONLY0-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
1744 // SIMD-ONLY0-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
1745 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1746 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
1747 // SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_ADDR]], align 4
1748 // SIMD-ONLY0-NEXT: call void @_ZN1SIiEC2ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], i32 noundef [[TMP1]])
1749 // SIMD-ONLY0-NEXT: ret void
1750 //
1751 //
1752 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1753 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1754 // SIMD-ONLY0-NEXT: entry:
1755 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1756 // SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1757 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1758 // SIMD-ONLY0-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1759 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1760 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1761 // SIMD-ONLY0-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
1762 // SIMD-ONLY0-NEXT: ret void
1763 //
1764 //
1765 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1766 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1767 // SIMD-ONLY0-NEXT: entry:
1768 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1769 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1770 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1771 // SIMD-ONLY0-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1772 // SIMD-ONLY0-NEXT: ret void
1773 //
1774 //
1775 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1776 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1777 // SIMD-ONLY0-NEXT: entry:
1778 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1779 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1780 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1781 // SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1782 // SIMD-ONLY0-NEXT: store i32 0, ptr [[F]], align 4
1783 // SIMD-ONLY0-NEXT: ret void
1784 //
1785 //
1786 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_i
1787 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1788 // SIMD-ONLY0-NEXT: entry:
1789 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1790 // SIMD-ONLY0-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
1791 // SIMD-ONLY0-NEXT: [[T_ADDR:%.*]] = alloca i32, align 4
1792 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1793 // SIMD-ONLY0-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
1794 // SIMD-ONLY0-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
1795 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1796 // SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1797 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
1798 // SIMD-ONLY0-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 0
1799 // SIMD-ONLY0-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 4
1800 // SIMD-ONLY0-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 4
1801 // SIMD-ONLY0-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
1802 // SIMD-ONLY0-NEXT: store i32 [[ADD]], ptr [[F]], align 4
1803 // SIMD-ONLY0-NEXT: ret void
1804 //
1805 //
1806 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1807 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1808 // SIMD-ONLY0-NEXT: entry:
1809 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1810 // SIMD-ONLY0-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1811 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1812 // SIMD-ONLY0-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1813 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1814 // SIMD-ONLY0-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1815 // SIMD-ONLY0-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1816 // SIMD-ONLY0-NEXT: store i32 [[TMP0]], ptr [[F]], align 4
1817 // SIMD-ONLY0-NEXT: ret void
1818 //
1819 //
1820 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1821 // SIMD-ONLY0-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1822 // SIMD-ONLY0-NEXT: entry:
1823 // SIMD-ONLY0-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1824 // SIMD-ONLY0-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1825 // SIMD-ONLY0-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1826 // SIMD-ONLY0-NEXT: ret void
1827 //
1828 //
1829 // SIMD-ONLY1-LABEL: define {{[^@]+}}@main
1830 // SIMD-ONLY1-SAME: () #[[ATTR0:[0-9]+]] {
1831 // SIMD-ONLY1-NEXT: entry:
1832 // SIMD-ONLY1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1833 // SIMD-ONLY1-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S:%.*]], align 8
1834 // SIMD-ONLY1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S]], align 8
1835 // SIMD-ONLY1-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1836 // SIMD-ONLY1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1837 // SIMD-ONLY1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 16
1838 // SIMD-ONLY1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S]], align 8
1839 // SIMD-ONLY1-NEXT: [[I:%.*]] = alloca i32, align 4
1840 // SIMD-ONLY1-NEXT: store i32 0, ptr [[RETVAL]], align 4
1841 // SIMD-ONLY1-NEXT: call void @_ZN1SIdEC1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]])
1842 // SIMD-ONLY1-NEXT: call void @_ZN1SIdEC1ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]], ptr noundef nonnull align 8 dereferenceable(8) [[TTT]], double noundef 0.000000e+00)
1843 // SIMD-ONLY1-NEXT: store i32 0, ptr [[T_VAR]], align 4
1844 // SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
1845 // SIMD-ONLY1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
1846 // SIMD-ONLY1-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYINIT_BEGIN]], double noundef 1.000000e+00)
1847 // SIMD-ONLY1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
1848 // SIMD-ONLY1-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYINIT_ELEMENT]], double noundef 2.000000e+00)
1849 // SIMD-ONLY1-NEXT: call void @_ZN1SIdEC1Ed(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]], double noundef 3.000000e+00)
1850 // SIMD-ONLY1-NEXT: store i32 0, ptr [[I]], align 4
1851 // SIMD-ONLY1-NEXT: br label [[FOR_COND:%.*]]
1852 // SIMD-ONLY1: for.cond:
1853 // SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
1854 // SIMD-ONLY1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
1855 // SIMD-ONLY1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
1856 // SIMD-ONLY1: for.body:
1857 // SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1858 // SIMD-ONLY1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 0
1859 // SIMD-ONLY1-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX]], align 4
1860 // SIMD-ONLY1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
1861 // SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 16 [[ARRAYIDX1]], ptr align 8 [[VAR]], i64 8, i1 false)
1862 // SIMD-ONLY1-NEXT: store i32 33, ptr @_ZZ4mainE5sivar, align 4
1863 // SIMD-ONLY1-NEXT: br label [[FOR_INC:%.*]]
1864 // SIMD-ONLY1: for.inc:
1865 // SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
1866 // SIMD-ONLY1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1867 // SIMD-ONLY1-NEXT: store i32 [[INC]], ptr [[I]], align 4
1868 // SIMD-ONLY1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
1869 // SIMD-ONLY1: for.end:
1870 // SIMD-ONLY1-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1871 // SIMD-ONLY1-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
1872 // SIMD-ONLY1-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[VAR]]) #[[ATTR4:[0-9]+]]
1873 // SIMD-ONLY1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1874 // SIMD-ONLY1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
1875 // SIMD-ONLY1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1876 // SIMD-ONLY1: arraydestroy.body:
1877 // SIMD-ONLY1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1878 // SIMD-ONLY1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1879 // SIMD-ONLY1-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1880 // SIMD-ONLY1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1881 // SIMD-ONLY1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1882 // SIMD-ONLY1: arraydestroy.done2:
1883 // SIMD-ONLY1-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TEST]]) #[[ATTR4]]
1884 // SIMD-ONLY1-NEXT: call void @_ZN1SIdED1Ev(ptr noundef nonnull align 8 dereferenceable(8) [[TTT]]) #[[ATTR4]]
1885 // SIMD-ONLY1-NEXT: [[TMP4:%.*]] = load i32, ptr [[RETVAL]], align 4
1886 // SIMD-ONLY1-NEXT: ret i32 [[TMP4]]
1887 //
1888 //
1889 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ev
1890 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] align 2 {
1891 // SIMD-ONLY1-NEXT: entry:
1892 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1893 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1894 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1895 // SIMD-ONLY1-NEXT: call void @_ZN1SIdEC2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]])
1896 // SIMD-ONLY1-NEXT: ret void
1897 //
1898 //
1899 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC1ERKS0_d
1900 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1901 // SIMD-ONLY1-NEXT: entry:
1902 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1903 // SIMD-ONLY1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
1904 // SIMD-ONLY1-NEXT: [[T_ADDR:%.*]] = alloca double, align 8
1905 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1906 // SIMD-ONLY1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
1907 // SIMD-ONLY1-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
1908 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1909 // SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
1910 // SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load double, ptr [[T_ADDR]], align 8
1911 // SIMD-ONLY1-NEXT: call void @_ZN1SIdEC2ERKS0_d(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], ptr noundef nonnull align 8 dereferenceable(8) [[TMP0]], double noundef [[TMP1]])
1912 // SIMD-ONLY1-NEXT: ret void
1913 //
1914 //
1915 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC1Ed
1916 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1917 // SIMD-ONLY1-NEXT: entry:
1918 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1919 // SIMD-ONLY1-NEXT: [[A_ADDR:%.*]] = alloca double, align 8
1920 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1921 // SIMD-ONLY1-NEXT: store double [[A]], ptr [[A_ADDR]], align 8
1922 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1923 // SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 8
1924 // SIMD-ONLY1-NEXT: call void @_ZN1SIdEC2Ed(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]], double noundef [[TMP0]])
1925 // SIMD-ONLY1-NEXT: ret void
1926 //
1927 //
1928 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1929 // SIMD-ONLY1-SAME: () #[[ATTR3:[0-9]+]] {
1930 // SIMD-ONLY1-NEXT: entry:
1931 // SIMD-ONLY1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1932 // SIMD-ONLY1-NEXT: [[TTT:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1933 // SIMD-ONLY1-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0]], align 4
1934 // SIMD-ONLY1-NEXT: [[T_VAR:%.*]] = alloca i32, align 128
1935 // SIMD-ONLY1-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1936 // SIMD-ONLY1-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1937 // SIMD-ONLY1-NEXT: [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 4
1938 // SIMD-ONLY1-NEXT: [[I:%.*]] = alloca i32, align 4
1939 // SIMD-ONLY1-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]])
1940 // SIMD-ONLY1-NEXT: call void @_ZN1SIiEC1ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]], ptr noundef nonnull align 4 dereferenceable(4) [[TTT]], i32 noundef 0)
1941 // SIMD-ONLY1-NEXT: store i32 0, ptr [[T_VAR]], align 128
1942 // SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
1943 // SIMD-ONLY1-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
1944 // SIMD-ONLY1-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
1945 // SIMD-ONLY1-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
1946 // SIMD-ONLY1-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
1947 // SIMD-ONLY1-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3)
1948 // SIMD-ONLY1-NEXT: store i32 0, ptr [[I]], align 4
1949 // SIMD-ONLY1-NEXT: br label [[FOR_COND:%.*]]
1950 // SIMD-ONLY1: for.cond:
1951 // SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
1952 // SIMD-ONLY1-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
1953 // SIMD-ONLY1-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
1954 // SIMD-ONLY1: for.body:
1955 // SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 128
1956 // SIMD-ONLY1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC]], i64 0, i64 0
1957 // SIMD-ONLY1-NEXT: store i32 [[TMP1]], ptr [[ARRAYIDX]], align 4
1958 // SIMD-ONLY1-NEXT: [[ARRAYIDX1:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
1959 // SIMD-ONLY1-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX1]], ptr align 4 [[VAR]], i64 4, i1 false)
1960 // SIMD-ONLY1-NEXT: br label [[FOR_INC:%.*]]
1961 // SIMD-ONLY1: for.inc:
1962 // SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
1963 // SIMD-ONLY1-NEXT: [[INC:%.*]] = add nsw i32 [[TMP2]], 1
1964 // SIMD-ONLY1-NEXT: store i32 [[INC]], ptr [[I]], align 4
1965 // SIMD-ONLY1-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
1966 // SIMD-ONLY1: for.end:
1967 // SIMD-ONLY1-NEXT: store i32 0, ptr [[RETVAL]], align 4
1968 // SIMD-ONLY1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR4]]
1969 // SIMD-ONLY1-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1970 // SIMD-ONLY1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1971 // SIMD-ONLY1-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1972 // SIMD-ONLY1: arraydestroy.body:
1973 // SIMD-ONLY1-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP3]], [[FOR_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1974 // SIMD-ONLY1-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1975 // SIMD-ONLY1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1976 // SIMD-ONLY1-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1977 // SIMD-ONLY1-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1978 // SIMD-ONLY1: arraydestroy.done2:
1979 // SIMD-ONLY1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1980 // SIMD-ONLY1-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TTT]]) #[[ATTR4]]
1981 // SIMD-ONLY1-NEXT: [[TMP4:%.*]] = load i32, ptr [[RETVAL]], align 4
1982 // SIMD-ONLY1-NEXT: ret i32 [[TMP4]]
1983 //
1984 //
1985 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdED1Ev
1986 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1987 // SIMD-ONLY1-NEXT: entry:
1988 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1989 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1990 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1991 // SIMD-ONLY1-NEXT: call void @_ZN1SIdED2Ev(ptr noundef nonnull align 8 dereferenceable(8) [[THIS1]]) #[[ATTR4]]
1992 // SIMD-ONLY1-NEXT: ret void
1993 //
1994 //
1995 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ev
1996 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
1997 // SIMD-ONLY1-NEXT: entry:
1998 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1999 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2000 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2001 // SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2002 // SIMD-ONLY1-NEXT: store double 0.000000e+00, ptr [[F]], align 8
2003 // SIMD-ONLY1-NEXT: ret void
2004 //
2005 //
2006 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdED2Ev
2007 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2008 // SIMD-ONLY1-NEXT: entry:
2009 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2010 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2011 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2012 // SIMD-ONLY1-NEXT: ret void
2013 //
2014 //
2015 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC2ERKS0_d
2016 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], ptr noundef nonnull align 8 dereferenceable(8) [[S:%.*]], double noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2017 // SIMD-ONLY1-NEXT: entry:
2018 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2019 // SIMD-ONLY1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
2020 // SIMD-ONLY1-NEXT: [[T_ADDR:%.*]] = alloca double, align 8
2021 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2022 // SIMD-ONLY1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
2023 // SIMD-ONLY1-NEXT: store double [[T]], ptr [[T_ADDR]], align 8
2024 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2025 // SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2026 // SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
2027 // SIMD-ONLY1-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[TMP0]], i32 0, i32 0
2028 // SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load double, ptr [[F2]], align 8
2029 // SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load double, ptr [[T_ADDR]], align 8
2030 // SIMD-ONLY1-NEXT: [[ADD:%.*]] = fadd double [[TMP1]], [[TMP2]]
2031 // SIMD-ONLY1-NEXT: store double [[ADD]], ptr [[F]], align 8
2032 // SIMD-ONLY1-NEXT: ret void
2033 //
2034 //
2035 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIdEC2Ed
2036 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 8 dereferenceable(8) [[THIS:%.*]], double noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2037 // SIMD-ONLY1-NEXT: entry:
2038 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2039 // SIMD-ONLY1-NEXT: [[A_ADDR:%.*]] = alloca double, align 8
2040 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2041 // SIMD-ONLY1-NEXT: store double [[A]], ptr [[A_ADDR]], align 8
2042 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2043 // SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
2044 // SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load double, ptr [[A_ADDR]], align 8
2045 // SIMD-ONLY1-NEXT: store double [[TMP0]], ptr [[F]], align 8
2046 // SIMD-ONLY1-NEXT: ret void
2047 //
2048 //
2049 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
2050 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2051 // SIMD-ONLY1-NEXT: entry:
2052 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2053 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2054 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2055 // SIMD-ONLY1-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
2056 // SIMD-ONLY1-NEXT: ret void
2057 //
2058 //
2059 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC1ERKS0_i
2060 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2061 // SIMD-ONLY1-NEXT: entry:
2062 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2063 // SIMD-ONLY1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
2064 // SIMD-ONLY1-NEXT: [[T_ADDR:%.*]] = alloca i32, align 4
2065 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2066 // SIMD-ONLY1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
2067 // SIMD-ONLY1-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
2068 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2069 // SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
2070 // SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_ADDR]], align 4
2071 // SIMD-ONLY1-NEXT: call void @_ZN1SIiEC2ERKS0_i(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]], i32 noundef [[TMP1]])
2072 // SIMD-ONLY1-NEXT: ret void
2073 //
2074 //
2075 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
2076 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2077 // SIMD-ONLY1-NEXT: entry:
2078 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2079 // SIMD-ONLY1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2080 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2081 // SIMD-ONLY1-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
2082 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2083 // SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2084 // SIMD-ONLY1-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
2085 // SIMD-ONLY1-NEXT: ret void
2086 //
2087 //
2088 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
2089 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2090 // SIMD-ONLY1-NEXT: entry:
2091 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2092 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2093 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2094 // SIMD-ONLY1-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
2095 // SIMD-ONLY1-NEXT: ret void
2096 //
2097 //
2098 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
2099 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2100 // SIMD-ONLY1-NEXT: entry:
2101 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2102 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2103 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2104 // SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2105 // SIMD-ONLY1-NEXT: store i32 0, ptr [[F]], align 4
2106 // SIMD-ONLY1-NEXT: ret void
2107 //
2108 //
2109 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC2ERKS0_i
2110 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[S:%.*]], i32 noundef [[T:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2111 // SIMD-ONLY1-NEXT: entry:
2112 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2113 // SIMD-ONLY1-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
2114 // SIMD-ONLY1-NEXT: [[T_ADDR:%.*]] = alloca i32, align 4
2115 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2116 // SIMD-ONLY1-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
2117 // SIMD-ONLY1-NEXT: store i32 [[T]], ptr [[T_ADDR]], align 4
2118 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2119 // SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2120 // SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[S_ADDR]], align 8
2121 // SIMD-ONLY1-NEXT: [[F2:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[TMP0]], i32 0, i32 0
2122 // SIMD-ONLY1-NEXT: [[TMP1:%.*]] = load i32, ptr [[F2]], align 4
2123 // SIMD-ONLY1-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_ADDR]], align 4
2124 // SIMD-ONLY1-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP1]], [[TMP2]]
2125 // SIMD-ONLY1-NEXT: store i32 [[ADD]], ptr [[F]], align 4
2126 // SIMD-ONLY1-NEXT: ret void
2127 //
2128 //
2129 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
2130 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2131 // SIMD-ONLY1-NEXT: entry:
2132 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2133 // SIMD-ONLY1-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
2134 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2135 // SIMD-ONLY1-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
2136 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2137 // SIMD-ONLY1-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
2138 // SIMD-ONLY1-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2139 // SIMD-ONLY1-NEXT: store i32 [[TMP0]], ptr [[F]], align 4
2140 // SIMD-ONLY1-NEXT: ret void
2141 //
2142 //
2143 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
2144 // SIMD-ONLY1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] align 2 {
2145 // SIMD-ONLY1-NEXT: entry:
2146 // SIMD-ONLY1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
2147 // SIMD-ONLY1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2148 // SIMD-ONLY1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2149 // SIMD-ONLY1-NEXT: ret void
2150 //
2151 //
2152 // SIMD-ONLY2-LABEL: define {{[^@]+}}@main
2153 // SIMD-ONLY2-SAME: () #[[ATTR0:[0-9]+]] {
2154 // SIMD-ONLY2-NEXT: entry:
2155 // SIMD-ONLY2-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2156 // SIMD-ONLY2-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
2157 // SIMD-ONLY2-NEXT: store i32 0, ptr [[RETVAL]], align 4
2158 // SIMD-ONLY2-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
2159 // SIMD-ONLY2-NEXT: ret i32 0
2160 //
2161 //
2162 // SIMD-ONLY3-LABEL: define {{[^@]+}}@main
2163 // SIMD-ONLY3-SAME: () #[[ATTR1:[0-9]+]] {
2164 // SIMD-ONLY3-NEXT: entry:
2165 // SIMD-ONLY3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2166 // SIMD-ONLY3-NEXT: store i32 0, ptr [[RETVAL]], align 4
2167 // SIMD-ONLY3-NEXT: [[TMP0:%.*]] = load ptr, ptr getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr @__block_literal_global, i32 0, i32 3), align 8
2168 // SIMD-ONLY3-NEXT: call void [[TMP0]](ptr noundef @__block_literal_global)
2169 // SIMD-ONLY3-NEXT: ret i32 0
2170 //
2171 //
2172 // SIMD-ONLY3-LABEL: define {{[^@]+}}@__main_block_invoke
2173 // SIMD-ONLY3-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2:[0-9]+]] {
2174 // SIMD-ONLY3-NEXT: entry:
2175 // SIMD-ONLY3-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
2176 // SIMD-ONLY3-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
2177 // SIMD-ONLY3-NEXT: [[I:%.*]] = alloca i32, align 4
2178 // SIMD-ONLY3-NEXT: [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, double, i32 }>, align 8
2179 // SIMD-ONLY3-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2180 // SIMD-ONLY3-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
2181 // SIMD-ONLY3-NEXT: store i32 0, ptr [[I]], align 4
2182 // SIMD-ONLY3-NEXT: br label [[FOR_COND:%.*]]
2183 // SIMD-ONLY3: for.cond:
2184 // SIMD-ONLY3-NEXT: [[TMP0:%.*]] = load i32, ptr [[I]], align 4
2185 // SIMD-ONLY3-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP0]], 10
2186 // SIMD-ONLY3-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
2187 // SIMD-ONLY3: for.body:
2188 // SIMD-ONLY3-NEXT: store double 1.000000e+00, ptr @g, align 8
2189 // SIMD-ONLY3-NEXT: store i32 11, ptr @_ZZ4mainE5sivar, align 4
2190 // SIMD-ONLY3-NEXT: [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 0
2191 // SIMD-ONLY3-NEXT: store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8
2192 // SIMD-ONLY3-NEXT: [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 1
2193 // SIMD-ONLY3-NEXT: store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8
2194 // SIMD-ONLY3-NEXT: [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 2
2195 // SIMD-ONLY3-NEXT: store i32 0, ptr [[BLOCK_RESERVED]], align 4
2196 // SIMD-ONLY3-NEXT: [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 3
2197 // SIMD-ONLY3-NEXT: store ptr @__main_block_invoke_2, ptr [[BLOCK_INVOKE]], align 8
2198 // SIMD-ONLY3-NEXT: [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 4
2199 // SIMD-ONLY3-NEXT: store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 8
2200 // SIMD-ONLY3-NEXT: [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 5
2201 // SIMD-ONLY3-NEXT: [[TMP1:%.*]] = load volatile double, ptr @g, align 8
2202 // SIMD-ONLY3-NEXT: store volatile double [[TMP1]], ptr [[BLOCK_CAPTURED]], align 8
2203 // SIMD-ONLY3-NEXT: [[BLOCK_CAPTURED1:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[BLOCK]], i32 0, i32 6
2204 // SIMD-ONLY3-NEXT: [[TMP2:%.*]] = load i32, ptr @_ZZ4mainE5sivar, align 4
2205 // SIMD-ONLY3-NEXT: store i32 [[TMP2]], ptr [[BLOCK_CAPTURED1]], align 8
2206 // SIMD-ONLY3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
2207 // SIMD-ONLY3-NEXT: [[TMP4:%.*]] = load ptr, ptr [[TMP3]], align 8
2208 // SIMD-ONLY3-NEXT: call void [[TMP4]](ptr noundef [[BLOCK]])
2209 // SIMD-ONLY3-NEXT: br label [[FOR_INC:%.*]]
2210 // SIMD-ONLY3: for.inc:
2211 // SIMD-ONLY3-NEXT: [[TMP5:%.*]] = load i32, ptr [[I]], align 4
2212 // SIMD-ONLY3-NEXT: [[INC:%.*]] = add nsw i32 [[TMP5]], 1
2213 // SIMD-ONLY3-NEXT: store i32 [[INC]], ptr [[I]], align 4
2214 // SIMD-ONLY3-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
2215 // SIMD-ONLY3: for.end:
2216 // SIMD-ONLY3-NEXT: ret void
2217 //
2218 //
2219 // SIMD-ONLY3-LABEL: define {{[^@]+}}@__main_block_invoke_2
2220 // SIMD-ONLY3-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR2]] {
2221 // SIMD-ONLY3-NEXT: entry:
2222 // SIMD-ONLY3-NEXT: [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
2223 // SIMD-ONLY3-NEXT: [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
2224 // SIMD-ONLY3-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2225 // SIMD-ONLY3-NEXT: store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
2226 // SIMD-ONLY3-NEXT: [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 5
2227 // SIMD-ONLY3-NEXT: store double 2.000000e+00, ptr [[BLOCK_CAPTURE_ADDR]], align 8
2228 // SIMD-ONLY3-NEXT: [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, double, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
2229 // SIMD-ONLY3-NEXT: store i32 22, ptr [[BLOCK_CAPTURE_ADDR1]], align 8
2230 // SIMD-ONLY3-NEXT: ret void
2231 //
2232 //
2233 // SIMD-ONLY4-LABEL: define {{[^@]+}}@_Z10array_funciPfP2St
2234 // SIMD-ONLY4-SAME: (i32 noundef [[N:%.*]], ptr noundef [[A:%.*]], ptr noundef [[S:%.*]]) #[[ATTR0:[0-9]+]] {
2235 // SIMD-ONLY4-NEXT: entry:
2236 // SIMD-ONLY4-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2237 // SIMD-ONLY4-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
2238 // SIMD-ONLY4-NEXT: [[S_ADDR:%.*]] = alloca ptr, align 8
2239 // SIMD-ONLY4-NEXT: [[I:%.*]] = alloca i32, align 4
2240 // SIMD-ONLY4-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
2241 // SIMD-ONLY4-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
2242 // SIMD-ONLY4-NEXT: store ptr [[S]], ptr [[S_ADDR]], align 8
2243 // SIMD-ONLY4-NEXT: [[TMP0:%.*]] = load i32, ptr [[N_ADDR]], align 4
2244 // SIMD-ONLY4-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
2245 // SIMD-ONLY4-NEXT: store i32 0, ptr [[I]], align 4
2246 // SIMD-ONLY4-NEXT: br label [[FOR_COND:%.*]]
2247 // SIMD-ONLY4: for.cond:
2248 // SIMD-ONLY4-NEXT: [[TMP2:%.*]] = load i32, ptr [[I]], align 4
2249 // SIMD-ONLY4-NEXT: [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
2250 // SIMD-ONLY4-NEXT: br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
2251 // SIMD-ONLY4: for.body:
2252 // SIMD-ONLY4-NEXT: br label [[FOR_INC:%.*]]
2253 // SIMD-ONLY4: for.inc:
2254 // SIMD-ONLY4-NEXT: [[TMP3:%.*]] = load i32, ptr [[I]], align 4
2255 // SIMD-ONLY4-NEXT: [[INC:%.*]] = add nsw i32 [[TMP3]], 1
2256 // SIMD-ONLY4-NEXT: store i32 [[INC]], ptr [[I]], align 4
2257 // SIMD-ONLY4-NEXT: br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
2258 // SIMD-ONLY4: for.end:
2259 // SIMD-ONLY4-NEXT: ret void
2260 //
LLVM monorepo