clang/test/OpenMP/parallel_reduction_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -fopenmp -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
   6 // RUN: %clang_cc1 -verify -fopenmp -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK4
   7
   8 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
   9 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple x86_64-apple-darwin10 -emit-pch -o %t %s
  10 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple x86_64-apple-darwin10 -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  11 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -DLAMBDA -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  12 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -fblocks -DBLOCKS -triple x86_64-apple-darwin10 -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  13 // expected-no-diagnostics
  14 #ifndef HEADER
  15 #define HEADER
  16
  17 volatile int g __attribute__((aligned(128))) = 1212;
  18
  19 template <class T>
  20 struct S {
  21   T f;
  22   S(T a) : f(a + g) {}
  23   S() : f(g) {}
  24   operator T() { return T(); }
  25   S &operator&(const S &) { return *this; }
  26   ~S() {}
  27 };
  28
  29 struct SS {
  30   int a;
  31   int b : 4;
  32   int &c;
  33   SS(int &d) : a(0), b(0), c(d) {
  34 #pragma omp parallel reduction(default, +: a, b, c)
  35 #ifdef LAMBDA
  36     [&]() {
  37       ++this->a, --b, (this)->c /= 1;
  38 #pragma omp parallel reduction(&: a, b, c)
  39       ++(this)->a, --b, this->c /= 1;
  40     }();
  41 #elif defined(BLOCKS)
  42     ^{
  43       ++a;
  44       --this->b;
  45       (this)->c /= 1;
  46 #pragma omp parallel reduction(-: a, b, c)
  47       ++(this)->a, --b, this->c /= 1;
  48     }();
  49 #else
  50     ++this->a, --b, c /= 1;
  51 #endif
  52   }
  53 };
  54
  55 template<typename T>
  56 struct SST {
  57   T a;
  58   SST() : a(T()) {
  59 #pragma omp parallel reduction(*: a)
  60 #ifdef LAMBDA
  61     [&]() {
  62       [&]() {
  63         ++this->a;
  64 #pragma omp parallel reduction(&& :a)
  65         ++(this)->a;
  66       }();
  67     }();
  68 #elif defined(BLOCKS)
  69     ^{
  70       ^{
  71         ++a;
  72 #pragma omp parallel reduction(|: a)
  73         ++(this)->a;
  74       }();
  75     }();
  76 #else
  77     ++(this)->a;
  78 #endif
  79   }
  80 };
  81
  82
  83 void foo_array_sect(short x[1]) {
  84 #pragma omp parallel reduction(default, + : x[:])
  85   {}
  86 }
  87
  88 template <typename T>
  89 T tmain() {
  90   T t;
  91   S<T> test;
  92   SST<T> sst;
  93   T t_var __attribute__((aligned(128))) = T(), t_var1 __attribute__((aligned(128)));
  94   T vec[] = {1, 2};
  95   S<T> s_arr[]  = {1, 2};
  96   S<T> var __attribute__((aligned(128))) (3), var1 __attribute__((aligned(128)));
  97 #pragma omp parallel reduction(+:t_var) reduction(&:var) reduction(&& : var1) reduction(min: t_var1)
  98   {
  99     vec[0] = t_var;
 100     s_arr[0] = var;
 101   }
 102   return T();
 103 }
 104
 105 int sivar;
 106 int main() {
 107   SS ss(sivar);
 108 #ifdef LAMBDA
 109   [&]() {
 110 #pragma omp parallel reduction(+:g)
 111   {
 112
 113
 114
 115
 116     // Reduction list for runtime.
 117
 118     g = 1;
 119
 120     [&]() {
 121       g = 2;
 122     }();
 123   }
 124   }();
 125   return 0;
 126 #elif defined(BLOCKS)
 127   ^{
 128 #pragma omp parallel reduction(-:g)
 129   {
 130
 131     // Reduction list for runtime.
 132
 133     g = 1;
 134
 135     ^{
 136       g = 2;
 137     }();
 138   }
 139   }();
 140   return 0;
 141
 142
 143 #else
 144   S<float> test;
 145   float t_var = 0, t_var1;
 146   int vec[] = {1, 2};
 147   S<float> s_arr[] = {1, 2};
 148   S<float> var(3), var1;
 149   float _Complex cf;
 150 #pragma omp parallel reduction(+:t_var) reduction(&:var) reduction(&& : var1) reduction(min: t_var1)
 151   {
 152     vec[0] = t_var;
 153     s_arr[0] = var;
 154   }
 155   if (var1)
 156 #pragma omp parallel reduction(+ : t_var) reduction(& : var) reduction(&& : var1) reduction(min : t_var1)
 157     while (1) {
 158       vec[0] = t_var;
 159       s_arr[0] = var;
 160     }
 161 #pragma omp parallel reduction(+ : cf)
 162     ;
 163   return tmain<int>();
 164 #endif
 165 }
 166
 167
 168 // Reduction list for runtime.
 169
 170
 171
 172 // For + reduction operation initial value of private variable is 0.
 173
 174 // For & reduction operation initial value of private variable is ones in all bits.
 175
 176 // For && reduction operation initial value of private variable is 1.0.
 177
 178 // For min reduction operation initial value of private variable is largest repesentable value.
 179
 180 // Skip checks for internal operations.
 181
 182 // ptr RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};
 183
 184
 185 // res = __kmpc_reduce_nowait(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>);
 186
 187
 188 // switch(res)
 189
 190 // case 1:
 191 // t_var += t_var_reduction;
 192
 193 // var = var.operator &(var_reduction);
 194
 195 // var1 = var1.operator &&(var1_reduction);
 196
 197 // t_var1 = min(t_var1, t_var1_reduction);
 198
 199 // __kmpc_end_reduce_nowait(<loc>, <gtid>, &<lock>);
 200
 201 // break;
 202
 203 // case 2:
 204 // t_var += t_var_reduction;
 205
 206 // var = var.operator &(var_reduction);
 207
 208 // var1 = var1.operator &&(var1_reduction);
 209
 210 // t_var1 = min(t_var1, t_var1_reduction);
 211
 212 // break;
 213
 214
 215 // void reduce_func(ptr lhs[<n>], ptr rhs[<n>]) {
 216 //  *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]);
 217 //  ...
 218 //  *(Type<n>-1*)lhs[<n>-1] = ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1],
 219 //  *(Type<n>-1*)rhs[<n>-1]);
 220 // }
 221 // t_var_lhs = (ptr)lhs[0];
 222 // t_var_rhs = (ptr)rhs[0];
 223
 224 // var_lhs = (Sptr)lhs[1];
 225 // var_rhs = (Sptr)rhs[1];
 226
 227 // var1_lhs = (Sptr)lhs[2];
 228 // var1_rhs = (Sptr)rhs[2];
 229
 230 // t_var1_lhs = (ptr)lhs[3];
 231 // t_var1_rhs = (ptr)rhs[3];
 232
 233 // t_var_lhs += t_var_rhs;
 234
 235 // var_lhs = var_lhs.operator &(var_rhs);
 236
 237 // var1_lhs = var1_lhs.operator &&(var1_rhs);
 238
 239 // t_var1_lhs = min(t_var1_lhs, t_var1_rhs);
 240
 241
 242
 243
 244 // For + reduction operation initial value of private variable is 0.
 245
 246 // For & reduction operation initial value of private variable is ones in all bits.
 247
 248 // For && reduction operation initial value of private variable is 1.0.
 249
 250 // For min reduction operation initial value of private variable is largest repesentable value.
 251
 252
 253
 254
 255
 256
 257 // Reduction list for runtime.
 258
 259
 260
 261 // For + reduction operation initial value of private variable is 0.
 262
 263 // For & reduction operation initial value of private variable is ones in all bits.
 264
 265 // For && reduction operation initial value of private variable is 1.0.
 266
 267 // For min reduction operation initial value of private variable is largest repesentable value.
 268
 269 // Skip checks for internal operations.
 270
 271 // ptr RedList[<n>] = {<ReductionVars>[0], ..., <ReductionVars>[<n>-1]};
 272
 273
 274 // res = __kmpc_reduce_nowait(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>);
 275
 276
 277 // switch(res)
 278
 279 // case 1:
 280 // t_var += t_var_reduction;
 281
 282 // var = var.operator &(var_reduction);
 283
 284 // var1 = var1.operator &&(var1_reduction);
 285
 286 // t_var1 = min(t_var1, t_var1_reduction);
 287
 288 // __kmpc_end_reduce_nowait(<loc>, <gtid>, &<lock>);
 289
 290 // break;
 291
 292 // case 2:
 293 // t_var += t_var_reduction;
 294
 295 // var = var.operator &(var_reduction);
 296
 297 // var1 = var1.operator &&(var1_reduction);
 298
 299 // t_var1 = min(t_var1, t_var1_reduction);
 300
 301 // break;
 302
 303
 304 // void reduce_func(ptr lhs[<n>], ptr rhs[<n>]) {
 305 //  *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]);
 306 //  ...
 307 //  *(Type<n>-1*)lhs[<n>-1] = ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1],
 308 //  *(Type<n>-1*)rhs[<n>-1]);
 309 // }
 310 // t_var_lhs = (iptr)lhs[0];
 311 // t_var_rhs = (iptr)rhs[0];
 312
 313 // var_lhs = (Sptr)lhs[1];
 314 // var_rhs = (Sptr)rhs[1];
 315
 316 // var1_lhs = (Sptr)lhs[2];
 317 // var1_rhs = (Sptr)rhs[2];
 318
 319 // t_var1_lhs = (iptr)lhs[3];
 320 // t_var1_rhs = (iptr)rhs[3];
 321
 322 // t_var_lhs += t_var_rhs;
 323
 324 // var_lhs = var_lhs.operator &(var_rhs);
 325
 326 // var1_lhs = var1_lhs.operator &&(var1_rhs);
 327
 328 // t_var1_lhs = min(t_var1_lhs, t_var1_rhs);
 329
 330 #endif
 331 // CHECK1-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs
 332 // CHECK1-SAME: (ptr noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
 333 // CHECK1-NEXT:  entry:
 334 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
 335 // CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
 336 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 337 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @_Z14foo_array_sectPs.omp_outlined, ptr [[TMP0]])
 338 // CHECK1-NEXT:    ret void
 339 //
 340 //
 341 // CHECK1-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined
 342 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] {
 343 // CHECK1-NEXT:  entry:
 344 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 345 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 346 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
 347 // CHECK1-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
 348 // CHECK1-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
 349 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
 350 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 8
 351 // CHECK1-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca i16, align 2
 352 // CHECK1-NEXT:    [[_TMP13:%.*]] = alloca i16, align 2
 353 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 354 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 355 // CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
 356 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 357 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[TMP0]], i64 0
 358 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 359 // CHECK1-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[TMP1]], i64 0
 360 // CHECK1-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[ARRAYIDX1]] to i64
 361 // CHECK1-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i64
 362 // CHECK1-NEXT:    [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]]
 363 // CHECK1-NEXT:    [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)
 364 // CHECK1-NEXT:    [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1
 365 // CHECK1-NEXT:    [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)
 366 // CHECK1-NEXT:    [[TMP8:%.*]] = call ptr @llvm.stacksave.p0()
 367 // CHECK1-NEXT:    store ptr [[TMP8]], ptr [[SAVED_STACK]], align 8
 368 // CHECK1-NEXT:    [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16
 369 // CHECK1-NEXT:    store i64 [[TMP6]], ptr [[__VLA_EXPR0]], align 8
 370 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP6]]
 371 // CHECK1-NEXT:    [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP9]]
 372 // CHECK1-NEXT:    br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
 373 // CHECK1:       omp.arrayinit.body:
 374 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
 375 // CHECK1-NEXT:    store i16 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
 376 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
 377 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
 378 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
 379 // CHECK1:       omp.arrayinit.done:
 380 // CHECK1-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 381 // CHECK1-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[TMP10]] to i64
 382 // CHECK1-NEXT:    [[TMP12:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i64
 383 // CHECK1-NEXT:    [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]]
 384 // CHECK1-NEXT:    [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)
 385 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP14]]
 386 // CHECK1-NEXT:    store ptr [[TMP15]], ptr [[TMP]], align 8
 387 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
 388 // CHECK1-NEXT:    store ptr [[VLA]], ptr [[TMP16]], align 8
 389 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
 390 // CHECK1-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP6]] to ptr
 391 // CHECK1-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 8
 392 // CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 393 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
 394 // CHECK1-NEXT:    [[TMP21:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1:[0-9]+]], i32 [[TMP20]], i32 1, i64 16, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
 395 // CHECK1-NEXT:    switch i32 [[TMP21]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
 396 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
 397 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
 398 // CHECK1-NEXT:    ]
 399 // CHECK1:       .omp.reduction.case1:
 400 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]
 401 // CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP22]]
 402 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
 403 // CHECK1:       omp.arraycpy.body:
 404 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
 405 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ]
 406 // CHECK1-NEXT:    [[TMP23:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
 407 // CHECK1-NEXT:    [[CONV:%.*]] = sext i16 [[TMP23]] to i32
 408 // CHECK1-NEXT:    [[TMP24:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
 409 // CHECK1-NEXT:    [[CONV3:%.*]] = sext i16 [[TMP24]] to i32
 410 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]]
 411 // CHECK1-NEXT:    [[CONV4:%.*]] = trunc i32 [[ADD]] to i16
 412 // CHECK1-NEXT:    store i16 [[CONV4]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
 413 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1
 414 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
 415 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP22]]
 416 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]
 417 // CHECK1:       omp.arraycpy.done7:
 418 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP20]], ptr @.gomp_critical_user_.reduction.var)
 419 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
 420 // CHECK1:       .omp.reduction.case2:
 421 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]
 422 // CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP25]]
 423 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]]
 424 // CHECK1:       omp.arraycpy.body9:
 425 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ]
 426 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ]
 427 // CHECK1-NEXT:    [[TMP26:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
 428 // CHECK1-NEXT:    [[CONV12:%.*]] = sext i16 [[TMP26]] to i32
 429 // CHECK1-NEXT:    [[ATOMIC_LOAD:%.*]] = load atomic i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2
 430 // CHECK1-NEXT:    br label [[ATOMIC_CONT:%.*]]
 431 // CHECK1:       atomic_cont:
 432 // CHECK1-NEXT:    [[TMP27:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP32:%.*]], [[ATOMIC_CONT]] ]
 433 // CHECK1-NEXT:    store i16 [[TMP27]], ptr [[_TMP13]], align 2
 434 // CHECK1-NEXT:    [[TMP28:%.*]] = load i16, ptr [[_TMP13]], align 2
 435 // CHECK1-NEXT:    [[CONV14:%.*]] = sext i16 [[TMP28]] to i32
 436 // CHECK1-NEXT:    [[TMP29:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
 437 // CHECK1-NEXT:    [[CONV15:%.*]] = sext i16 [[TMP29]] to i32
 438 // CHECK1-NEXT:    [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]]
 439 // CHECK1-NEXT:    [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16
 440 // CHECK1-NEXT:    store i16 [[CONV17]], ptr [[ATOMIC_TEMP]], align 2
 441 // CHECK1-NEXT:    [[TMP30:%.*]] = load i16, ptr [[ATOMIC_TEMP]], align 2
 442 // CHECK1-NEXT:    [[TMP31:%.*]] = cmpxchg ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP27]], i16 [[TMP30]] monotonic monotonic, align 2
 443 // CHECK1-NEXT:    [[TMP32]] = extractvalue { i16, i1 } [[TMP31]], 0
 444 // CHECK1-NEXT:    [[TMP33:%.*]] = extractvalue { i16, i1 } [[TMP31]], 1
 445 // CHECK1-NEXT:    br i1 [[TMP33]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]
 446 // CHECK1:       atomic_exit:
 447 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1
 448 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1
 449 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP25]]
 450 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]]
 451 // CHECK1:       omp.arraycpy.done21:
 452 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
 453 // CHECK1:       .omp.reduction.default:
 454 // CHECK1-NEXT:    [[TMP34:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
 455 // CHECK1-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP34]])
 456 // CHECK1-NEXT:    ret void
 457 //
 458 //
 459 // CHECK1-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func
 460 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
 461 // CHECK1-NEXT:  entry:
 462 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
 463 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
 464 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
 465 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
 466 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
 467 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
 468 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP3]], i64 0, i64 0
 469 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
 470 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 0
 471 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
 472 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 1
 473 // CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
 474 // CHECK1-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[TMP9]] to i64
 475 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr i16, ptr [[TMP7]], i64 [[TMP10]]
 476 // CHECK1-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP7]], [[TMP11]]
 477 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
 478 // CHECK1:       omp.arraycpy.body:
 479 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
 480 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP7]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
 481 // CHECK1-NEXT:    [[TMP12:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
 482 // CHECK1-NEXT:    [[CONV:%.*]] = sext i16 [[TMP12]] to i32
 483 // CHECK1-NEXT:    [[TMP13:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
 484 // CHECK1-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP13]] to i32
 485 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
 486 // CHECK1-NEXT:    [[CONV3:%.*]] = trunc i32 [[ADD]] to i16
 487 // CHECK1-NEXT:    store i16 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
 488 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
 489 // CHECK1-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
 490 // CHECK1-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP11]]
 491 // CHECK1-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
 492 // CHECK1:       omp.arraycpy.done4:
 493 // CHECK1-NEXT:    ret void
 494 //
 495 //
 496 // CHECK1-LABEL: define {{[^@]+}}@main
 497 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] {
 498 // CHECK1-NEXT:  entry:
 499 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 500 // CHECK1-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
 501 // CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 502 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca float, align 4
 503 // CHECK1-NEXT:    [[T_VAR1:%.*]] = alloca float, align 4
 504 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
 505 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
 506 // CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S]], align 4
 507 // CHECK1-NEXT:    [[VAR1:%.*]] = alloca [[STRUCT_S]], align 4
 508 // CHECK1-NEXT:    [[CF:%.*]] = alloca { float, float }, align 4
 509 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 510 // CHECK1-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @sivar)
 511 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
 512 // CHECK1-NEXT:    store float 0.000000e+00, ptr [[T_VAR]], align 4
 513 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
 514 // CHECK1-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
 515 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
 516 // CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
 517 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
 518 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], float noundef 3.000000e+00)
 519 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR1]])
 520 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 6, ptr @main.omp_outlined, ptr [[VEC]], ptr [[T_VAR]], ptr [[S_ARR]], ptr [[VAR]], ptr [[VAR1]], ptr [[T_VAR1]])
 521 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[VAR1]])
 522 // CHECK1-NEXT:    [[TOBOOL:%.*]] = fcmp une float [[CALL]], 0.000000e+00
 523 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[IF_THEN:%.*]], label [[IF_END:%.*]]
 524 // CHECK1:       if.then:
 525 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 6, ptr @main.omp_outlined.1, ptr [[VEC]], ptr [[T_VAR]], ptr [[S_ARR]], ptr [[VAR]], ptr [[VAR1]], ptr [[T_VAR1]])
 526 // CHECK1-NEXT:    br label [[IF_END]]
 527 // CHECK1:       if.end:
 528 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @main.omp_outlined.2, ptr [[CF]])
 529 // CHECK1-NEXT:    [[CALL1:%.*]] = call noundef i32 @_Z5tmainIiET_v()
 530 // CHECK1-NEXT:    store i32 [[CALL1]], ptr [[RETVAL]], align 4
 531 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5:[0-9]+]]
 532 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
 533 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
 534 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
 535 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
 536 // CHECK1:       arraydestroy.body:
 537 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP0]], [[IF_END]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
 538 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
 539 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
 540 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
 541 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
 542 // CHECK1:       arraydestroy.done2:
 543 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
 544 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RETVAL]], align 4
 545 // CHECK1-NEXT:    ret i32 [[TMP1]]
 546 //
 547 //
 548 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
 549 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] align 2 {
 550 // CHECK1-NEXT:  entry:
 551 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 552 // CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
 553 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 554 // CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
 555 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 556 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
 557 // CHECK1-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])
 558 // CHECK1-NEXT:    ret void
 559 //
 560 //
 561 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
 562 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
 563 // CHECK1-NEXT:  entry:
 564 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 565 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 566 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 567 // CHECK1-NEXT:    call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
 568 // CHECK1-NEXT:    ret void
 569 //
 570 //
 571 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
 572 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
 573 // CHECK1-NEXT:  entry:
 574 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 575 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
 576 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 577 // CHECK1-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
 578 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 579 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
 580 // CHECK1-NEXT:    call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
 581 // CHECK1-NEXT:    ret void
 582 //
 583 //
 584 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined
 585 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
 586 // CHECK1-NEXT:  entry:
 587 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 588 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 589 // CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
 590 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
 591 // CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
 592 // CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
 593 // CHECK1-NEXT:    [[VAR1_ADDR:%.*]] = alloca ptr, align 8
 594 // CHECK1-NEXT:    [[T_VAR1_ADDR:%.*]] = alloca ptr, align 8
 595 // CHECK1-NEXT:    [[T_VAR2:%.*]] = alloca float, align 4
 596 // CHECK1-NEXT:    [[VAR3:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 597 // CHECK1-NEXT:    [[VAR14:%.*]] = alloca [[STRUCT_S]], align 4
 598 // CHECK1-NEXT:    [[T_VAR15:%.*]] = alloca float, align 4
 599 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x ptr], align 8
 600 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S]], align 4
 601 // CHECK1-NEXT:    [[REF_TMP12:%.*]] = alloca [[STRUCT_S]], align 4
 602 // CHECK1-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca float, align 4
 603 // CHECK1-NEXT:    [[TMP:%.*]] = alloca float, align 4
 604 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 605 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 606 // CHECK1-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
 607 // CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
 608 // CHECK1-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
 609 // CHECK1-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
 610 // CHECK1-NEXT:    store ptr [[VAR1]], ptr [[VAR1_ADDR]], align 8
 611 // CHECK1-NEXT:    store ptr [[T_VAR1]], ptr [[T_VAR1_ADDR]], align 8
 612 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
 613 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
 614 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
 615 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
 616 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[VAR1_ADDR]], align 8
 617 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[T_VAR1_ADDR]], align 8
 618 // CHECK1-NEXT:    store float 0.000000e+00, ptr [[T_VAR2]], align 4
 619 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])
 620 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])
 621 // CHECK1-NEXT:    store float 0x47EFFFFFE0000000, ptr [[T_VAR15]], align 4
 622 // CHECK1-NEXT:    [[TMP6:%.*]] = load float, ptr [[T_VAR2]], align 4
 623 // CHECK1-NEXT:    [[CONV:%.*]] = fptosi float [[TMP6]] to i32
 624 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i64 0, i64 0
 625 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[ARRAYIDX]], align 4
 626 // CHECK1-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i64 0, i64 0
 627 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[VAR3]], i64 4, i1 false)
 628 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
 629 // CHECK1-NEXT:    store ptr [[T_VAR2]], ptr [[TMP7]], align 8
 630 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
 631 // CHECK1-NEXT:    store ptr [[VAR3]], ptr [[TMP8]], align 8
 632 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
 633 // CHECK1-NEXT:    store ptr [[VAR14]], ptr [[TMP9]], align 8
 634 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3
 635 // CHECK1-NEXT:    store ptr [[T_VAR15]], ptr [[TMP10]], align 8
 636 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 637 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
 638 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP12]], i32 4, i64 32, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @main.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
 639 // CHECK1-NEXT:    switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
 640 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
 641 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
 642 // CHECK1-NEXT:    ]
 643 // CHECK1:       .omp.reduction.case1:
 644 // CHECK1-NEXT:    [[TMP14:%.*]] = load float, ptr [[TMP1]], align 4
 645 // CHECK1-NEXT:    [[TMP15:%.*]] = load float, ptr [[T_VAR2]], align 4
 646 // CHECK1-NEXT:    [[ADD:%.*]] = fadd float [[TMP14]], [[TMP15]]
 647 // CHECK1-NEXT:    store float [[ADD]], ptr [[TMP1]], align 4
 648 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])
 649 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[CALL]], i64 4, i1 false)
 650 // CHECK1-NEXT:    [[CALL7:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]])
 651 // CHECK1-NEXT:    [[TOBOOL:%.*]] = fcmp une float [[CALL7]], 0.000000e+00
 652 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
 653 // CHECK1:       land.rhs:
 654 // CHECK1-NEXT:    [[CALL8:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])
 655 // CHECK1-NEXT:    [[TOBOOL9:%.*]] = fcmp une float [[CALL8]], 0.000000e+00
 656 // CHECK1-NEXT:    br label [[LAND_END]]
 657 // CHECK1:       land.end:
 658 // CHECK1-NEXT:    [[TMP16:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL9]], [[LAND_RHS]] ]
 659 // CHECK1-NEXT:    [[CONV10:%.*]] = uitofp i1 [[TMP16]] to float
 660 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], float noundef [[CONV10]])
 661 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[REF_TMP]], i64 4, i1 false)
 662 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]
 663 // CHECK1-NEXT:    [[TMP17:%.*]] = load float, ptr [[TMP5]], align 4
 664 // CHECK1-NEXT:    [[TMP18:%.*]] = load float, ptr [[T_VAR15]], align 4
 665 // CHECK1-NEXT:    [[CMP:%.*]] = fcmp olt float [[TMP17]], [[TMP18]]
 666 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 667 // CHECK1:       cond.true:
 668 // CHECK1-NEXT:    [[TMP19:%.*]] = load float, ptr [[TMP5]], align 4
 669 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 670 // CHECK1:       cond.false:
 671 // CHECK1-NEXT:    [[TMP20:%.*]] = load float, ptr [[T_VAR15]], align 4
 672 // CHECK1-NEXT:    br label [[COND_END]]
 673 // CHECK1:       cond.end:
 674 // CHECK1-NEXT:    [[COND:%.*]] = phi float [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
 675 // CHECK1-NEXT:    store float [[COND]], ptr [[TMP5]], align 4
 676 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP12]], ptr @.gomp_critical_user_.reduction.var)
 677 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
 678 // CHECK1:       .omp.reduction.case2:
 679 // CHECK1-NEXT:    [[TMP21:%.*]] = load float, ptr [[T_VAR2]], align 4
 680 // CHECK1-NEXT:    [[TMP22:%.*]] = atomicrmw fadd ptr [[TMP1]], float [[TMP21]] monotonic, align 4
 681 // CHECK1-NEXT:    call void @__kmpc_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)
 682 // CHECK1-NEXT:    [[CALL11:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])
 683 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[CALL11]], i64 4, i1 false)
 684 // CHECK1-NEXT:    call void @__kmpc_end_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)
 685 // CHECK1-NEXT:    call void @__kmpc_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)
 686 // CHECK1-NEXT:    [[CALL13:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]])
 687 // CHECK1-NEXT:    [[TOBOOL14:%.*]] = fcmp une float [[CALL13]], 0.000000e+00
 688 // CHECK1-NEXT:    br i1 [[TOBOOL14]], label [[LAND_RHS15:%.*]], label [[LAND_END18:%.*]]
 689 // CHECK1:       land.rhs15:
 690 // CHECK1-NEXT:    [[CALL16:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])
 691 // CHECK1-NEXT:    [[TOBOOL17:%.*]] = fcmp une float [[CALL16]], 0.000000e+00
 692 // CHECK1-NEXT:    br label [[LAND_END18]]
 693 // CHECK1:       land.end18:
 694 // CHECK1-NEXT:    [[TMP23:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL17]], [[LAND_RHS15]] ]
 695 // CHECK1-NEXT:    [[CONV19:%.*]] = uitofp i1 [[TMP23]] to float
 696 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP12]], float noundef [[CONV19]])
 697 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP4]], ptr align 4 [[REF_TMP12]], i64 4, i1 false)
 698 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP12]]) #[[ATTR5]]
 699 // CHECK1-NEXT:    call void @__kmpc_end_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)
 700 // CHECK1-NEXT:    [[TMP24:%.*]] = load float, ptr [[T_VAR15]], align 4
 701 // CHECK1-NEXT:    [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP5]] monotonic, align 4
 702 // CHECK1-NEXT:    br label [[ATOMIC_CONT:%.*]]
 703 // CHECK1:       atomic_cont:
 704 // CHECK1-NEXT:    [[TMP25:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[LAND_END18]] ], [ [[TMP33:%.*]], [[COND_END23:%.*]] ]
 705 // CHECK1-NEXT:    [[TMP26:%.*]] = bitcast i32 [[TMP25]] to float
 706 // CHECK1-NEXT:    store float [[TMP26]], ptr [[TMP]], align 4
 707 // CHECK1-NEXT:    [[TMP27:%.*]] = load float, ptr [[TMP]], align 4
 708 // CHECK1-NEXT:    [[TMP28:%.*]] = load float, ptr [[T_VAR15]], align 4
 709 // CHECK1-NEXT:    [[CMP20:%.*]] = fcmp olt float [[TMP27]], [[TMP28]]
 710 // CHECK1-NEXT:    br i1 [[CMP20]], label [[COND_TRUE21:%.*]], label [[COND_FALSE22:%.*]]
 711 // CHECK1:       cond.true21:
 712 // CHECK1-NEXT:    [[TMP29:%.*]] = load float, ptr [[TMP]], align 4
 713 // CHECK1-NEXT:    br label [[COND_END23]]
 714 // CHECK1:       cond.false22:
 715 // CHECK1-NEXT:    [[TMP30:%.*]] = load float, ptr [[T_VAR15]], align 4
 716 // CHECK1-NEXT:    br label [[COND_END23]]
 717 // CHECK1:       cond.end23:
 718 // CHECK1-NEXT:    [[COND24:%.*]] = phi float [ [[TMP29]], [[COND_TRUE21]] ], [ [[TMP30]], [[COND_FALSE22]] ]
 719 // CHECK1-NEXT:    store float [[COND24]], ptr [[ATOMIC_TEMP]], align 4
 720 // CHECK1-NEXT:    [[TMP31:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 4
 721 // CHECK1-NEXT:    [[TMP32:%.*]] = cmpxchg ptr [[TMP5]], i32 [[TMP25]], i32 [[TMP31]] monotonic monotonic, align 4
 722 // CHECK1-NEXT:    [[TMP33]] = extractvalue { i32, i1 } [[TMP32]], 0
 723 // CHECK1-NEXT:    [[TMP34:%.*]] = extractvalue { i32, i1 } [[TMP32]], 1
 724 // CHECK1-NEXT:    br i1 [[TMP34]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]
 725 // CHECK1:       atomic_exit:
 726 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
 727 // CHECK1:       .omp.reduction.default:
 728 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]]) #[[ATTR5]]
 729 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]]) #[[ATTR5]]
 730 // CHECK1-NEXT:    ret void
 731 //
 732 //
 733 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.omp.reduction.reduction_func
 734 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {
 735 // CHECK1-NEXT:  entry:
 736 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
 737 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
 738 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 739 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
 740 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
 741 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
 742 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
 743 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 0
 744 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
 745 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 0
 746 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
 747 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 1
 748 // CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
 749 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 1
 750 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
 751 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 2
 752 // CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8
 753 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 2
 754 // CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8
 755 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 3
 756 // CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
 757 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 3
 758 // CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8
 759 // CHECK1-NEXT:    [[TMP20:%.*]] = load float, ptr [[TMP7]], align 4
 760 // CHECK1-NEXT:    [[TMP21:%.*]] = load float, ptr [[TMP5]], align 4
 761 // CHECK1-NEXT:    [[ADD:%.*]] = fadd float [[TMP20]], [[TMP21]]
 762 // CHECK1-NEXT:    store float [[ADD]], ptr [[TMP7]], align 4
 763 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIfEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP11]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP9]])
 764 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP11]], ptr align 4 [[CALL]], i64 4, i1 false)
 765 // CHECK1-NEXT:    [[CALL2:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP15]])
 766 // CHECK1-NEXT:    [[TOBOOL:%.*]] = fcmp une float [[CALL2]], 0.000000e+00
 767 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
 768 // CHECK1:       land.rhs:
 769 // CHECK1-NEXT:    [[CALL3:%.*]] = call noundef float @_ZN1SIfEcvfEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP13]])
 770 // CHECK1-NEXT:    [[TOBOOL4:%.*]] = fcmp une float [[CALL3]], 0.000000e+00
 771 // CHECK1-NEXT:    br label [[LAND_END]]
 772 // CHECK1:       land.end:
 773 // CHECK1-NEXT:    [[TMP22:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ]
 774 // CHECK1-NEXT:    [[CONV:%.*]] = uitofp i1 [[TMP22]] to float
 775 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], float noundef [[CONV]])
 776 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP15]], ptr align 4 [[REF_TMP]], i64 4, i1 false)
 777 // CHECK1-NEXT:    call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]
 778 // CHECK1-NEXT:    [[TMP23:%.*]] = load float, ptr [[TMP19]], align 4
 779 // CHECK1-NEXT:    [[TMP24:%.*]] = load float, ptr [[TMP17]], align 4
 780 // CHECK1-NEXT:    [[CMP:%.*]] = fcmp olt float [[TMP23]], [[TMP24]]
 781 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 782 // CHECK1:       cond.true:
 783 // CHECK1-NEXT:    [[TMP25:%.*]] = load float, ptr [[TMP19]], align 4
 784 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 785 // CHECK1:       cond.false:
 786 // CHECK1-NEXT:    [[TMP26:%.*]] = load float, ptr [[TMP17]], align 4
 787 // CHECK1-NEXT:    br label [[COND_END]]
 788 // CHECK1:       cond.end:
 789 // CHECK1-NEXT:    [[COND:%.*]] = phi float [ [[TMP25]], [[COND_TRUE]] ], [ [[TMP26]], [[COND_FALSE]] ]
 790 // CHECK1-NEXT:    store float [[COND]], ptr [[TMP19]], align 4
 791 // CHECK1-NEXT:    ret void
 792 //
 793 //
 794 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEanERKS0_
 795 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 {
 796 // CHECK1-NEXT:  entry:
 797 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 798 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
 799 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 800 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
 801 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 802 // CHECK1-NEXT:    ret ptr [[THIS1]]
 803 //
 804 //
 805 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEcvfEv
 806 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 {
 807 // CHECK1-NEXT:  entry:
 808 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 809 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 810 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 811 // CHECK1-NEXT:    ret float 0.000000e+00
 812 //
 813 //
 814 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
 815 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
 816 // CHECK1-NEXT:  entry:
 817 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 818 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 819 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 820 // CHECK1-NEXT:    call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
 821 // CHECK1-NEXT:    ret void
 822 //
 823 //
 824 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.1
 825 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
 826 // CHECK1-NEXT:  entry:
 827 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 828 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 829 // CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
 830 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
 831 // CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
 832 // CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
 833 // CHECK1-NEXT:    [[VAR1_ADDR:%.*]] = alloca ptr, align 8
 834 // CHECK1-NEXT:    [[T_VAR1_ADDR:%.*]] = alloca ptr, align 8
 835 // CHECK1-NEXT:    [[T_VAR2:%.*]] = alloca float, align 4
 836 // CHECK1-NEXT:    [[VAR3:%.*]] = alloca [[STRUCT_S:%.*]], align 4
 837 // CHECK1-NEXT:    [[VAR14:%.*]] = alloca [[STRUCT_S]], align 4
 838 // CHECK1-NEXT:    [[T_VAR15:%.*]] = alloca float, align 4
 839 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 840 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 841 // CHECK1-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
 842 // CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
 843 // CHECK1-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
 844 // CHECK1-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
 845 // CHECK1-NEXT:    store ptr [[VAR1]], ptr [[VAR1_ADDR]], align 8
 846 // CHECK1-NEXT:    store ptr [[T_VAR1]], ptr [[T_VAR1_ADDR]], align 8
 847 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
 848 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
 849 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
 850 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
 851 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[VAR1_ADDR]], align 8
 852 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[T_VAR1_ADDR]], align 8
 853 // CHECK1-NEXT:    store float 0.000000e+00, ptr [[T_VAR2]], align 4
 854 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])
 855 // CHECK1-NEXT:    call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])
 856 // CHECK1-NEXT:    store float 0x47EFFFFFE0000000, ptr [[T_VAR15]], align 4
 857 // CHECK1-NEXT:    br label [[WHILE_COND:%.*]]
 858 // CHECK1:       while.cond:
 859 // CHECK1-NEXT:    br label [[WHILE_BODY:%.*]]
 860 // CHECK1:       while.body:
 861 // CHECK1-NEXT:    [[TMP6:%.*]] = load float, ptr [[T_VAR2]], align 4
 862 // CHECK1-NEXT:    [[CONV:%.*]] = fptosi float [[TMP6]] to i32
 863 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i64 0, i64 0
 864 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[ARRAYIDX]], align 4
 865 // CHECK1-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP2]], i64 0, i64 0
 866 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 4 [[VAR3]], i64 4, i1 false)
 867 // CHECK1-NEXT:    br label [[WHILE_COND]], !llvm.loop [[LOOP5:![0-9]+]]
 868 //
 869 //
 870 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.2
 871 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[CF:%.*]]) #[[ATTR1]] {
 872 // CHECK1-NEXT:  entry:
 873 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 874 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 875 // CHECK1-NEXT:    [[CF_ADDR:%.*]] = alloca ptr, align 8
 876 // CHECK1-NEXT:    [[CF1:%.*]] = alloca { float, float }, align 4
 877 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8
 878 // CHECK1-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca { float, float }, align 4
 879 // CHECK1-NEXT:    [[ATOMIC_TEMP10:%.*]] = alloca { float, float }, align 4
 880 // CHECK1-NEXT:    [[TMP:%.*]] = alloca { float, float }, align 4
 881 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 882 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 883 // CHECK1-NEXT:    store ptr [[CF]], ptr [[CF_ADDR]], align 8
 884 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[CF_ADDR]], align 8
 885 // CHECK1-NEXT:    [[CF1_REALP:%.*]] = getelementptr inbounds { float, float }, ptr [[CF1]], i32 0, i32 0
 886 // CHECK1-NEXT:    [[CF1_IMAGP:%.*]] = getelementptr inbounds { float, float }, ptr [[CF1]], i32 0, i32 1
 887 // CHECK1-NEXT:    store float 0.000000e+00, ptr [[CF1_REALP]], align 4
 888 // CHECK1-NEXT:    store float 0.000000e+00, ptr [[CF1_IMAGP]], align 4
 889 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
 890 // CHECK1-NEXT:    store ptr [[CF1]], ptr [[TMP1]], align 8
 891 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 892 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 893 // CHECK1-NEXT:    [[TMP4:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP3]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @main.omp_outlined.2.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
 894 // CHECK1-NEXT:    switch i32 [[TMP4]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
 895 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
 896 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
 897 // CHECK1-NEXT:    ]
 898 // CHECK1:       .omp.reduction.case1:
 899 // CHECK1-NEXT:    [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP0]], i32 0, i32 0
 900 // CHECK1-NEXT:    [[DOTREAL:%.*]] = load float, ptr [[DOTREALP]], align 4
 901 // CHECK1-NEXT:    [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP0]], i32 0, i32 1
 902 // CHECK1-NEXT:    [[DOTIMAG:%.*]] = load float, ptr [[DOTIMAGP]], align 4
 903 // CHECK1-NEXT:    [[CF1_REALP2:%.*]] = getelementptr inbounds { float, float }, ptr [[CF1]], i32 0, i32 0
 904 // CHECK1-NEXT:    [[CF1_REAL:%.*]] = load float, ptr [[CF1_REALP2]], align 4
 905 // CHECK1-NEXT:    [[CF1_IMAGP3:%.*]] = getelementptr inbounds { float, float }, ptr [[CF1]], i32 0, i32 1
 906 // CHECK1-NEXT:    [[CF1_IMAG:%.*]] = load float, ptr [[CF1_IMAGP3]], align 4
 907 // CHECK1-NEXT:    [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[CF1_REAL]]
 908 // CHECK1-NEXT:    [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[CF1_IMAG]]
 909 // CHECK1-NEXT:    [[DOTREALP4:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP0]], i32 0, i32 0
 910 // CHECK1-NEXT:    [[DOTIMAGP5:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP0]], i32 0, i32 1
 911 // CHECK1-NEXT:    store float [[ADD_R]], ptr [[DOTREALP4]], align 4
 912 // CHECK1-NEXT:    store float [[ADD_I]], ptr [[DOTIMAGP5]], align 4
 913 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP3]], ptr @.gomp_critical_user_.reduction.var)
 914 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
 915 // CHECK1:       .omp.reduction.case2:
 916 // CHECK1-NEXT:    [[CF1_REALP6:%.*]] = getelementptr inbounds { float, float }, ptr [[CF1]], i32 0, i32 0
 917 // CHECK1-NEXT:    [[CF1_REAL7:%.*]] = load float, ptr [[CF1_REALP6]], align 4
 918 // CHECK1-NEXT:    [[CF1_IMAGP8:%.*]] = getelementptr inbounds { float, float }, ptr [[CF1]], i32 0, i32 1
 919 // CHECK1-NEXT:    [[CF1_IMAG9:%.*]] = load float, ptr [[CF1_IMAGP8]], align 4
 920 // CHECK1-NEXT:    call void @__atomic_load(i64 noundef 8, ptr noundef [[TMP0]], ptr noundef [[ATOMIC_TEMP]], i32 noundef 0)
 921 // CHECK1-NEXT:    br label [[ATOMIC_CONT:%.*]]
 922 // CHECK1:       atomic_cont:
 923 // CHECK1-NEXT:    [[ATOMIC_TEMP_REALP:%.*]] = getelementptr inbounds { float, float }, ptr [[ATOMIC_TEMP]], i32 0, i32 0
 924 // CHECK1-NEXT:    [[ATOMIC_TEMP_REAL:%.*]] = load float, ptr [[ATOMIC_TEMP_REALP]], align 4
 925 // CHECK1-NEXT:    [[ATOMIC_TEMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, ptr [[ATOMIC_TEMP]], i32 0, i32 1
 926 // CHECK1-NEXT:    [[ATOMIC_TEMP_IMAG:%.*]] = load float, ptr [[ATOMIC_TEMP_IMAGP]], align 4
 927 // CHECK1-NEXT:    [[TMP_REALP:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP]], i32 0, i32 0
 928 // CHECK1-NEXT:    [[TMP_IMAGP:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP]], i32 0, i32 1
 929 // CHECK1-NEXT:    store float [[ATOMIC_TEMP_REAL]], ptr [[TMP_REALP]], align 4
 930 // CHECK1-NEXT:    store float [[ATOMIC_TEMP_IMAG]], ptr [[TMP_IMAGP]], align 4
 931 // CHECK1-NEXT:    [[TMP_REALP11:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP]], i32 0, i32 0
 932 // CHECK1-NEXT:    [[TMP_REAL:%.*]] = load float, ptr [[TMP_REALP11]], align 4
 933 // CHECK1-NEXT:    [[TMP_IMAGP12:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP]], i32 0, i32 1
 934 // CHECK1-NEXT:    [[TMP_IMAG:%.*]] = load float, ptr [[TMP_IMAGP12]], align 4
 935 // CHECK1-NEXT:    [[CF1_REALP13:%.*]] = getelementptr inbounds { float, float }, ptr [[CF1]], i32 0, i32 0
 936 // CHECK1-NEXT:    [[CF1_REAL14:%.*]] = load float, ptr [[CF1_REALP13]], align 4
 937 // CHECK1-NEXT:    [[CF1_IMAGP15:%.*]] = getelementptr inbounds { float, float }, ptr [[CF1]], i32 0, i32 1
 938 // CHECK1-NEXT:    [[CF1_IMAG16:%.*]] = load float, ptr [[CF1_IMAGP15]], align 4
 939 // CHECK1-NEXT:    [[ADD_R17:%.*]] = fadd float [[TMP_REAL]], [[CF1_REAL14]]
 940 // CHECK1-NEXT:    [[ADD_I18:%.*]] = fadd float [[TMP_IMAG]], [[CF1_IMAG16]]
 941 // CHECK1-NEXT:    [[ATOMIC_TEMP10_REALP:%.*]] = getelementptr inbounds { float, float }, ptr [[ATOMIC_TEMP10]], i32 0, i32 0
 942 // CHECK1-NEXT:    [[ATOMIC_TEMP10_IMAGP:%.*]] = getelementptr inbounds { float, float }, ptr [[ATOMIC_TEMP10]], i32 0, i32 1
 943 // CHECK1-NEXT:    store float [[ADD_R17]], ptr [[ATOMIC_TEMP10_REALP]], align 4
 944 // CHECK1-NEXT:    store float [[ADD_I18]], ptr [[ATOMIC_TEMP10_IMAGP]], align 4
 945 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef zeroext i1 @__atomic_compare_exchange(i64 noundef 8, ptr noundef [[TMP0]], ptr noundef [[ATOMIC_TEMP]], ptr noundef [[ATOMIC_TEMP10]], i32 noundef 0, i32 noundef 0)
 946 // CHECK1-NEXT:    br i1 [[CALL]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]
 947 // CHECK1:       atomic_exit:
 948 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
 949 // CHECK1:       .omp.reduction.default:
 950 // CHECK1-NEXT:    ret void
 951 //
 952 //
 953 // CHECK1-LABEL: define {{[^@]+}}@main.omp_outlined.2.omp.reduction.reduction_func
 954 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {
 955 // CHECK1-NEXT:  entry:
 956 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
 957 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
 958 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
 959 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
 960 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
 961 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
 962 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0
 963 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
 964 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
 965 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
 966 // CHECK1-NEXT:    [[DOTREALP:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP7]], i32 0, i32 0
 967 // CHECK1-NEXT:    [[DOTREAL:%.*]] = load float, ptr [[DOTREALP]], align 4
 968 // CHECK1-NEXT:    [[DOTIMAGP:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP7]], i32 0, i32 1
 969 // CHECK1-NEXT:    [[DOTIMAG:%.*]] = load float, ptr [[DOTIMAGP]], align 4
 970 // CHECK1-NEXT:    [[DOTREALP2:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP5]], i32 0, i32 0
 971 // CHECK1-NEXT:    [[DOTREAL3:%.*]] = load float, ptr [[DOTREALP2]], align 4
 972 // CHECK1-NEXT:    [[DOTIMAGP4:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP5]], i32 0, i32 1
 973 // CHECK1-NEXT:    [[DOTIMAG5:%.*]] = load float, ptr [[DOTIMAGP4]], align 4
 974 // CHECK1-NEXT:    [[ADD_R:%.*]] = fadd float [[DOTREAL]], [[DOTREAL3]]
 975 // CHECK1-NEXT:    [[ADD_I:%.*]] = fadd float [[DOTIMAG]], [[DOTIMAG5]]
 976 // CHECK1-NEXT:    [[DOTREALP6:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP7]], i32 0, i32 0
 977 // CHECK1-NEXT:    [[DOTIMAGP7:%.*]] = getelementptr inbounds { float, float }, ptr [[TMP7]], i32 0, i32 1
 978 // CHECK1-NEXT:    store float [[ADD_R]], ptr [[DOTREALP6]], align 4
 979 // CHECK1-NEXT:    store float [[ADD_I]], ptr [[DOTIMAGP7]], align 4
 980 // CHECK1-NEXT:    ret void
 981 //
 982 //
 983 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
 984 // CHECK1-SAME: () #[[ATTR0]] {
 985 // CHECK1-NEXT:  entry:
 986 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 987 // CHECK1-NEXT:    [[T:%.*]] = alloca i32, align 4
 988 // CHECK1-NEXT:    [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
 989 // CHECK1-NEXT:    [[SST:%.*]] = alloca [[STRUCT_SST:%.*]], align 4
 990 // CHECK1-NEXT:    [[T_VAR:%.*]] = alloca i32, align 128
 991 // CHECK1-NEXT:    [[T_VAR1:%.*]] = alloca i32, align 128
 992 // CHECK1-NEXT:    [[VEC:%.*]] = alloca [2 x i32], align 4
 993 // CHECK1-NEXT:    [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
 994 // CHECK1-NEXT:    [[VAR:%.*]] = alloca [[STRUCT_S_0]], align 128
 995 // CHECK1-NEXT:    [[VAR1:%.*]] = alloca [[STRUCT_S_0]], align 128
 996 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
 997 // CHECK1-NEXT:    call void @_ZN3SSTIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[SST]])
 998 // CHECK1-NEXT:    store i32 0, ptr [[T_VAR]], align 128
 999 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
1000 // CHECK1-NEXT:    [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
1001 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
1002 // CHECK1-NEXT:    [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
1003 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
1004 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]], i32 noundef 3)
1005 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR1]])
1006 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 6, ptr @_Z5tmainIiET_v.omp_outlined, ptr [[VEC]], ptr [[T_VAR]], ptr [[S_ARR]], ptr [[VAR]], ptr [[VAR1]], ptr [[T_VAR1]])
1007 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1008 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR1]]) #[[ATTR5]]
1009 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR]]) #[[ATTR5]]
1010 // CHECK1-NEXT:    [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1011 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1012 // CHECK1-NEXT:    br label [[ARRAYDESTROY_BODY:%.*]]
1013 // CHECK1:       arraydestroy.body:
1014 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP0]], [[ENTRY:%.*]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1015 // CHECK1-NEXT:    [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1016 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR5]]
1017 // CHECK1-NEXT:    [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1018 // CHECK1-NEXT:    br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE1:%.*]], label [[ARRAYDESTROY_BODY]]
1019 // CHECK1:       arraydestroy.done1:
1020 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR5]]
1021 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[RETVAL]], align 4
1022 // CHECK1-NEXT:    ret i32 [[TMP1]]
1023 //
1024 //
1025 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
1026 // CHECK1-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1027 // CHECK1-NEXT:  entry:
1028 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1029 // CHECK1-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
1030 // CHECK1-NEXT:    [[A2:%.*]] = alloca ptr, align 8
1031 // CHECK1-NEXT:    [[B4:%.*]] = alloca i32, align 4
1032 // CHECK1-NEXT:    [[C5:%.*]] = alloca ptr, align 8
1033 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1034 // CHECK1-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
1035 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1036 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
1037 // CHECK1-NEXT:    store i32 0, ptr [[A]], align 8
1038 // CHECK1-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1
1039 // CHECK1-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4
1040 // CHECK1-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1041 // CHECK1-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
1042 // CHECK1-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 4
1043 // CHECK1-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
1044 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
1045 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[C]], align 8
1046 // CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1047 // CHECK1-NEXT:    store ptr [[A3]], ptr [[A2]], align 8
1048 // CHECK1-NEXT:    [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
1049 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C6]], align 8
1050 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[C5]], align 8
1051 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A2]], align 8
1052 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C5]], align 8
1053 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]], ptr [[TMP2]], ptr [[B4]], ptr [[TMP3]])
1054 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[B4]], align 4
1055 // CHECK1-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1
1056 // CHECK1-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
1057 // CHECK1-NEXT:    [[BF_LOAD8:%.*]] = load i8, ptr [[B7]], align 4
1058 // CHECK1-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
1059 // CHECK1-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
1060 // CHECK1-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
1061 // CHECK1-NEXT:    store i8 [[BF_SET10]], ptr [[B7]], align 4
1062 // CHECK1-NEXT:    ret void
1063 //
1064 //
1065 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
1066 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
1067 // CHECK1-NEXT:  entry:
1068 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1069 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1070 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1071 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1072 // CHECK1-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
1073 // CHECK1-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
1074 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1075 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
1076 // CHECK1-NEXT:    [[A2:%.*]] = alloca i32, align 4
1077 // CHECK1-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
1078 // CHECK1-NEXT:    [[B4:%.*]] = alloca i32, align 4
1079 // CHECK1-NEXT:    [[C5:%.*]] = alloca i32, align 4
1080 // CHECK1-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
1081 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 8
1082 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1083 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1084 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1085 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1086 // CHECK1-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8
1087 // CHECK1-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
1088 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1089 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1090 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8
1091 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8
1092 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
1093 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 8
1094 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1095 // CHECK1-NEXT:    store i32 0, ptr [[A2]], align 4
1096 // CHECK1-NEXT:    store ptr [[A2]], ptr [[_TMP3]], align 8
1097 // CHECK1-NEXT:    store i32 0, ptr [[B4]], align 4
1098 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
1099 // CHECK1-NEXT:    store i32 0, ptr [[C5]], align 4
1100 // CHECK1-NEXT:    store ptr [[C5]], ptr [[_TMP6]], align 8
1101 // CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP3]], align 8
1102 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1103 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP7]], 1
1104 // CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP6]], align 4
1105 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[B4]], align 4
1106 // CHECK1-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP8]], -1
1107 // CHECK1-NEXT:    store i32 [[DEC]], ptr [[B4]], align 4
1108 // CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP6]], align 8
1109 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
1110 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
1111 // CHECK1-NEXT:    store i32 [[DIV]], ptr [[TMP9]], align 4
1112 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1113 // CHECK1-NEXT:    store ptr [[A2]], ptr [[TMP11]], align 8
1114 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
1115 // CHECK1-NEXT:    store ptr [[B4]], ptr [[TMP12]], align 8
1116 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
1117 // CHECK1-NEXT:    store ptr [[C5]], ptr [[TMP13]], align 8
1118 // CHECK1-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1119 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
1120 // CHECK1-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], i32 3, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
1121 // CHECK1-NEXT:    switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1122 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1123 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1124 // CHECK1-NEXT:    ]
1125 // CHECK1:       .omp.reduction.case1:
1126 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP4]], align 4
1127 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[A2]], align 4
1128 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1129 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP4]], align 4
1130 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP2]], align 4
1131 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[B4]], align 4
1132 // CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1133 // CHECK1-NEXT:    store i32 [[ADD7]], ptr [[TMP2]], align 4
1134 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP5]], align 4
1135 // CHECK1-NEXT:    [[TMP22:%.*]] = load i32, ptr [[C5]], align 4
1136 // CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1137 // CHECK1-NEXT:    store i32 [[ADD8]], ptr [[TMP5]], align 4
1138 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.reduction.var)
1139 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1140 // CHECK1:       .omp.reduction.case2:
1141 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[A2]], align 4
1142 // CHECK1-NEXT:    [[TMP24:%.*]] = atomicrmw add ptr [[TMP4]], i32 [[TMP23]] monotonic, align 4
1143 // CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[B4]], align 4
1144 // CHECK1-NEXT:    [[TMP26:%.*]] = atomicrmw add ptr [[TMP2]], i32 [[TMP25]] monotonic, align 4
1145 // CHECK1-NEXT:    [[TMP27:%.*]] = load i32, ptr [[C5]], align 4
1146 // CHECK1-NEXT:    [[TMP28:%.*]] = atomicrmw add ptr [[TMP5]], i32 [[TMP27]] monotonic, align 4
1147 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1148 // CHECK1:       .omp.reduction.default:
1149 // CHECK1-NEXT:    ret void
1150 //
1151 //
1152 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func
1153 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {
1154 // CHECK1-NEXT:  entry:
1155 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
1156 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
1157 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
1158 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1159 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
1160 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1161 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 0
1162 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
1163 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 0
1164 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
1165 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 1
1166 // CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
1167 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 1
1168 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
1169 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 2
1170 // CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8
1171 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 2
1172 // CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8
1173 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP7]], align 4
1174 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 4
1175 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1176 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
1177 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP11]], align 4
1178 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP9]], align 4
1179 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1180 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[TMP11]], align 4
1181 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP15]], align 4
1182 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP13]], align 4
1183 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1184 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[TMP15]], align 4
1185 // CHECK1-NEXT:    ret void
1186 //
1187 //
1188 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1189 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1190 // CHECK1-NEXT:  entry:
1191 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1192 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1193 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1194 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1195 // CHECK1-NEXT:    [[TMP0:%.*]] = load volatile i32, ptr @g, align 128
1196 // CHECK1-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP0]] to float
1197 // CHECK1-NEXT:    store float [[CONV]], ptr [[F]], align 4
1198 // CHECK1-NEXT:    ret void
1199 //
1200 //
1201 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1202 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1203 // CHECK1-NEXT:  entry:
1204 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1205 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca float, align 4
1206 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1207 // CHECK1-NEXT:    store float [[A]], ptr [[A_ADDR]], align 4
1208 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1209 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1210 // CHECK1-NEXT:    [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1211 // CHECK1-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr @g, align 128
1212 // CHECK1-NEXT:    [[CONV:%.*]] = sitofp i32 [[TMP1]] to float
1213 // CHECK1-NEXT:    [[ADD:%.*]] = fadd float [[TMP0]], [[CONV]]
1214 // CHECK1-NEXT:    store float [[ADD]], ptr [[F]], align 4
1215 // CHECK1-NEXT:    ret void
1216 //
1217 //
1218 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1219 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1220 // CHECK1-NEXT:  entry:
1221 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1222 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1223 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1224 // CHECK1-NEXT:    ret void
1225 //
1226 //
1227 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1228 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1229 // CHECK1-NEXT:  entry:
1230 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1231 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1232 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1233 // CHECK1-NEXT:    call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1234 // CHECK1-NEXT:    ret void
1235 //
1236 //
1237 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC1Ev
1238 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1239 // CHECK1-NEXT:  entry:
1240 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1241 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1242 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1243 // CHECK1-NEXT:    call void @_ZN3SSTIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1244 // CHECK1-NEXT:    ret void
1245 //
1246 //
1247 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1248 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1249 // CHECK1-NEXT:  entry:
1250 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1251 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1252 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1253 // CHECK1-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1254 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1255 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1256 // CHECK1-NEXT:    call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
1257 // CHECK1-NEXT:    ret void
1258 //
1259 //
1260 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined
1261 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[T_VAR1:%.*]]) #[[ATTR1]] {
1262 // CHECK1-NEXT:  entry:
1263 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1264 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1265 // CHECK1-NEXT:    [[VEC_ADDR:%.*]] = alloca ptr, align 8
1266 // CHECK1-NEXT:    [[T_VAR_ADDR:%.*]] = alloca ptr, align 8
1267 // CHECK1-NEXT:    [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
1268 // CHECK1-NEXT:    [[VAR_ADDR:%.*]] = alloca ptr, align 8
1269 // CHECK1-NEXT:    [[VAR1_ADDR:%.*]] = alloca ptr, align 8
1270 // CHECK1-NEXT:    [[T_VAR1_ADDR:%.*]] = alloca ptr, align 8
1271 // CHECK1-NEXT:    [[T_VAR2:%.*]] = alloca i32, align 128
1272 // CHECK1-NEXT:    [[VAR3:%.*]] = alloca [[STRUCT_S_0:%.*]], align 128
1273 // CHECK1-NEXT:    [[VAR14:%.*]] = alloca [[STRUCT_S_0]], align 128
1274 // CHECK1-NEXT:    [[T_VAR15:%.*]] = alloca i32, align 128
1275 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [4 x ptr], align 8
1276 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S_0]], align 4
1277 // CHECK1-NEXT:    [[REF_TMP11:%.*]] = alloca [[STRUCT_S_0]], align 4
1278 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1279 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1280 // CHECK1-NEXT:    store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1281 // CHECK1-NEXT:    store ptr [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1282 // CHECK1-NEXT:    store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1283 // CHECK1-NEXT:    store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1284 // CHECK1-NEXT:    store ptr [[VAR1]], ptr [[VAR1_ADDR]], align 8
1285 // CHECK1-NEXT:    store ptr [[T_VAR1]], ptr [[T_VAR1_ADDR]], align 8
1286 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1287 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[T_VAR_ADDR]], align 8
1288 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1289 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1290 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[VAR1_ADDR]], align 8
1291 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[T_VAR1_ADDR]], align 8
1292 // CHECK1-NEXT:    store i32 0, ptr [[T_VAR2]], align 128
1293 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])
1294 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])
1295 // CHECK1-NEXT:    store i32 2147483647, ptr [[T_VAR15]], align 128
1296 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[T_VAR2]], align 128
1297 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i64 0, i64 0
1298 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[ARRAYIDX]], align 4
1299 // CHECK1-NEXT:    [[ARRAYIDX6:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP2]], i64 0, i64 0
1300 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX6]], ptr align 128 [[VAR3]], i64 4, i1 false)
1301 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1302 // CHECK1-NEXT:    store ptr [[T_VAR2]], ptr [[TMP7]], align 8
1303 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
1304 // CHECK1-NEXT:    store ptr [[VAR3]], ptr [[TMP8]], align 8
1305 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
1306 // CHECK1-NEXT:    store ptr [[VAR14]], ptr [[TMP9]], align 8
1307 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 3
1308 // CHECK1-NEXT:    store ptr [[T_VAR15]], ptr [[TMP10]], align 8
1309 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1310 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
1311 // CHECK1-NEXT:    [[TMP13:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP12]], i32 4, i64 32, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_Z5tmainIiET_v.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
1312 // CHECK1-NEXT:    switch i32 [[TMP13]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1313 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1314 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1315 // CHECK1-NEXT:    ]
1316 // CHECK1:       .omp.reduction.case1:
1317 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP1]], align 128
1318 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[T_VAR2]], align 128
1319 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
1320 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP1]], align 128
1321 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])
1322 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP3]], ptr align 4 [[CALL]], i64 4, i1 false)
1323 // CHECK1-NEXT:    [[CALL7:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]])
1324 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[CALL7]], 0
1325 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
1326 // CHECK1:       land.rhs:
1327 // CHECK1-NEXT:    [[CALL8:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])
1328 // CHECK1-NEXT:    [[TOBOOL9:%.*]] = icmp ne i32 [[CALL8]], 0
1329 // CHECK1-NEXT:    br label [[LAND_END]]
1330 // CHECK1:       land.end:
1331 // CHECK1-NEXT:    [[TMP16:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE1]] ], [ [[TOBOOL9]], [[LAND_RHS]] ]
1332 // CHECK1-NEXT:    [[CONV:%.*]] = zext i1 [[TMP16]] to i32
1333 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 noundef [[CONV]])
1334 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP4]], ptr align 4 [[REF_TMP]], i64 4, i1 false)
1335 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]
1336 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 128
1337 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[T_VAR15]], align 128
1338 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP17]], [[TMP18]]
1339 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1340 // CHECK1:       cond.true:
1341 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP5]], align 128
1342 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1343 // CHECK1:       cond.false:
1344 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[T_VAR15]], align 128
1345 // CHECK1-NEXT:    br label [[COND_END]]
1346 // CHECK1:       cond.end:
1347 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP19]], [[COND_TRUE]] ], [ [[TMP20]], [[COND_FALSE]] ]
1348 // CHECK1-NEXT:    store i32 [[COND]], ptr [[TMP5]], align 128
1349 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP12]], ptr @.gomp_critical_user_.reduction.var)
1350 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1351 // CHECK1:       .omp.reduction.case2:
1352 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 128
1353 // CHECK1-NEXT:    [[TMP22:%.*]] = atomicrmw add ptr [[TMP1]], i32 [[TMP21]] monotonic, align 4
1354 // CHECK1-NEXT:    call void @__kmpc_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)
1355 // CHECK1-NEXT:    [[CALL10:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP3]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]])
1356 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP3]], ptr align 4 [[CALL10]], i64 4, i1 false)
1357 // CHECK1-NEXT:    call void @__kmpc_end_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)
1358 // CHECK1-NEXT:    call void @__kmpc_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)
1359 // CHECK1-NEXT:    [[CALL12:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP4]])
1360 // CHECK1-NEXT:    [[TOBOOL13:%.*]] = icmp ne i32 [[CALL12]], 0
1361 // CHECK1-NEXT:    br i1 [[TOBOOL13]], label [[LAND_RHS14:%.*]], label [[LAND_END17:%.*]]
1362 // CHECK1:       land.rhs14:
1363 // CHECK1-NEXT:    [[CALL15:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]])
1364 // CHECK1-NEXT:    [[TOBOOL16:%.*]] = icmp ne i32 [[CALL15]], 0
1365 // CHECK1-NEXT:    br label [[LAND_END17]]
1366 // CHECK1:       land.end17:
1367 // CHECK1-NEXT:    [[TMP23:%.*]] = phi i1 [ false, [[DOTOMP_REDUCTION_CASE2]] ], [ [[TOBOOL16]], [[LAND_RHS14]] ]
1368 // CHECK1-NEXT:    [[CONV18:%.*]] = zext i1 [[TMP23]] to i32
1369 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP11]], i32 noundef [[CONV18]])
1370 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP4]], ptr align 4 [[REF_TMP11]], i64 4, i1 false)
1371 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP11]]) #[[ATTR5]]
1372 // CHECK1-NEXT:    call void @__kmpc_end_critical(ptr @[[GLOB2]], i32 [[TMP12]], ptr @.gomp_critical_user_.atomic_reduction.var)
1373 // CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[T_VAR15]], align 128
1374 // CHECK1-NEXT:    [[TMP25:%.*]] = atomicrmw min ptr [[TMP5]], i32 [[TMP24]] monotonic, align 4
1375 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1376 // CHECK1:       .omp.reduction.default:
1377 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR14]]) #[[ATTR5]]
1378 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR3]]) #[[ATTR5]]
1379 // CHECK1-NEXT:    ret void
1380 //
1381 //
1382 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v.omp_outlined.omp.reduction.reduction_func
1383 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {
1384 // CHECK1-NEXT:  entry:
1385 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
1386 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
1387 // CHECK1-NEXT:    [[REF_TMP:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1388 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
1389 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1390 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
1391 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1392 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 0
1393 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
1394 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 0
1395 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
1396 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 1
1397 // CHECK1-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
1398 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 1
1399 // CHECK1-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
1400 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 2
1401 // CHECK1-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8
1402 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 2
1403 // CHECK1-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8
1404 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP3]], i64 0, i64 3
1405 // CHECK1-NEXT:    [[TMP17:%.*]] = load ptr, ptr [[TMP16]], align 8
1406 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [4 x ptr], ptr [[TMP2]], i64 0, i64 3
1407 // CHECK1-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[TMP18]], align 8
1408 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP7]], align 128
1409 // CHECK1-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP5]], align 128
1410 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1411 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 128
1412 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef nonnull align 4 dereferenceable(4) ptr @_ZN1SIiEanERKS0_(ptr noundef nonnull align 4 dereferenceable(4) [[TMP11]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP9]])
1413 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP11]], ptr align 4 [[CALL]], i64 4, i1 false)
1414 // CHECK1-NEXT:    [[CALL2:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP15]])
1415 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[CALL2]], 0
1416 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[LAND_RHS:%.*]], label [[LAND_END:%.*]]
1417 // CHECK1:       land.rhs:
1418 // CHECK1-NEXT:    [[CALL3:%.*]] = call noundef i32 @_ZN1SIiEcviEv(ptr noundef nonnull align 4 dereferenceable(4) [[TMP13]])
1419 // CHECK1-NEXT:    [[TOBOOL4:%.*]] = icmp ne i32 [[CALL3]], 0
1420 // CHECK1-NEXT:    br label [[LAND_END]]
1421 // CHECK1:       land.end:
1422 // CHECK1-NEXT:    [[TMP22:%.*]] = phi i1 [ false, [[ENTRY:%.*]] ], [ [[TOBOOL4]], [[LAND_RHS]] ]
1423 // CHECK1-NEXT:    [[CONV:%.*]] = zext i1 [[TMP22]] to i32
1424 // CHECK1-NEXT:    call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]], i32 noundef [[CONV]])
1425 // CHECK1-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 128 [[TMP15]], ptr align 4 [[REF_TMP]], i64 4, i1 false)
1426 // CHECK1-NEXT:    call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[REF_TMP]]) #[[ATTR5]]
1427 // CHECK1-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP19]], align 128
1428 // CHECK1-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP17]], align 128
1429 // CHECK1-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP23]], [[TMP24]]
1430 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1431 // CHECK1:       cond.true:
1432 // CHECK1-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP19]], align 128
1433 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1434 // CHECK1:       cond.false:
1435 // CHECK1-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP17]], align 128
1436 // CHECK1-NEXT:    br label [[COND_END]]
1437 // CHECK1:       cond.end:
1438 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP25]], [[COND_TRUE]] ], [ [[TMP26]], [[COND_FALSE]] ]
1439 // CHECK1-NEXT:    store i32 [[COND]], ptr [[TMP19]], align 128
1440 // CHECK1-NEXT:    ret void
1441 //
1442 //
1443 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEanERKS0_
1444 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0:%.*]]) #[[ATTR0]] align 2 {
1445 // CHECK1-NEXT:  entry:
1446 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1447 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
1448 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1449 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
1450 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1451 // CHECK1-NEXT:    ret ptr [[THIS1]]
1452 //
1453 //
1454 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEcviEv
1455 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) #[[ATTR0]] align 2 {
1456 // CHECK1-NEXT:  entry:
1457 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1458 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1459 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1460 // CHECK1-NEXT:    ret i32 0
1461 //
1462 //
1463 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1464 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1465 // CHECK1-NEXT:  entry:
1466 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1467 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1468 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1469 // CHECK1-NEXT:    call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR5]]
1470 // CHECK1-NEXT:    ret void
1471 //
1472 //
1473 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1474 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1475 // CHECK1-NEXT:  entry:
1476 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1477 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1478 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1479 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1480 // CHECK1-NEXT:    [[TMP0:%.*]] = load volatile i32, ptr @g, align 128
1481 // CHECK1-NEXT:    store i32 [[TMP0]], ptr [[F]], align 4
1482 // CHECK1-NEXT:    ret void
1483 //
1484 //
1485 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev
1486 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1487 // CHECK1-NEXT:  entry:
1488 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1489 // CHECK1-NEXT:    [[A2:%.*]] = alloca ptr, align 8
1490 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1491 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1492 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SST:%.*]], ptr [[THIS1]], i32 0, i32 0
1493 // CHECK1-NEXT:    store i32 0, ptr [[A]], align 4
1494 // CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SST]], ptr [[THIS1]], i32 0, i32 0
1495 // CHECK1-NEXT:    store ptr [[A3]], ptr [[A2]], align 8
1496 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A2]], align 8
1497 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 2, ptr @_ZN3SSTIiEC2Ev.omp_outlined, ptr [[THIS1]], ptr [[TMP0]])
1498 // CHECK1-NEXT:    ret void
1499 //
1500 //
1501 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev.omp_outlined
1502 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR1]] {
1503 // CHECK1-NEXT:  entry:
1504 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1505 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1506 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1507 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1508 // CHECK1-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1509 // CHECK1-NEXT:    [[A1:%.*]] = alloca i32, align 4
1510 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca ptr, align 8
1511 // CHECK1-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8
1512 // CHECK1-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca i32, align 4
1513 // CHECK1-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
1514 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1515 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1516 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1517 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1518 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1519 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1520 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
1521 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
1522 // CHECK1-NEXT:    store i32 1, ptr [[A1]], align 4
1523 // CHECK1-NEXT:    store ptr [[A1]], ptr [[_TMP2]], align 8
1524 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[_TMP2]], align 8
1525 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1526 // CHECK1-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
1527 // CHECK1-NEXT:    store i32 [[INC]], ptr [[TMP3]], align 4
1528 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1529 // CHECK1-NEXT:    store ptr [[A1]], ptr [[TMP5]], align 8
1530 // CHECK1-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1531 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1532 // CHECK1-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP7]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_ZN3SSTIiEC2Ev.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
1533 // CHECK1-NEXT:    switch i32 [[TMP8]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1534 // CHECK1-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1535 // CHECK1-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1536 // CHECK1-NEXT:    ]
1537 // CHECK1:       .omp.reduction.case1:
1538 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP2]], align 4
1539 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[A1]], align 4
1540 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP9]], [[TMP10]]
1541 // CHECK1-NEXT:    store i32 [[MUL]], ptr [[TMP2]], align 4
1542 // CHECK1-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP7]], ptr @.gomp_critical_user_.reduction.var)
1543 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1544 // CHECK1:       .omp.reduction.case2:
1545 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[A1]], align 4
1546 // CHECK1-NEXT:    [[ATOMIC_LOAD:%.*]] = load atomic i32, ptr [[TMP2]] monotonic, align 4
1547 // CHECK1-NEXT:    br label [[ATOMIC_CONT:%.*]]
1548 // CHECK1:       atomic_cont:
1549 // CHECK1-NEXT:    [[TMP12:%.*]] = phi i32 [ [[ATOMIC_LOAD]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[TMP17:%.*]], [[ATOMIC_CONT]] ]
1550 // CHECK1-NEXT:    store i32 [[TMP12]], ptr [[_TMP3]], align 4
1551 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[_TMP3]], align 4
1552 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[A1]], align 4
1553 // CHECK1-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[TMP13]], [[TMP14]]
1554 // CHECK1-NEXT:    store i32 [[MUL4]], ptr [[ATOMIC_TEMP]], align 4
1555 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[ATOMIC_TEMP]], align 4
1556 // CHECK1-NEXT:    [[TMP16:%.*]] = cmpxchg ptr [[TMP2]], i32 [[TMP12]], i32 [[TMP15]] monotonic monotonic, align 4
1557 // CHECK1-NEXT:    [[TMP17]] = extractvalue { i32, i1 } [[TMP16]], 0
1558 // CHECK1-NEXT:    [[TMP18:%.*]] = extractvalue { i32, i1 } [[TMP16]], 1
1559 // CHECK1-NEXT:    br i1 [[TMP18]], label [[ATOMIC_EXIT:%.*]], label [[ATOMIC_CONT]]
1560 // CHECK1:       atomic_exit:
1561 // CHECK1-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1562 // CHECK1:       .omp.reduction.default:
1563 // CHECK1-NEXT:    ret void
1564 //
1565 //
1566 // CHECK1-LABEL: define {{[^@]+}}@_ZN3SSTIiEC2Ev.omp_outlined.omp.reduction.reduction_func
1567 // CHECK1-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {
1568 // CHECK1-NEXT:  entry:
1569 // CHECK1-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
1570 // CHECK1-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
1571 // CHECK1-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
1572 // CHECK1-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1573 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
1574 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1575 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0
1576 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
1577 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
1578 // CHECK1-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
1579 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1580 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 4
1581 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP8]], [[TMP9]]
1582 // CHECK1-NEXT:    store i32 [[MUL]], ptr [[TMP7]], align 4
1583 // CHECK1-NEXT:    ret void
1584 //
1585 //
1586 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1587 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1588 // CHECK1-NEXT:  entry:
1589 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1590 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1591 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1592 // CHECK1-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1593 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1594 // CHECK1-NEXT:    [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1595 // CHECK1-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1596 // CHECK1-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr @g, align 128
1597 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP0]], [[TMP1]]
1598 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[F]], align 4
1599 // CHECK1-NEXT:    ret void
1600 //
1601 //
1602 // CHECK1-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1603 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1604 // CHECK1-NEXT:  entry:
1605 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1606 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1607 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1608 // CHECK1-NEXT:    ret void
1609 //
1610 //
1611 // CHECK3-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs
1612 // CHECK3-SAME: (ptr noundef [[X:%.*]]) #[[ATTR0:[0-9]+]] {
1613 // CHECK3-NEXT:  entry:
1614 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
1615 // CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
1616 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
1617 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @_Z14foo_array_sectPs.omp_outlined, ptr [[TMP0]])
1618 // CHECK3-NEXT:    ret void
1619 //
1620 //
1621 // CHECK3-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined
1622 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] {
1623 // CHECK3-NEXT:  entry:
1624 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1625 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1626 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
1627 // CHECK3-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
1628 // CHECK3-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
1629 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1630 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 8
1631 // CHECK3-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca i16, align 2
1632 // CHECK3-NEXT:    [[_TMP13:%.*]] = alloca i16, align 2
1633 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1634 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1635 // CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
1636 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
1637 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[TMP0]], i64 0
1638 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
1639 // CHECK3-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[TMP1]], i64 0
1640 // CHECK3-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[ARRAYIDX1]] to i64
1641 // CHECK3-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i64
1642 // CHECK3-NEXT:    [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]]
1643 // CHECK3-NEXT:    [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)
1644 // CHECK3-NEXT:    [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1
1645 // CHECK3-NEXT:    [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)
1646 // CHECK3-NEXT:    [[TMP8:%.*]] = call ptr @llvm.stacksave.p0()
1647 // CHECK3-NEXT:    store ptr [[TMP8]], ptr [[SAVED_STACK]], align 8
1648 // CHECK3-NEXT:    [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16
1649 // CHECK3-NEXT:    store i64 [[TMP6]], ptr [[__VLA_EXPR0]], align 8
1650 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP6]]
1651 // CHECK3-NEXT:    [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP9]]
1652 // CHECK3-NEXT:    br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
1653 // CHECK3:       omp.arrayinit.body:
1654 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
1655 // CHECK3-NEXT:    store i16 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
1656 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1657 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
1658 // CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
1659 // CHECK3:       omp.arrayinit.done:
1660 // CHECK3-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[X_ADDR]], align 8
1661 // CHECK3-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[TMP10]] to i64
1662 // CHECK3-NEXT:    [[TMP12:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i64
1663 // CHECK3-NEXT:    [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]]
1664 // CHECK3-NEXT:    [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)
1665 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP14]]
1666 // CHECK3-NEXT:    store ptr [[TMP15]], ptr [[TMP]], align 8
1667 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1668 // CHECK3-NEXT:    store ptr [[VLA]], ptr [[TMP16]], align 8
1669 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
1670 // CHECK3-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP6]] to ptr
1671 // CHECK3-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 8
1672 // CHECK3-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1673 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
1674 // CHECK3-NEXT:    [[TMP21:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1:[0-9]+]], i32 [[TMP20]], i32 1, i64 16, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
1675 // CHECK3-NEXT:    switch i32 [[TMP21]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1676 // CHECK3-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1677 // CHECK3-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1678 // CHECK3-NEXT:    ]
1679 // CHECK3:       .omp.reduction.case1:
1680 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]
1681 // CHECK3-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP22]]
1682 // CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1683 // CHECK3:       omp.arraycpy.body:
1684 // CHECK3-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1685 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1686 // CHECK3-NEXT:    [[TMP23:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
1687 // CHECK3-NEXT:    [[CONV:%.*]] = sext i16 [[TMP23]] to i32
1688 // CHECK3-NEXT:    [[TMP24:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
1689 // CHECK3-NEXT:    [[CONV3:%.*]] = sext i16 [[TMP24]] to i32
1690 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]]
1691 // CHECK3-NEXT:    [[CONV4:%.*]] = trunc i32 [[ADD]] to i16
1692 // CHECK3-NEXT:    store i16 [[CONV4]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
1693 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1
1694 // CHECK3-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1695 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP22]]
1696 // CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]
1697 // CHECK3:       omp.arraycpy.done7:
1698 // CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP20]], ptr @.gomp_critical_user_.reduction.var)
1699 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1700 // CHECK3:       .omp.reduction.case2:
1701 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]
1702 // CHECK3-NEXT:    [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP25]]
1703 // CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]]
1704 // CHECK3:       omp.arraycpy.body9:
1705 // CHECK3-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ]
1706 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ]
1707 // CHECK3-NEXT:    [[TMP26:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
1708 // CHECK3-NEXT:    [[CONV12:%.*]] = sext i16 [[TMP26]] to i32
1709 // CHECK3-NEXT:    [[ATOMIC_LOAD:%.*]] = load atomic i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2
1710 // CHECK3-NEXT:    br label [[ATOMIC_CONT:%.*]]
1711 // CHECK3:       atomic_cont:
1712 // CHECK3-NEXT:    [[TMP27:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP32:%.*]], [[ATOMIC_CONT]] ]
1713 // CHECK3-NEXT:    store i16 [[TMP27]], ptr [[_TMP13]], align 2
1714 // CHECK3-NEXT:    [[TMP28:%.*]] = load i16, ptr [[_TMP13]], align 2
1715 // CHECK3-NEXT:    [[CONV14:%.*]] = sext i16 [[TMP28]] to i32
1716 // CHECK3-NEXT:    [[TMP29:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
1717 // CHECK3-NEXT:    [[CONV15:%.*]] = sext i16 [[TMP29]] to i32
1718 // CHECK3-NEXT:    [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]]
1719 // CHECK3-NEXT:    [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16
1720 // CHECK3-NEXT:    store i16 [[CONV17]], ptr [[ATOMIC_TEMP]], align 2
1721 // CHECK3-NEXT:    [[TMP30:%.*]] = load i16, ptr [[ATOMIC_TEMP]], align 2
1722 // CHECK3-NEXT:    [[TMP31:%.*]] = cmpxchg ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP27]], i16 [[TMP30]] monotonic monotonic, align 2
1723 // CHECK3-NEXT:    [[TMP32]] = extractvalue { i16, i1 } [[TMP31]], 0
1724 // CHECK3-NEXT:    [[TMP33:%.*]] = extractvalue { i16, i1 } [[TMP31]], 1
1725 // CHECK3-NEXT:    br i1 [[TMP33]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]
1726 // CHECK3:       atomic_exit:
1727 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1
1728 // CHECK3-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1
1729 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP25]]
1730 // CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]]
1731 // CHECK3:       omp.arraycpy.done21:
1732 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1733 // CHECK3:       .omp.reduction.default:
1734 // CHECK3-NEXT:    [[TMP34:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
1735 // CHECK3-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP34]])
1736 // CHECK3-NEXT:    ret void
1737 //
1738 //
1739 // CHECK3-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func
1740 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3:[0-9]+]] {
1741 // CHECK3-NEXT:  entry:
1742 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
1743 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
1744 // CHECK3-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
1745 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1746 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
1747 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1748 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP3]], i64 0, i64 0
1749 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
1750 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 0
1751 // CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
1752 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 1
1753 // CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
1754 // CHECK3-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[TMP9]] to i64
1755 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr i16, ptr [[TMP7]], i64 [[TMP10]]
1756 // CHECK3-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP7]], [[TMP11]]
1757 // CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1758 // CHECK3:       omp.arraycpy.body:
1759 // CHECK3-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1760 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP7]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1761 // CHECK3-NEXT:    [[TMP12:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
1762 // CHECK3-NEXT:    [[CONV:%.*]] = sext i16 [[TMP12]] to i32
1763 // CHECK3-NEXT:    [[TMP13:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
1764 // CHECK3-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP13]] to i32
1765 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
1766 // CHECK3-NEXT:    [[CONV3:%.*]] = trunc i32 [[ADD]] to i16
1767 // CHECK3-NEXT:    store i16 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
1768 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1769 // CHECK3-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1770 // CHECK3-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP11]]
1771 // CHECK3-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
1772 // CHECK3:       omp.arraycpy.done4:
1773 // CHECK3-NEXT:    ret void
1774 //
1775 //
1776 // CHECK3-LABEL: define {{[^@]+}}@main
1777 // CHECK3-SAME: () #[[ATTR6:[0-9]+]] {
1778 // CHECK3-NEXT:  entry:
1779 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1780 // CHECK3-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
1781 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 1
1782 // CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1783 // CHECK3-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @sivar)
1784 // CHECK3-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 1 dereferenceable(1) [[REF_TMP]])
1785 // CHECK3-NEXT:    ret i32 0
1786 //
1787 //
1788 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
1789 // CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7:[0-9]+]] align 2 {
1790 // CHECK3-NEXT:  entry:
1791 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1792 // CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
1793 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1794 // CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
1795 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1796 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
1797 // CHECK3-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])
1798 // CHECK3-NEXT:    ret void
1799 //
1800 //
1801 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
1802 // CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR7]] align 2 {
1803 // CHECK3-NEXT:  entry:
1804 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1805 // CHECK3-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
1806 // CHECK3-NEXT:    [[A2:%.*]] = alloca ptr, align 8
1807 // CHECK3-NEXT:    [[B4:%.*]] = alloca i32, align 4
1808 // CHECK3-NEXT:    [[C5:%.*]] = alloca ptr, align 8
1809 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1810 // CHECK3-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
1811 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1812 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
1813 // CHECK3-NEXT:    store i32 0, ptr [[A]], align 8
1814 // CHECK3-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1
1815 // CHECK3-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4
1816 // CHECK3-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
1817 // CHECK3-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
1818 // CHECK3-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 4
1819 // CHECK3-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
1820 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
1821 // CHECK3-NEXT:    store ptr [[TMP0]], ptr [[C]], align 8
1822 // CHECK3-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1823 // CHECK3-NEXT:    store ptr [[A3]], ptr [[A2]], align 8
1824 // CHECK3-NEXT:    [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
1825 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C6]], align 8
1826 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[C5]], align 8
1827 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A2]], align 8
1828 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C5]], align 8
1829 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]], ptr [[TMP2]], ptr [[B4]], ptr [[TMP3]])
1830 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[B4]], align 4
1831 // CHECK3-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1
1832 // CHECK3-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
1833 // CHECK3-NEXT:    [[BF_LOAD8:%.*]] = load i8, ptr [[B7]], align 4
1834 // CHECK3-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
1835 // CHECK3-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
1836 // CHECK3-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
1837 // CHECK3-NEXT:    store i8 [[BF_SET10]], ptr [[B7]], align 4
1838 // CHECK3-NEXT:    ret void
1839 //
1840 //
1841 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
1842 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
1843 // CHECK3-NEXT:  entry:
1844 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1845 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1846 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1847 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1848 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
1849 // CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
1850 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
1851 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
1852 // CHECK3-NEXT:    [[A2:%.*]] = alloca i32, align 4
1853 // CHECK3-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
1854 // CHECK3-NEXT:    [[B4:%.*]] = alloca i32, align 4
1855 // CHECK3-NEXT:    [[C5:%.*]] = alloca i32, align 4
1856 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
1857 // CHECK3-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1858 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 8
1859 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1860 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1861 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1862 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1863 // CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8
1864 // CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
1865 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1866 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1867 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8
1868 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8
1869 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
1870 // CHECK3-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 8
1871 // CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
1872 // CHECK3-NEXT:    store i32 0, ptr [[A2]], align 4
1873 // CHECK3-NEXT:    store ptr [[A2]], ptr [[_TMP3]], align 8
1874 // CHECK3-NEXT:    store i32 0, ptr [[B4]], align 4
1875 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
1876 // CHECK3-NEXT:    store i32 0, ptr [[C5]], align 4
1877 // CHECK3-NEXT:    store ptr [[C5]], ptr [[_TMP6]], align 8
1878 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
1879 // CHECK3-NEXT:    store ptr [[TMP0]], ptr [[TMP6]], align 8
1880 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
1881 // CHECK3-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP3]], align 8
1882 // CHECK3-NEXT:    store ptr [[TMP8]], ptr [[TMP7]], align 8
1883 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
1884 // CHECK3-NEXT:    store ptr [[B4]], ptr [[TMP9]], align 8
1885 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
1886 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[_TMP6]], align 8
1887 // CHECK3-NEXT:    store ptr [[TMP11]], ptr [[TMP10]], align 8
1888 // CHECK3-NEXT:    call void @_ZZN2SSC1ERiENKUlvE_clEv(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
1889 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
1890 // CHECK3-NEXT:    store ptr [[A2]], ptr [[TMP12]], align 8
1891 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
1892 // CHECK3-NEXT:    store ptr [[B4]], ptr [[TMP13]], align 8
1893 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
1894 // CHECK3-NEXT:    store ptr [[C5]], ptr [[TMP14]], align 8
1895 // CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1896 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP15]], align 4
1897 // CHECK3-NEXT:    [[TMP17:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP16]], i32 3, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
1898 // CHECK3-NEXT:    switch i32 [[TMP17]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
1899 // CHECK3-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
1900 // CHECK3-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
1901 // CHECK3-NEXT:    ]
1902 // CHECK3:       .omp.reduction.case1:
1903 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP4]], align 4
1904 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[A2]], align 4
1905 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1906 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[TMP4]], align 4
1907 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP2]], align 4
1908 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[B4]], align 4
1909 // CHECK3-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1910 // CHECK3-NEXT:    store i32 [[ADD7]], ptr [[TMP2]], align 4
1911 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP5]], align 4
1912 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[C5]], align 4
1913 // CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
1914 // CHECK3-NEXT:    store i32 [[ADD8]], ptr [[TMP5]], align 4
1915 // CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP16]], ptr @.gomp_critical_user_.reduction.var)
1916 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1917 // CHECK3:       .omp.reduction.case2:
1918 // CHECK3-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A2]], align 4
1919 // CHECK3-NEXT:    [[TMP25:%.*]] = atomicrmw add ptr [[TMP4]], i32 [[TMP24]] monotonic, align 4
1920 // CHECK3-NEXT:    [[TMP26:%.*]] = load i32, ptr [[B4]], align 4
1921 // CHECK3-NEXT:    [[TMP27:%.*]] = atomicrmw add ptr [[TMP2]], i32 [[TMP26]] monotonic, align 4
1922 // CHECK3-NEXT:    [[TMP28:%.*]] = load i32, ptr [[C5]], align 4
1923 // CHECK3-NEXT:    [[TMP29:%.*]] = atomicrmw add ptr [[TMP5]], i32 [[TMP28]] monotonic, align 4
1924 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
1925 // CHECK3:       .omp.reduction.default:
1926 // CHECK3-NEXT:    ret void
1927 //
1928 //
1929 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv
1930 // CHECK3-SAME: (ptr noundef nonnull align 8 dereferenceable(32) [[THIS:%.*]]) #[[ATTR0]] align 2 {
1931 // CHECK3-NEXT:  entry:
1932 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1933 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1934 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1935 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1936 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[TMP0]], align 8
1937 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 1
1938 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8
1939 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1940 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
1941 // CHECK3-NEXT:    store i32 [[INC]], ptr [[TMP3]], align 4
1942 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 2
1943 // CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[TMP5]], align 8
1944 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1945 // CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP7]], -1
1946 // CHECK3-NEXT:    store i32 [[DEC]], ptr [[TMP6]], align 4
1947 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 3
1948 // CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
1949 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
1950 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
1951 // CHECK3-NEXT:    store i32 [[DIV]], ptr [[TMP9]], align 4
1952 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 1
1953 // CHECK3-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[TMP11]], align 8
1954 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 2
1955 // CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[TMP13]], align 8
1956 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[THIS1]], i32 0, i32 3
1957 // CHECK3-NEXT:    [[TMP16:%.*]] = load ptr, ptr [[TMP15]], align 8
1958 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined, ptr [[TMP1]], ptr [[TMP12]], ptr [[TMP14]], ptr [[TMP16]])
1959 // CHECK3-NEXT:    ret void
1960 //
1961 //
1962 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func
1963 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {
1964 // CHECK3-NEXT:  entry:
1965 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
1966 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
1967 // CHECK3-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
1968 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
1969 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
1970 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
1971 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 0
1972 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
1973 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 0
1974 // CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
1975 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 1
1976 // CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
1977 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 1
1978 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
1979 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 2
1980 // CHECK3-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8
1981 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 2
1982 // CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8
1983 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP7]], align 4
1984 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 4
1985 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
1986 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
1987 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP11]], align 4
1988 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP9]], align 4
1989 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
1990 // CHECK3-NEXT:    store i32 [[ADD2]], ptr [[TMP11]], align 4
1991 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP15]], align 4
1992 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP13]], align 4
1993 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
1994 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[TMP15]], align 4
1995 // CHECK3-NEXT:    ret void
1996 //
1997 //
1998 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined
1999 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR1]] {
2000 // CHECK3-NEXT:  entry:
2001 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2002 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2003 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2004 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2005 // CHECK3-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
2006 // CHECK3-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
2007 // CHECK3-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2008 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
2009 // CHECK3-NEXT:    [[A2:%.*]] = alloca i32, align 4
2010 // CHECK3-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
2011 // CHECK3-NEXT:    [[B4:%.*]] = alloca i32, align 4
2012 // CHECK3-NEXT:    [[C5:%.*]] = alloca i32, align 4
2013 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
2014 // CHECK3-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 8
2015 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2016 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2017 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2018 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2019 // CHECK3-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8
2020 // CHECK3-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
2021 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2022 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2023 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8
2024 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8
2025 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
2026 // CHECK3-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 8
2027 // CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
2028 // CHECK3-NEXT:    store i32 -1, ptr [[A2]], align 4
2029 // CHECK3-NEXT:    store ptr [[A2]], ptr [[_TMP3]], align 8
2030 // CHECK3-NEXT:    store i32 -1, ptr [[B4]], align 4
2031 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
2032 // CHECK3-NEXT:    store i32 -1, ptr [[C5]], align 4
2033 // CHECK3-NEXT:    store ptr [[C5]], ptr [[_TMP6]], align 8
2034 // CHECK3-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP3]], align 8
2035 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
2036 // CHECK3-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP7]], 1
2037 // CHECK3-NEXT:    store i32 [[INC]], ptr [[TMP6]], align 4
2038 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[B4]], align 4
2039 // CHECK3-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP8]], -1
2040 // CHECK3-NEXT:    store i32 [[DEC]], ptr [[B4]], align 4
2041 // CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP6]], align 8
2042 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
2043 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
2044 // CHECK3-NEXT:    store i32 [[DIV]], ptr [[TMP9]], align 4
2045 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2046 // CHECK3-NEXT:    store ptr [[A2]], ptr [[TMP11]], align 8
2047 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
2048 // CHECK3-NEXT:    store ptr [[B4]], ptr [[TMP12]], align 8
2049 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
2050 // CHECK3-NEXT:    store ptr [[C5]], ptr [[TMP13]], align 8
2051 // CHECK3-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2052 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
2053 // CHECK3-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], i32 3, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
2054 // CHECK3-NEXT:    switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2055 // CHECK3-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2056 // CHECK3-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2057 // CHECK3-NEXT:    ]
2058 // CHECK3:       .omp.reduction.case1:
2059 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP4]], align 4
2060 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[A2]], align 4
2061 // CHECK3-NEXT:    [[AND:%.*]] = and i32 [[TMP17]], [[TMP18]]
2062 // CHECK3-NEXT:    store i32 [[AND]], ptr [[TMP4]], align 4
2063 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP2]], align 4
2064 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[B4]], align 4
2065 // CHECK3-NEXT:    [[AND7:%.*]] = and i32 [[TMP19]], [[TMP20]]
2066 // CHECK3-NEXT:    store i32 [[AND7]], ptr [[TMP2]], align 4
2067 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP5]], align 4
2068 // CHECK3-NEXT:    [[TMP22:%.*]] = load i32, ptr [[C5]], align 4
2069 // CHECK3-NEXT:    [[AND8:%.*]] = and i32 [[TMP21]], [[TMP22]]
2070 // CHECK3-NEXT:    store i32 [[AND8]], ptr [[TMP5]], align 4
2071 // CHECK3-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.reduction.var)
2072 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
2073 // CHECK3:       .omp.reduction.case2:
2074 // CHECK3-NEXT:    [[TMP23:%.*]] = load i32, ptr [[A2]], align 4
2075 // CHECK3-NEXT:    [[TMP24:%.*]] = atomicrmw and ptr [[TMP4]], i32 [[TMP23]] monotonic, align 4
2076 // CHECK3-NEXT:    [[TMP25:%.*]] = load i32, ptr [[B4]], align 4
2077 // CHECK3-NEXT:    [[TMP26:%.*]] = atomicrmw and ptr [[TMP2]], i32 [[TMP25]] monotonic, align 4
2078 // CHECK3-NEXT:    [[TMP27:%.*]] = load i32, ptr [[C5]], align 4
2079 // CHECK3-NEXT:    [[TMP28:%.*]] = atomicrmw and ptr [[TMP5]], i32 [[TMP27]] monotonic, align 4
2080 // CHECK3-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
2081 // CHECK3:       .omp.reduction.default:
2082 // CHECK3-NEXT:    ret void
2083 //
2084 //
2085 // CHECK3-LABEL: define {{[^@]+}}@_ZZN2SSC1ERiENKUlvE_clEv.omp_outlined.omp.reduction.reduction_func
2086 // CHECK3-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR3]] {
2087 // CHECK3-NEXT:  entry:
2088 // CHECK3-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
2089 // CHECK3-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
2090 // CHECK3-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
2091 // CHECK3-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
2092 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
2093 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
2094 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 0
2095 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
2096 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 0
2097 // CHECK3-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
2098 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 1
2099 // CHECK3-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
2100 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 1
2101 // CHECK3-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
2102 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 2
2103 // CHECK3-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8
2104 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 2
2105 // CHECK3-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8
2106 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP7]], align 4
2107 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 4
2108 // CHECK3-NEXT:    [[AND:%.*]] = and i32 [[TMP16]], [[TMP17]]
2109 // CHECK3-NEXT:    store i32 [[AND]], ptr [[TMP7]], align 4
2110 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP11]], align 4
2111 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP9]], align 4
2112 // CHECK3-NEXT:    [[AND2:%.*]] = and i32 [[TMP18]], [[TMP19]]
2113 // CHECK3-NEXT:    store i32 [[AND2]], ptr [[TMP11]], align 4
2114 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP15]], align 4
2115 // CHECK3-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP13]], align 4
2116 // CHECK3-NEXT:    [[AND3:%.*]] = and i32 [[TMP20]], [[TMP21]]
2117 // CHECK3-NEXT:    store i32 [[AND3]], ptr [[TMP15]], align 4
2118 // CHECK3-NEXT:    ret void
2119 //
2120 //
2121 // CHECK4-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs
2122 // CHECK4-SAME: (ptr noundef [[X:%.*]]) #[[ATTR1:[0-9]+]] {
2123 // CHECK4-NEXT:  entry:
2124 // CHECK4-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
2125 // CHECK4-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
2126 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
2127 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @_Z14foo_array_sectPs.omp_outlined, ptr [[TMP0]])
2128 // CHECK4-NEXT:    ret void
2129 //
2130 //
2131 // CHECK4-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined
2132 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[X:%.*]]) #[[ATTR2:[0-9]+]] {
2133 // CHECK4-NEXT:  entry:
2134 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2135 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2136 // CHECK4-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
2137 // CHECK4-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
2138 // CHECK4-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
2139 // CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2140 // CHECK4-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [2 x ptr], align 8
2141 // CHECK4-NEXT:    [[ATOMIC_TEMP:%.*]] = alloca i16, align 2
2142 // CHECK4-NEXT:    [[_TMP13:%.*]] = alloca i16, align 2
2143 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2144 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2145 // CHECK4-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
2146 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[X_ADDR]], align 8
2147 // CHECK4-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i16, ptr [[TMP0]], i64 0
2148 // CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
2149 // CHECK4-NEXT:    [[ARRAYIDX1:%.*]] = getelementptr inbounds i16, ptr [[TMP1]], i64 0
2150 // CHECK4-NEXT:    [[TMP2:%.*]] = ptrtoint ptr [[ARRAYIDX1]] to i64
2151 // CHECK4-NEXT:    [[TMP3:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i64
2152 // CHECK4-NEXT:    [[TMP4:%.*]] = sub i64 [[TMP2]], [[TMP3]]
2153 // CHECK4-NEXT:    [[TMP5:%.*]] = sdiv exact i64 [[TMP4]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)
2154 // CHECK4-NEXT:    [[TMP6:%.*]] = add nuw i64 [[TMP5]], 1
2155 // CHECK4-NEXT:    [[TMP7:%.*]] = mul nuw i64 [[TMP6]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)
2156 // CHECK4-NEXT:    [[TMP8:%.*]] = call ptr @llvm.stacksave.p0()
2157 // CHECK4-NEXT:    store ptr [[TMP8]], ptr [[SAVED_STACK]], align 8
2158 // CHECK4-NEXT:    [[VLA:%.*]] = alloca i16, i64 [[TMP6]], align 16
2159 // CHECK4-NEXT:    store i64 [[TMP6]], ptr [[__VLA_EXPR0]], align 8
2160 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP6]]
2161 // CHECK4-NEXT:    [[OMP_ARRAYINIT_ISEMPTY:%.*]] = icmp eq ptr [[VLA]], [[TMP9]]
2162 // CHECK4-NEXT:    br i1 [[OMP_ARRAYINIT_ISEMPTY]], label [[OMP_ARRAYINIT_DONE:%.*]], label [[OMP_ARRAYINIT_BODY:%.*]]
2163 // CHECK4:       omp.arrayinit.body:
2164 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYINIT_BODY]] ]
2165 // CHECK4-NEXT:    store i16 0, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
2166 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2167 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP9]]
2168 // CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYINIT_DONE]], label [[OMP_ARRAYINIT_BODY]]
2169 // CHECK4:       omp.arrayinit.done:
2170 // CHECK4-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[X_ADDR]], align 8
2171 // CHECK4-NEXT:    [[TMP11:%.*]] = ptrtoint ptr [[TMP10]] to i64
2172 // CHECK4-NEXT:    [[TMP12:%.*]] = ptrtoint ptr [[ARRAYIDX]] to i64
2173 // CHECK4-NEXT:    [[TMP13:%.*]] = sub i64 [[TMP11]], [[TMP12]]
2174 // CHECK4-NEXT:    [[TMP14:%.*]] = sdiv exact i64 [[TMP13]], ptrtoint (ptr getelementptr (i16, ptr null, i32 1) to i64)
2175 // CHECK4-NEXT:    [[TMP15:%.*]] = getelementptr i16, ptr [[VLA]], i64 [[TMP14]]
2176 // CHECK4-NEXT:    store ptr [[TMP15]], ptr [[TMP]], align 8
2177 // CHECK4-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2178 // CHECK4-NEXT:    store ptr [[VLA]], ptr [[TMP16]], align 8
2179 // CHECK4-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
2180 // CHECK4-NEXT:    [[TMP18:%.*]] = inttoptr i64 [[TMP6]] to ptr
2181 // CHECK4-NEXT:    store ptr [[TMP18]], ptr [[TMP17]], align 8
2182 // CHECK4-NEXT:    [[TMP19:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2183 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP19]], align 4
2184 // CHECK4-NEXT:    [[TMP21:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1:[0-9]+]], i32 [[TMP20]], i32 1, i64 16, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
2185 // CHECK4-NEXT:    switch i32 [[TMP21]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2186 // CHECK4-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2187 // CHECK4-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2188 // CHECK4-NEXT:    ]
2189 // CHECK4:       .omp.reduction.case1:
2190 // CHECK4-NEXT:    [[TMP22:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]
2191 // CHECK4-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP22]]
2192 // CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE7:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2193 // CHECK4:       omp.arraycpy.body:
2194 // CHECK4-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2195 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST2:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE1]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT5:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2196 // CHECK4-NEXT:    [[TMP23:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
2197 // CHECK4-NEXT:    [[CONV:%.*]] = sext i16 [[TMP23]] to i32
2198 // CHECK4-NEXT:    [[TMP24:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
2199 // CHECK4-NEXT:    [[CONV3:%.*]] = sext i16 [[TMP24]] to i32
2200 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV3]]
2201 // CHECK4-NEXT:    [[CONV4:%.*]] = trunc i32 [[ADD]] to i16
2202 // CHECK4-NEXT:    store i16 [[CONV4]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], align 2
2203 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT5]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST2]], i32 1
2204 // CHECK4-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2205 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DONE6:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT5]], [[TMP22]]
2206 // CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_DONE6]], label [[OMP_ARRAYCPY_DONE7]], label [[OMP_ARRAYCPY_BODY]]
2207 // CHECK4:       omp.arraycpy.done7:
2208 // CHECK4-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP20]], ptr @.gomp_critical_user_.reduction.var)
2209 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
2210 // CHECK4:       .omp.reduction.case2:
2211 // CHECK4-NEXT:    [[TMP25:%.*]] = getelementptr i16, ptr [[ARRAYIDX]], i64 [[TMP6]]
2212 // CHECK4-NEXT:    [[OMP_ARRAYCPY_ISEMPTY8:%.*]] = icmp eq ptr [[ARRAYIDX]], [[TMP25]]
2213 // CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY8]], label [[OMP_ARRAYCPY_DONE21:%.*]], label [[OMP_ARRAYCPY_BODY9:%.*]]
2214 // CHECK4:       omp.arraycpy.body9:
2215 // CHECK4-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST10:%.*]] = phi ptr [ [[VLA]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT19:%.*]], [[ATOMIC_EXIT:%.*]] ]
2216 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST11:%.*]] = phi ptr [ [[ARRAYIDX]], [[DOTOMP_REDUCTION_CASE2]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT18:%.*]], [[ATOMIC_EXIT]] ]
2217 // CHECK4-NEXT:    [[TMP26:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
2218 // CHECK4-NEXT:    [[CONV12:%.*]] = sext i16 [[TMP26]] to i32
2219 // CHECK4-NEXT:    [[ATOMIC_LOAD:%.*]] = load atomic i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]] monotonic, align 2
2220 // CHECK4-NEXT:    br label [[ATOMIC_CONT:%.*]]
2221 // CHECK4:       atomic_cont:
2222 // CHECK4-NEXT:    [[TMP27:%.*]] = phi i16 [ [[ATOMIC_LOAD]], [[OMP_ARRAYCPY_BODY9]] ], [ [[TMP32:%.*]], [[ATOMIC_CONT]] ]
2223 // CHECK4-NEXT:    store i16 [[TMP27]], ptr [[_TMP13]], align 2
2224 // CHECK4-NEXT:    [[TMP28:%.*]] = load i16, ptr [[_TMP13]], align 2
2225 // CHECK4-NEXT:    [[CONV14:%.*]] = sext i16 [[TMP28]] to i32
2226 // CHECK4-NEXT:    [[TMP29:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], align 2
2227 // CHECK4-NEXT:    [[CONV15:%.*]] = sext i16 [[TMP29]] to i32
2228 // CHECK4-NEXT:    [[ADD16:%.*]] = add nsw i32 [[CONV14]], [[CONV15]]
2229 // CHECK4-NEXT:    [[CONV17:%.*]] = trunc i32 [[ADD16]] to i16
2230 // CHECK4-NEXT:    store i16 [[CONV17]], ptr [[ATOMIC_TEMP]], align 2
2231 // CHECK4-NEXT:    [[TMP30:%.*]] = load i16, ptr [[ATOMIC_TEMP]], align 2
2232 // CHECK4-NEXT:    [[TMP31:%.*]] = cmpxchg ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i16 [[TMP27]], i16 [[TMP30]] monotonic monotonic, align 2
2233 // CHECK4-NEXT:    [[TMP32]] = extractvalue { i16, i1 } [[TMP31]], 0
2234 // CHECK4-NEXT:    [[TMP33:%.*]] = extractvalue { i16, i1 } [[TMP31]], 1
2235 // CHECK4-NEXT:    br i1 [[TMP33]], label [[ATOMIC_EXIT]], label [[ATOMIC_CONT]]
2236 // CHECK4:       atomic_exit:
2237 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT18]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST11]], i32 1
2238 // CHECK4-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT19]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST10]], i32 1
2239 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DONE20:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT18]], [[TMP25]]
2240 // CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_DONE20]], label [[OMP_ARRAYCPY_DONE21]], label [[OMP_ARRAYCPY_BODY9]]
2241 // CHECK4:       omp.arraycpy.done21:
2242 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
2243 // CHECK4:       .omp.reduction.default:
2244 // CHECK4-NEXT:    [[TMP34:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
2245 // CHECK4-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP34]])
2246 // CHECK4-NEXT:    ret void
2247 //
2248 //
2249 // CHECK4-LABEL: define {{[^@]+}}@_Z14foo_array_sectPs.omp_outlined.omp.reduction.reduction_func
2250 // CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4:[0-9]+]] {
2251 // CHECK4-NEXT:  entry:
2252 // CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
2253 // CHECK4-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
2254 // CHECK4-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
2255 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
2256 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
2257 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
2258 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP3]], i64 0, i64 0
2259 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
2260 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 0
2261 // CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
2262 // CHECK4-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[TMP2]], i64 0, i64 1
2263 // CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
2264 // CHECK4-NEXT:    [[TMP10:%.*]] = ptrtoint ptr [[TMP9]] to i64
2265 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr i16, ptr [[TMP7]], i64 [[TMP10]]
2266 // CHECK4-NEXT:    [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[TMP7]], [[TMP11]]
2267 // CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE4:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
2268 // CHECK4:       omp.arraycpy.body:
2269 // CHECK4-NEXT:    [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[TMP5]], [[ENTRY:%.*]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2270 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[TMP7]], [[ENTRY]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
2271 // CHECK4-NEXT:    [[TMP12:%.*]] = load i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
2272 // CHECK4-NEXT:    [[CONV:%.*]] = sext i16 [[TMP12]] to i32
2273 // CHECK4-NEXT:    [[TMP13:%.*]] = load i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], align 2
2274 // CHECK4-NEXT:    [[CONV2:%.*]] = sext i16 [[TMP13]] to i32
2275 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[CONV]], [[CONV2]]
2276 // CHECK4-NEXT:    [[CONV3:%.*]] = trunc i32 [[ADD]] to i16
2277 // CHECK4-NEXT:    store i16 [[CONV3]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], align 2
2278 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
2279 // CHECK4-NEXT:    [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr i16, ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
2280 // CHECK4-NEXT:    [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP11]]
2281 // CHECK4-NEXT:    br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE4]], label [[OMP_ARRAYCPY_BODY]]
2282 // CHECK4:       omp.arraycpy.done4:
2283 // CHECK4-NEXT:    ret void
2284 //
2285 //
2286 // CHECK4-LABEL: define {{[^@]+}}@main
2287 // CHECK4-SAME: () #[[ATTR7:[0-9]+]] {
2288 // CHECK4-NEXT:  entry:
2289 // CHECK4-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
2290 // CHECK4-NEXT:    [[SS:%.*]] = alloca [[STRUCT_SS:%.*]], align 8
2291 // CHECK4-NEXT:    store i32 0, ptr [[RETVAL]], align 4
2292 // CHECK4-NEXT:    call void @_ZN2SSC1ERi(ptr noundef nonnull align 8 dereferenceable(16) [[SS]], ptr noundef nonnull align 4 dereferenceable(4) @sivar)
2293 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr getelementptr inbounds ([[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr @__block_literal_global, i32 0, i32 3), align 8
2294 // CHECK4-NEXT:    call void [[TMP0]](ptr noundef @__block_literal_global)
2295 // CHECK4-NEXT:    ret i32 0
2296 //
2297 //
2298 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC1ERi
2299 // CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR8:[0-9]+]] align 2 {
2300 // CHECK4-NEXT:  entry:
2301 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2302 // CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
2303 // CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2304 // CHECK4-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
2305 // CHECK4-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2306 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
2307 // CHECK4-NEXT:    call void @_ZN2SSC2ERi(ptr noundef nonnull align 8 dereferenceable(16) [[THIS1]], ptr noundef nonnull align 4 dereferenceable(4) [[TMP0]])
2308 // CHECK4-NEXT:    ret void
2309 //
2310 //
2311 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke
2312 // CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] {
2313 // CHECK4-NEXT:  entry:
2314 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
2315 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
2316 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2317 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
2318 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @__main_block_invoke.omp_outlined, ptr @g)
2319 // CHECK4-NEXT:    ret void
2320 //
2321 //
2322 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined
2323 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[G:%.*]]) #[[ATTR2]] {
2324 // CHECK4-NEXT:  entry:
2325 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2326 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2327 // CHECK4-NEXT:    [[G_ADDR:%.*]] = alloca ptr, align 8
2328 // CHECK4-NEXT:    [[G1:%.*]] = alloca i32, align 128
2329 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, align 128
2330 // CHECK4-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [1 x ptr], align 8
2331 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2332 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2333 // CHECK4-NEXT:    store ptr [[G]], ptr [[G_ADDR]], align 8
2334 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 8
2335 // CHECK4-NEXT:    store i32 0, ptr [[G1]], align 128
2336 // CHECK4-NEXT:    store i32 1, ptr [[G1]], align 128
2337 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 0
2338 // CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 128
2339 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 1
2340 // CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8
2341 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 2
2342 // CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 4
2343 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 3
2344 // CHECK4-NEXT:    store ptr @g_block_invoke, ptr [[BLOCK_INVOKE]], align 16
2345 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 4
2346 // CHECK4-NEXT:    store ptr @__block_descriptor_tmp.1, ptr [[BLOCK_DESCRIPTOR]], align 8
2347 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[BLOCK]], i32 0, i32 6
2348 // CHECK4-NEXT:    [[TMP1:%.*]] = load volatile i32, ptr [[G1]], align 128
2349 // CHECK4-NEXT:    store volatile i32 [[TMP1]], ptr [[BLOCK_CAPTURED]], align 128
2350 // CHECK4-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
2351 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[TMP2]], align 8
2352 // CHECK4-NEXT:    call void [[TMP3]](ptr noundef [[BLOCK]])
2353 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2354 // CHECK4-NEXT:    store ptr [[G1]], ptr [[TMP4]], align 8
2355 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2356 // CHECK4-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2357 // CHECK4-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP6]], i32 1, i64 8, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @__main_block_invoke.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
2358 // CHECK4-NEXT:    switch i32 [[TMP7]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2359 // CHECK4-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2360 // CHECK4-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2361 // CHECK4-NEXT:    ]
2362 // CHECK4:       .omp.reduction.case1:
2363 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP0]], align 128
2364 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[G1]], align 128
2365 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
2366 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP0]], align 128
2367 // CHECK4-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP6]], ptr @.gomp_critical_user_.reduction.var)
2368 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
2369 // CHECK4:       .omp.reduction.case2:
2370 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[G1]], align 128
2371 // CHECK4-NEXT:    [[TMP11:%.*]] = atomicrmw add ptr [[TMP0]], i32 [[TMP10]] monotonic, align 4
2372 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
2373 // CHECK4:       .omp.reduction.default:
2374 // CHECK4-NEXT:    ret void
2375 //
2376 //
2377 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke
2378 // CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] {
2379 // CHECK4-NEXT:  entry:
2380 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
2381 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
2382 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2383 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
2384 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, [96 x i8], i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
2385 // CHECK4-NEXT:    store i32 2, ptr [[BLOCK_CAPTURE_ADDR]], align 128
2386 // CHECK4-NEXT:    ret void
2387 //
2388 //
2389 // CHECK4-LABEL: define {{[^@]+}}@__main_block_invoke.omp_outlined.omp.reduction.reduction_func
2390 // CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
2391 // CHECK4-NEXT:  entry:
2392 // CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
2393 // CHECK4-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
2394 // CHECK4-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
2395 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
2396 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
2397 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
2398 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP3]], i64 0, i64 0
2399 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
2400 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[TMP2]], i64 0, i64 0
2401 // CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
2402 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 128
2403 // CHECK4-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP5]], align 128
2404 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP8]], [[TMP9]]
2405 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 128
2406 // CHECK4-NEXT:    ret void
2407 //
2408 //
2409 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi
2410 // CHECK4-SAME: (ptr noundef nonnull align 8 dereferenceable(16) [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[D:%.*]]) unnamed_addr #[[ATTR8]] align 2 {
2411 // CHECK4-NEXT:  entry:
2412 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2413 // CHECK4-NEXT:    [[D_ADDR:%.*]] = alloca ptr, align 8
2414 // CHECK4-NEXT:    [[A2:%.*]] = alloca ptr, align 8
2415 // CHECK4-NEXT:    [[B4:%.*]] = alloca i32, align 4
2416 // CHECK4-NEXT:    [[C5:%.*]] = alloca ptr, align 8
2417 // CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2418 // CHECK4-NEXT:    store ptr [[D]], ptr [[D_ADDR]], align 8
2419 // CHECK4-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2420 // CHECK4-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
2421 // CHECK4-NEXT:    store i32 0, ptr [[A]], align 8
2422 // CHECK4-NEXT:    [[B:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1
2423 // CHECK4-NEXT:    [[BF_LOAD:%.*]] = load i8, ptr [[B]], align 4
2424 // CHECK4-NEXT:    [[BF_CLEAR:%.*]] = and i8 [[BF_LOAD]], -16
2425 // CHECK4-NEXT:    [[BF_SET:%.*]] = or i8 [[BF_CLEAR]], 0
2426 // CHECK4-NEXT:    store i8 [[BF_SET]], ptr [[B]], align 4
2427 // CHECK4-NEXT:    [[C:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
2428 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[D_ADDR]], align 8
2429 // CHECK4-NEXT:    store ptr [[TMP0]], ptr [[C]], align 8
2430 // CHECK4-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2431 // CHECK4-NEXT:    store ptr [[A3]], ptr [[A2]], align 8
2432 // CHECK4-NEXT:    [[C6:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 2
2433 // CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[C6]], align 8
2434 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[C5]], align 8
2435 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A2]], align 8
2436 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C5]], align 8
2437 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @_ZN2SSC2ERi.omp_outlined, ptr [[THIS1]], ptr [[TMP2]], ptr [[B4]], ptr [[TMP3]])
2438 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[B4]], align 4
2439 // CHECK4-NEXT:    [[B7:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 1
2440 // CHECK4-NEXT:    [[TMP5:%.*]] = trunc i32 [[TMP4]] to i8
2441 // CHECK4-NEXT:    [[BF_LOAD8:%.*]] = load i8, ptr [[B7]], align 4
2442 // CHECK4-NEXT:    [[BF_VALUE:%.*]] = and i8 [[TMP5]], 15
2443 // CHECK4-NEXT:    [[BF_CLEAR9:%.*]] = and i8 [[BF_LOAD8]], -16
2444 // CHECK4-NEXT:    [[BF_SET10:%.*]] = or i8 [[BF_CLEAR9]], [[BF_VALUE]]
2445 // CHECK4-NEXT:    store i8 [[BF_SET10]], ptr [[B7]], align 4
2446 // CHECK4-NEXT:    ret void
2447 //
2448 //
2449 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined
2450 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
2451 // CHECK4-NEXT:  entry:
2452 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2453 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2454 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2455 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2456 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
2457 // CHECK4-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
2458 // CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2459 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
2460 // CHECK4-NEXT:    [[A2:%.*]] = alloca i32, align 4
2461 // CHECK4-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
2462 // CHECK4-NEXT:    [[B4:%.*]] = alloca i32, align 4
2463 // CHECK4-NEXT:    [[C5:%.*]] = alloca i32, align 4
2464 // CHECK4-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
2465 // CHECK4-NEXT:    [[BLOCK:%.*]] = alloca <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, align 8
2466 // CHECK4-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 8
2467 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2468 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2469 // CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2470 // CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2471 // CHECK4-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8
2472 // CHECK4-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
2473 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2474 // CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2475 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8
2476 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8
2477 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
2478 // CHECK4-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 8
2479 // CHECK4-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
2480 // CHECK4-NEXT:    store i32 0, ptr [[A2]], align 4
2481 // CHECK4-NEXT:    store ptr [[A2]], ptr [[_TMP3]], align 8
2482 // CHECK4-NEXT:    store i32 0, ptr [[B4]], align 4
2483 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
2484 // CHECK4-NEXT:    store i32 0, ptr [[C5]], align 4
2485 // CHECK4-NEXT:    store ptr [[C5]], ptr [[_TMP6]], align 8
2486 // CHECK4-NEXT:    [[BLOCK_ISA:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 0
2487 // CHECK4-NEXT:    store ptr @_NSConcreteStackBlock, ptr [[BLOCK_ISA]], align 8
2488 // CHECK4-NEXT:    [[BLOCK_FLAGS:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 1
2489 // CHECK4-NEXT:    store i32 1073741824, ptr [[BLOCK_FLAGS]], align 8
2490 // CHECK4-NEXT:    [[BLOCK_RESERVED:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 2
2491 // CHECK4-NEXT:    store i32 0, ptr [[BLOCK_RESERVED]], align 4
2492 // CHECK4-NEXT:    [[BLOCK_INVOKE:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 3
2493 // CHECK4-NEXT:    store ptr @g_block_invoke_2, ptr [[BLOCK_INVOKE]], align 8
2494 // CHECK4-NEXT:    [[BLOCK_DESCRIPTOR:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 4
2495 // CHECK4-NEXT:    store ptr @__block_descriptor_tmp.2, ptr [[BLOCK_DESCRIPTOR]], align 8
2496 // CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS_ADDR:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 5
2497 // CHECK4-NEXT:    store ptr [[TMP0]], ptr [[BLOCK_CAPTURED_THIS_ADDR]], align 8
2498 // CHECK4-NEXT:    [[BLOCK_CAPTURED:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 6
2499 // CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP3]], align 8
2500 // CHECK4-NEXT:    store ptr [[TMP6]], ptr [[BLOCK_CAPTURED]], align 8
2501 // CHECK4-NEXT:    [[BLOCK_CAPTURED7:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 8
2502 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[B4]], align 4
2503 // CHECK4-NEXT:    store i32 [[TMP7]], ptr [[BLOCK_CAPTURED7]], align 8
2504 // CHECK4-NEXT:    [[BLOCK_CAPTURED8:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[BLOCK]], i32 0, i32 7
2505 // CHECK4-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[_TMP6]], align 8
2506 // CHECK4-NEXT:    store ptr [[TMP8]], ptr [[BLOCK_CAPTURED8]], align 8
2507 // CHECK4-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___BLOCK_LITERAL_GENERIC:%.*]], ptr [[BLOCK]], i32 0, i32 3
2508 // CHECK4-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[TMP9]], align 8
2509 // CHECK4-NEXT:    call void [[TMP10]](ptr noundef [[BLOCK]])
2510 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2511 // CHECK4-NEXT:    store ptr [[A2]], ptr [[TMP11]], align 8
2512 // CHECK4-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
2513 // CHECK4-NEXT:    store ptr [[B4]], ptr [[TMP12]], align 8
2514 // CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
2515 // CHECK4-NEXT:    store ptr [[C5]], ptr [[TMP13]], align 8
2516 // CHECK4-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2517 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
2518 // CHECK4-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], i32 3, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
2519 // CHECK4-NEXT:    switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2520 // CHECK4-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2521 // CHECK4-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2522 // CHECK4-NEXT:    ]
2523 // CHECK4:       .omp.reduction.case1:
2524 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP4]], align 4
2525 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[A2]], align 4
2526 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2527 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP4]], align 4
2528 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP2]], align 4
2529 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[B4]], align 4
2530 // CHECK4-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2531 // CHECK4-NEXT:    store i32 [[ADD9]], ptr [[TMP2]], align 4
2532 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP5]], align 4
2533 // CHECK4-NEXT:    [[TMP22:%.*]] = load i32, ptr [[C5]], align 4
2534 // CHECK4-NEXT:    [[ADD10:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2535 // CHECK4-NEXT:    store i32 [[ADD10]], ptr [[TMP5]], align 4
2536 // CHECK4-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.reduction.var)
2537 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
2538 // CHECK4:       .omp.reduction.case2:
2539 // CHECK4-NEXT:    [[TMP23:%.*]] = load i32, ptr [[A2]], align 4
2540 // CHECK4-NEXT:    [[TMP24:%.*]] = atomicrmw add ptr [[TMP4]], i32 [[TMP23]] monotonic, align 4
2541 // CHECK4-NEXT:    [[TMP25:%.*]] = load i32, ptr [[B4]], align 4
2542 // CHECK4-NEXT:    [[TMP26:%.*]] = atomicrmw add ptr [[TMP2]], i32 [[TMP25]] monotonic, align 4
2543 // CHECK4-NEXT:    [[TMP27:%.*]] = load i32, ptr [[C5]], align 4
2544 // CHECK4-NEXT:    [[TMP28:%.*]] = atomicrmw add ptr [[TMP5]], i32 [[TMP27]] monotonic, align 4
2545 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
2546 // CHECK4:       .omp.reduction.default:
2547 // CHECK4-NEXT:    ret void
2548 //
2549 //
2550 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2
2551 // CHECK4-SAME: (ptr noundef [[DOTBLOCK_DESCRIPTOR:%.*]]) #[[ATTR8]] {
2552 // CHECK4-NEXT:  entry:
2553 // CHECK4-NEXT:    [[DOTBLOCK_DESCRIPTOR_ADDR:%.*]] = alloca ptr, align 8
2554 // CHECK4-NEXT:    [[BLOCK_ADDR:%.*]] = alloca ptr, align 8
2555 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[DOTBLOCK_DESCRIPTOR_ADDR]], align 8
2556 // CHECK4-NEXT:    store ptr [[DOTBLOCK_DESCRIPTOR]], ptr [[BLOCK_ADDR]], align 8
2557 // CHECK4-NEXT:    [[BLOCK_CAPTURED_THIS:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 5
2558 // CHECK4-NEXT:    [[THIS:%.*]] = load ptr, ptr [[BLOCK_CAPTURED_THIS]], align 8
2559 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
2560 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR]], align 8
2561 // CHECK4-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2562 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP1]], 1
2563 // CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP0]], align 4
2564 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR1:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 8
2565 // CHECK4-NEXT:    [[TMP2:%.*]] = load i32, ptr [[BLOCK_CAPTURE_ADDR1]], align 8
2566 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP2]], -1
2567 // CHECK4-NEXT:    store i32 [[DEC]], ptr [[BLOCK_CAPTURE_ADDR1]], align 8
2568 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR2:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 7
2569 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR2]], align 8
2570 // CHECK4-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2571 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP4]], 1
2572 // CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP3]], align 4
2573 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR3:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 6
2574 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR3]], align 8
2575 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR4:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 8
2576 // CHECK4-NEXT:    [[BLOCK_CAPTURE_ADDR5:%.*]] = getelementptr inbounds <{ ptr, i32, i32, ptr, ptr, ptr, ptr, ptr, i32 }>, ptr [[DOTBLOCK_DESCRIPTOR]], i32 0, i32 7
2577 // CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[BLOCK_CAPTURE_ADDR5]], align 8
2578 // CHECK4-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 4, ptr @g_block_invoke_2.omp_outlined, ptr [[THIS]], ptr [[TMP5]], ptr [[BLOCK_CAPTURE_ADDR4]], ptr [[TMP6]])
2579 // CHECK4-NEXT:    ret void
2580 //
2581 //
2582 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2.omp_outlined
2583 // CHECK4-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[B:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[C:%.*]]) #[[ATTR2]] {
2584 // CHECK4-NEXT:  entry:
2585 // CHECK4-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2586 // CHECK4-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2587 // CHECK4-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2588 // CHECK4-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
2589 // CHECK4-NEXT:    [[B_ADDR:%.*]] = alloca ptr, align 8
2590 // CHECK4-NEXT:    [[C_ADDR:%.*]] = alloca ptr, align 8
2591 // CHECK4-NEXT:    [[TMP:%.*]] = alloca ptr, align 8
2592 // CHECK4-NEXT:    [[_TMP1:%.*]] = alloca ptr, align 8
2593 // CHECK4-NEXT:    [[A2:%.*]] = alloca i32, align 4
2594 // CHECK4-NEXT:    [[_TMP3:%.*]] = alloca ptr, align 8
2595 // CHECK4-NEXT:    [[B4:%.*]] = alloca i32, align 4
2596 // CHECK4-NEXT:    [[C5:%.*]] = alloca i32, align 4
2597 // CHECK4-NEXT:    [[_TMP6:%.*]] = alloca ptr, align 8
2598 // CHECK4-NEXT:    [[DOTOMP_REDUCTION_RED_LIST:%.*]] = alloca [3 x ptr], align 8
2599 // CHECK4-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2600 // CHECK4-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2601 // CHECK4-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2602 // CHECK4-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
2603 // CHECK4-NEXT:    store ptr [[B]], ptr [[B_ADDR]], align 8
2604 // CHECK4-NEXT:    store ptr [[C]], ptr [[C_ADDR]], align 8
2605 // CHECK4-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2606 // CHECK4-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
2607 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[B_ADDR]], align 8
2608 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[C_ADDR]], align 8
2609 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[TMP]], align 8
2610 // CHECK4-NEXT:    store ptr [[TMP3]], ptr [[_TMP1]], align 8
2611 // CHECK4-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[TMP]], align 8
2612 // CHECK4-NEXT:    store i32 0, ptr [[A2]], align 4
2613 // CHECK4-NEXT:    store ptr [[A2]], ptr [[_TMP3]], align 8
2614 // CHECK4-NEXT:    store i32 0, ptr [[B4]], align 4
2615 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[_TMP1]], align 8
2616 // CHECK4-NEXT:    store i32 0, ptr [[C5]], align 4
2617 // CHECK4-NEXT:    store ptr [[C5]], ptr [[_TMP6]], align 8
2618 // CHECK4-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[_TMP3]], align 8
2619 // CHECK4-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
2620 // CHECK4-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP7]], 1
2621 // CHECK4-NEXT:    store i32 [[INC]], ptr [[TMP6]], align 4
2622 // CHECK4-NEXT:    [[TMP8:%.*]] = load i32, ptr [[B4]], align 4
2623 // CHECK4-NEXT:    [[DEC:%.*]] = add nsw i32 [[TMP8]], -1
2624 // CHECK4-NEXT:    store i32 [[DEC]], ptr [[B4]], align 4
2625 // CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[_TMP6]], align 8
2626 // CHECK4-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
2627 // CHECK4-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP10]], 1
2628 // CHECK4-NEXT:    store i32 [[DIV]], ptr [[TMP9]], align 4
2629 // CHECK4-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 0
2630 // CHECK4-NEXT:    store ptr [[A2]], ptr [[TMP11]], align 8
2631 // CHECK4-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 1
2632 // CHECK4-NEXT:    store ptr [[B4]], ptr [[TMP12]], align 8
2633 // CHECK4-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOMP_REDUCTION_RED_LIST]], i64 0, i64 2
2634 // CHECK4-NEXT:    store ptr [[C5]], ptr [[TMP13]], align 8
2635 // CHECK4-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2636 // CHECK4-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
2637 // CHECK4-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], i32 3, i64 24, ptr [[DOTOMP_REDUCTION_RED_LIST]], ptr @g_block_invoke_2.omp_outlined.omp.reduction.reduction_func, ptr @.gomp_critical_user_.reduction.var)
2638 // CHECK4-NEXT:    switch i32 [[TMP16]], label [[DOTOMP_REDUCTION_DEFAULT:%.*]] [
2639 // CHECK4-NEXT:    i32 1, label [[DOTOMP_REDUCTION_CASE1:%.*]]
2640 // CHECK4-NEXT:    i32 2, label [[DOTOMP_REDUCTION_CASE2:%.*]]
2641 // CHECK4-NEXT:    ]
2642 // CHECK4:       .omp.reduction.case1:
2643 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP4]], align 4
2644 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[A2]], align 4
2645 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2646 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP4]], align 4
2647 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP2]], align 4
2648 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[B4]], align 4
2649 // CHECK4-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2650 // CHECK4-NEXT:    store i32 [[ADD7]], ptr [[TMP2]], align 4
2651 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP5]], align 4
2652 // CHECK4-NEXT:    [[TMP22:%.*]] = load i32, ptr [[C5]], align 4
2653 // CHECK4-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2654 // CHECK4-NEXT:    store i32 [[ADD8]], ptr [[TMP5]], align 4
2655 // CHECK4-NEXT:    call void @__kmpc_end_reduce_nowait(ptr @[[GLOB1]], i32 [[TMP15]], ptr @.gomp_critical_user_.reduction.var)
2656 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
2657 // CHECK4:       .omp.reduction.case2:
2658 // CHECK4-NEXT:    [[TMP23:%.*]] = load i32, ptr [[A2]], align 4
2659 // CHECK4-NEXT:    [[TMP24:%.*]] = atomicrmw add ptr [[TMP4]], i32 [[TMP23]] monotonic, align 4
2660 // CHECK4-NEXT:    [[TMP25:%.*]] = load i32, ptr [[B4]], align 4
2661 // CHECK4-NEXT:    [[TMP26:%.*]] = atomicrmw add ptr [[TMP2]], i32 [[TMP25]] monotonic, align 4
2662 // CHECK4-NEXT:    [[TMP27:%.*]] = load i32, ptr [[C5]], align 4
2663 // CHECK4-NEXT:    [[TMP28:%.*]] = atomicrmw add ptr [[TMP5]], i32 [[TMP27]] monotonic, align 4
2664 // CHECK4-NEXT:    br label [[DOTOMP_REDUCTION_DEFAULT]]
2665 // CHECK4:       .omp.reduction.default:
2666 // CHECK4-NEXT:    ret void
2667 //
2668 //
2669 // CHECK4-LABEL: define {{[^@]+}}@g_block_invoke_2.omp_outlined.omp.reduction.reduction_func
2670 // CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
2671 // CHECK4-NEXT:  entry:
2672 // CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
2673 // CHECK4-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
2674 // CHECK4-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
2675 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
2676 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
2677 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
2678 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 0
2679 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
2680 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 0
2681 // CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
2682 // CHECK4-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 1
2683 // CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
2684 // CHECK4-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 1
2685 // CHECK4-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
2686 // CHECK4-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 2
2687 // CHECK4-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8
2688 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 2
2689 // CHECK4-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8
2690 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP7]], align 4
2691 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 4
2692 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2693 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
2694 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP11]], align 4
2695 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP9]], align 4
2696 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2697 // CHECK4-NEXT:    store i32 [[ADD2]], ptr [[TMP11]], align 4
2698 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP15]], align 4
2699 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP13]], align 4
2700 // CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
2701 // CHECK4-NEXT:    store i32 [[ADD3]], ptr [[TMP15]], align 4
2702 // CHECK4-NEXT:    ret void
2703 //
2704 //
2705 // CHECK4-LABEL: define {{[^@]+}}@_ZN2SSC2ERi.omp_outlined.omp.reduction.reduction_func
2706 // CHECK4-SAME: (ptr noundef [[TMP0:%.*]], ptr noundef [[TMP1:%.*]]) #[[ATTR4]] {
2707 // CHECK4-NEXT:  entry:
2708 // CHECK4-NEXT:    [[DOTADDR:%.*]] = alloca ptr, align 8
2709 // CHECK4-NEXT:    [[DOTADDR1:%.*]] = alloca ptr, align 8
2710 // CHECK4-NEXT:    store ptr [[TMP0]], ptr [[DOTADDR]], align 8
2711 // CHECK4-NEXT:    store ptr [[TMP1]], ptr [[DOTADDR1]], align 8
2712 // CHECK4-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTADDR]], align 8
2713 // CHECK4-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTADDR1]], align 8
2714 // CHECK4-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 0
2715 // CHECK4-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[TMP4]], align 8
2716 // CHECK4-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 0
2717 // CHECK4-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[TMP6]], align 8
2718 // CHECK4-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 1
2719 // CHECK4-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[TMP8]], align 8
2720 // CHECK4-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 1
2721 // CHECK4-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[TMP10]], align 8
2722 // CHECK4-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP3]], i64 0, i64 2
2723 // CHECK4-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[TMP12]], align 8
2724 // CHECK4-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x ptr], ptr [[TMP2]], i64 0, i64 2
2725 // CHECK4-NEXT:    [[TMP15:%.*]] = load ptr, ptr [[TMP14]], align 8
2726 // CHECK4-NEXT:    [[TMP16:%.*]] = load i32, ptr [[TMP7]], align 4
2727 // CHECK4-NEXT:    [[TMP17:%.*]] = load i32, ptr [[TMP5]], align 4
2728 // CHECK4-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], [[TMP17]]
2729 // CHECK4-NEXT:    store i32 [[ADD]], ptr [[TMP7]], align 4
2730 // CHECK4-NEXT:    [[TMP18:%.*]] = load i32, ptr [[TMP11]], align 4
2731 // CHECK4-NEXT:    [[TMP19:%.*]] = load i32, ptr [[TMP9]], align 4
2732 // CHECK4-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
2733 // CHECK4-NEXT:    store i32 [[ADD2]], ptr [[TMP11]], align 4
2734 // CHECK4-NEXT:    [[TMP20:%.*]] = load i32, ptr [[TMP15]], align 4
2735 // CHECK4-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP13]], align 4
2736 // CHECK4-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
2737 // CHECK4-NEXT:    store i32 [[ADD3]], ptr [[TMP15]], align 4
2738 // CHECK4-NEXT:    ret void
2739 //