clang/test/OpenMP/target_parallel_generic_loop_codegen-1.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // Test host codegen.
   3 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s
   4 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   5 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
   6 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s
   7 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
   8 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s
   9
  10 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  11 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  12 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  13 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  14 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  15 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  16
  17 // Test target parallel for codegen - host bc file has to be created first.
  18 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
  19 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s -check-prefix=TCHECK
  20 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
  21 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -check-prefix=TCHECK
  22 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
  23 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s -check-prefix=TCHECK
  24 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
  25 // RUN: %clang_cc1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -check-prefix=TCHECK
  26
  27 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
  28 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  29 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
  30 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  31 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
  32 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  33 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
  34 // RUN: %clang_cc1 -fopenmp-simd -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  35
  36 // Check that no target code is emitted if no omptests flag was provided.
  37 // RUN: %clang_cc1 -verify -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-NTARGET
  38
  39 // RUN: %clang_cc1 -verify -fopenmp-simd -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY2 %s
  40
  41 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix OMP-DEFAULT
  42 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  43 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix OMP-DEFAULT
  44 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix OMP-DEfAULT
  45 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  46 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix OMP-DEFAULT
  47
  48 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  49 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  50 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  51 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  52 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  53 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY0 %s
  54
  55 // Test target parallel for codegen - host bc file has to be created first.
  56 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
  57 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck %s -check-prefix=TCHECK
  58 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
  59 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -check-prefix=TCHECK
  60
  61 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
  62 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck %s -check-prefix=TCHECK
  63 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
  64 // RUN: %clang_cc1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s -check-prefix=TCHECK
  65
  66 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm-bc %s -o %t-ppc-host.bc
  67 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  68 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -o %t %s
  69 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-ppc-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  70 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm-bc %s -o %t-x86-host.bc
  71 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  72 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -o %t %s
  73 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -fopenmp-is-target-device -fopenmp-host-ir-file-path %t-x86-host.bc -include-pch %t -verify %s -emit-llvm -o - | FileCheck --check-prefix SIMD-ONLY1 %s
  74
  75 // Check that no target code is emitted if no omptests flag was provided.
  76 // RUN: %clang_cc1 -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck %s -check-prefix=CHECK-NTARGET-OMP-DEFAULT
  77
  78 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -emit-llvm %s -o - | FileCheck --check-prefix SIMD-ONLY2 %s
  79
  80 // expected-no-diagnostics
  81 #ifndef HEADER
  82 #define HEADER
  83
  84
  85
  86
  87
  88 // We have 7 target regions
  89
  90
  91
  92
  93
  94 // We have 4 initializers, one for the 500 priority, another one for 501, or more for the default priority, and the last one for the offloading registration function.
  95
  96
  97 extern int *R;
  98
  99 struct SA {
 100   int arr[4];
 101   void foo() {
 102     int a = *R;
 103     a += 1;
 104     *R = a;
 105   }
 106   SA() {
 107     int a = *R;
 108     a += 2;
 109     *R = a;
 110   }
 111   ~SA() {
 112     int a = *R;
 113     a += 3;
 114     *R = a;
 115   }
 116 };
 117
 118 struct SB {
 119   int arr[8];
 120   void foo() {
 121     int a = *R;
 122     #pragma omp target parallel loop
 123     for (int i = 0; i < 10; ++i)
 124       a += 4;
 125     *R = a;
 126   }
 127   SB() {
 128     int a = *R;
 129     a += 5;
 130     *R = a;
 131   }
 132   ~SB() {
 133     int a = *R;
 134     a += 6;
 135     *R = a;
 136   }
 137 };
 138
 139 struct SC {
 140   int arr[16];
 141   void foo() {
 142     int a = *R;
 143     a += 7;
 144     *R = a;
 145   }
 146   SC() {
 147     int a = *R;
 148     #pragma omp target parallel loop
 149     for (int i = 0; i < 10; ++i)
 150       a += 8;
 151     *R = a;
 152   }
 153   ~SC() {
 154     int a = *R;
 155     a += 9;
 156     *R = a;
 157   }
 158 };
 159
 160 struct SD {
 161   int arr[32];
 162   void foo() {
 163     int a = *R;
 164     a += 10;
 165     *R = a;
 166   }
 167   SD() {
 168     int a = *R;
 169     a += 11;
 170     *R = a;
 171   }
 172   ~SD() {
 173     int a = *R;
 174     #pragma omp target parallel loop
 175     for (int i = 0; i < 10; ++i)
 176       a += 12;
 177     *R = a;
 178   }
 179 };
 180
 181 struct SE {
 182   int arr[64];
 183   void foo() {
 184     int a = *R;
 185     #pragma omp target parallel loop if(target: 0)
 186     for (int i = 0; i < 10; ++i)
 187       a += 13;
 188     *R = a;
 189   }
 190   SE() {
 191     int a = *R;
 192     #pragma omp target parallel loop
 193     for (int i = 0; i < 10; ++i)
 194       a += 14;
 195     *R = a;
 196   }
 197   ~SE() {
 198     int a = *R;
 199     #pragma omp target parallel loop
 200     for (int i = 0; i < 10; ++i)
 201       a += 15;
 202     *R = a;
 203   }
 204 };
 205
 206 template <int x>
 207 struct ST {
 208   int arr[128 + x];
 209   void foo() {
 210     int a = *R;
 211     #pragma omp target parallel loop
 212     for (int i = 0; i < 10; ++i)
 213       a += 16 + x;
 214     *R = a;
 215   }
 216   ST() {
 217     int a = *R;
 218     #pragma omp target parallel loop
 219     for (int i = 0; i < 10; ++i)
 220       a += 17 + x;
 221     *R = a;
 222   }
 223   ~ST() {
 224     int a = *R;
 225     #pragma omp target parallel loop
 226     for (int i = 0; i < 10; ++i)
 227       a += 18 + x;
 228     *R = a;
 229   }
 230 };
 231
 232 // We have to make sure we us all the target regions:
 233
 234
 235
 236
 237 // We have 2 initializers with priority 500
 238
 239 // We have 1 initializers with priority 501
 240
 241 // We have 6 initializers with default priority
 242
 243 static __attribute__((init_priority(500))) SA a1;
 244 SA a2;
 245 SB __attribute__((init_priority(500))) b1;
 246 SB __attribute__((init_priority(501))) b2;
 247 static SC c1;
 248 SD d1;
 249 SE e1;
 250 ST<100> t1;
 251 ST<1000> t2;
 252
 253
 254 int bar(int a){
 255   int r = a;
 256
 257   a1.foo();
 258   a2.foo();
 259   b1.foo();
 260   b2.foo();
 261   c1.foo();
 262   d1.foo();
 263   e1.foo();
 264   t1.foo();
 265   t2.foo();
 266
 267   #pragma omp target parallel loop
 268   for (int i = 0; i < 10; ++i)
 269     ++r;
 270
 271   return r + *R;
 272 }
 273
 274 // Check metadata is properly generated:
 275
 276
 277 #endif
 278 // CHECK-LABEL: define {{[^@]+}}@__cxx_global_var_init
 279 // CHECK-SAME: () #[[ATTR3:[0-9]+]] {
 280 // CHECK-NEXT:  entry:
 281 // CHECK-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
 282 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
 283 // CHECK-NEXT:    ret void
 284 //
 285 //
 286 //
 287 //
 288 //
 289 //
 290 // CHECK-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
 291 // CHECK-SAME: () #[[ATTR3]] {
 292 // CHECK-NEXT:  entry:
 293 // CHECK-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
 294 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
 295 // CHECK-NEXT:    ret void
 296 //
 297 //
 298 // CHECK-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
 299 // CHECK-SAME: () #[[ATTR3]] {
 300 // CHECK-NEXT:  entry:
 301 // CHECK-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
 302 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
 303 // CHECK-NEXT:    ret void
 304 //
 305 //
 306 //
 307 //
 308 //
 309 //
 310 // CHECK-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
 311 // CHECK-SAME: () #[[ATTR3]] {
 312 // CHECK-NEXT:  entry:
 313 // CHECK-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
 314 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
 315 // CHECK-NEXT:    ret void
 316 //
 317 //
 318 // CHECK-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
 319 // CHECK-SAME: () #[[ATTR3]] {
 320 // CHECK-NEXT:  entry:
 321 // CHECK-NEXT:    call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
 322 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
 323 // CHECK-NEXT:    ret void
 324 //
 325 //
 326 //
 327 //
 328 //
 329 //
 330 //
 331 //
 332 // CHECK-LABEL: define {{[^@]+}}@__cxx_global_var_init.7
 333 // CHECK-SAME: () #[[ATTR3]] {
 334 // CHECK-NEXT:  entry:
 335 // CHECK-NEXT:    call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
 336 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
 337 // CHECK-NEXT:    ret void
 338 //
 339 //
 340 //
 341 //
 342 //
 343 //
 344 //
 345 //
 346 // CHECK-LABEL: define {{[^@]+}}@__cxx_global_var_init.10
 347 // CHECK-SAME: () #[[ATTR3]] {
 348 // CHECK-NEXT:  entry:
 349 // CHECK-NEXT:    call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
 350 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
 351 // CHECK-NEXT:    ret void
 352 //
 353 //
 354 //
 355 //
 356 //
 357 //
 358 //
 359 //
 360 //
 361 //
 362 // CHECK-LABEL: define {{[^@]+}}@__cxx_global_var_init.15
 363 // CHECK-SAME: () #[[ATTR3]] {
 364 // CHECK-NEXT:  entry:
 365 // CHECK-NEXT:    call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
 366 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
 367 // CHECK-NEXT:    ret void
 368 //
 369 //
 370 //
 371 //
 372 //
 373 //
 374 //
 375 //
 376 //
 377 //
 378 // CHECK-LABEL: define {{[^@]+}}@__cxx_global_var_init.20
 379 // CHECK-SAME: () #[[ATTR3]] {
 380 // CHECK-NEXT:  entry:
 381 // CHECK-NEXT:    call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
 382 // CHECK-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
 383 // CHECK-NEXT:    ret void
 384 //
 385 //
 386 //
 387 //
 388 //
 389 //
 390 //
 391 //
 392 //
 393 //
 394 //
 395 //
 396 //
 397 //
 398 //
 399 //
 400 //
 401 //
 402 // CHECK-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
 403 // CHECK-SAME: () #[[ATTR3]] {
 404 // CHECK-NEXT:  entry:
 405 // CHECK-NEXT:    call void @__cxx_global_var_init()
 406 // CHECK-NEXT:    call void @__cxx_global_var_init.2()
 407 // CHECK-NEXT:    ret void
 408 //
 409 //
 410 // CHECK-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
 411 // CHECK-SAME: () #[[ATTR3]] {
 412 // CHECK-NEXT:  entry:
 413 // CHECK-NEXT:    call void @__cxx_global_var_init.3()
 414 // CHECK-NEXT:    ret void
 415 //
 416 //
 417 // CHECK-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
 418 // CHECK-SAME: () #[[ATTR3]] {
 419 // CHECK-NEXT:  entry:
 420 // CHECK-NEXT:    call void @__cxx_global_var_init.1()
 421 // CHECK-NEXT:    call void @__cxx_global_var_init.4()
 422 // CHECK-NEXT:    call void @__cxx_global_var_init.7()
 423 // CHECK-NEXT:    call void @__cxx_global_var_init.10()
 424 // CHECK-NEXT:    call void @__cxx_global_var_init.15()
 425 // CHECK-NEXT:    call void @__cxx_global_var_init.20()
 426 // CHECK-NEXT:    ret void
 427 //
 428 //
 429 // CHECK-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 430 // CHECK-SAME: () #[[ATTR3]] {
 431 // CHECK-NEXT:  entry:
 432 // CHECK-NEXT:    call void @__tgt_register_requires(i64 1)
 433 // CHECK-NEXT:    ret void
 434 //
 435 //
 436 //
 437 //
 438 //
 439 //
 440 //
 441 //
 442 //
 443 //
 444 //
 445 //
 446 //
 447 //
 448 //
 449 //
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 616 //
 617 //
 618 //
 619 //
 620 //
 621 //
 622 // SIMD-ONLY0-LABEL: define {{[^@]+}}@__cxx_global_var_init
 623 // SIMD-ONLY0-SAME: () #[[ATTR0:[0-9]+]] {
 624 // SIMD-ONLY0-NEXT:  entry:
 625 // SIMD-ONLY0-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
 626 // SIMD-ONLY0-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
 627 // SIMD-ONLY0-NEXT:    ret void
 628 //
 629 //
 630 //
 631 //
 632 // SIMD-ONLY0-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
 633 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 634 // SIMD-ONLY0-NEXT:  entry:
 635 // SIMD-ONLY0-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
 636 // SIMD-ONLY0-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
 637 // SIMD-ONLY0-NEXT:    ret void
 638 //
 639 //
 640 // SIMD-ONLY0-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
 641 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 642 // SIMD-ONLY0-NEXT:  entry:
 643 // SIMD-ONLY0-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
 644 // SIMD-ONLY0-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
 645 // SIMD-ONLY0-NEXT:    ret void
 646 //
 647 //
 648 //
 649 //
 650 // SIMD-ONLY0-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
 651 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 652 // SIMD-ONLY0-NEXT:  entry:
 653 // SIMD-ONLY0-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
 654 // SIMD-ONLY0-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
 655 // SIMD-ONLY0-NEXT:    ret void
 656 //
 657 //
 658 // SIMD-ONLY0-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
 659 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 660 // SIMD-ONLY0-NEXT:  entry:
 661 // SIMD-ONLY0-NEXT:    call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
 662 // SIMD-ONLY0-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
 663 // SIMD-ONLY0-NEXT:    ret void
 664 //
 665 //
 666 //
 667 //
 668 // SIMD-ONLY0-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
 669 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 670 // SIMD-ONLY0-NEXT:  entry:
 671 // SIMD-ONLY0-NEXT:    call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
 672 // SIMD-ONLY0-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
 673 // SIMD-ONLY0-NEXT:    ret void
 674 //
 675 //
 676 //
 677 //
 678 // SIMD-ONLY0-LABEL: define {{[^@]+}}@__cxx_global_var_init.6
 679 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 680 // SIMD-ONLY0-NEXT:  entry:
 681 // SIMD-ONLY0-NEXT:    call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
 682 // SIMD-ONLY0-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
 683 // SIMD-ONLY0-NEXT:    ret void
 684 //
 685 //
 686 //
 687 //
 688 // SIMD-ONLY0-LABEL: define {{[^@]+}}@__cxx_global_var_init.7
 689 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 690 // SIMD-ONLY0-NEXT:  entry:
 691 // SIMD-ONLY0-NEXT:    call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
 692 // SIMD-ONLY0-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
 693 // SIMD-ONLY0-NEXT:    ret void
 694 //
 695 //
 696 //
 697 //
 698 // SIMD-ONLY0-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
 699 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 700 // SIMD-ONLY0-NEXT:  entry:
 701 // SIMD-ONLY0-NEXT:    call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
 702 // SIMD-ONLY0-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
 703 // SIMD-ONLY0-NEXT:    ret void
 704 //
 705 //
 706 //
 707 //
 708 //
 709 //
 710 //
 711 //
 712 //
 713 //
 714 //
 715 //
 716 //
 717 //
 718 //
 719 //
 720 //
 721 //
 722 //
 723 //
 724 //
 725 //
 726 //
 727 //
 728 //
 729 //
 730 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
 731 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 732 // SIMD-ONLY0-NEXT:  entry:
 733 // SIMD-ONLY0-NEXT:    call void @__cxx_global_var_init()
 734 // SIMD-ONLY0-NEXT:    call void @__cxx_global_var_init.2()
 735 // SIMD-ONLY0-NEXT:    ret void
 736 //
 737 //
 738 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
 739 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 740 // SIMD-ONLY0-NEXT:  entry:
 741 // SIMD-ONLY0-NEXT:    call void @__cxx_global_var_init.3()
 742 // SIMD-ONLY0-NEXT:    ret void
 743 //
 744 //
 745 // SIMD-ONLY0-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
 746 // SIMD-ONLY0-SAME: () #[[ATTR0]] {
 747 // SIMD-ONLY0-NEXT:  entry:
 748 // SIMD-ONLY0-NEXT:    call void @__cxx_global_var_init.1()
 749 // SIMD-ONLY0-NEXT:    call void @__cxx_global_var_init.4()
 750 // SIMD-ONLY0-NEXT:    call void @__cxx_global_var_init.5()
 751 // SIMD-ONLY0-NEXT:    call void @__cxx_global_var_init.6()
 752 // SIMD-ONLY0-NEXT:    call void @__cxx_global_var_init.7()
 753 // SIMD-ONLY0-NEXT:    call void @__cxx_global_var_init.8()
 754 // SIMD-ONLY0-NEXT:    ret void
 755 //
 756 //
 757 //
 758 //
 759 //
 760 //
 761 //
 762 //
 763 //
 764 //
 765 //
 766 //
 767 //
 768 //
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 956 //
 957 //
 958 //
 959 //
 960 //
 961 // SIMD-ONLY1-LABEL: define {{[^@]+}}@__cxx_global_var_init
 962 // SIMD-ONLY1-SAME: () #[[ATTR0:[0-9]+]] {
 963 // SIMD-ONLY1-NEXT:  entry:
 964 // SIMD-ONLY1-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
 965 // SIMD-ONLY1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
 966 // SIMD-ONLY1-NEXT:    ret void
 967 //
 968 //
 969 //
 970 //
 971 // SIMD-ONLY1-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
 972 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
 973 // SIMD-ONLY1-NEXT:  entry:
 974 // SIMD-ONLY1-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
 975 // SIMD-ONLY1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
 976 // SIMD-ONLY1-NEXT:    ret void
 977 //
 978 //
 979 // SIMD-ONLY1-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
 980 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
 981 // SIMD-ONLY1-NEXT:  entry:
 982 // SIMD-ONLY1-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
 983 // SIMD-ONLY1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
 984 // SIMD-ONLY1-NEXT:    ret void
 985 //
 986 //
 987 //
 988 //
 989 // SIMD-ONLY1-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
 990 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
 991 // SIMD-ONLY1-NEXT:  entry:
 992 // SIMD-ONLY1-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
 993 // SIMD-ONLY1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
 994 // SIMD-ONLY1-NEXT:    ret void
 995 //
 996 //
 997 // SIMD-ONLY1-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
 998 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
 999 // SIMD-ONLY1-NEXT:  entry:
1000 // SIMD-ONLY1-NEXT:    call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
1001 // SIMD-ONLY1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
1002 // SIMD-ONLY1-NEXT:    ret void
1003 //
1004 //
1005 //
1006 //
1007 // SIMD-ONLY1-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
1008 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
1009 // SIMD-ONLY1-NEXT:  entry:
1010 // SIMD-ONLY1-NEXT:    call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
1011 // SIMD-ONLY1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
1012 // SIMD-ONLY1-NEXT:    ret void
1013 //
1014 //
1015 //
1016 //
1017 // SIMD-ONLY1-LABEL: define {{[^@]+}}@__cxx_global_var_init.6
1018 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
1019 // SIMD-ONLY1-NEXT:  entry:
1020 // SIMD-ONLY1-NEXT:    call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
1021 // SIMD-ONLY1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
1022 // SIMD-ONLY1-NEXT:    ret void
1023 //
1024 //
1025 //
1026 //
1027 // SIMD-ONLY1-LABEL: define {{[^@]+}}@__cxx_global_var_init.7
1028 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
1029 // SIMD-ONLY1-NEXT:  entry:
1030 // SIMD-ONLY1-NEXT:    call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
1031 // SIMD-ONLY1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
1032 // SIMD-ONLY1-NEXT:    ret void
1033 //
1034 //
1035 //
1036 //
1037 // SIMD-ONLY1-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
1038 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
1039 // SIMD-ONLY1-NEXT:  entry:
1040 // SIMD-ONLY1-NEXT:    call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
1041 // SIMD-ONLY1-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
1042 // SIMD-ONLY1-NEXT:    ret void
1043 //
1044 //
1045 //
1046 //
1047 //
1048 //
1049 //
1050 //
1051 //
1052 //
1053 //
1054 //
1055 //
1056 //
1057 //
1058 //
1059 //
1060 //
1061 //
1062 //
1063 //
1064 //
1065 //
1066 //
1067 //
1068 //
1069 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
1070 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
1071 // SIMD-ONLY1-NEXT:  entry:
1072 // SIMD-ONLY1-NEXT:    call void @__cxx_global_var_init()
1073 // SIMD-ONLY1-NEXT:    call void @__cxx_global_var_init.2()
1074 // SIMD-ONLY1-NEXT:    ret void
1075 //
1076 //
1077 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
1078 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
1079 // SIMD-ONLY1-NEXT:  entry:
1080 // SIMD-ONLY1-NEXT:    call void @__cxx_global_var_init.3()
1081 // SIMD-ONLY1-NEXT:    ret void
1082 //
1083 //
1084 // SIMD-ONLY1-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
1085 // SIMD-ONLY1-SAME: () #[[ATTR0]] {
1086 // SIMD-ONLY1-NEXT:  entry:
1087 // SIMD-ONLY1-NEXT:    call void @__cxx_global_var_init.1()
1088 // SIMD-ONLY1-NEXT:    call void @__cxx_global_var_init.4()
1089 // SIMD-ONLY1-NEXT:    call void @__cxx_global_var_init.5()
1090 // SIMD-ONLY1-NEXT:    call void @__cxx_global_var_init.6()
1091 // SIMD-ONLY1-NEXT:    call void @__cxx_global_var_init.7()
1092 // SIMD-ONLY1-NEXT:    call void @__cxx_global_var_init.8()
1093 // SIMD-ONLY1-NEXT:    ret void
1094 //
1095 //
1096 //
1097 //
1098 //
1099 //
1100 //
1101 //
1102 //
1103 //
1104 //
1105 //
1106 //
1107 //
1108 //
1109 //
1110 //
1111 //
1112 //
1113 //
1114 //
1115 //
1116 //
1117 //
1118 //
1119 //
1120 //
1121 //
1122 //
1123 //
1124 //
1125 //
1126 //
1127 //
1128 //
1129 //
1130 //
1131 //
1132 //
1133 //
1134 //
1135 //
1136 //
1137 //
1138 //
1139 //
1140 //
1141 //
1142 //
1143 //
1144 //
1145 //
1146 //
1147 //
1148 //
1149 //
1150 //
1151 //
1152 //
1153 //
1154 //
1155 //
1156 //
1157 //
1158 //
1159 //
1160 //
1161 //
1162 //
1163 //
1164 //
1165 //
1166 //
1167 //
1168 //
1169 //
1170 //
1171 //
1172 //
1173 //
1174 //
1175 //
1176 //
1177 //
1178 //
1179 //
1180 //
1181 //
1182 //
1183 //
1184 //
1185 //
1186 //
1187 //
1188 //
1189 //
1190 //
1191 //
1192 //
1193 //
1194 //
1195 //
1196 //
1197 //
1198 //
1199 //
1200 //
1201 //
1202 //
1203 //
1204 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_Z3bari
1205 // CHECK-NTARGET-SAME: (i32 noundef signext [[A:%.*]]) #[[ATTR0:[0-9]+]] {
1206 // CHECK-NTARGET-NEXT:  entry:
1207 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
1208 // CHECK-NTARGET-NEXT:    [[R:%.*]] = alloca i32, align 4
1209 // CHECK-NTARGET-NEXT:    [[R_CASTED:%.*]] = alloca i64, align 8
1210 // CHECK-NTARGET-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
1211 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1212 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[R]], align 4
1213 // CHECK-NTARGET-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
1214 // CHECK-NTARGET-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @a2)
1215 // CHECK-NTARGET-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b1)
1216 // CHECK-NTARGET-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b2)
1217 // CHECK-NTARGET-NEXT:    call void @_ZN2SC3fooEv(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
1218 // CHECK-NTARGET-NEXT:    call void @_ZN2SD3fooEv(ptr noundef nonnull align 4 dereferenceable(128) @d1)
1219 // CHECK-NTARGET-NEXT:    call void @_ZN2SE3fooEv(ptr noundef nonnull align 4 dereferenceable(256) @e1)
1220 // CHECK-NTARGET-NEXT:    call void @_ZN2STILi100EE3fooEv(ptr noundef nonnull align 4 dereferenceable(912) @t1)
1221 // CHECK-NTARGET-NEXT:    call void @_ZN2STILi1000EE3fooEv(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
1222 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[R]], align 4
1223 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[R_CASTED]], align 4
1224 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i64, ptr [[R_CASTED]], align 8
1225 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267(i64 [[TMP2]]) #[[ATTR2:[0-9]+]]
1226 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[R]], align 4
1227 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
1228 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1229 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], [[TMP5]]
1230 // CHECK-NTARGET-NEXT:    ret i32 [[ADD]]
1231 //
1232 //
1233 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SA3fooEv
1234 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR0]] comdat {
1235 // CHECK-NTARGET-NEXT:  entry:
1236 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1237 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1238 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1239 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1240 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1241 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1242 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1243 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1244 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
1245 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
1246 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
1247 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
1248 // CHECK-NTARGET-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
1249 // CHECK-NTARGET-NEXT:    ret void
1250 //
1251 //
1252 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SB3fooEv
1253 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) #[[ATTR0]] comdat {
1254 // CHECK-NTARGET-NEXT:  entry:
1255 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1256 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1257 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1258 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1259 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1260 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1261 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1262 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1263 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1264 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
1265 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
1266 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122(i64 [[TMP3]]) #[[ATTR2]]
1267 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
1268 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
1269 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
1270 // CHECK-NTARGET-NEXT:    ret void
1271 //
1272 //
1273 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SC3fooEv
1274 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) #[[ATTR0]] comdat {
1275 // CHECK-NTARGET-NEXT:  entry:
1276 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1277 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1278 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1279 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1280 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1281 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1282 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1283 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1284 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 7
1285 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
1286 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
1287 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
1288 // CHECK-NTARGET-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
1289 // CHECK-NTARGET-NEXT:    ret void
1290 //
1291 //
1292 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SD3fooEv
1293 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) #[[ATTR0]] comdat {
1294 // CHECK-NTARGET-NEXT:  entry:
1295 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1296 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1297 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1298 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1299 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1300 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1301 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1302 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1303 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 10
1304 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
1305 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
1306 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
1307 // CHECK-NTARGET-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
1308 // CHECK-NTARGET-NEXT:    ret void
1309 //
1310 //
1311 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SE3fooEv
1312 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) #[[ATTR0]] comdat {
1313 // CHECK-NTARGET-NEXT:  entry:
1314 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1315 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1316 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1317 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1318 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1319 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1320 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1321 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1322 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1323 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
1324 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
1325 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185(i64 [[TMP3]]) #[[ATTR2]]
1326 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
1327 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
1328 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
1329 // CHECK-NTARGET-NEXT:    ret void
1330 //
1331 //
1332 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2STILi100EE3fooEv
1333 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) #[[ATTR0]] comdat {
1334 // CHECK-NTARGET-NEXT:  entry:
1335 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1336 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1337 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1338 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1339 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1340 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1341 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1342 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1343 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1344 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
1345 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
1346 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211(i64 [[TMP3]]) #[[ATTR2]]
1347 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
1348 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
1349 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
1350 // CHECK-NTARGET-NEXT:    ret void
1351 //
1352 //
1353 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2STILi1000EE3fooEv
1354 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) #[[ATTR0]] comdat {
1355 // CHECK-NTARGET-NEXT:  entry:
1356 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1357 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1358 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1359 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1360 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1361 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1362 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1363 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1364 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1365 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
1366 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
1367 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211(i64 [[TMP3]]) #[[ATTR2]]
1368 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
1369 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
1370 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
1371 // CHECK-NTARGET-NEXT:    ret void
1372 //
1373 //
1374 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267
1375 // CHECK-NTARGET-SAME: (i64 noundef [[R:%.*]]) #[[ATTR1:[0-9]+]] {
1376 // CHECK-NTARGET-NEXT:  entry:
1377 // CHECK-NTARGET-NEXT:    [[R_ADDR:%.*]] = alloca i64, align 8
1378 // CHECK-NTARGET-NEXT:    [[R_CASTED:%.*]] = alloca i64, align 8
1379 // CHECK-NTARGET-NEXT:    store i64 [[R]], ptr [[R_ADDR]], align 8
1380 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[R_ADDR]], align 4
1381 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[R_CASTED]], align 4
1382 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[R_CASTED]], align 8
1383 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined, i64 [[TMP1]])
1384 // CHECK-NTARGET-NEXT:    ret void
1385 //
1386 //
1387 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined
1388 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[R:%.*]]) #[[ATTR1]] {
1389 // CHECK-NTARGET-NEXT:  entry:
1390 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1391 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1392 // CHECK-NTARGET-NEXT:    [[R_ADDR:%.*]] = alloca i64, align 8
1393 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1394 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1395 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1396 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1397 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1398 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1399 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
1400 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1401 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1402 // CHECK-NTARGET-NEXT:    store i64 [[R]], ptr [[R_ADDR]], align 8
1403 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1404 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
1405 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1406 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1407 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1408 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1409 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1410 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1411 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
1412 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1413 // CHECK-NTARGET:       cond.true:
1414 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
1415 // CHECK-NTARGET:       cond.false:
1416 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1417 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
1418 // CHECK-NTARGET:       cond.end:
1419 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1420 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1421 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1422 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1423 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1424 // CHECK-NTARGET:       omp.inner.for.cond:
1425 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1426 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1427 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1428 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1429 // CHECK-NTARGET:       omp.inner.for.body:
1430 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1431 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
1432 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1433 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1434 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[R_ADDR]], align 4
1435 // CHECK-NTARGET-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP8]], 1
1436 // CHECK-NTARGET-NEXT:    store i32 [[INC]], ptr [[R_ADDR]], align 4
1437 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1438 // CHECK-NTARGET:       omp.body.continue:
1439 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1440 // CHECK-NTARGET:       omp.inner.for.inc:
1441 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1442 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
1443 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
1444 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
1445 // CHECK-NTARGET:       omp.inner.for.end:
1446 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1447 // CHECK-NTARGET:       omp.loop.exit:
1448 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1449 // CHECK-NTARGET-NEXT:    ret void
1450 //
1451 //
1452 // CHECK-NTARGET-LABEL: define {{[^@]+}}@__cxx_global_var_init
1453 // CHECK-NTARGET-SAME: () #[[ATTR3:[0-9]+]] {
1454 // CHECK-NTARGET-NEXT:  entry:
1455 // CHECK-NTARGET-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
1456 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2]]
1457 // CHECK-NTARGET-NEXT:    ret void
1458 //
1459 //
1460 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SAC1Ev
1461 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR4:[0-9]+]] comdat {
1462 // CHECK-NTARGET-NEXT:  entry:
1463 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1464 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1465 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1466 // CHECK-NTARGET-NEXT:    call void @_ZN2SAC2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]])
1467 // CHECK-NTARGET-NEXT:    ret void
1468 //
1469 //
1470 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SAD1Ev
1471 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1472 // CHECK-NTARGET-NEXT:  entry:
1473 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1474 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1475 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1476 // CHECK-NTARGET-NEXT:    call void @_ZN2SAD2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]]) #[[ATTR2]]
1477 // CHECK-NTARGET-NEXT:    ret void
1478 //
1479 //
1480 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SAC2Ev
1481 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1482 // CHECK-NTARGET-NEXT:  entry:
1483 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1484 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1485 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1486 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1487 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1488 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1489 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1490 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1491 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 2
1492 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
1493 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
1494 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
1495 // CHECK-NTARGET-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
1496 // CHECK-NTARGET-NEXT:    ret void
1497 //
1498 //
1499 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SAD2Ev
1500 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1501 // CHECK-NTARGET-NEXT:  entry:
1502 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1503 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1504 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1505 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1506 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1507 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1508 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1509 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1510 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 3
1511 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
1512 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
1513 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
1514 // CHECK-NTARGET-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
1515 // CHECK-NTARGET-NEXT:    ret void
1516 //
1517 //
1518 // CHECK-NTARGET-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
1519 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
1520 // CHECK-NTARGET-NEXT:  entry:
1521 // CHECK-NTARGET-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
1522 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
1523 // CHECK-NTARGET-NEXT:    ret void
1524 //
1525 //
1526 // CHECK-NTARGET-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
1527 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
1528 // CHECK-NTARGET-NEXT:  entry:
1529 // CHECK-NTARGET-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
1530 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
1531 // CHECK-NTARGET-NEXT:    ret void
1532 //
1533 //
1534 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SBC1Ev
1535 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1536 // CHECK-NTARGET-NEXT:  entry:
1537 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1538 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1539 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1540 // CHECK-NTARGET-NEXT:    call void @_ZN2SBC2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]])
1541 // CHECK-NTARGET-NEXT:    ret void
1542 //
1543 //
1544 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SBD1Ev
1545 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1546 // CHECK-NTARGET-NEXT:  entry:
1547 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1548 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1549 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1550 // CHECK-NTARGET-NEXT:    call void @_ZN2SBD2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]]) #[[ATTR2]]
1551 // CHECK-NTARGET-NEXT:    ret void
1552 //
1553 //
1554 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SBC2Ev
1555 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1556 // CHECK-NTARGET-NEXT:  entry:
1557 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1558 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1559 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1560 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1561 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1562 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1563 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1564 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1565 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 5
1566 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
1567 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
1568 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
1569 // CHECK-NTARGET-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
1570 // CHECK-NTARGET-NEXT:    ret void
1571 //
1572 //
1573 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SBD2Ev
1574 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1575 // CHECK-NTARGET-NEXT:  entry:
1576 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1577 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1578 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1579 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1580 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1581 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1582 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1583 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1584 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 6
1585 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
1586 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
1587 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
1588 // CHECK-NTARGET-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
1589 // CHECK-NTARGET-NEXT:    ret void
1590 //
1591 //
1592 // CHECK-NTARGET-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
1593 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
1594 // CHECK-NTARGET-NEXT:  entry:
1595 // CHECK-NTARGET-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
1596 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
1597 // CHECK-NTARGET-NEXT:    ret void
1598 //
1599 //
1600 // CHECK-NTARGET-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
1601 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
1602 // CHECK-NTARGET-NEXT:  entry:
1603 // CHECK-NTARGET-NEXT:    call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
1604 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
1605 // CHECK-NTARGET-NEXT:    ret void
1606 //
1607 //
1608 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SCC1Ev
1609 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1610 // CHECK-NTARGET-NEXT:  entry:
1611 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1612 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1613 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1614 // CHECK-NTARGET-NEXT:    call void @_ZN2SCC2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]])
1615 // CHECK-NTARGET-NEXT:    ret void
1616 //
1617 //
1618 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SCD1Ev
1619 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1620 // CHECK-NTARGET-NEXT:  entry:
1621 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1622 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1623 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1624 // CHECK-NTARGET-NEXT:    call void @_ZN2SCD2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]]) #[[ATTR2]]
1625 // CHECK-NTARGET-NEXT:    ret void
1626 //
1627 //
1628 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SCC2Ev
1629 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1630 // CHECK-NTARGET-NEXT:  entry:
1631 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1632 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1633 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1634 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1635 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1636 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1637 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1638 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1639 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1640 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
1641 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
1642 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148(i64 [[TMP3]]) #[[ATTR2]]
1643 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
1644 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
1645 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
1646 // CHECK-NTARGET-NEXT:    ret void
1647 //
1648 //
1649 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148
1650 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
1651 // CHECK-NTARGET-NEXT:  entry:
1652 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1653 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1654 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
1655 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1656 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
1657 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
1658 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined, i64 [[TMP1]])
1659 // CHECK-NTARGET-NEXT:    ret void
1660 //
1661 //
1662 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined
1663 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
1664 // CHECK-NTARGET-NEXT:  entry:
1665 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1666 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1667 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1668 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1669 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1670 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1671 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1672 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1673 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1674 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
1675 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1676 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1677 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
1678 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1679 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
1680 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1681 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1682 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1683 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1684 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1685 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1686 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
1687 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1688 // CHECK-NTARGET:       cond.true:
1689 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
1690 // CHECK-NTARGET:       cond.false:
1691 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1692 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
1693 // CHECK-NTARGET:       cond.end:
1694 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1695 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1696 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1697 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1698 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1699 // CHECK-NTARGET:       omp.inner.for.cond:
1700 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1701 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1702 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1703 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1704 // CHECK-NTARGET:       omp.inner.for.body:
1705 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1706 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
1707 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1708 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1709 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
1710 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 8
1711 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
1712 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1713 // CHECK-NTARGET:       omp.body.continue:
1714 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1715 // CHECK-NTARGET:       omp.inner.for.inc:
1716 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1717 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
1718 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
1719 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
1720 // CHECK-NTARGET:       omp.inner.for.end:
1721 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1722 // CHECK-NTARGET:       omp.loop.exit:
1723 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1724 // CHECK-NTARGET-NEXT:    ret void
1725 //
1726 //
1727 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SCD2Ev
1728 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1729 // CHECK-NTARGET-NEXT:  entry:
1730 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1731 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1732 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1733 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1734 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1735 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1736 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1737 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1738 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 9
1739 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
1740 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
1741 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
1742 // CHECK-NTARGET-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
1743 // CHECK-NTARGET-NEXT:    ret void
1744 //
1745 //
1746 // CHECK-NTARGET-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
1747 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
1748 // CHECK-NTARGET-NEXT:  entry:
1749 // CHECK-NTARGET-NEXT:    call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
1750 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
1751 // CHECK-NTARGET-NEXT:    ret void
1752 //
1753 //
1754 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SDC1Ev
1755 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1756 // CHECK-NTARGET-NEXT:  entry:
1757 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1758 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1759 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1760 // CHECK-NTARGET-NEXT:    call void @_ZN2SDC2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]])
1761 // CHECK-NTARGET-NEXT:    ret void
1762 //
1763 //
1764 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SDD1Ev
1765 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1766 // CHECK-NTARGET-NEXT:  entry:
1767 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1768 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1769 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1770 // CHECK-NTARGET-NEXT:    call void @_ZN2SDD2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]]) #[[ATTR2]]
1771 // CHECK-NTARGET-NEXT:    ret void
1772 //
1773 //
1774 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SDC2Ev
1775 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1776 // CHECK-NTARGET-NEXT:  entry:
1777 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1778 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1779 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1780 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1781 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1782 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1783 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1784 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1785 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 11
1786 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
1787 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
1788 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
1789 // CHECK-NTARGET-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
1790 // CHECK-NTARGET-NEXT:    ret void
1791 //
1792 //
1793 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SDD2Ev
1794 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1795 // CHECK-NTARGET-NEXT:  entry:
1796 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1797 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1798 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1799 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1800 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1801 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1802 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1803 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1804 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1805 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
1806 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
1807 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174(i64 [[TMP3]]) #[[ATTR2]]
1808 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
1809 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
1810 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
1811 // CHECK-NTARGET-NEXT:    ret void
1812 //
1813 //
1814 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174
1815 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
1816 // CHECK-NTARGET-NEXT:  entry:
1817 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1818 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1819 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
1820 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1821 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
1822 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
1823 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined, i64 [[TMP1]])
1824 // CHECK-NTARGET-NEXT:    ret void
1825 //
1826 //
1827 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined
1828 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
1829 // CHECK-NTARGET-NEXT:  entry:
1830 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1831 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1832 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1833 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1834 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1835 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1836 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1837 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1838 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1839 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
1840 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1841 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1842 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
1843 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1844 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
1845 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1846 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1847 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1848 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1849 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1850 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1851 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
1852 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1853 // CHECK-NTARGET:       cond.true:
1854 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
1855 // CHECK-NTARGET:       cond.false:
1856 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1857 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
1858 // CHECK-NTARGET:       cond.end:
1859 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1860 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1861 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1862 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1863 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1864 // CHECK-NTARGET:       omp.inner.for.cond:
1865 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1866 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1867 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1868 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1869 // CHECK-NTARGET:       omp.inner.for.body:
1870 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1871 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
1872 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1873 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1874 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
1875 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 12
1876 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
1877 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1878 // CHECK-NTARGET:       omp.body.continue:
1879 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1880 // CHECK-NTARGET:       omp.inner.for.inc:
1881 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1882 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
1883 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
1884 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
1885 // CHECK-NTARGET:       omp.inner.for.end:
1886 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1887 // CHECK-NTARGET:       omp.loop.exit:
1888 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
1889 // CHECK-NTARGET-NEXT:    ret void
1890 //
1891 //
1892 // CHECK-NTARGET-LABEL: define {{[^@]+}}@__cxx_global_var_init.6
1893 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
1894 // CHECK-NTARGET-NEXT:  entry:
1895 // CHECK-NTARGET-NEXT:    call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
1896 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
1897 // CHECK-NTARGET-NEXT:    ret void
1898 //
1899 //
1900 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SEC1Ev
1901 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1902 // CHECK-NTARGET-NEXT:  entry:
1903 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1904 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1905 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1906 // CHECK-NTARGET-NEXT:    call void @_ZN2SEC2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]])
1907 // CHECK-NTARGET-NEXT:    ret void
1908 //
1909 //
1910 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SED1Ev
1911 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1912 // CHECK-NTARGET-NEXT:  entry:
1913 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1914 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1915 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1916 // CHECK-NTARGET-NEXT:    call void @_ZN2SED2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]]) #[[ATTR2]]
1917 // CHECK-NTARGET-NEXT:    ret void
1918 //
1919 //
1920 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SEC2Ev
1921 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
1922 // CHECK-NTARGET-NEXT:  entry:
1923 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1924 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
1925 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1926 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1927 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1928 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
1929 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1930 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
1931 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
1932 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
1933 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
1934 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192(i64 [[TMP3]]) #[[ATTR2]]
1935 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
1936 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
1937 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
1938 // CHECK-NTARGET-NEXT:    ret void
1939 //
1940 //
1941 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192
1942 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
1943 // CHECK-NTARGET-NEXT:  entry:
1944 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1945 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
1946 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
1947 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1948 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
1949 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
1950 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined, i64 [[TMP1]])
1951 // CHECK-NTARGET-NEXT:    ret void
1952 //
1953 //
1954 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined
1955 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
1956 // CHECK-NTARGET-NEXT:  entry:
1957 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1958 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1959 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
1960 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1961 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1962 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1963 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1964 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1965 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1966 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
1967 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1968 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1969 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
1970 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1971 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
1972 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1973 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1974 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1975 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
1976 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1977 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1978 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
1979 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1980 // CHECK-NTARGET:       cond.true:
1981 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
1982 // CHECK-NTARGET:       cond.false:
1983 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1984 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
1985 // CHECK-NTARGET:       cond.end:
1986 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
1987 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1988 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1989 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
1990 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1991 // CHECK-NTARGET:       omp.inner.for.cond:
1992 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1993 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1994 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
1995 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1996 // CHECK-NTARGET:       omp.inner.for.body:
1997 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1998 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
1999 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2000 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2001 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
2002 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 14
2003 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
2004 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2005 // CHECK-NTARGET:       omp.body.continue:
2006 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2007 // CHECK-NTARGET:       omp.inner.for.inc:
2008 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2009 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2010 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2011 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
2012 // CHECK-NTARGET:       omp.inner.for.end:
2013 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2014 // CHECK-NTARGET:       omp.loop.exit:
2015 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2016 // CHECK-NTARGET-NEXT:    ret void
2017 //
2018 //
2019 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2SED2Ev
2020 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
2021 // CHECK-NTARGET-NEXT:  entry:
2022 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2023 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
2024 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2025 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2026 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2027 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
2028 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2029 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
2030 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
2031 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
2032 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
2033 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199(i64 [[TMP3]]) #[[ATTR2]]
2034 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
2035 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
2036 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
2037 // CHECK-NTARGET-NEXT:    ret void
2038 //
2039 //
2040 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199
2041 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
2042 // CHECK-NTARGET-NEXT:  entry:
2043 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2044 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2045 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2046 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2047 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
2048 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
2049 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined, i64 [[TMP1]])
2050 // CHECK-NTARGET-NEXT:    ret void
2051 //
2052 //
2053 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined
2054 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
2055 // CHECK-NTARGET-NEXT:  entry:
2056 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2057 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2058 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2059 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2060 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2061 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2062 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2063 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2064 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2065 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
2066 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2067 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2068 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2069 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2070 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2071 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2072 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2073 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2074 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2075 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2076 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2077 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2078 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2079 // CHECK-NTARGET:       cond.true:
2080 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
2081 // CHECK-NTARGET:       cond.false:
2082 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2083 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
2084 // CHECK-NTARGET:       cond.end:
2085 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2086 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2087 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2088 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2089 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2090 // CHECK-NTARGET:       omp.inner.for.cond:
2091 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2092 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2093 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2094 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2095 // CHECK-NTARGET:       omp.inner.for.body:
2096 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2097 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2098 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2099 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2100 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
2101 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 15
2102 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
2103 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2104 // CHECK-NTARGET:       omp.body.continue:
2105 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2106 // CHECK-NTARGET:       omp.inner.for.inc:
2107 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2108 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2109 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2110 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
2111 // CHECK-NTARGET:       omp.inner.for.end:
2112 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2113 // CHECK-NTARGET:       omp.loop.exit:
2114 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2115 // CHECK-NTARGET-NEXT:    ret void
2116 //
2117 //
2118 // CHECK-NTARGET-LABEL: define {{[^@]+}}@__cxx_global_var_init.7
2119 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
2120 // CHECK-NTARGET-NEXT:  entry:
2121 // CHECK-NTARGET-NEXT:    call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
2122 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
2123 // CHECK-NTARGET-NEXT:    ret void
2124 //
2125 //
2126 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2STILi100EEC1Ev
2127 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
2128 // CHECK-NTARGET-NEXT:  entry:
2129 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2130 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2131 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2132 // CHECK-NTARGET-NEXT:    call void @_ZN2STILi100EEC2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]])
2133 // CHECK-NTARGET-NEXT:    ret void
2134 //
2135 //
2136 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2STILi100EED1Ev
2137 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
2138 // CHECK-NTARGET-NEXT:  entry:
2139 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2140 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2141 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2142 // CHECK-NTARGET-NEXT:    call void @_ZN2STILi100EED2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]]) #[[ATTR2]]
2143 // CHECK-NTARGET-NEXT:    ret void
2144 //
2145 //
2146 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2STILi100EEC2Ev
2147 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
2148 // CHECK-NTARGET-NEXT:  entry:
2149 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2150 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
2151 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2152 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2153 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2154 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
2155 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2156 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
2157 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
2158 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
2159 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
2160 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218(i64 [[TMP3]]) #[[ATTR2]]
2161 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
2162 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
2163 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
2164 // CHECK-NTARGET-NEXT:    ret void
2165 //
2166 //
2167 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218
2168 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
2169 // CHECK-NTARGET-NEXT:  entry:
2170 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2171 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2172 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2173 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2174 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
2175 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
2176 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined, i64 [[TMP1]])
2177 // CHECK-NTARGET-NEXT:    ret void
2178 //
2179 //
2180 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined
2181 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
2182 // CHECK-NTARGET-NEXT:  entry:
2183 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2184 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2185 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2186 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2187 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2188 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2189 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2190 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2191 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2192 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
2193 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2194 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2195 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2196 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2197 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2198 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2199 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2200 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2201 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2202 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2203 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2204 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2205 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2206 // CHECK-NTARGET:       cond.true:
2207 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
2208 // CHECK-NTARGET:       cond.false:
2209 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2210 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
2211 // CHECK-NTARGET:       cond.end:
2212 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2213 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2214 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2215 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2216 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2217 // CHECK-NTARGET:       omp.inner.for.cond:
2218 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2219 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2220 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2221 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2222 // CHECK-NTARGET:       omp.inner.for.body:
2223 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2224 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2225 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2226 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2227 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
2228 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 117
2229 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
2230 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2231 // CHECK-NTARGET:       omp.body.continue:
2232 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2233 // CHECK-NTARGET:       omp.inner.for.inc:
2234 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2235 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2236 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2237 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
2238 // CHECK-NTARGET:       omp.inner.for.end:
2239 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2240 // CHECK-NTARGET:       omp.loop.exit:
2241 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2242 // CHECK-NTARGET-NEXT:    ret void
2243 //
2244 //
2245 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2STILi100EED2Ev
2246 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
2247 // CHECK-NTARGET-NEXT:  entry:
2248 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2249 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
2250 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2251 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2252 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2253 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
2254 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2255 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
2256 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
2257 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
2258 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
2259 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225(i64 [[TMP3]]) #[[ATTR2]]
2260 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
2261 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
2262 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
2263 // CHECK-NTARGET-NEXT:    ret void
2264 //
2265 //
2266 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225
2267 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
2268 // CHECK-NTARGET-NEXT:  entry:
2269 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2270 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2271 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2272 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2273 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
2274 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
2275 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined, i64 [[TMP1]])
2276 // CHECK-NTARGET-NEXT:    ret void
2277 //
2278 //
2279 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined
2280 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
2281 // CHECK-NTARGET-NEXT:  entry:
2282 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2283 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2284 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2285 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2286 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2287 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2288 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2289 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2290 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2291 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
2292 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2293 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2294 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2295 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2296 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2297 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2298 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2299 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2300 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2301 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2302 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2303 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2304 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2305 // CHECK-NTARGET:       cond.true:
2306 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
2307 // CHECK-NTARGET:       cond.false:
2308 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2309 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
2310 // CHECK-NTARGET:       cond.end:
2311 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2312 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2313 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2314 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2315 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2316 // CHECK-NTARGET:       omp.inner.for.cond:
2317 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2318 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2319 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2320 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2321 // CHECK-NTARGET:       omp.inner.for.body:
2322 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2323 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2324 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2325 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2326 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
2327 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 118
2328 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
2329 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2330 // CHECK-NTARGET:       omp.body.continue:
2331 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2332 // CHECK-NTARGET:       omp.inner.for.inc:
2333 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2334 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2335 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2336 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
2337 // CHECK-NTARGET:       omp.inner.for.end:
2338 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2339 // CHECK-NTARGET:       omp.loop.exit:
2340 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2341 // CHECK-NTARGET-NEXT:    ret void
2342 //
2343 //
2344 // CHECK-NTARGET-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
2345 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
2346 // CHECK-NTARGET-NEXT:  entry:
2347 // CHECK-NTARGET-NEXT:    call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
2348 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
2349 // CHECK-NTARGET-NEXT:    ret void
2350 //
2351 //
2352 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC1Ev
2353 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
2354 // CHECK-NTARGET-NEXT:  entry:
2355 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2356 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2357 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2358 // CHECK-NTARGET-NEXT:    call void @_ZN2STILi1000EEC2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]])
2359 // CHECK-NTARGET-NEXT:    ret void
2360 //
2361 //
2362 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2STILi1000EED1Ev
2363 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
2364 // CHECK-NTARGET-NEXT:  entry:
2365 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2366 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2367 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2368 // CHECK-NTARGET-NEXT:    call void @_ZN2STILi1000EED2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]]) #[[ATTR2]]
2369 // CHECK-NTARGET-NEXT:    ret void
2370 //
2371 //
2372 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC2Ev
2373 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
2374 // CHECK-NTARGET-NEXT:  entry:
2375 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2376 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
2377 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2378 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2379 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2380 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
2381 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2382 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
2383 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
2384 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
2385 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
2386 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218(i64 [[TMP3]]) #[[ATTR2]]
2387 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
2388 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
2389 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
2390 // CHECK-NTARGET-NEXT:    ret void
2391 //
2392 //
2393 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218
2394 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
2395 // CHECK-NTARGET-NEXT:  entry:
2396 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2397 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2398 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2399 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2400 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
2401 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
2402 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined, i64 [[TMP1]])
2403 // CHECK-NTARGET-NEXT:    ret void
2404 //
2405 //
2406 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined
2407 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
2408 // CHECK-NTARGET-NEXT:  entry:
2409 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2410 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2411 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2412 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2413 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2414 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2415 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2416 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2417 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2418 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
2419 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2420 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2421 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2422 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2423 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2424 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2425 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2426 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2427 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2428 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2429 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2430 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2431 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2432 // CHECK-NTARGET:       cond.true:
2433 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
2434 // CHECK-NTARGET:       cond.false:
2435 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2436 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
2437 // CHECK-NTARGET:       cond.end:
2438 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2439 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2440 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2441 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2442 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2443 // CHECK-NTARGET:       omp.inner.for.cond:
2444 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2445 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2446 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2447 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2448 // CHECK-NTARGET:       omp.inner.for.body:
2449 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2450 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2451 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2452 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2453 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
2454 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1017
2455 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
2456 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2457 // CHECK-NTARGET:       omp.body.continue:
2458 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2459 // CHECK-NTARGET:       omp.inner.for.inc:
2460 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2461 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2462 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2463 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
2464 // CHECK-NTARGET:       omp.inner.for.end:
2465 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2466 // CHECK-NTARGET:       omp.loop.exit:
2467 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2468 // CHECK-NTARGET-NEXT:    ret void
2469 //
2470 //
2471 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_ZN2STILi1000EED2Ev
2472 // CHECK-NTARGET-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR4]] comdat {
2473 // CHECK-NTARGET-NEXT:  entry:
2474 // CHECK-NTARGET-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2475 // CHECK-NTARGET-NEXT:    [[A:%.*]] = alloca i32, align 4
2476 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2477 // CHECK-NTARGET-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2478 // CHECK-NTARGET-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2479 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
2480 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2481 // CHECK-NTARGET-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
2482 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
2483 // CHECK-NTARGET-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
2484 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
2485 // CHECK-NTARGET-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225(i64 [[TMP3]]) #[[ATTR2]]
2486 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
2487 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
2488 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
2489 // CHECK-NTARGET-NEXT:    ret void
2490 //
2491 //
2492 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225
2493 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
2494 // CHECK-NTARGET-NEXT:  entry:
2495 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2496 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2497 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2498 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2499 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
2500 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
2501 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined, i64 [[TMP1]])
2502 // CHECK-NTARGET-NEXT:    ret void
2503 //
2504 //
2505 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined
2506 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
2507 // CHECK-NTARGET-NEXT:  entry:
2508 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2509 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2510 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2511 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2512 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2513 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2514 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2515 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2516 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2517 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
2518 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2519 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2520 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2521 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2522 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2523 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2524 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2525 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2526 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2527 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2528 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2529 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2530 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2531 // CHECK-NTARGET:       cond.true:
2532 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
2533 // CHECK-NTARGET:       cond.false:
2534 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2535 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
2536 // CHECK-NTARGET:       cond.end:
2537 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2538 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2539 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2540 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2541 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2542 // CHECK-NTARGET:       omp.inner.for.cond:
2543 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2544 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2545 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2546 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2547 // CHECK-NTARGET:       omp.inner.for.body:
2548 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2549 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2550 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2551 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2552 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
2553 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1018
2554 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
2555 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2556 // CHECK-NTARGET:       omp.body.continue:
2557 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2558 // CHECK-NTARGET:       omp.inner.for.inc:
2559 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2560 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2561 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2562 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
2563 // CHECK-NTARGET:       omp.inner.for.end:
2564 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2565 // CHECK-NTARGET:       omp.loop.exit:
2566 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2567 // CHECK-NTARGET-NEXT:    ret void
2568 //
2569 //
2570 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122
2571 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
2572 // CHECK-NTARGET-NEXT:  entry:
2573 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2574 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2575 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2576 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2577 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
2578 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
2579 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined, i64 [[TMP1]])
2580 // CHECK-NTARGET-NEXT:    ret void
2581 //
2582 //
2583 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined
2584 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
2585 // CHECK-NTARGET-NEXT:  entry:
2586 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2587 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2588 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2589 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2590 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2591 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2592 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2593 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2594 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2595 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
2596 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2597 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2598 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2599 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2600 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2601 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2602 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2603 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2604 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2605 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2606 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2607 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2608 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2609 // CHECK-NTARGET:       cond.true:
2610 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
2611 // CHECK-NTARGET:       cond.false:
2612 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2613 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
2614 // CHECK-NTARGET:       cond.end:
2615 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2616 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2617 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2618 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2619 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2620 // CHECK-NTARGET:       omp.inner.for.cond:
2621 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2622 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2623 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2624 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2625 // CHECK-NTARGET:       omp.inner.for.body:
2626 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2627 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2628 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2629 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2630 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
2631 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 4
2632 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
2633 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2634 // CHECK-NTARGET:       omp.body.continue:
2635 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2636 // CHECK-NTARGET:       omp.inner.for.inc:
2637 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2638 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2639 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2640 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
2641 // CHECK-NTARGET:       omp.inner.for.end:
2642 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2643 // CHECK-NTARGET:       omp.loop.exit:
2644 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2645 // CHECK-NTARGET-NEXT:    ret void
2646 //
2647 //
2648 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185
2649 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
2650 // CHECK-NTARGET-NEXT:  entry:
2651 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2652 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2653 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2654 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2655 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
2656 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
2657 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined, i64 [[TMP1]])
2658 // CHECK-NTARGET-NEXT:    ret void
2659 //
2660 //
2661 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined
2662 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
2663 // CHECK-NTARGET-NEXT:  entry:
2664 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2665 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2666 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2667 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2668 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2669 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2670 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2671 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2672 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2673 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
2674 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2675 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2676 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2677 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2678 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2679 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2680 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2681 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2682 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2683 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2684 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2685 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2686 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2687 // CHECK-NTARGET:       cond.true:
2688 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
2689 // CHECK-NTARGET:       cond.false:
2690 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2691 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
2692 // CHECK-NTARGET:       cond.end:
2693 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2694 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2695 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2696 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2697 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2698 // CHECK-NTARGET:       omp.inner.for.cond:
2699 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2700 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2701 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2702 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2703 // CHECK-NTARGET:       omp.inner.for.body:
2704 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2705 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2706 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2707 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2708 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
2709 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 13
2710 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
2711 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2712 // CHECK-NTARGET:       omp.body.continue:
2713 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2714 // CHECK-NTARGET:       omp.inner.for.inc:
2715 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2716 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2717 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2718 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
2719 // CHECK-NTARGET:       omp.inner.for.end:
2720 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2721 // CHECK-NTARGET:       omp.loop.exit:
2722 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2723 // CHECK-NTARGET-NEXT:    ret void
2724 //
2725 //
2726 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211
2727 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
2728 // CHECK-NTARGET-NEXT:  entry:
2729 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2730 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2731 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2732 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2733 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
2734 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
2735 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined, i64 [[TMP1]])
2736 // CHECK-NTARGET-NEXT:    ret void
2737 //
2738 //
2739 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined
2740 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
2741 // CHECK-NTARGET-NEXT:  entry:
2742 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2743 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2744 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2745 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2746 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2747 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2748 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2749 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2750 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2751 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
2752 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2753 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2754 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2755 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2756 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2757 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2758 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2759 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2760 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2761 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2762 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2763 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2764 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2765 // CHECK-NTARGET:       cond.true:
2766 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
2767 // CHECK-NTARGET:       cond.false:
2768 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2769 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
2770 // CHECK-NTARGET:       cond.end:
2771 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2772 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2773 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2774 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2775 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2776 // CHECK-NTARGET:       omp.inner.for.cond:
2777 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2778 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2779 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2780 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2781 // CHECK-NTARGET:       omp.inner.for.body:
2782 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2783 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2784 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2785 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2786 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
2787 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 116
2788 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
2789 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2790 // CHECK-NTARGET:       omp.body.continue:
2791 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2792 // CHECK-NTARGET:       omp.inner.for.inc:
2793 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2794 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2795 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2796 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
2797 // CHECK-NTARGET:       omp.inner.for.end:
2798 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2799 // CHECK-NTARGET:       omp.loop.exit:
2800 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2801 // CHECK-NTARGET-NEXT:    ret void
2802 //
2803 //
2804 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211
2805 // CHECK-NTARGET-SAME: (i64 noundef [[A:%.*]]) #[[ATTR1]] {
2806 // CHECK-NTARGET-NEXT:  entry:
2807 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2808 // CHECK-NTARGET-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
2809 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2810 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
2811 // CHECK-NTARGET-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
2812 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
2813 // CHECK-NTARGET-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined, i64 [[TMP1]])
2814 // CHECK-NTARGET-NEXT:    ret void
2815 //
2816 //
2817 // CHECK-NTARGET-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined
2818 // CHECK-NTARGET-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR1]] {
2819 // CHECK-NTARGET-NEXT:  entry:
2820 // CHECK-NTARGET-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2821 // CHECK-NTARGET-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2822 // CHECK-NTARGET-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
2823 // CHECK-NTARGET-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2824 // CHECK-NTARGET-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2825 // CHECK-NTARGET-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2826 // CHECK-NTARGET-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2827 // CHECK-NTARGET-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2828 // CHECK-NTARGET-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2829 // CHECK-NTARGET-NEXT:    [[I:%.*]] = alloca i32, align 4
2830 // CHECK-NTARGET-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2831 // CHECK-NTARGET-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2832 // CHECK-NTARGET-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
2833 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2834 // CHECK-NTARGET-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
2835 // CHECK-NTARGET-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2836 // CHECK-NTARGET-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2837 // CHECK-NTARGET-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2838 // CHECK-NTARGET-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
2839 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2840 // CHECK-NTARGET-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2841 // CHECK-NTARGET-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
2842 // CHECK-NTARGET-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2843 // CHECK-NTARGET:       cond.true:
2844 // CHECK-NTARGET-NEXT:    br label [[COND_END:%.*]]
2845 // CHECK-NTARGET:       cond.false:
2846 // CHECK-NTARGET-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2847 // CHECK-NTARGET-NEXT:    br label [[COND_END]]
2848 // CHECK-NTARGET:       cond.end:
2849 // CHECK-NTARGET-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
2850 // CHECK-NTARGET-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2851 // CHECK-NTARGET-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2852 // CHECK-NTARGET-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
2853 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2854 // CHECK-NTARGET:       omp.inner.for.cond:
2855 // CHECK-NTARGET-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2856 // CHECK-NTARGET-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2857 // CHECK-NTARGET-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
2858 // CHECK-NTARGET-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2859 // CHECK-NTARGET:       omp.inner.for.body:
2860 // CHECK-NTARGET-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2861 // CHECK-NTARGET-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
2862 // CHECK-NTARGET-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2863 // CHECK-NTARGET-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2864 // CHECK-NTARGET-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
2865 // CHECK-NTARGET-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1016
2866 // CHECK-NTARGET-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
2867 // CHECK-NTARGET-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2868 // CHECK-NTARGET:       omp.body.continue:
2869 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2870 // CHECK-NTARGET:       omp.inner.for.inc:
2871 // CHECK-NTARGET-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2872 // CHECK-NTARGET-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
2873 // CHECK-NTARGET-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2874 // CHECK-NTARGET-NEXT:    br label [[OMP_INNER_FOR_COND]]
2875 // CHECK-NTARGET:       omp.inner.for.end:
2876 // CHECK-NTARGET-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2877 // CHECK-NTARGET:       omp.loop.exit:
2878 // CHECK-NTARGET-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
2879 // CHECK-NTARGET-NEXT:    ret void
2880 //
2881 //
2882 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
2883 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
2884 // CHECK-NTARGET-NEXT:  entry:
2885 // CHECK-NTARGET-NEXT:    call void @__cxx_global_var_init()
2886 // CHECK-NTARGET-NEXT:    call void @__cxx_global_var_init.2()
2887 // CHECK-NTARGET-NEXT:    ret void
2888 //
2889 //
2890 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
2891 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
2892 // CHECK-NTARGET-NEXT:  entry:
2893 // CHECK-NTARGET-NEXT:    call void @__cxx_global_var_init.3()
2894 // CHECK-NTARGET-NEXT:    ret void
2895 //
2896 //
2897 // CHECK-NTARGET-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
2898 // CHECK-NTARGET-SAME: () #[[ATTR3]] {
2899 // CHECK-NTARGET-NEXT:  entry:
2900 // CHECK-NTARGET-NEXT:    call void @__cxx_global_var_init.1()
2901 // CHECK-NTARGET-NEXT:    call void @__cxx_global_var_init.4()
2902 // CHECK-NTARGET-NEXT:    call void @__cxx_global_var_init.5()
2903 // CHECK-NTARGET-NEXT:    call void @__cxx_global_var_init.6()
2904 // CHECK-NTARGET-NEXT:    call void @__cxx_global_var_init.7()
2905 // CHECK-NTARGET-NEXT:    call void @__cxx_global_var_init.8()
2906 // CHECK-NTARGET-NEXT:    ret void
2907 //
2908 //
2909 // SIMD-ONLY2-LABEL: define {{[^@]+}}@__cxx_global_var_init
2910 // SIMD-ONLY2-SAME: () #[[ATTR0:[0-9]+]] {
2911 // SIMD-ONLY2-NEXT:  entry:
2912 // SIMD-ONLY2-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
2913 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
2914 // SIMD-ONLY2-NEXT:    ret void
2915 //
2916 //
2917 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SAC1Ev
2918 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
2919 // SIMD-ONLY2-NEXT:  entry:
2920 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2921 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2922 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2923 // SIMD-ONLY2-NEXT:    call void @_ZN2SAC2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]])
2924 // SIMD-ONLY2-NEXT:    ret void
2925 //
2926 //
2927 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SAD1Ev
2928 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2929 // SIMD-ONLY2-NEXT:  entry:
2930 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2931 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2932 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2933 // SIMD-ONLY2-NEXT:    call void @_ZN2SAD2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]]) #[[ATTR2]]
2934 // SIMD-ONLY2-NEXT:    ret void
2935 //
2936 //
2937 // SIMD-ONLY2-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
2938 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
2939 // SIMD-ONLY2-NEXT:  entry:
2940 // SIMD-ONLY2-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
2941 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
2942 // SIMD-ONLY2-NEXT:    ret void
2943 //
2944 //
2945 // SIMD-ONLY2-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
2946 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
2947 // SIMD-ONLY2-NEXT:  entry:
2948 // SIMD-ONLY2-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
2949 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
2950 // SIMD-ONLY2-NEXT:    ret void
2951 //
2952 //
2953 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SBC1Ev
2954 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2955 // SIMD-ONLY2-NEXT:  entry:
2956 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2957 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2958 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2959 // SIMD-ONLY2-NEXT:    call void @_ZN2SBC2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]])
2960 // SIMD-ONLY2-NEXT:    ret void
2961 //
2962 //
2963 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SBD1Ev
2964 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2965 // SIMD-ONLY2-NEXT:  entry:
2966 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2967 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2968 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2969 // SIMD-ONLY2-NEXT:    call void @_ZN2SBD2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]]) #[[ATTR2]]
2970 // SIMD-ONLY2-NEXT:    ret void
2971 //
2972 //
2973 // SIMD-ONLY2-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
2974 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
2975 // SIMD-ONLY2-NEXT:  entry:
2976 // SIMD-ONLY2-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
2977 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
2978 // SIMD-ONLY2-NEXT:    ret void
2979 //
2980 //
2981 // SIMD-ONLY2-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
2982 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
2983 // SIMD-ONLY2-NEXT:  entry:
2984 // SIMD-ONLY2-NEXT:    call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
2985 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
2986 // SIMD-ONLY2-NEXT:    ret void
2987 //
2988 //
2989 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SCC1Ev
2990 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
2991 // SIMD-ONLY2-NEXT:  entry:
2992 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2993 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2994 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2995 // SIMD-ONLY2-NEXT:    call void @_ZN2SCC2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]])
2996 // SIMD-ONLY2-NEXT:    ret void
2997 //
2998 //
2999 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SCD1Ev
3000 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3001 // SIMD-ONLY2-NEXT:  entry:
3002 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3003 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3004 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3005 // SIMD-ONLY2-NEXT:    call void @_ZN2SCD2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]]) #[[ATTR2]]
3006 // SIMD-ONLY2-NEXT:    ret void
3007 //
3008 //
3009 // SIMD-ONLY2-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
3010 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
3011 // SIMD-ONLY2-NEXT:  entry:
3012 // SIMD-ONLY2-NEXT:    call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
3013 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
3014 // SIMD-ONLY2-NEXT:    ret void
3015 //
3016 //
3017 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SDC1Ev
3018 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3019 // SIMD-ONLY2-NEXT:  entry:
3020 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3021 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3022 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3023 // SIMD-ONLY2-NEXT:    call void @_ZN2SDC2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]])
3024 // SIMD-ONLY2-NEXT:    ret void
3025 //
3026 //
3027 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SDD1Ev
3028 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3029 // SIMD-ONLY2-NEXT:  entry:
3030 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3031 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3032 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3033 // SIMD-ONLY2-NEXT:    call void @_ZN2SDD2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]]) #[[ATTR2]]
3034 // SIMD-ONLY2-NEXT:    ret void
3035 //
3036 //
3037 // SIMD-ONLY2-LABEL: define {{[^@]+}}@__cxx_global_var_init.6
3038 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
3039 // SIMD-ONLY2-NEXT:  entry:
3040 // SIMD-ONLY2-NEXT:    call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
3041 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
3042 // SIMD-ONLY2-NEXT:    ret void
3043 //
3044 //
3045 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SEC1Ev
3046 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3047 // SIMD-ONLY2-NEXT:  entry:
3048 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3049 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3050 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3051 // SIMD-ONLY2-NEXT:    call void @_ZN2SEC2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]])
3052 // SIMD-ONLY2-NEXT:    ret void
3053 //
3054 //
3055 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SED1Ev
3056 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3057 // SIMD-ONLY2-NEXT:  entry:
3058 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3059 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3060 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3061 // SIMD-ONLY2-NEXT:    call void @_ZN2SED2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]]) #[[ATTR2]]
3062 // SIMD-ONLY2-NEXT:    ret void
3063 //
3064 //
3065 // SIMD-ONLY2-LABEL: define {{[^@]+}}@__cxx_global_var_init.7
3066 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
3067 // SIMD-ONLY2-NEXT:  entry:
3068 // SIMD-ONLY2-NEXT:    call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
3069 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
3070 // SIMD-ONLY2-NEXT:    ret void
3071 //
3072 //
3073 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2STILi100EEC1Ev
3074 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3075 // SIMD-ONLY2-NEXT:  entry:
3076 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3077 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3078 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3079 // SIMD-ONLY2-NEXT:    call void @_ZN2STILi100EEC2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]])
3080 // SIMD-ONLY2-NEXT:    ret void
3081 //
3082 //
3083 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2STILi100EED1Ev
3084 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3085 // SIMD-ONLY2-NEXT:  entry:
3086 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3087 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3088 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3089 // SIMD-ONLY2-NEXT:    call void @_ZN2STILi100EED2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]]) #[[ATTR2]]
3090 // SIMD-ONLY2-NEXT:    ret void
3091 //
3092 //
3093 // SIMD-ONLY2-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
3094 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
3095 // SIMD-ONLY2-NEXT:  entry:
3096 // SIMD-ONLY2-NEXT:    call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
3097 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
3098 // SIMD-ONLY2-NEXT:    ret void
3099 //
3100 //
3101 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC1Ev
3102 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3103 // SIMD-ONLY2-NEXT:  entry:
3104 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3105 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3106 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3107 // SIMD-ONLY2-NEXT:    call void @_ZN2STILi1000EEC2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]])
3108 // SIMD-ONLY2-NEXT:    ret void
3109 //
3110 //
3111 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2STILi1000EED1Ev
3112 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3113 // SIMD-ONLY2-NEXT:  entry:
3114 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3115 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3116 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3117 // SIMD-ONLY2-NEXT:    call void @_ZN2STILi1000EED2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]]) #[[ATTR2]]
3118 // SIMD-ONLY2-NEXT:    ret void
3119 //
3120 //
3121 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_Z3bari
3122 // SIMD-ONLY2-SAME: (i32 noundef signext [[A:%.*]]) #[[ATTR3:[0-9]+]] {
3123 // SIMD-ONLY2-NEXT:  entry:
3124 // SIMD-ONLY2-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
3125 // SIMD-ONLY2-NEXT:    [[R:%.*]] = alloca i32, align 4
3126 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3127 // SIMD-ONLY2-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
3128 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
3129 // SIMD-ONLY2-NEXT:    store i32 [[TMP0]], ptr [[R]], align 4
3130 // SIMD-ONLY2-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
3131 // SIMD-ONLY2-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @a2)
3132 // SIMD-ONLY2-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b1)
3133 // SIMD-ONLY2-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b2)
3134 // SIMD-ONLY2-NEXT:    call void @_ZN2SC3fooEv(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
3135 // SIMD-ONLY2-NEXT:    call void @_ZN2SD3fooEv(ptr noundef nonnull align 4 dereferenceable(128) @d1)
3136 // SIMD-ONLY2-NEXT:    call void @_ZN2SE3fooEv(ptr noundef nonnull align 4 dereferenceable(256) @e1)
3137 // SIMD-ONLY2-NEXT:    call void @_ZN2STILi100EE3fooEv(ptr noundef nonnull align 4 dereferenceable(912) @t1)
3138 // SIMD-ONLY2-NEXT:    call void @_ZN2STILi1000EE3fooEv(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
3139 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3140 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3141 // SIMD-ONLY2:       for.cond:
3142 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[I]], align 4
3143 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP1]], 10
3144 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3145 // SIMD-ONLY2:       for.body:
3146 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[R]], align 4
3147 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP2]], 1
3148 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[R]], align 4
3149 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3150 // SIMD-ONLY2:       for.inc:
3151 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[I]], align 4
3152 // SIMD-ONLY2-NEXT:    [[INC1:%.*]] = add nsw i32 [[TMP3]], 1
3153 // SIMD-ONLY2-NEXT:    store i32 [[INC1]], ptr [[I]], align 4
3154 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP2:![0-9]+]]
3155 // SIMD-ONLY2:       for.end:
3156 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[R]], align 4
3157 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
3158 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
3159 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP4]], [[TMP6]]
3160 // SIMD-ONLY2-NEXT:    ret i32 [[ADD]]
3161 //
3162 //
3163 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SA3fooEv
3164 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR3]] comdat {
3165 // SIMD-ONLY2-NEXT:  entry:
3166 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3167 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3168 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3169 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3170 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3171 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3172 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3173 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
3174 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
3175 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3176 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3177 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
3178 // SIMD-ONLY2-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
3179 // SIMD-ONLY2-NEXT:    ret void
3180 //
3181 //
3182 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SB3fooEv
3183 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) #[[ATTR3]] comdat {
3184 // SIMD-ONLY2-NEXT:  entry:
3185 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3186 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3187 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3188 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3189 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3190 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3191 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3192 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3193 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3194 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3195 // SIMD-ONLY2:       for.cond:
3196 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3197 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3198 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3199 // SIMD-ONLY2:       for.body:
3200 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3201 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 4
3202 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3203 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3204 // SIMD-ONLY2:       for.inc:
3205 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3206 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3207 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3208 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP4:![0-9]+]]
3209 // SIMD-ONLY2:       for.end:
3210 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3211 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3212 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3213 // SIMD-ONLY2-NEXT:    ret void
3214 //
3215 //
3216 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SC3fooEv
3217 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) #[[ATTR3]] comdat {
3218 // SIMD-ONLY2-NEXT:  entry:
3219 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3220 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3221 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3222 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3223 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3224 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3225 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3226 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
3227 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 7
3228 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3229 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3230 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
3231 // SIMD-ONLY2-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
3232 // SIMD-ONLY2-NEXT:    ret void
3233 //
3234 //
3235 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SD3fooEv
3236 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) #[[ATTR3]] comdat {
3237 // SIMD-ONLY2-NEXT:  entry:
3238 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3239 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3240 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3241 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3242 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3243 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3244 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3245 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
3246 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 10
3247 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3248 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3249 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
3250 // SIMD-ONLY2-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
3251 // SIMD-ONLY2-NEXT:    ret void
3252 //
3253 //
3254 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SE3fooEv
3255 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) #[[ATTR3]] comdat {
3256 // SIMD-ONLY2-NEXT:  entry:
3257 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3258 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3259 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3260 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3261 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3262 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3263 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3264 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3265 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3266 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3267 // SIMD-ONLY2:       for.cond:
3268 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3269 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3270 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3271 // SIMD-ONLY2:       for.body:
3272 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3273 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 13
3274 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3275 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3276 // SIMD-ONLY2:       for.inc:
3277 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3278 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3279 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3280 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP5:![0-9]+]]
3281 // SIMD-ONLY2:       for.end:
3282 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3283 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3284 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3285 // SIMD-ONLY2-NEXT:    ret void
3286 //
3287 //
3288 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2STILi100EE3fooEv
3289 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) #[[ATTR3]] comdat {
3290 // SIMD-ONLY2-NEXT:  entry:
3291 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3292 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3293 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3294 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3295 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3296 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3297 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3298 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3299 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3300 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3301 // SIMD-ONLY2:       for.cond:
3302 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3303 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3304 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3305 // SIMD-ONLY2:       for.body:
3306 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3307 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 116
3308 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3309 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3310 // SIMD-ONLY2:       for.inc:
3311 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3312 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3313 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3314 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP6:![0-9]+]]
3315 // SIMD-ONLY2:       for.end:
3316 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3317 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3318 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3319 // SIMD-ONLY2-NEXT:    ret void
3320 //
3321 //
3322 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2STILi1000EE3fooEv
3323 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) #[[ATTR3]] comdat {
3324 // SIMD-ONLY2-NEXT:  entry:
3325 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3326 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3327 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3328 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3329 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3330 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3331 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3332 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3333 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3334 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3335 // SIMD-ONLY2:       for.cond:
3336 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3337 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3338 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3339 // SIMD-ONLY2:       for.body:
3340 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3341 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 1016
3342 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3343 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3344 // SIMD-ONLY2:       for.inc:
3345 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3346 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3347 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3348 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP7:![0-9]+]]
3349 // SIMD-ONLY2:       for.end:
3350 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3351 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3352 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3353 // SIMD-ONLY2-NEXT:    ret void
3354 //
3355 //
3356 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SAC2Ev
3357 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3358 // SIMD-ONLY2-NEXT:  entry:
3359 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3360 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3361 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3362 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3363 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3364 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3365 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3366 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
3367 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 2
3368 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3369 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3370 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
3371 // SIMD-ONLY2-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
3372 // SIMD-ONLY2-NEXT:    ret void
3373 //
3374 //
3375 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SAD2Ev
3376 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3377 // SIMD-ONLY2-NEXT:  entry:
3378 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3379 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3380 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3381 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3382 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3383 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3384 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3385 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
3386 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 3
3387 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3388 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3389 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
3390 // SIMD-ONLY2-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
3391 // SIMD-ONLY2-NEXT:    ret void
3392 //
3393 //
3394 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SBC2Ev
3395 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3396 // SIMD-ONLY2-NEXT:  entry:
3397 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3398 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3399 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3400 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3401 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3402 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3403 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3404 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
3405 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 5
3406 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3407 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3408 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
3409 // SIMD-ONLY2-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
3410 // SIMD-ONLY2-NEXT:    ret void
3411 //
3412 //
3413 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SBD2Ev
3414 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3415 // SIMD-ONLY2-NEXT:  entry:
3416 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3417 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3418 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3419 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3420 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3421 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3422 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3423 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
3424 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 6
3425 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3426 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3427 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
3428 // SIMD-ONLY2-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
3429 // SIMD-ONLY2-NEXT:    ret void
3430 //
3431 //
3432 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SCC2Ev
3433 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3434 // SIMD-ONLY2-NEXT:  entry:
3435 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3436 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3437 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3438 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3439 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3440 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3441 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3442 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3443 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3444 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3445 // SIMD-ONLY2:       for.cond:
3446 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3447 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3448 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3449 // SIMD-ONLY2:       for.body:
3450 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3451 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 8
3452 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3453 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3454 // SIMD-ONLY2:       for.inc:
3455 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3456 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3457 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3458 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP8:![0-9]+]]
3459 // SIMD-ONLY2:       for.end:
3460 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3461 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3462 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3463 // SIMD-ONLY2-NEXT:    ret void
3464 //
3465 //
3466 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SCD2Ev
3467 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3468 // SIMD-ONLY2-NEXT:  entry:
3469 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3470 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3471 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3472 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3473 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3474 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3475 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3476 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
3477 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 9
3478 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3479 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3480 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
3481 // SIMD-ONLY2-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
3482 // SIMD-ONLY2-NEXT:    ret void
3483 //
3484 //
3485 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SDC2Ev
3486 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3487 // SIMD-ONLY2-NEXT:  entry:
3488 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3489 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3490 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3491 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3492 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3493 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3494 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3495 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
3496 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 11
3497 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3498 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3499 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
3500 // SIMD-ONLY2-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
3501 // SIMD-ONLY2-NEXT:    ret void
3502 //
3503 //
3504 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SDD2Ev
3505 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3506 // SIMD-ONLY2-NEXT:  entry:
3507 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3508 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3509 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3510 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3511 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3512 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3513 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3514 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3515 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3516 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3517 // SIMD-ONLY2:       for.cond:
3518 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3519 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3520 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3521 // SIMD-ONLY2:       for.body:
3522 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3523 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 12
3524 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3525 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3526 // SIMD-ONLY2:       for.inc:
3527 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3528 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3529 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3530 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
3531 // SIMD-ONLY2:       for.end:
3532 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3533 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3534 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3535 // SIMD-ONLY2-NEXT:    ret void
3536 //
3537 //
3538 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SEC2Ev
3539 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3540 // SIMD-ONLY2-NEXT:  entry:
3541 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3542 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3543 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3544 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3545 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3546 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3547 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3548 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3549 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3550 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3551 // SIMD-ONLY2:       for.cond:
3552 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3553 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3554 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3555 // SIMD-ONLY2:       for.body:
3556 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3557 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 14
3558 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3559 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3560 // SIMD-ONLY2:       for.inc:
3561 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3562 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3563 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3564 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
3565 // SIMD-ONLY2:       for.end:
3566 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3567 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3568 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3569 // SIMD-ONLY2-NEXT:    ret void
3570 //
3571 //
3572 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2SED2Ev
3573 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3574 // SIMD-ONLY2-NEXT:  entry:
3575 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3576 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3577 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3578 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3579 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3580 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3581 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3582 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3583 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3584 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3585 // SIMD-ONLY2:       for.cond:
3586 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3587 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3588 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3589 // SIMD-ONLY2:       for.body:
3590 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3591 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 15
3592 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3593 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3594 // SIMD-ONLY2:       for.inc:
3595 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3596 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3597 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3598 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3599 // SIMD-ONLY2:       for.end:
3600 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3601 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3602 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3603 // SIMD-ONLY2-NEXT:    ret void
3604 //
3605 //
3606 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2STILi100EEC2Ev
3607 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3608 // SIMD-ONLY2-NEXT:  entry:
3609 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3610 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3611 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3612 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3613 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3614 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3615 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3616 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3617 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3618 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3619 // SIMD-ONLY2:       for.cond:
3620 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3621 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3622 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3623 // SIMD-ONLY2:       for.body:
3624 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3625 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 117
3626 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3627 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3628 // SIMD-ONLY2:       for.inc:
3629 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3630 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3631 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3632 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
3633 // SIMD-ONLY2:       for.end:
3634 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3635 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3636 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3637 // SIMD-ONLY2-NEXT:    ret void
3638 //
3639 //
3640 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2STILi100EED2Ev
3641 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3642 // SIMD-ONLY2-NEXT:  entry:
3643 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3644 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3645 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3646 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3647 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3648 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3649 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3650 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3651 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3652 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3653 // SIMD-ONLY2:       for.cond:
3654 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3655 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3656 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3657 // SIMD-ONLY2:       for.body:
3658 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3659 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 118
3660 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3661 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3662 // SIMD-ONLY2:       for.inc:
3663 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3664 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3665 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3666 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
3667 // SIMD-ONLY2:       for.end:
3668 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3669 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3670 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3671 // SIMD-ONLY2-NEXT:    ret void
3672 //
3673 //
3674 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC2Ev
3675 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3676 // SIMD-ONLY2-NEXT:  entry:
3677 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3678 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3679 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3680 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3681 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3682 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3683 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3684 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3685 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3686 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3687 // SIMD-ONLY2:       for.cond:
3688 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3689 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3690 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3691 // SIMD-ONLY2:       for.body:
3692 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3693 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 1017
3694 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3695 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3696 // SIMD-ONLY2:       for.inc:
3697 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3698 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3699 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3700 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3701 // SIMD-ONLY2:       for.end:
3702 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3703 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3704 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3705 // SIMD-ONLY2-NEXT:    ret void
3706 //
3707 //
3708 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_ZN2STILi1000EED2Ev
3709 // SIMD-ONLY2-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
3710 // SIMD-ONLY2-NEXT:  entry:
3711 // SIMD-ONLY2-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3712 // SIMD-ONLY2-NEXT:    [[A:%.*]] = alloca i32, align 4
3713 // SIMD-ONLY2-NEXT:    [[I:%.*]] = alloca i32, align 4
3714 // SIMD-ONLY2-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3715 // SIMD-ONLY2-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3716 // SIMD-ONLY2-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
3717 // SIMD-ONLY2-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
3718 // SIMD-ONLY2-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
3719 // SIMD-ONLY2-NEXT:    store i32 0, ptr [[I]], align 4
3720 // SIMD-ONLY2-NEXT:    br label [[FOR_COND:%.*]]
3721 // SIMD-ONLY2:       for.cond:
3722 // SIMD-ONLY2-NEXT:    [[TMP2:%.*]] = load i32, ptr [[I]], align 4
3723 // SIMD-ONLY2-NEXT:    [[CMP:%.*]] = icmp slt i32 [[TMP2]], 10
3724 // SIMD-ONLY2-NEXT:    br i1 [[CMP]], label [[FOR_BODY:%.*]], label [[FOR_END:%.*]]
3725 // SIMD-ONLY2:       for.body:
3726 // SIMD-ONLY2-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
3727 // SIMD-ONLY2-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], 1018
3728 // SIMD-ONLY2-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
3729 // SIMD-ONLY2-NEXT:    br label [[FOR_INC:%.*]]
3730 // SIMD-ONLY2:       for.inc:
3731 // SIMD-ONLY2-NEXT:    [[TMP4:%.*]] = load i32, ptr [[I]], align 4
3732 // SIMD-ONLY2-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP4]], 1
3733 // SIMD-ONLY2-NEXT:    store i32 [[INC]], ptr [[I]], align 4
3734 // SIMD-ONLY2-NEXT:    br label [[FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
3735 // SIMD-ONLY2:       for.end:
3736 // SIMD-ONLY2-NEXT:    [[TMP5:%.*]] = load i32, ptr [[A]], align 4
3737 // SIMD-ONLY2-NEXT:    [[TMP6:%.*]] = load ptr, ptr @R, align 8
3738 // SIMD-ONLY2-NEXT:    store i32 [[TMP5]], ptr [[TMP6]], align 4
3739 // SIMD-ONLY2-NEXT:    ret void
3740 //
3741 //
3742 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
3743 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
3744 // SIMD-ONLY2-NEXT:  entry:
3745 // SIMD-ONLY2-NEXT:    call void @__cxx_global_var_init()
3746 // SIMD-ONLY2-NEXT:    call void @__cxx_global_var_init.2()
3747 // SIMD-ONLY2-NEXT:    ret void
3748 //
3749 //
3750 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
3751 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
3752 // SIMD-ONLY2-NEXT:  entry:
3753 // SIMD-ONLY2-NEXT:    call void @__cxx_global_var_init.3()
3754 // SIMD-ONLY2-NEXT:    ret void
3755 //
3756 //
3757 // SIMD-ONLY2-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
3758 // SIMD-ONLY2-SAME: () #[[ATTR0]] {
3759 // SIMD-ONLY2-NEXT:  entry:
3760 // SIMD-ONLY2-NEXT:    call void @__cxx_global_var_init.1()
3761 // SIMD-ONLY2-NEXT:    call void @__cxx_global_var_init.4()
3762 // SIMD-ONLY2-NEXT:    call void @__cxx_global_var_init.5()
3763 // SIMD-ONLY2-NEXT:    call void @__cxx_global_var_init.6()
3764 // SIMD-ONLY2-NEXT:    call void @__cxx_global_var_init.7()
3765 // SIMD-ONLY2-NEXT:    call void @__cxx_global_var_init.8()
3766 // SIMD-ONLY2-NEXT:    ret void
3767 //
3768 //
3769 // OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init
3770 // OMP-DEFAULT-SAME: () #[[ATTR0:[0-9]+]] {
3771 // OMP-DEFAULT-NEXT:  entry:
3772 // OMP-DEFAULT-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
3773 // OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
3774 // OMP-DEFAULT-NEXT:    ret void
3775 //
3776 //
3777 //
3778 //
3779 //
3780 //
3781 // OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
3782 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3783 // OMP-DEFAULT-NEXT:  entry:
3784 // OMP-DEFAULT-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
3785 // OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
3786 // OMP-DEFAULT-NEXT:    ret void
3787 //
3788 //
3789 // OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
3790 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3791 // OMP-DEFAULT-NEXT:  entry:
3792 // OMP-DEFAULT-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
3793 // OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
3794 // OMP-DEFAULT-NEXT:    ret void
3795 //
3796 //
3797 //
3798 //
3799 //
3800 //
3801 // OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
3802 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3803 // OMP-DEFAULT-NEXT:  entry:
3804 // OMP-DEFAULT-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
3805 // OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
3806 // OMP-DEFAULT-NEXT:    ret void
3807 //
3808 //
3809 // OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
3810 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3811 // OMP-DEFAULT-NEXT:  entry:
3812 // OMP-DEFAULT-NEXT:    call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
3813 // OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
3814 // OMP-DEFAULT-NEXT:    ret void
3815 //
3816 //
3817 //
3818 //
3819 //
3820 //
3821 //
3822 //
3823 // OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
3824 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3825 // OMP-DEFAULT-NEXT:  entry:
3826 // OMP-DEFAULT-NEXT:    call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
3827 // OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
3828 // OMP-DEFAULT-NEXT:    ret void
3829 //
3830 //
3831 //
3832 //
3833 //
3834 //
3835 //
3836 //
3837 // OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
3838 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3839 // OMP-DEFAULT-NEXT:  entry:
3840 // OMP-DEFAULT-NEXT:    call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
3841 // OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
3842 // OMP-DEFAULT-NEXT:    ret void
3843 //
3844 //
3845 //
3846 //
3847 //
3848 //
3849 //
3850 //
3851 //
3852 //
3853 // OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.13
3854 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3855 // OMP-DEFAULT-NEXT:  entry:
3856 // OMP-DEFAULT-NEXT:    call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
3857 // OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
3858 // OMP-DEFAULT-NEXT:    ret void
3859 //
3860 //
3861 //
3862 //
3863 //
3864 //
3865 //
3866 //
3867 //
3868 //
3869 // OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.18
3870 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3871 // OMP-DEFAULT-NEXT:  entry:
3872 // OMP-DEFAULT-NEXT:    call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
3873 // OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
3874 // OMP-DEFAULT-NEXT:    ret void
3875 //
3876 //
3877 //
3878 //
3879 //
3880 //
3881 //
3882 //
3883 //
3884 //
3885 //
3886 //
3887 //
3888 //
3889 //
3890 //
3891 //
3892 //
3893 //
3894 //
3895 //
3896 //
3897 //
3898 //
3899 //
3900 //
3901 //
3902 //
3903 // OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
3904 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3905 // OMP-DEFAULT-NEXT:  entry:
3906 // OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init()
3907 // OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.2()
3908 // OMP-DEFAULT-NEXT:    ret void
3909 //
3910 //
3911 // OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
3912 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3913 // OMP-DEFAULT-NEXT:  entry:
3914 // OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.3()
3915 // OMP-DEFAULT-NEXT:    ret void
3916 //
3917 //
3918 // OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
3919 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3920 // OMP-DEFAULT-NEXT:  entry:
3921 // OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.1()
3922 // OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.4()
3923 // OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.5()
3924 // OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.8()
3925 // OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.13()
3926 // OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.18()
3927 // OMP-DEFAULT-NEXT:    ret void
3928 //
3929 //
3930 // OMP-DEFAULT-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3931 // OMP-DEFAULT-SAME: () #[[ATTR0]] {
3932 // OMP-DEFAULT-NEXT:  entry:
3933 // OMP-DEFAULT-NEXT:    call void @__tgt_register_requires(i64 1)
3934 // OMP-DEFAULT-NEXT:    ret void
3935 //
3936 //
3937 //
3938 //
3939 //
3940 //
3941 //
3942 //
3943 //
3944 //
3945 //
3946 //
3947 //
3948 //
3949 //
3950 //
3951 //
3952 //
3953 //
3954 //
3955 //
3956 //
3957 //
3958 //
3959 //
3960 //
3961 //
3962 //
3963 //
3964 //
3965 //
3966 //
3967 //
3968 //
3969 //
3970 //
3971 //
3972 //
3973 //
3974 //
3975 //
3976 //
3977 //
3978 //
3979 //
3980 //
3981 //
3982 //
3983 //
3984 //
3985 //
3986 //
3987 //
3988 //
3989 //
3990 //
3991 //
3992 //
3993 //
3994 //
3995 //
3996 //
3997 //
3998 //
3999 // OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init
4000 // OMP-DEfAULT-SAME: () #[[ATTR0:[0-9]+]] {
4001 // OMP-DEfAULT-NEXT:  entry:
4002 // OMP-DEfAULT-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
4003 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
4004 // OMP-DEfAULT-NEXT:    ret void
4005 //
4006 //
4007 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAC1Ev
4008 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
4009 // OMP-DEfAULT-NEXT:  entry:
4010 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4011 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4012 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4013 // OMP-DEfAULT-NEXT:    call void @_ZN2SAC2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]])
4014 // OMP-DEfAULT-NEXT:    ret void
4015 //
4016 //
4017 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAD1Ev
4018 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4019 // OMP-DEfAULT-NEXT:  entry:
4020 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4021 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4022 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4023 // OMP-DEfAULT-NEXT:    call void @_ZN2SAD2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]]) #[[ATTR2]]
4024 // OMP-DEfAULT-NEXT:    ret void
4025 //
4026 //
4027 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAC2Ev
4028 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4029 // OMP-DEfAULT-NEXT:  entry:
4030 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4031 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4032 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4033 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4034 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4035 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4036 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4037 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4038 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 2
4039 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
4040 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
4041 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
4042 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4043 // OMP-DEfAULT-NEXT:    ret void
4044 //
4045 //
4046 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SAD2Ev
4047 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4048 // OMP-DEfAULT-NEXT:  entry:
4049 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4050 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4051 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4052 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4053 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4054 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4055 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4056 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4057 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 3
4058 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
4059 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
4060 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
4061 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4062 // OMP-DEfAULT-NEXT:    ret void
4063 //
4064 //
4065 // OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
4066 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
4067 // OMP-DEfAULT-NEXT:  entry:
4068 // OMP-DEfAULT-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
4069 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
4070 // OMP-DEfAULT-NEXT:    ret void
4071 //
4072 //
4073 // OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
4074 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
4075 // OMP-DEfAULT-NEXT:  entry:
4076 // OMP-DEfAULT-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
4077 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
4078 // OMP-DEfAULT-NEXT:    ret void
4079 //
4080 //
4081 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBC1Ev
4082 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4083 // OMP-DEfAULT-NEXT:  entry:
4084 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4085 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4086 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4087 // OMP-DEfAULT-NEXT:    call void @_ZN2SBC2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]])
4088 // OMP-DEfAULT-NEXT:    ret void
4089 //
4090 //
4091 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBD1Ev
4092 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4093 // OMP-DEfAULT-NEXT:  entry:
4094 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4095 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4096 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4097 // OMP-DEfAULT-NEXT:    call void @_ZN2SBD2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]]) #[[ATTR2]]
4098 // OMP-DEfAULT-NEXT:    ret void
4099 //
4100 //
4101 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBC2Ev
4102 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4103 // OMP-DEfAULT-NEXT:  entry:
4104 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4105 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4106 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4107 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4108 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4109 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4110 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4111 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4112 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 5
4113 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
4114 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
4115 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
4116 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4117 // OMP-DEfAULT-NEXT:    ret void
4118 //
4119 //
4120 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SBD2Ev
4121 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4122 // OMP-DEfAULT-NEXT:  entry:
4123 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4124 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4125 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4126 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4127 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4128 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4129 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4130 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4131 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 6
4132 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
4133 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
4134 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
4135 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4136 // OMP-DEfAULT-NEXT:    ret void
4137 //
4138 //
4139 // OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
4140 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
4141 // OMP-DEfAULT-NEXT:  entry:
4142 // OMP-DEfAULT-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
4143 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
4144 // OMP-DEfAULT-NEXT:    ret void
4145 //
4146 //
4147 // OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
4148 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
4149 // OMP-DEfAULT-NEXT:  entry:
4150 // OMP-DEfAULT-NEXT:    call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
4151 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
4152 // OMP-DEfAULT-NEXT:    ret void
4153 //
4154 //
4155 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCC1Ev
4156 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4157 // OMP-DEfAULT-NEXT:  entry:
4158 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4159 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4160 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4161 // OMP-DEfAULT-NEXT:    call void @_ZN2SCC2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]])
4162 // OMP-DEfAULT-NEXT:    ret void
4163 //
4164 //
4165 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCD1Ev
4166 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4167 // OMP-DEfAULT-NEXT:  entry:
4168 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4169 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4170 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4171 // OMP-DEfAULT-NEXT:    call void @_ZN2SCD2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]]) #[[ATTR2]]
4172 // OMP-DEfAULT-NEXT:    ret void
4173 //
4174 //
4175 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCC2Ev
4176 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4177 // OMP-DEfAULT-NEXT:  entry:
4178 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4179 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4180 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4181 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
4182 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
4183 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
4184 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4185 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4186 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4187 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4188 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4189 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4190 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4191 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
4192 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
4193 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4194 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4195 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4196 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
4197 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4198 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
4199 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4200 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4201 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4202 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
4203 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4204 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
4205 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4206 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
4207 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4208 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
4209 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4210 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes, ptr [[TMP13]], align 4
4211 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4212 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes, ptr [[TMP14]], align 4
4213 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4214 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
4215 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4216 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
4217 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4218 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
4219 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4220 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
4221 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4222 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
4223 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4224 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
4225 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4226 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
4227 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.region_id, ptr [[KERNEL_ARGS]])
4228 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
4229 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4230 // OMP-DEfAULT:       omp_offload.failed:
4231 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148(i32 [[TMP3]]) #[[ATTR2]]
4232 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4233 // OMP-DEfAULT:       omp_offload.cont:
4234 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
4235 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
4236 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
4237 // OMP-DEfAULT-NEXT:    ret void
4238 //
4239 //
4240 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148
4241 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3:[0-9]+]] {
4242 // OMP-DEfAULT-NEXT:  entry:
4243 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4244 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4245 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
4246 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
4247 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
4248 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
4249 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined, i32 [[TMP1]])
4250 // OMP-DEfAULT-NEXT:    ret void
4251 //
4252 //
4253 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined
4254 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
4255 // OMP-DEfAULT-NEXT:  entry:
4256 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4257 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4258 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4259 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4260 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4261 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4262 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4263 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4264 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4265 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
4266 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4267 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4268 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
4269 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4270 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
4271 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4272 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4273 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4274 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4275 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4276 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4277 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4278 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4279 // OMP-DEfAULT:       cond.true:
4280 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
4281 // OMP-DEfAULT:       cond.false:
4282 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4283 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
4284 // OMP-DEfAULT:       cond.end:
4285 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4286 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4287 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4288 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4289 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4290 // OMP-DEfAULT:       omp.inner.for.cond:
4291 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4292 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4293 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4294 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4295 // OMP-DEfAULT:       omp.inner.for.body:
4296 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4297 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4298 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4299 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
4300 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
4301 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 8
4302 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
4303 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4304 // OMP-DEfAULT:       omp.body.continue:
4305 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4306 // OMP-DEfAULT:       omp.inner.for.inc:
4307 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4308 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
4309 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4310 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
4311 // OMP-DEfAULT:       omp.inner.for.end:
4312 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4313 // OMP-DEfAULT:       omp.loop.exit:
4314 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4315 // OMP-DEfAULT-NEXT:    ret void
4316 //
4317 //
4318 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SCD2Ev
4319 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4320 // OMP-DEfAULT-NEXT:  entry:
4321 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4322 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4323 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4324 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4325 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4326 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4327 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4328 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4329 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 9
4330 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
4331 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
4332 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
4333 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4334 // OMP-DEfAULT-NEXT:    ret void
4335 //
4336 //
4337 // OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
4338 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
4339 // OMP-DEfAULT-NEXT:  entry:
4340 // OMP-DEfAULT-NEXT:    call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
4341 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
4342 // OMP-DEfAULT-NEXT:    ret void
4343 //
4344 //
4345 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDC1Ev
4346 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4347 // OMP-DEfAULT-NEXT:  entry:
4348 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4349 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4350 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4351 // OMP-DEfAULT-NEXT:    call void @_ZN2SDC2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]])
4352 // OMP-DEfAULT-NEXT:    ret void
4353 //
4354 //
4355 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDD1Ev
4356 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4357 // OMP-DEfAULT-NEXT:  entry:
4358 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4359 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4360 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4361 // OMP-DEfAULT-NEXT:    call void @_ZN2SDD2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]]) #[[ATTR2]]
4362 // OMP-DEfAULT-NEXT:    ret void
4363 //
4364 //
4365 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDC2Ev
4366 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4367 // OMP-DEfAULT-NEXT:  entry:
4368 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4369 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4370 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4371 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4372 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4373 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4374 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4375 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4376 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 11
4377 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
4378 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
4379 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
4380 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4381 // OMP-DEfAULT-NEXT:    ret void
4382 //
4383 //
4384 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SDD2Ev
4385 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4386 // OMP-DEfAULT-NEXT:  entry:
4387 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4388 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4389 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4390 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
4391 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
4392 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
4393 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4394 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4395 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4396 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4397 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4398 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4399 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4400 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
4401 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
4402 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4403 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4404 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4405 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
4406 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4407 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
4408 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4409 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4410 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4411 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
4412 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4413 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
4414 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4415 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
4416 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4417 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
4418 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4419 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.6, ptr [[TMP13]], align 4
4420 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4421 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.7, ptr [[TMP14]], align 4
4422 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4423 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
4424 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4425 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
4426 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4427 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
4428 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4429 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
4430 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4431 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
4432 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4433 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
4434 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4435 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
4436 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.region_id, ptr [[KERNEL_ARGS]])
4437 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
4438 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4439 // OMP-DEfAULT:       omp_offload.failed:
4440 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174(i32 [[TMP3]]) #[[ATTR2]]
4441 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4442 // OMP-DEfAULT:       omp_offload.cont:
4443 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
4444 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
4445 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
4446 // OMP-DEfAULT-NEXT:    ret void
4447 //
4448 //
4449 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174
4450 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
4451 // OMP-DEfAULT-NEXT:  entry:
4452 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4453 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4454 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
4455 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
4456 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
4457 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
4458 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined, i32 [[TMP1]])
4459 // OMP-DEfAULT-NEXT:    ret void
4460 //
4461 //
4462 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined
4463 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
4464 // OMP-DEfAULT-NEXT:  entry:
4465 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4466 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4467 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4468 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4469 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4470 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4471 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4472 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4473 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4474 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
4475 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4476 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4477 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
4478 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4479 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
4480 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4481 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4482 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4483 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4484 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4485 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4486 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4487 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4488 // OMP-DEfAULT:       cond.true:
4489 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
4490 // OMP-DEfAULT:       cond.false:
4491 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4492 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
4493 // OMP-DEfAULT:       cond.end:
4494 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4495 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4496 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4497 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4498 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4499 // OMP-DEfAULT:       omp.inner.for.cond:
4500 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4501 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4502 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4503 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4504 // OMP-DEfAULT:       omp.inner.for.body:
4505 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4506 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4507 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4508 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
4509 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
4510 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 12
4511 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
4512 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4513 // OMP-DEfAULT:       omp.body.continue:
4514 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4515 // OMP-DEfAULT:       omp.inner.for.inc:
4516 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4517 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
4518 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4519 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
4520 // OMP-DEfAULT:       omp.inner.for.end:
4521 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4522 // OMP-DEfAULT:       omp.loop.exit:
4523 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4524 // OMP-DEfAULT-NEXT:    ret void
4525 //
4526 //
4527 // OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
4528 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
4529 // OMP-DEfAULT-NEXT:  entry:
4530 // OMP-DEfAULT-NEXT:    call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
4531 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
4532 // OMP-DEfAULT-NEXT:    ret void
4533 //
4534 //
4535 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SEC1Ev
4536 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4537 // OMP-DEfAULT-NEXT:  entry:
4538 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4539 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4540 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4541 // OMP-DEfAULT-NEXT:    call void @_ZN2SEC2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]])
4542 // OMP-DEfAULT-NEXT:    ret void
4543 //
4544 //
4545 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SED1Ev
4546 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4547 // OMP-DEfAULT-NEXT:  entry:
4548 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4549 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4550 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4551 // OMP-DEfAULT-NEXT:    call void @_ZN2SED2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]]) #[[ATTR2]]
4552 // OMP-DEfAULT-NEXT:    ret void
4553 //
4554 //
4555 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SEC2Ev
4556 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4557 // OMP-DEfAULT-NEXT:  entry:
4558 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4559 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4560 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4561 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
4562 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
4563 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
4564 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4565 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4566 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4567 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4568 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4569 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4570 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4571 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
4572 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
4573 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4574 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4575 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4576 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
4577 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4578 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
4579 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4580 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4581 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4582 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
4583 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4584 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
4585 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4586 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
4587 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4588 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
4589 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4590 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP13]], align 4
4591 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4592 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP14]], align 4
4593 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4594 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
4595 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4596 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
4597 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4598 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
4599 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4600 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
4601 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4602 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
4603 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4604 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
4605 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4606 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
4607 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.region_id, ptr [[KERNEL_ARGS]])
4608 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
4609 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4610 // OMP-DEfAULT:       omp_offload.failed:
4611 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192(i32 [[TMP3]]) #[[ATTR2]]
4612 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4613 // OMP-DEfAULT:       omp_offload.cont:
4614 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
4615 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
4616 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
4617 // OMP-DEfAULT-NEXT:    ret void
4618 //
4619 //
4620 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192
4621 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
4622 // OMP-DEfAULT-NEXT:  entry:
4623 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4624 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4625 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
4626 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
4627 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
4628 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
4629 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined, i32 [[TMP1]])
4630 // OMP-DEfAULT-NEXT:    ret void
4631 //
4632 //
4633 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined
4634 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
4635 // OMP-DEfAULT-NEXT:  entry:
4636 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4637 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4638 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4639 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4640 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4641 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4642 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4643 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4644 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4645 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
4646 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4647 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4648 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
4649 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4650 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
4651 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4652 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4653 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4654 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4655 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4656 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4657 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4658 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4659 // OMP-DEfAULT:       cond.true:
4660 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
4661 // OMP-DEfAULT:       cond.false:
4662 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4663 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
4664 // OMP-DEfAULT:       cond.end:
4665 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4666 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4667 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4668 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4669 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4670 // OMP-DEfAULT:       omp.inner.for.cond:
4671 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4672 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4673 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4674 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4675 // OMP-DEfAULT:       omp.inner.for.body:
4676 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4677 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4678 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4679 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
4680 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
4681 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 14
4682 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
4683 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4684 // OMP-DEfAULT:       omp.body.continue:
4685 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4686 // OMP-DEfAULT:       omp.inner.for.inc:
4687 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4688 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
4689 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4690 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
4691 // OMP-DEfAULT:       omp.inner.for.end:
4692 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4693 // OMP-DEfAULT:       omp.loop.exit:
4694 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4695 // OMP-DEfAULT-NEXT:    ret void
4696 //
4697 //
4698 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SED2Ev
4699 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4700 // OMP-DEfAULT-NEXT:  entry:
4701 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4702 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4703 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4704 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
4705 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
4706 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
4707 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4708 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4709 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4710 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4711 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4712 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4713 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4714 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
4715 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
4716 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4717 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4718 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4719 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
4720 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4721 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
4722 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4723 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4724 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4725 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
4726 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4727 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
4728 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4729 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
4730 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4731 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
4732 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4733 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP13]], align 4
4734 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4735 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP14]], align 4
4736 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4737 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
4738 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4739 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
4740 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4741 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
4742 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4743 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
4744 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4745 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
4746 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4747 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
4748 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4749 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
4750 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.region_id, ptr [[KERNEL_ARGS]])
4751 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
4752 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4753 // OMP-DEfAULT:       omp_offload.failed:
4754 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199(i32 [[TMP3]]) #[[ATTR2]]
4755 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4756 // OMP-DEfAULT:       omp_offload.cont:
4757 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
4758 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
4759 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
4760 // OMP-DEfAULT-NEXT:    ret void
4761 //
4762 //
4763 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199
4764 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
4765 // OMP-DEfAULT-NEXT:  entry:
4766 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4767 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4768 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
4769 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
4770 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
4771 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
4772 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined, i32 [[TMP1]])
4773 // OMP-DEfAULT-NEXT:    ret void
4774 //
4775 //
4776 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined
4777 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
4778 // OMP-DEfAULT-NEXT:  entry:
4779 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4780 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4781 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4782 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4783 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4784 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4785 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4786 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4787 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4788 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
4789 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4790 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4791 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
4792 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4793 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
4794 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4795 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4796 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4797 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4798 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4799 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4800 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4801 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4802 // OMP-DEfAULT:       cond.true:
4803 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
4804 // OMP-DEfAULT:       cond.false:
4805 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4806 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
4807 // OMP-DEfAULT:       cond.end:
4808 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4809 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4810 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4811 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4812 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4813 // OMP-DEfAULT:       omp.inner.for.cond:
4814 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4815 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4816 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4817 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4818 // OMP-DEfAULT:       omp.inner.for.body:
4819 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4820 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4821 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4822 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
4823 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
4824 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 15
4825 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
4826 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4827 // OMP-DEfAULT:       omp.body.continue:
4828 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4829 // OMP-DEfAULT:       omp.inner.for.inc:
4830 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4831 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
4832 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
4833 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
4834 // OMP-DEfAULT:       omp.inner.for.end:
4835 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4836 // OMP-DEfAULT:       omp.loop.exit:
4837 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
4838 // OMP-DEfAULT-NEXT:    ret void
4839 //
4840 //
4841 // OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.13
4842 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
4843 // OMP-DEfAULT-NEXT:  entry:
4844 // OMP-DEfAULT-NEXT:    call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
4845 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
4846 // OMP-DEfAULT-NEXT:    ret void
4847 //
4848 //
4849 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC1Ev
4850 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4851 // OMP-DEfAULT-NEXT:  entry:
4852 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4853 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4854 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4855 // OMP-DEfAULT-NEXT:    call void @_ZN2STILi100EEC2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]])
4856 // OMP-DEfAULT-NEXT:    ret void
4857 //
4858 //
4859 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED1Ev
4860 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4861 // OMP-DEfAULT-NEXT:  entry:
4862 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4863 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4864 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4865 // OMP-DEfAULT-NEXT:    call void @_ZN2STILi100EED2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]]) #[[ATTR2]]
4866 // OMP-DEfAULT-NEXT:    ret void
4867 //
4868 //
4869 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC2Ev
4870 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
4871 // OMP-DEfAULT-NEXT:  entry:
4872 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4873 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
4874 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4875 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
4876 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
4877 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
4878 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4879 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4880 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4881 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
4882 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4883 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
4884 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
4885 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
4886 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
4887 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4888 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
4889 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4890 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
4891 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
4892 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
4893 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4894 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4895 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4896 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
4897 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4898 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
4899 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4900 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
4901 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4902 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
4903 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4904 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.14, ptr [[TMP13]], align 4
4905 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4906 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.15, ptr [[TMP14]], align 4
4907 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4908 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
4909 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4910 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
4911 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4912 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
4913 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4914 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
4915 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4916 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
4917 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4918 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
4919 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4920 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
4921 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.region_id, ptr [[KERNEL_ARGS]])
4922 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
4923 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4924 // OMP-DEfAULT:       omp_offload.failed:
4925 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218(i32 [[TMP3]]) #[[ATTR2]]
4926 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4927 // OMP-DEfAULT:       omp_offload.cont:
4928 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
4929 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
4930 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
4931 // OMP-DEfAULT-NEXT:    ret void
4932 //
4933 //
4934 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218
4935 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
4936 // OMP-DEfAULT-NEXT:  entry:
4937 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4938 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
4939 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
4940 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
4941 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
4942 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
4943 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined, i32 [[TMP1]])
4944 // OMP-DEfAULT-NEXT:    ret void
4945 //
4946 //
4947 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined
4948 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
4949 // OMP-DEfAULT-NEXT:  entry:
4950 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4951 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4952 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
4953 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4954 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4955 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4956 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4957 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4958 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4959 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
4960 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4961 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4962 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
4963 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4964 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
4965 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4966 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4967 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4968 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
4969 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4970 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4971 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
4972 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4973 // OMP-DEfAULT:       cond.true:
4974 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
4975 // OMP-DEfAULT:       cond.false:
4976 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4977 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
4978 // OMP-DEfAULT:       cond.end:
4979 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
4980 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4981 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4982 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
4983 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4984 // OMP-DEfAULT:       omp.inner.for.cond:
4985 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4986 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4987 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
4988 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4989 // OMP-DEfAULT:       omp.inner.for.body:
4990 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4991 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
4992 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4993 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
4994 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
4995 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 117
4996 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
4997 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4998 // OMP-DEfAULT:       omp.body.continue:
4999 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5000 // OMP-DEfAULT:       omp.inner.for.inc:
5001 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5002 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
5003 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
5004 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
5005 // OMP-DEfAULT:       omp.inner.for.end:
5006 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5007 // OMP-DEfAULT:       omp.loop.exit:
5008 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5009 // OMP-DEfAULT-NEXT:    ret void
5010 //
5011 //
5012 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED2Ev
5013 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5014 // OMP-DEfAULT-NEXT:  entry:
5015 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5016 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
5017 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5018 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
5019 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
5020 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
5021 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5022 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5023 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5024 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
5025 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5026 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
5027 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
5028 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
5029 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
5030 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5031 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
5032 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5033 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
5034 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5035 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
5036 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5037 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5038 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5039 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
5040 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5041 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
5042 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5043 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
5044 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5045 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
5046 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5047 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.16, ptr [[TMP13]], align 4
5048 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5049 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.17, ptr [[TMP14]], align 4
5050 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5051 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
5052 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5053 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
5054 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5055 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
5056 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5057 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
5058 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5059 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
5060 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5061 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
5062 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5063 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
5064 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.region_id, ptr [[KERNEL_ARGS]])
5065 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
5066 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5067 // OMP-DEfAULT:       omp_offload.failed:
5068 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225(i32 [[TMP3]]) #[[ATTR2]]
5069 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5070 // OMP-DEfAULT:       omp_offload.cont:
5071 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
5072 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
5073 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
5074 // OMP-DEfAULT-NEXT:    ret void
5075 //
5076 //
5077 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225
5078 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
5079 // OMP-DEfAULT-NEXT:  entry:
5080 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5081 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5082 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
5083 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
5084 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
5085 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
5086 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined, i32 [[TMP1]])
5087 // OMP-DEfAULT-NEXT:    ret void
5088 //
5089 //
5090 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined
5091 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
5092 // OMP-DEfAULT-NEXT:  entry:
5093 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
5094 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
5095 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5096 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5097 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5098 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5099 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5100 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5101 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5102 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
5103 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
5104 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
5105 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
5106 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5107 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
5108 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5109 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5110 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
5111 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5112 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5113 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5114 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5115 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5116 // OMP-DEfAULT:       cond.true:
5117 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
5118 // OMP-DEfAULT:       cond.false:
5119 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5120 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
5121 // OMP-DEfAULT:       cond.end:
5122 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5123 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5124 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5125 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5126 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5127 // OMP-DEfAULT:       omp.inner.for.cond:
5128 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5129 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5130 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5131 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5132 // OMP-DEfAULT:       omp.inner.for.body:
5133 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5134 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
5135 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5136 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
5137 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
5138 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 118
5139 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
5140 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5141 // OMP-DEfAULT:       omp.body.continue:
5142 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5143 // OMP-DEfAULT:       omp.inner.for.inc:
5144 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5145 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
5146 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
5147 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
5148 // OMP-DEfAULT:       omp.inner.for.end:
5149 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5150 // OMP-DEfAULT:       omp.loop.exit:
5151 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5152 // OMP-DEfAULT-NEXT:    ret void
5153 //
5154 //
5155 // OMP-DEfAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.18
5156 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
5157 // OMP-DEfAULT-NEXT:  entry:
5158 // OMP-DEfAULT-NEXT:    call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
5159 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
5160 // OMP-DEfAULT-NEXT:    ret void
5161 //
5162 //
5163 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC1Ev
5164 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5165 // OMP-DEfAULT-NEXT:  entry:
5166 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5167 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5168 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5169 // OMP-DEfAULT-NEXT:    call void @_ZN2STILi1000EEC2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]])
5170 // OMP-DEfAULT-NEXT:    ret void
5171 //
5172 //
5173 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED1Ev
5174 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5175 // OMP-DEfAULT-NEXT:  entry:
5176 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5177 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5178 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5179 // OMP-DEfAULT-NEXT:    call void @_ZN2STILi1000EED2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]]) #[[ATTR2]]
5180 // OMP-DEfAULT-NEXT:    ret void
5181 //
5182 //
5183 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC2Ev
5184 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5185 // OMP-DEfAULT-NEXT:  entry:
5186 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5187 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
5188 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5189 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
5190 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
5191 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
5192 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5193 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5194 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5195 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
5196 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5197 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
5198 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
5199 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
5200 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
5201 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5202 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
5203 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5204 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
5205 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5206 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
5207 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5208 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5209 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5210 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
5211 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5212 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
5213 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5214 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
5215 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5216 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
5217 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5218 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.19, ptr [[TMP13]], align 4
5219 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5220 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.20, ptr [[TMP14]], align 4
5221 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5222 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
5223 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5224 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
5225 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5226 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
5227 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5228 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
5229 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5230 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
5231 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5232 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
5233 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5234 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
5235 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.region_id, ptr [[KERNEL_ARGS]])
5236 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
5237 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5238 // OMP-DEfAULT:       omp_offload.failed:
5239 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218(i32 [[TMP3]]) #[[ATTR2]]
5240 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5241 // OMP-DEfAULT:       omp_offload.cont:
5242 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
5243 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
5244 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
5245 // OMP-DEfAULT-NEXT:    ret void
5246 //
5247 //
5248 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218
5249 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
5250 // OMP-DEfAULT-NEXT:  entry:
5251 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5252 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5253 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
5254 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
5255 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
5256 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
5257 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined, i32 [[TMP1]])
5258 // OMP-DEfAULT-NEXT:    ret void
5259 //
5260 //
5261 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined
5262 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
5263 // OMP-DEfAULT-NEXT:  entry:
5264 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
5265 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
5266 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5267 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5268 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5269 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5270 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5271 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5272 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5273 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
5274 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
5275 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
5276 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
5277 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5278 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
5279 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5280 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5281 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
5282 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5283 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5284 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5285 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5286 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5287 // OMP-DEfAULT:       cond.true:
5288 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
5289 // OMP-DEfAULT:       cond.false:
5290 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5291 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
5292 // OMP-DEfAULT:       cond.end:
5293 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5294 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5295 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5296 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5297 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5298 // OMP-DEfAULT:       omp.inner.for.cond:
5299 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5300 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5301 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5302 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5303 // OMP-DEfAULT:       omp.inner.for.body:
5304 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5305 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
5306 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5307 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
5308 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
5309 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1017
5310 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
5311 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5312 // OMP-DEfAULT:       omp.body.continue:
5313 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5314 // OMP-DEfAULT:       omp.inner.for.inc:
5315 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5316 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
5317 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
5318 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
5319 // OMP-DEfAULT:       omp.inner.for.end:
5320 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5321 // OMP-DEfAULT:       omp.loop.exit:
5322 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5323 // OMP-DEfAULT-NEXT:    ret void
5324 //
5325 //
5326 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED2Ev
5327 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
5328 // OMP-DEfAULT-NEXT:  entry:
5329 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5330 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
5331 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5332 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
5333 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
5334 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
5335 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5336 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5337 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5338 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
5339 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5340 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
5341 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
5342 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
5343 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
5344 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5345 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
5346 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5347 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
5348 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5349 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
5350 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5351 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5352 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5353 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
5354 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5355 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
5356 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5357 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
5358 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5359 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
5360 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5361 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.21, ptr [[TMP13]], align 4
5362 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5363 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.22, ptr [[TMP14]], align 4
5364 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5365 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
5366 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5367 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
5368 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5369 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
5370 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5371 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
5372 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5373 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
5374 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5375 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
5376 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5377 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
5378 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.region_id, ptr [[KERNEL_ARGS]])
5379 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
5380 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5381 // OMP-DEfAULT:       omp_offload.failed:
5382 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225(i32 [[TMP3]]) #[[ATTR2]]
5383 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5384 // OMP-DEfAULT:       omp_offload.cont:
5385 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
5386 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
5387 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
5388 // OMP-DEfAULT-NEXT:    ret void
5389 //
5390 //
5391 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225
5392 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
5393 // OMP-DEfAULT-NEXT:  entry:
5394 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5395 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5396 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
5397 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
5398 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
5399 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
5400 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined, i32 [[TMP1]])
5401 // OMP-DEfAULT-NEXT:    ret void
5402 //
5403 //
5404 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined
5405 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
5406 // OMP-DEfAULT-NEXT:  entry:
5407 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
5408 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
5409 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5410 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5411 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5412 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5413 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5414 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5415 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5416 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
5417 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
5418 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
5419 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
5420 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5421 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
5422 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5423 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5424 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
5425 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5426 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5427 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5428 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5429 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5430 // OMP-DEfAULT:       cond.true:
5431 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
5432 // OMP-DEfAULT:       cond.false:
5433 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5434 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
5435 // OMP-DEfAULT:       cond.end:
5436 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5437 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5438 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5439 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5440 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5441 // OMP-DEfAULT:       omp.inner.for.cond:
5442 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5443 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5444 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5445 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5446 // OMP-DEfAULT:       omp.inner.for.body:
5447 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5448 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
5449 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5450 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
5451 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
5452 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1018
5453 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
5454 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5455 // OMP-DEfAULT:       omp.body.continue:
5456 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5457 // OMP-DEfAULT:       omp.inner.for.inc:
5458 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5459 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
5460 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
5461 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
5462 // OMP-DEfAULT:       omp.inner.for.end:
5463 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5464 // OMP-DEfAULT:       omp.loop.exit:
5465 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5466 // OMP-DEfAULT-NEXT:    ret void
5467 //
5468 //
5469 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_Z3bari
5470 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR4:[0-9]+]] {
5471 // OMP-DEfAULT-NEXT:  entry:
5472 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5473 // OMP-DEfAULT-NEXT:    [[R:%.*]] = alloca i32, align 4
5474 // OMP-DEfAULT-NEXT:    [[R_CASTED:%.*]] = alloca i32, align 4
5475 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
5476 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
5477 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
5478 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5479 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
5480 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
5481 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[R]], align 4
5482 // OMP-DEfAULT-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
5483 // OMP-DEfAULT-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @a2)
5484 // OMP-DEfAULT-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b1)
5485 // OMP-DEfAULT-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b2)
5486 // OMP-DEfAULT-NEXT:    call void @_ZN2SC3fooEv(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
5487 // OMP-DEfAULT-NEXT:    call void @_ZN2SD3fooEv(ptr noundef nonnull align 4 dereferenceable(128) @d1)
5488 // OMP-DEfAULT-NEXT:    call void @_ZN2SE3fooEv(ptr noundef nonnull align 4 dereferenceable(256) @e1)
5489 // OMP-DEfAULT-NEXT:    call void @_ZN2STILi100EE3fooEv(ptr noundef nonnull align 4 dereferenceable(912) @t1)
5490 // OMP-DEfAULT-NEXT:    call void @_ZN2STILi1000EE3fooEv(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
5491 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[R]], align 4
5492 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[R_CASTED]], align 4
5493 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[R_CASTED]], align 4
5494 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5495 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[TMP3]], align 4
5496 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5497 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[TMP4]], align 4
5498 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5499 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP5]], align 4
5500 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5501 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5502 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5503 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP8]], align 4
5504 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5505 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP9]], align 4
5506 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5507 // OMP-DEfAULT-NEXT:    store ptr [[TMP6]], ptr [[TMP10]], align 4
5508 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5509 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
5510 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5511 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.23, ptr [[TMP12]], align 4
5512 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5513 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.24, ptr [[TMP13]], align 4
5514 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5515 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP14]], align 4
5516 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5517 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
5518 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5519 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP16]], align 8
5520 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5521 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
5522 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5523 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP18]], align 4
5524 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5525 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP19]], align 4
5526 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5527 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP20]], align 4
5528 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.region_id, ptr [[KERNEL_ARGS]])
5529 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = icmp ne i32 [[TMP21]], 0
5530 // OMP-DEfAULT-NEXT:    br i1 [[TMP22]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5531 // OMP-DEfAULT:       omp_offload.failed:
5532 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267(i32 [[TMP2]]) #[[ATTR2]]
5533 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5534 // OMP-DEfAULT:       omp_offload.cont:
5535 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = load i32, ptr [[R]], align 4
5536 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load ptr, ptr @R, align 4
5537 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
5538 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP25]]
5539 // OMP-DEfAULT-NEXT:    ret i32 [[ADD]]
5540 //
5541 //
5542 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SA3fooEv
5543 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 {
5544 // OMP-DEfAULT-NEXT:  entry:
5545 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5546 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
5547 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5548 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5549 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
5550 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5551 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
5552 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
5553 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
5554 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
5555 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
5556 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
5557 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
5558 // OMP-DEfAULT-NEXT:    ret void
5559 //
5560 //
5561 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SB3fooEv
5562 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 {
5563 // OMP-DEfAULT-NEXT:  entry:
5564 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5565 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
5566 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5567 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
5568 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
5569 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
5570 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5571 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5572 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5573 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
5574 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5575 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
5576 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
5577 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
5578 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
5579 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5580 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
5581 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5582 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
5583 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5584 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
5585 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5586 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5587 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5588 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
5589 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5590 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
5591 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5592 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
5593 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5594 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
5595 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5596 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.25, ptr [[TMP13]], align 4
5597 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5598 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.26, ptr [[TMP14]], align 4
5599 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5600 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
5601 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5602 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
5603 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5604 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
5605 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5606 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
5607 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5608 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
5609 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5610 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
5611 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5612 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
5613 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.region_id, ptr [[KERNEL_ARGS]])
5614 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
5615 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5616 // OMP-DEfAULT:       omp_offload.failed:
5617 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122(i32 [[TMP3]]) #[[ATTR2]]
5618 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5619 // OMP-DEfAULT:       omp_offload.cont:
5620 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
5621 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
5622 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
5623 // OMP-DEfAULT-NEXT:    ret void
5624 //
5625 //
5626 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SC3fooEv
5627 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 {
5628 // OMP-DEfAULT-NEXT:  entry:
5629 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5630 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
5631 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5632 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5633 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
5634 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5635 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
5636 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
5637 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 7
5638 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
5639 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
5640 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
5641 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
5642 // OMP-DEfAULT-NEXT:    ret void
5643 //
5644 //
5645 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SD3fooEv
5646 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 {
5647 // OMP-DEfAULT-NEXT:  entry:
5648 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5649 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
5650 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5651 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5652 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
5653 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5654 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
5655 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
5656 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 10
5657 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
5658 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
5659 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 4
5660 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
5661 // OMP-DEfAULT-NEXT:    ret void
5662 //
5663 //
5664 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2SE3fooEv
5665 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 {
5666 // OMP-DEfAULT-NEXT:  entry:
5667 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5668 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
5669 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5670 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5671 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5672 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
5673 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5674 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
5675 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
5676 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
5677 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
5678 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185(i32 [[TMP3]]) #[[ATTR2]]
5679 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
5680 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 4
5681 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
5682 // OMP-DEfAULT-NEXT:    ret void
5683 //
5684 //
5685 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EE3fooEv
5686 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 {
5687 // OMP-DEfAULT-NEXT:  entry:
5688 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5689 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
5690 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5691 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
5692 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
5693 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
5694 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5695 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5696 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5697 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
5698 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5699 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
5700 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
5701 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
5702 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
5703 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5704 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
5705 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5706 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
5707 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5708 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
5709 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5710 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5711 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5712 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
5713 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5714 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
5715 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5716 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
5717 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5718 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
5719 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5720 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.27, ptr [[TMP13]], align 4
5721 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5722 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.28, ptr [[TMP14]], align 4
5723 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5724 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
5725 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5726 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
5727 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5728 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
5729 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5730 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
5731 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5732 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
5733 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5734 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
5735 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5736 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
5737 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.region_id, ptr [[KERNEL_ARGS]])
5738 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
5739 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5740 // OMP-DEfAULT:       omp_offload.failed:
5741 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211(i32 [[TMP3]]) #[[ATTR2]]
5742 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5743 // OMP-DEfAULT:       omp_offload.cont:
5744 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
5745 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
5746 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
5747 // OMP-DEfAULT-NEXT:    ret void
5748 //
5749 //
5750 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EE3fooEv
5751 // OMP-DEfAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) #[[ATTR4]] comdat align 2 {
5752 // OMP-DEfAULT-NEXT:  entry:
5753 // OMP-DEfAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
5754 // OMP-DEfAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
5755 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5756 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
5757 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
5758 // OMP-DEfAULT-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
5759 // OMP-DEfAULT-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5760 // OMP-DEfAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
5761 // OMP-DEfAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
5762 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 4
5763 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5764 // OMP-DEfAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
5765 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
5766 // OMP-DEfAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
5767 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A_CASTED]], align 4
5768 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5769 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
5770 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5771 // OMP-DEfAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP5]], align 4
5772 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
5773 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP6]], align 4
5774 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5775 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5776 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5777 // OMP-DEfAULT-NEXT:    store i32 2, ptr [[TMP9]], align 4
5778 // OMP-DEfAULT-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5779 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[TMP10]], align 4
5780 // OMP-DEfAULT-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5781 // OMP-DEfAULT-NEXT:    store ptr [[TMP7]], ptr [[TMP11]], align 4
5782 // OMP-DEfAULT-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5783 // OMP-DEfAULT-NEXT:    store ptr [[TMP8]], ptr [[TMP12]], align 4
5784 // OMP-DEfAULT-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5785 // OMP-DEfAULT-NEXT:    store ptr @.offload_sizes.29, ptr [[TMP13]], align 4
5786 // OMP-DEfAULT-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5787 // OMP-DEfAULT-NEXT:    store ptr @.offload_maptypes.30, ptr [[TMP14]], align 4
5788 // OMP-DEfAULT-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5789 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP15]], align 4
5790 // OMP-DEfAULT-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5791 // OMP-DEfAULT-NEXT:    store ptr null, ptr [[TMP16]], align 4
5792 // OMP-DEfAULT-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5793 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP17]], align 8
5794 // OMP-DEfAULT-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5795 // OMP-DEfAULT-NEXT:    store i64 0, ptr [[TMP18]], align 8
5796 // OMP-DEfAULT-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5797 // OMP-DEfAULT-NEXT:    store [3 x i32] [i32 1, i32 0, i32 0], ptr [[TMP19]], align 4
5798 // OMP-DEfAULT-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5799 // OMP-DEfAULT-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP20]], align 4
5800 // OMP-DEfAULT-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5801 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[TMP21]], align 4
5802 // OMP-DEfAULT-NEXT:    [[TMP22:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 1, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.region_id, ptr [[KERNEL_ARGS]])
5803 // OMP-DEfAULT-NEXT:    [[TMP23:%.*]] = icmp ne i32 [[TMP22]], 0
5804 // OMP-DEfAULT-NEXT:    br i1 [[TMP23]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5805 // OMP-DEfAULT:       omp_offload.failed:
5806 // OMP-DEfAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211(i32 [[TMP3]]) #[[ATTR2]]
5807 // OMP-DEfAULT-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5808 // OMP-DEfAULT:       omp_offload.cont:
5809 // OMP-DEfAULT-NEXT:    [[TMP24:%.*]] = load i32, ptr [[A]], align 4
5810 // OMP-DEfAULT-NEXT:    [[TMP25:%.*]] = load ptr, ptr @R, align 4
5811 // OMP-DEfAULT-NEXT:    store i32 [[TMP24]], ptr [[TMP25]], align 4
5812 // OMP-DEfAULT-NEXT:    ret void
5813 //
5814 //
5815 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267
5816 // OMP-DEfAULT-SAME: (i32 noundef [[R:%.*]]) #[[ATTR3]] {
5817 // OMP-DEfAULT-NEXT:  entry:
5818 // OMP-DEfAULT-NEXT:    [[R_ADDR:%.*]] = alloca i32, align 4
5819 // OMP-DEfAULT-NEXT:    [[R_CASTED:%.*]] = alloca i32, align 4
5820 // OMP-DEfAULT-NEXT:    store i32 [[R]], ptr [[R_ADDR]], align 4
5821 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[R_ADDR]], align 4
5822 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[R_CASTED]], align 4
5823 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[R_CASTED]], align 4
5824 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined, i32 [[TMP1]])
5825 // OMP-DEfAULT-NEXT:    ret void
5826 //
5827 //
5828 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined
5829 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[R:%.*]]) #[[ATTR3]] {
5830 // OMP-DEfAULT-NEXT:  entry:
5831 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
5832 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
5833 // OMP-DEfAULT-NEXT:    [[R_ADDR:%.*]] = alloca i32, align 4
5834 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5835 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5836 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5837 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5838 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5839 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5840 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
5841 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
5842 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
5843 // OMP-DEfAULT-NEXT:    store i32 [[R]], ptr [[R_ADDR]], align 4
5844 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5845 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
5846 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5847 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5848 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
5849 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5850 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5851 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5852 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5853 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5854 // OMP-DEfAULT:       cond.true:
5855 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
5856 // OMP-DEfAULT:       cond.false:
5857 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5858 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
5859 // OMP-DEfAULT:       cond.end:
5860 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5861 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5862 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5863 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5864 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5865 // OMP-DEfAULT:       omp.inner.for.cond:
5866 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5867 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5868 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5869 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5870 // OMP-DEfAULT:       omp.inner.for.body:
5871 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5872 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
5873 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5874 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
5875 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[R_ADDR]], align 4
5876 // OMP-DEfAULT-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP8]], 1
5877 // OMP-DEfAULT-NEXT:    store i32 [[INC]], ptr [[R_ADDR]], align 4
5878 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5879 // OMP-DEfAULT:       omp.body.continue:
5880 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5881 // OMP-DEfAULT:       omp.inner.for.inc:
5882 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5883 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
5884 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
5885 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
5886 // OMP-DEfAULT:       omp.inner.for.end:
5887 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5888 // OMP-DEfAULT:       omp.loop.exit:
5889 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5890 // OMP-DEfAULT-NEXT:    ret void
5891 //
5892 //
5893 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122
5894 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
5895 // OMP-DEfAULT-NEXT:  entry:
5896 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5897 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5898 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
5899 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
5900 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
5901 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
5902 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined, i32 [[TMP1]])
5903 // OMP-DEfAULT-NEXT:    ret void
5904 //
5905 //
5906 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined
5907 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
5908 // OMP-DEfAULT-NEXT:  entry:
5909 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
5910 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
5911 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5912 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5913 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5914 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5915 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5916 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5917 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5918 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
5919 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
5920 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
5921 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
5922 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5923 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
5924 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5925 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5926 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
5927 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
5928 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5929 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5930 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
5931 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5932 // OMP-DEfAULT:       cond.true:
5933 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
5934 // OMP-DEfAULT:       cond.false:
5935 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5936 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
5937 // OMP-DEfAULT:       cond.end:
5938 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
5939 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5940 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5941 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
5942 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5943 // OMP-DEfAULT:       omp.inner.for.cond:
5944 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5945 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5946 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
5947 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5948 // OMP-DEfAULT:       omp.inner.for.body:
5949 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5950 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
5951 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5952 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
5953 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
5954 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 4
5955 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
5956 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5957 // OMP-DEfAULT:       omp.body.continue:
5958 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5959 // OMP-DEfAULT:       omp.inner.for.inc:
5960 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5961 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
5962 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
5963 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
5964 // OMP-DEfAULT:       omp.inner.for.end:
5965 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5966 // OMP-DEfAULT:       omp.loop.exit:
5967 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
5968 // OMP-DEfAULT-NEXT:    ret void
5969 //
5970 //
5971 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185
5972 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
5973 // OMP-DEfAULT-NEXT:  entry:
5974 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5975 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
5976 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
5977 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
5978 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
5979 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
5980 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined, i32 [[TMP1]])
5981 // OMP-DEfAULT-NEXT:    ret void
5982 //
5983 //
5984 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined
5985 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
5986 // OMP-DEfAULT-NEXT:  entry:
5987 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
5988 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
5989 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
5990 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5991 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5992 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5993 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5994 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5995 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5996 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
5997 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
5998 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
5999 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
6000 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6001 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6002 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6003 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6004 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
6005 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6006 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6007 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6008 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6009 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6010 // OMP-DEfAULT:       cond.true:
6011 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
6012 // OMP-DEfAULT:       cond.false:
6013 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6014 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
6015 // OMP-DEfAULT:       cond.end:
6016 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6017 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6018 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6019 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6020 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6021 // OMP-DEfAULT:       omp.inner.for.cond:
6022 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6023 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6024 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6025 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6026 // OMP-DEfAULT:       omp.inner.for.body:
6027 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6028 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
6029 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6030 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6031 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
6032 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 13
6033 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
6034 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6035 // OMP-DEfAULT:       omp.body.continue:
6036 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6037 // OMP-DEfAULT:       omp.inner.for.inc:
6038 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6039 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
6040 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6041 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
6042 // OMP-DEfAULT:       omp.inner.for.end:
6043 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6044 // OMP-DEfAULT:       omp.loop.exit:
6045 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6046 // OMP-DEfAULT-NEXT:    ret void
6047 //
6048 //
6049 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211
6050 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
6051 // OMP-DEfAULT-NEXT:  entry:
6052 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6053 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
6054 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
6055 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
6056 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
6057 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
6058 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined, i32 [[TMP1]])
6059 // OMP-DEfAULT-NEXT:    ret void
6060 //
6061 //
6062 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined
6063 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
6064 // OMP-DEfAULT-NEXT:  entry:
6065 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
6066 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
6067 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6068 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6069 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6070 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6071 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6072 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6073 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6074 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
6075 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
6076 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
6077 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
6078 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6079 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6080 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6081 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6082 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
6083 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6084 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6085 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6086 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6087 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6088 // OMP-DEfAULT:       cond.true:
6089 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
6090 // OMP-DEfAULT:       cond.false:
6091 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6092 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
6093 // OMP-DEfAULT:       cond.end:
6094 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6095 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6096 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6097 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6098 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6099 // OMP-DEfAULT:       omp.inner.for.cond:
6100 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6101 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6102 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6103 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6104 // OMP-DEfAULT:       omp.inner.for.body:
6105 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6106 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
6107 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6108 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6109 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
6110 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 116
6111 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
6112 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6113 // OMP-DEfAULT:       omp.body.continue:
6114 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6115 // OMP-DEfAULT:       omp.inner.for.inc:
6116 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6117 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
6118 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6119 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
6120 // OMP-DEfAULT:       omp.inner.for.end:
6121 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6122 // OMP-DEfAULT:       omp.loop.exit:
6123 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6124 // OMP-DEfAULT-NEXT:    ret void
6125 //
6126 //
6127 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211
6128 // OMP-DEfAULT-SAME: (i32 noundef [[A:%.*]]) #[[ATTR3]] {
6129 // OMP-DEfAULT-NEXT:  entry:
6130 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6131 // OMP-DEfAULT-NEXT:    [[A_CASTED:%.*]] = alloca i32, align 4
6132 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
6133 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
6134 // OMP-DEfAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
6135 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[A_CASTED]], align 4
6136 // OMP-DEfAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined, i32 [[TMP1]])
6137 // OMP-DEfAULT-NEXT:    ret void
6138 //
6139 //
6140 // OMP-DEfAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined
6141 // OMP-DEfAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[A:%.*]]) #[[ATTR3]] {
6142 // OMP-DEfAULT-NEXT:  entry:
6143 // OMP-DEfAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
6144 // OMP-DEfAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
6145 // OMP-DEfAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
6146 // OMP-DEfAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6147 // OMP-DEfAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6148 // OMP-DEfAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6149 // OMP-DEfAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6150 // OMP-DEfAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6151 // OMP-DEfAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6152 // OMP-DEfAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
6153 // OMP-DEfAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
6154 // OMP-DEfAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
6155 // OMP-DEfAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
6156 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6157 // OMP-DEfAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6158 // OMP-DEfAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6159 // OMP-DEfAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6160 // OMP-DEfAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
6161 // OMP-DEfAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6162 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6163 // OMP-DEfAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6164 // OMP-DEfAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6165 // OMP-DEfAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6166 // OMP-DEfAULT:       cond.true:
6167 // OMP-DEfAULT-NEXT:    br label [[COND_END:%.*]]
6168 // OMP-DEfAULT:       cond.false:
6169 // OMP-DEfAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6170 // OMP-DEfAULT-NEXT:    br label [[COND_END]]
6171 // OMP-DEfAULT:       cond.end:
6172 // OMP-DEfAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6173 // OMP-DEfAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6174 // OMP-DEfAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6175 // OMP-DEfAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6176 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6177 // OMP-DEfAULT:       omp.inner.for.cond:
6178 // OMP-DEfAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6179 // OMP-DEfAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6180 // OMP-DEfAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6181 // OMP-DEfAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6182 // OMP-DEfAULT:       omp.inner.for.body:
6183 // OMP-DEfAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6184 // OMP-DEfAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
6185 // OMP-DEfAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6186 // OMP-DEfAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6187 // OMP-DEfAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
6188 // OMP-DEfAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1016
6189 // OMP-DEfAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
6190 // OMP-DEfAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6191 // OMP-DEfAULT:       omp.body.continue:
6192 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6193 // OMP-DEfAULT:       omp.inner.for.inc:
6194 // OMP-DEfAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6195 // OMP-DEfAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
6196 // OMP-DEfAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6197 // OMP-DEfAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
6198 // OMP-DEfAULT:       omp.inner.for.end:
6199 // OMP-DEfAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6200 // OMP-DEfAULT:       omp.loop.exit:
6201 // OMP-DEfAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6202 // OMP-DEfAULT-NEXT:    ret void
6203 //
6204 //
6205 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
6206 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
6207 // OMP-DEfAULT-NEXT:  entry:
6208 // OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init()
6209 // OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.2()
6210 // OMP-DEfAULT-NEXT:    ret void
6211 //
6212 //
6213 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
6214 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
6215 // OMP-DEfAULT-NEXT:  entry:
6216 // OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.3()
6217 // OMP-DEfAULT-NEXT:    ret void
6218 //
6219 //
6220 // OMP-DEfAULT-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
6221 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
6222 // OMP-DEfAULT-NEXT:  entry:
6223 // OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.1()
6224 // OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.4()
6225 // OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.5()
6226 // OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.8()
6227 // OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.13()
6228 // OMP-DEfAULT-NEXT:    call void @__cxx_global_var_init.18()
6229 // OMP-DEfAULT-NEXT:    ret void
6230 //
6231 //
6232 // OMP-DEfAULT-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6233 // OMP-DEfAULT-SAME: () #[[ATTR0]] {
6234 // OMP-DEfAULT-NEXT:  entry:
6235 // OMP-DEfAULT-NEXT:    call void @__tgt_register_requires(i64 1)
6236 // OMP-DEfAULT-NEXT:    ret void
6237 //
6238 //
6239 //
6240 //
6241 //
6242 //
6243 //
6244 //
6245 //
6246 //
6247 //
6248 //
6249 //
6250 //
6251 //
6252 //
6253 //
6254 //
6255 //
6256 //
6257 //
6258 //
6259 //
6260 //
6261 //
6262 //
6263 //
6264 //
6265 //
6266 //
6267 //
6268 //
6269 //
6270 //
6271 //
6272 //
6273 //
6274 //
6275 //
6276 //
6277 //
6278 //
6279 //
6280 //
6281 //
6282 //
6283 //
6284 //
6285 //
6286 //
6287 //
6288 //
6289 //
6290 //
6291 //
6292 //
6293 //
6294 //
6295 //
6296 //
6297 //
6298 //
6299 //
6300 //
6301 //
6302 //
6303 //
6304 //
6305 //
6306 //
6307 //
6308 //
6309 //
6310 //
6311 //
6312 //
6313 //
6314 //
6315 //
6316 //
6317 //
6318 //
6319 //
6320 //
6321 //
6322 //
6323 //
6324 //
6325 //
6326 //
6327 //
6328 //
6329 //
6330 //
6331 //
6332 //
6333 //
6334 //
6335 //
6336 //
6337 //
6338 //
6339 //
6340 //
6341 //
6342 //
6343 //
6344 //
6345 //
6346 //
6347 //
6348 //
6349 //
6350 //
6351 //
6352 //
6353 //
6354 //
6355 //
6356 //
6357 //
6358 //
6359 //
6360 //
6361 //
6362 //
6363 //
6364 //
6365 //
6366 //
6367 //
6368 //
6369 //
6370 //
6371 //
6372 //
6373 //
6374 //
6375 //
6376 //
6377 //
6378 //
6379 //
6380 //
6381 //
6382 //
6383 //
6384 //
6385 //
6386 //
6387 //
6388 //
6389 //
6390 //
6391 //
6392 //
6393 //
6394 //
6395 //
6396 //
6397 //
6398 //
6399 //
6400 //
6401 //
6402 //
6403 //
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6405 //
6406 //
6407 //
6408 //
6409 //
6410 //
6411 //
6412 //
6413 //
6414 //
6415 //
6416 //
6417 //
6418 //
6419 //
6420 //
6421 //
6422 //
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6424 //
6425 //
6426 //
6427 //
6428 //
6429 //
6430 //
6431 //
6432 //
6433 //
6434 //
6435 //
6436 //
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6438 //
6439 //
6440 //
6441 //
6442 //
6443 //
6444 //
6445 //
6446 //
6447 //
6448 //
6449 //
6450 //
6451 //
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6454 //
6455 //
6456 //
6457 //
6458 //
6459 //
6460 //
6461 //
6462 //
6463 //
6464 //
6465 //
6466 //
6467 //
6468 //
6469 //
6470 //
6471 //
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6684 //
6685 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init
6686 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0:[0-9]+]] {
6687 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6688 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
6689 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @_ZL2a1, ptr @__dso_handle) #[[ATTR2:[0-9]+]]
6690 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6691 //
6692 //
6693 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAC1Ev
6694 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
6695 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6696 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6697 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6698 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6699 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SAC2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]])
6700 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6701 //
6702 //
6703 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAD1Ev
6704 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6705 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6706 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6707 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6708 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6709 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SAD2Ev(ptr noundef nonnull align 4 dereferenceable(16) [[THIS1]]) #[[ATTR2]]
6710 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6711 //
6712 //
6713 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAC2Ev
6714 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6715 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6716 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6717 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
6718 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6719 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6720 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
6721 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6722 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
6723 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
6724 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 2
6725 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
6726 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
6727 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
6728 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
6729 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6730 //
6731 //
6732 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SAD2Ev
6733 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6734 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6735 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6736 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
6737 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6738 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6739 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
6740 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6741 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
6742 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
6743 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 3
6744 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
6745 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
6746 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
6747 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
6748 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6749 //
6750 //
6751 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.1
6752 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
6753 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6754 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SAC1Ev(ptr noundef nonnull align 4 dereferenceable(16) @a2)
6755 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SAD1Ev, ptr @a2, ptr @__dso_handle) #[[ATTR2]]
6756 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6757 //
6758 //
6759 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.2
6760 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
6761 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6762 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b1)
6763 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b1, ptr @__dso_handle) #[[ATTR2]]
6764 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6765 //
6766 //
6767 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBC1Ev
6768 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6769 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6770 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6771 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6772 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6773 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SBC2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]])
6774 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6775 //
6776 //
6777 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBD1Ev
6778 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6779 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6780 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6781 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6782 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6783 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SBD2Ev(ptr noundef nonnull align 4 dereferenceable(32) [[THIS1]]) #[[ATTR2]]
6784 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6785 //
6786 //
6787 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBC2Ev
6788 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6789 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6790 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6791 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
6792 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6793 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6794 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
6795 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6796 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
6797 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
6798 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 5
6799 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
6800 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
6801 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
6802 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
6803 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6804 //
6805 //
6806 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SBD2Ev
6807 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6808 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6809 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6810 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
6811 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6812 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6813 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
6814 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6815 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
6816 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
6817 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 6
6818 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
6819 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
6820 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
6821 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
6822 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6823 //
6824 //
6825 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.3
6826 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
6827 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6828 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SBC1Ev(ptr noundef nonnull align 4 dereferenceable(32) @b2)
6829 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SBD1Ev, ptr @b2, ptr @__dso_handle) #[[ATTR2]]
6830 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6831 //
6832 //
6833 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.4
6834 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
6835 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6836 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SCC1Ev(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
6837 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SCD1Ev, ptr @_ZL2c1, ptr @__dso_handle) #[[ATTR2]]
6838 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6839 //
6840 //
6841 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCC1Ev
6842 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6843 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6844 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6845 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6846 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6847 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SCC2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]])
6848 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6849 //
6850 //
6851 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCD1Ev
6852 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6853 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6854 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6855 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6856 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6857 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SCD2Ev(ptr noundef nonnull align 4 dereferenceable(64) [[THIS1]]) #[[ATTR2]]
6858 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6859 //
6860 //
6861 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCC2Ev
6862 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6863 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6864 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6865 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
6866 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
6867 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6868 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6869 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
6870 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6871 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
6872 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
6873 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
6874 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
6875 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148(i64 [[TMP3]]) #[[ATTR2]]
6876 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
6877 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
6878 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
6879 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6880 //
6881 //
6882 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148
6883 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3:[0-9]+]] {
6884 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6885 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
6886 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
6887 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
6888 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
6889 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
6890 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
6891 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2:[0-9]+]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined, i64 [[TMP1]])
6892 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6893 //
6894 //
6895 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SCC1Ev_l148.omp_outlined
6896 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
6897 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6898 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6899 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6900 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
6901 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6902 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6903 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6904 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6905 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6906 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6907 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
6908 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6909 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6910 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
6911 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6912 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6913 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6914 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6915 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6916 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6917 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6918 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6919 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
6920 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6921 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
6922 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
6923 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
6924 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6925 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
6926 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
6927 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
6928 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6929 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6930 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
6931 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6932 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
6933 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6934 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6935 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
6936 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6937 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
6938 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6939 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
6940 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6941 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6942 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
6943 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 8
6944 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
6945 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6946 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
6947 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6948 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
6949 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6950 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
6951 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6952 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
6953 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
6954 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6955 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
6956 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
6957 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6958 //
6959 //
6960 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SCD2Ev
6961 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6962 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6963 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6964 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
6965 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6966 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6967 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
6968 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
6969 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
6970 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
6971 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 9
6972 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
6973 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
6974 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
6975 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
6976 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6977 //
6978 //
6979 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.5
6980 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
6981 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6982 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SDC1Ev(ptr noundef nonnull align 4 dereferenceable(128) @d1)
6983 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SDD1Ev, ptr @d1, ptr @__dso_handle) #[[ATTR2]]
6984 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6985 //
6986 //
6987 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDC1Ev
6988 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6989 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
6990 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
6991 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
6992 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
6993 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SDC2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]])
6994 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
6995 //
6996 //
6997 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDD1Ev
6998 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
6999 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7000 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7001 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7002 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7003 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SDD2Ev(ptr noundef nonnull align 4 dereferenceable(128) [[THIS1]]) #[[ATTR2]]
7004 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7005 //
7006 //
7007 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDC2Ev
7008 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7009 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7010 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7011 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7012 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7013 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7014 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7015 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7016 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7017 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7018 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 11
7019 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
7020 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
7021 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
7022 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
7023 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7024 //
7025 //
7026 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SDD2Ev
7027 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7028 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7029 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7030 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7031 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7032 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7033 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7034 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7035 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7036 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7037 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7038 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7039 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7040 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174(i64 [[TMP3]]) #[[ATTR2]]
7041 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7042 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7043 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7044 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7045 //
7046 //
7047 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174
7048 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
7049 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7050 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7051 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7052 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7053 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
7054 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
7055 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
7056 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined, i64 [[TMP1]])
7057 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7058 //
7059 //
7060 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SDD1Ev_l174.omp_outlined
7061 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
7062 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7063 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7064 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7065 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7066 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7067 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7068 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7069 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7070 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7071 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7072 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
7073 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7074 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7075 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7076 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7077 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
7078 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7079 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7080 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7081 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7082 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7083 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7084 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7085 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7086 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
7087 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
7088 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
7089 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7090 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
7091 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
7092 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7093 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7094 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7095 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7096 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7097 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
7098 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7099 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7100 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7101 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7102 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
7103 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7104 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7105 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7106 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
7107 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
7108 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 12
7109 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
7110 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7111 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
7112 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7113 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
7114 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7115 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
7116 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
7117 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
7118 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
7119 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7120 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
7121 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7122 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7123 //
7124 //
7125 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.6
7126 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
7127 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7128 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SEC1Ev(ptr noundef nonnull align 4 dereferenceable(256) @e1)
7129 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2SED1Ev, ptr @e1, ptr @__dso_handle) #[[ATTR2]]
7130 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7131 //
7132 //
7133 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SEC1Ev
7134 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7135 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7136 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7137 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7138 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7139 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SEC2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]])
7140 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7141 //
7142 //
7143 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SED1Ev
7144 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7145 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7146 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7147 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7148 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7149 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SED2Ev(ptr noundef nonnull align 4 dereferenceable(256) [[THIS1]]) #[[ATTR2]]
7150 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7151 //
7152 //
7153 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SEC2Ev
7154 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7155 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7156 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7157 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7158 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7159 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7160 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7161 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7162 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7163 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7164 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7165 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7166 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7167 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192(i64 [[TMP3]]) #[[ATTR2]]
7168 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7169 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7170 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7171 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7172 //
7173 //
7174 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192
7175 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
7176 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7177 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7178 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7179 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7180 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
7181 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
7182 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
7183 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined, i64 [[TMP1]])
7184 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7185 //
7186 //
7187 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SEC1Ev_l192.omp_outlined
7188 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
7189 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7190 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7191 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7192 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7193 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7194 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7195 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7196 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7197 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7198 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7199 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
7200 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7201 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7202 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7203 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7204 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
7205 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7206 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7207 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7208 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7209 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7210 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7211 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7212 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7213 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
7214 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
7215 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
7216 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7217 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
7218 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
7219 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7220 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7221 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7222 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7223 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7224 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
7225 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7226 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7227 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7228 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7229 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
7230 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7231 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7232 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7233 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
7234 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
7235 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 14
7236 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
7237 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7238 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
7239 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7240 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
7241 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7242 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
7243 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
7244 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
7245 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
7246 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7247 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
7248 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7249 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7250 //
7251 //
7252 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SED2Ev
7253 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7254 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7255 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7256 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7257 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7258 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7259 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7260 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7261 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7262 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7263 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7264 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7265 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7266 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199(i64 [[TMP3]]) #[[ATTR2]]
7267 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7268 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7269 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7270 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7271 //
7272 //
7273 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199
7274 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
7275 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7276 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7277 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7278 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7279 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
7280 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
7281 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
7282 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined, i64 [[TMP1]])
7283 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7284 //
7285 //
7286 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SED1Ev_l199.omp_outlined
7287 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
7288 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7289 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7290 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7291 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7292 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7293 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7294 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7295 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7296 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7297 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7298 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
7299 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7300 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7301 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7302 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7303 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
7304 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7305 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7306 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7307 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7308 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7309 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7310 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7311 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7312 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
7313 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
7314 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
7315 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7316 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
7317 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
7318 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7319 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7320 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7321 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7322 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7323 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
7324 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7325 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7326 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7327 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7328 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
7329 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7330 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7331 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7332 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
7333 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
7334 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 15
7335 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
7336 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7337 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
7338 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7339 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
7340 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7341 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
7342 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
7343 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
7344 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
7345 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7346 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
7347 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7348 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7349 //
7350 //
7351 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.7
7352 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
7353 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7354 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2STILi100EEC1Ev(ptr noundef nonnull align 4 dereferenceable(912) @t1)
7355 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi100EED1Ev, ptr @t1, ptr @__dso_handle) #[[ATTR2]]
7356 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7357 //
7358 //
7359 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC1Ev
7360 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7361 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7362 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7363 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7364 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7365 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2STILi100EEC2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]])
7366 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7367 //
7368 //
7369 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED1Ev
7370 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7371 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7372 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7373 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7374 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7375 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2STILi100EED2Ev(ptr noundef nonnull align 4 dereferenceable(912) [[THIS1]]) #[[ATTR2]]
7376 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7377 //
7378 //
7379 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EEC2Ev
7380 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7381 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7382 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7383 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7384 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7385 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7386 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7387 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7388 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7389 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7390 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7391 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7392 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7393 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218(i64 [[TMP3]]) #[[ATTR2]]
7394 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7395 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7396 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7397 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7398 //
7399 //
7400 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218
7401 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
7402 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7403 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7404 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7405 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7406 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
7407 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
7408 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
7409 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined, i64 [[TMP1]])
7410 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7411 //
7412 //
7413 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EEC1Ev_l218.omp_outlined
7414 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
7415 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7416 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7417 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7418 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7419 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7420 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7421 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7422 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7423 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7424 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7425 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
7426 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7427 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7428 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7429 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7430 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
7431 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7432 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7433 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7434 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7435 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7436 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7437 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7438 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7439 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
7440 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
7441 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
7442 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7443 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
7444 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
7445 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7446 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7447 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7448 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7449 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7450 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
7451 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7452 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7453 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7454 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7455 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
7456 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7457 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7458 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7459 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
7460 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
7461 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 117
7462 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
7463 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7464 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
7465 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7466 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
7467 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7468 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
7469 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
7470 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
7471 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
7472 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7473 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
7474 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7475 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7476 //
7477 //
7478 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EED2Ev
7479 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7480 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7481 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7482 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7483 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7484 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7485 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7486 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7487 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7488 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7489 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7490 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7491 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7492 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225(i64 [[TMP3]]) #[[ATTR2]]
7493 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7494 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7495 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7496 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7497 //
7498 //
7499 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225
7500 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
7501 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7502 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7503 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7504 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7505 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
7506 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
7507 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
7508 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined, i64 [[TMP1]])
7509 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7510 //
7511 //
7512 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EED1Ev_l225.omp_outlined
7513 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
7514 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7515 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7516 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7517 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7518 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7519 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7520 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7521 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7522 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7523 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7524 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
7525 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7526 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7527 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7528 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7529 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
7530 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7531 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7532 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7533 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7534 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7535 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7536 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7537 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7538 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
7539 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
7540 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
7541 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7542 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
7543 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
7544 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7545 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7546 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7547 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7548 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7549 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
7550 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7551 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7552 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7553 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7554 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
7555 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7556 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7557 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7558 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
7559 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
7560 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 118
7561 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
7562 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7563 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
7564 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7565 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
7566 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7567 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
7568 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
7569 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
7570 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
7571 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7572 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
7573 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7574 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7575 //
7576 //
7577 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@__cxx_global_var_init.8
7578 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
7579 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7580 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2STILi1000EEC1Ev(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
7581 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = call i32 @__cxa_atexit(ptr @_ZN2STILi1000EED1Ev, ptr @t2, ptr @__dso_handle) #[[ATTR2]]
7582 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7583 //
7584 //
7585 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC1Ev
7586 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7587 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7588 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7589 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7590 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7591 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2STILi1000EEC2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]])
7592 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7593 //
7594 //
7595 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED1Ev
7596 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7597 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7598 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7599 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7600 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7601 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2STILi1000EED2Ev(ptr noundef nonnull align 4 dereferenceable(4512) [[THIS1]]) #[[ATTR2]]
7602 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7603 //
7604 //
7605 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EEC2Ev
7606 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7607 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7608 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7609 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7610 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7611 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7612 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7613 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7614 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7615 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7616 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7617 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7618 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7619 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218(i64 [[TMP3]]) #[[ATTR2]]
7620 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7621 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7622 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7623 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7624 //
7625 //
7626 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218
7627 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
7628 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7629 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7630 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7631 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7632 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
7633 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
7634 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
7635 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined, i64 [[TMP1]])
7636 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7637 //
7638 //
7639 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EEC1Ev_l218.omp_outlined
7640 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
7641 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7642 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7643 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7644 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7645 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7646 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7647 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7648 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7649 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7650 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7651 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
7652 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7653 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7654 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7655 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7656 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
7657 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7658 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7659 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7660 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7661 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7662 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7663 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7664 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7665 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
7666 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
7667 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
7668 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7669 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
7670 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
7671 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7672 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7673 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7674 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7675 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7676 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
7677 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7678 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7679 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7680 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7681 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
7682 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7683 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7684 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7685 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
7686 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
7687 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1017
7688 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
7689 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7690 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
7691 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7692 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
7693 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7694 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
7695 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
7696 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
7697 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
7698 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7699 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
7700 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7701 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7702 //
7703 //
7704 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EED2Ev
7705 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
7706 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7707 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7708 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7709 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7710 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7711 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7712 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7713 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7714 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7715 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7716 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7717 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7718 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225(i64 [[TMP3]]) #[[ATTR2]]
7719 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7720 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7721 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7722 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7723 //
7724 //
7725 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225
7726 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
7727 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7728 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7729 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7730 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7731 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
7732 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
7733 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
7734 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined, i64 [[TMP1]])
7735 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7736 //
7737 //
7738 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EED1Ev_l225.omp_outlined
7739 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
7740 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7741 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7742 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7743 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
7744 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7745 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7746 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7747 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7748 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7749 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7750 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
7751 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
7752 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
7753 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
7754 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7755 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
7756 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7757 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7758 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
7759 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7760 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7761 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7762 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
7763 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7764 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
7765 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
7766 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
7767 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7768 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
7769 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
7770 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
7771 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7772 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7773 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
7774 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7775 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
7776 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7777 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7778 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
7779 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7780 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
7781 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7782 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
7783 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7784 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
7785 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
7786 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1018
7787 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
7788 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7789 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
7790 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7791 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
7792 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7793 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
7794 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
7795 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
7796 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
7797 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7798 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
7799 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
7800 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7801 //
7802 //
7803 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_Z3bari
7804 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i32 noundef signext [[A:%.*]]) #[[ATTR4:[0-9]+]] {
7805 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7806 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i32, align 4
7807 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[R:%.*]] = alloca i32, align 4
7808 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[R_CASTED:%.*]] = alloca i64, align 8
7809 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[A]], ptr [[A_ADDR]], align 4
7810 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
7811 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[R]], align 4
7812 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @_ZL2a1)
7813 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SA3fooEv(ptr noundef nonnull align 4 dereferenceable(16) @a2)
7814 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b1)
7815 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SB3fooEv(ptr noundef nonnull align 4 dereferenceable(32) @b2)
7816 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SC3fooEv(ptr noundef nonnull align 4 dereferenceable(64) @_ZL2c1)
7817 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SD3fooEv(ptr noundef nonnull align 4 dereferenceable(128) @d1)
7818 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2SE3fooEv(ptr noundef nonnull align 4 dereferenceable(256) @e1)
7819 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2STILi100EE3fooEv(ptr noundef nonnull align 4 dereferenceable(912) @t1)
7820 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @_ZN2STILi1000EE3fooEv(ptr noundef nonnull align 4 dereferenceable(4512) @t2)
7821 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[R]], align 4
7822 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[R_CASTED]], align 4
7823 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i64, ptr [[R_CASTED]], align 8
7824 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267(i64 [[TMP2]]) #[[ATTR2]]
7825 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[R]], align 4
7826 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
7827 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
7828 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP3]], [[TMP5]]
7829 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret i32 [[ADD]]
7830 //
7831 //
7832 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SA3fooEv
7833 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(16) [[THIS:%.*]]) #[[ATTR4]] comdat {
7834 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7835 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7836 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7837 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7838 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7839 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7840 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7841 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7842 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7843 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 1
7844 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
7845 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
7846 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
7847 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
7848 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7849 //
7850 //
7851 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SB3fooEv
7852 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(32) [[THIS:%.*]]) #[[ATTR4]] comdat {
7853 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7854 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7855 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7856 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7857 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7858 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7859 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7860 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7861 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7862 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7863 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7864 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7865 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122(i64 [[TMP3]]) #[[ATTR2]]
7866 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7867 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7868 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7869 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7870 //
7871 //
7872 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SC3fooEv
7873 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(64) [[THIS:%.*]]) #[[ATTR4]] comdat {
7874 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7875 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7876 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7877 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7878 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7879 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7880 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7881 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7882 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7883 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 7
7884 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
7885 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
7886 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
7887 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
7888 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7889 //
7890 //
7891 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SD3fooEv
7892 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(128) [[THIS:%.*]]) #[[ATTR4]] comdat {
7893 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7894 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7895 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7896 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7897 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7898 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7899 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7900 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7901 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7902 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP2]], 10
7903 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[A]], align 4
7904 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[A]], align 4
7905 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load ptr, ptr @R, align 8
7906 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP3]], ptr [[TMP4]], align 4
7907 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7908 //
7909 //
7910 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2SE3fooEv
7911 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(256) [[THIS:%.*]]) #[[ATTR4]] comdat {
7912 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7913 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7914 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7915 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7916 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7917 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7918 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7919 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7920 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7921 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7922 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7923 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7924 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185(i64 [[TMP3]]) #[[ATTR2]]
7925 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7926 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7927 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7928 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7929 //
7930 //
7931 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi100EE3fooEv
7932 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(912) [[THIS:%.*]]) #[[ATTR4]] comdat {
7933 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7934 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7935 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7936 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7937 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7938 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7939 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7940 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7941 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7942 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7943 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7944 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7945 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211(i64 [[TMP3]]) #[[ATTR2]]
7946 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7947 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7948 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7949 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7950 //
7951 //
7952 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_ZN2STILi1000EE3fooEv
7953 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noundef nonnull align 4 dereferenceable(4512) [[THIS:%.*]]) #[[ATTR4]] comdat {
7954 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7955 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
7956 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A:%.*]] = alloca i32, align 4
7957 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
7958 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
7959 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
7960 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr @R, align 8
7961 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
7962 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP1]], ptr [[A]], align 4
7963 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[A]], align 4
7964 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP2]], ptr [[A_CASTED]], align 4
7965 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i64, ptr [[A_CASTED]], align 8
7966 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211(i64 [[TMP3]]) #[[ATTR2]]
7967 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[A]], align 4
7968 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load ptr, ptr @R, align 8
7969 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[TMP5]], align 4
7970 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7971 //
7972 //
7973 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267
7974 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[R:%.*]]) #[[ATTR3]] {
7975 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7976 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[R_ADDR:%.*]] = alloca i64, align 8
7977 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[R_CASTED:%.*]] = alloca i64, align 8
7978 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[R]], ptr [[R_ADDR]], align 8
7979 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[R_ADDR]], align 4
7980 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[R_CASTED]], align 4
7981 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[R_CASTED]], align 8
7982 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined, i64 [[TMP1]])
7983 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
7984 //
7985 //
7986 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z3bari_l267.omp_outlined
7987 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[R:%.*]]) #[[ATTR3]] {
7988 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
7989 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
7990 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
7991 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[R_ADDR:%.*]] = alloca i64, align 8
7992 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7993 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7994 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7995 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7996 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7997 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7998 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
7999 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8000 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8001 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[R]], ptr [[R_ADDR]], align 8
8002 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8003 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
8004 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8005 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8006 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8007 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8008 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8009 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8010 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8011 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8012 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
8013 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
8014 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
8015 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8016 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
8017 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
8018 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8019 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8020 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8021 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
8022 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8023 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
8024 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8025 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8026 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8027 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8028 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
8029 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8030 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8031 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8032 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
8033 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[R_ADDR]], align 4
8034 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[INC:%.*]] = add nsw i32 [[TMP8]], 1
8035 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[INC]], ptr [[R_ADDR]], align 4
8036 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8037 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
8038 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8039 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
8040 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8041 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP9]], 1
8042 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
8043 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
8044 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
8045 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8046 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
8047 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
8048 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8049 //
8050 //
8051 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122
8052 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
8053 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8054 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
8055 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
8056 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
8057 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
8058 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
8059 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
8060 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined, i64 [[TMP1]])
8061 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8062 //
8063 //
8064 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SB3fooEv_l122.omp_outlined
8065 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
8066 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8067 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8068 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8069 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
8070 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8071 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8072 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8073 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8074 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8075 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8076 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
8077 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8078 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8079 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
8080 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8081 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
8082 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8083 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8084 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8085 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8086 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8087 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8088 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8089 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8090 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
8091 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
8092 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
8093 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8094 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
8095 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
8096 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8097 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8098 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8099 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
8100 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8101 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
8102 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8103 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8104 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8105 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8106 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
8107 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8108 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8109 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8110 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
8111 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
8112 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 4
8113 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
8114 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8115 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
8116 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8117 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
8118 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8119 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
8120 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
8121 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
8122 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
8123 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8124 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
8125 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
8126 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8127 //
8128 //
8129 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185
8130 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
8131 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8132 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
8133 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
8134 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
8135 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
8136 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
8137 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
8138 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined, i64 [[TMP1]])
8139 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8140 //
8141 //
8142 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SE3fooEv_l185.omp_outlined
8143 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
8144 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8145 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8146 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8147 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
8148 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8149 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8150 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8151 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8152 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8153 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8154 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
8155 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8156 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8157 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
8158 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8159 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
8160 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8161 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8162 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8163 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8164 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8165 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8166 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8167 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8168 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
8169 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
8170 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
8171 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8172 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
8173 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
8174 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8175 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8176 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8177 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
8178 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8179 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
8180 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8181 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8182 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8183 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8184 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
8185 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8186 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8187 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8188 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
8189 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
8190 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 13
8191 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
8192 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8193 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
8194 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8195 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
8196 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8197 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
8198 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
8199 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
8200 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
8201 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8202 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
8203 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
8204 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8205 //
8206 //
8207 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211
8208 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
8209 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8210 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
8211 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
8212 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
8213 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
8214 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
8215 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
8216 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined, i64 [[TMP1]])
8217 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8218 //
8219 //
8220 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi100EE3fooEv_l211.omp_outlined
8221 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
8222 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8223 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8224 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8225 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
8226 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8227 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8228 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8229 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8230 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8231 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8232 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
8233 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8234 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8235 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
8236 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8237 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
8238 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8239 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8240 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8241 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8242 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8243 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8244 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8245 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8246 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
8247 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
8248 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
8249 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8250 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
8251 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
8252 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8253 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8254 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8255 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
8256 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8257 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
8258 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8259 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8260 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8261 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8262 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
8263 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8264 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8265 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8266 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
8267 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
8268 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 116
8269 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
8270 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8271 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
8272 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8273 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
8274 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8275 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
8276 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
8277 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
8278 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
8279 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8280 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
8281 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
8282 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8283 //
8284 //
8285 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211
8286 // CHECK-NTARGET-OMP-DEFAULT-SAME: (i64 noundef [[A:%.*]]) #[[ATTR3]] {
8287 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8288 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
8289 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_CASTED:%.*]] = alloca i64, align 8
8290 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
8291 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
8292 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP0]], ptr [[A_CASTED]], align 4
8293 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i64, ptr [[A_CASTED]], align 8
8294 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined, i64 [[TMP1]])
8295 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8296 //
8297 //
8298 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2STILi1000EE3fooEv_l211.omp_outlined
8299 // CHECK-NTARGET-OMP-DEFAULT-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[A:%.*]]) #[[ATTR3]] {
8300 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8301 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
8302 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
8303 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[A_ADDR:%.*]] = alloca i64, align 8
8304 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8305 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8306 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8307 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8308 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8309 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8310 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[I:%.*]] = alloca i32, align 4
8311 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
8312 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
8313 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i64 [[A]], ptr [[A_ADDR]], align 8
8314 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8315 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
8316 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8317 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8318 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
8319 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
8320 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP1]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8321 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8322 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP2]], 9
8323 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8324 // CHECK-NTARGET-OMP-DEFAULT:       cond.true:
8325 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END:%.*]]
8326 // CHECK-NTARGET-OMP-DEFAULT:       cond.false:
8327 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8328 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[COND_END]]
8329 // CHECK-NTARGET-OMP-DEFAULT:       cond.end:
8330 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP3]], [[COND_FALSE]] ]
8331 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8332 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8333 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[TMP4]], ptr [[DOTOMP_IV]], align 4
8334 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8335 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.cond:
8336 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8337 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8338 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP5]], [[TMP6]]
8339 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8340 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.body:
8341 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8342 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP7]], 1
8343 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8344 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
8345 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP8:%.*]] = load i32, ptr [[A_ADDR]], align 4
8346 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP8]], 1016
8347 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD2]], ptr [[A_ADDR]], align 4
8348 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8349 // CHECK-NTARGET-OMP-DEFAULT:       omp.body.continue:
8350 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8351 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.inc:
8352 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8353 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP9]], 1
8354 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
8355 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_INNER_FOR_COND]]
8356 // CHECK-NTARGET-OMP-DEFAULT:       omp.inner.for.end:
8357 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8358 // CHECK-NTARGET-OMP-DEFAULT:       omp.loop.exit:
8359 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP1]])
8360 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8361 //
8362 //
8363 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000500
8364 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
8365 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8366 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init()
8367 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.2()
8368 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8369 //
8370 //
8371 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__I_000501
8372 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
8373 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8374 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.3()
8375 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8376 //
8377 //
8378 // CHECK-NTARGET-OMP-DEFAULT-LABEL: define {{[^@]+}}@_GLOBAL__sub_I_target_parallel_generic_loop_codegen_1.cpp
8379 // CHECK-NTARGET-OMP-DEFAULT-SAME: () #[[ATTR0]] {
8380 // CHECK-NTARGET-OMP-DEFAULT-NEXT:  entry:
8381 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.1()
8382 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.4()
8383 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.5()
8384 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.6()
8385 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.7()
8386 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    call void @__cxx_global_var_init.8()
8387 // CHECK-NTARGET-OMP-DEFAULT-NEXT:    ret void
8388 //
8389 //// NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
8390 // TCHECK: {{.*}}