Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / OpenMP / target_teams_distribute_dist_schedule_codegen.cpp
blob5d940d020deaa8ea11758c1d52609b32409145e0
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // expected-no-diagnostics
3 #ifndef HEADER
4 #define HEADER
6 // Test host codegen.
7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
20 #ifdef CK1
22 template <typename T, int X, long long Y>
23 struct SS{
24 T a[X];
25 float b;
26 int foo(void) {
28 #pragma omp target teams distribute
29 for(int i = 0; i < X; i++) {
30 a[i] = (T)0;
32 #pragma omp target teams distribute dist_schedule(static)
33 for(int i = 0; i < X; i++) {
34 a[i] = (T)0;
36 #pragma omp target teams distribute dist_schedule(static, X/2)
37 for(int i = 0; i < X; i++) {
38 a[i] = (T)0;
46 return a[0];
50 int teams_template_struct(void) {
51 SS<int, 123, 456> V;
52 return V.foo();
55 #endif // CK1
57 // Test host codegen.
58 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
59 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
60 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
61 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
62 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
63 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
65 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
66 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
67 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
68 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
69 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
70 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
71 #ifdef CK2
73 template <typename T, int n>
74 int tmain(T argc) {
75 T a[n];
76 #pragma omp target teams distribute
77 for(int i = 0; i < n; i++) {
78 a[i] = (T)0;
80 #pragma omp target teams distribute dist_schedule(static)
81 for(int i = 0; i < n; i++) {
82 a[i] = (T)0;
84 #pragma omp target teams distribute dist_schedule(static, n)
85 for(int i = 0; i < n; i++) {
86 a[i] = (T)0;
88 return 0;
91 int main (int argc, char **argv) {
92 int n = 100;
93 int a[n];
94 #pragma omp target teams distribute
95 for(int i = 0; i < n; i++) {
96 a[i] = 0;
98 #pragma omp target teams distribute dist_schedule(static)
99 for(int i = 0; i < n; i++) {
100 a[i] = 0;
102 #pragma omp target teams distribute dist_schedule(static, n)
103 for(int i = 0; i < n; i++) {
104 a[i] = 0;
106 return tmain<int, 10>(argc);
123 #endif // CK2
124 #endif // #ifndef HEADER
125 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
126 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
127 // CHECK1-NEXT: entry:
128 // CHECK1-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
129 // CHECK1-NEXT: [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
130 // CHECK1-NEXT: ret i32 [[CALL]]
133 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
134 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {
135 // CHECK1-NEXT: entry:
136 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
137 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
138 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
139 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
140 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
141 // CHECK1-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
142 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8
143 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8
144 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8
145 // CHECK1-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
146 // CHECK1-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
147 // CHECK1-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8
148 // CHECK1-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8
149 // CHECK1-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8
150 // CHECK1-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
151 // CHECK1-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
152 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
153 // CHECK1-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
154 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
155 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
156 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 8
157 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
158 // CHECK1-NEXT: store ptr [[A]], ptr [[TMP1]], align 8
159 // CHECK1-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
160 // CHECK1-NEXT: store ptr null, ptr [[TMP2]], align 8
161 // CHECK1-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
162 // CHECK1-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
163 // CHECK1-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
164 // CHECK1-NEXT: store i32 2, ptr [[TMP5]], align 4
165 // CHECK1-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
166 // CHECK1-NEXT: store i32 1, ptr [[TMP6]], align 4
167 // CHECK1-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
168 // CHECK1-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8
169 // CHECK1-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
170 // CHECK1-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8
171 // CHECK1-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
172 // CHECK1-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 8
173 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
174 // CHECK1-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 8
175 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
176 // CHECK1-NEXT: store ptr null, ptr [[TMP11]], align 8
177 // CHECK1-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
178 // CHECK1-NEXT: store ptr null, ptr [[TMP12]], align 8
179 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
180 // CHECK1-NEXT: store i64 123, ptr [[TMP13]], align 8
181 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
182 // CHECK1-NEXT: store i64 0, ptr [[TMP14]], align 8
183 // CHECK1-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
184 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
185 // CHECK1-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
186 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
187 // CHECK1-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
188 // CHECK1-NEXT: store i32 0, ptr [[TMP17]], align 4
189 // CHECK1-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])
190 // CHECK1-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
191 // CHECK1-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
192 // CHECK1: omp_offload.failed:
193 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]
194 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT]]
195 // CHECK1: omp_offload.cont:
196 // CHECK1-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
197 // CHECK1-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
198 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 8
199 // CHECK1-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
200 // CHECK1-NEXT: store ptr [[A2]], ptr [[TMP21]], align 8
201 // CHECK1-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
202 // CHECK1-NEXT: store ptr null, ptr [[TMP22]], align 8
203 // CHECK1-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
204 // CHECK1-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
205 // CHECK1-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
206 // CHECK1-NEXT: store i32 2, ptr [[TMP25]], align 4
207 // CHECK1-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
208 // CHECK1-NEXT: store i32 1, ptr [[TMP26]], align 4
209 // CHECK1-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
210 // CHECK1-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8
211 // CHECK1-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
212 // CHECK1-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8
213 // CHECK1-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
214 // CHECK1-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 8
215 // CHECK1-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
216 // CHECK1-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8
217 // CHECK1-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
218 // CHECK1-NEXT: store ptr null, ptr [[TMP31]], align 8
219 // CHECK1-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
220 // CHECK1-NEXT: store ptr null, ptr [[TMP32]], align 8
221 // CHECK1-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
222 // CHECK1-NEXT: store i64 123, ptr [[TMP33]], align 8
223 // CHECK1-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
224 // CHECK1-NEXT: store i64 0, ptr [[TMP34]], align 8
225 // CHECK1-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
226 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
227 // CHECK1-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
228 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
229 // CHECK1-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
230 // CHECK1-NEXT: store i32 0, ptr [[TMP37]], align 4
231 // CHECK1-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, ptr [[KERNEL_ARGS7]])
232 // CHECK1-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
233 // CHECK1-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
234 // CHECK1: omp_offload.failed8:
235 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(ptr [[THIS1]]) #[[ATTR2]]
236 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT9]]
237 // CHECK1: omp_offload.cont9:
238 // CHECK1-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
239 // CHECK1-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
240 // CHECK1-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 8
241 // CHECK1-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
242 // CHECK1-NEXT: store ptr [[A10]], ptr [[TMP41]], align 8
243 // CHECK1-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
244 // CHECK1-NEXT: store ptr null, ptr [[TMP42]], align 8
245 // CHECK1-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
246 // CHECK1-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
247 // CHECK1-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
248 // CHECK1-NEXT: store i32 2, ptr [[TMP45]], align 4
249 // CHECK1-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
250 // CHECK1-NEXT: store i32 1, ptr [[TMP46]], align 4
251 // CHECK1-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
252 // CHECK1-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8
253 // CHECK1-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
254 // CHECK1-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8
255 // CHECK1-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
256 // CHECK1-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 8
257 // CHECK1-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
258 // CHECK1-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8
259 // CHECK1-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
260 // CHECK1-NEXT: store ptr null, ptr [[TMP51]], align 8
261 // CHECK1-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
262 // CHECK1-NEXT: store ptr null, ptr [[TMP52]], align 8
263 // CHECK1-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
264 // CHECK1-NEXT: store i64 123, ptr [[TMP53]], align 8
265 // CHECK1-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
266 // CHECK1-NEXT: store i64 0, ptr [[TMP54]], align 8
267 // CHECK1-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
268 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
269 // CHECK1-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
270 // CHECK1-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
271 // CHECK1-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
272 // CHECK1-NEXT: store i32 0, ptr [[TMP57]], align 4
273 // CHECK1-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS15]])
274 // CHECK1-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
275 // CHECK1-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
276 // CHECK1: omp_offload.failed16:
277 // CHECK1-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2]]
278 // CHECK1-NEXT: br label [[OMP_OFFLOAD_CONT17]]
279 // CHECK1: omp_offload.cont17:
280 // CHECK1-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
281 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i64 0, i64 0
282 // CHECK1-NEXT: [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
283 // CHECK1-NEXT: ret i32 [[TMP60]]
286 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
287 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
288 // CHECK1-NEXT: entry:
289 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
290 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
291 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
292 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])
293 // CHECK1-NEXT: ret void
296 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined
297 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
298 // CHECK1-NEXT: entry:
299 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
300 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
301 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
302 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
303 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
304 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
305 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
306 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
307 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
308 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
309 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
310 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
311 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
312 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
313 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
314 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4
315 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
316 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
317 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
318 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
319 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
320 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
321 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
322 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
323 // CHECK1: cond.true:
324 // CHECK1-NEXT: br label [[COND_END:%.*]]
325 // CHECK1: cond.false:
326 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
327 // CHECK1-NEXT: br label [[COND_END]]
328 // CHECK1: cond.end:
329 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
330 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
331 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
332 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
333 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
334 // CHECK1: omp.inner.for.cond:
335 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
336 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
337 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
338 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
339 // CHECK1: omp.inner.for.body:
340 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
341 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
342 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
343 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
344 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
345 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
346 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
347 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
348 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
349 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
350 // CHECK1: omp.body.continue:
351 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
352 // CHECK1: omp.inner.for.inc:
353 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
354 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
355 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
356 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
357 // CHECK1: omp.inner.for.end:
358 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
359 // CHECK1: omp.loop.exit:
360 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
361 // CHECK1-NEXT: ret void
364 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
365 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
366 // CHECK1-NEXT: entry:
367 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
368 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
369 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
370 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined, ptr [[TMP0]])
371 // CHECK1-NEXT: ret void
374 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined
375 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
376 // CHECK1-NEXT: entry:
377 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
378 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
379 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
380 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
381 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
382 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
383 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
384 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
385 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
386 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
387 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
388 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
389 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
390 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
391 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
392 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4
393 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
394 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
395 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
396 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
397 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
398 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
399 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
400 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
401 // CHECK1: cond.true:
402 // CHECK1-NEXT: br label [[COND_END:%.*]]
403 // CHECK1: cond.false:
404 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
405 // CHECK1-NEXT: br label [[COND_END]]
406 // CHECK1: cond.end:
407 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
408 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
409 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
410 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
411 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
412 // CHECK1: omp.inner.for.cond:
413 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
414 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
415 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
416 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
417 // CHECK1: omp.inner.for.body:
418 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
419 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
420 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
421 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
422 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
423 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
424 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
425 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
426 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
427 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
428 // CHECK1: omp.body.continue:
429 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
430 // CHECK1: omp.inner.for.inc:
431 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
432 // CHECK1-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
433 // CHECK1-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
434 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
435 // CHECK1: omp.inner.for.end:
436 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
437 // CHECK1: omp.loop.exit:
438 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
439 // CHECK1-NEXT: ret void
442 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
443 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
444 // CHECK1-NEXT: entry:
445 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
446 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
447 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
448 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]])
449 // CHECK1-NEXT: ret void
452 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined
453 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
454 // CHECK1-NEXT: entry:
455 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
456 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
457 // CHECK1-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
458 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
459 // CHECK1-NEXT: [[TMP:%.*]] = alloca i32, align 4
460 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
461 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
462 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
463 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
464 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
465 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
466 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
467 // CHECK1-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
468 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
469 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
470 // CHECK1-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4
471 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
472 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
473 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
474 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
475 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
476 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
477 // CHECK1: omp.dispatch.cond:
478 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
479 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
480 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
481 // CHECK1: cond.true:
482 // CHECK1-NEXT: br label [[COND_END:%.*]]
483 // CHECK1: cond.false:
484 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
485 // CHECK1-NEXT: br label [[COND_END]]
486 // CHECK1: cond.end:
487 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
488 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
489 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
490 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
491 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
492 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
493 // CHECK1-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
494 // CHECK1-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
495 // CHECK1: omp.dispatch.body:
496 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
497 // CHECK1: omp.inner.for.cond:
498 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8:![0-9]+]]
499 // CHECK1-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP8]]
500 // CHECK1-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
501 // CHECK1-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
502 // CHECK1: omp.inner.for.body:
503 // CHECK1-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
504 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
505 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
506 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]
507 // CHECK1-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
508 // CHECK1-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP8]]
509 // CHECK1-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
510 // CHECK1-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
511 // CHECK1-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP8]]
512 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
513 // CHECK1: omp.body.continue:
514 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
515 // CHECK1: omp.inner.for.inc:
516 // CHECK1-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
517 // CHECK1-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
518 // CHECK1-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP8]]
519 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP9:![0-9]+]]
520 // CHECK1: omp.inner.for.end:
521 // CHECK1-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
522 // CHECK1: omp.dispatch.inc:
523 // CHECK1-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
524 // CHECK1-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
525 // CHECK1-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
526 // CHECK1-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
527 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
528 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
529 // CHECK1-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
530 // CHECK1-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
531 // CHECK1-NEXT: br label [[OMP_DISPATCH_COND]]
532 // CHECK1: omp.dispatch.end:
533 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
534 // CHECK1-NEXT: ret void
537 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
538 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
539 // CHECK1-NEXT: entry:
540 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
541 // CHECK1-NEXT: ret void
544 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
545 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
546 // CHECK3-NEXT: entry:
547 // CHECK3-NEXT: [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
548 // CHECK3-NEXT: [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
549 // CHECK3-NEXT: ret i32 [[CALL]]
552 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
553 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
554 // CHECK3-NEXT: entry:
555 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
556 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
557 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
558 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
559 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
560 // CHECK3-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
561 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4
562 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4
563 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4
564 // CHECK3-NEXT: [[_TMP6:%.*]] = alloca i32, align 4
565 // CHECK3-NEXT: [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
566 // CHECK3-NEXT: [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4
567 // CHECK3-NEXT: [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4
568 // CHECK3-NEXT: [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4
569 // CHECK3-NEXT: [[_TMP14:%.*]] = alloca i32, align 4
570 // CHECK3-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
571 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
572 // CHECK3-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
573 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
574 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
575 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP0]], align 4
576 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
577 // CHECK3-NEXT: store ptr [[A]], ptr [[TMP1]], align 4
578 // CHECK3-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
579 // CHECK3-NEXT: store ptr null, ptr [[TMP2]], align 4
580 // CHECK3-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
581 // CHECK3-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
582 // CHECK3-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
583 // CHECK3-NEXT: store i32 2, ptr [[TMP5]], align 4
584 // CHECK3-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
585 // CHECK3-NEXT: store i32 1, ptr [[TMP6]], align 4
586 // CHECK3-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
587 // CHECK3-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4
588 // CHECK3-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
589 // CHECK3-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4
590 // CHECK3-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
591 // CHECK3-NEXT: store ptr @.offload_sizes, ptr [[TMP9]], align 4
592 // CHECK3-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
593 // CHECK3-NEXT: store ptr @.offload_maptypes, ptr [[TMP10]], align 4
594 // CHECK3-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
595 // CHECK3-NEXT: store ptr null, ptr [[TMP11]], align 4
596 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
597 // CHECK3-NEXT: store ptr null, ptr [[TMP12]], align 4
598 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
599 // CHECK3-NEXT: store i64 123, ptr [[TMP13]], align 8
600 // CHECK3-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
601 // CHECK3-NEXT: store i64 0, ptr [[TMP14]], align 8
602 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
603 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
604 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
605 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
606 // CHECK3-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
607 // CHECK3-NEXT: store i32 0, ptr [[TMP17]], align 4
608 // CHECK3-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])
609 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
610 // CHECK3-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
611 // CHECK3: omp_offload.failed:
612 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]
613 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT]]
614 // CHECK3: omp_offload.cont:
615 // CHECK3-NEXT: [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
616 // CHECK3-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
617 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP20]], align 4
618 // CHECK3-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
619 // CHECK3-NEXT: store ptr [[A2]], ptr [[TMP21]], align 4
620 // CHECK3-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
621 // CHECK3-NEXT: store ptr null, ptr [[TMP22]], align 4
622 // CHECK3-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
623 // CHECK3-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
624 // CHECK3-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
625 // CHECK3-NEXT: store i32 2, ptr [[TMP25]], align 4
626 // CHECK3-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
627 // CHECK3-NEXT: store i32 1, ptr [[TMP26]], align 4
628 // CHECK3-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
629 // CHECK3-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4
630 // CHECK3-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
631 // CHECK3-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4
632 // CHECK3-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
633 // CHECK3-NEXT: store ptr @.offload_sizes.1, ptr [[TMP29]], align 4
634 // CHECK3-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
635 // CHECK3-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4
636 // CHECK3-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
637 // CHECK3-NEXT: store ptr null, ptr [[TMP31]], align 4
638 // CHECK3-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
639 // CHECK3-NEXT: store ptr null, ptr [[TMP32]], align 4
640 // CHECK3-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
641 // CHECK3-NEXT: store i64 123, ptr [[TMP33]], align 8
642 // CHECK3-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
643 // CHECK3-NEXT: store i64 0, ptr [[TMP34]], align 8
644 // CHECK3-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
645 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
646 // CHECK3-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
647 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
648 // CHECK3-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
649 // CHECK3-NEXT: store i32 0, ptr [[TMP37]], align 4
650 // CHECK3-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.region_id, ptr [[KERNEL_ARGS7]])
651 // CHECK3-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
652 // CHECK3-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
653 // CHECK3: omp_offload.failed8:
654 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32(ptr [[THIS1]]) #[[ATTR2]]
655 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT9]]
656 // CHECK3: omp_offload.cont9:
657 // CHECK3-NEXT: [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
658 // CHECK3-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
659 // CHECK3-NEXT: store ptr [[THIS1]], ptr [[TMP40]], align 4
660 // CHECK3-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
661 // CHECK3-NEXT: store ptr [[A10]], ptr [[TMP41]], align 4
662 // CHECK3-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
663 // CHECK3-NEXT: store ptr null, ptr [[TMP42]], align 4
664 // CHECK3-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
665 // CHECK3-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
666 // CHECK3-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
667 // CHECK3-NEXT: store i32 2, ptr [[TMP45]], align 4
668 // CHECK3-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
669 // CHECK3-NEXT: store i32 1, ptr [[TMP46]], align 4
670 // CHECK3-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
671 // CHECK3-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4
672 // CHECK3-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
673 // CHECK3-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4
674 // CHECK3-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
675 // CHECK3-NEXT: store ptr @.offload_sizes.3, ptr [[TMP49]], align 4
676 // CHECK3-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
677 // CHECK3-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4
678 // CHECK3-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
679 // CHECK3-NEXT: store ptr null, ptr [[TMP51]], align 4
680 // CHECK3-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
681 // CHECK3-NEXT: store ptr null, ptr [[TMP52]], align 4
682 // CHECK3-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
683 // CHECK3-NEXT: store i64 123, ptr [[TMP53]], align 8
684 // CHECK3-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
685 // CHECK3-NEXT: store i64 0, ptr [[TMP54]], align 8
686 // CHECK3-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
687 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
688 // CHECK3-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
689 // CHECK3-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
690 // CHECK3-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
691 // CHECK3-NEXT: store i32 0, ptr [[TMP57]], align 4
692 // CHECK3-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS15]])
693 // CHECK3-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
694 // CHECK3-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
695 // CHECK3: omp_offload.failed16:
696 // CHECK3-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2]]
697 // CHECK3-NEXT: br label [[OMP_OFFLOAD_CONT17]]
698 // CHECK3: omp_offload.cont17:
699 // CHECK3-NEXT: [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
700 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A18]], i32 0, i32 0
701 // CHECK3-NEXT: [[TMP60:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
702 // CHECK3-NEXT: ret i32 [[TMP60]]
705 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
706 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
707 // CHECK3-NEXT: entry:
708 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
709 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
710 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
711 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])
712 // CHECK3-NEXT: ret void
715 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined
716 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
717 // CHECK3-NEXT: entry:
718 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
719 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
720 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
721 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
722 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
723 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
724 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
725 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
726 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
727 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
728 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
729 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
730 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
731 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
732 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
733 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4
734 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
735 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
736 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
737 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
738 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
739 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
740 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
741 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
742 // CHECK3: cond.true:
743 // CHECK3-NEXT: br label [[COND_END:%.*]]
744 // CHECK3: cond.false:
745 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
746 // CHECK3-NEXT: br label [[COND_END]]
747 // CHECK3: cond.end:
748 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
749 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
750 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
751 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
752 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
753 // CHECK3: omp.inner.for.cond:
754 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
755 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
756 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
757 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
758 // CHECK3: omp.inner.for.body:
759 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
760 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
761 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
762 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
763 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
764 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
765 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP9]]
766 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
767 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
768 // CHECK3: omp.body.continue:
769 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
770 // CHECK3: omp.inner.for.inc:
771 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
772 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
773 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
774 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
775 // CHECK3: omp.inner.for.end:
776 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
777 // CHECK3: omp.loop.exit:
778 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
779 // CHECK3-NEXT: ret void
782 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32
783 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
784 // CHECK3-NEXT: entry:
785 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
786 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
787 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
788 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined, ptr [[TMP0]])
789 // CHECK3-NEXT: ret void
792 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l32.omp_outlined
793 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
794 // CHECK3-NEXT: entry:
795 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
796 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
797 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
798 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
799 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
800 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
801 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
802 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
803 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
804 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
805 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
806 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
807 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
808 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
809 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
810 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4
811 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
812 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
813 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
814 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
815 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
816 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
817 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
818 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
819 // CHECK3: cond.true:
820 // CHECK3-NEXT: br label [[COND_END:%.*]]
821 // CHECK3: cond.false:
822 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
823 // CHECK3-NEXT: br label [[COND_END]]
824 // CHECK3: cond.end:
825 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
826 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
827 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
828 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
829 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
830 // CHECK3: omp.inner.for.cond:
831 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
832 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
833 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
834 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
835 // CHECK3: omp.inner.for.body:
836 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
837 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
838 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
839 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
840 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
841 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
842 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP9]]
843 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
844 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
845 // CHECK3: omp.body.continue:
846 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
847 // CHECK3: omp.inner.for.inc:
848 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
849 // CHECK3-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
850 // CHECK3-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
851 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
852 // CHECK3: omp.inner.for.end:
853 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
854 // CHECK3: omp.loop.exit:
855 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
856 // CHECK3-NEXT: ret void
859 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
860 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
861 // CHECK3-NEXT: entry:
862 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
863 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
864 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
865 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]])
866 // CHECK3-NEXT: ret void
869 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined
870 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
871 // CHECK3-NEXT: entry:
872 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
873 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
874 // CHECK3-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
875 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
876 // CHECK3-NEXT: [[TMP:%.*]] = alloca i32, align 4
877 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
878 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
879 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
880 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
881 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
882 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
883 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
884 // CHECK3-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
885 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
886 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
887 // CHECK3-NEXT: store i32 122, ptr [[DOTOMP_UB]], align 4
888 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
889 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
890 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
891 // CHECK3-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
892 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
893 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
894 // CHECK3: omp.dispatch.cond:
895 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
896 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
897 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
898 // CHECK3: cond.true:
899 // CHECK3-NEXT: br label [[COND_END:%.*]]
900 // CHECK3: cond.false:
901 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
902 // CHECK3-NEXT: br label [[COND_END]]
903 // CHECK3: cond.end:
904 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
905 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
906 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
907 // CHECK3-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
908 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
909 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
910 // CHECK3-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
911 // CHECK3-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
912 // CHECK3: omp.dispatch.body:
913 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
914 // CHECK3: omp.inner.for.cond:
915 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9:![0-9]+]]
916 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP9]]
917 // CHECK3-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
918 // CHECK3-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
919 // CHECK3: omp.inner.for.body:
920 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
921 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
922 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
923 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
924 // CHECK3-NEXT: [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
925 // CHECK3-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP9]]
926 // CHECK3-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]
927 // CHECK3-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP9]]
928 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
929 // CHECK3: omp.body.continue:
930 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
931 // CHECK3: omp.inner.for.inc:
932 // CHECK3-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
933 // CHECK3-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
934 // CHECK3-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP9]]
935 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP10:![0-9]+]]
936 // CHECK3: omp.inner.for.end:
937 // CHECK3-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
938 // CHECK3: omp.dispatch.inc:
939 // CHECK3-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
940 // CHECK3-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
941 // CHECK3-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
942 // CHECK3-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
943 // CHECK3-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
944 // CHECK3-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
945 // CHECK3-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
946 // CHECK3-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
947 // CHECK3-NEXT: br label [[OMP_DISPATCH_COND]]
948 // CHECK3: omp.dispatch.end:
949 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
950 // CHECK3-NEXT: ret void
953 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
954 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
955 // CHECK3-NEXT: entry:
956 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
957 // CHECK3-NEXT: ret void
960 // CHECK9-LABEL: define {{[^@]+}}@main
961 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
962 // CHECK9-NEXT: entry:
963 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
964 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
965 // CHECK9-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 8
966 // CHECK9-NEXT: [[N:%.*]] = alloca i32, align 4
967 // CHECK9-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 8
968 // CHECK9-NEXT: [[__VLA_EXPR0:%.*]] = alloca i64, align 8
969 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
970 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8
971 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8
972 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8
973 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
974 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
975 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
976 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
977 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
978 // CHECK9-NEXT: [[N_CASTED3:%.*]] = alloca i64, align 8
979 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8
980 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8
981 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8
982 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8
983 // CHECK9-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
984 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
985 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
986 // CHECK9-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
987 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
988 // CHECK9-NEXT: [[N_CASTED19:%.*]] = alloca i64, align 8
989 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
990 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 8
991 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 8
992 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 8
993 // CHECK9-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 8
994 // CHECK9-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
995 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
996 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
997 // CHECK9-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
998 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4
999 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
1000 // CHECK9-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
1001 // CHECK9-NEXT: store i32 100, ptr [[N]], align 4
1002 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4
1003 // CHECK9-NEXT: [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
1004 // CHECK9-NEXT: [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
1005 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
1006 // CHECK9-NEXT: [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
1007 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
1008 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[N]], align 4
1009 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[N_CASTED]], align 4
1010 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
1011 // CHECK9-NEXT: [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
1012 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false)
1013 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1014 // CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP6]], align 8
1015 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1016 // CHECK9-NEXT: store i64 [[TMP4]], ptr [[TMP7]], align 8
1017 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1018 // CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8
1019 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1020 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP9]], align 8
1021 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1022 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP10]], align 8
1023 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
1024 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8
1025 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1026 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 8
1027 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1028 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 8
1029 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
1030 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 8
1031 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
1032 // CHECK9-NEXT: store ptr null, ptr [[TMP15]], align 8
1033 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1034 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1035 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
1036 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4
1037 // CHECK9-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
1038 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1039 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
1040 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1041 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1042 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1043 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1044 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
1045 // CHECK9-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64
1046 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1047 // CHECK9-NEXT: store i32 2, ptr [[TMP23]], align 4
1048 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1049 // CHECK9-NEXT: store i32 3, ptr [[TMP24]], align 4
1050 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1051 // CHECK9-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 8
1052 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1053 // CHECK9-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 8
1054 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1055 // CHECK9-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 8
1056 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1057 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8
1058 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1059 // CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8
1060 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1061 // CHECK9-NEXT: store ptr null, ptr [[TMP30]], align 8
1062 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1063 // CHECK9-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8
1064 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1065 // CHECK9-NEXT: store i64 0, ptr [[TMP32]], align 8
1066 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1067 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
1068 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1069 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
1070 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1071 // CHECK9-NEXT: store i32 0, ptr [[TMP35]], align 4
1072 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]])
1073 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1074 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1075 // CHECK9: omp_offload.failed:
1076 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]
1077 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1078 // CHECK9: omp_offload.cont:
1079 // CHECK9-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4
1080 // CHECK9-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
1081 // CHECK9-NEXT: [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8
1082 // CHECK9-NEXT: [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4
1083 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false)
1084 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
1085 // CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP41]], align 8
1086 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
1087 // CHECK9-NEXT: store i64 [[TMP39]], ptr [[TMP42]], align 8
1088 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
1089 // CHECK9-NEXT: store ptr null, ptr [[TMP43]], align 8
1090 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
1091 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP44]], align 8
1092 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
1093 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP45]], align 8
1094 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
1095 // CHECK9-NEXT: store ptr null, ptr [[TMP46]], align 8
1096 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
1097 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP47]], align 8
1098 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
1099 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 8
1100 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
1101 // CHECK9-NEXT: store i64 [[TMP40]], ptr [[TMP49]], align 8
1102 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2
1103 // CHECK9-NEXT: store ptr null, ptr [[TMP50]], align 8
1104 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
1105 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
1106 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
1107 // CHECK9-NEXT: [[TMP54:%.*]] = load i32, ptr [[N]], align 4
1108 // CHECK9-NEXT: store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4
1109 // CHECK9-NEXT: [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
1110 // CHECK9-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0
1111 // CHECK9-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
1112 // CHECK9-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
1113 // CHECK9-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
1114 // CHECK9-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
1115 // CHECK9-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1
1116 // CHECK9-NEXT: [[TMP57:%.*]] = zext i32 [[ADD14]] to i64
1117 // CHECK9-NEXT: [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
1118 // CHECK9-NEXT: store i32 2, ptr [[TMP58]], align 4
1119 // CHECK9-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
1120 // CHECK9-NEXT: store i32 3, ptr [[TMP59]], align 4
1121 // CHECK9-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
1122 // CHECK9-NEXT: store ptr [[TMP51]], ptr [[TMP60]], align 8
1123 // CHECK9-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
1124 // CHECK9-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 8
1125 // CHECK9-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
1126 // CHECK9-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 8
1127 // CHECK9-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
1128 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8
1129 // CHECK9-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
1130 // CHECK9-NEXT: store ptr null, ptr [[TMP64]], align 8
1131 // CHECK9-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
1132 // CHECK9-NEXT: store ptr null, ptr [[TMP65]], align 8
1133 // CHECK9-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
1134 // CHECK9-NEXT: store i64 [[TMP57]], ptr [[TMP66]], align 8
1135 // CHECK9-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
1136 // CHECK9-NEXT: store i64 0, ptr [[TMP67]], align 8
1137 // CHECK9-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
1138 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4
1139 // CHECK9-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
1140 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
1141 // CHECK9-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
1142 // CHECK9-NEXT: store i32 0, ptr [[TMP70]], align 4
1143 // CHECK9-NEXT: [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, ptr [[KERNEL_ARGS15]])
1144 // CHECK9-NEXT: [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0
1145 // CHECK9-NEXT: br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
1146 // CHECK9: omp_offload.failed16:
1147 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]
1148 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT17]]
1149 // CHECK9: omp_offload.cont17:
1150 // CHECK9-NEXT: [[TMP73:%.*]] = load i32, ptr [[N]], align 4
1151 // CHECK9-NEXT: store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_18]], align 4
1152 // CHECK9-NEXT: [[TMP74:%.*]] = load i32, ptr [[N]], align 4
1153 // CHECK9-NEXT: store i32 [[TMP74]], ptr [[N_CASTED19]], align 4
1154 // CHECK9-NEXT: [[TMP75:%.*]] = load i64, ptr [[N_CASTED19]], align 8
1155 // CHECK9-NEXT: [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4
1156 // CHECK9-NEXT: store i32 [[TMP76]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
1157 // CHECK9-NEXT: [[TMP77:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
1158 // CHECK9-NEXT: [[TMP78:%.*]] = mul nuw i64 [[TMP1]], 4
1159 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES23]], ptr align 8 @.offload_sizes.3, i64 32, i1 false)
1160 // CHECK9-NEXT: [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
1161 // CHECK9-NEXT: store i64 [[TMP75]], ptr [[TMP79]], align 8
1162 // CHECK9-NEXT: [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
1163 // CHECK9-NEXT: store i64 [[TMP75]], ptr [[TMP80]], align 8
1164 // CHECK9-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0
1165 // CHECK9-NEXT: store ptr null, ptr [[TMP81]], align 8
1166 // CHECK9-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
1167 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP82]], align 8
1168 // CHECK9-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
1169 // CHECK9-NEXT: store i64 [[TMP1]], ptr [[TMP83]], align 8
1170 // CHECK9-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1
1171 // CHECK9-NEXT: store ptr null, ptr [[TMP84]], align 8
1172 // CHECK9-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
1173 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP85]], align 8
1174 // CHECK9-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
1175 // CHECK9-NEXT: store ptr [[VLA]], ptr [[TMP86]], align 8
1176 // CHECK9-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
1177 // CHECK9-NEXT: store i64 [[TMP78]], ptr [[TMP87]], align 8
1178 // CHECK9-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2
1179 // CHECK9-NEXT: store ptr null, ptr [[TMP88]], align 8
1180 // CHECK9-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
1181 // CHECK9-NEXT: store i64 [[TMP77]], ptr [[TMP89]], align 8
1182 // CHECK9-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
1183 // CHECK9-NEXT: store i64 [[TMP77]], ptr [[TMP90]], align 8
1184 // CHECK9-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3
1185 // CHECK9-NEXT: store ptr null, ptr [[TMP91]], align 8
1186 // CHECK9-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
1187 // CHECK9-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
1188 // CHECK9-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
1189 // CHECK9-NEXT: [[TMP95:%.*]] = load i32, ptr [[N]], align 4
1190 // CHECK9-NEXT: store i32 [[TMP95]], ptr [[DOTCAPTURE_EXPR_25]], align 4
1191 // CHECK9-NEXT: [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
1192 // CHECK9-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP96]], 0
1193 // CHECK9-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
1194 // CHECK9-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
1195 // CHECK9-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4
1196 // CHECK9-NEXT: [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4
1197 // CHECK9-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP97]], 1
1198 // CHECK9-NEXT: [[TMP98:%.*]] = zext i32 [[ADD30]] to i64
1199 // CHECK9-NEXT: [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
1200 // CHECK9-NEXT: store i32 2, ptr [[TMP99]], align 4
1201 // CHECK9-NEXT: [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
1202 // CHECK9-NEXT: store i32 4, ptr [[TMP100]], align 4
1203 // CHECK9-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
1204 // CHECK9-NEXT: store ptr [[TMP92]], ptr [[TMP101]], align 8
1205 // CHECK9-NEXT: [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
1206 // CHECK9-NEXT: store ptr [[TMP93]], ptr [[TMP102]], align 8
1207 // CHECK9-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
1208 // CHECK9-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 8
1209 // CHECK9-NEXT: [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
1210 // CHECK9-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP104]], align 8
1211 // CHECK9-NEXT: [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
1212 // CHECK9-NEXT: store ptr null, ptr [[TMP105]], align 8
1213 // CHECK9-NEXT: [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
1214 // CHECK9-NEXT: store ptr null, ptr [[TMP106]], align 8
1215 // CHECK9-NEXT: [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
1216 // CHECK9-NEXT: store i64 [[TMP98]], ptr [[TMP107]], align 8
1217 // CHECK9-NEXT: [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
1218 // CHECK9-NEXT: store i64 0, ptr [[TMP108]], align 8
1219 // CHECK9-NEXT: [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
1220 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4
1221 // CHECK9-NEXT: [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
1222 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP110]], align 4
1223 // CHECK9-NEXT: [[TMP111:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
1224 // CHECK9-NEXT: store i32 0, ptr [[TMP111]], align 4
1225 // CHECK9-NEXT: [[TMP112:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS31]])
1226 // CHECK9-NEXT: [[TMP113:%.*]] = icmp ne i32 [[TMP112]], 0
1227 // CHECK9-NEXT: br i1 [[TMP113]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
1228 // CHECK9: omp_offload.failed32:
1229 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i64 [[TMP75]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP77]]) #[[ATTR3]]
1230 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT33]]
1231 // CHECK9: omp_offload.cont33:
1232 // CHECK9-NEXT: [[TMP114:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
1233 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP114]])
1234 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
1235 // CHECK9-NEXT: [[TMP115:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
1236 // CHECK9-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP115]])
1237 // CHECK9-NEXT: [[TMP116:%.*]] = load i32, ptr [[RETVAL]], align 4
1238 // CHECK9-NEXT: ret i32 [[TMP116]]
1241 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
1242 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1243 // CHECK9-NEXT: entry:
1244 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1245 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1246 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1247 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1248 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1249 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1250 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1251 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1252 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1253 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
1254 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4
1255 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
1256 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]])
1257 // CHECK9-NEXT: ret void
1260 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined
1261 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1262 // CHECK9-NEXT: entry:
1263 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1264 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1265 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1266 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1267 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1268 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1269 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1270 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1271 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1272 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1273 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1274 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1275 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1276 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1277 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
1278 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1279 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1280 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1281 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1282 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1283 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1284 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1285 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
1286 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
1287 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1288 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1289 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1290 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1291 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1292 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4
1293 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1294 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1295 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1296 // CHECK9: omp.precond.then:
1297 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1298 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1299 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
1300 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1301 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1302 // CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1303 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1304 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1305 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1306 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1307 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1308 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1309 // CHECK9: cond.true:
1310 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1311 // CHECK9-NEXT: br label [[COND_END:%.*]]
1312 // CHECK9: cond.false:
1313 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1314 // CHECK9-NEXT: br label [[COND_END]]
1315 // CHECK9: cond.end:
1316 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1317 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1318 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1319 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
1320 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1321 // CHECK9: omp.inner.for.cond:
1322 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1323 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1324 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1325 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1326 // CHECK9: omp.inner.for.body:
1327 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1328 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1329 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1330 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I3]], align 4
1331 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[I3]], align 4
1332 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1333 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
1334 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
1335 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1336 // CHECK9: omp.body.continue:
1337 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1338 // CHECK9: omp.inner.for.inc:
1339 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1340 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1341 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
1342 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1343 // CHECK9: omp.inner.for.end:
1344 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1345 // CHECK9: omp.loop.exit:
1346 // CHECK9-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1347 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
1348 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])
1349 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1350 // CHECK9: omp.precond.end:
1351 // CHECK9-NEXT: ret void
1354 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
1355 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1356 // CHECK9-NEXT: entry:
1357 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1358 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1359 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1360 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1361 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1362 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1363 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1364 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1365 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1366 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
1367 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4
1368 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
1369 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]])
1370 // CHECK9-NEXT: ret void
1373 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined
1374 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
1375 // CHECK9-NEXT: entry:
1376 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1377 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1378 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1379 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1380 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1381 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1382 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1383 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1384 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1385 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1386 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1387 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1388 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1389 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1390 // CHECK9-NEXT: [[I3:%.*]] = alloca i32, align 4
1391 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1392 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1393 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1394 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1395 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1396 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1397 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1398 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
1399 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
1400 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1401 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1402 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1403 // CHECK9-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
1404 // CHECK9-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1405 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4
1406 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1407 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1408 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1409 // CHECK9: omp.precond.then:
1410 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1411 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1412 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
1413 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1414 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1415 // CHECK9-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1416 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
1417 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1418 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1419 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1420 // CHECK9-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
1421 // CHECK9-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1422 // CHECK9: cond.true:
1423 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1424 // CHECK9-NEXT: br label [[COND_END:%.*]]
1425 // CHECK9: cond.false:
1426 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1427 // CHECK9-NEXT: br label [[COND_END]]
1428 // CHECK9: cond.end:
1429 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
1430 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1431 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1432 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
1433 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1434 // CHECK9: omp.inner.for.cond:
1435 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1436 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1437 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
1438 // CHECK9-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1439 // CHECK9: omp.inner.for.body:
1440 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1441 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
1442 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1443 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I3]], align 4
1444 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[I3]], align 4
1445 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
1446 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
1447 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
1448 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1449 // CHECK9: omp.body.continue:
1450 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1451 // CHECK9: omp.inner.for.inc:
1452 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1453 // CHECK9-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
1454 // CHECK9-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
1455 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1456 // CHECK9: omp.inner.for.end:
1457 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1458 // CHECK9: omp.loop.exit:
1459 // CHECK9-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1460 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
1461 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])
1462 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1463 // CHECK9: omp.precond.end:
1464 // CHECK9-NEXT: ret void
1467 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
1468 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
1469 // CHECK9-NEXT: entry:
1470 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1471 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1472 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1473 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1474 // CHECK9-NEXT: [[N_CASTED:%.*]] = alloca i64, align 8
1475 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
1476 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1477 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1478 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1479 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
1480 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1481 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1482 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
1483 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4
1484 // CHECK9-NEXT: [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
1485 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
1486 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
1487 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
1488 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]])
1489 // CHECK9-NEXT: ret void
1492 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined
1493 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
1494 // CHECK9-NEXT: entry:
1495 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1496 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1497 // CHECK9-NEXT: [[N_ADDR:%.*]] = alloca i64, align 8
1498 // CHECK9-NEXT: [[VLA_ADDR:%.*]] = alloca i64, align 8
1499 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1500 // CHECK9-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
1501 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1502 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1503 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
1504 // CHECK9-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
1505 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1506 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1507 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1508 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1509 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1510 // CHECK9-NEXT: [[I4:%.*]] = alloca i32, align 4
1511 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1512 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1513 // CHECK9-NEXT: store i64 [[N]], ptr [[N_ADDR]], align 8
1514 // CHECK9-NEXT: store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
1515 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1516 // CHECK9-NEXT: store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
1517 // CHECK9-NEXT: [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
1518 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1519 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
1520 // CHECK9-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
1521 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1522 // CHECK9-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
1523 // CHECK9-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1524 // CHECK9-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
1525 // CHECK9-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
1526 // CHECK9-NEXT: store i32 0, ptr [[I]], align 4
1527 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
1528 // CHECK9-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
1529 // CHECK9-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
1530 // CHECK9: omp.precond.then:
1531 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1532 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1533 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
1534 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1535 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1536 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
1537 // CHECK9-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1538 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
1539 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
1540 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1541 // CHECK9: omp.dispatch.cond:
1542 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1543 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1544 // CHECK9-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
1545 // CHECK9-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1546 // CHECK9: cond.true:
1547 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
1548 // CHECK9-NEXT: br label [[COND_END:%.*]]
1549 // CHECK9: cond.false:
1550 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1551 // CHECK9-NEXT: br label [[COND_END]]
1552 // CHECK9: cond.end:
1553 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
1554 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1555 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1556 // CHECK9-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
1557 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1558 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1559 // CHECK9-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
1560 // CHECK9-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1561 // CHECK9: omp.dispatch.body:
1562 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1563 // CHECK9: omp.inner.for.cond:
1564 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
1565 // CHECK9-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
1566 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
1567 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1568 // CHECK9: omp.inner.for.body:
1569 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1570 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
1571 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1572 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP11]]
1573 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP11]]
1574 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
1575 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
1576 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]
1577 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1578 // CHECK9: omp.body.continue:
1579 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1580 // CHECK9: omp.inner.for.inc:
1581 // CHECK9-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1582 // CHECK9-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
1583 // CHECK9-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
1584 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
1585 // CHECK9: omp.inner.for.end:
1586 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1587 // CHECK9: omp.dispatch.inc:
1588 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1589 // CHECK9-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1590 // CHECK9-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
1591 // CHECK9-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 4
1592 // CHECK9-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1593 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1594 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
1595 // CHECK9-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 4
1596 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
1597 // CHECK9: omp.dispatch.end:
1598 // CHECK9-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1599 // CHECK9-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
1600 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])
1601 // CHECK9-NEXT: br label [[OMP_PRECOND_END]]
1602 // CHECK9: omp.precond.end:
1603 // CHECK9-NEXT: ret void
1606 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
1607 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
1608 // CHECK9-NEXT: entry:
1609 // CHECK9-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
1610 // CHECK9-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
1611 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
1612 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
1613 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
1614 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1615 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1616 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8
1617 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8
1618 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8
1619 // CHECK9-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
1620 // CHECK9-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1621 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 8
1622 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 8
1623 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 8
1624 // CHECK9-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
1625 // CHECK9-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1626 // CHECK9-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
1627 // CHECK9-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1628 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP0]], align 8
1629 // CHECK9-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1630 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP1]], align 8
1631 // CHECK9-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
1632 // CHECK9-NEXT: store ptr null, ptr [[TMP2]], align 8
1633 // CHECK9-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1634 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1635 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1636 // CHECK9-NEXT: store i32 2, ptr [[TMP5]], align 4
1637 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1638 // CHECK9-NEXT: store i32 1, ptr [[TMP6]], align 4
1639 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1640 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 8
1641 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1642 // CHECK9-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 8
1643 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1644 // CHECK9-NEXT: store ptr @.offload_sizes.5, ptr [[TMP9]], align 8
1645 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1646 // CHECK9-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP10]], align 8
1647 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1648 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8
1649 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1650 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8
1651 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1652 // CHECK9-NEXT: store i64 10, ptr [[TMP13]], align 8
1653 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1654 // CHECK9-NEXT: store i64 0, ptr [[TMP14]], align 8
1655 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1656 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
1657 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1658 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
1659 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1660 // CHECK9-NEXT: store i32 0, ptr [[TMP17]], align 4
1661 // CHECK9-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, ptr [[KERNEL_ARGS]])
1662 // CHECK9-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1663 // CHECK9-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1664 // CHECK9: omp_offload.failed:
1665 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76(ptr [[A]]) #[[ATTR3]]
1666 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
1667 // CHECK9: omp_offload.cont:
1668 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
1669 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP20]], align 8
1670 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
1671 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP21]], align 8
1672 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
1673 // CHECK9-NEXT: store ptr null, ptr [[TMP22]], align 8
1674 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
1675 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
1676 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
1677 // CHECK9-NEXT: store i32 2, ptr [[TMP25]], align 4
1678 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
1679 // CHECK9-NEXT: store i32 1, ptr [[TMP26]], align 4
1680 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
1681 // CHECK9-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 8
1682 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
1683 // CHECK9-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 8
1684 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
1685 // CHECK9-NEXT: store ptr @.offload_sizes.7, ptr [[TMP29]], align 8
1686 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
1687 // CHECK9-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP30]], align 8
1688 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
1689 // CHECK9-NEXT: store ptr null, ptr [[TMP31]], align 8
1690 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
1691 // CHECK9-NEXT: store ptr null, ptr [[TMP32]], align 8
1692 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
1693 // CHECK9-NEXT: store i64 10, ptr [[TMP33]], align 8
1694 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
1695 // CHECK9-NEXT: store i64 0, ptr [[TMP34]], align 8
1696 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
1697 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
1698 // CHECK9-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
1699 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
1700 // CHECK9-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
1701 // CHECK9-NEXT: store i32 0, ptr [[TMP37]], align 4
1702 // CHECK9-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, ptr [[KERNEL_ARGS5]])
1703 // CHECK9-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
1704 // CHECK9-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
1705 // CHECK9: omp_offload.failed6:
1706 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80(ptr [[A]]) #[[ATTR3]]
1707 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT7]]
1708 // CHECK9: omp_offload.cont7:
1709 // CHECK9-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
1710 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP40]], align 8
1711 // CHECK9-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
1712 // CHECK9-NEXT: store ptr [[A]], ptr [[TMP41]], align 8
1713 // CHECK9-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
1714 // CHECK9-NEXT: store ptr null, ptr [[TMP42]], align 8
1715 // CHECK9-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
1716 // CHECK9-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
1717 // CHECK9-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
1718 // CHECK9-NEXT: store i32 2, ptr [[TMP45]], align 4
1719 // CHECK9-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
1720 // CHECK9-NEXT: store i32 1, ptr [[TMP46]], align 4
1721 // CHECK9-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
1722 // CHECK9-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 8
1723 // CHECK9-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
1724 // CHECK9-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 8
1725 // CHECK9-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
1726 // CHECK9-NEXT: store ptr @.offload_sizes.9, ptr [[TMP49]], align 8
1727 // CHECK9-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
1728 // CHECK9-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP50]], align 8
1729 // CHECK9-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
1730 // CHECK9-NEXT: store ptr null, ptr [[TMP51]], align 8
1731 // CHECK9-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
1732 // CHECK9-NEXT: store ptr null, ptr [[TMP52]], align 8
1733 // CHECK9-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
1734 // CHECK9-NEXT: store i64 10, ptr [[TMP53]], align 8
1735 // CHECK9-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
1736 // CHECK9-NEXT: store i64 0, ptr [[TMP54]], align 8
1737 // CHECK9-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
1738 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
1739 // CHECK9-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
1740 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
1741 // CHECK9-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
1742 // CHECK9-NEXT: store i32 0, ptr [[TMP57]], align 4
1743 // CHECK9-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, ptr [[KERNEL_ARGS12]])
1744 // CHECK9-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
1745 // CHECK9-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
1746 // CHECK9: omp_offload.failed13:
1747 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84(ptr [[A]]) #[[ATTR3]]
1748 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT14]]
1749 // CHECK9: omp_offload.cont14:
1750 // CHECK9-NEXT: ret i32 0
1753 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
1754 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1755 // CHECK9-NEXT: entry:
1756 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1757 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1758 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1759 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined, ptr [[TMP0]])
1760 // CHECK9-NEXT: ret void
1763 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined
1764 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1765 // CHECK9-NEXT: entry:
1766 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1767 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1768 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1769 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1770 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1771 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1772 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1773 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1774 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1775 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1776 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1777 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1778 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1779 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1780 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1781 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
1782 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1783 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1784 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1785 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1786 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1787 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1788 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
1789 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1790 // CHECK9: cond.true:
1791 // CHECK9-NEXT: br label [[COND_END:%.*]]
1792 // CHECK9: cond.false:
1793 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1794 // CHECK9-NEXT: br label [[COND_END]]
1795 // CHECK9: cond.end:
1796 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1797 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1798 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1799 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1800 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1801 // CHECK9: omp.inner.for.cond:
1802 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1803 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1804 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1805 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1806 // CHECK9: omp.inner.for.body:
1807 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1808 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1809 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1810 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1811 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
1812 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
1813 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
1814 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
1815 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1816 // CHECK9: omp.body.continue:
1817 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1818 // CHECK9: omp.inner.for.inc:
1819 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1820 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1821 // CHECK9-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
1822 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1823 // CHECK9: omp.inner.for.end:
1824 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1825 // CHECK9: omp.loop.exit:
1826 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1827 // CHECK9-NEXT: ret void
1830 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
1831 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1832 // CHECK9-NEXT: entry:
1833 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1834 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1835 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1836 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined, ptr [[TMP0]])
1837 // CHECK9-NEXT: ret void
1840 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined
1841 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1842 // CHECK9-NEXT: entry:
1843 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1844 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1845 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1846 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1847 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1848 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1849 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1850 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1851 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1852 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1853 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1854 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1855 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1856 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1857 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1858 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
1859 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1860 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1861 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1862 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1863 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1864 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1865 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
1866 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1867 // CHECK9: cond.true:
1868 // CHECK9-NEXT: br label [[COND_END:%.*]]
1869 // CHECK9: cond.false:
1870 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1871 // CHECK9-NEXT: br label [[COND_END]]
1872 // CHECK9: cond.end:
1873 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1874 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1875 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1876 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1877 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1878 // CHECK9: omp.inner.for.cond:
1879 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1880 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1881 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1882 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1883 // CHECK9: omp.inner.for.body:
1884 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1885 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
1886 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1887 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1888 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
1889 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP9]] to i64
1890 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
1891 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
1892 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1893 // CHECK9: omp.body.continue:
1894 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1895 // CHECK9: omp.inner.for.inc:
1896 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1897 // CHECK9-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
1898 // CHECK9-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
1899 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1900 // CHECK9: omp.inner.for.end:
1901 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1902 // CHECK9: omp.loop.exit:
1903 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1904 // CHECK9-NEXT: ret void
1907 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
1908 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1909 // CHECK9-NEXT: entry:
1910 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1911 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1912 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1913 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined, ptr [[TMP0]])
1914 // CHECK9-NEXT: ret void
1917 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined
1918 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
1919 // CHECK9-NEXT: entry:
1920 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1921 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1922 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 8
1923 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1924 // CHECK9-NEXT: [[TMP:%.*]] = alloca i32, align 4
1925 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1926 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1927 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1928 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1929 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1930 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1931 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1932 // CHECK9-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 8
1933 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1934 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1935 // CHECK9-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
1936 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1937 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1938 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1939 // CHECK9-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1940 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 10)
1941 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
1942 // CHECK9: omp.dispatch.cond:
1943 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1944 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
1945 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1946 // CHECK9: cond.true:
1947 // CHECK9-NEXT: br label [[COND_END:%.*]]
1948 // CHECK9: cond.false:
1949 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1950 // CHECK9-NEXT: br label [[COND_END]]
1951 // CHECK9: cond.end:
1952 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1953 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1954 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1955 // CHECK9-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1956 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1957 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1958 // CHECK9-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1959 // CHECK9-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1960 // CHECK9: omp.dispatch.body:
1961 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1962 // CHECK9: omp.inner.for.cond:
1963 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
1964 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
1965 // CHECK9-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1966 // CHECK9-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1967 // CHECK9: omp.inner.for.body:
1968 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1969 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1970 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1971 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
1972 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
1973 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
1974 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
1975 // CHECK9-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]]
1976 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1977 // CHECK9: omp.body.continue:
1978 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1979 // CHECK9: omp.inner.for.inc:
1980 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1981 // CHECK9-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
1982 // CHECK9-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
1983 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
1984 // CHECK9: omp.inner.for.end:
1985 // CHECK9-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
1986 // CHECK9: omp.dispatch.inc:
1987 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1988 // CHECK9-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1989 // CHECK9-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1990 // CHECK9-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
1991 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1992 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1993 // CHECK9-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
1994 // CHECK9-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
1995 // CHECK9-NEXT: br label [[OMP_DISPATCH_COND]]
1996 // CHECK9: omp.dispatch.end:
1997 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1998 // CHECK9-NEXT: ret void
2001 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2002 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
2003 // CHECK9-NEXT: entry:
2004 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
2005 // CHECK9-NEXT: ret void
2008 // CHECK11-LABEL: define {{[^@]+}}@main
2009 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
2010 // CHECK11-NEXT: entry:
2011 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
2012 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2013 // CHECK11-NEXT: [[ARGV_ADDR:%.*]] = alloca ptr, align 4
2014 // CHECK11-NEXT: [[N:%.*]] = alloca i32, align 4
2015 // CHECK11-NEXT: [[SAVED_STACK:%.*]] = alloca ptr, align 4
2016 // CHECK11-NEXT: [[__VLA_EXPR0:%.*]] = alloca i32, align 4
2017 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2018 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4
2019 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4
2020 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4
2021 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
2022 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2023 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2024 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2025 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2026 // CHECK11-NEXT: [[N_CASTED3:%.*]] = alloca i32, align 4
2027 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4
2028 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4
2029 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4
2030 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
2031 // CHECK11-NEXT: [[_TMP8:%.*]] = alloca i32, align 4
2032 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
2033 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
2034 // CHECK11-NEXT: [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2035 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
2036 // CHECK11-NEXT: [[N_CASTED19:%.*]] = alloca i32, align 4
2037 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
2038 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 4
2039 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 4
2040 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 4
2041 // CHECK11-NEXT: [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4
2042 // CHECK11-NEXT: [[_TMP24:%.*]] = alloca i32, align 4
2043 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
2044 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
2045 // CHECK11-NEXT: [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2046 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4
2047 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
2048 // CHECK11-NEXT: store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4
2049 // CHECK11-NEXT: store i32 100, ptr [[N]], align 4
2050 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[N]], align 4
2051 // CHECK11-NEXT: [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()
2052 // CHECK11-NEXT: store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4
2053 // CHECK11-NEXT: [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
2054 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4
2055 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N]], align 4
2056 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4
2057 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
2058 // CHECK11-NEXT: [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
2059 // CHECK11-NEXT: [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
2060 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false)
2061 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2062 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP6]], align 4
2063 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2064 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[TMP7]], align 4
2065 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2066 // CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 4
2067 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
2068 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP9]], align 4
2069 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
2070 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP10]], align 4
2071 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
2072 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4
2073 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
2074 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP12]], align 4
2075 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
2076 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP13]], align 4
2077 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
2078 // CHECK11-NEXT: store i64 [[TMP5]], ptr [[TMP14]], align 4
2079 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
2080 // CHECK11-NEXT: store ptr null, ptr [[TMP15]], align 4
2081 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2082 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2083 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
2084 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[N]], align 4
2085 // CHECK11-NEXT: store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
2086 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2087 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
2088 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2089 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2090 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2091 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2092 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
2093 // CHECK11-NEXT: [[TMP22:%.*]] = zext i32 [[ADD]] to i64
2094 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2095 // CHECK11-NEXT: store i32 2, ptr [[TMP23]], align 4
2096 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2097 // CHECK11-NEXT: store i32 3, ptr [[TMP24]], align 4
2098 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2099 // CHECK11-NEXT: store ptr [[TMP16]], ptr [[TMP25]], align 4
2100 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2101 // CHECK11-NEXT: store ptr [[TMP17]], ptr [[TMP26]], align 4
2102 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2103 // CHECK11-NEXT: store ptr [[TMP18]], ptr [[TMP27]], align 4
2104 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2105 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4
2106 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2107 // CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 4
2108 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2109 // CHECK11-NEXT: store ptr null, ptr [[TMP30]], align 4
2110 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2111 // CHECK11-NEXT: store i64 [[TMP22]], ptr [[TMP31]], align 8
2112 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2113 // CHECK11-NEXT: store i64 0, ptr [[TMP32]], align 8
2114 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2115 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
2116 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2117 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
2118 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2119 // CHECK11-NEXT: store i32 0, ptr [[TMP35]], align 4
2120 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]])
2121 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
2122 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2123 // CHECK11: omp_offload.failed:
2124 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]
2125 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2126 // CHECK11: omp_offload.cont:
2127 // CHECK11-NEXT: [[TMP38:%.*]] = load i32, ptr [[N]], align 4
2128 // CHECK11-NEXT: store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
2129 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4
2130 // CHECK11-NEXT: [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4
2131 // CHECK11-NEXT: [[TMP41:%.*]] = sext i32 [[TMP40]] to i64
2132 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false)
2133 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2134 // CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP42]], align 4
2135 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2136 // CHECK11-NEXT: store i32 [[TMP39]], ptr [[TMP43]], align 4
2137 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
2138 // CHECK11-NEXT: store ptr null, ptr [[TMP44]], align 4
2139 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
2140 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP45]], align 4
2141 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
2142 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP46]], align 4
2143 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
2144 // CHECK11-NEXT: store ptr null, ptr [[TMP47]], align 4
2145 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
2146 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP48]], align 4
2147 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
2148 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP49]], align 4
2149 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
2150 // CHECK11-NEXT: store i64 [[TMP41]], ptr [[TMP50]], align 4
2151 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
2152 // CHECK11-NEXT: store ptr null, ptr [[TMP51]], align 4
2153 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
2154 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
2155 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
2156 // CHECK11-NEXT: [[TMP55:%.*]] = load i32, ptr [[N]], align 4
2157 // CHECK11-NEXT: store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4
2158 // CHECK11-NEXT: [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
2159 // CHECK11-NEXT: [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0
2160 // CHECK11-NEXT: [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
2161 // CHECK11-NEXT: [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
2162 // CHECK11-NEXT: store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
2163 // CHECK11-NEXT: [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
2164 // CHECK11-NEXT: [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1
2165 // CHECK11-NEXT: [[TMP58:%.*]] = zext i32 [[ADD14]] to i64
2166 // CHECK11-NEXT: [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
2167 // CHECK11-NEXT: store i32 2, ptr [[TMP59]], align 4
2168 // CHECK11-NEXT: [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
2169 // CHECK11-NEXT: store i32 3, ptr [[TMP60]], align 4
2170 // CHECK11-NEXT: [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
2171 // CHECK11-NEXT: store ptr [[TMP52]], ptr [[TMP61]], align 4
2172 // CHECK11-NEXT: [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
2173 // CHECK11-NEXT: store ptr [[TMP53]], ptr [[TMP62]], align 4
2174 // CHECK11-NEXT: [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
2175 // CHECK11-NEXT: store ptr [[TMP54]], ptr [[TMP63]], align 4
2176 // CHECK11-NEXT: [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
2177 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4
2178 // CHECK11-NEXT: [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
2179 // CHECK11-NEXT: store ptr null, ptr [[TMP65]], align 4
2180 // CHECK11-NEXT: [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
2181 // CHECK11-NEXT: store ptr null, ptr [[TMP66]], align 4
2182 // CHECK11-NEXT: [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
2183 // CHECK11-NEXT: store i64 [[TMP58]], ptr [[TMP67]], align 8
2184 // CHECK11-NEXT: [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
2185 // CHECK11-NEXT: store i64 0, ptr [[TMP68]], align 8
2186 // CHECK11-NEXT: [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
2187 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
2188 // CHECK11-NEXT: [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
2189 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP70]], align 4
2190 // CHECK11-NEXT: [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
2191 // CHECK11-NEXT: store i32 0, ptr [[TMP71]], align 4
2192 // CHECK11-NEXT: [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.region_id, ptr [[KERNEL_ARGS15]])
2193 // CHECK11-NEXT: [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0
2194 // CHECK11-NEXT: br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2195 // CHECK11: omp_offload.failed16:
2196 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]
2197 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT17]]
2198 // CHECK11: omp_offload.cont17:
2199 // CHECK11-NEXT: [[TMP74:%.*]] = load i32, ptr [[N]], align 4
2200 // CHECK11-NEXT: store i32 [[TMP74]], ptr [[DOTCAPTURE_EXPR_18]], align 4
2201 // CHECK11-NEXT: [[TMP75:%.*]] = load i32, ptr [[N]], align 4
2202 // CHECK11-NEXT: store i32 [[TMP75]], ptr [[N_CASTED19]], align 4
2203 // CHECK11-NEXT: [[TMP76:%.*]] = load i32, ptr [[N_CASTED19]], align 4
2204 // CHECK11-NEXT: [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4
2205 // CHECK11-NEXT: store i32 [[TMP77]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
2206 // CHECK11-NEXT: [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
2207 // CHECK11-NEXT: [[TMP79:%.*]] = mul nuw i32 [[TMP0]], 4
2208 // CHECK11-NEXT: [[TMP80:%.*]] = sext i32 [[TMP79]] to i64
2209 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES23]], ptr align 4 @.offload_sizes.3, i32 32, i1 false)
2210 // CHECK11-NEXT: [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
2211 // CHECK11-NEXT: store i32 [[TMP76]], ptr [[TMP81]], align 4
2212 // CHECK11-NEXT: [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
2213 // CHECK11-NEXT: store i32 [[TMP76]], ptr [[TMP82]], align 4
2214 // CHECK11-NEXT: [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
2215 // CHECK11-NEXT: store ptr null, ptr [[TMP83]], align 4
2216 // CHECK11-NEXT: [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
2217 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP84]], align 4
2218 // CHECK11-NEXT: [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
2219 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[TMP85]], align 4
2220 // CHECK11-NEXT: [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
2221 // CHECK11-NEXT: store ptr null, ptr [[TMP86]], align 4
2222 // CHECK11-NEXT: [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
2223 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP87]], align 4
2224 // CHECK11-NEXT: [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
2225 // CHECK11-NEXT: store ptr [[VLA]], ptr [[TMP88]], align 4
2226 // CHECK11-NEXT: [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
2227 // CHECK11-NEXT: store i64 [[TMP80]], ptr [[TMP89]], align 4
2228 // CHECK11-NEXT: [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2
2229 // CHECK11-NEXT: store ptr null, ptr [[TMP90]], align 4
2230 // CHECK11-NEXT: [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
2231 // CHECK11-NEXT: store i32 [[TMP78]], ptr [[TMP91]], align 4
2232 // CHECK11-NEXT: [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
2233 // CHECK11-NEXT: store i32 [[TMP78]], ptr [[TMP92]], align 4
2234 // CHECK11-NEXT: [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3
2235 // CHECK11-NEXT: store ptr null, ptr [[TMP93]], align 4
2236 // CHECK11-NEXT: [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
2237 // CHECK11-NEXT: [[TMP95:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
2238 // CHECK11-NEXT: [[TMP96:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
2239 // CHECK11-NEXT: [[TMP97:%.*]] = load i32, ptr [[N]], align 4
2240 // CHECK11-NEXT: store i32 [[TMP97]], ptr [[DOTCAPTURE_EXPR_25]], align 4
2241 // CHECK11-NEXT: [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
2242 // CHECK11-NEXT: [[SUB27:%.*]] = sub nsw i32 [[TMP98]], 0
2243 // CHECK11-NEXT: [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
2244 // CHECK11-NEXT: [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
2245 // CHECK11-NEXT: store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4
2246 // CHECK11-NEXT: [[TMP99:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4
2247 // CHECK11-NEXT: [[ADD30:%.*]] = add nsw i32 [[TMP99]], 1
2248 // CHECK11-NEXT: [[TMP100:%.*]] = zext i32 [[ADD30]] to i64
2249 // CHECK11-NEXT: [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
2250 // CHECK11-NEXT: store i32 2, ptr [[TMP101]], align 4
2251 // CHECK11-NEXT: [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
2252 // CHECK11-NEXT: store i32 4, ptr [[TMP102]], align 4
2253 // CHECK11-NEXT: [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
2254 // CHECK11-NEXT: store ptr [[TMP94]], ptr [[TMP103]], align 4
2255 // CHECK11-NEXT: [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
2256 // CHECK11-NEXT: store ptr [[TMP95]], ptr [[TMP104]], align 4
2257 // CHECK11-NEXT: [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
2258 // CHECK11-NEXT: store ptr [[TMP96]], ptr [[TMP105]], align 4
2259 // CHECK11-NEXT: [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
2260 // CHECK11-NEXT: store ptr @.offload_maptypes.4, ptr [[TMP106]], align 4
2261 // CHECK11-NEXT: [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
2262 // CHECK11-NEXT: store ptr null, ptr [[TMP107]], align 4
2263 // CHECK11-NEXT: [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
2264 // CHECK11-NEXT: store ptr null, ptr [[TMP108]], align 4
2265 // CHECK11-NEXT: [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
2266 // CHECK11-NEXT: store i64 [[TMP100]], ptr [[TMP109]], align 8
2267 // CHECK11-NEXT: [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
2268 // CHECK11-NEXT: store i64 0, ptr [[TMP110]], align 8
2269 // CHECK11-NEXT: [[TMP111:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
2270 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4
2271 // CHECK11-NEXT: [[TMP112:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
2272 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP112]], align 4
2273 // CHECK11-NEXT: [[TMP113:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
2274 // CHECK11-NEXT: store i32 0, ptr [[TMP113]], align 4
2275 // CHECK11-NEXT: [[TMP114:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.region_id, ptr [[KERNEL_ARGS31]])
2276 // CHECK11-NEXT: [[TMP115:%.*]] = icmp ne i32 [[TMP114]], 0
2277 // CHECK11-NEXT: br i1 [[TMP115]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
2278 // CHECK11: omp_offload.failed32:
2279 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102(i32 [[TMP76]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP78]]) #[[ATTR3]]
2280 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT33]]
2281 // CHECK11: omp_offload.cont33:
2282 // CHECK11-NEXT: [[TMP116:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
2283 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP116]])
2284 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
2285 // CHECK11-NEXT: [[TMP117:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4
2286 // CHECK11-NEXT: call void @llvm.stackrestore.p0(ptr [[TMP117]])
2287 // CHECK11-NEXT: [[TMP118:%.*]] = load i32, ptr [[RETVAL]], align 4
2288 // CHECK11-NEXT: ret i32 [[TMP118]]
2291 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
2292 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
2293 // CHECK11-NEXT: entry:
2294 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2295 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2296 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2297 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2298 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
2299 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2300 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2301 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2302 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2303 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
2304 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4
2305 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
2306 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]])
2307 // CHECK11-NEXT: ret void
2310 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined
2311 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2312 // CHECK11-NEXT: entry:
2313 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2314 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2315 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2316 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2317 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2318 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2319 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2320 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2321 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2322 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2323 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2324 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2325 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2326 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2327 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2328 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2329 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2330 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
2331 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2332 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2333 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2334 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2335 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
2336 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
2337 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2338 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2339 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2340 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2341 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2342 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4
2343 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2344 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2345 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2346 // CHECK11: omp.precond.then:
2347 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2348 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2349 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
2350 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2351 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2352 // CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2353 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
2354 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2355 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2356 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2357 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2358 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2359 // CHECK11: cond.true:
2360 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2361 // CHECK11-NEXT: br label [[COND_END:%.*]]
2362 // CHECK11: cond.false:
2363 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2364 // CHECK11-NEXT: br label [[COND_END]]
2365 // CHECK11: cond.end:
2366 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2367 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2368 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2369 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
2370 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2371 // CHECK11: omp.inner.for.cond:
2372 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2373 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2374 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2375 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2376 // CHECK11: omp.inner.for.body:
2377 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2378 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2379 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2380 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4
2381 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[I3]], align 4
2382 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP16]]
2383 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
2384 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2385 // CHECK11: omp.body.continue:
2386 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2387 // CHECK11: omp.inner.for.inc:
2388 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2389 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
2390 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
2391 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2392 // CHECK11: omp.inner.for.end:
2393 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2394 // CHECK11: omp.loop.exit:
2395 // CHECK11-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2396 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
2397 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])
2398 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2399 // CHECK11: omp.precond.end:
2400 // CHECK11-NEXT: ret void
2403 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98
2404 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2405 // CHECK11-NEXT: entry:
2406 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2407 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2408 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2409 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2410 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
2411 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2412 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2413 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2414 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2415 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
2416 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4
2417 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
2418 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]])
2419 // CHECK11-NEXT: ret void
2422 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l98.omp_outlined
2423 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
2424 // CHECK11-NEXT: entry:
2425 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2426 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2427 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2428 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2429 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2430 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2431 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2432 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
2433 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2434 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2435 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2436 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2437 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2438 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2439 // CHECK11-NEXT: [[I3:%.*]] = alloca i32, align 4
2440 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2441 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2442 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
2443 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2444 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2445 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2446 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2447 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
2448 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
2449 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2450 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2451 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2452 // CHECK11-NEXT: [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
2453 // CHECK11-NEXT: store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2454 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4
2455 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
2456 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2457 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2458 // CHECK11: omp.precond.then:
2459 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2460 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2461 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
2462 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2463 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2464 // CHECK11-NEXT: [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2465 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
2466 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2467 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2468 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2469 // CHECK11-NEXT: [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
2470 // CHECK11-NEXT: br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2471 // CHECK11: cond.true:
2472 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2473 // CHECK11-NEXT: br label [[COND_END:%.*]]
2474 // CHECK11: cond.false:
2475 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2476 // CHECK11-NEXT: br label [[COND_END]]
2477 // CHECK11: cond.end:
2478 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
2479 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2480 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2481 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
2482 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2483 // CHECK11: omp.inner.for.cond:
2484 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2485 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2486 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
2487 // CHECK11-NEXT: br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2488 // CHECK11: omp.inner.for.body:
2489 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2490 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
2491 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2492 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I3]], align 4
2493 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[I3]], align 4
2494 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP16]]
2495 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
2496 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2497 // CHECK11: omp.body.continue:
2498 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2499 // CHECK11: omp.inner.for.inc:
2500 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2501 // CHECK11-NEXT: [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
2502 // CHECK11-NEXT: store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
2503 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2504 // CHECK11: omp.inner.for.end:
2505 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2506 // CHECK11: omp.loop.exit:
2507 // CHECK11-NEXT: [[TMP18:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2508 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[TMP18]], align 4
2509 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP19]])
2510 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2511 // CHECK11: omp.precond.end:
2512 // CHECK11-NEXT: ret void
2515 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102
2516 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2517 // CHECK11-NEXT: entry:
2518 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2519 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2520 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2521 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2522 // CHECK11-NEXT: [[N_CASTED:%.*]] = alloca i32, align 4
2523 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
2524 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
2525 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2526 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2527 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2528 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2529 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2530 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
2531 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[N_CASTED]], align 4
2532 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
2533 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2534 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
2535 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
2536 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]])
2537 // CHECK11-NEXT: ret void
2540 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l102.omp_outlined
2541 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
2542 // CHECK11-NEXT: entry:
2543 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2544 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2545 // CHECK11-NEXT: [[N_ADDR:%.*]] = alloca i32, align 4
2546 // CHECK11-NEXT: [[VLA_ADDR:%.*]] = alloca i32, align 4
2547 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2548 // CHECK11-NEXT: [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
2549 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2550 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2551 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
2552 // CHECK11-NEXT: [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
2553 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2554 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2555 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2556 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2557 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2558 // CHECK11-NEXT: [[I4:%.*]] = alloca i32, align 4
2559 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2560 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2561 // CHECK11-NEXT: store i32 [[N]], ptr [[N_ADDR]], align 4
2562 // CHECK11-NEXT: store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
2563 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2564 // CHECK11-NEXT: store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2565 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
2566 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2567 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
2568 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
2569 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2570 // CHECK11-NEXT: [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
2571 // CHECK11-NEXT: [[DIV:%.*]] = sdiv i32 [[SUB]], 1
2572 // CHECK11-NEXT: [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
2573 // CHECK11-NEXT: store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
2574 // CHECK11-NEXT: store i32 0, ptr [[I]], align 4
2575 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
2576 // CHECK11-NEXT: [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
2577 // CHECK11-NEXT: br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
2578 // CHECK11: omp.precond.then:
2579 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2580 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2581 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
2582 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2583 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2584 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
2585 // CHECK11-NEXT: [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2586 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
2587 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
2588 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2589 // CHECK11: omp.dispatch.cond:
2590 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2591 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2592 // CHECK11-NEXT: [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
2593 // CHECK11-NEXT: br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2594 // CHECK11: cond.true:
2595 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
2596 // CHECK11-NEXT: br label [[COND_END:%.*]]
2597 // CHECK11: cond.false:
2598 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2599 // CHECK11-NEXT: br label [[COND_END]]
2600 // CHECK11: cond.end:
2601 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
2602 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2603 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2604 // CHECK11-NEXT: store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
2605 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2606 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2607 // CHECK11-NEXT: [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
2608 // CHECK11-NEXT: br i1 [[CMP6]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2609 // CHECK11: omp.dispatch.body:
2610 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2611 // CHECK11: omp.inner.for.cond:
2612 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12:![0-9]+]]
2613 // CHECK11-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP12]]
2614 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
2615 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2616 // CHECK11: omp.inner.for.body:
2617 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
2618 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
2619 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2620 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP12]]
2621 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP12]]
2622 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP19]]
2623 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP12]]
2624 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2625 // CHECK11: omp.body.continue:
2626 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2627 // CHECK11: omp.inner.for.inc:
2628 // CHECK11-NEXT: [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
2629 // CHECK11-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
2630 // CHECK11-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP12]]
2631 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP13:![0-9]+]]
2632 // CHECK11: omp.inner.for.end:
2633 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
2634 // CHECK11: omp.dispatch.inc:
2635 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2636 // CHECK11-NEXT: [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2637 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
2638 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_LB]], align 4
2639 // CHECK11-NEXT: [[TMP23:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2640 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2641 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
2642 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_UB]], align 4
2643 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
2644 // CHECK11: omp.dispatch.end:
2645 // CHECK11-NEXT: [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2646 // CHECK11-NEXT: [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
2647 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])
2648 // CHECK11-NEXT: br label [[OMP_PRECOND_END]]
2649 // CHECK11: omp.precond.end:
2650 // CHECK11-NEXT: ret void
2653 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
2654 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
2655 // CHECK11-NEXT: entry:
2656 // CHECK11-NEXT: [[ARGC_ADDR:%.*]] = alloca i32, align 4
2657 // CHECK11-NEXT: [[A:%.*]] = alloca [10 x i32], align 4
2658 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
2659 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
2660 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
2661 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2662 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2663 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4
2664 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4
2665 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4
2666 // CHECK11-NEXT: [[_TMP4:%.*]] = alloca i32, align 4
2667 // CHECK11-NEXT: [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2668 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [1 x ptr], align 4
2669 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS9:%.*]] = alloca [1 x ptr], align 4
2670 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [1 x ptr], align 4
2671 // CHECK11-NEXT: [[_TMP11:%.*]] = alloca i32, align 4
2672 // CHECK11-NEXT: [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2673 // CHECK11-NEXT: store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
2674 // CHECK11-NEXT: [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2675 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP0]], align 4
2676 // CHECK11-NEXT: [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2677 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP1]], align 4
2678 // CHECK11-NEXT: [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
2679 // CHECK11-NEXT: store ptr null, ptr [[TMP2]], align 4
2680 // CHECK11-NEXT: [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2681 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2682 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2683 // CHECK11-NEXT: store i32 2, ptr [[TMP5]], align 4
2684 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2685 // CHECK11-NEXT: store i32 1, ptr [[TMP6]], align 4
2686 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2687 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP7]], align 4
2688 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2689 // CHECK11-NEXT: store ptr [[TMP4]], ptr [[TMP8]], align 4
2690 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2691 // CHECK11-NEXT: store ptr @.offload_sizes.5, ptr [[TMP9]], align 4
2692 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2693 // CHECK11-NEXT: store ptr @.offload_maptypes.6, ptr [[TMP10]], align 4
2694 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2695 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4
2696 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2697 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4
2698 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2699 // CHECK11-NEXT: store i64 10, ptr [[TMP13]], align 8
2700 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2701 // CHECK11-NEXT: store i64 0, ptr [[TMP14]], align 8
2702 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2703 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
2704 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2705 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
2706 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2707 // CHECK11-NEXT: store i32 0, ptr [[TMP17]], align 4
2708 // CHECK11-NEXT: [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.region_id, ptr [[KERNEL_ARGS]])
2709 // CHECK11-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
2710 // CHECK11-NEXT: br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2711 // CHECK11: omp_offload.failed:
2712 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76(ptr [[A]]) #[[ATTR3]]
2713 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
2714 // CHECK11: omp_offload.cont:
2715 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
2716 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP20]], align 4
2717 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
2718 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP21]], align 4
2719 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
2720 // CHECK11-NEXT: store ptr null, ptr [[TMP22]], align 4
2721 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
2722 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
2723 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
2724 // CHECK11-NEXT: store i32 2, ptr [[TMP25]], align 4
2725 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
2726 // CHECK11-NEXT: store i32 1, ptr [[TMP26]], align 4
2727 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
2728 // CHECK11-NEXT: store ptr [[TMP23]], ptr [[TMP27]], align 4
2729 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
2730 // CHECK11-NEXT: store ptr [[TMP24]], ptr [[TMP28]], align 4
2731 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
2732 // CHECK11-NEXT: store ptr @.offload_sizes.7, ptr [[TMP29]], align 4
2733 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
2734 // CHECK11-NEXT: store ptr @.offload_maptypes.8, ptr [[TMP30]], align 4
2735 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
2736 // CHECK11-NEXT: store ptr null, ptr [[TMP31]], align 4
2737 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
2738 // CHECK11-NEXT: store ptr null, ptr [[TMP32]], align 4
2739 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
2740 // CHECK11-NEXT: store i64 10, ptr [[TMP33]], align 8
2741 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
2742 // CHECK11-NEXT: store i64 0, ptr [[TMP34]], align 8
2743 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
2744 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
2745 // CHECK11-NEXT: [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
2746 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
2747 // CHECK11-NEXT: [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
2748 // CHECK11-NEXT: store i32 0, ptr [[TMP37]], align 4
2749 // CHECK11-NEXT: [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.region_id, ptr [[KERNEL_ARGS5]])
2750 // CHECK11-NEXT: [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
2751 // CHECK11-NEXT: br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
2752 // CHECK11: omp_offload.failed6:
2753 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80(ptr [[A]]) #[[ATTR3]]
2754 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT7]]
2755 // CHECK11: omp_offload.cont7:
2756 // CHECK11-NEXT: [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
2757 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP40]], align 4
2758 // CHECK11-NEXT: [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
2759 // CHECK11-NEXT: store ptr [[A]], ptr [[TMP41]], align 4
2760 // CHECK11-NEXT: [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
2761 // CHECK11-NEXT: store ptr null, ptr [[TMP42]], align 4
2762 // CHECK11-NEXT: [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
2763 // CHECK11-NEXT: [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
2764 // CHECK11-NEXT: [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
2765 // CHECK11-NEXT: store i32 2, ptr [[TMP45]], align 4
2766 // CHECK11-NEXT: [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
2767 // CHECK11-NEXT: store i32 1, ptr [[TMP46]], align 4
2768 // CHECK11-NEXT: [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
2769 // CHECK11-NEXT: store ptr [[TMP43]], ptr [[TMP47]], align 4
2770 // CHECK11-NEXT: [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
2771 // CHECK11-NEXT: store ptr [[TMP44]], ptr [[TMP48]], align 4
2772 // CHECK11-NEXT: [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
2773 // CHECK11-NEXT: store ptr @.offload_sizes.9, ptr [[TMP49]], align 4
2774 // CHECK11-NEXT: [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
2775 // CHECK11-NEXT: store ptr @.offload_maptypes.10, ptr [[TMP50]], align 4
2776 // CHECK11-NEXT: [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
2777 // CHECK11-NEXT: store ptr null, ptr [[TMP51]], align 4
2778 // CHECK11-NEXT: [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
2779 // CHECK11-NEXT: store ptr null, ptr [[TMP52]], align 4
2780 // CHECK11-NEXT: [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
2781 // CHECK11-NEXT: store i64 10, ptr [[TMP53]], align 8
2782 // CHECK11-NEXT: [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
2783 // CHECK11-NEXT: store i64 0, ptr [[TMP54]], align 8
2784 // CHECK11-NEXT: [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
2785 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
2786 // CHECK11-NEXT: [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
2787 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
2788 // CHECK11-NEXT: [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
2789 // CHECK11-NEXT: store i32 0, ptr [[TMP57]], align 4
2790 // CHECK11-NEXT: [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.region_id, ptr [[KERNEL_ARGS12]])
2791 // CHECK11-NEXT: [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
2792 // CHECK11-NEXT: br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
2793 // CHECK11: omp_offload.failed13:
2794 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84(ptr [[A]]) #[[ATTR3]]
2795 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT14]]
2796 // CHECK11: omp_offload.cont14:
2797 // CHECK11-NEXT: ret i32 0
2800 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76
2801 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2802 // CHECK11-NEXT: entry:
2803 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2804 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2805 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2806 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined, ptr [[TMP0]])
2807 // CHECK11-NEXT: ret void
2810 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l76.omp_outlined
2811 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2812 // CHECK11-NEXT: entry:
2813 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2814 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2815 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2816 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2817 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2818 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2819 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2820 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2821 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2822 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2823 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2824 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2825 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2826 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2827 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2828 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
2829 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2830 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2831 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2832 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2833 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2834 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2835 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2836 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2837 // CHECK11: cond.true:
2838 // CHECK11-NEXT: br label [[COND_END:%.*]]
2839 // CHECK11: cond.false:
2840 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2841 // CHECK11-NEXT: br label [[COND_END]]
2842 // CHECK11: cond.end:
2843 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2844 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2845 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2846 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2847 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2848 // CHECK11: omp.inner.for.cond:
2849 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2850 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2851 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2852 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2853 // CHECK11: omp.inner.for.body:
2854 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2855 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2856 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2857 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4
2858 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
2859 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]]
2860 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
2861 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2862 // CHECK11: omp.body.continue:
2863 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2864 // CHECK11: omp.inner.for.inc:
2865 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2866 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2867 // CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
2868 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2869 // CHECK11: omp.inner.for.end:
2870 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2871 // CHECK11: omp.loop.exit:
2872 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2873 // CHECK11-NEXT: ret void
2876 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80
2877 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2878 // CHECK11-NEXT: entry:
2879 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2880 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2881 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2882 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined, ptr [[TMP0]])
2883 // CHECK11-NEXT: ret void
2886 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l80.omp_outlined
2887 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2888 // CHECK11-NEXT: entry:
2889 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2890 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2891 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2892 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2893 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2894 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2895 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2896 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2897 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2898 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2899 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2900 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2901 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2902 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2903 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2904 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
2905 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2906 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2907 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2908 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2909 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2910 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2911 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2912 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2913 // CHECK11: cond.true:
2914 // CHECK11-NEXT: br label [[COND_END:%.*]]
2915 // CHECK11: cond.false:
2916 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2917 // CHECK11-NEXT: br label [[COND_END]]
2918 // CHECK11: cond.end:
2919 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2920 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2921 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2922 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2923 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
2924 // CHECK11: omp.inner.for.cond:
2925 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2926 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2927 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2928 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2929 // CHECK11: omp.inner.for.body:
2930 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2931 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
2932 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2933 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4
2934 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[I]], align 4
2935 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP9]]
2936 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4
2937 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
2938 // CHECK11: omp.body.continue:
2939 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
2940 // CHECK11: omp.inner.for.inc:
2941 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2942 // CHECK11-NEXT: [[ADD2:%.*]] = add nsw i32 [[TMP10]], 1
2943 // CHECK11-NEXT: store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
2944 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
2945 // CHECK11: omp.inner.for.end:
2946 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
2947 // CHECK11: omp.loop.exit:
2948 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2949 // CHECK11-NEXT: ret void
2952 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84
2953 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2954 // CHECK11-NEXT: entry:
2955 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2956 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2957 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2958 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined, ptr [[TMP0]])
2959 // CHECK11-NEXT: ret void
2962 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l84.omp_outlined
2963 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
2964 // CHECK11-NEXT: entry:
2965 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2966 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2967 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca ptr, align 4
2968 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
2969 // CHECK11-NEXT: [[TMP:%.*]] = alloca i32, align 4
2970 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
2971 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
2972 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2973 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2974 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
2975 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2976 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2977 // CHECK11-NEXT: store ptr [[A]], ptr [[A_ADDR]], align 4
2978 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
2979 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
2980 // CHECK11-NEXT: store i32 9, ptr [[DOTOMP_UB]], align 4
2981 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2982 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2983 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2984 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2985 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 10)
2986 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND:%.*]]
2987 // CHECK11: omp.dispatch.cond:
2988 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2989 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
2990 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2991 // CHECK11: cond.true:
2992 // CHECK11-NEXT: br label [[COND_END:%.*]]
2993 // CHECK11: cond.false:
2994 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2995 // CHECK11-NEXT: br label [[COND_END]]
2996 // CHECK11: cond.end:
2997 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2998 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2999 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3000 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3001 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3002 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3003 // CHECK11-NEXT: [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3004 // CHECK11-NEXT: br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3005 // CHECK11: omp.dispatch.body:
3006 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
3007 // CHECK11: omp.inner.for.cond:
3008 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
3009 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
3010 // CHECK11-NEXT: [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3011 // CHECK11-NEXT: br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3012 // CHECK11: omp.inner.for.body:
3013 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
3014 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3015 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3016 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
3017 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP15]]
3018 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]
3019 // CHECK11-NEXT: store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]
3020 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
3021 // CHECK11: omp.body.continue:
3022 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
3023 // CHECK11: omp.inner.for.inc:
3024 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
3025 // CHECK11-NEXT: [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
3026 // CHECK11-NEXT: store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
3027 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
3028 // CHECK11: omp.inner.for.end:
3029 // CHECK11-NEXT: br label [[OMP_DISPATCH_INC:%.*]]
3030 // CHECK11: omp.dispatch.inc:
3031 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3032 // CHECK11-NEXT: [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3033 // CHECK11-NEXT: [[ADD4:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
3034 // CHECK11-NEXT: store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
3035 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3036 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3037 // CHECK11-NEXT: [[ADD5:%.*]] = add nsw i32 [[TMP15]], [[TMP16]]
3038 // CHECK11-NEXT: store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
3039 // CHECK11-NEXT: br label [[OMP_DISPATCH_COND]]
3040 // CHECK11: omp.dispatch.end:
3041 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3042 // CHECK11-NEXT: ret void
3045 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3046 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
3047 // CHECK11-NEXT: entry:
3048 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
3049 // CHECK11-NEXT: ret void