Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / OpenMP / target_teams_distribute_lastprivate_codegen.cpp
blob221ebf3767741a2ebfbce24f54faa28c0d339465
1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
2 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
3 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
4 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
5 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
6 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
7 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
9 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
10 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
11 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
12 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
13 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
14 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
16 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
17 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
18 // RUN: %clang_cc1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
19 // RUN: %clang_cc1 -verify -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
20 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
21 // RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
23 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
24 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
25 // RUN: %clang_cc1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
26 // RUN: %clang_cc1 -verify -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
27 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
28 // RUN: %clang_cc1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
29 // expected-no-diagnostics
30 #ifndef HEADER
31 #define HEADER
33 template <class T>
34 struct S {
35 T f;
36 S(T a) : f(a) {}
37 S() : f() {}
38 operator T() { return T(); }
39 ~S() {}
42 template <typename T>
43 T tmain() {
44 S<T> test;
45 T t_var = T();
46 T vec[] = {1, 2};
47 S<T> s_arr[] = {1, 2};
48 S<T> &var = test;
49 #pragma omp target teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var)
50 for (int i = 0; i < 2; ++i) {
51 vec[i] = t_var;
52 s_arr[i] = var;
54 return T();
57 int main() {
58 static int svar;
59 volatile double g;
60 volatile double &g1 = g;
62 #ifdef LAMBDA
63 [&]() {
64 static float sfvar;
66 #pragma omp target teams distribute lastprivate(g, g1, svar, sfvar)
67 for (int i = 0; i < 2; ++i) {
68 // loop variables
70 // init private variables
71 g = 1;
72 g1 = 1;
73 svar = 3;
74 sfvar = 4.0;
77 [&]() {
78 g = 2;
79 g1 = 2;
80 svar = 4;
81 sfvar = 8.0;
83 }();
85 }();
86 return 0;
87 #else
88 S<float> test;
89 int t_var = 0;
90 int vec[] = {1, 2};
91 S<float> s_arr[] = {1, 2};
92 S<float> &var = test;
94 #pragma omp target teams distribute lastprivate(t_var, vec, s_arr, s_arr, var, var, svar)
95 for (int i = 0; i < 2; ++i) {
96 vec[i] = t_var;
97 s_arr[i] = var;
99 int i;
101 return tmain<int>();
102 #endif
106 // skip loop variables
108 // copy from parameters to local address variables
110 // load content of local address variables
111 // the distribute loop
112 // assignment: vec[i] = t_var;
114 // assignment: s_arr[i] = var;
116 // lastprivates
119 // template tmain
123 // skip alloca of global_tid and bound_tid
124 // skip loop variables
126 // skip init of bound and global tid
127 // copy from parameters to local address variables
129 // load content of local address variables
130 // assignment: vec[i] = t_var;
132 // assignment: s_arr[i] = var;
134 // lastprivates
136 #endif
137 // CHECK1-LABEL: define {{[^@]+}}@main
138 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
139 // CHECK1-NEXT: entry:
140 // CHECK1-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
141 // CHECK1-NEXT: [[G:%.*]] = alloca double, align 8
142 // CHECK1-NEXT: [[G1:%.*]] = alloca ptr, align 8
143 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
144 // CHECK1-NEXT: store i32 0, ptr [[RETVAL]], align 4
145 // CHECK1-NEXT: store ptr [[G]], ptr [[G1]], align 8
146 // CHECK1-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
147 // CHECK1-NEXT: store ptr [[G]], ptr [[TMP0]], align 8
148 // CHECK1-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
149 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 8
150 // CHECK1-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 8
151 // CHECK1-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(16) [[REF_TMP]])
152 // CHECK1-NEXT: ret i32 0
155 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66
156 // CHECK1-SAME: (i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
157 // CHECK1-NEXT: entry:
158 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
159 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
160 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
161 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
162 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8
163 // CHECK1-NEXT: [[G_CASTED:%.*]] = alloca i64, align 8
164 // CHECK1-NEXT: [[G1_CASTED:%.*]] = alloca i64, align 8
165 // CHECK1-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
166 // CHECK1-NEXT: [[SFVAR_CASTED:%.*]] = alloca i64, align 8
167 // CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8
168 // CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8
169 // CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
170 // CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
171 // CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8
172 // CHECK1-NEXT: [[TMP0:%.*]] = load double, ptr [[G_ADDR]], align 8
173 // CHECK1-NEXT: store double [[TMP0]], ptr [[G_CASTED]], align 8
174 // CHECK1-NEXT: [[TMP1:%.*]] = load i64, ptr [[G_CASTED]], align 8
175 // CHECK1-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 8
176 // CHECK1-NEXT: [[TMP3:%.*]] = load volatile double, ptr [[TMP2]], align 8
177 // CHECK1-NEXT: store double [[TMP3]], ptr [[G1_CASTED]], align 8
178 // CHECK1-NEXT: [[TMP4:%.*]] = load i64, ptr [[G1_CASTED]], align 8
179 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4
180 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[SVAR_CASTED]], align 4
181 // CHECK1-NEXT: [[TMP6:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8
182 // CHECK1-NEXT: [[TMP7:%.*]] = load float, ptr [[SFVAR_ADDR]], align 4
183 // CHECK1-NEXT: store float [[TMP7]], ptr [[SFVAR_CASTED]], align 4
184 // CHECK1-NEXT: [[TMP8:%.*]] = load i64, ptr [[SFVAR_CASTED]], align 8
185 // CHECK1-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, i64 [[TMP1]], i64 [[TMP4]], i64 [[TMP6]], i64 [[TMP8]])
186 // CHECK1-NEXT: ret void
189 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined
190 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[G:%.*]], i64 noundef [[G1:%.*]], i64 noundef [[SVAR:%.*]], i64 noundef [[SFVAR:%.*]]) #[[ATTR2]] {
191 // CHECK1-NEXT: entry:
192 // CHECK1-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
193 // CHECK1-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
194 // CHECK1-NEXT: [[G_ADDR:%.*]] = alloca i64, align 8
195 // CHECK1-NEXT: [[G1_ADDR:%.*]] = alloca i64, align 8
196 // CHECK1-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
197 // CHECK1-NEXT: [[SFVAR_ADDR:%.*]] = alloca i64, align 8
198 // CHECK1-NEXT: [[TMP:%.*]] = alloca ptr, align 8
199 // CHECK1-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
200 // CHECK1-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
201 // CHECK1-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
202 // CHECK1-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
203 // CHECK1-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
204 // CHECK1-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
205 // CHECK1-NEXT: [[G2:%.*]] = alloca double, align 8
206 // CHECK1-NEXT: [[G13:%.*]] = alloca double, align 8
207 // CHECK1-NEXT: [[_TMP4:%.*]] = alloca ptr, align 8
208 // CHECK1-NEXT: [[SVAR5:%.*]] = alloca i32, align 4
209 // CHECK1-NEXT: [[SFVAR6:%.*]] = alloca float, align 4
210 // CHECK1-NEXT: [[I:%.*]] = alloca i32, align 4
211 // CHECK1-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
212 // CHECK1-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
213 // CHECK1-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
214 // CHECK1-NEXT: store i64 [[G]], ptr [[G_ADDR]], align 8
215 // CHECK1-NEXT: store i64 [[G1]], ptr [[G1_ADDR]], align 8
216 // CHECK1-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
217 // CHECK1-NEXT: store i64 [[SFVAR]], ptr [[SFVAR_ADDR]], align 8
218 // CHECK1-NEXT: store ptr [[G1_ADDR]], ptr [[TMP]], align 8
219 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
220 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
221 // CHECK1-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
222 // CHECK1-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
223 // CHECK1-NEXT: [[TMP0:%.*]] = load ptr, ptr [[TMP]], align 8
224 // CHECK1-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 8
225 // CHECK1-NEXT: [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
226 // CHECK1-NEXT: [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
227 // CHECK1-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
228 // CHECK1-NEXT: [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
229 // CHECK1-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 1
230 // CHECK1-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
231 // CHECK1: cond.true:
232 // CHECK1-NEXT: br label [[COND_END:%.*]]
233 // CHECK1: cond.false:
234 // CHECK1-NEXT: [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
235 // CHECK1-NEXT: br label [[COND_END]]
236 // CHECK1: cond.end:
237 // CHECK1-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
238 // CHECK1-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
239 // CHECK1-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
240 // CHECK1-NEXT: store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
241 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
242 // CHECK1: omp.inner.for.cond:
243 // CHECK1-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
244 // CHECK1-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
245 // CHECK1-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
246 // CHECK1-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
247 // CHECK1: omp.inner.for.body:
248 // CHECK1-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
249 // CHECK1-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP8]], 1
250 // CHECK1-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
251 // CHECK1-NEXT: store i32 [[ADD]], ptr [[I]], align 4
252 // CHECK1-NEXT: store double 1.000000e+00, ptr [[G2]], align 8
253 // CHECK1-NEXT: [[TMP9:%.*]] = load ptr, ptr [[_TMP4]], align 8
254 // CHECK1-NEXT: store volatile double 1.000000e+00, ptr [[TMP9]], align 8
255 // CHECK1-NEXT: store i32 3, ptr [[SVAR5]], align 4
256 // CHECK1-NEXT: store float 4.000000e+00, ptr [[SFVAR6]], align 4
257 // CHECK1-NEXT: [[TMP10:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
258 // CHECK1-NEXT: store ptr [[G2]], ptr [[TMP10]], align 8
259 // CHECK1-NEXT: [[TMP11:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
260 // CHECK1-NEXT: [[TMP12:%.*]] = load ptr, ptr [[_TMP4]], align 8
261 // CHECK1-NEXT: store ptr [[TMP12]], ptr [[TMP11]], align 8
262 // CHECK1-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
263 // CHECK1-NEXT: store ptr [[SVAR5]], ptr [[TMP13]], align 8
264 // CHECK1-NEXT: [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
265 // CHECK1-NEXT: store ptr [[SFVAR6]], ptr [[TMP14]], align 8
266 // CHECK1-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(32) [[REF_TMP]])
267 // CHECK1-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
268 // CHECK1: omp.body.continue:
269 // CHECK1-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
270 // CHECK1: omp.inner.for.inc:
271 // CHECK1-NEXT: [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
272 // CHECK1-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP15]], 1
273 // CHECK1-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
274 // CHECK1-NEXT: br label [[OMP_INNER_FOR_COND]]
275 // CHECK1: omp.inner.for.end:
276 // CHECK1-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
277 // CHECK1: omp.loop.exit:
278 // CHECK1-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
279 // CHECK1-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
280 // CHECK1-NEXT: [[TMP17:%.*]] = icmp ne i32 [[TMP16]], 0
281 // CHECK1-NEXT: br i1 [[TMP17]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
282 // CHECK1: .omp.lastprivate.then:
283 // CHECK1-NEXT: [[TMP18:%.*]] = load double, ptr [[G2]], align 8
284 // CHECK1-NEXT: store volatile double [[TMP18]], ptr [[G_ADDR]], align 8
285 // CHECK1-NEXT: [[TMP19:%.*]] = load ptr, ptr [[_TMP4]], align 8
286 // CHECK1-NEXT: [[TMP20:%.*]] = load double, ptr [[TMP19]], align 8
287 // CHECK1-NEXT: store volatile double [[TMP20]], ptr [[TMP0]], align 8
288 // CHECK1-NEXT: [[TMP21:%.*]] = load i32, ptr [[SVAR5]], align 4
289 // CHECK1-NEXT: store i32 [[TMP21]], ptr [[SVAR_ADDR]], align 4
290 // CHECK1-NEXT: [[TMP22:%.*]] = load float, ptr [[SFVAR6]], align 4
291 // CHECK1-NEXT: store float [[TMP22]], ptr [[SFVAR_ADDR]], align 4
292 // CHECK1-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
293 // CHECK1: .omp.lastprivate.done:
294 // CHECK1-NEXT: ret void
297 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
298 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
299 // CHECK1-NEXT: entry:
300 // CHECK1-NEXT: call void @__tgt_register_requires(i64 1)
301 // CHECK1-NEXT: ret void
304 // CHECK3-LABEL: define {{[^@]+}}@main
305 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
306 // CHECK3-NEXT: entry:
307 // CHECK3-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
308 // CHECK3-NEXT: [[G:%.*]] = alloca double, align 8
309 // CHECK3-NEXT: [[G1:%.*]] = alloca ptr, align 4
310 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 4
311 // CHECK3-NEXT: store i32 0, ptr [[RETVAL]], align 4
312 // CHECK3-NEXT: store ptr [[G]], ptr [[G1]], align 4
313 // CHECK3-NEXT: [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
314 // CHECK3-NEXT: store ptr [[G]], ptr [[TMP0]], align 4
315 // CHECK3-NEXT: [[TMP1:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 1
316 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[G1]], align 4
317 // CHECK3-NEXT: store ptr [[TMP2]], ptr [[TMP1]], align 4
318 // CHECK3-NEXT: call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 4 dereferenceable(8) [[REF_TMP]])
319 // CHECK3-NEXT: ret i32 0
322 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66
323 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2:[0-9]+]] {
324 // CHECK3-NEXT: entry:
325 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4
326 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4
327 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
328 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
329 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4
330 // CHECK3-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
331 // CHECK3-NEXT: [[SFVAR_CASTED:%.*]] = alloca i32, align 4
332 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4
333 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4
334 // CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
335 // CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
336 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
337 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
338 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4
339 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4
340 // CHECK3-NEXT: [[TMP3:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4
341 // CHECK3-NEXT: store i32 [[TMP3]], ptr [[SVAR_CASTED]], align 4
342 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4
343 // CHECK3-NEXT: [[TMP5:%.*]] = load float, ptr [[SFVAR_ADDR]], align 4
344 // CHECK3-NEXT: store float [[TMP5]], ptr [[SFVAR_CASTED]], align 4
345 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[SFVAR_CASTED]], align 4
346 // CHECK3-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2:[0-9]+]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined, ptr [[TMP0]], ptr [[TMP2]], i32 [[TMP4]], i32 [[TMP6]])
347 // CHECK3-NEXT: ret void
350 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l66.omp_outlined
351 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[G1:%.*]], i32 noundef [[SVAR:%.*]], i32 noundef [[SFVAR:%.*]]) #[[ATTR2]] {
352 // CHECK3-NEXT: entry:
353 // CHECK3-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
354 // CHECK3-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
355 // CHECK3-NEXT: [[G_ADDR:%.*]] = alloca ptr, align 4
356 // CHECK3-NEXT: [[G1_ADDR:%.*]] = alloca ptr, align 4
357 // CHECK3-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
358 // CHECK3-NEXT: [[SFVAR_ADDR:%.*]] = alloca i32, align 4
359 // CHECK3-NEXT: [[TMP:%.*]] = alloca ptr, align 4
360 // CHECK3-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
361 // CHECK3-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
362 // CHECK3-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
363 // CHECK3-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
364 // CHECK3-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
365 // CHECK3-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
366 // CHECK3-NEXT: [[G2:%.*]] = alloca double, align 8
367 // CHECK3-NEXT: [[G13:%.*]] = alloca double, align 8
368 // CHECK3-NEXT: [[_TMP4:%.*]] = alloca ptr, align 4
369 // CHECK3-NEXT: [[SVAR5:%.*]] = alloca i32, align 4
370 // CHECK3-NEXT: [[SFVAR6:%.*]] = alloca float, align 4
371 // CHECK3-NEXT: [[I:%.*]] = alloca i32, align 4
372 // CHECK3-NEXT: [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 4
373 // CHECK3-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
374 // CHECK3-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
375 // CHECK3-NEXT: store ptr [[G]], ptr [[G_ADDR]], align 4
376 // CHECK3-NEXT: store ptr [[G1]], ptr [[G1_ADDR]], align 4
377 // CHECK3-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
378 // CHECK3-NEXT: store i32 [[SFVAR]], ptr [[SFVAR_ADDR]], align 4
379 // CHECK3-NEXT: [[TMP0:%.*]] = load ptr, ptr [[G_ADDR]], align 4
380 // CHECK3-NEXT: [[TMP1:%.*]] = load ptr, ptr [[G1_ADDR]], align 4
381 // CHECK3-NEXT: store ptr [[TMP1]], ptr [[TMP]], align 4
382 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
383 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
384 // CHECK3-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
385 // CHECK3-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
386 // CHECK3-NEXT: [[TMP2:%.*]] = load ptr, ptr [[TMP]], align 4
387 // CHECK3-NEXT: store ptr [[G13]], ptr [[_TMP4]], align 4
388 // CHECK3-NEXT: [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
389 // CHECK3-NEXT: [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
390 // CHECK3-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP4]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
391 // CHECK3-NEXT: [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
392 // CHECK3-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 1
393 // CHECK3-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
394 // CHECK3: cond.true:
395 // CHECK3-NEXT: br label [[COND_END:%.*]]
396 // CHECK3: cond.false:
397 // CHECK3-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
398 // CHECK3-NEXT: br label [[COND_END]]
399 // CHECK3: cond.end:
400 // CHECK3-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
401 // CHECK3-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
402 // CHECK3-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
403 // CHECK3-NEXT: store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
404 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
405 // CHECK3: omp.inner.for.cond:
406 // CHECK3-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
407 // CHECK3-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
408 // CHECK3-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
409 // CHECK3-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
410 // CHECK3: omp.inner.for.body:
411 // CHECK3-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
412 // CHECK3-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
413 // CHECK3-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
414 // CHECK3-NEXT: store i32 [[ADD]], ptr [[I]], align 4
415 // CHECK3-NEXT: store double 1.000000e+00, ptr [[G2]], align 8
416 // CHECK3-NEXT: [[TMP11:%.*]] = load ptr, ptr [[_TMP4]], align 4
417 // CHECK3-NEXT: store volatile double 1.000000e+00, ptr [[TMP11]], align 4
418 // CHECK3-NEXT: store i32 3, ptr [[SVAR5]], align 4
419 // CHECK3-NEXT: store float 4.000000e+00, ptr [[SFVAR6]], align 4
420 // CHECK3-NEXT: [[TMP12:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
421 // CHECK3-NEXT: store ptr [[G2]], ptr [[TMP12]], align 4
422 // CHECK3-NEXT: [[TMP13:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
423 // CHECK3-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP4]], align 4
424 // CHECK3-NEXT: store ptr [[TMP14]], ptr [[TMP13]], align 4
425 // CHECK3-NEXT: [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
426 // CHECK3-NEXT: store ptr [[SVAR5]], ptr [[TMP15]], align 4
427 // CHECK3-NEXT: [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 3
428 // CHECK3-NEXT: store ptr [[SFVAR6]], ptr [[TMP16]], align 4
429 // CHECK3-NEXT: call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 4 dereferenceable(16) [[REF_TMP]])
430 // CHECK3-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
431 // CHECK3: omp.body.continue:
432 // CHECK3-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
433 // CHECK3: omp.inner.for.inc:
434 // CHECK3-NEXT: [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
435 // CHECK3-NEXT: [[ADD8:%.*]] = add nsw i32 [[TMP17]], 1
436 // CHECK3-NEXT: store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
437 // CHECK3-NEXT: br label [[OMP_INNER_FOR_COND]]
438 // CHECK3: omp.inner.for.end:
439 // CHECK3-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
440 // CHECK3: omp.loop.exit:
441 // CHECK3-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
442 // CHECK3-NEXT: [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
443 // CHECK3-NEXT: [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
444 // CHECK3-NEXT: br i1 [[TMP19]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
445 // CHECK3: .omp.lastprivate.then:
446 // CHECK3-NEXT: [[TMP20:%.*]] = load double, ptr [[G2]], align 8
447 // CHECK3-NEXT: store volatile double [[TMP20]], ptr [[TMP0]], align 8
448 // CHECK3-NEXT: [[TMP21:%.*]] = load ptr, ptr [[_TMP4]], align 4
449 // CHECK3-NEXT: [[TMP22:%.*]] = load double, ptr [[TMP21]], align 4
450 // CHECK3-NEXT: store volatile double [[TMP22]], ptr [[TMP2]], align 4
451 // CHECK3-NEXT: [[TMP23:%.*]] = load i32, ptr [[SVAR5]], align 4
452 // CHECK3-NEXT: store i32 [[TMP23]], ptr [[SVAR_ADDR]], align 4
453 // CHECK3-NEXT: [[TMP24:%.*]] = load float, ptr [[SFVAR6]], align 4
454 // CHECK3-NEXT: store float [[TMP24]], ptr [[SFVAR_ADDR]], align 4
455 // CHECK3-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
456 // CHECK3: .omp.lastprivate.done:
457 // CHECK3-NEXT: ret void
460 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
461 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
462 // CHECK3-NEXT: entry:
463 // CHECK3-NEXT: call void @__tgt_register_requires(i64 1)
464 // CHECK3-NEXT: ret void
467 // CHECK9-LABEL: define {{[^@]+}}@main
468 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
469 // CHECK9-NEXT: entry:
470 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
471 // CHECK9-NEXT: [[G:%.*]] = alloca double, align 8
472 // CHECK9-NEXT: [[G1:%.*]] = alloca ptr, align 8
473 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
474 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
475 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
476 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
477 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8
478 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
479 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
480 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
481 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8
482 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8
483 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8
484 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
485 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
486 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
487 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4
488 // CHECK9-NEXT: store ptr [[G]], ptr [[G1]], align 8
489 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
490 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4
491 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i64 8, i1 false)
492 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i64 0, i64 0
493 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
494 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i64 1
495 // CHECK9-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
496 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8
497 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
498 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8
499 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
500 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
501 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
502 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
503 // CHECK9-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4
504 // CHECK9-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4
505 // CHECK9-NEXT: [[TMP5:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8
506 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
507 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP6]], align 8
508 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
509 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP7]], align 8
510 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
511 // CHECK9-NEXT: store ptr null, ptr [[TMP8]], align 8
512 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
513 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP9]], align 8
514 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
515 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP10]], align 8
516 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
517 // CHECK9-NEXT: store ptr null, ptr [[TMP11]], align 8
518 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
519 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 8
520 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
521 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 8
522 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
523 // CHECK9-NEXT: store ptr null, ptr [[TMP14]], align 8
524 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
525 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP15]], align 8
526 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
527 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP16]], align 8
528 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
529 // CHECK9-NEXT: store ptr null, ptr [[TMP17]], align 8
530 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
531 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP18]], align 8
532 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
533 // CHECK9-NEXT: store i64 [[TMP5]], ptr [[TMP19]], align 8
534 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
535 // CHECK9-NEXT: store ptr null, ptr [[TMP20]], align 8
536 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
537 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
538 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
539 // CHECK9-NEXT: store i32 2, ptr [[TMP23]], align 4
540 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
541 // CHECK9-NEXT: store i32 5, ptr [[TMP24]], align 4
542 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
543 // CHECK9-NEXT: store ptr [[TMP21]], ptr [[TMP25]], align 8
544 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
545 // CHECK9-NEXT: store ptr [[TMP22]], ptr [[TMP26]], align 8
546 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
547 // CHECK9-NEXT: store ptr @.offload_sizes, ptr [[TMP27]], align 8
548 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
549 // CHECK9-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 8
550 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
551 // CHECK9-NEXT: store ptr null, ptr [[TMP29]], align 8
552 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
553 // CHECK9-NEXT: store ptr null, ptr [[TMP30]], align 8
554 // CHECK9-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
555 // CHECK9-NEXT: store i64 2, ptr [[TMP31]], align 8
556 // CHECK9-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
557 // CHECK9-NEXT: store i64 0, ptr [[TMP32]], align 8
558 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
559 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
560 // CHECK9-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
561 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
562 // CHECK9-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
563 // CHECK9-NEXT: store i32 0, ptr [[TMP35]], align 4
564 // CHECK9-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]])
565 // CHECK9-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
566 // CHECK9-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
567 // CHECK9: omp_offload.failed:
568 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i64 [[TMP5]]) #[[ATTR4:[0-9]+]]
569 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
570 // CHECK9: omp_offload.cont:
571 // CHECK9-NEXT: [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
572 // CHECK9-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
573 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
574 // CHECK9-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
575 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
576 // CHECK9: arraydestroy.body:
577 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
578 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
579 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
580 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
581 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
582 // CHECK9: arraydestroy.done2:
583 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
584 // CHECK9-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
585 // CHECK9-NEXT: ret i32 [[TMP39]]
588 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
589 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat {
590 // CHECK9-NEXT: entry:
591 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
592 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
593 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
594 // CHECK9-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
595 // CHECK9-NEXT: ret void
598 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
599 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
600 // CHECK9-NEXT: entry:
601 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
602 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
603 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
604 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
605 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
606 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
607 // CHECK9-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
608 // CHECK9-NEXT: ret void
611 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
612 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
613 // CHECK9-NEXT: entry:
614 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8
615 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
616 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
617 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8
618 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
619 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
620 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
621 // CHECK9-NEXT: [[SVAR_CASTED:%.*]] = alloca i64, align 8
622 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
623 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
624 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
625 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
626 // CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
627 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
628 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
629 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
630 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
631 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4
632 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4
633 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
634 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8
635 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4
636 // CHECK9-NEXT: store i32 [[TMP6]], ptr [[SVAR_CASTED]], align 4
637 // CHECK9-NEXT: [[TMP7:%.*]] = load i64, ptr [[SVAR_CASTED]], align 8
638 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, ptr [[TMP0]], i64 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]], i64 [[TMP7]])
639 // CHECK9-NEXT: ret void
642 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined
643 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i64 noundef [[SVAR:%.*]]) #[[ATTR3]] {
644 // CHECK9-NEXT: entry:
645 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
646 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
647 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8
648 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
649 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
650 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8
651 // CHECK9-NEXT: [[SVAR_ADDR:%.*]] = alloca i64, align 8
652 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
653 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
654 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
655 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
656 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
657 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
658 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
659 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
660 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
661 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
662 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
663 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8
664 // CHECK9-NEXT: [[SVAR7:%.*]] = alloca i32, align 4
665 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
666 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
667 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
668 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
669 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
670 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
671 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
672 // CHECK9-NEXT: store i64 [[SVAR]], ptr [[SVAR_ADDR]], align 8
673 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
674 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
675 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
676 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
677 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
678 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
679 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
680 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
681 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
682 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i64 2
683 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
684 // CHECK9: arrayctor.loop:
685 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
686 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
687 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i64 1
688 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
689 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
690 // CHECK9: arrayctor.cont:
691 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
692 // CHECK9-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
693 // CHECK9-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8
694 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
695 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
696 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
697 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
698 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
699 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
700 // CHECK9: cond.true:
701 // CHECK9-NEXT: br label [[COND_END:%.*]]
702 // CHECK9: cond.false:
703 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
704 // CHECK9-NEXT: br label [[COND_END]]
705 // CHECK9: cond.end:
706 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
707 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
708 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
709 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
710 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
711 // CHECK9: omp.inner.for.cond:
712 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
713 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
714 // CHECK9-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
715 // CHECK9-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
716 // CHECK9: omp.inner.for.cond.cleanup:
717 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
718 // CHECK9: omp.inner.for.body:
719 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
720 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
721 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
722 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4
723 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4
724 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
725 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
726 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]
727 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4
728 // CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 8
729 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4
730 // CHECK9-NEXT: [[IDXPROM9:%.*]] = sext i32 [[TMP15]] to i64
731 // CHECK9-NEXT: [[ARRAYIDX10:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM9]]
732 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX10]], ptr align 4 [[TMP14]], i64 4, i1 false)
733 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
734 // CHECK9: omp.body.continue:
735 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
736 // CHECK9: omp.inner.for.inc:
737 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
738 // CHECK9-NEXT: [[ADD11:%.*]] = add nsw i32 [[TMP16]], 1
739 // CHECK9-NEXT: store i32 [[ADD11]], ptr [[DOTOMP_IV]], align 4
740 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
741 // CHECK9: omp.inner.for.end:
742 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
743 // CHECK9: omp.loop.exit:
744 // CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
745 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4
746 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])
747 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
748 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
749 // CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
750 // CHECK9: .omp.lastprivate.then:
751 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 4
752 // CHECK9-NEXT: store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 4
753 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false)
754 // CHECK9-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP1]], i32 0, i32 0
755 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN12]], i64 2
756 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN12]], [[TMP22]]
757 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE13:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
758 // CHECK9: omp.arraycpy.body:
759 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
760 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN12]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
761 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
762 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
763 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
764 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]]
765 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE13]], label [[OMP_ARRAYCPY_BODY]]
766 // CHECK9: omp.arraycpy.done13:
767 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 8
768 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i64 4, i1 false)
769 // CHECK9-NEXT: [[TMP24:%.*]] = load i32, ptr [[SVAR7]], align 4
770 // CHECK9-NEXT: store i32 [[TMP24]], ptr [[SVAR_ADDR]], align 4
771 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
772 // CHECK9: .omp.lastprivate.done:
773 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
774 // CHECK9-NEXT: [[ARRAY_BEGIN14:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
775 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN14]], i64 2
776 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
777 // CHECK9: arraydestroy.body:
778 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
779 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
780 // CHECK9-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
781 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN14]]
782 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE15:%.*]], label [[ARRAYDESTROY_BODY]]
783 // CHECK9: arraydestroy.done15:
784 // CHECK9-NEXT: ret void
787 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
788 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
789 // CHECK9-NEXT: entry:
790 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
791 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
792 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
793 // CHECK9-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
794 // CHECK9-NEXT: ret void
797 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
798 // CHECK9-SAME: () #[[ATTR5:[0-9]+]] comdat {
799 // CHECK9-NEXT: entry:
800 // CHECK9-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
801 // CHECK9-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
802 // CHECK9-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
803 // CHECK9-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
804 // CHECK9-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
805 // CHECK9-NEXT: [[VAR:%.*]] = alloca ptr, align 8
806 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
807 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
808 // CHECK9-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 8
809 // CHECK9-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 8
810 // CHECK9-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 8
811 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
812 // CHECK9-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
813 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
814 // CHECK9-NEXT: store i32 0, ptr [[T_VAR]], align 4
815 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i64 8, i1 false)
816 // CHECK9-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i64 0, i64 0
817 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef signext 1)
818 // CHECK9-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i64 1
819 // CHECK9-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef signext 2)
820 // CHECK9-NEXT: store ptr [[TEST]], ptr [[VAR]], align 8
821 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 8
822 // CHECK9-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 8
823 // CHECK9-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
824 // CHECK9-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
825 // CHECK9-NEXT: [[TMP2:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
826 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
827 // CHECK9-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
828 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP4]], align 8
829 // CHECK9-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
830 // CHECK9-NEXT: store ptr [[VEC]], ptr [[TMP5]], align 8
831 // CHECK9-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
832 // CHECK9-NEXT: store ptr null, ptr [[TMP6]], align 8
833 // CHECK9-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
834 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP7]], align 8
835 // CHECK9-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
836 // CHECK9-NEXT: store i64 [[TMP2]], ptr [[TMP8]], align 8
837 // CHECK9-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
838 // CHECK9-NEXT: store ptr null, ptr [[TMP9]], align 8
839 // CHECK9-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
840 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP10]], align 8
841 // CHECK9-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
842 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[TMP11]], align 8
843 // CHECK9-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
844 // CHECK9-NEXT: store ptr null, ptr [[TMP12]], align 8
845 // CHECK9-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
846 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 8
847 // CHECK9-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
848 // CHECK9-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 8
849 // CHECK9-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
850 // CHECK9-NEXT: store ptr null, ptr [[TMP15]], align 8
851 // CHECK9-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
852 // CHECK9-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
853 // CHECK9-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
854 // CHECK9-NEXT: store i32 2, ptr [[TMP18]], align 4
855 // CHECK9-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
856 // CHECK9-NEXT: store i32 4, ptr [[TMP19]], align 4
857 // CHECK9-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
858 // CHECK9-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 8
859 // CHECK9-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
860 // CHECK9-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 8
861 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
862 // CHECK9-NEXT: store ptr @.offload_sizes.1, ptr [[TMP22]], align 8
863 // CHECK9-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
864 // CHECK9-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP23]], align 8
865 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
866 // CHECK9-NEXT: store ptr null, ptr [[TMP24]], align 8
867 // CHECK9-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
868 // CHECK9-NEXT: store ptr null, ptr [[TMP25]], align 8
869 // CHECK9-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
870 // CHECK9-NEXT: store i64 2, ptr [[TMP26]], align 8
871 // CHECK9-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
872 // CHECK9-NEXT: store i64 0, ptr [[TMP27]], align 8
873 // CHECK9-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
874 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4
875 // CHECK9-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
876 // CHECK9-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4
877 // CHECK9-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
878 // CHECK9-NEXT: store i32 0, ptr [[TMP30]], align 4
879 // CHECK9-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])
880 // CHECK9-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
881 // CHECK9-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
882 // CHECK9: omp_offload.failed:
883 // CHECK9-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[VEC]], i64 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]
884 // CHECK9-NEXT: br label [[OMP_OFFLOAD_CONT]]
885 // CHECK9: omp_offload.cont:
886 // CHECK9-NEXT: store i32 0, ptr [[RETVAL]], align 4
887 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
888 // CHECK9-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
889 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
890 // CHECK9: arraydestroy.body:
891 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP33]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
892 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
893 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
894 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
895 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
896 // CHECK9: arraydestroy.done2:
897 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
898 // CHECK9-NEXT: [[TMP34:%.*]] = load i32, ptr [[RETVAL]], align 4
899 // CHECK9-NEXT: ret i32 [[TMP34]]
902 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
903 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
904 // CHECK9-NEXT: entry:
905 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
906 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
907 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
908 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
909 // CHECK9-NEXT: store float 0.000000e+00, ptr [[F]], align 4
910 // CHECK9-NEXT: ret void
913 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
914 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
915 // CHECK9-NEXT: entry:
916 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
917 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
918 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
919 // CHECK9-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
920 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
921 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
922 // CHECK9-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
923 // CHECK9-NEXT: store float [[TMP0]], ptr [[F]], align 4
924 // CHECK9-NEXT: ret void
927 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
928 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
929 // CHECK9-NEXT: entry:
930 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
931 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
932 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
933 // CHECK9-NEXT: ret void
936 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
937 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
938 // CHECK9-NEXT: entry:
939 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
940 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
941 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
942 // CHECK9-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
943 // CHECK9-NEXT: ret void
946 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
947 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
948 // CHECK9-NEXT: entry:
949 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
950 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
951 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
952 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
953 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
954 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
955 // CHECK9-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef signext [[TMP0]])
956 // CHECK9-NEXT: ret void
959 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
960 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
961 // CHECK9-NEXT: entry:
962 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8
963 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
964 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
965 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8
966 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
967 // CHECK9-NEXT: [[T_VAR_CASTED:%.*]] = alloca i64, align 8
968 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
969 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
970 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
971 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
972 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
973 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
974 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
975 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
976 // CHECK9-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4
977 // CHECK9-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4
978 // CHECK9-NEXT: [[TMP4:%.*]] = load i64, ptr [[T_VAR_CASTED]], align 8
979 // CHECK9-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 8
980 // CHECK9-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], i64 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]])
981 // CHECK9-NEXT: ret void
984 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
985 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i64 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
986 // CHECK9-NEXT: entry:
987 // CHECK9-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
988 // CHECK9-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
989 // CHECK9-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 8
990 // CHECK9-NEXT: [[T_VAR_ADDR:%.*]] = alloca i64, align 8
991 // CHECK9-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 8
992 // CHECK9-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 8
993 // CHECK9-NEXT: [[TMP:%.*]] = alloca ptr, align 8
994 // CHECK9-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
995 // CHECK9-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
996 // CHECK9-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
997 // CHECK9-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
998 // CHECK9-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
999 // CHECK9-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1000 // CHECK9-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
1001 // CHECK9-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
1002 // CHECK9-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
1003 // CHECK9-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1004 // CHECK9-NEXT: [[_TMP6:%.*]] = alloca ptr, align 8
1005 // CHECK9-NEXT: [[I:%.*]] = alloca i32, align 4
1006 // CHECK9-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1007 // CHECK9-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1008 // CHECK9-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 8
1009 // CHECK9-NEXT: store i64 [[T_VAR]], ptr [[T_VAR_ADDR]], align 8
1010 // CHECK9-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 8
1011 // CHECK9-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 8
1012 // CHECK9-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 8
1013 // CHECK9-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 8
1014 // CHECK9-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 8
1015 // CHECK9-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 8
1016 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1017 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
1018 // CHECK9-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1019 // CHECK9-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1020 // CHECK9-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
1021 // CHECK9-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i64 2
1022 // CHECK9-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1023 // CHECK9: arrayctor.loop:
1024 // CHECK9-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1025 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1026 // CHECK9-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i64 1
1027 // CHECK9-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1028 // CHECK9-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1029 // CHECK9: arrayctor.cont:
1030 // CHECK9-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 8
1031 // CHECK9-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
1032 // CHECK9-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 8
1033 // CHECK9-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1034 // CHECK9-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1035 // CHECK9-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1036 // CHECK9-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1037 // CHECK9-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
1038 // CHECK9-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1039 // CHECK9: cond.true:
1040 // CHECK9-NEXT: br label [[COND_END:%.*]]
1041 // CHECK9: cond.false:
1042 // CHECK9-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1043 // CHECK9-NEXT: br label [[COND_END]]
1044 // CHECK9: cond.end:
1045 // CHECK9-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1046 // CHECK9-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1047 // CHECK9-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1048 // CHECK9-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1049 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1050 // CHECK9: omp.inner.for.cond:
1051 // CHECK9-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1052 // CHECK9-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1053 // CHECK9-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1054 // CHECK9-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1055 // CHECK9: omp.inner.for.cond.cleanup:
1056 // CHECK9-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1057 // CHECK9: omp.inner.for.body:
1058 // CHECK9-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1059 // CHECK9-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1060 // CHECK9-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1061 // CHECK9-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1062 // CHECK9-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4
1063 // CHECK9-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
1064 // CHECK9-NEXT: [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
1065 // CHECK9-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i64 0, i64 [[IDXPROM]]
1066 // CHECK9-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4
1067 // CHECK9-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 8
1068 // CHECK9-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4
1069 // CHECK9-NEXT: [[IDXPROM8:%.*]] = sext i32 [[TMP15]] to i64
1070 // CHECK9-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i64 0, i64 [[IDXPROM8]]
1071 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP14]], i64 4, i1 false)
1072 // CHECK9-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1073 // CHECK9: omp.body.continue:
1074 // CHECK9-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1075 // CHECK9: omp.inner.for.inc:
1076 // CHECK9-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1077 // CHECK9-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1
1078 // CHECK9-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
1079 // CHECK9-NEXT: br label [[OMP_INNER_FOR_COND]]
1080 // CHECK9: omp.inner.for.end:
1081 // CHECK9-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1082 // CHECK9: omp.loop.exit:
1083 // CHECK9-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1084 // CHECK9-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4
1085 // CHECK9-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])
1086 // CHECK9-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1087 // CHECK9-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
1088 // CHECK9-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1089 // CHECK9: .omp.lastprivate.then:
1090 // CHECK9-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 4
1091 // CHECK9-NEXT: store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 4
1092 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i64 8, i1 false)
1093 // CHECK9-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP1]], i32 0, i32 0
1094 // CHECK9-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN11]], i64 2
1095 // CHECK9-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP22]]
1096 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1097 // CHECK9: omp.arraycpy.body:
1098 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1099 // CHECK9-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1100 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i64 4, i1 false)
1101 // CHECK9-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1102 // CHECK9-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1103 // CHECK9-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]]
1104 // CHECK9-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
1105 // CHECK9: omp.arraycpy.done12:
1106 // CHECK9-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 8
1107 // CHECK9-NEXT: call void @llvm.memcpy.p0.p0.i64(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i64 4, i1 false)
1108 // CHECK9-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1109 // CHECK9: .omp.lastprivate.done:
1110 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
1111 // CHECK9-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
1112 // CHECK9-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN13]], i64 2
1113 // CHECK9-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1114 // CHECK9: arraydestroy.body:
1115 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1116 // CHECK9-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i64 -1
1117 // CHECK9-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1118 // CHECK9-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
1119 // CHECK9-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
1120 // CHECK9: arraydestroy.done14:
1121 // CHECK9-NEXT: ret void
1124 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1125 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1126 // CHECK9-NEXT: entry:
1127 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1128 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1129 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1130 // CHECK9-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1131 // CHECK9-NEXT: ret void
1134 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1135 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1136 // CHECK9-NEXT: entry:
1137 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1138 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1139 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1140 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1141 // CHECK9-NEXT: store i32 0, ptr [[F]], align 4
1142 // CHECK9-NEXT: ret void
1145 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1146 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef signext [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1147 // CHECK9-NEXT: entry:
1148 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1149 // CHECK9-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1150 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1151 // CHECK9-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1152 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1153 // CHECK9-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1154 // CHECK9-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1155 // CHECK9-NEXT: store i32 [[TMP0]], ptr [[F]], align 4
1156 // CHECK9-NEXT: ret void
1159 // CHECK9-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1160 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat {
1161 // CHECK9-NEXT: entry:
1162 // CHECK9-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 8
1163 // CHECK9-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1164 // CHECK9-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1165 // CHECK9-NEXT: ret void
1168 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1169 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] {
1170 // CHECK9-NEXT: entry:
1171 // CHECK9-NEXT: call void @__tgt_register_requires(i64 1)
1172 // CHECK9-NEXT: ret void
1175 // CHECK11-LABEL: define {{[^@]+}}@main
1176 // CHECK11-SAME: () #[[ATTR0:[0-9]+]] {
1177 // CHECK11-NEXT: entry:
1178 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1179 // CHECK11-NEXT: [[G:%.*]] = alloca double, align 8
1180 // CHECK11-NEXT: [[G1:%.*]] = alloca ptr, align 4
1181 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1182 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1183 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1184 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S], align 4
1185 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4
1186 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1187 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1188 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
1189 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4
1190 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4
1191 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4
1192 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1193 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1194 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1195 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4
1196 // CHECK11-NEXT: store ptr [[G]], ptr [[G1]], align 4
1197 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1198 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4
1199 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const.main.vec, i32 8, i1 false)
1200 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1201 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], float noundef 1.000000e+00)
1202 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYINIT_BEGIN]], i32 1
1203 // CHECK11-NEXT: call void @_ZN1SIfEC1Ef(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], float noundef 2.000000e+00)
1204 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4
1205 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
1206 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4
1207 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1208 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
1209 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
1210 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1211 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr @_ZZ4mainE4svar, align 4
1212 // CHECK11-NEXT: store i32 [[TMP4]], ptr [[SVAR_CASTED]], align 4
1213 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4
1214 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1215 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP6]], align 4
1216 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1217 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP7]], align 4
1218 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1219 // CHECK11-NEXT: store ptr null, ptr [[TMP8]], align 4
1220 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1221 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP9]], align 4
1222 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1223 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP10]], align 4
1224 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1225 // CHECK11-NEXT: store ptr null, ptr [[TMP11]], align 4
1226 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1227 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP12]], align 4
1228 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1229 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP13]], align 4
1230 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1231 // CHECK11-NEXT: store ptr null, ptr [[TMP14]], align 4
1232 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1233 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP15]], align 4
1234 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1235 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP16]], align 4
1236 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1237 // CHECK11-NEXT: store ptr null, ptr [[TMP17]], align 4
1238 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
1239 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP18]], align 4
1240 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
1241 // CHECK11-NEXT: store i32 [[TMP5]], ptr [[TMP19]], align 4
1242 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
1243 // CHECK11-NEXT: store ptr null, ptr [[TMP20]], align 4
1244 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1245 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1246 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1247 // CHECK11-NEXT: store i32 2, ptr [[TMP23]], align 4
1248 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1249 // CHECK11-NEXT: store i32 5, ptr [[TMP24]], align 4
1250 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1251 // CHECK11-NEXT: store ptr [[TMP21]], ptr [[TMP25]], align 4
1252 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1253 // CHECK11-NEXT: store ptr [[TMP22]], ptr [[TMP26]], align 4
1254 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1255 // CHECK11-NEXT: store ptr @.offload_sizes, ptr [[TMP27]], align 4
1256 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1257 // CHECK11-NEXT: store ptr @.offload_maptypes, ptr [[TMP28]], align 4
1258 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1259 // CHECK11-NEXT: store ptr null, ptr [[TMP29]], align 4
1260 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1261 // CHECK11-NEXT: store ptr null, ptr [[TMP30]], align 4
1262 // CHECK11-NEXT: [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1263 // CHECK11-NEXT: store i64 2, ptr [[TMP31]], align 8
1264 // CHECK11-NEXT: [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1265 // CHECK11-NEXT: store i64 0, ptr [[TMP32]], align 8
1266 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1267 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
1268 // CHECK11-NEXT: [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1269 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
1270 // CHECK11-NEXT: [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1271 // CHECK11-NEXT: store i32 0, ptr [[TMP35]], align 4
1272 // CHECK11-NEXT: [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.region_id, ptr [[KERNEL_ARGS]])
1273 // CHECK11-NEXT: [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
1274 // CHECK11-NEXT: br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1275 // CHECK11: omp_offload.failed:
1276 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]], i32 [[TMP5]]) #[[ATTR4:[0-9]+]]
1277 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1278 // CHECK11: omp_offload.cont:
1279 // CHECK11-NEXT: [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
1280 // CHECK11-NEXT: store i32 [[CALL]], ptr [[RETVAL]], align 4
1281 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR]], i32 0, i32 0
1282 // CHECK11-NEXT: [[TMP38:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1283 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1284 // CHECK11: arraydestroy.body:
1285 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP38]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1286 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1287 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1288 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1289 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1290 // CHECK11: arraydestroy.done2:
1291 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1292 // CHECK11-NEXT: [[TMP39:%.*]] = load i32, ptr [[RETVAL]], align 4
1293 // CHECK11-NEXT: ret i32 [[TMP39]]
1296 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ev
1297 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1:[0-9]+]] comdat align 2 {
1298 // CHECK11-NEXT: entry:
1299 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1300 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1301 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1302 // CHECK11-NEXT: call void @_ZN1SIfEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1303 // CHECK11-NEXT: ret void
1306 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC1Ef
1307 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1308 // CHECK11-NEXT: entry:
1309 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1310 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1311 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1312 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
1313 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1314 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1315 // CHECK11-NEXT: call void @_ZN1SIfEC2Ef(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], float noundef [[TMP0]])
1316 // CHECK11-NEXT: ret void
1319 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94
1320 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3:[0-9]+]] {
1321 // CHECK11-NEXT: entry:
1322 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4
1323 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1324 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1325 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4
1326 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
1327 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1328 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1329 // CHECK11-NEXT: [[SVAR_CASTED:%.*]] = alloca i32, align 4
1330 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1331 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1332 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1333 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1334 // CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
1335 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1336 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1337 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1338 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4
1339 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4
1340 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4
1341 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
1342 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4
1343 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[SVAR_ADDR]], align 4
1344 // CHECK11-NEXT: store i32 [[TMP6]], ptr [[SVAR_CASTED]], align 4
1345 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[SVAR_CASTED]], align 4
1346 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined, ptr [[TMP0]], i32 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]], i32 [[TMP7]])
1347 // CHECK11-NEXT: ret void
1350 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l94.omp_outlined
1351 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]], i32 noundef [[SVAR:%.*]]) #[[ATTR3]] {
1352 // CHECK11-NEXT: entry:
1353 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1354 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1355 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4
1356 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1357 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1358 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4
1359 // CHECK11-NEXT: [[SVAR_ADDR:%.*]] = alloca i32, align 4
1360 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1361 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1362 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1363 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1364 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1365 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1366 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1367 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
1368 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
1369 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S], align 4
1370 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S:%.*]], align 4
1371 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4
1372 // CHECK11-NEXT: [[SVAR7:%.*]] = alloca i32, align 4
1373 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1374 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1375 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1376 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1377 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1378 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1379 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1380 // CHECK11-NEXT: store i32 [[SVAR]], ptr [[SVAR_ADDR]], align 4
1381 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1382 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1383 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1384 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4
1385 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1386 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
1387 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1388 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1389 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
1390 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN]], i32 2
1391 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1392 // CHECK11: arrayctor.loop:
1393 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1394 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1395 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYCTOR_CUR]], i32 1
1396 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1397 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1398 // CHECK11: arrayctor.cont:
1399 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1400 // CHECK11-NEXT: call void @_ZN1SIfEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
1401 // CHECK11-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4
1402 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1403 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1404 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1405 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1406 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
1407 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1408 // CHECK11: cond.true:
1409 // CHECK11-NEXT: br label [[COND_END:%.*]]
1410 // CHECK11: cond.false:
1411 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1412 // CHECK11-NEXT: br label [[COND_END]]
1413 // CHECK11: cond.end:
1414 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1415 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1416 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1417 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1418 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1419 // CHECK11: omp.inner.for.cond:
1420 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1421 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1422 // CHECK11-NEXT: [[CMP8:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1423 // CHECK11-NEXT: br i1 [[CMP8]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1424 // CHECK11: omp.inner.for.cond.cleanup:
1425 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1426 // CHECK11: omp.inner.for.body:
1427 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1428 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1429 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1430 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1431 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4
1432 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
1433 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP13]]
1434 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4
1435 // CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 4
1436 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4
1437 // CHECK11-NEXT: [[ARRAYIDX9:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 [[TMP15]]
1438 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX9]], ptr align 4 [[TMP14]], i32 4, i1 false)
1439 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1440 // CHECK11: omp.body.continue:
1441 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1442 // CHECK11: omp.inner.for.inc:
1443 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1444 // CHECK11-NEXT: [[ADD10:%.*]] = add nsw i32 [[TMP16]], 1
1445 // CHECK11-NEXT: store i32 [[ADD10]], ptr [[DOTOMP_IV]], align 4
1446 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1447 // CHECK11: omp.inner.for.end:
1448 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1449 // CHECK11: omp.loop.exit:
1450 // CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1451 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4
1452 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])
1453 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1454 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
1455 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1456 // CHECK11: .omp.lastprivate.then:
1457 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 4
1458 // CHECK11-NEXT: store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 4
1459 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)
1460 // CHECK11-NEXT: [[ARRAY_BEGIN11:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[TMP1]], i32 0, i32 0
1461 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN11]], i32 2
1462 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN11]], [[TMP22]]
1463 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE12:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1464 // CHECK11: omp.arraycpy.body:
1465 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1466 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN11]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1467 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
1468 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1469 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1470 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]]
1471 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE12]], label [[OMP_ARRAYCPY_BODY]]
1472 // CHECK11: omp.arraycpy.done12:
1473 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 4
1474 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i32 4, i1 false)
1475 // CHECK11-NEXT: [[TMP24:%.*]] = load i32, ptr [[SVAR7]], align 4
1476 // CHECK11-NEXT: store i32 [[TMP24]], ptr [[SVAR_ADDR]], align 4
1477 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1478 // CHECK11: .omp.lastprivate.done:
1479 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
1480 // CHECK11-NEXT: [[ARRAY_BEGIN13:%.*]] = getelementptr inbounds [2 x %struct.S], ptr [[S_ARR4]], i32 0, i32 0
1481 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAY_BEGIN13]], i32 2
1482 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1483 // CHECK11: arraydestroy.body:
1484 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP25]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1485 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1486 // CHECK11-NEXT: call void @_ZN1SIfED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1487 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN13]]
1488 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE14:%.*]], label [[ARRAYDESTROY_BODY]]
1489 // CHECK11: arraydestroy.done14:
1490 // CHECK11-NEXT: ret void
1493 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED1Ev
1494 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1495 // CHECK11-NEXT: entry:
1496 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1497 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1498 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1499 // CHECK11-NEXT: call void @_ZN1SIfED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1500 // CHECK11-NEXT: ret void
1503 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
1504 // CHECK11-SAME: () #[[ATTR5:[0-9]+]] comdat {
1505 // CHECK11-NEXT: entry:
1506 // CHECK11-NEXT: [[RETVAL:%.*]] = alloca i32, align 4
1507 // CHECK11-NEXT: [[TEST:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1508 // CHECK11-NEXT: [[T_VAR:%.*]] = alloca i32, align 4
1509 // CHECK11-NEXT: [[VEC:%.*]] = alloca [2 x i32], align 4
1510 // CHECK11-NEXT: [[S_ARR:%.*]] = alloca [2 x %struct.S.0], align 4
1511 // CHECK11-NEXT: [[VAR:%.*]] = alloca ptr, align 4
1512 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1513 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1514 // CHECK11-NEXT: [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [4 x ptr], align 4
1515 // CHECK11-NEXT: [[DOTOFFLOAD_PTRS:%.*]] = alloca [4 x ptr], align 4
1516 // CHECK11-NEXT: [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [4 x ptr], align 4
1517 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1518 // CHECK11-NEXT: [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1519 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]])
1520 // CHECK11-NEXT: store i32 0, ptr [[T_VAR]], align 4
1521 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[VEC]], ptr align 4 @__const._Z5tmainIiET_v.vec, i32 8, i1 false)
1522 // CHECK11-NEXT: [[ARRAYINIT_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1523 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_BEGIN]], i32 noundef 1)
1524 // CHECK11-NEXT: [[ARRAYINIT_ELEMENT:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYINIT_BEGIN]], i32 1
1525 // CHECK11-NEXT: call void @_ZN1SIiEC1Ei(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYINIT_ELEMENT]], i32 noundef 2)
1526 // CHECK11-NEXT: store ptr [[TEST]], ptr [[VAR]], align 4
1527 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VAR]], align 4
1528 // CHECK11-NEXT: store ptr [[TMP0]], ptr [[TMP]], align 4
1529 // CHECK11-NEXT: [[TMP1:%.*]] = load i32, ptr [[T_VAR]], align 4
1530 // CHECK11-NEXT: store i32 [[TMP1]], ptr [[T_VAR_CASTED]], align 4
1531 // CHECK11-NEXT: [[TMP2:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
1532 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1533 // CHECK11-NEXT: [[TMP4:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1534 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP4]], align 4
1535 // CHECK11-NEXT: [[TMP5:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1536 // CHECK11-NEXT: store ptr [[VEC]], ptr [[TMP5]], align 4
1537 // CHECK11-NEXT: [[TMP6:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1538 // CHECK11-NEXT: store ptr null, ptr [[TMP6]], align 4
1539 // CHECK11-NEXT: [[TMP7:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
1540 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP7]], align 4
1541 // CHECK11-NEXT: [[TMP8:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
1542 // CHECK11-NEXT: store i32 [[TMP2]], ptr [[TMP8]], align 4
1543 // CHECK11-NEXT: [[TMP9:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
1544 // CHECK11-NEXT: store ptr null, ptr [[TMP9]], align 4
1545 // CHECK11-NEXT: [[TMP10:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
1546 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP10]], align 4
1547 // CHECK11-NEXT: [[TMP11:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
1548 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[TMP11]], align 4
1549 // CHECK11-NEXT: [[TMP12:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
1550 // CHECK11-NEXT: store ptr null, ptr [[TMP12]], align 4
1551 // CHECK11-NEXT: [[TMP13:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
1552 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP13]], align 4
1553 // CHECK11-NEXT: [[TMP14:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
1554 // CHECK11-NEXT: store ptr [[TMP3]], ptr [[TMP14]], align 4
1555 // CHECK11-NEXT: [[TMP15:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
1556 // CHECK11-NEXT: store ptr null, ptr [[TMP15]], align 4
1557 // CHECK11-NEXT: [[TMP16:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1558 // CHECK11-NEXT: [[TMP17:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1559 // CHECK11-NEXT: [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1560 // CHECK11-NEXT: store i32 2, ptr [[TMP18]], align 4
1561 // CHECK11-NEXT: [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1562 // CHECK11-NEXT: store i32 4, ptr [[TMP19]], align 4
1563 // CHECK11-NEXT: [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1564 // CHECK11-NEXT: store ptr [[TMP16]], ptr [[TMP20]], align 4
1565 // CHECK11-NEXT: [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1566 // CHECK11-NEXT: store ptr [[TMP17]], ptr [[TMP21]], align 4
1567 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1568 // CHECK11-NEXT: store ptr @.offload_sizes.1, ptr [[TMP22]], align 4
1569 // CHECK11-NEXT: [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1570 // CHECK11-NEXT: store ptr @.offload_maptypes.2, ptr [[TMP23]], align 4
1571 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1572 // CHECK11-NEXT: store ptr null, ptr [[TMP24]], align 4
1573 // CHECK11-NEXT: [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1574 // CHECK11-NEXT: store ptr null, ptr [[TMP25]], align 4
1575 // CHECK11-NEXT: [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1576 // CHECK11-NEXT: store i64 2, ptr [[TMP26]], align 8
1577 // CHECK11-NEXT: [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1578 // CHECK11-NEXT: store i64 0, ptr [[TMP27]], align 8
1579 // CHECK11-NEXT: [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1580 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP28]], align 4
1581 // CHECK11-NEXT: [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1582 // CHECK11-NEXT: store [3 x i32] zeroinitializer, ptr [[TMP29]], align 4
1583 // CHECK11-NEXT: [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1584 // CHECK11-NEXT: store i32 0, ptr [[TMP30]], align 4
1585 // CHECK11-NEXT: [[TMP31:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.region_id, ptr [[KERNEL_ARGS]])
1586 // CHECK11-NEXT: [[TMP32:%.*]] = icmp ne i32 [[TMP31]], 0
1587 // CHECK11-NEXT: br i1 [[TMP32]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1588 // CHECK11: omp_offload.failed:
1589 // CHECK11-NEXT: call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49(ptr [[VEC]], i32 [[TMP2]], ptr [[S_ARR]], ptr [[TMP3]]) #[[ATTR4]]
1590 // CHECK11-NEXT: br label [[OMP_OFFLOAD_CONT]]
1591 // CHECK11: omp_offload.cont:
1592 // CHECK11-NEXT: store i32 0, ptr [[RETVAL]], align 4
1593 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR]], i32 0, i32 0
1594 // CHECK11-NEXT: [[TMP33:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
1595 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1596 // CHECK11: arraydestroy.body:
1597 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP33]], [[OMP_OFFLOAD_CONT]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1598 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1599 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1600 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN]]
1601 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE2:%.*]], label [[ARRAYDESTROY_BODY]]
1602 // CHECK11: arraydestroy.done2:
1603 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[TEST]]) #[[ATTR4]]
1604 // CHECK11-NEXT: [[TMP34:%.*]] = load i32, ptr [[RETVAL]], align 4
1605 // CHECK11-NEXT: ret i32 [[TMP34]]
1608 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ev
1609 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1610 // CHECK11-NEXT: entry:
1611 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1612 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1613 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1614 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1615 // CHECK11-NEXT: store float 0.000000e+00, ptr [[F]], align 4
1616 // CHECK11-NEXT: ret void
1619 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfEC2Ef
1620 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], float noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1621 // CHECK11-NEXT: entry:
1622 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1623 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca float, align 4
1624 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1625 // CHECK11-NEXT: store float [[A]], ptr [[A_ADDR]], align 4
1626 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1627 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S:%.*]], ptr [[THIS1]], i32 0, i32 0
1628 // CHECK11-NEXT: [[TMP0:%.*]] = load float, ptr [[A_ADDR]], align 4
1629 // CHECK11-NEXT: store float [[TMP0]], ptr [[F]], align 4
1630 // CHECK11-NEXT: ret void
1633 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIfED2Ev
1634 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1635 // CHECK11-NEXT: entry:
1636 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1637 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1638 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1639 // CHECK11-NEXT: ret void
1642 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ev
1643 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1644 // CHECK11-NEXT: entry:
1645 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1646 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1647 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1648 // CHECK11-NEXT: call void @_ZN1SIiEC2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]])
1649 // CHECK11-NEXT: ret void
1652 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC1Ei
1653 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1654 // CHECK11-NEXT: entry:
1655 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1656 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1657 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1658 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1659 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1660 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1661 // CHECK11-NEXT: call void @_ZN1SIiEC2Ei(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]], i32 noundef [[TMP0]])
1662 // CHECK11-NEXT: ret void
1665 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49
1666 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1667 // CHECK11-NEXT: entry:
1668 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4
1669 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1670 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1671 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4
1672 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1673 // CHECK11-NEXT: [[T_VAR_CASTED:%.*]] = alloca i32, align 4
1674 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1675 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1676 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1677 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1678 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1679 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1680 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1681 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4
1682 // CHECK11-NEXT: [[TMP3:%.*]] = load i32, ptr [[T_VAR_ADDR]], align 4
1683 // CHECK11-NEXT: store i32 [[TMP3]], ptr [[T_VAR_CASTED]], align 4
1684 // CHECK11-NEXT: [[TMP4:%.*]] = load i32, ptr [[T_VAR_CASTED]], align 4
1685 // CHECK11-NEXT: [[TMP5:%.*]] = load ptr, ptr [[TMP]], align 4
1686 // CHECK11-NEXT: call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined, ptr [[TMP0]], i32 [[TMP4]], ptr [[TMP1]], ptr [[TMP5]])
1687 // CHECK11-NEXT: ret void
1690 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l49.omp_outlined
1691 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[VEC:%.*]], i32 noundef [[T_VAR:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[S_ARR:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[VAR:%.*]]) #[[ATTR3]] {
1692 // CHECK11-NEXT: entry:
1693 // CHECK11-NEXT: [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1694 // CHECK11-NEXT: [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1695 // CHECK11-NEXT: [[VEC_ADDR:%.*]] = alloca ptr, align 4
1696 // CHECK11-NEXT: [[T_VAR_ADDR:%.*]] = alloca i32, align 4
1697 // CHECK11-NEXT: [[S_ARR_ADDR:%.*]] = alloca ptr, align 4
1698 // CHECK11-NEXT: [[VAR_ADDR:%.*]] = alloca ptr, align 4
1699 // CHECK11-NEXT: [[TMP:%.*]] = alloca ptr, align 4
1700 // CHECK11-NEXT: [[DOTOMP_IV:%.*]] = alloca i32, align 4
1701 // CHECK11-NEXT: [[_TMP1:%.*]] = alloca i32, align 4
1702 // CHECK11-NEXT: [[DOTOMP_LB:%.*]] = alloca i32, align 4
1703 // CHECK11-NEXT: [[DOTOMP_UB:%.*]] = alloca i32, align 4
1704 // CHECK11-NEXT: [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1705 // CHECK11-NEXT: [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1706 // CHECK11-NEXT: [[T_VAR2:%.*]] = alloca i32, align 4
1707 // CHECK11-NEXT: [[VEC3:%.*]] = alloca [2 x i32], align 4
1708 // CHECK11-NEXT: [[S_ARR4:%.*]] = alloca [2 x %struct.S.0], align 4
1709 // CHECK11-NEXT: [[VAR5:%.*]] = alloca [[STRUCT_S_0:%.*]], align 4
1710 // CHECK11-NEXT: [[_TMP6:%.*]] = alloca ptr, align 4
1711 // CHECK11-NEXT: [[I:%.*]] = alloca i32, align 4
1712 // CHECK11-NEXT: store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1713 // CHECK11-NEXT: store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1714 // CHECK11-NEXT: store ptr [[VEC]], ptr [[VEC_ADDR]], align 4
1715 // CHECK11-NEXT: store i32 [[T_VAR]], ptr [[T_VAR_ADDR]], align 4
1716 // CHECK11-NEXT: store ptr [[S_ARR]], ptr [[S_ARR_ADDR]], align 4
1717 // CHECK11-NEXT: store ptr [[VAR]], ptr [[VAR_ADDR]], align 4
1718 // CHECK11-NEXT: [[TMP0:%.*]] = load ptr, ptr [[VEC_ADDR]], align 4
1719 // CHECK11-NEXT: [[TMP1:%.*]] = load ptr, ptr [[S_ARR_ADDR]], align 4
1720 // CHECK11-NEXT: [[TMP2:%.*]] = load ptr, ptr [[VAR_ADDR]], align 4
1721 // CHECK11-NEXT: store ptr [[TMP2]], ptr [[TMP]], align 4
1722 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_LB]], align 4
1723 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_UB]], align 4
1724 // CHECK11-NEXT: store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1725 // CHECK11-NEXT: store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1726 // CHECK11-NEXT: [[ARRAY_BEGIN:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
1727 // CHECK11-NEXT: [[ARRAYCTOR_END:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN]], i32 2
1728 // CHECK11-NEXT: br label [[ARRAYCTOR_LOOP:%.*]]
1729 // CHECK11: arrayctor.loop:
1730 // CHECK11-NEXT: [[ARRAYCTOR_CUR:%.*]] = phi ptr [ [[ARRAY_BEGIN]], [[ENTRY:%.*]] ], [ [[ARRAYCTOR_NEXT:%.*]], [[ARRAYCTOR_LOOP]] ]
1731 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYCTOR_CUR]])
1732 // CHECK11-NEXT: [[ARRAYCTOR_NEXT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYCTOR_CUR]], i32 1
1733 // CHECK11-NEXT: [[ARRAYCTOR_DONE:%.*]] = icmp eq ptr [[ARRAYCTOR_NEXT]], [[ARRAYCTOR_END]]
1734 // CHECK11-NEXT: br i1 [[ARRAYCTOR_DONE]], label [[ARRAYCTOR_CONT:%.*]], label [[ARRAYCTOR_LOOP]]
1735 // CHECK11: arrayctor.cont:
1736 // CHECK11-NEXT: [[TMP3:%.*]] = load ptr, ptr [[TMP]], align 4
1737 // CHECK11-NEXT: call void @_ZN1SIiEC1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]])
1738 // CHECK11-NEXT: store ptr [[VAR5]], ptr [[_TMP6]], align 4
1739 // CHECK11-NEXT: [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1740 // CHECK11-NEXT: [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1741 // CHECK11-NEXT: call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP5]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1742 // CHECK11-NEXT: [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1743 // CHECK11-NEXT: [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
1744 // CHECK11-NEXT: br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1745 // CHECK11: cond.true:
1746 // CHECK11-NEXT: br label [[COND_END:%.*]]
1747 // CHECK11: cond.false:
1748 // CHECK11-NEXT: [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1749 // CHECK11-NEXT: br label [[COND_END]]
1750 // CHECK11: cond.end:
1751 // CHECK11-NEXT: [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1752 // CHECK11-NEXT: store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1753 // CHECK11-NEXT: [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1754 // CHECK11-NEXT: store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1755 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND:%.*]]
1756 // CHECK11: omp.inner.for.cond:
1757 // CHECK11-NEXT: [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1758 // CHECK11-NEXT: [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1759 // CHECK11-NEXT: [[CMP7:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1760 // CHECK11-NEXT: br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_COND_CLEANUP:%.*]]
1761 // CHECK11: omp.inner.for.cond.cleanup:
1762 // CHECK11-NEXT: br label [[OMP_INNER_FOR_END:%.*]]
1763 // CHECK11: omp.inner.for.body:
1764 // CHECK11-NEXT: [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1765 // CHECK11-NEXT: [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1766 // CHECK11-NEXT: [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1767 // CHECK11-NEXT: store i32 [[ADD]], ptr [[I]], align 4
1768 // CHECK11-NEXT: [[TMP12:%.*]] = load i32, ptr [[T_VAR2]], align 4
1769 // CHECK11-NEXT: [[TMP13:%.*]] = load i32, ptr [[I]], align 4
1770 // CHECK11-NEXT: [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[VEC3]], i32 0, i32 [[TMP13]]
1771 // CHECK11-NEXT: store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4
1772 // CHECK11-NEXT: [[TMP14:%.*]] = load ptr, ptr [[_TMP6]], align 4
1773 // CHECK11-NEXT: [[TMP15:%.*]] = load i32, ptr [[I]], align 4
1774 // CHECK11-NEXT: [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 [[TMP15]]
1775 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[ARRAYIDX8]], ptr align 4 [[TMP14]], i32 4, i1 false)
1776 // CHECK11-NEXT: br label [[OMP_BODY_CONTINUE:%.*]]
1777 // CHECK11: omp.body.continue:
1778 // CHECK11-NEXT: br label [[OMP_INNER_FOR_INC:%.*]]
1779 // CHECK11: omp.inner.for.inc:
1780 // CHECK11-NEXT: [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1781 // CHECK11-NEXT: [[ADD9:%.*]] = add nsw i32 [[TMP16]], 1
1782 // CHECK11-NEXT: store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
1783 // CHECK11-NEXT: br label [[OMP_INNER_FOR_COND]]
1784 // CHECK11: omp.inner.for.end:
1785 // CHECK11-NEXT: br label [[OMP_LOOP_EXIT:%.*]]
1786 // CHECK11: omp.loop.exit:
1787 // CHECK11-NEXT: [[TMP17:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1788 // CHECK11-NEXT: [[TMP18:%.*]] = load i32, ptr [[TMP17]], align 4
1789 // CHECK11-NEXT: call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP18]])
1790 // CHECK11-NEXT: [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IS_LAST]], align 4
1791 // CHECK11-NEXT: [[TMP20:%.*]] = icmp ne i32 [[TMP19]], 0
1792 // CHECK11-NEXT: br i1 [[TMP20]], label [[DOTOMP_LASTPRIVATE_THEN:%.*]], label [[DOTOMP_LASTPRIVATE_DONE:%.*]]
1793 // CHECK11: .omp.lastprivate.then:
1794 // CHECK11-NEXT: [[TMP21:%.*]] = load i32, ptr [[T_VAR2]], align 4
1795 // CHECK11-NEXT: store i32 [[TMP21]], ptr [[T_VAR_ADDR]], align 4
1796 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP0]], ptr align 4 [[VEC3]], i32 8, i1 false)
1797 // CHECK11-NEXT: [[ARRAY_BEGIN10:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[TMP1]], i32 0, i32 0
1798 // CHECK11-NEXT: [[TMP22:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN10]], i32 2
1799 // CHECK11-NEXT: [[OMP_ARRAYCPY_ISEMPTY:%.*]] = icmp eq ptr [[ARRAY_BEGIN10]], [[TMP22]]
1800 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_ISEMPTY]], label [[OMP_ARRAYCPY_DONE11:%.*]], label [[OMP_ARRAYCPY_BODY:%.*]]
1801 // CHECK11: omp.arraycpy.body:
1802 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRCELEMENTPAST:%.*]] = phi ptr [ [[S_ARR4]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_SRC_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1803 // CHECK11-NEXT: [[OMP_ARRAYCPY_DESTELEMENTPAST:%.*]] = phi ptr [ [[ARRAY_BEGIN10]], [[DOTOMP_LASTPRIVATE_THEN]] ], [ [[OMP_ARRAYCPY_DEST_ELEMENT:%.*]], [[OMP_ARRAYCPY_BODY]] ]
1804 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[OMP_ARRAYCPY_DESTELEMENTPAST]], ptr align 4 [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 4, i1 false)
1805 // CHECK11-NEXT: [[OMP_ARRAYCPY_DEST_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_DESTELEMENTPAST]], i32 1
1806 // CHECK11-NEXT: [[OMP_ARRAYCPY_SRC_ELEMENT]] = getelementptr [[STRUCT_S_0]], ptr [[OMP_ARRAYCPY_SRCELEMENTPAST]], i32 1
1807 // CHECK11-NEXT: [[OMP_ARRAYCPY_DONE:%.*]] = icmp eq ptr [[OMP_ARRAYCPY_DEST_ELEMENT]], [[TMP22]]
1808 // CHECK11-NEXT: br i1 [[OMP_ARRAYCPY_DONE]], label [[OMP_ARRAYCPY_DONE11]], label [[OMP_ARRAYCPY_BODY]]
1809 // CHECK11: omp.arraycpy.done11:
1810 // CHECK11-NEXT: [[TMP23:%.*]] = load ptr, ptr [[_TMP6]], align 4
1811 // CHECK11-NEXT: call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[TMP3]], ptr align 4 [[TMP23]], i32 4, i1 false)
1812 // CHECK11-NEXT: br label [[DOTOMP_LASTPRIVATE_DONE]]
1813 // CHECK11: .omp.lastprivate.done:
1814 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[VAR5]]) #[[ATTR4]]
1815 // CHECK11-NEXT: [[ARRAY_BEGIN12:%.*]] = getelementptr inbounds [2 x %struct.S.0], ptr [[S_ARR4]], i32 0, i32 0
1816 // CHECK11-NEXT: [[TMP24:%.*]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAY_BEGIN12]], i32 2
1817 // CHECK11-NEXT: br label [[ARRAYDESTROY_BODY:%.*]]
1818 // CHECK11: arraydestroy.body:
1819 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENTPAST:%.*]] = phi ptr [ [[TMP24]], [[DOTOMP_LASTPRIVATE_DONE]] ], [ [[ARRAYDESTROY_ELEMENT:%.*]], [[ARRAYDESTROY_BODY]] ]
1820 // CHECK11-NEXT: [[ARRAYDESTROY_ELEMENT]] = getelementptr inbounds [[STRUCT_S_0]], ptr [[ARRAYDESTROY_ELEMENTPAST]], i32 -1
1821 // CHECK11-NEXT: call void @_ZN1SIiED1Ev(ptr noundef nonnull align 4 dereferenceable(4) [[ARRAYDESTROY_ELEMENT]]) #[[ATTR4]]
1822 // CHECK11-NEXT: [[ARRAYDESTROY_DONE:%.*]] = icmp eq ptr [[ARRAYDESTROY_ELEMENT]], [[ARRAY_BEGIN12]]
1823 // CHECK11-NEXT: br i1 [[ARRAYDESTROY_DONE]], label [[ARRAYDESTROY_DONE13:%.*]], label [[ARRAYDESTROY_BODY]]
1824 // CHECK11: arraydestroy.done13:
1825 // CHECK11-NEXT: ret void
1828 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED1Ev
1829 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1830 // CHECK11-NEXT: entry:
1831 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1832 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1833 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1834 // CHECK11-NEXT: call void @_ZN1SIiED2Ev(ptr noundef nonnull align 4 dereferenceable(4) [[THIS1]]) #[[ATTR4]]
1835 // CHECK11-NEXT: ret void
1838 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ev
1839 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1840 // CHECK11-NEXT: entry:
1841 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1842 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1843 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1844 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1845 // CHECK11-NEXT: store i32 0, ptr [[F]], align 4
1846 // CHECK11-NEXT: ret void
1849 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiEC2Ei
1850 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]], i32 noundef [[A:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1851 // CHECK11-NEXT: entry:
1852 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1853 // CHECK11-NEXT: [[A_ADDR:%.*]] = alloca i32, align 4
1854 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1855 // CHECK11-NEXT: store i32 [[A]], ptr [[A_ADDR]], align 4
1856 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1857 // CHECK11-NEXT: [[F:%.*]] = getelementptr inbounds [[STRUCT_S_0:%.*]], ptr [[THIS1]], i32 0, i32 0
1858 // CHECK11-NEXT: [[TMP0:%.*]] = load i32, ptr [[A_ADDR]], align 4
1859 // CHECK11-NEXT: store i32 [[TMP0]], ptr [[F]], align 4
1860 // CHECK11-NEXT: ret void
1863 // CHECK11-LABEL: define {{[^@]+}}@_ZN1SIiED2Ev
1864 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(4) [[THIS:%.*]]) unnamed_addr #[[ATTR1]] comdat align 2 {
1865 // CHECK11-NEXT: entry:
1866 // CHECK11-NEXT: [[THIS_ADDR:%.*]] = alloca ptr, align 4
1867 // CHECK11-NEXT: store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1868 // CHECK11-NEXT: [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1869 // CHECK11-NEXT: ret void
1872 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1873 // CHECK11-SAME: () #[[ATTR6:[0-9]+]] {
1874 // CHECK11-NEXT: entry:
1875 // CHECK11-NEXT: call void @__tgt_register_requires(i64 1)
1876 // CHECK11-NEXT: ret void