clang/test/OpenMP/target_teams_distribute_parallel_for_schedule_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // expected-no-diagnostics
   3 #ifndef HEADER
   4 #define HEADER
   5
   6 // Test host codegen.
   7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   8 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   9 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
  10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
  11 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  12 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
  13
  14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
  15 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  16 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
  18 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  19 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
  20
  21 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  22 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  23 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  24 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  25 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  26 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  27
  28 #ifdef CK1
  29
  30 template <typename T, int X, long long Y>
  31 struct SS{
  32   T a[X];
  33   float b;
  34   int foo(void) {
  35
  36     #pragma omp target teams distribute parallel for
  37     for(int i = 0; i < X; i++) {
  38       a[i] = (T)0;
  39     }
  40     #pragma omp target teams distribute parallel for schedule(static)
  41     for(int i = 0; i < X; i++) {
  42       a[i] = (T)0;
  43     }
  44     #pragma omp target teams distribute parallel for schedule(static, X/2)
  45     for(int i = 0; i < X; i++) {
  46       a[i] = (T)0;
  47     }
  48
  49     #pragma omp target teams distribute parallel for schedule(dynamic)
  50     for(int i = 0; i < X; i++) {
  51       a[i] = (T)0;
  52     }
  53
  54     #pragma omp target teams distribute parallel for schedule(dynamic, X/2)
  55     for(int i = 0; i < X; i++) {
  56       a[i] = (T)0;
  57     }
  58
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  73
  74     return a[0];
  75   }
  76 };
  77
  78 int teams_template_struct(void) {
  79   SS<int, 123, 456> V;
  80   return V.foo();
  81
  82 }
  83 #endif // CK1
  84
  85 // Test host codegen.
  86 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
  87 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  88 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
  89 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
  90 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  91 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
  92
  93 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
  94 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  95 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17
  96 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
  97 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  98 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19
  99
 100 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 101 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
 102 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 103 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 104 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
 105 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 106 #ifdef CK2
 107
 108 template <typename T, int n>
 109 int tmain(T argc) {
 110   T a[n];
 111   int m = 10;
 112 #pragma omp target teams distribute parallel for
 113   for(int i = 0; i < n; i++) {
 114     a[i] = (T)0;
 115   }
 116 #pragma omp target teams distribute parallel for schedule(static)
 117   for(int i = 0; i < n; i++) {
 118     a[i] = (T)0;
 119   }
 120 #pragma omp target teams distribute parallel for schedule(static, m)
 121   for(int i = 0; i < n; i++) {
 122     a[i] = (T)0;
 123   }
 124 #pragma omp target teams distribute parallel for schedule(dynamic)
 125   for(int i = 0; i < n; i++) {
 126     a[i] = (T)0;
 127   }
 128 #pragma omp target teams distribute parallel for schedule(dynamic, m)
 129   for(int i = 0; i < n; i++) {
 130     a[i] = (T)0;
 131   }
 132   return 0;
 133 }
 134
 135 int main (int argc, char **argv) {
 136   int n = 100;
 137   int a[n];
 138   int m = 10;
 139 #pragma omp target teams distribute parallel for
 140   for(int i = 0; i < n; i++) {
 141     a[i] = 0;
 142   }
 143 #pragma omp target teams distribute parallel for dist_schedule(static)
 144   for(int i = 0; i < n; i++) {
 145     a[i] = 0;
 146   }
 147 #pragma omp target teams distribute parallel for dist_schedule(static, m)
 148   for(int i = 0; i < n; i++) {
 149     a[i] = 0;
 150   }
 151 #pragma omp target teams distribute parallel for schedule(dynamic)
 152   for(int i = 0; i < n; i++) {
 153     a[i] = 0;
 154   }
 155 #pragma omp target teams distribute parallel for schedule(dynamic, m)
 156   for(int i = 0; i < n; i++) {
 157     a[i] = 0;
 158   }
 159   return tmain<int, 10>(argc);
 160 }
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 195 #endif // CK2
 196 #endif // #ifndef HEADER
 197 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
 198 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 199 // CHECK1-NEXT:  entry:
 200 // CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
 201 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
 202 // CHECK1-NEXT:    ret i32 [[CALL]]
 203 //
 204 //
 205 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
 206 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {
 207 // CHECK1-NEXT:  entry:
 208 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 209 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
 210 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
 211 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
 212 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 213 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 214 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8
 215 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8
 216 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8
 217 // CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
 218 // CHECK1-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 219 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8
 220 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8
 221 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8
 222 // CHECK1-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4
 223 // CHECK1-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 224 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 8
 225 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 8
 226 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 8
 227 // CHECK1-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
 228 // CHECK1-NEXT:    [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 229 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 8
 230 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 8
 231 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 8
 232 // CHECK1-NEXT:    [[_TMP30:%.*]] = alloca i32, align 4
 233 // CHECK1-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 234 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 235 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 236 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
 237 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 238 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8
 239 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 240 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
 241 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 242 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 243 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 244 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 245 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 246 // CHECK1-NEXT:    store i32 2, ptr [[TMP5]], align 4
 247 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 248 // CHECK1-NEXT:    store i32 1, ptr [[TMP6]], align 4
 249 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 250 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
 251 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 252 // CHECK1-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
 253 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 254 // CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8
 255 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 256 // CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8
 257 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 258 // CHECK1-NEXT:    store ptr null, ptr [[TMP11]], align 8
 259 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 260 // CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8
 261 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 262 // CHECK1-NEXT:    store i64 123, ptr [[TMP13]], align 8
 263 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 264 // CHECK1-NEXT:    store i64 0, ptr [[TMP14]], align 8
 265 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 266 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
 267 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 268 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
 269 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 270 // CHECK1-NEXT:    store i32 0, ptr [[TMP17]], align 4
 271 // CHECK1-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]])
 272 // CHECK1-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
 273 // CHECK1-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 274 // CHECK1:       omp_offload.failed:
 275 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]
 276 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 277 // CHECK1:       omp_offload.cont:
 278 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 279 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
 280 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 8
 281 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
 282 // CHECK1-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 8
 283 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
 284 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 285 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
 286 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
 287 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
 288 // CHECK1-NEXT:    store i32 2, ptr [[TMP25]], align 4
 289 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
 290 // CHECK1-NEXT:    store i32 1, ptr [[TMP26]], align 4
 291 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
 292 // CHECK1-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
 293 // CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
 294 // CHECK1-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
 295 // CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
 296 // CHECK1-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 8
 297 // CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
 298 // CHECK1-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8
 299 // CHECK1-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
 300 // CHECK1-NEXT:    store ptr null, ptr [[TMP31]], align 8
 301 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
 302 // CHECK1-NEXT:    store ptr null, ptr [[TMP32]], align 8
 303 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
 304 // CHECK1-NEXT:    store i64 123, ptr [[TMP33]], align 8
 305 // CHECK1-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
 306 // CHECK1-NEXT:    store i64 0, ptr [[TMP34]], align 8
 307 // CHECK1-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
 308 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
 309 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
 310 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
 311 // CHECK1-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
 312 // CHECK1-NEXT:    store i32 0, ptr [[TMP37]], align 4
 313 // CHECK1-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])
 314 // CHECK1-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
 315 // CHECK1-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
 316 // CHECK1:       omp_offload.failed8:
 317 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]]
 318 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT9]]
 319 // CHECK1:       omp_offload.cont9:
 320 // CHECK1-NEXT:    [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 321 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
 322 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 8
 323 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
 324 // CHECK1-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 8
 325 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
 326 // CHECK1-NEXT:    store ptr null, ptr [[TMP42]], align 8
 327 // CHECK1-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
 328 // CHECK1-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
 329 // CHECK1-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
 330 // CHECK1-NEXT:    store i32 2, ptr [[TMP45]], align 4
 331 // CHECK1-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
 332 // CHECK1-NEXT:    store i32 1, ptr [[TMP46]], align 4
 333 // CHECK1-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
 334 // CHECK1-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 8
 335 // CHECK1-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
 336 // CHECK1-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 8
 337 // CHECK1-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
 338 // CHECK1-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 8
 339 // CHECK1-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
 340 // CHECK1-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8
 341 // CHECK1-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
 342 // CHECK1-NEXT:    store ptr null, ptr [[TMP51]], align 8
 343 // CHECK1-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
 344 // CHECK1-NEXT:    store ptr null, ptr [[TMP52]], align 8
 345 // CHECK1-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
 346 // CHECK1-NEXT:    store i64 123, ptr [[TMP53]], align 8
 347 // CHECK1-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
 348 // CHECK1-NEXT:    store i64 0, ptr [[TMP54]], align 8
 349 // CHECK1-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
 350 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
 351 // CHECK1-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
 352 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
 353 // CHECK1-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
 354 // CHECK1-NEXT:    store i32 0, ptr [[TMP57]], align 4
 355 // CHECK1-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]])
 356 // CHECK1-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
 357 // CHECK1-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
 358 // CHECK1:       omp_offload.failed16:
 359 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]]
 360 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
 361 // CHECK1:       omp_offload.cont17:
 362 // CHECK1-NEXT:    [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 363 // CHECK1-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
 364 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP60]], align 8
 365 // CHECK1-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
 366 // CHECK1-NEXT:    store ptr [[A18]], ptr [[TMP61]], align 8
 367 // CHECK1-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
 368 // CHECK1-NEXT:    store ptr null, ptr [[TMP62]], align 8
 369 // CHECK1-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
 370 // CHECK1-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
 371 // CHECK1-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0
 372 // CHECK1-NEXT:    store i32 2, ptr [[TMP65]], align 4
 373 // CHECK1-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1
 374 // CHECK1-NEXT:    store i32 1, ptr [[TMP66]], align 4
 375 // CHECK1-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2
 376 // CHECK1-NEXT:    store ptr [[TMP63]], ptr [[TMP67]], align 8
 377 // CHECK1-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3
 378 // CHECK1-NEXT:    store ptr [[TMP64]], ptr [[TMP68]], align 8
 379 // CHECK1-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4
 380 // CHECK1-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP69]], align 8
 381 // CHECK1-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5
 382 // CHECK1-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8
 383 // CHECK1-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6
 384 // CHECK1-NEXT:    store ptr null, ptr [[TMP71]], align 8
 385 // CHECK1-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7
 386 // CHECK1-NEXT:    store ptr null, ptr [[TMP72]], align 8
 387 // CHECK1-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8
 388 // CHECK1-NEXT:    store i64 123, ptr [[TMP73]], align 8
 389 // CHECK1-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9
 390 // CHECK1-NEXT:    store i64 0, ptr [[TMP74]], align 8
 391 // CHECK1-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10
 392 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4
 393 // CHECK1-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11
 394 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4
 395 // CHECK1-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12
 396 // CHECK1-NEXT:    store i32 0, ptr [[TMP77]], align 4
 397 // CHECK1-NEXT:    [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]])
 398 // CHECK1-NEXT:    [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
 399 // CHECK1-NEXT:    br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
 400 // CHECK1:       omp_offload.failed24:
 401 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]]
 402 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
 403 // CHECK1:       omp_offload.cont25:
 404 // CHECK1-NEXT:    [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 405 // CHECK1-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
 406 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP80]], align 8
 407 // CHECK1-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
 408 // CHECK1-NEXT:    store ptr [[A26]], ptr [[TMP81]], align 8
 409 // CHECK1-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0
 410 // CHECK1-NEXT:    store ptr null, ptr [[TMP82]], align 8
 411 // CHECK1-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
 412 // CHECK1-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
 413 // CHECK1-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
 414 // CHECK1-NEXT:    store i32 2, ptr [[TMP85]], align 4
 415 // CHECK1-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
 416 // CHECK1-NEXT:    store i32 1, ptr [[TMP86]], align 4
 417 // CHECK1-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
 418 // CHECK1-NEXT:    store ptr [[TMP83]], ptr [[TMP87]], align 8
 419 // CHECK1-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
 420 // CHECK1-NEXT:    store ptr [[TMP84]], ptr [[TMP88]], align 8
 421 // CHECK1-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
 422 // CHECK1-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP89]], align 8
 423 // CHECK1-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
 424 // CHECK1-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8
 425 // CHECK1-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
 426 // CHECK1-NEXT:    store ptr null, ptr [[TMP91]], align 8
 427 // CHECK1-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
 428 // CHECK1-NEXT:    store ptr null, ptr [[TMP92]], align 8
 429 // CHECK1-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
 430 // CHECK1-NEXT:    store i64 123, ptr [[TMP93]], align 8
 431 // CHECK1-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
 432 // CHECK1-NEXT:    store i64 0, ptr [[TMP94]], align 8
 433 // CHECK1-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
 434 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4
 435 // CHECK1-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
 436 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4
 437 // CHECK1-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
 438 // CHECK1-NEXT:    store i32 0, ptr [[TMP97]], align 4
 439 // CHECK1-NEXT:    [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]])
 440 // CHECK1-NEXT:    [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0
 441 // CHECK1-NEXT:    br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
 442 // CHECK1:       omp_offload.failed32:
 443 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]]
 444 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
 445 // CHECK1:       omp_offload.cont33:
 446 // CHECK1-NEXT:    [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 447 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i64 0, i64 0
 448 // CHECK1-NEXT:    [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
 449 // CHECK1-NEXT:    ret i32 [[TMP100]]
 450 //
 451 //
 452 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
 453 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
 454 // CHECK1-NEXT:  entry:
 455 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 456 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 457 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 458 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]])
 459 // CHECK1-NEXT:    ret void
 460 //
 461 //
 462 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined
 463 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 464 // CHECK1-NEXT:  entry:
 465 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 466 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 467 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 468 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 469 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 470 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 471 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 472 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 473 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 474 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 475 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 476 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 477 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 478 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 479 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 480 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
 481 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 482 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 483 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 484 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 485 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 486 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 487 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 488 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 489 // CHECK1:       cond.true:
 490 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 491 // CHECK1:       cond.false:
 492 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 493 // CHECK1-NEXT:    br label [[COND_END]]
 494 // CHECK1:       cond.end:
 495 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 496 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 497 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 498 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 499 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 500 // CHECK1:       omp.inner.for.cond:
 501 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 502 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 503 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 504 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 505 // CHECK1:       omp.inner.for.body:
 506 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 507 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
 508 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 509 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 510 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
 511 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 512 // CHECK1:       omp.inner.for.inc:
 513 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 514 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 515 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 516 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 517 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 518 // CHECK1:       omp.inner.for.end:
 519 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 520 // CHECK1:       omp.loop.exit:
 521 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 522 // CHECK1-NEXT:    ret void
 523 //
 524 //
 525 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined
 526 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 527 // CHECK1-NEXT:  entry:
 528 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 529 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 530 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 531 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 532 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 533 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 534 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 535 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 536 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 537 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 538 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 539 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 540 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 541 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 542 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 543 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 544 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 545 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 546 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 547 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 548 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 549 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
 550 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 551 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
 552 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 553 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 554 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 555 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 556 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 557 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
 558 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 559 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 560 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
 561 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 562 // CHECK1:       cond.true:
 563 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 564 // CHECK1:       cond.false:
 565 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 566 // CHECK1-NEXT:    br label [[COND_END]]
 567 // CHECK1:       cond.end:
 568 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
 569 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 570 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 571 // CHECK1-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
 572 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 573 // CHECK1:       omp.inner.for.cond:
 574 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 575 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 576 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
 577 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 578 // CHECK1:       omp.inner.for.body:
 579 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 580 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
 581 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 582 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 583 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 584 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
 585 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
 586 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
 587 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
 588 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 589 // CHECK1:       omp.body.continue:
 590 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 591 // CHECK1:       omp.inner.for.inc:
 592 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 593 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
 594 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
 595 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 596 // CHECK1:       omp.inner.for.end:
 597 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 598 // CHECK1:       omp.loop.exit:
 599 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
 600 // CHECK1-NEXT:    ret void
 601 //
 602 //
 603 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
 604 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 605 // CHECK1-NEXT:  entry:
 606 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 607 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 608 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 609 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])
 610 // CHECK1-NEXT:    ret void
 611 //
 612 //
 613 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined
 614 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 615 // CHECK1-NEXT:  entry:
 616 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 617 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 618 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 619 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 620 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 621 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 622 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 623 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 624 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 625 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 626 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 627 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 628 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 629 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 630 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 631 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
 632 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 633 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 634 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 635 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 636 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 637 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 638 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 639 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 640 // CHECK1:       cond.true:
 641 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 642 // CHECK1:       cond.false:
 643 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 644 // CHECK1-NEXT:    br label [[COND_END]]
 645 // CHECK1:       cond.end:
 646 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 647 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 648 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 649 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 650 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 651 // CHECK1:       omp.inner.for.cond:
 652 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 653 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 654 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 655 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 656 // CHECK1:       omp.inner.for.body:
 657 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 658 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
 659 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 660 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 661 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
 662 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 663 // CHECK1:       omp.inner.for.inc:
 664 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 665 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 666 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 667 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 668 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 669 // CHECK1:       omp.inner.for.end:
 670 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 671 // CHECK1:       omp.loop.exit:
 672 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 673 // CHECK1-NEXT:    ret void
 674 //
 675 //
 676 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined
 677 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 678 // CHECK1-NEXT:  entry:
 679 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 680 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 681 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 682 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 683 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 684 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 685 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 686 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 687 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 688 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 689 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 690 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 691 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 692 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 693 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 694 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 695 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 696 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 697 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 698 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 699 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 700 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
 701 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 702 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
 703 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 704 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 705 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 706 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 707 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 708 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
 709 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 710 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 711 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
 712 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 713 // CHECK1:       cond.true:
 714 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 715 // CHECK1:       cond.false:
 716 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 717 // CHECK1-NEXT:    br label [[COND_END]]
 718 // CHECK1:       cond.end:
 719 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
 720 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 721 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 722 // CHECK1-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
 723 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 724 // CHECK1:       omp.inner.for.cond:
 725 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 726 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 727 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
 728 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 729 // CHECK1:       omp.inner.for.body:
 730 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 731 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
 732 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 733 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 734 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 735 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
 736 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
 737 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
 738 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
 739 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 740 // CHECK1:       omp.body.continue:
 741 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 742 // CHECK1:       omp.inner.for.inc:
 743 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 744 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
 745 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
 746 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 747 // CHECK1:       omp.inner.for.end:
 748 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 749 // CHECK1:       omp.loop.exit:
 750 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
 751 // CHECK1-NEXT:    ret void
 752 //
 753 //
 754 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
 755 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 756 // CHECK1-NEXT:  entry:
 757 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 758 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 759 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 760 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]])
 761 // CHECK1-NEXT:    ret void
 762 //
 763 //
 764 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined
 765 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 766 // CHECK1-NEXT:  entry:
 767 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 768 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 769 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 770 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 771 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 772 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 773 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 774 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 775 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 776 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 777 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 778 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 779 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 780 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 781 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 782 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
 783 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 784 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 785 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 786 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 787 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 788 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 789 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 790 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 791 // CHECK1:       cond.true:
 792 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 793 // CHECK1:       cond.false:
 794 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 795 // CHECK1-NEXT:    br label [[COND_END]]
 796 // CHECK1:       cond.end:
 797 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 798 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 799 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 800 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 801 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 802 // CHECK1:       omp.inner.for.cond:
 803 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 804 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 805 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 806 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 807 // CHECK1:       omp.inner.for.body:
 808 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 809 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
 810 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 811 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 812 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
 813 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 814 // CHECK1:       omp.inner.for.inc:
 815 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 816 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 817 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 818 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 819 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 820 // CHECK1:       omp.inner.for.end:
 821 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 822 // CHECK1:       omp.loop.exit:
 823 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 824 // CHECK1-NEXT:    ret void
 825 //
 826 //
 827 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined
 828 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 829 // CHECK1-NEXT:  entry:
 830 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 831 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 832 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 833 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 834 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 835 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 836 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 837 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 838 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 839 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 840 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 841 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 842 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 843 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 844 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 845 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 846 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 847 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 848 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 849 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 850 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 851 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
 852 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 853 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
 854 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 855 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 856 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 857 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 858 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 859 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
 860 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
 861 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
 862 // CHECK1:       omp.dispatch.cond:
 863 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 864 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 865 // CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
 866 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
 867 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 868 // CHECK1:       cond.true:
 869 // CHECK1-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 870 // CHECK1-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
 871 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 872 // CHECK1:       cond.false:
 873 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 874 // CHECK1-NEXT:    br label [[COND_END]]
 875 // CHECK1:       cond.end:
 876 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
 877 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 878 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 879 // CHECK1-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
 880 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 881 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 882 // CHECK1-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
 883 // CHECK1-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
 884 // CHECK1:       omp.dispatch.body:
 885 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 886 // CHECK1:       omp.inner.for.cond:
 887 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 888 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 889 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 890 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 891 // CHECK1:       omp.inner.for.body:
 892 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 893 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
 894 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 895 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 896 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 897 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
 898 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
 899 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
 900 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
 901 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 902 // CHECK1:       omp.body.continue:
 903 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 904 // CHECK1:       omp.inner.for.inc:
 905 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 906 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
 907 // CHECK1-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
 908 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 909 // CHECK1:       omp.inner.for.end:
 910 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
 911 // CHECK1:       omp.dispatch.inc:
 912 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 913 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 914 // CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
 915 // CHECK1-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4
 916 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 917 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 918 // CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
 919 // CHECK1-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4
 920 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
 921 // CHECK1:       omp.dispatch.end:
 922 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
 923 // CHECK1-NEXT:    ret void
 924 //
 925 //
 926 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
 927 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 928 // CHECK1-NEXT:  entry:
 929 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 930 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 931 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 932 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]])
 933 // CHECK1-NEXT:    ret void
 934 //
 935 //
 936 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined
 937 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 938 // CHECK1-NEXT:  entry:
 939 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 940 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 941 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 942 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 943 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 944 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 945 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 946 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 947 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 948 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 949 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 950 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 951 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 952 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 953 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 954 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
 955 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 956 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 957 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 958 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 959 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 960 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 961 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 962 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 963 // CHECK1:       cond.true:
 964 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 965 // CHECK1:       cond.false:
 966 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 967 // CHECK1-NEXT:    br label [[COND_END]]
 968 // CHECK1:       cond.end:
 969 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 970 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 971 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 972 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 973 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 974 // CHECK1:       omp.inner.for.cond:
 975 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 976 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 977 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 978 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 979 // CHECK1:       omp.inner.for.body:
 980 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 981 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
 982 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 983 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 984 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
 985 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 986 // CHECK1:       omp.inner.for.inc:
 987 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 988 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 989 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 990 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 991 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 992 // CHECK1:       omp.inner.for.end:
 993 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 994 // CHECK1:       omp.loop.exit:
 995 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 996 // CHECK1-NEXT:    ret void
 997 //
 998 //
 999 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined
1000 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1001 // CHECK1-NEXT:  entry:
1002 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1003 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1004 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1005 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1006 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1007 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1008 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1009 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1010 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1011 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1012 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1013 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1014 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1015 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1016 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1017 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1018 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1019 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1020 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1021 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1022 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1023 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1024 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1025 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1026 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1027 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1028 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1029 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1030 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1031 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1032 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1033 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1034 // CHECK1-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
1035 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1036 // CHECK1:       omp.dispatch.cond:
1037 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
1038 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1039 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1040 // CHECK1:       omp.dispatch.body:
1041 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1042 // CHECK1-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1043 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1044 // CHECK1:       omp.inner.for.cond:
1045 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
1046 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
1047 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1048 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1049 // CHECK1:       omp.inner.for.body:
1050 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
1051 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1052 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1053 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
1054 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1055 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
1056 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1057 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
1058 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]
1059 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1060 // CHECK1:       omp.body.continue:
1061 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1062 // CHECK1:       omp.inner.for.inc:
1063 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
1064 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1065 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
1066 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1067 // CHECK1:       omp.inner.for.end:
1068 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1069 // CHECK1:       omp.dispatch.inc:
1070 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
1071 // CHECK1:       omp.dispatch.end:
1072 // CHECK1-NEXT:    ret void
1073 //
1074 //
1075 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
1076 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1077 // CHECK1-NEXT:  entry:
1078 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1079 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1080 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1081 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]])
1082 // CHECK1-NEXT:    ret void
1083 //
1084 //
1085 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined
1086 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1087 // CHECK1-NEXT:  entry:
1088 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1089 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1090 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1091 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1092 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1093 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1094 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1095 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1096 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1097 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1098 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1099 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1100 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1101 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1102 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1103 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
1104 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1105 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1106 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1107 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1108 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1109 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1110 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1111 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1112 // CHECK1:       cond.true:
1113 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1114 // CHECK1:       cond.false:
1115 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1116 // CHECK1-NEXT:    br label [[COND_END]]
1117 // CHECK1:       cond.end:
1118 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1119 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1120 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1121 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1122 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1123 // CHECK1:       omp.inner.for.cond:
1124 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1125 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1126 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1127 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1128 // CHECK1:       omp.inner.for.body:
1129 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1130 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1131 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1132 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1133 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
1134 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1135 // CHECK1:       omp.inner.for.inc:
1136 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1137 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1138 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1139 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1140 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1141 // CHECK1:       omp.inner.for.end:
1142 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1143 // CHECK1:       omp.loop.exit:
1144 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1145 // CHECK1-NEXT:    ret void
1146 //
1147 //
1148 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined
1149 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1150 // CHECK1-NEXT:  entry:
1151 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1152 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1153 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1154 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1155 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1156 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1157 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1158 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1159 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1160 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1161 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1162 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1163 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1164 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1165 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1166 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1167 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1168 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1169 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1170 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1171 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1172 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1173 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1174 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1175 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1176 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1177 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1178 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1179 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1180 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1181 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1182 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1183 // CHECK1-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1184 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1185 // CHECK1:       omp.dispatch.cond:
1186 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
1187 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1188 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1189 // CHECK1:       omp.dispatch.body:
1190 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1191 // CHECK1-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1192 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1193 // CHECK1:       omp.inner.for.cond:
1194 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
1195 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
1196 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1197 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1198 // CHECK1:       omp.inner.for.body:
1199 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1200 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1201 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1202 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
1203 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1204 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
1205 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1206 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
1207 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]
1208 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1209 // CHECK1:       omp.body.continue:
1210 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1211 // CHECK1:       omp.inner.for.inc:
1212 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1213 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1214 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1215 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1216 // CHECK1:       omp.inner.for.end:
1217 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1218 // CHECK1:       omp.dispatch.inc:
1219 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
1220 // CHECK1:       omp.dispatch.end:
1221 // CHECK1-NEXT:    ret void
1222 //
1223 //
1224 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1225 // CHECK1-SAME: () #[[ATTR3:[0-9]+]] {
1226 // CHECK1-NEXT:  entry:
1227 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
1228 // CHECK1-NEXT:    ret void
1229 //
1230 //
1231 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1232 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1233 // CHECK3-NEXT:  entry:
1234 // CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1235 // CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
1236 // CHECK3-NEXT:    ret i32 [[CALL]]
1237 //
1238 //
1239 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1240 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1241 // CHECK3-NEXT:  entry:
1242 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1243 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
1244 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
1245 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
1246 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1247 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1248 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4
1249 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4
1250 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4
1251 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
1252 // CHECK3-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1253 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4
1254 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4
1255 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4
1256 // CHECK3-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4
1257 // CHECK3-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1258 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 4
1259 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 4
1260 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 4
1261 // CHECK3-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
1262 // CHECK3-NEXT:    [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1263 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 4
1264 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 4
1265 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 4
1266 // CHECK3-NEXT:    [[_TMP30:%.*]] = alloca i32, align 4
1267 // CHECK3-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1268 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1269 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1270 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
1271 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1272 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4
1273 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1274 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
1275 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1276 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 4
1277 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1278 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1279 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1280 // CHECK3-NEXT:    store i32 2, ptr [[TMP5]], align 4
1281 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1282 // CHECK3-NEXT:    store i32 1, ptr [[TMP6]], align 4
1283 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1284 // CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
1285 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1286 // CHECK3-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
1287 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1288 // CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4
1289 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1290 // CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4
1291 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1292 // CHECK3-NEXT:    store ptr null, ptr [[TMP11]], align 4
1293 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1294 // CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 4
1295 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1296 // CHECK3-NEXT:    store i64 123, ptr [[TMP13]], align 8
1297 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1298 // CHECK3-NEXT:    store i64 0, ptr [[TMP14]], align 8
1299 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1300 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
1301 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1302 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
1303 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1304 // CHECK3-NEXT:    store i32 0, ptr [[TMP17]], align 4
1305 // CHECK3-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]])
1306 // CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1307 // CHECK3-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1308 // CHECK3:       omp_offload.failed:
1309 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]
1310 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1311 // CHECK3:       omp_offload.cont:
1312 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1313 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1314 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 4
1315 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1316 // CHECK3-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 4
1317 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1318 // CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 4
1319 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1320 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1321 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
1322 // CHECK3-NEXT:    store i32 2, ptr [[TMP25]], align 4
1323 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
1324 // CHECK3-NEXT:    store i32 1, ptr [[TMP26]], align 4
1325 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
1326 // CHECK3-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
1327 // CHECK3-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
1328 // CHECK3-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
1329 // CHECK3-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
1330 // CHECK3-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 4
1331 // CHECK3-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
1332 // CHECK3-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4
1333 // CHECK3-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
1334 // CHECK3-NEXT:    store ptr null, ptr [[TMP31]], align 4
1335 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
1336 // CHECK3-NEXT:    store ptr null, ptr [[TMP32]], align 4
1337 // CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
1338 // CHECK3-NEXT:    store i64 123, ptr [[TMP33]], align 8
1339 // CHECK3-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
1340 // CHECK3-NEXT:    store i64 0, ptr [[TMP34]], align 8
1341 // CHECK3-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
1342 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
1343 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
1344 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
1345 // CHECK3-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
1346 // CHECK3-NEXT:    store i32 0, ptr [[TMP37]], align 4
1347 // CHECK3-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])
1348 // CHECK3-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
1349 // CHECK3-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
1350 // CHECK3:       omp_offload.failed8:
1351 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]]
1352 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT9]]
1353 // CHECK3:       omp_offload.cont9:
1354 // CHECK3-NEXT:    [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1355 // CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
1356 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 4
1357 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
1358 // CHECK3-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 4
1359 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
1360 // CHECK3-NEXT:    store ptr null, ptr [[TMP42]], align 4
1361 // CHECK3-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
1362 // CHECK3-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
1363 // CHECK3-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
1364 // CHECK3-NEXT:    store i32 2, ptr [[TMP45]], align 4
1365 // CHECK3-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
1366 // CHECK3-NEXT:    store i32 1, ptr [[TMP46]], align 4
1367 // CHECK3-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
1368 // CHECK3-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 4
1369 // CHECK3-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
1370 // CHECK3-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 4
1371 // CHECK3-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
1372 // CHECK3-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 4
1373 // CHECK3-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
1374 // CHECK3-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4
1375 // CHECK3-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
1376 // CHECK3-NEXT:    store ptr null, ptr [[TMP51]], align 4
1377 // CHECK3-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
1378 // CHECK3-NEXT:    store ptr null, ptr [[TMP52]], align 4
1379 // CHECK3-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
1380 // CHECK3-NEXT:    store i64 123, ptr [[TMP53]], align 8
1381 // CHECK3-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
1382 // CHECK3-NEXT:    store i64 0, ptr [[TMP54]], align 8
1383 // CHECK3-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
1384 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
1385 // CHECK3-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
1386 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
1387 // CHECK3-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
1388 // CHECK3-NEXT:    store i32 0, ptr [[TMP57]], align 4
1389 // CHECK3-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]])
1390 // CHECK3-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
1391 // CHECK3-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
1392 // CHECK3:       omp_offload.failed16:
1393 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]]
1394 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
1395 // CHECK3:       omp_offload.cont17:
1396 // CHECK3-NEXT:    [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1397 // CHECK3-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1398 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP60]], align 4
1399 // CHECK3-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1400 // CHECK3-NEXT:    store ptr [[A18]], ptr [[TMP61]], align 4
1401 // CHECK3-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
1402 // CHECK3-NEXT:    store ptr null, ptr [[TMP62]], align 4
1403 // CHECK3-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1404 // CHECK3-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1405 // CHECK3-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0
1406 // CHECK3-NEXT:    store i32 2, ptr [[TMP65]], align 4
1407 // CHECK3-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1
1408 // CHECK3-NEXT:    store i32 1, ptr [[TMP66]], align 4
1409 // CHECK3-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2
1410 // CHECK3-NEXT:    store ptr [[TMP63]], ptr [[TMP67]], align 4
1411 // CHECK3-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3
1412 // CHECK3-NEXT:    store ptr [[TMP64]], ptr [[TMP68]], align 4
1413 // CHECK3-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4
1414 // CHECK3-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP69]], align 4
1415 // CHECK3-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5
1416 // CHECK3-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP70]], align 4
1417 // CHECK3-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6
1418 // CHECK3-NEXT:    store ptr null, ptr [[TMP71]], align 4
1419 // CHECK3-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7
1420 // CHECK3-NEXT:    store ptr null, ptr [[TMP72]], align 4
1421 // CHECK3-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8
1422 // CHECK3-NEXT:    store i64 123, ptr [[TMP73]], align 8
1423 // CHECK3-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9
1424 // CHECK3-NEXT:    store i64 0, ptr [[TMP74]], align 8
1425 // CHECK3-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10
1426 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4
1427 // CHECK3-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11
1428 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4
1429 // CHECK3-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12
1430 // CHECK3-NEXT:    store i32 0, ptr [[TMP77]], align 4
1431 // CHECK3-NEXT:    [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]])
1432 // CHECK3-NEXT:    [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
1433 // CHECK3-NEXT:    br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
1434 // CHECK3:       omp_offload.failed24:
1435 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]]
1436 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
1437 // CHECK3:       omp_offload.cont25:
1438 // CHECK3-NEXT:    [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1439 // CHECK3-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
1440 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP80]], align 4
1441 // CHECK3-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
1442 // CHECK3-NEXT:    store ptr [[A26]], ptr [[TMP81]], align 4
1443 // CHECK3-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0
1444 // CHECK3-NEXT:    store ptr null, ptr [[TMP82]], align 4
1445 // CHECK3-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
1446 // CHECK3-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
1447 // CHECK3-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
1448 // CHECK3-NEXT:    store i32 2, ptr [[TMP85]], align 4
1449 // CHECK3-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
1450 // CHECK3-NEXT:    store i32 1, ptr [[TMP86]], align 4
1451 // CHECK3-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
1452 // CHECK3-NEXT:    store ptr [[TMP83]], ptr [[TMP87]], align 4
1453 // CHECK3-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
1454 // CHECK3-NEXT:    store ptr [[TMP84]], ptr [[TMP88]], align 4
1455 // CHECK3-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
1456 // CHECK3-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP89]], align 4
1457 // CHECK3-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
1458 // CHECK3-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP90]], align 4
1459 // CHECK3-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
1460 // CHECK3-NEXT:    store ptr null, ptr [[TMP91]], align 4
1461 // CHECK3-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
1462 // CHECK3-NEXT:    store ptr null, ptr [[TMP92]], align 4
1463 // CHECK3-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
1464 // CHECK3-NEXT:    store i64 123, ptr [[TMP93]], align 8
1465 // CHECK3-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
1466 // CHECK3-NEXT:    store i64 0, ptr [[TMP94]], align 8
1467 // CHECK3-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
1468 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4
1469 // CHECK3-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
1470 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4
1471 // CHECK3-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
1472 // CHECK3-NEXT:    store i32 0, ptr [[TMP97]], align 4
1473 // CHECK3-NEXT:    [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]])
1474 // CHECK3-NEXT:    [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0
1475 // CHECK3-NEXT:    br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
1476 // CHECK3:       omp_offload.failed32:
1477 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]]
1478 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
1479 // CHECK3:       omp_offload.cont33:
1480 // CHECK3-NEXT:    [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1481 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i32 0, i32 0
1482 // CHECK3-NEXT:    [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
1483 // CHECK3-NEXT:    ret i32 [[TMP100]]
1484 //
1485 //
1486 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
1487 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1488 // CHECK3-NEXT:  entry:
1489 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1490 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1491 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1492 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]])
1493 // CHECK3-NEXT:    ret void
1494 //
1495 //
1496 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined
1497 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1498 // CHECK3-NEXT:  entry:
1499 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1500 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1501 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1502 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1503 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1504 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1505 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1506 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1507 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1508 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1509 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1510 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1511 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1512 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1513 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1514 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
1515 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1516 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1517 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1518 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1519 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1520 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1521 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1522 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1523 // CHECK3:       cond.true:
1524 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1525 // CHECK3:       cond.false:
1526 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1527 // CHECK3-NEXT:    br label [[COND_END]]
1528 // CHECK3:       cond.end:
1529 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1530 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1531 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1532 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1533 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1534 // CHECK3:       omp.inner.for.cond:
1535 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1536 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1537 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1538 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1539 // CHECK3:       omp.inner.for.body:
1540 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1541 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1542 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
1543 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1544 // CHECK3:       omp.inner.for.inc:
1545 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1546 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1547 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1548 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1549 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1550 // CHECK3:       omp.inner.for.end:
1551 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1552 // CHECK3:       omp.loop.exit:
1553 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1554 // CHECK3-NEXT:    ret void
1555 //
1556 //
1557 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined
1558 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1559 // CHECK3-NEXT:  entry:
1560 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1561 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1562 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1563 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1564 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1565 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1566 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1567 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1568 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1569 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1570 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1571 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1572 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1573 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1574 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1575 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1576 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1577 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1578 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1579 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1580 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1581 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1582 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
1583 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
1584 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1585 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1586 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1587 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1588 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1589 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1590 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1591 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1592 // CHECK3:       cond.true:
1593 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1594 // CHECK3:       cond.false:
1595 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1596 // CHECK3-NEXT:    br label [[COND_END]]
1597 // CHECK3:       cond.end:
1598 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1599 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1600 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1601 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1602 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1603 // CHECK3:       omp.inner.for.cond:
1604 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1605 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1606 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1607 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1608 // CHECK3:       omp.inner.for.body:
1609 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1610 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1611 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1612 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1613 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1614 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
1615 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]
1616 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
1617 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1618 // CHECK3:       omp.body.continue:
1619 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1620 // CHECK3:       omp.inner.for.inc:
1621 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1622 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1623 // CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
1624 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1625 // CHECK3:       omp.inner.for.end:
1626 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1627 // CHECK3:       omp.loop.exit:
1628 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
1629 // CHECK3-NEXT:    ret void
1630 //
1631 //
1632 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
1633 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1634 // CHECK3-NEXT:  entry:
1635 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1636 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1637 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1638 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])
1639 // CHECK3-NEXT:    ret void
1640 //
1641 //
1642 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined
1643 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1644 // CHECK3-NEXT:  entry:
1645 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1646 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1647 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1648 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1649 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1650 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1651 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1652 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1653 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1654 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1655 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1656 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1657 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1658 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1659 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1660 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
1661 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1662 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1663 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1664 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1665 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1666 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1667 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1668 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1669 // CHECK3:       cond.true:
1670 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1671 // CHECK3:       cond.false:
1672 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1673 // CHECK3-NEXT:    br label [[COND_END]]
1674 // CHECK3:       cond.end:
1675 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1676 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1677 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1678 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1679 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1680 // CHECK3:       omp.inner.for.cond:
1681 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1682 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1683 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1684 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1685 // CHECK3:       omp.inner.for.body:
1686 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1687 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1688 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
1689 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1690 // CHECK3:       omp.inner.for.inc:
1691 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1692 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1693 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1694 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1695 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1696 // CHECK3:       omp.inner.for.end:
1697 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1698 // CHECK3:       omp.loop.exit:
1699 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1700 // CHECK3-NEXT:    ret void
1701 //
1702 //
1703 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined
1704 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1705 // CHECK3-NEXT:  entry:
1706 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1707 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1708 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1709 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1710 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1711 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1712 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1713 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1714 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1715 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1716 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1717 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1718 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1719 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1720 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1721 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1722 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1723 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1724 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1725 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1726 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1727 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1728 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
1729 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
1730 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1731 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1732 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1733 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1734 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1735 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1736 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1737 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1738 // CHECK3:       cond.true:
1739 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1740 // CHECK3:       cond.false:
1741 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1742 // CHECK3-NEXT:    br label [[COND_END]]
1743 // CHECK3:       cond.end:
1744 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1745 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1746 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1747 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1748 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1749 // CHECK3:       omp.inner.for.cond:
1750 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1751 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1752 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1753 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1754 // CHECK3:       omp.inner.for.body:
1755 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1756 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1757 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1758 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1759 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1760 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
1761 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]
1762 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
1763 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1764 // CHECK3:       omp.body.continue:
1765 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1766 // CHECK3:       omp.inner.for.inc:
1767 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1768 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1769 // CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
1770 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1771 // CHECK3:       omp.inner.for.end:
1772 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1773 // CHECK3:       omp.loop.exit:
1774 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
1775 // CHECK3-NEXT:    ret void
1776 //
1777 //
1778 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
1779 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1780 // CHECK3-NEXT:  entry:
1781 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1782 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1783 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1784 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]])
1785 // CHECK3-NEXT:    ret void
1786 //
1787 //
1788 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined
1789 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1790 // CHECK3-NEXT:  entry:
1791 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1792 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1793 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1794 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1795 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1796 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1797 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1798 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1799 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1800 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1801 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1802 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1803 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1804 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1805 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1806 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
1807 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1808 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1809 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1810 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1811 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1812 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1813 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1814 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1815 // CHECK3:       cond.true:
1816 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1817 // CHECK3:       cond.false:
1818 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1819 // CHECK3-NEXT:    br label [[COND_END]]
1820 // CHECK3:       cond.end:
1821 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1822 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1823 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1824 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1825 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1826 // CHECK3:       omp.inner.for.cond:
1827 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1828 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1829 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1830 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1831 // CHECK3:       omp.inner.for.body:
1832 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1833 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1834 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
1835 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1836 // CHECK3:       omp.inner.for.inc:
1837 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1838 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1839 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1840 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1841 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1842 // CHECK3:       omp.inner.for.end:
1843 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1844 // CHECK3:       omp.loop.exit:
1845 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1846 // CHECK3-NEXT:    ret void
1847 //
1848 //
1849 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined
1850 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1851 // CHECK3-NEXT:  entry:
1852 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1853 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1854 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1855 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1856 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1857 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1858 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1859 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1860 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1861 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1862 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1863 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1864 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1865 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1866 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1867 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1868 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1869 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1870 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1871 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1872 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1873 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1874 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
1875 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
1876 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1877 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1878 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1879 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1880 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
1881 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1882 // CHECK3:       omp.dispatch.cond:
1883 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1884 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1885 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
1886 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1887 // CHECK3:       cond.true:
1888 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1889 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1890 // CHECK3:       cond.false:
1891 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1892 // CHECK3-NEXT:    br label [[COND_END]]
1893 // CHECK3:       cond.end:
1894 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1895 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1896 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1897 // CHECK3-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
1898 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1899 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1900 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1901 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1902 // CHECK3:       omp.dispatch.body:
1903 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1904 // CHECK3:       omp.inner.for.cond:
1905 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1906 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1907 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1908 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1909 // CHECK3:       omp.inner.for.body:
1910 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1911 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1912 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1913 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1914 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1915 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
1916 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP15]]
1917 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
1918 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1919 // CHECK3:       omp.body.continue:
1920 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1921 // CHECK3:       omp.inner.for.inc:
1922 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1923 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
1924 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
1925 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1926 // CHECK3:       omp.inner.for.end:
1927 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1928 // CHECK3:       omp.dispatch.inc:
1929 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1930 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1931 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1932 // CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
1933 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1934 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1935 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1936 // CHECK3-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
1937 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
1938 // CHECK3:       omp.dispatch.end:
1939 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
1940 // CHECK3-NEXT:    ret void
1941 //
1942 //
1943 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
1944 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1945 // CHECK3-NEXT:  entry:
1946 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1947 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1948 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1949 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]])
1950 // CHECK3-NEXT:    ret void
1951 //
1952 //
1953 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined
1954 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1955 // CHECK3-NEXT:  entry:
1956 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1957 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1958 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1959 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1960 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1961 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1962 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1963 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1964 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1965 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1966 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1967 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1968 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1969 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1970 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1971 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
1972 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1973 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1974 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1975 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1976 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1977 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1978 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1979 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1980 // CHECK3:       cond.true:
1981 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1982 // CHECK3:       cond.false:
1983 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1984 // CHECK3-NEXT:    br label [[COND_END]]
1985 // CHECK3:       cond.end:
1986 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1987 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1988 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1989 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1990 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1991 // CHECK3:       omp.inner.for.cond:
1992 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1993 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1994 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1995 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1996 // CHECK3:       omp.inner.for.body:
1997 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1998 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1999 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
2000 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2001 // CHECK3:       omp.inner.for.inc:
2002 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2003 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2004 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2005 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2006 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2007 // CHECK3:       omp.inner.for.end:
2008 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2009 // CHECK3:       omp.loop.exit:
2010 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2011 // CHECK3-NEXT:    ret void
2012 //
2013 //
2014 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined
2015 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2016 // CHECK3-NEXT:  entry:
2017 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2018 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2019 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2020 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2021 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2022 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2023 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2024 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2025 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2026 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2027 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2028 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2029 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2030 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2031 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2032 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2033 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2034 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2035 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2036 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
2037 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2038 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2039 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
2040 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
2041 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2042 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2043 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2044 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2045 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2046 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2047 // CHECK3-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
2048 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2049 // CHECK3:       omp.dispatch.cond:
2050 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
2051 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2052 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2053 // CHECK3:       omp.dispatch.body:
2054 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2055 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
2056 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2057 // CHECK3:       omp.inner.for.cond:
2058 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
2059 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
2060 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2061 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2062 // CHECK3:       omp.inner.for.body:
2063 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
2064 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2065 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2066 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
2067 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
2068 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
2069 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]
2070 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]
2071 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2072 // CHECK3:       omp.body.continue:
2073 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2074 // CHECK3:       omp.inner.for.inc:
2075 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
2076 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2077 // CHECK3-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
2078 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2079 // CHECK3:       omp.inner.for.end:
2080 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2081 // CHECK3:       omp.dispatch.inc:
2082 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2083 // CHECK3:       omp.dispatch.end:
2084 // CHECK3-NEXT:    ret void
2085 //
2086 //
2087 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
2088 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2089 // CHECK3-NEXT:  entry:
2090 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2091 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2092 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2093 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]])
2094 // CHECK3-NEXT:    ret void
2095 //
2096 //
2097 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined
2098 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2099 // CHECK3-NEXT:  entry:
2100 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2101 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2102 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2103 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2104 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2105 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2106 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2107 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2108 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2109 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2110 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2111 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2112 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2113 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2114 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2115 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
2116 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2117 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2118 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2119 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2120 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2121 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2122 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2123 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2124 // CHECK3:       cond.true:
2125 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2126 // CHECK3:       cond.false:
2127 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2128 // CHECK3-NEXT:    br label [[COND_END]]
2129 // CHECK3:       cond.end:
2130 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2131 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2132 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2133 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2134 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2135 // CHECK3:       omp.inner.for.cond:
2136 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2137 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2138 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2139 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2140 // CHECK3:       omp.inner.for.body:
2141 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2142 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2143 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
2144 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2145 // CHECK3:       omp.inner.for.inc:
2146 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2147 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2148 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2149 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2150 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2151 // CHECK3:       omp.inner.for.end:
2152 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2153 // CHECK3:       omp.loop.exit:
2154 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2155 // CHECK3-NEXT:    ret void
2156 //
2157 //
2158 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined
2159 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2160 // CHECK3-NEXT:  entry:
2161 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2162 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2163 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2164 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2165 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2166 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2167 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2168 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2169 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2170 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2171 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2172 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2173 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2174 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2175 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2176 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2177 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2178 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2179 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2180 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
2181 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2182 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2183 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
2184 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
2185 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2186 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2187 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2188 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2189 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2190 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2191 // CHECK3-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
2192 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2193 // CHECK3:       omp.dispatch.cond:
2194 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
2195 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2196 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2197 // CHECK3:       omp.dispatch.body:
2198 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2199 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
2200 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2201 // CHECK3:       omp.inner.for.cond:
2202 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
2203 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
2204 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2205 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2206 // CHECK3:       omp.inner.for.body:
2207 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
2208 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2209 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2210 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
2211 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
2212 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
2213 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]
2214 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]]
2215 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2216 // CHECK3:       omp.body.continue:
2217 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2218 // CHECK3:       omp.inner.for.inc:
2219 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
2220 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2221 // CHECK3-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
2222 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
2223 // CHECK3:       omp.inner.for.end:
2224 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2225 // CHECK3:       omp.dispatch.inc:
2226 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2227 // CHECK3:       omp.dispatch.end:
2228 // CHECK3-NEXT:    ret void
2229 //
2230 //
2231 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2232 // CHECK3-SAME: () #[[ATTR3:[0-9]+]] {
2233 // CHECK3-NEXT:  entry:
2234 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
2235 // CHECK3-NEXT:    ret void
2236 //
2237 //
2238 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2239 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
2240 // CHECK5-NEXT:  entry:
2241 // CHECK5-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2242 // CHECK5-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
2243 // CHECK5-NEXT:    ret i32 [[CALL]]
2244 //
2245 //
2246 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2247 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {
2248 // CHECK5-NEXT:  entry:
2249 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2250 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
2251 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
2252 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
2253 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2254 // CHECK5-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2255 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8
2256 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8
2257 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8
2258 // CHECK5-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2259 // CHECK5-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2260 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8
2261 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8
2262 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8
2263 // CHECK5-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4
2264 // CHECK5-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2265 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 8
2266 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 8
2267 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 8
2268 // CHECK5-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
2269 // CHECK5-NEXT:    [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2270 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 8
2271 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 8
2272 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 8
2273 // CHECK5-NEXT:    [[_TMP30:%.*]] = alloca i32, align 4
2274 // CHECK5-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2275 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2276 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2277 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
2278 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2279 // CHECK5-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8
2280 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2281 // CHECK5-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
2282 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2283 // CHECK5-NEXT:    store ptr null, ptr [[TMP2]], align 8
2284 // CHECK5-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2285 // CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2286 // CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2287 // CHECK5-NEXT:    store i32 2, ptr [[TMP5]], align 4
2288 // CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2289 // CHECK5-NEXT:    store i32 1, ptr [[TMP6]], align 4
2290 // CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2291 // CHECK5-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
2292 // CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2293 // CHECK5-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
2294 // CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2295 // CHECK5-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8
2296 // CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2297 // CHECK5-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8
2298 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2299 // CHECK5-NEXT:    store ptr null, ptr [[TMP11]], align 8
2300 // CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2301 // CHECK5-NEXT:    store ptr null, ptr [[TMP12]], align 8
2302 // CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2303 // CHECK5-NEXT:    store i64 123, ptr [[TMP13]], align 8
2304 // CHECK5-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2305 // CHECK5-NEXT:    store i64 0, ptr [[TMP14]], align 8
2306 // CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2307 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
2308 // CHECK5-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2309 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
2310 // CHECK5-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2311 // CHECK5-NEXT:    store i32 0, ptr [[TMP17]], align 4
2312 // CHECK5-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]])
2313 // CHECK5-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
2314 // CHECK5-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2315 // CHECK5:       omp_offload.failed:
2316 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]
2317 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2318 // CHECK5:       omp_offload.cont:
2319 // CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2320 // CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2321 // CHECK5-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 8
2322 // CHECK5-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2323 // CHECK5-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 8
2324 // CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
2325 // CHECK5-NEXT:    store ptr null, ptr [[TMP22]], align 8
2326 // CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2327 // CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2328 // CHECK5-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
2329 // CHECK5-NEXT:    store i32 2, ptr [[TMP25]], align 4
2330 // CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
2331 // CHECK5-NEXT:    store i32 1, ptr [[TMP26]], align 4
2332 // CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
2333 // CHECK5-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
2334 // CHECK5-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
2335 // CHECK5-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
2336 // CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
2337 // CHECK5-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 8
2338 // CHECK5-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
2339 // CHECK5-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8
2340 // CHECK5-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
2341 // CHECK5-NEXT:    store ptr null, ptr [[TMP31]], align 8
2342 // CHECK5-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
2343 // CHECK5-NEXT:    store ptr null, ptr [[TMP32]], align 8
2344 // CHECK5-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
2345 // CHECK5-NEXT:    store i64 123, ptr [[TMP33]], align 8
2346 // CHECK5-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
2347 // CHECK5-NEXT:    store i64 0, ptr [[TMP34]], align 8
2348 // CHECK5-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
2349 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
2350 // CHECK5-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
2351 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
2352 // CHECK5-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
2353 // CHECK5-NEXT:    store i32 0, ptr [[TMP37]], align 4
2354 // CHECK5-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])
2355 // CHECK5-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
2356 // CHECK5-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
2357 // CHECK5:       omp_offload.failed8:
2358 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]]
2359 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT9]]
2360 // CHECK5:       omp_offload.cont9:
2361 // CHECK5-NEXT:    [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2362 // CHECK5-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
2363 // CHECK5-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 8
2364 // CHECK5-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
2365 // CHECK5-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 8
2366 // CHECK5-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
2367 // CHECK5-NEXT:    store ptr null, ptr [[TMP42]], align 8
2368 // CHECK5-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
2369 // CHECK5-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
2370 // CHECK5-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
2371 // CHECK5-NEXT:    store i32 2, ptr [[TMP45]], align 4
2372 // CHECK5-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
2373 // CHECK5-NEXT:    store i32 1, ptr [[TMP46]], align 4
2374 // CHECK5-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
2375 // CHECK5-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 8
2376 // CHECK5-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
2377 // CHECK5-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 8
2378 // CHECK5-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
2379 // CHECK5-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 8
2380 // CHECK5-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
2381 // CHECK5-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8
2382 // CHECK5-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
2383 // CHECK5-NEXT:    store ptr null, ptr [[TMP51]], align 8
2384 // CHECK5-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
2385 // CHECK5-NEXT:    store ptr null, ptr [[TMP52]], align 8
2386 // CHECK5-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
2387 // CHECK5-NEXT:    store i64 123, ptr [[TMP53]], align 8
2388 // CHECK5-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
2389 // CHECK5-NEXT:    store i64 0, ptr [[TMP54]], align 8
2390 // CHECK5-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
2391 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
2392 // CHECK5-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
2393 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
2394 // CHECK5-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
2395 // CHECK5-NEXT:    store i32 0, ptr [[TMP57]], align 4
2396 // CHECK5-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]])
2397 // CHECK5-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
2398 // CHECK5-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2399 // CHECK5:       omp_offload.failed16:
2400 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]]
2401 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
2402 // CHECK5:       omp_offload.cont17:
2403 // CHECK5-NEXT:    [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2404 // CHECK5-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2405 // CHECK5-NEXT:    store ptr [[THIS1]], ptr [[TMP60]], align 8
2406 // CHECK5-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2407 // CHECK5-NEXT:    store ptr [[A18]], ptr [[TMP61]], align 8
2408 // CHECK5-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
2409 // CHECK5-NEXT:    store ptr null, ptr [[TMP62]], align 8
2410 // CHECK5-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2411 // CHECK5-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2412 // CHECK5-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0
2413 // CHECK5-NEXT:    store i32 2, ptr [[TMP65]], align 4
2414 // CHECK5-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1
2415 // CHECK5-NEXT:    store i32 1, ptr [[TMP66]], align 4
2416 // CHECK5-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2
2417 // CHECK5-NEXT:    store ptr [[TMP63]], ptr [[TMP67]], align 8
2418 // CHECK5-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3
2419 // CHECK5-NEXT:    store ptr [[TMP64]], ptr [[TMP68]], align 8
2420 // CHECK5-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4
2421 // CHECK5-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP69]], align 8
2422 // CHECK5-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5
2423 // CHECK5-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8
2424 // CHECK5-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6
2425 // CHECK5-NEXT:    store ptr null, ptr [[TMP71]], align 8
2426 // CHECK5-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7
2427 // CHECK5-NEXT:    store ptr null, ptr [[TMP72]], align 8
2428 // CHECK5-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8
2429 // CHECK5-NEXT:    store i64 123, ptr [[TMP73]], align 8
2430 // CHECK5-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9
2431 // CHECK5-NEXT:    store i64 0, ptr [[TMP74]], align 8
2432 // CHECK5-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10
2433 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4
2434 // CHECK5-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11
2435 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4
2436 // CHECK5-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12
2437 // CHECK5-NEXT:    store i32 0, ptr [[TMP77]], align 4
2438 // CHECK5-NEXT:    [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]])
2439 // CHECK5-NEXT:    [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
2440 // CHECK5-NEXT:    br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
2441 // CHECK5:       omp_offload.failed24:
2442 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]]
2443 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
2444 // CHECK5:       omp_offload.cont25:
2445 // CHECK5-NEXT:    [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2446 // CHECK5-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
2447 // CHECK5-NEXT:    store ptr [[THIS1]], ptr [[TMP80]], align 8
2448 // CHECK5-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
2449 // CHECK5-NEXT:    store ptr [[A26]], ptr [[TMP81]], align 8
2450 // CHECK5-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0
2451 // CHECK5-NEXT:    store ptr null, ptr [[TMP82]], align 8
2452 // CHECK5-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
2453 // CHECK5-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
2454 // CHECK5-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
2455 // CHECK5-NEXT:    store i32 2, ptr [[TMP85]], align 4
2456 // CHECK5-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
2457 // CHECK5-NEXT:    store i32 1, ptr [[TMP86]], align 4
2458 // CHECK5-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
2459 // CHECK5-NEXT:    store ptr [[TMP83]], ptr [[TMP87]], align 8
2460 // CHECK5-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
2461 // CHECK5-NEXT:    store ptr [[TMP84]], ptr [[TMP88]], align 8
2462 // CHECK5-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
2463 // CHECK5-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP89]], align 8
2464 // CHECK5-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
2465 // CHECK5-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8
2466 // CHECK5-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
2467 // CHECK5-NEXT:    store ptr null, ptr [[TMP91]], align 8
2468 // CHECK5-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
2469 // CHECK5-NEXT:    store ptr null, ptr [[TMP92]], align 8
2470 // CHECK5-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
2471 // CHECK5-NEXT:    store i64 123, ptr [[TMP93]], align 8
2472 // CHECK5-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
2473 // CHECK5-NEXT:    store i64 0, ptr [[TMP94]], align 8
2474 // CHECK5-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
2475 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4
2476 // CHECK5-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
2477 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4
2478 // CHECK5-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
2479 // CHECK5-NEXT:    store i32 0, ptr [[TMP97]], align 4
2480 // CHECK5-NEXT:    [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]])
2481 // CHECK5-NEXT:    [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0
2482 // CHECK5-NEXT:    br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
2483 // CHECK5:       omp_offload.failed32:
2484 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]]
2485 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
2486 // CHECK5:       omp_offload.cont33:
2487 // CHECK5-NEXT:    [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2488 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i64 0, i64 0
2489 // CHECK5-NEXT:    [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
2490 // CHECK5-NEXT:    ret i32 [[TMP100]]
2491 //
2492 //
2493 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
2494 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
2495 // CHECK5-NEXT:  entry:
2496 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2497 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2498 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2499 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]])
2500 // CHECK5-NEXT:    ret void
2501 //
2502 //
2503 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined
2504 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2505 // CHECK5-NEXT:  entry:
2506 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2507 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2508 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2509 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2510 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2511 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2512 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2513 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2514 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2515 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2516 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2517 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2518 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2519 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2520 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2521 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
2522 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2523 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2524 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2525 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2526 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2527 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2528 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2529 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2530 // CHECK5:       cond.true:
2531 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2532 // CHECK5:       cond.false:
2533 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2534 // CHECK5-NEXT:    br label [[COND_END]]
2535 // CHECK5:       cond.end:
2536 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2537 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2538 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2539 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2540 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2541 // CHECK5:       omp.inner.for.cond:
2542 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2543 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2544 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2545 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2546 // CHECK5:       omp.inner.for.body:
2547 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2548 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2549 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2550 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2551 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
2552 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2553 // CHECK5:       omp.inner.for.inc:
2554 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2555 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2556 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2557 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2558 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2559 // CHECK5:       omp.inner.for.end:
2560 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2561 // CHECK5:       omp.loop.exit:
2562 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2563 // CHECK5-NEXT:    ret void
2564 //
2565 //
2566 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined
2567 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2568 // CHECK5-NEXT:  entry:
2569 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2570 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2571 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2572 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2573 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2574 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2575 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2576 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2577 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2578 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2579 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2580 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2581 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2582 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2583 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2584 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2585 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2586 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2587 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2588 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
2589 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2590 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2591 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2592 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2593 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2594 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2595 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2596 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2597 // CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2598 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2599 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2600 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2601 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2602 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2603 // CHECK5:       cond.true:
2604 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2605 // CHECK5:       cond.false:
2606 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2607 // CHECK5-NEXT:    br label [[COND_END]]
2608 // CHECK5:       cond.end:
2609 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2610 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2611 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2612 // CHECK5-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2613 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2614 // CHECK5:       omp.inner.for.cond:
2615 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2616 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2617 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2618 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2619 // CHECK5:       omp.inner.for.body:
2620 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2621 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2622 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2623 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2624 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
2625 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
2626 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2627 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
2628 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
2629 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2630 // CHECK5:       omp.body.continue:
2631 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2632 // CHECK5:       omp.inner.for.inc:
2633 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2634 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2635 // CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2636 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2637 // CHECK5:       omp.inner.for.end:
2638 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2639 // CHECK5:       omp.loop.exit:
2640 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
2641 // CHECK5-NEXT:    ret void
2642 //
2643 //
2644 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
2645 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2646 // CHECK5-NEXT:  entry:
2647 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2648 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2649 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2650 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])
2651 // CHECK5-NEXT:    ret void
2652 //
2653 //
2654 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined
2655 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2656 // CHECK5-NEXT:  entry:
2657 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2658 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2659 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2660 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2661 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2662 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2663 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2664 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2665 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2666 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2667 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2668 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2669 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2670 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2671 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2672 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
2673 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2674 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2675 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2676 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2677 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2678 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2679 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2680 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2681 // CHECK5:       cond.true:
2682 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2683 // CHECK5:       cond.false:
2684 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2685 // CHECK5-NEXT:    br label [[COND_END]]
2686 // CHECK5:       cond.end:
2687 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2688 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2689 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2690 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2691 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2692 // CHECK5:       omp.inner.for.cond:
2693 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2694 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2695 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2696 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2697 // CHECK5:       omp.inner.for.body:
2698 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2699 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2700 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2701 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2702 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
2703 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2704 // CHECK5:       omp.inner.for.inc:
2705 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2706 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2707 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2708 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2709 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2710 // CHECK5:       omp.inner.for.end:
2711 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2712 // CHECK5:       omp.loop.exit:
2713 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2714 // CHECK5-NEXT:    ret void
2715 //
2716 //
2717 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined
2718 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2719 // CHECK5-NEXT:  entry:
2720 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2721 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2722 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2723 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2724 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2725 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2726 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2727 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2728 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2729 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2730 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2731 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2732 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2733 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2734 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2735 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2736 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2737 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2738 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2739 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
2740 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2741 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2742 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2743 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2744 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2745 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2746 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2747 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2748 // CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2749 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2750 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2751 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2752 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2753 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2754 // CHECK5:       cond.true:
2755 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2756 // CHECK5:       cond.false:
2757 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2758 // CHECK5-NEXT:    br label [[COND_END]]
2759 // CHECK5:       cond.end:
2760 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2761 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2762 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2763 // CHECK5-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2764 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2765 // CHECK5:       omp.inner.for.cond:
2766 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2767 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2768 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2769 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2770 // CHECK5:       omp.inner.for.body:
2771 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2772 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2773 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2774 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2775 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
2776 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
2777 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2778 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
2779 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
2780 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2781 // CHECK5:       omp.body.continue:
2782 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2783 // CHECK5:       omp.inner.for.inc:
2784 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2785 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2786 // CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2787 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2788 // CHECK5:       omp.inner.for.end:
2789 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2790 // CHECK5:       omp.loop.exit:
2791 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
2792 // CHECK5-NEXT:    ret void
2793 //
2794 //
2795 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
2796 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2797 // CHECK5-NEXT:  entry:
2798 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2799 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2800 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2801 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]])
2802 // CHECK5-NEXT:    ret void
2803 //
2804 //
2805 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined
2806 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2807 // CHECK5-NEXT:  entry:
2808 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2809 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2810 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2811 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2812 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2813 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2814 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2815 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2816 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2817 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2818 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2819 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2820 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2821 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2822 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2823 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
2824 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2825 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2826 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2827 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2828 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2829 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2830 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2831 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2832 // CHECK5:       cond.true:
2833 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2834 // CHECK5:       cond.false:
2835 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2836 // CHECK5-NEXT:    br label [[COND_END]]
2837 // CHECK5:       cond.end:
2838 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2839 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2840 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2841 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2842 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2843 // CHECK5:       omp.inner.for.cond:
2844 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2845 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2846 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2847 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2848 // CHECK5:       omp.inner.for.body:
2849 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2850 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2851 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2852 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2853 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
2854 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2855 // CHECK5:       omp.inner.for.inc:
2856 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2857 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2858 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2859 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2860 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2861 // CHECK5:       omp.inner.for.end:
2862 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2863 // CHECK5:       omp.loop.exit:
2864 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2865 // CHECK5-NEXT:    ret void
2866 //
2867 //
2868 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined
2869 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2870 // CHECK5-NEXT:  entry:
2871 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2872 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2873 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2874 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2875 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2876 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2877 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2878 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2879 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2880 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2881 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2882 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2883 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2884 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2885 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2886 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2887 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2888 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2889 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2890 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
2891 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2892 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2893 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2894 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2895 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2896 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2897 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2898 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2899 // CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2900 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2901 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
2902 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2903 // CHECK5:       omp.dispatch.cond:
2904 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2905 // CHECK5-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2906 // CHECK5-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
2907 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
2908 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2909 // CHECK5:       cond.true:
2910 // CHECK5-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2911 // CHECK5-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
2912 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2913 // CHECK5:       cond.false:
2914 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2915 // CHECK5-NEXT:    br label [[COND_END]]
2916 // CHECK5:       cond.end:
2917 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2918 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2919 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2920 // CHECK5-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
2921 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2922 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2923 // CHECK5-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2924 // CHECK5-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2925 // CHECK5:       omp.dispatch.body:
2926 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2927 // CHECK5:       omp.inner.for.cond:
2928 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2929 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2930 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2931 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2932 // CHECK5:       omp.inner.for.body:
2933 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2934 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2935 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2936 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2937 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
2938 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
2939 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
2940 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
2941 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
2942 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2943 // CHECK5:       omp.body.continue:
2944 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2945 // CHECK5:       omp.inner.for.inc:
2946 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2947 // CHECK5-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
2948 // CHECK5-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
2949 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2950 // CHECK5:       omp.inner.for.end:
2951 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2952 // CHECK5:       omp.dispatch.inc:
2953 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2954 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2955 // CHECK5-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2956 // CHECK5-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4
2957 // CHECK5-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2958 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2959 // CHECK5-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2960 // CHECK5-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4
2961 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
2962 // CHECK5:       omp.dispatch.end:
2963 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
2964 // CHECK5-NEXT:    ret void
2965 //
2966 //
2967 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
2968 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2969 // CHECK5-NEXT:  entry:
2970 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2971 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2972 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2973 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]])
2974 // CHECK5-NEXT:    ret void
2975 //
2976 //
2977 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined
2978 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2979 // CHECK5-NEXT:  entry:
2980 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2981 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2982 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2983 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2984 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2985 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2986 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2987 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2988 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2989 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2990 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2991 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2992 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2993 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2994 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2995 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
2996 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2997 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2998 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2999 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3000 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3001 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3002 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3003 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3004 // CHECK5:       cond.true:
3005 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3006 // CHECK5:       cond.false:
3007 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3008 // CHECK5-NEXT:    br label [[COND_END]]
3009 // CHECK5:       cond.end:
3010 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3011 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3012 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3013 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3014 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3015 // CHECK5:       omp.inner.for.cond:
3016 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3017 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3018 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3019 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3020 // CHECK5:       omp.inner.for.body:
3021 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3022 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3023 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3024 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3025 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
3026 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3027 // CHECK5:       omp.inner.for.inc:
3028 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3029 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3030 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3031 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3032 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3033 // CHECK5:       omp.inner.for.end:
3034 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3035 // CHECK5:       omp.loop.exit:
3036 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3037 // CHECK5-NEXT:    ret void
3038 //
3039 //
3040 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined
3041 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3042 // CHECK5-NEXT:  entry:
3043 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3044 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3045 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3046 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3047 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3048 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3049 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3050 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3051 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3052 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3053 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3054 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3055 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3056 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3057 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3058 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3059 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3060 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3061 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3062 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
3063 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3064 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3065 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3066 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3067 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3068 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3069 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3070 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3071 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3072 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3073 // CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3074 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
3075 // CHECK5-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
3076 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3077 // CHECK5:       omp.dispatch.cond:
3078 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
3079 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3080 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3081 // CHECK5:       omp.dispatch.body:
3082 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3083 // CHECK5-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
3084 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3085 // CHECK5:       omp.inner.for.cond:
3086 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
3087 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
3088 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3089 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3090 // CHECK5:       omp.inner.for.body:
3091 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
3092 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3093 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3094 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
3095 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
3096 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
3097 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3098 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
3099 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]
3100 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3101 // CHECK5:       omp.body.continue:
3102 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3103 // CHECK5:       omp.inner.for.inc:
3104 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
3105 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3106 // CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
3107 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3108 // CHECK5:       omp.inner.for.end:
3109 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3110 // CHECK5:       omp.dispatch.inc:
3111 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
3112 // CHECK5:       omp.dispatch.end:
3113 // CHECK5-NEXT:    ret void
3114 //
3115 //
3116 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
3117 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3118 // CHECK5-NEXT:  entry:
3119 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3120 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3121 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3122 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]])
3123 // CHECK5-NEXT:    ret void
3124 //
3125 //
3126 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined
3127 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3128 // CHECK5-NEXT:  entry:
3129 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3130 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3131 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3132 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3133 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3134 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3135 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3136 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3137 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3138 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3139 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3140 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3141 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3142 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3143 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3144 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
3145 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3146 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3147 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3148 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3149 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3150 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3151 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3152 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3153 // CHECK5:       cond.true:
3154 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3155 // CHECK5:       cond.false:
3156 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3157 // CHECK5-NEXT:    br label [[COND_END]]
3158 // CHECK5:       cond.end:
3159 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3160 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3161 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3162 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3163 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3164 // CHECK5:       omp.inner.for.cond:
3165 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3166 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3167 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3168 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3169 // CHECK5:       omp.inner.for.body:
3170 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3171 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3172 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3173 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3174 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
3175 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3176 // CHECK5:       omp.inner.for.inc:
3177 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3178 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3179 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3180 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3181 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3182 // CHECK5:       omp.inner.for.end:
3183 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3184 // CHECK5:       omp.loop.exit:
3185 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3186 // CHECK5-NEXT:    ret void
3187 //
3188 //
3189 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined
3190 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3191 // CHECK5-NEXT:  entry:
3192 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3193 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3194 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3195 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3196 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3197 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3198 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3199 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3200 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3201 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3202 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3203 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3204 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3205 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3206 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3207 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3208 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3209 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3210 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3211 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
3212 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3213 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3214 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3215 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3216 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3217 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3218 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3219 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3220 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3221 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3222 // CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3223 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
3224 // CHECK5-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
3225 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3226 // CHECK5:       omp.dispatch.cond:
3227 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
3228 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3229 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3230 // CHECK5:       omp.dispatch.body:
3231 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3232 // CHECK5-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
3233 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3234 // CHECK5:       omp.inner.for.cond:
3235 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
3236 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
3237 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3238 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3239 // CHECK5:       omp.inner.for.body:
3240 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3241 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3242 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3243 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
3244 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
3245 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
3246 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3247 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
3248 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]
3249 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3250 // CHECK5:       omp.body.continue:
3251 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3252 // CHECK5:       omp.inner.for.inc:
3253 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3254 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3255 // CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3256 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3257 // CHECK5:       omp.inner.for.end:
3258 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3259 // CHECK5:       omp.dispatch.inc:
3260 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
3261 // CHECK5:       omp.dispatch.end:
3262 // CHECK5-NEXT:    ret void
3263 //
3264 //
3265 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3266 // CHECK5-SAME: () #[[ATTR3:[0-9]+]] {
3267 // CHECK5-NEXT:  entry:
3268 // CHECK5-NEXT:    call void @__tgt_register_requires(i64 1)
3269 // CHECK5-NEXT:    ret void
3270 //
3271 //
3272 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3273 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3274 // CHECK7-NEXT:  entry:
3275 // CHECK7-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3276 // CHECK7-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
3277 // CHECK7-NEXT:    ret i32 [[CALL]]
3278 //
3279 //
3280 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3281 // CHECK7-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3282 // CHECK7-NEXT:  entry:
3283 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3284 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
3285 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
3286 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
3287 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3288 // CHECK7-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3289 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4
3290 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4
3291 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4
3292 // CHECK7-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
3293 // CHECK7-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3294 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4
3295 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4
3296 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4
3297 // CHECK7-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4
3298 // CHECK7-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3299 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 4
3300 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 4
3301 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 4
3302 // CHECK7-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
3303 // CHECK7-NEXT:    [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3304 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 4
3305 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 4
3306 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 4
3307 // CHECK7-NEXT:    [[_TMP30:%.*]] = alloca i32, align 4
3308 // CHECK7-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3309 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3310 // CHECK7-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3311 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
3312 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3313 // CHECK7-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4
3314 // CHECK7-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3315 // CHECK7-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
3316 // CHECK7-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3317 // CHECK7-NEXT:    store ptr null, ptr [[TMP2]], align 4
3318 // CHECK7-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3319 // CHECK7-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3320 // CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
3321 // CHECK7-NEXT:    store i32 2, ptr [[TMP5]], align 4
3322 // CHECK7-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
3323 // CHECK7-NEXT:    store i32 1, ptr [[TMP6]], align 4
3324 // CHECK7-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
3325 // CHECK7-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
3326 // CHECK7-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
3327 // CHECK7-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
3328 // CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
3329 // CHECK7-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4
3330 // CHECK7-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
3331 // CHECK7-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4
3332 // CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
3333 // CHECK7-NEXT:    store ptr null, ptr [[TMP11]], align 4
3334 // CHECK7-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
3335 // CHECK7-NEXT:    store ptr null, ptr [[TMP12]], align 4
3336 // CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
3337 // CHECK7-NEXT:    store i64 123, ptr [[TMP13]], align 8
3338 // CHECK7-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
3339 // CHECK7-NEXT:    store i64 0, ptr [[TMP14]], align 8
3340 // CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
3341 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
3342 // CHECK7-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
3343 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
3344 // CHECK7-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
3345 // CHECK7-NEXT:    store i32 0, ptr [[TMP17]], align 4
3346 // CHECK7-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.region_id, ptr [[KERNEL_ARGS]])
3347 // CHECK7-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
3348 // CHECK7-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3349 // CHECK7:       omp_offload.failed:
3350 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36(ptr [[THIS1]]) #[[ATTR2:[0-9]+]]
3351 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3352 // CHECK7:       omp_offload.cont:
3353 // CHECK7-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
3354 // CHECK7-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3355 // CHECK7-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 4
3356 // CHECK7-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3357 // CHECK7-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 4
3358 // CHECK7-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
3359 // CHECK7-NEXT:    store ptr null, ptr [[TMP22]], align 4
3360 // CHECK7-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3361 // CHECK7-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3362 // CHECK7-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
3363 // CHECK7-NEXT:    store i32 2, ptr [[TMP25]], align 4
3364 // CHECK7-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
3365 // CHECK7-NEXT:    store i32 1, ptr [[TMP26]], align 4
3366 // CHECK7-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
3367 // CHECK7-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
3368 // CHECK7-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
3369 // CHECK7-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
3370 // CHECK7-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
3371 // CHECK7-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 4
3372 // CHECK7-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
3373 // CHECK7-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4
3374 // CHECK7-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
3375 // CHECK7-NEXT:    store ptr null, ptr [[TMP31]], align 4
3376 // CHECK7-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
3377 // CHECK7-NEXT:    store ptr null, ptr [[TMP32]], align 4
3378 // CHECK7-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
3379 // CHECK7-NEXT:    store i64 123, ptr [[TMP33]], align 8
3380 // CHECK7-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
3381 // CHECK7-NEXT:    store i64 0, ptr [[TMP34]], align 8
3382 // CHECK7-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
3383 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
3384 // CHECK7-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
3385 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
3386 // CHECK7-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
3387 // CHECK7-NEXT:    store i32 0, ptr [[TMP37]], align 4
3388 // CHECK7-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])
3389 // CHECK7-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
3390 // CHECK7-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
3391 // CHECK7:       omp_offload.failed8:
3392 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR2]]
3393 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT9]]
3394 // CHECK7:       omp_offload.cont9:
3395 // CHECK7-NEXT:    [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
3396 // CHECK7-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
3397 // CHECK7-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 4
3398 // CHECK7-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
3399 // CHECK7-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 4
3400 // CHECK7-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
3401 // CHECK7-NEXT:    store ptr null, ptr [[TMP42]], align 4
3402 // CHECK7-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
3403 // CHECK7-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
3404 // CHECK7-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
3405 // CHECK7-NEXT:    store i32 2, ptr [[TMP45]], align 4
3406 // CHECK7-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
3407 // CHECK7-NEXT:    store i32 1, ptr [[TMP46]], align 4
3408 // CHECK7-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
3409 // CHECK7-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 4
3410 // CHECK7-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
3411 // CHECK7-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 4
3412 // CHECK7-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
3413 // CHECK7-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 4
3414 // CHECK7-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
3415 // CHECK7-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4
3416 // CHECK7-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
3417 // CHECK7-NEXT:    store ptr null, ptr [[TMP51]], align 4
3418 // CHECK7-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
3419 // CHECK7-NEXT:    store ptr null, ptr [[TMP52]], align 4
3420 // CHECK7-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
3421 // CHECK7-NEXT:    store i64 123, ptr [[TMP53]], align 8
3422 // CHECK7-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
3423 // CHECK7-NEXT:    store i64 0, ptr [[TMP54]], align 8
3424 // CHECK7-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
3425 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
3426 // CHECK7-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
3427 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
3428 // CHECK7-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
3429 // CHECK7-NEXT:    store i32 0, ptr [[TMP57]], align 4
3430 // CHECK7-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.region_id, ptr [[KERNEL_ARGS15]])
3431 // CHECK7-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
3432 // CHECK7-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
3433 // CHECK7:       omp_offload.failed16:
3434 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44(ptr [[THIS1]]) #[[ATTR2]]
3435 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
3436 // CHECK7:       omp_offload.cont17:
3437 // CHECK7-NEXT:    [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
3438 // CHECK7-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3439 // CHECK7-NEXT:    store ptr [[THIS1]], ptr [[TMP60]], align 4
3440 // CHECK7-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3441 // CHECK7-NEXT:    store ptr [[A18]], ptr [[TMP61]], align 4
3442 // CHECK7-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
3443 // CHECK7-NEXT:    store ptr null, ptr [[TMP62]], align 4
3444 // CHECK7-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3445 // CHECK7-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3446 // CHECK7-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0
3447 // CHECK7-NEXT:    store i32 2, ptr [[TMP65]], align 4
3448 // CHECK7-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1
3449 // CHECK7-NEXT:    store i32 1, ptr [[TMP66]], align 4
3450 // CHECK7-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2
3451 // CHECK7-NEXT:    store ptr [[TMP63]], ptr [[TMP67]], align 4
3452 // CHECK7-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3
3453 // CHECK7-NEXT:    store ptr [[TMP64]], ptr [[TMP68]], align 4
3454 // CHECK7-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4
3455 // CHECK7-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP69]], align 4
3456 // CHECK7-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5
3457 // CHECK7-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP70]], align 4
3458 // CHECK7-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6
3459 // CHECK7-NEXT:    store ptr null, ptr [[TMP71]], align 4
3460 // CHECK7-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7
3461 // CHECK7-NEXT:    store ptr null, ptr [[TMP72]], align 4
3462 // CHECK7-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8
3463 // CHECK7-NEXT:    store i64 123, ptr [[TMP73]], align 8
3464 // CHECK7-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9
3465 // CHECK7-NEXT:    store i64 0, ptr [[TMP74]], align 8
3466 // CHECK7-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10
3467 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4
3468 // CHECK7-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11
3469 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4
3470 // CHECK7-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12
3471 // CHECK7-NEXT:    store i32 0, ptr [[TMP77]], align 4
3472 // CHECK7-NEXT:    [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.region_id, ptr [[KERNEL_ARGS23]])
3473 // CHECK7-NEXT:    [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
3474 // CHECK7-NEXT:    br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
3475 // CHECK7:       omp_offload.failed24:
3476 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49(ptr [[THIS1]]) #[[ATTR2]]
3477 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
3478 // CHECK7:       omp_offload.cont25:
3479 // CHECK7-NEXT:    [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
3480 // CHECK7-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
3481 // CHECK7-NEXT:    store ptr [[THIS1]], ptr [[TMP80]], align 4
3482 // CHECK7-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
3483 // CHECK7-NEXT:    store ptr [[A26]], ptr [[TMP81]], align 4
3484 // CHECK7-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0
3485 // CHECK7-NEXT:    store ptr null, ptr [[TMP82]], align 4
3486 // CHECK7-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
3487 // CHECK7-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
3488 // CHECK7-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
3489 // CHECK7-NEXT:    store i32 2, ptr [[TMP85]], align 4
3490 // CHECK7-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
3491 // CHECK7-NEXT:    store i32 1, ptr [[TMP86]], align 4
3492 // CHECK7-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
3493 // CHECK7-NEXT:    store ptr [[TMP83]], ptr [[TMP87]], align 4
3494 // CHECK7-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
3495 // CHECK7-NEXT:    store ptr [[TMP84]], ptr [[TMP88]], align 4
3496 // CHECK7-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
3497 // CHECK7-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP89]], align 4
3498 // CHECK7-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
3499 // CHECK7-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP90]], align 4
3500 // CHECK7-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
3501 // CHECK7-NEXT:    store ptr null, ptr [[TMP91]], align 4
3502 // CHECK7-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
3503 // CHECK7-NEXT:    store ptr null, ptr [[TMP92]], align 4
3504 // CHECK7-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
3505 // CHECK7-NEXT:    store i64 123, ptr [[TMP93]], align 8
3506 // CHECK7-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
3507 // CHECK7-NEXT:    store i64 0, ptr [[TMP94]], align 8
3508 // CHECK7-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
3509 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4
3510 // CHECK7-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
3511 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4
3512 // CHECK7-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
3513 // CHECK7-NEXT:    store i32 0, ptr [[TMP97]], align 4
3514 // CHECK7-NEXT:    [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.region_id, ptr [[KERNEL_ARGS31]])
3515 // CHECK7-NEXT:    [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0
3516 // CHECK7-NEXT:    br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
3517 // CHECK7:       omp_offload.failed32:
3518 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54(ptr [[THIS1]]) #[[ATTR2]]
3519 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
3520 // CHECK7:       omp_offload.cont33:
3521 // CHECK7-NEXT:    [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
3522 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i32 0, i32 0
3523 // CHECK7-NEXT:    [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
3524 // CHECK7-NEXT:    ret i32 [[TMP100]]
3525 //
3526 //
3527 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36
3528 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3529 // CHECK7-NEXT:  entry:
3530 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3531 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3532 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3533 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined, ptr [[TMP0]])
3534 // CHECK7-NEXT:    ret void
3535 //
3536 //
3537 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined
3538 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3539 // CHECK7-NEXT:  entry:
3540 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3541 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3542 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3543 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3544 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3545 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3546 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3547 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3548 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3549 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3550 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3551 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3552 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3553 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3554 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3555 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
3556 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3557 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3558 // CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3559 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3560 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3561 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3562 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3563 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3564 // CHECK7:       cond.true:
3565 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3566 // CHECK7:       cond.false:
3567 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3568 // CHECK7-NEXT:    br label [[COND_END]]
3569 // CHECK7:       cond.end:
3570 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3571 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3572 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3573 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3574 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3575 // CHECK7:       omp.inner.for.cond:
3576 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3577 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3578 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3579 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3580 // CHECK7:       omp.inner.for.body:
3581 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3582 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3583 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
3584 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3585 // CHECK7:       omp.inner.for.inc:
3586 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3587 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3588 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3589 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3590 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3591 // CHECK7:       omp.inner.for.end:
3592 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3593 // CHECK7:       omp.loop.exit:
3594 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3595 // CHECK7-NEXT:    ret void
3596 //
3597 //
3598 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l36.omp_outlined.omp_outlined
3599 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3600 // CHECK7-NEXT:  entry:
3601 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3602 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3603 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3604 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3605 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3606 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3607 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3608 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3609 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3610 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3611 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3612 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3613 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3614 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3615 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3616 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3617 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3618 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3619 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3620 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
3621 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3622 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3623 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
3624 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
3625 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3626 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3627 // CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3628 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
3629 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3630 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3631 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3632 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3633 // CHECK7:       cond.true:
3634 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3635 // CHECK7:       cond.false:
3636 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3637 // CHECK7-NEXT:    br label [[COND_END]]
3638 // CHECK7:       cond.end:
3639 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3640 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3641 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3642 // CHECK7-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
3643 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3644 // CHECK7:       omp.inner.for.cond:
3645 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3646 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3647 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3648 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3649 // CHECK7:       omp.inner.for.body:
3650 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3651 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3652 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3653 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3654 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
3655 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
3656 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]
3657 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
3658 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3659 // CHECK7:       omp.body.continue:
3660 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3661 // CHECK7:       omp.inner.for.inc:
3662 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3663 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3664 // CHECK7-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
3665 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3666 // CHECK7:       omp.inner.for.end:
3667 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3668 // CHECK7:       omp.loop.exit:
3669 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
3670 // CHECK7-NEXT:    ret void
3671 //
3672 //
3673 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
3674 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3675 // CHECK7-NEXT:  entry:
3676 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3677 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3678 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3679 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])
3680 // CHECK7-NEXT:    ret void
3681 //
3682 //
3683 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined
3684 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3685 // CHECK7-NEXT:  entry:
3686 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3687 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3688 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3689 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3690 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3691 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3692 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3693 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3694 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3695 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3696 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3697 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3698 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3699 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3700 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3701 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
3702 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3703 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3704 // CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3705 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3706 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3707 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3708 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3709 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3710 // CHECK7:       cond.true:
3711 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3712 // CHECK7:       cond.false:
3713 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3714 // CHECK7-NEXT:    br label [[COND_END]]
3715 // CHECK7:       cond.end:
3716 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3717 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3718 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3719 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3720 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3721 // CHECK7:       omp.inner.for.cond:
3722 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3723 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3724 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3725 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3726 // CHECK7:       omp.inner.for.body:
3727 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3728 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3729 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
3730 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3731 // CHECK7:       omp.inner.for.inc:
3732 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3733 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3734 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3735 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3736 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3737 // CHECK7:       omp.inner.for.end:
3738 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3739 // CHECK7:       omp.loop.exit:
3740 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3741 // CHECK7-NEXT:    ret void
3742 //
3743 //
3744 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined
3745 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3746 // CHECK7-NEXT:  entry:
3747 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3748 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3749 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3750 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3751 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3752 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3753 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3754 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3755 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3756 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3757 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3758 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3759 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3760 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3761 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3762 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3763 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3764 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3765 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3766 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
3767 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3768 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3769 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
3770 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
3771 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3772 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3773 // CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3774 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
3775 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3776 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3777 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3778 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3779 // CHECK7:       cond.true:
3780 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3781 // CHECK7:       cond.false:
3782 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3783 // CHECK7-NEXT:    br label [[COND_END]]
3784 // CHECK7:       cond.end:
3785 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3786 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3787 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3788 // CHECK7-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
3789 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3790 // CHECK7:       omp.inner.for.cond:
3791 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3792 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3793 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3794 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3795 // CHECK7:       omp.inner.for.body:
3796 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3797 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3798 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3799 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3800 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
3801 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
3802 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]
3803 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
3804 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3805 // CHECK7:       omp.body.continue:
3806 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3807 // CHECK7:       omp.inner.for.inc:
3808 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3809 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3810 // CHECK7-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
3811 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3812 // CHECK7:       omp.inner.for.end:
3813 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3814 // CHECK7:       omp.loop.exit:
3815 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
3816 // CHECK7-NEXT:    ret void
3817 //
3818 //
3819 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44
3820 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3821 // CHECK7-NEXT:  entry:
3822 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3823 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3824 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3825 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined, ptr [[TMP0]])
3826 // CHECK7-NEXT:    ret void
3827 //
3828 //
3829 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined
3830 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3831 // CHECK7-NEXT:  entry:
3832 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3833 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3834 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3835 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3836 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3837 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3838 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3839 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3840 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3841 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3842 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3843 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3844 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3845 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3846 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3847 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
3848 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3849 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3850 // CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3851 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3852 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3853 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3854 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3855 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3856 // CHECK7:       cond.true:
3857 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3858 // CHECK7:       cond.false:
3859 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3860 // CHECK7-NEXT:    br label [[COND_END]]
3861 // CHECK7:       cond.end:
3862 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3863 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3864 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3865 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3866 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3867 // CHECK7:       omp.inner.for.cond:
3868 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3869 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3870 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3871 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3872 // CHECK7:       omp.inner.for.body:
3873 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3874 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3875 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
3876 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3877 // CHECK7:       omp.inner.for.inc:
3878 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3879 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3880 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3881 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3882 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3883 // CHECK7:       omp.inner.for.end:
3884 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3885 // CHECK7:       omp.loop.exit:
3886 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3887 // CHECK7-NEXT:    ret void
3888 //
3889 //
3890 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l44.omp_outlined.omp_outlined
3891 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3892 // CHECK7-NEXT:  entry:
3893 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3894 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3895 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3896 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3897 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3898 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3899 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3900 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3901 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3902 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3903 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3904 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3905 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3906 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3907 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3908 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3909 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3910 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3911 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3912 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
3913 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3914 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3915 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
3916 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
3917 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3918 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3919 // CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3920 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
3921 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
3922 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3923 // CHECK7:       omp.dispatch.cond:
3924 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3925 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3926 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
3927 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3928 // CHECK7:       cond.true:
3929 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3930 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3931 // CHECK7:       cond.false:
3932 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3933 // CHECK7-NEXT:    br label [[COND_END]]
3934 // CHECK7:       cond.end:
3935 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
3936 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3937 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3938 // CHECK7-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
3939 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3940 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3941 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3942 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3943 // CHECK7:       omp.dispatch.body:
3944 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3945 // CHECK7:       omp.inner.for.cond:
3946 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3947 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3948 // CHECK7-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3949 // CHECK7-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3950 // CHECK7:       omp.inner.for.body:
3951 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3952 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3953 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3954 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3955 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
3956 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
3957 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP15]]
3958 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
3959 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3960 // CHECK7:       omp.body.continue:
3961 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3962 // CHECK7:       omp.inner.for.inc:
3963 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3964 // CHECK7-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
3965 // CHECK7-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
3966 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3967 // CHECK7:       omp.inner.for.end:
3968 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3969 // CHECK7:       omp.dispatch.inc:
3970 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3971 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3972 // CHECK7-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3973 // CHECK7-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
3974 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3975 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3976 // CHECK7-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
3977 // CHECK7-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
3978 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
3979 // CHECK7:       omp.dispatch.end:
3980 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
3981 // CHECK7-NEXT:    ret void
3982 //
3983 //
3984 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49
3985 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3986 // CHECK7-NEXT:  entry:
3987 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3988 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3989 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3990 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined, ptr [[TMP0]])
3991 // CHECK7-NEXT:    ret void
3992 //
3993 //
3994 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined
3995 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3996 // CHECK7-NEXT:  entry:
3997 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3998 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3999 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4000 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4001 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4002 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4003 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4004 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4005 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4006 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
4007 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4008 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4009 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4010 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4011 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4012 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
4013 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4014 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4015 // CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4016 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
4017 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4018 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4019 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4020 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4021 // CHECK7:       cond.true:
4022 // CHECK7-NEXT:    br label [[COND_END:%.*]]
4023 // CHECK7:       cond.false:
4024 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4025 // CHECK7-NEXT:    br label [[COND_END]]
4026 // CHECK7:       cond.end:
4027 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4028 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4029 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4030 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
4031 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4032 // CHECK7:       omp.inner.for.cond:
4033 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4034 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4035 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4036 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4037 // CHECK7:       omp.inner.for.body:
4038 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4039 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4040 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
4041 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4042 // CHECK7:       omp.inner.for.inc:
4043 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4044 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4045 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4046 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4047 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
4048 // CHECK7:       omp.inner.for.end:
4049 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4050 // CHECK7:       omp.loop.exit:
4051 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
4052 // CHECK7-NEXT:    ret void
4053 //
4054 //
4055 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l49.omp_outlined.omp_outlined
4056 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
4057 // CHECK7-NEXT:  entry:
4058 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4059 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4060 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4061 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4062 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4063 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4064 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4065 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4066 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4067 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4068 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4069 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
4070 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4071 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4072 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
4073 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
4074 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4075 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4076 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4077 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
4078 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
4079 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
4080 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
4081 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
4082 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4083 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4084 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4085 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4086 // CHECK7-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4087 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
4088 // CHECK7-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
4089 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4090 // CHECK7:       omp.dispatch.cond:
4091 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
4092 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4093 // CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4094 // CHECK7:       omp.dispatch.body:
4095 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4096 // CHECK7-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
4097 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4098 // CHECK7:       omp.inner.for.cond:
4099 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
4100 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
4101 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4102 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4103 // CHECK7:       omp.inner.for.body:
4104 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4105 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4106 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4107 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
4108 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
4109 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
4110 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]
4111 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]
4112 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4113 // CHECK7:       omp.body.continue:
4114 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4115 // CHECK7:       omp.inner.for.inc:
4116 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4117 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
4118 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4119 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4120 // CHECK7:       omp.inner.for.end:
4121 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4122 // CHECK7:       omp.dispatch.inc:
4123 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
4124 // CHECK7:       omp.dispatch.end:
4125 // CHECK7-NEXT:    ret void
4126 //
4127 //
4128 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54
4129 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
4130 // CHECK7-NEXT:  entry:
4131 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4132 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4133 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4134 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined, ptr [[TMP0]])
4135 // CHECK7-NEXT:    ret void
4136 //
4137 //
4138 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined
4139 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
4140 // CHECK7-NEXT:  entry:
4141 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4142 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4143 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4144 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4145 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4146 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4147 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4148 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4149 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4150 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
4151 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4152 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4153 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4154 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4155 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4156 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
4157 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4158 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4159 // CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4160 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
4161 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4162 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4163 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4164 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4165 // CHECK7:       cond.true:
4166 // CHECK7-NEXT:    br label [[COND_END:%.*]]
4167 // CHECK7:       cond.false:
4168 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4169 // CHECK7-NEXT:    br label [[COND_END]]
4170 // CHECK7:       cond.end:
4171 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4172 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4173 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4174 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
4175 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4176 // CHECK7:       omp.inner.for.cond:
4177 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4178 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4179 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4180 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4181 // CHECK7:       omp.inner.for.body:
4182 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4183 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4184 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
4185 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4186 // CHECK7:       omp.inner.for.inc:
4187 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4188 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4189 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4190 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4191 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
4192 // CHECK7:       omp.inner.for.end:
4193 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4194 // CHECK7:       omp.loop.exit:
4195 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
4196 // CHECK7-NEXT:    ret void
4197 //
4198 //
4199 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l54.omp_outlined.omp_outlined
4200 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
4201 // CHECK7-NEXT:  entry:
4202 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4203 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4204 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4205 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4206 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4207 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4208 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4209 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4210 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4211 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4212 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4213 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
4214 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4215 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4216 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
4217 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
4218 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4219 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4220 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4221 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
4222 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
4223 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
4224 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
4225 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
4226 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4227 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4228 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4229 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4230 // CHECK7-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4231 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
4232 // CHECK7-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
4233 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4234 // CHECK7:       omp.dispatch.cond:
4235 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
4236 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4237 // CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4238 // CHECK7:       omp.dispatch.body:
4239 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4240 // CHECK7-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
4241 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4242 // CHECK7:       omp.inner.for.cond:
4243 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
4244 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
4245 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4246 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4247 // CHECK7:       omp.inner.for.body:
4248 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
4249 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4250 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4251 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
4252 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
4253 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
4254 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]
4255 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]]
4256 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4257 // CHECK7:       omp.body.continue:
4258 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4259 // CHECK7:       omp.inner.for.inc:
4260 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
4261 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
4262 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
4263 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
4264 // CHECK7:       omp.inner.for.end:
4265 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4266 // CHECK7:       omp.dispatch.inc:
4267 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
4268 // CHECK7:       omp.dispatch.end:
4269 // CHECK7-NEXT:    ret void
4270 //
4271 //
4272 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4273 // CHECK7-SAME: () #[[ATTR3:[0-9]+]] {
4274 // CHECK7-NEXT:  entry:
4275 // CHECK7-NEXT:    call void @__tgt_register_requires(i64 1)
4276 // CHECK7-NEXT:    ret void
4277 //
4278 //
4279 // CHECK13-LABEL: define {{[^@]+}}@main
4280 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4281 // CHECK13-NEXT:  entry:
4282 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4283 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
4284 // CHECK13-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8
4285 // CHECK13-NEXT:    [[N:%.*]] = alloca i32, align 4
4286 // CHECK13-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
4287 // CHECK13-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
4288 // CHECK13-NEXT:    [[M:%.*]] = alloca i32, align 4
4289 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
4290 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8
4291 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8
4292 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8
4293 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
4294 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4295 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4296 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4297 // CHECK13-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4298 // CHECK13-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
4299 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8
4300 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8
4301 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8
4302 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8
4303 // CHECK13-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
4304 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
4305 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
4306 // CHECK13-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4307 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
4308 // CHECK13-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
4309 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
4310 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 8
4311 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 8
4312 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 8
4313 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 8
4314 // CHECK13-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
4315 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
4316 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
4317 // CHECK13-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4318 // CHECK13-NEXT:    [[N_CASTED34:%.*]] = alloca i64, align 8
4319 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 8
4320 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 8
4321 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 8
4322 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 8
4323 // CHECK13-NEXT:    [[_TMP39:%.*]] = alloca i32, align 4
4324 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
4325 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
4326 // CHECK13-NEXT:    [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4327 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4
4328 // CHECK13-NEXT:    [[N_CASTED50:%.*]] = alloca i64, align 8
4329 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i64, align 8
4330 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 8
4331 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 8
4332 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 8
4333 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 8
4334 // CHECK13-NEXT:    [[_TMP56:%.*]] = alloca i32, align 4
4335 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4
4336 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
4337 // CHECK13-NEXT:    [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4338 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
4339 // CHECK13-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
4340 // CHECK13-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
4341 // CHECK13-NEXT:    store i32 100, ptr [[N]], align 4
4342 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
4343 // CHECK13-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
4344 // CHECK13-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
4345 // CHECK13-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
4346 // CHECK13-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
4347 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
4348 // CHECK13-NEXT:    store i32 10, ptr [[M]], align 4
4349 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
4350 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 4
4351 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
4352 // CHECK13-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
4353 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false)
4354 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4355 // CHECK13-NEXT:    store i64 [[TMP4]], ptr [[TMP6]], align 8
4356 // CHECK13-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4357 // CHECK13-NEXT:    store i64 [[TMP4]], ptr [[TMP7]], align 8
4358 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4359 // CHECK13-NEXT:    store ptr null, ptr [[TMP8]], align 8
4360 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4361 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP9]], align 8
4362 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4363 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP10]], align 8
4364 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
4365 // CHECK13-NEXT:    store ptr null, ptr [[TMP11]], align 8
4366 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4367 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 8
4368 // CHECK13-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4369 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 8
4370 // CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4371 // CHECK13-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 8
4372 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
4373 // CHECK13-NEXT:    store ptr null, ptr [[TMP15]], align 8
4374 // CHECK13-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4375 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4376 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4377 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 4
4378 // CHECK13-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
4379 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4380 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
4381 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4382 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4383 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
4384 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4385 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
4386 // CHECK13-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i64
4387 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4388 // CHECK13-NEXT:    store i32 2, ptr [[TMP23]], align 4
4389 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4390 // CHECK13-NEXT:    store i32 3, ptr [[TMP24]], align 4
4391 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4392 // CHECK13-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 8
4393 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4394 // CHECK13-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 8
4395 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4396 // CHECK13-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 8
4397 // CHECK13-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4398 // CHECK13-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 8
4399 // CHECK13-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4400 // CHECK13-NEXT:    store ptr null, ptr [[TMP29]], align 8
4401 // CHECK13-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4402 // CHECK13-NEXT:    store ptr null, ptr [[TMP30]], align 8
4403 // CHECK13-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4404 // CHECK13-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 8
4405 // CHECK13-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4406 // CHECK13-NEXT:    store i64 0, ptr [[TMP32]], align 8
4407 // CHECK13-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4408 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
4409 // CHECK13-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4410 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
4411 // CHECK13-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4412 // CHECK13-NEXT:    store i32 0, ptr [[TMP35]], align 4
4413 // CHECK13-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]])
4414 // CHECK13-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
4415 // CHECK13-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4416 // CHECK13:       omp_offload.failed:
4417 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]
4418 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4419 // CHECK13:       omp_offload.cont:
4420 // CHECK13-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 4
4421 // CHECK13-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
4422 // CHECK13-NEXT:    [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8
4423 // CHECK13-NEXT:    [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4
4424 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false)
4425 // CHECK13-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4426 // CHECK13-NEXT:    store i64 [[TMP39]], ptr [[TMP41]], align 8
4427 // CHECK13-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4428 // CHECK13-NEXT:    store i64 [[TMP39]], ptr [[TMP42]], align 8
4429 // CHECK13-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
4430 // CHECK13-NEXT:    store ptr null, ptr [[TMP43]], align 8
4431 // CHECK13-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
4432 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP44]], align 8
4433 // CHECK13-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
4434 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP45]], align 8
4435 // CHECK13-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
4436 // CHECK13-NEXT:    store ptr null, ptr [[TMP46]], align 8
4437 // CHECK13-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
4438 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP47]], align 8
4439 // CHECK13-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
4440 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 8
4441 // CHECK13-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
4442 // CHECK13-NEXT:    store i64 [[TMP40]], ptr [[TMP49]], align 8
4443 // CHECK13-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2
4444 // CHECK13-NEXT:    store ptr null, ptr [[TMP50]], align 8
4445 // CHECK13-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4446 // CHECK13-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4447 // CHECK13-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
4448 // CHECK13-NEXT:    [[TMP54:%.*]] = load i32, ptr [[N]], align 4
4449 // CHECK13-NEXT:    store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4
4450 // CHECK13-NEXT:    [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
4451 // CHECK13-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0
4452 // CHECK13-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
4453 // CHECK13-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
4454 // CHECK13-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
4455 // CHECK13-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
4456 // CHECK13-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1
4457 // CHECK13-NEXT:    [[TMP57:%.*]] = zext i32 [[ADD14]] to i64
4458 // CHECK13-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
4459 // CHECK13-NEXT:    store i32 2, ptr [[TMP58]], align 4
4460 // CHECK13-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
4461 // CHECK13-NEXT:    store i32 3, ptr [[TMP59]], align 4
4462 // CHECK13-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
4463 // CHECK13-NEXT:    store ptr [[TMP51]], ptr [[TMP60]], align 8
4464 // CHECK13-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
4465 // CHECK13-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 8
4466 // CHECK13-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
4467 // CHECK13-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 8
4468 // CHECK13-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
4469 // CHECK13-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8
4470 // CHECK13-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
4471 // CHECK13-NEXT:    store ptr null, ptr [[TMP64]], align 8
4472 // CHECK13-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
4473 // CHECK13-NEXT:    store ptr null, ptr [[TMP65]], align 8
4474 // CHECK13-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
4475 // CHECK13-NEXT:    store i64 [[TMP57]], ptr [[TMP66]], align 8
4476 // CHECK13-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
4477 // CHECK13-NEXT:    store i64 0, ptr [[TMP67]], align 8
4478 // CHECK13-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
4479 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4
4480 // CHECK13-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
4481 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
4482 // CHECK13-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
4483 // CHECK13-NEXT:    store i32 0, ptr [[TMP70]], align 4
4484 // CHECK13-NEXT:    [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]])
4485 // CHECK13-NEXT:    [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0
4486 // CHECK13-NEXT:    br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
4487 // CHECK13:       omp_offload.failed16:
4488 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]
4489 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
4490 // CHECK13:       omp_offload.cont17:
4491 // CHECK13-NEXT:    [[TMP73:%.*]] = load i32, ptr [[M]], align 4
4492 // CHECK13-NEXT:    store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_18]], align 4
4493 // CHECK13-NEXT:    [[TMP74:%.*]] = load i32, ptr [[N]], align 4
4494 // CHECK13-NEXT:    store i32 [[TMP74]], ptr [[N_CASTED19]], align 4
4495 // CHECK13-NEXT:    [[TMP75:%.*]] = load i64, ptr [[N_CASTED19]], align 8
4496 // CHECK13-NEXT:    [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4
4497 // CHECK13-NEXT:    store i32 [[TMP76]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
4498 // CHECK13-NEXT:    [[TMP77:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
4499 // CHECK13-NEXT:    [[TMP78:%.*]] = mul nuw i64 [[TMP1]], 4
4500 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES23]], ptr align 8 @.offload_sizes.3, i64 32, i1 false)
4501 // CHECK13-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
4502 // CHECK13-NEXT:    store i64 [[TMP75]], ptr [[TMP79]], align 8
4503 // CHECK13-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
4504 // CHECK13-NEXT:    store i64 [[TMP75]], ptr [[TMP80]], align 8
4505 // CHECK13-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0
4506 // CHECK13-NEXT:    store ptr null, ptr [[TMP81]], align 8
4507 // CHECK13-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
4508 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP82]], align 8
4509 // CHECK13-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
4510 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP83]], align 8
4511 // CHECK13-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1
4512 // CHECK13-NEXT:    store ptr null, ptr [[TMP84]], align 8
4513 // CHECK13-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
4514 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP85]], align 8
4515 // CHECK13-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
4516 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP86]], align 8
4517 // CHECK13-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
4518 // CHECK13-NEXT:    store i64 [[TMP78]], ptr [[TMP87]], align 8
4519 // CHECK13-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2
4520 // CHECK13-NEXT:    store ptr null, ptr [[TMP88]], align 8
4521 // CHECK13-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
4522 // CHECK13-NEXT:    store i64 [[TMP77]], ptr [[TMP89]], align 8
4523 // CHECK13-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
4524 // CHECK13-NEXT:    store i64 [[TMP77]], ptr [[TMP90]], align 8
4525 // CHECK13-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3
4526 // CHECK13-NEXT:    store ptr null, ptr [[TMP91]], align 8
4527 // CHECK13-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
4528 // CHECK13-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
4529 // CHECK13-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
4530 // CHECK13-NEXT:    [[TMP95:%.*]] = load i32, ptr [[N]], align 4
4531 // CHECK13-NEXT:    store i32 [[TMP95]], ptr [[DOTCAPTURE_EXPR_25]], align 4
4532 // CHECK13-NEXT:    [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
4533 // CHECK13-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP96]], 0
4534 // CHECK13-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
4535 // CHECK13-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
4536 // CHECK13-NEXT:    store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4
4537 // CHECK13-NEXT:    [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4
4538 // CHECK13-NEXT:    [[ADD30:%.*]] = add nsw i32 [[TMP97]], 1
4539 // CHECK13-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD30]] to i64
4540 // CHECK13-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
4541 // CHECK13-NEXT:    store i32 2, ptr [[TMP99]], align 4
4542 // CHECK13-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
4543 // CHECK13-NEXT:    store i32 4, ptr [[TMP100]], align 4
4544 // CHECK13-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
4545 // CHECK13-NEXT:    store ptr [[TMP92]], ptr [[TMP101]], align 8
4546 // CHECK13-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
4547 // CHECK13-NEXT:    store ptr [[TMP93]], ptr [[TMP102]], align 8
4548 // CHECK13-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
4549 // CHECK13-NEXT:    store ptr [[TMP94]], ptr [[TMP103]], align 8
4550 // CHECK13-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
4551 // CHECK13-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP104]], align 8
4552 // CHECK13-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
4553 // CHECK13-NEXT:    store ptr null, ptr [[TMP105]], align 8
4554 // CHECK13-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
4555 // CHECK13-NEXT:    store ptr null, ptr [[TMP106]], align 8
4556 // CHECK13-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
4557 // CHECK13-NEXT:    store i64 [[TMP98]], ptr [[TMP107]], align 8
4558 // CHECK13-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
4559 // CHECK13-NEXT:    store i64 0, ptr [[TMP108]], align 8
4560 // CHECK13-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
4561 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4
4562 // CHECK13-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
4563 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP110]], align 4
4564 // CHECK13-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
4565 // CHECK13-NEXT:    store i32 0, ptr [[TMP111]], align 4
4566 // CHECK13-NEXT:    [[TMP112:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]])
4567 // CHECK13-NEXT:    [[TMP113:%.*]] = icmp ne i32 [[TMP112]], 0
4568 // CHECK13-NEXT:    br i1 [[TMP113]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
4569 // CHECK13:       omp_offload.failed32:
4570 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP75]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP77]]) #[[ATTR3]]
4571 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
4572 // CHECK13:       omp_offload.cont33:
4573 // CHECK13-NEXT:    [[TMP114:%.*]] = load i32, ptr [[N]], align 4
4574 // CHECK13-NEXT:    store i32 [[TMP114]], ptr [[N_CASTED34]], align 4
4575 // CHECK13-NEXT:    [[TMP115:%.*]] = load i64, ptr [[N_CASTED34]], align 8
4576 // CHECK13-NEXT:    [[TMP116:%.*]] = mul nuw i64 [[TMP1]], 4
4577 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES38]], ptr align 8 @.offload_sizes.5, i64 24, i1 false)
4578 // CHECK13-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
4579 // CHECK13-NEXT:    store i64 [[TMP115]], ptr [[TMP117]], align 8
4580 // CHECK13-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
4581 // CHECK13-NEXT:    store i64 [[TMP115]], ptr [[TMP118]], align 8
4582 // CHECK13-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 0
4583 // CHECK13-NEXT:    store ptr null, ptr [[TMP119]], align 8
4584 // CHECK13-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1
4585 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP120]], align 8
4586 // CHECK13-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1
4587 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP121]], align 8
4588 // CHECK13-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 1
4589 // CHECK13-NEXT:    store ptr null, ptr [[TMP122]], align 8
4590 // CHECK13-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2
4591 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP123]], align 8
4592 // CHECK13-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2
4593 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP124]], align 8
4594 // CHECK13-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2
4595 // CHECK13-NEXT:    store i64 [[TMP116]], ptr [[TMP125]], align 8
4596 // CHECK13-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 2
4597 // CHECK13-NEXT:    store ptr null, ptr [[TMP126]], align 8
4598 // CHECK13-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
4599 // CHECK13-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
4600 // CHECK13-NEXT:    [[TMP129:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0
4601 // CHECK13-NEXT:    [[TMP130:%.*]] = load i32, ptr [[N]], align 4
4602 // CHECK13-NEXT:    store i32 [[TMP130]], ptr [[DOTCAPTURE_EXPR_40]], align 4
4603 // CHECK13-NEXT:    [[TMP131:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
4604 // CHECK13-NEXT:    [[SUB42:%.*]] = sub nsw i32 [[TMP131]], 0
4605 // CHECK13-NEXT:    [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
4606 // CHECK13-NEXT:    [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
4607 // CHECK13-NEXT:    store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4
4608 // CHECK13-NEXT:    [[TMP132:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4
4609 // CHECK13-NEXT:    [[ADD45:%.*]] = add nsw i32 [[TMP132]], 1
4610 // CHECK13-NEXT:    [[TMP133:%.*]] = zext i32 [[ADD45]] to i64
4611 // CHECK13-NEXT:    [[TMP134:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0
4612 // CHECK13-NEXT:    store i32 2, ptr [[TMP134]], align 4
4613 // CHECK13-NEXT:    [[TMP135:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1
4614 // CHECK13-NEXT:    store i32 3, ptr [[TMP135]], align 4
4615 // CHECK13-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2
4616 // CHECK13-NEXT:    store ptr [[TMP127]], ptr [[TMP136]], align 8
4617 // CHECK13-NEXT:    [[TMP137:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3
4618 // CHECK13-NEXT:    store ptr [[TMP128]], ptr [[TMP137]], align 8
4619 // CHECK13-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4
4620 // CHECK13-NEXT:    store ptr [[TMP129]], ptr [[TMP138]], align 8
4621 // CHECK13-NEXT:    [[TMP139:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5
4622 // CHECK13-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP139]], align 8
4623 // CHECK13-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6
4624 // CHECK13-NEXT:    store ptr null, ptr [[TMP140]], align 8
4625 // CHECK13-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7
4626 // CHECK13-NEXT:    store ptr null, ptr [[TMP141]], align 8
4627 // CHECK13-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8
4628 // CHECK13-NEXT:    store i64 [[TMP133]], ptr [[TMP142]], align 8
4629 // CHECK13-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9
4630 // CHECK13-NEXT:    store i64 0, ptr [[TMP143]], align 8
4631 // CHECK13-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10
4632 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP144]], align 4
4633 // CHECK13-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11
4634 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP145]], align 4
4635 // CHECK13-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12
4636 // CHECK13-NEXT:    store i32 0, ptr [[TMP146]], align 4
4637 // CHECK13-NEXT:    [[TMP147:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]])
4638 // CHECK13-NEXT:    [[TMP148:%.*]] = icmp ne i32 [[TMP147]], 0
4639 // CHECK13-NEXT:    br i1 [[TMP148]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
4640 // CHECK13:       omp_offload.failed47:
4641 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP115]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]
4642 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
4643 // CHECK13:       omp_offload.cont48:
4644 // CHECK13-NEXT:    [[TMP149:%.*]] = load i32, ptr [[M]], align 4
4645 // CHECK13-NEXT:    store i32 [[TMP149]], ptr [[DOTCAPTURE_EXPR_49]], align 4
4646 // CHECK13-NEXT:    [[TMP150:%.*]] = load i32, ptr [[N]], align 4
4647 // CHECK13-NEXT:    store i32 [[TMP150]], ptr [[N_CASTED50]], align 4
4648 // CHECK13-NEXT:    [[TMP151:%.*]] = load i64, ptr [[N_CASTED50]], align 8
4649 // CHECK13-NEXT:    [[TMP152:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4
4650 // CHECK13-NEXT:    store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4
4651 // CHECK13-NEXT:    [[TMP153:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 8
4652 // CHECK13-NEXT:    [[TMP154:%.*]] = mul nuw i64 [[TMP1]], 4
4653 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES55]], ptr align 8 @.offload_sizes.7, i64 32, i1 false)
4654 // CHECK13-NEXT:    [[TMP155:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
4655 // CHECK13-NEXT:    store i64 [[TMP151]], ptr [[TMP155]], align 8
4656 // CHECK13-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
4657 // CHECK13-NEXT:    store i64 [[TMP151]], ptr [[TMP156]], align 8
4658 // CHECK13-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 0
4659 // CHECK13-NEXT:    store ptr null, ptr [[TMP157]], align 8
4660 // CHECK13-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1
4661 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP158]], align 8
4662 // CHECK13-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1
4663 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP159]], align 8
4664 // CHECK13-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 1
4665 // CHECK13-NEXT:    store ptr null, ptr [[TMP160]], align 8
4666 // CHECK13-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2
4667 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP161]], align 8
4668 // CHECK13-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2
4669 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP162]], align 8
4670 // CHECK13-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2
4671 // CHECK13-NEXT:    store i64 [[TMP154]], ptr [[TMP163]], align 8
4672 // CHECK13-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 2
4673 // CHECK13-NEXT:    store ptr null, ptr [[TMP164]], align 8
4674 // CHECK13-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3
4675 // CHECK13-NEXT:    store i64 [[TMP153]], ptr [[TMP165]], align 8
4676 // CHECK13-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3
4677 // CHECK13-NEXT:    store i64 [[TMP153]], ptr [[TMP166]], align 8
4678 // CHECK13-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 3
4679 // CHECK13-NEXT:    store ptr null, ptr [[TMP167]], align 8
4680 // CHECK13-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
4681 // CHECK13-NEXT:    [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
4682 // CHECK13-NEXT:    [[TMP170:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0
4683 // CHECK13-NEXT:    [[TMP171:%.*]] = load i32, ptr [[N]], align 4
4684 // CHECK13-NEXT:    store i32 [[TMP171]], ptr [[DOTCAPTURE_EXPR_57]], align 4
4685 // CHECK13-NEXT:    [[TMP172:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4
4686 // CHECK13-NEXT:    [[SUB59:%.*]] = sub nsw i32 [[TMP172]], 0
4687 // CHECK13-NEXT:    [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1
4688 // CHECK13-NEXT:    [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1
4689 // CHECK13-NEXT:    store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4
4690 // CHECK13-NEXT:    [[TMP173:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4
4691 // CHECK13-NEXT:    [[ADD62:%.*]] = add nsw i32 [[TMP173]], 1
4692 // CHECK13-NEXT:    [[TMP174:%.*]] = zext i32 [[ADD62]] to i64
4693 // CHECK13-NEXT:    [[TMP175:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0
4694 // CHECK13-NEXT:    store i32 2, ptr [[TMP175]], align 4
4695 // CHECK13-NEXT:    [[TMP176:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1
4696 // CHECK13-NEXT:    store i32 4, ptr [[TMP176]], align 4
4697 // CHECK13-NEXT:    [[TMP177:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2
4698 // CHECK13-NEXT:    store ptr [[TMP168]], ptr [[TMP177]], align 8
4699 // CHECK13-NEXT:    [[TMP178:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3
4700 // CHECK13-NEXT:    store ptr [[TMP169]], ptr [[TMP178]], align 8
4701 // CHECK13-NEXT:    [[TMP179:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4
4702 // CHECK13-NEXT:    store ptr [[TMP170]], ptr [[TMP179]], align 8
4703 // CHECK13-NEXT:    [[TMP180:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5
4704 // CHECK13-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP180]], align 8
4705 // CHECK13-NEXT:    [[TMP181:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6
4706 // CHECK13-NEXT:    store ptr null, ptr [[TMP181]], align 8
4707 // CHECK13-NEXT:    [[TMP182:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7
4708 // CHECK13-NEXT:    store ptr null, ptr [[TMP182]], align 8
4709 // CHECK13-NEXT:    [[TMP183:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8
4710 // CHECK13-NEXT:    store i64 [[TMP174]], ptr [[TMP183]], align 8
4711 // CHECK13-NEXT:    [[TMP184:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9
4712 // CHECK13-NEXT:    store i64 0, ptr [[TMP184]], align 8
4713 // CHECK13-NEXT:    [[TMP185:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10
4714 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP185]], align 4
4715 // CHECK13-NEXT:    [[TMP186:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11
4716 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP186]], align 4
4717 // CHECK13-NEXT:    [[TMP187:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12
4718 // CHECK13-NEXT:    store i32 0, ptr [[TMP187]], align 4
4719 // CHECK13-NEXT:    [[TMP188:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]])
4720 // CHECK13-NEXT:    [[TMP189:%.*]] = icmp ne i32 [[TMP188]], 0
4721 // CHECK13-NEXT:    br i1 [[TMP189]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
4722 // CHECK13:       omp_offload.failed64:
4723 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP151]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP153]]) #[[ATTR3]]
4724 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
4725 // CHECK13:       omp_offload.cont65:
4726 // CHECK13-NEXT:    [[TMP190:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
4727 // CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP190]])
4728 // CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
4729 // CHECK13-NEXT:    [[TMP191:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
4730 // CHECK13-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP191]])
4731 // CHECK13-NEXT:    [[TMP192:%.*]] = load i32, ptr [[RETVAL]], align 4
4732 // CHECK13-NEXT:    ret i32 [[TMP192]]
4733 //
4734 //
4735 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
4736 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
4737 // CHECK13-NEXT:  entry:
4738 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
4739 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
4740 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4741 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
4742 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
4743 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
4744 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4745 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
4746 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4747 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
4748 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
4749 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
4750 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]])
4751 // CHECK13-NEXT:    ret void
4752 //
4753 //
4754 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined
4755 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4756 // CHECK13-NEXT:  entry:
4757 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4758 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4759 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
4760 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
4761 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4762 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4763 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4764 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4765 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4766 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4767 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4768 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4769 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4770 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4771 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
4772 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
4773 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4774 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4775 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
4776 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
4777 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4778 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
4779 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4780 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
4781 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
4782 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4783 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4784 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4785 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4786 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
4787 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
4788 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4789 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4790 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4791 // CHECK13:       omp.precond.then:
4792 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4793 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4794 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
4795 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4796 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4797 // CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4798 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
4799 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4800 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4801 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4802 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
4803 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4804 // CHECK13:       cond.true:
4805 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4806 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4807 // CHECK13:       cond.false:
4808 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4809 // CHECK13-NEXT:    br label [[COND_END]]
4810 // CHECK13:       cond.end:
4811 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
4812 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4813 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4814 // CHECK13-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
4815 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4816 // CHECK13:       omp.inner.for.cond:
4817 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4818 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4819 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
4820 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4821 // CHECK13:       omp.inner.for.body:
4822 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4823 // CHECK13-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
4824 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4825 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
4826 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4
4827 // CHECK13-NEXT:    store i32 [[TMP19]], ptr [[N_CASTED]], align 4
4828 // CHECK13-NEXT:    [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8
4829 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]])
4830 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4831 // CHECK13:       omp.inner.for.inc:
4832 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4833 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4834 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
4835 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4836 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4837 // CHECK13:       omp.inner.for.end:
4838 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4839 // CHECK13:       omp.loop.exit:
4840 // CHECK13-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4841 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
4842 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
4843 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
4844 // CHECK13:       omp.precond.end:
4845 // CHECK13-NEXT:    ret void
4846 //
4847 //
4848 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined
4849 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4850 // CHECK13-NEXT:  entry:
4851 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4852 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4853 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4854 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4855 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
4856 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
4857 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4858 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4859 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4860 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4861 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4862 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4863 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4864 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4865 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4866 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4867 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
4868 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4869 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4870 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4871 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4872 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
4873 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
4874 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4875 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
4876 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4877 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
4878 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
4879 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4880 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
4881 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4882 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4883 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
4884 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
4885 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4886 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
4887 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4888 // CHECK13:       omp.precond.then:
4889 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4890 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4891 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
4892 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4893 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
4894 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4895 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
4896 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4897 // CHECK13-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
4898 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4899 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4900 // CHECK13-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4901 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
4902 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4903 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4904 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4905 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
4906 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4907 // CHECK13:       cond.true:
4908 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4909 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4910 // CHECK13:       cond.false:
4911 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4912 // CHECK13-NEXT:    br label [[COND_END]]
4913 // CHECK13:       cond.end:
4914 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
4915 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4916 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4917 // CHECK13-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
4918 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4919 // CHECK13:       omp.inner.for.cond:
4920 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4921 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4922 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
4923 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4924 // CHECK13:       omp.inner.for.body:
4925 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4926 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
4927 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4928 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
4929 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I4]], align 4
4930 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
4931 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
4932 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
4933 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4934 // CHECK13:       omp.body.continue:
4935 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4936 // CHECK13:       omp.inner.for.inc:
4937 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4938 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
4939 // CHECK13-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
4940 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4941 // CHECK13:       omp.inner.for.end:
4942 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4943 // CHECK13:       omp.loop.exit:
4944 // CHECK13-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4945 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
4946 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
4947 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
4948 // CHECK13:       omp.precond.end:
4949 // CHECK13-NEXT:    ret void
4950 //
4951 //
4952 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
4953 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4954 // CHECK13-NEXT:  entry:
4955 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
4956 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
4957 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4958 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
4959 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
4960 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
4961 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4962 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
4963 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4964 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
4965 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
4966 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
4967 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]])
4968 // CHECK13-NEXT:    ret void
4969 //
4970 //
4971 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined
4972 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4973 // CHECK13-NEXT:  entry:
4974 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4975 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4976 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
4977 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
4978 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4979 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4980 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4981 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4982 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4983 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4984 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4985 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4986 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4987 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4988 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
4989 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
4990 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4991 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4992 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
4993 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
4994 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4995 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
4996 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4997 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
4998 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
4999 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5000 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5001 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5002 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5003 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5004 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5005 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5006 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5007 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5008 // CHECK13:       omp.precond.then:
5009 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5010 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5011 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
5012 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5013 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5014 // CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5015 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
5016 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5017 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5018 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5019 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
5020 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5021 // CHECK13:       cond.true:
5022 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5023 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5024 // CHECK13:       cond.false:
5025 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5026 // CHECK13-NEXT:    br label [[COND_END]]
5027 // CHECK13:       cond.end:
5028 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
5029 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5030 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5031 // CHECK13-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
5032 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5033 // CHECK13:       omp.inner.for.cond:
5034 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5035 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5036 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
5037 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5038 // CHECK13:       omp.inner.for.body:
5039 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5040 // CHECK13-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
5041 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5042 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
5043 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4
5044 // CHECK13-NEXT:    store i32 [[TMP19]], ptr [[N_CASTED]], align 4
5045 // CHECK13-NEXT:    [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8
5046 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]])
5047 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5048 // CHECK13:       omp.inner.for.inc:
5049 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5050 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5051 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
5052 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5053 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5054 // CHECK13:       omp.inner.for.end:
5055 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5056 // CHECK13:       omp.loop.exit:
5057 // CHECK13-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5058 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
5059 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
5060 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5061 // CHECK13:       omp.precond.end:
5062 // CHECK13-NEXT:    ret void
5063 //
5064 //
5065 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined
5066 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5067 // CHECK13-NEXT:  entry:
5068 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5069 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5070 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5071 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5072 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5073 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5074 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5075 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5076 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5077 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5078 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5079 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5080 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5081 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5082 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5083 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5084 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
5085 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5086 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5087 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5088 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5089 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5090 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5091 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5092 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5093 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5094 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
5095 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
5096 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5097 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5098 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5099 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5100 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5101 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5102 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5103 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5104 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5105 // CHECK13:       omp.precond.then:
5106 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5107 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5108 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
5109 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5110 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
5111 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5112 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
5113 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5114 // CHECK13-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
5115 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5116 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5117 // CHECK13-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5118 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
5119 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5120 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5121 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5122 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
5123 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5124 // CHECK13:       cond.true:
5125 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5126 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5127 // CHECK13:       cond.false:
5128 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5129 // CHECK13-NEXT:    br label [[COND_END]]
5130 // CHECK13:       cond.end:
5131 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
5132 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5133 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5134 // CHECK13-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
5135 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5136 // CHECK13:       omp.inner.for.cond:
5137 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5138 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5139 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
5140 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5141 // CHECK13:       omp.inner.for.body:
5142 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5143 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
5144 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5145 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
5146 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I4]], align 4
5147 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
5148 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
5149 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
5150 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5151 // CHECK13:       omp.body.continue:
5152 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5153 // CHECK13:       omp.inner.for.inc:
5154 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5155 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
5156 // CHECK13-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
5157 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5158 // CHECK13:       omp.inner.for.end:
5159 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5160 // CHECK13:       omp.loop.exit:
5161 // CHECK13-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5162 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
5163 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
5164 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5165 // CHECK13:       omp.precond.end:
5166 // CHECK13-NEXT:    ret void
5167 //
5168 //
5169 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
5170 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5171 // CHECK13-NEXT:  entry:
5172 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5173 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5174 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5175 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5176 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
5177 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5178 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5179 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5180 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5181 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5182 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5183 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5184 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
5185 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
5186 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
5187 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
5188 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
5189 // CHECK13-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5190 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]])
5191 // CHECK13-NEXT:    ret void
5192 //
5193 //
5194 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined
5195 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5196 // CHECK13-NEXT:  entry:
5197 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5198 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5199 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5200 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5201 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5202 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5203 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5204 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5205 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5206 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5207 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5208 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5209 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5210 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5211 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5212 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
5213 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
5214 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5215 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5216 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5217 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5218 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5219 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5220 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5221 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5222 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5223 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
5224 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5225 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5226 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5227 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5228 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5229 // CHECK13-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
5230 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5231 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5232 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5233 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5234 // CHECK13:       omp.precond.then:
5235 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5236 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5237 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
5238 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5239 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5240 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
5241 // CHECK13-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5242 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
5243 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
5244 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5245 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5246 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5247 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5248 // CHECK13:       cond.true:
5249 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5250 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5251 // CHECK13:       cond.false:
5252 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5253 // CHECK13-NEXT:    br label [[COND_END]]
5254 // CHECK13:       cond.end:
5255 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5256 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5257 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5258 // CHECK13-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
5259 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5260 // CHECK13:       omp.inner.for.cond:
5261 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5262 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5263 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
5264 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
5265 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5266 // CHECK13:       omp.inner.for.body:
5267 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5268 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
5269 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5270 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
5271 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[N_ADDR]], align 4
5272 // CHECK13-NEXT:    store i32 [[TMP20]], ptr [[N_CASTED]], align 4
5273 // CHECK13-NEXT:    [[TMP21:%.*]] = load i64, ptr [[N_CASTED]], align 8
5274 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
5275 // CHECK13-NEXT:    store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
5276 // CHECK13-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5277 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP23]])
5278 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5279 // CHECK13:       omp.inner.for.inc:
5280 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5281 // CHECK13-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5282 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
5283 // CHECK13-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
5284 // CHECK13-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5285 // CHECK13-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5286 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
5287 // CHECK13-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4
5288 // CHECK13-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5289 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5290 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
5291 // CHECK13-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4
5292 // CHECK13-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5293 // CHECK13-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5294 // CHECK13-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]]
5295 // CHECK13-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
5296 // CHECK13:       cond.true11:
5297 // CHECK13-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5298 // CHECK13-NEXT:    br label [[COND_END13:%.*]]
5299 // CHECK13:       cond.false12:
5300 // CHECK13-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5301 // CHECK13-NEXT:    br label [[COND_END13]]
5302 // CHECK13:       cond.end13:
5303 // CHECK13-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE11]] ], [ [[TMP33]], [[COND_FALSE12]] ]
5304 // CHECK13-NEXT:    store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4
5305 // CHECK13-NEXT:    [[TMP34:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5306 // CHECK13-NEXT:    store i32 [[TMP34]], ptr [[DOTOMP_IV]], align 4
5307 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5308 // CHECK13:       omp.inner.for.end:
5309 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5310 // CHECK13:       omp.loop.exit:
5311 // CHECK13-NEXT:    [[TMP35:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5312 // CHECK13-NEXT:    [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4
5313 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP36]])
5314 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5315 // CHECK13:       omp.precond.end:
5316 // CHECK13-NEXT:    ret void
5317 //
5318 //
5319 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined
5320 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5321 // CHECK13-NEXT:  entry:
5322 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5323 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5324 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5325 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5326 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5327 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5328 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5329 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5330 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5331 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5332 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5333 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5334 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5335 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5336 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5337 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5338 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5339 // CHECK13-NEXT:    [[I5:%.*]] = alloca i32, align 4
5340 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5341 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5342 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5343 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5344 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5345 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5346 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5347 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5348 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5349 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5350 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
5351 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5352 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5353 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5354 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5355 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5356 // CHECK13-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
5357 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5358 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5359 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5360 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5361 // CHECK13:       omp.precond.then:
5362 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5363 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5364 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
5365 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5366 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
5367 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5368 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
5369 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5370 // CHECK13-NEXT:    store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4
5371 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5372 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5373 // CHECK13-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5374 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
5375 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5376 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5377 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5378 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
5379 // CHECK13-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5380 // CHECK13:       cond.true:
5381 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5382 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5383 // CHECK13:       cond.false:
5384 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5385 // CHECK13-NEXT:    br label [[COND_END]]
5386 // CHECK13:       cond.end:
5387 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
5388 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5389 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5390 // CHECK13-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
5391 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5392 // CHECK13:       omp.inner.for.cond:
5393 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5394 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5395 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
5396 // CHECK13-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5397 // CHECK13:       omp.inner.for.body:
5398 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5399 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
5400 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5401 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I5]], align 4
5402 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I5]], align 4
5403 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
5404 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
5405 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
5406 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5407 // CHECK13:       omp.body.continue:
5408 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5409 // CHECK13:       omp.inner.for.inc:
5410 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5411 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
5412 // CHECK13-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
5413 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5414 // CHECK13:       omp.inner.for.end:
5415 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5416 // CHECK13:       omp.loop.exit:
5417 // CHECK13-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5418 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
5419 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
5420 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5421 // CHECK13:       omp.precond.end:
5422 // CHECK13-NEXT:    ret void
5423 //
5424 //
5425 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
5426 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5427 // CHECK13-NEXT:  entry:
5428 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5429 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5430 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5431 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
5432 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5433 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5434 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5435 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5436 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5437 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
5438 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
5439 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
5440 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]])
5441 // CHECK13-NEXT:    ret void
5442 //
5443 //
5444 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined
5445 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5446 // CHECK13-NEXT:  entry:
5447 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5448 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5449 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5450 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5451 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5452 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5453 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5454 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5455 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5456 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5457 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5458 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5459 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5460 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5461 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
5462 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
5463 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5464 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5465 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5466 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5467 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5468 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5469 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5470 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
5471 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
5472 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5473 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5474 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5475 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5476 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5477 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5478 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5479 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5480 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5481 // CHECK13:       omp.precond.then:
5482 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5483 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5484 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
5485 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5486 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5487 // CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5488 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
5489 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5490 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5491 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5492 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
5493 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5494 // CHECK13:       cond.true:
5495 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5496 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5497 // CHECK13:       cond.false:
5498 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5499 // CHECK13-NEXT:    br label [[COND_END]]
5500 // CHECK13:       cond.end:
5501 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
5502 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5503 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5504 // CHECK13-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
5505 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5506 // CHECK13:       omp.inner.for.cond:
5507 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5508 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5509 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
5510 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5511 // CHECK13:       omp.inner.for.body:
5512 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5513 // CHECK13-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
5514 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5515 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
5516 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4
5517 // CHECK13-NEXT:    store i32 [[TMP19]], ptr [[N_CASTED]], align 4
5518 // CHECK13-NEXT:    [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8
5519 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]])
5520 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5521 // CHECK13:       omp.inner.for.inc:
5522 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5523 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5524 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
5525 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5526 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5527 // CHECK13:       omp.inner.for.end:
5528 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5529 // CHECK13:       omp.loop.exit:
5530 // CHECK13-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5531 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
5532 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
5533 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5534 // CHECK13:       omp.precond.end:
5535 // CHECK13-NEXT:    ret void
5536 //
5537 //
5538 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined
5539 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5540 // CHECK13-NEXT:  entry:
5541 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5542 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5543 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5544 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5545 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5546 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5547 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5548 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5549 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5550 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5551 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5552 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5553 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5554 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5555 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5556 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5557 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
5558 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5559 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5560 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5561 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5562 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5563 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5564 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5565 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5566 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5567 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
5568 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
5569 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5570 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5571 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5572 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5573 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5574 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5575 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5576 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5577 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5578 // CHECK13:       omp.precond.then:
5579 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5580 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5581 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
5582 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5583 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
5584 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5585 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
5586 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5587 // CHECK13-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
5588 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5589 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5590 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5591 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5592 // CHECK13-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5593 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
5594 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
5595 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5596 // CHECK13:       omp.dispatch.cond:
5597 // CHECK13-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5598 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
5599 // CHECK13-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
5600 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
5601 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5602 // CHECK13:       omp.dispatch.body:
5603 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5604 // CHECK13-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
5605 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5606 // CHECK13:       omp.inner.for.cond:
5607 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
5608 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
5609 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
5610 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5611 // CHECK13:       omp.inner.for.body:
5612 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5613 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
5614 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5615 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]
5616 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]
5617 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
5618 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
5619 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]
5620 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5621 // CHECK13:       omp.body.continue:
5622 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5623 // CHECK13:       omp.inner.for.inc:
5624 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5625 // CHECK13-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
5626 // CHECK13-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5627 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
5628 // CHECK13:       omp.inner.for.end:
5629 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5630 // CHECK13:       omp.dispatch.inc:
5631 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
5632 // CHECK13:       omp.dispatch.end:
5633 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5634 // CHECK13:       omp.precond.end:
5635 // CHECK13-NEXT:    ret void
5636 //
5637 //
5638 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
5639 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5640 // CHECK13-NEXT:  entry:
5641 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5642 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5643 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5644 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5645 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
5646 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5647 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5648 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5649 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5650 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5651 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5652 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5653 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
5654 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
5655 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
5656 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
5657 // CHECK13-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
5658 // CHECK13-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5659 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]])
5660 // CHECK13-NEXT:    ret void
5661 //
5662 //
5663 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined
5664 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5665 // CHECK13-NEXT:  entry:
5666 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5667 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5668 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5669 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5670 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5671 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5672 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5673 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5674 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5675 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5676 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5677 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5678 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5679 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5680 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5681 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
5682 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
5683 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5684 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5685 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5686 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5687 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5688 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5689 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5690 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5691 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5692 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
5693 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5694 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5695 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5696 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5697 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5698 // CHECK13-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
5699 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5700 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5701 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5702 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5703 // CHECK13:       omp.precond.then:
5704 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5705 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5706 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
5707 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5708 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5709 // CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5710 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
5711 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5712 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5713 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5714 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
5715 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5716 // CHECK13:       cond.true:
5717 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5718 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5719 // CHECK13:       cond.false:
5720 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5721 // CHECK13-NEXT:    br label [[COND_END]]
5722 // CHECK13:       cond.end:
5723 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
5724 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5725 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5726 // CHECK13-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
5727 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5728 // CHECK13:       omp.inner.for.cond:
5729 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5730 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5731 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
5732 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5733 // CHECK13:       omp.inner.for.body:
5734 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5735 // CHECK13-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
5736 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5737 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
5738 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4
5739 // CHECK13-NEXT:    store i32 [[TMP19]], ptr [[N_CASTED]], align 4
5740 // CHECK13-NEXT:    [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8
5741 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
5742 // CHECK13-NEXT:    store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
5743 // CHECK13-NEXT:    [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5744 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP22]])
5745 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5746 // CHECK13:       omp.inner.for.inc:
5747 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5748 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5749 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
5750 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5751 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5752 // CHECK13:       omp.inner.for.end:
5753 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5754 // CHECK13:       omp.loop.exit:
5755 // CHECK13-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5756 // CHECK13-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
5757 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])
5758 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5759 // CHECK13:       omp.precond.end:
5760 // CHECK13-NEXT:    ret void
5761 //
5762 //
5763 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined
5764 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
5765 // CHECK13-NEXT:  entry:
5766 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5767 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5768 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5769 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5770 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5771 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5772 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5773 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5774 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5775 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5776 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5777 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5778 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5779 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5780 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5781 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5782 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5783 // CHECK13-NEXT:    [[I5:%.*]] = alloca i32, align 4
5784 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5785 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5786 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5787 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5788 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5789 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5790 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5791 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5792 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5793 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5794 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
5795 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5796 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5797 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
5798 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5799 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5800 // CHECK13-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
5801 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5802 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5803 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
5804 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5805 // CHECK13:       omp.precond.then:
5806 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5807 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5808 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
5809 // CHECK13-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5810 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
5811 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5812 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
5813 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5814 // CHECK13-NEXT:    store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4
5815 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5816 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5817 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
5818 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5819 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5820 // CHECK13-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5821 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
5822 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
5823 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5824 // CHECK13:       omp.dispatch.cond:
5825 // CHECK13-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5826 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
5827 // CHECK13-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
5828 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
5829 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5830 // CHECK13:       omp.dispatch.body:
5831 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5832 // CHECK13-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
5833 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5834 // CHECK13:       omp.inner.for.cond:
5835 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
5836 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
5837 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
5838 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5839 // CHECK13:       omp.inner.for.body:
5840 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
5841 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
5842 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5843 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]
5844 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]
5845 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
5846 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
5847 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]
5848 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5849 // CHECK13:       omp.body.continue:
5850 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5851 // CHECK13:       omp.inner.for.inc:
5852 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
5853 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
5854 // CHECK13-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
5855 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
5856 // CHECK13:       omp.inner.for.end:
5857 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5858 // CHECK13:       omp.dispatch.inc:
5859 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
5860 // CHECK13:       omp.dispatch.end:
5861 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5862 // CHECK13:       omp.precond.end:
5863 // CHECK13-NEXT:    ret void
5864 //
5865 //
5866 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
5867 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
5868 // CHECK13-NEXT:  entry:
5869 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
5870 // CHECK13-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
5871 // CHECK13-NEXT:    [[M:%.*]] = alloca i32, align 4
5872 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
5873 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
5874 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
5875 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5876 // CHECK13-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5877 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8
5878 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8
5879 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8
5880 // CHECK13-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
5881 // CHECK13-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5882 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5883 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5884 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 8
5885 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 8
5886 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 8
5887 // CHECK13-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
5888 // CHECK13-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5889 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 8
5890 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 8
5891 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 8
5892 // CHECK13-NEXT:    [[_TMP18:%.*]] = alloca i32, align 4
5893 // CHECK13-NEXT:    [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5894 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
5895 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i64, align 8
5896 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 8
5897 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 8
5898 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 8
5899 // CHECK13-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
5900 // CHECK13-NEXT:    [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5901 // CHECK13-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
5902 // CHECK13-NEXT:    store i32 10, ptr [[M]], align 4
5903 // CHECK13-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5904 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP0]], align 8
5905 // CHECK13-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5906 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
5907 // CHECK13-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5908 // CHECK13-NEXT:    store ptr null, ptr [[TMP2]], align 8
5909 // CHECK13-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5910 // CHECK13-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5911 // CHECK13-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5912 // CHECK13-NEXT:    store i32 2, ptr [[TMP5]], align 4
5913 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5914 // CHECK13-NEXT:    store i32 1, ptr [[TMP6]], align 4
5915 // CHECK13-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5916 // CHECK13-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
5917 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5918 // CHECK13-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
5919 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5920 // CHECK13-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP9]], align 8
5921 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5922 // CHECK13-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP10]], align 8
5923 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5924 // CHECK13-NEXT:    store ptr null, ptr [[TMP11]], align 8
5925 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5926 // CHECK13-NEXT:    store ptr null, ptr [[TMP12]], align 8
5927 // CHECK13-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5928 // CHECK13-NEXT:    store i64 10, ptr [[TMP13]], align 8
5929 // CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5930 // CHECK13-NEXT:    store i64 0, ptr [[TMP14]], align 8
5931 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5932 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
5933 // CHECK13-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5934 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
5935 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5936 // CHECK13-NEXT:    store i32 0, ptr [[TMP17]], align 4
5937 // CHECK13-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]])
5938 // CHECK13-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
5939 // CHECK13-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5940 // CHECK13:       omp_offload.failed:
5941 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]]
5942 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5943 // CHECK13:       omp_offload.cont:
5944 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5945 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP20]], align 8
5946 // CHECK13-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5947 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP21]], align 8
5948 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
5949 // CHECK13-NEXT:    store ptr null, ptr [[TMP22]], align 8
5950 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5951 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5952 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
5953 // CHECK13-NEXT:    store i32 2, ptr [[TMP25]], align 4
5954 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
5955 // CHECK13-NEXT:    store i32 1, ptr [[TMP26]], align 4
5956 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
5957 // CHECK13-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
5958 // CHECK13-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
5959 // CHECK13-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
5960 // CHECK13-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
5961 // CHECK13-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP29]], align 8
5962 // CHECK13-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
5963 // CHECK13-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP30]], align 8
5964 // CHECK13-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
5965 // CHECK13-NEXT:    store ptr null, ptr [[TMP31]], align 8
5966 // CHECK13-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
5967 // CHECK13-NEXT:    store ptr null, ptr [[TMP32]], align 8
5968 // CHECK13-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
5969 // CHECK13-NEXT:    store i64 10, ptr [[TMP33]], align 8
5970 // CHECK13-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
5971 // CHECK13-NEXT:    store i64 0, ptr [[TMP34]], align 8
5972 // CHECK13-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
5973 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
5974 // CHECK13-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
5975 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
5976 // CHECK13-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
5977 // CHECK13-NEXT:    store i32 0, ptr [[TMP37]], align 4
5978 // CHECK13-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]])
5979 // CHECK13-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
5980 // CHECK13-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
5981 // CHECK13:       omp_offload.failed6:
5982 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]]
5983 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
5984 // CHECK13:       omp_offload.cont7:
5985 // CHECK13-NEXT:    [[TMP40:%.*]] = load i32, ptr [[M]], align 4
5986 // CHECK13-NEXT:    store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4
5987 // CHECK13-NEXT:    [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5988 // CHECK13-NEXT:    store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
5989 // CHECK13-NEXT:    [[TMP42:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5990 // CHECK13-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
5991 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP43]], align 8
5992 // CHECK13-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
5993 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP44]], align 8
5994 // CHECK13-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
5995 // CHECK13-NEXT:    store ptr null, ptr [[TMP45]], align 8
5996 // CHECK13-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
5997 // CHECK13-NEXT:    store i64 [[TMP42]], ptr [[TMP46]], align 8
5998 // CHECK13-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
5999 // CHECK13-NEXT:    store i64 [[TMP42]], ptr [[TMP47]], align 8
6000 // CHECK13-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
6001 // CHECK13-NEXT:    store ptr null, ptr [[TMP48]], align 8
6002 // CHECK13-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
6003 // CHECK13-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
6004 // CHECK13-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
6005 // CHECK13-NEXT:    store i32 2, ptr [[TMP51]], align 4
6006 // CHECK13-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
6007 // CHECK13-NEXT:    store i32 2, ptr [[TMP52]], align 4
6008 // CHECK13-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
6009 // CHECK13-NEXT:    store ptr [[TMP49]], ptr [[TMP53]], align 8
6010 // CHECK13-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
6011 // CHECK13-NEXT:    store ptr [[TMP50]], ptr [[TMP54]], align 8
6012 // CHECK13-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
6013 // CHECK13-NEXT:    store ptr @.offload_sizes.13, ptr [[TMP55]], align 8
6014 // CHECK13-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
6015 // CHECK13-NEXT:    store ptr @.offload_maptypes.14, ptr [[TMP56]], align 8
6016 // CHECK13-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
6017 // CHECK13-NEXT:    store ptr null, ptr [[TMP57]], align 8
6018 // CHECK13-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
6019 // CHECK13-NEXT:    store ptr null, ptr [[TMP58]], align 8
6020 // CHECK13-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
6021 // CHECK13-NEXT:    store i64 10, ptr [[TMP59]], align 8
6022 // CHECK13-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
6023 // CHECK13-NEXT:    store i64 0, ptr [[TMP60]], align 8
6024 // CHECK13-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
6025 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4
6026 // CHECK13-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
6027 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4
6028 // CHECK13-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
6029 // CHECK13-NEXT:    store i32 0, ptr [[TMP63]], align 4
6030 // CHECK13-NEXT:    [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]])
6031 // CHECK13-NEXT:    [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0
6032 // CHECK13-NEXT:    br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
6033 // CHECK13:       omp_offload.failed13:
6034 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i64 [[TMP42]]) #[[ATTR3]]
6035 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT14]]
6036 // CHECK13:       omp_offload.cont14:
6037 // CHECK13-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
6038 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP66]], align 8
6039 // CHECK13-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
6040 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP67]], align 8
6041 // CHECK13-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0
6042 // CHECK13-NEXT:    store ptr null, ptr [[TMP68]], align 8
6043 // CHECK13-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
6044 // CHECK13-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
6045 // CHECK13-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0
6046 // CHECK13-NEXT:    store i32 2, ptr [[TMP71]], align 4
6047 // CHECK13-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1
6048 // CHECK13-NEXT:    store i32 1, ptr [[TMP72]], align 4
6049 // CHECK13-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2
6050 // CHECK13-NEXT:    store ptr [[TMP69]], ptr [[TMP73]], align 8
6051 // CHECK13-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3
6052 // CHECK13-NEXT:    store ptr [[TMP70]], ptr [[TMP74]], align 8
6053 // CHECK13-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4
6054 // CHECK13-NEXT:    store ptr @.offload_sizes.15, ptr [[TMP75]], align 8
6055 // CHECK13-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5
6056 // CHECK13-NEXT:    store ptr @.offload_maptypes.16, ptr [[TMP76]], align 8
6057 // CHECK13-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6
6058 // CHECK13-NEXT:    store ptr null, ptr [[TMP77]], align 8
6059 // CHECK13-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7
6060 // CHECK13-NEXT:    store ptr null, ptr [[TMP78]], align 8
6061 // CHECK13-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8
6062 // CHECK13-NEXT:    store i64 10, ptr [[TMP79]], align 8
6063 // CHECK13-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9
6064 // CHECK13-NEXT:    store i64 0, ptr [[TMP80]], align 8
6065 // CHECK13-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10
6066 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4
6067 // CHECK13-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11
6068 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4
6069 // CHECK13-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12
6070 // CHECK13-NEXT:    store i32 0, ptr [[TMP83]], align 4
6071 // CHECK13-NEXT:    [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]])
6072 // CHECK13-NEXT:    [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0
6073 // CHECK13-NEXT:    br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
6074 // CHECK13:       omp_offload.failed20:
6075 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]]
6076 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT21]]
6077 // CHECK13:       omp_offload.cont21:
6078 // CHECK13-NEXT:    [[TMP86:%.*]] = load i32, ptr [[M]], align 4
6079 // CHECK13-NEXT:    store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4
6080 // CHECK13-NEXT:    [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4
6081 // CHECK13-NEXT:    store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4
6082 // CHECK13-NEXT:    [[TMP88:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 8
6083 // CHECK13-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
6084 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP89]], align 8
6085 // CHECK13-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
6086 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP90]], align 8
6087 // CHECK13-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
6088 // CHECK13-NEXT:    store ptr null, ptr [[TMP91]], align 8
6089 // CHECK13-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
6090 // CHECK13-NEXT:    store i64 [[TMP88]], ptr [[TMP92]], align 8
6091 // CHECK13-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
6092 // CHECK13-NEXT:    store i64 [[TMP88]], ptr [[TMP93]], align 8
6093 // CHECK13-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 1
6094 // CHECK13-NEXT:    store ptr null, ptr [[TMP94]], align 8
6095 // CHECK13-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
6096 // CHECK13-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
6097 // CHECK13-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0
6098 // CHECK13-NEXT:    store i32 2, ptr [[TMP97]], align 4
6099 // CHECK13-NEXT:    [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1
6100 // CHECK13-NEXT:    store i32 2, ptr [[TMP98]], align 4
6101 // CHECK13-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2
6102 // CHECK13-NEXT:    store ptr [[TMP95]], ptr [[TMP99]], align 8
6103 // CHECK13-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3
6104 // CHECK13-NEXT:    store ptr [[TMP96]], ptr [[TMP100]], align 8
6105 // CHECK13-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4
6106 // CHECK13-NEXT:    store ptr @.offload_sizes.17, ptr [[TMP101]], align 8
6107 // CHECK13-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5
6108 // CHECK13-NEXT:    store ptr @.offload_maptypes.18, ptr [[TMP102]], align 8
6109 // CHECK13-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6
6110 // CHECK13-NEXT:    store ptr null, ptr [[TMP103]], align 8
6111 // CHECK13-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7
6112 // CHECK13-NEXT:    store ptr null, ptr [[TMP104]], align 8
6113 // CHECK13-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8
6114 // CHECK13-NEXT:    store i64 10, ptr [[TMP105]], align 8
6115 // CHECK13-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9
6116 // CHECK13-NEXT:    store i64 0, ptr [[TMP106]], align 8
6117 // CHECK13-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10
6118 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4
6119 // CHECK13-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11
6120 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4
6121 // CHECK13-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12
6122 // CHECK13-NEXT:    store i32 0, ptr [[TMP109]], align 4
6123 // CHECK13-NEXT:    [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]])
6124 // CHECK13-NEXT:    [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0
6125 // CHECK13-NEXT:    br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
6126 // CHECK13:       omp_offload.failed29:
6127 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i64 [[TMP88]]) #[[ATTR3]]
6128 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
6129 // CHECK13:       omp_offload.cont30:
6130 // CHECK13-NEXT:    ret i32 0
6131 //
6132 //
6133 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
6134 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6135 // CHECK13-NEXT:  entry:
6136 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6137 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6138 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6139 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]])
6140 // CHECK13-NEXT:    ret void
6141 //
6142 //
6143 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined
6144 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6145 // CHECK13-NEXT:  entry:
6146 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6147 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6148 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6149 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6150 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6151 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6152 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6153 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6154 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6155 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6156 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6157 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6158 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6159 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6160 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6161 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6162 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6163 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6164 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6165 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
6166 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6167 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6168 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6169 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6170 // CHECK13:       cond.true:
6171 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6172 // CHECK13:       cond.false:
6173 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6174 // CHECK13-NEXT:    br label [[COND_END]]
6175 // CHECK13:       cond.end:
6176 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6177 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6178 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6179 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
6180 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6181 // CHECK13:       omp.inner.for.cond:
6182 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6183 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6184 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6185 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6186 // CHECK13:       omp.inner.for.body:
6187 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6188 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6189 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6190 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6191 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
6192 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6193 // CHECK13:       omp.inner.for.inc:
6194 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6195 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6196 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6197 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6198 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6199 // CHECK13:       omp.inner.for.end:
6200 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6201 // CHECK13:       omp.loop.exit:
6202 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
6203 // CHECK13-NEXT:    ret void
6204 //
6205 //
6206 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined
6207 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6208 // CHECK13-NEXT:  entry:
6209 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6210 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6211 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6212 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6213 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6214 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6215 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6216 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6217 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6218 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6219 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6220 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6221 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6222 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6223 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6224 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6225 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6226 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6227 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6228 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6229 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6230 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6231 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6232 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6233 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6234 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6235 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6236 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6237 // CHECK13-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6238 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
6239 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6240 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6241 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
6242 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6243 // CHECK13:       cond.true:
6244 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6245 // CHECK13:       cond.false:
6246 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6247 // CHECK13-NEXT:    br label [[COND_END]]
6248 // CHECK13:       cond.end:
6249 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6250 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6251 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6252 // CHECK13-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6253 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6254 // CHECK13:       omp.inner.for.cond:
6255 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6256 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6257 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6258 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6259 // CHECK13:       omp.inner.for.body:
6260 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6261 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6262 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6263 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6264 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
6265 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6266 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
6267 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
6268 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6269 // CHECK13:       omp.body.continue:
6270 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6271 // CHECK13:       omp.inner.for.inc:
6272 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6273 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6274 // CHECK13-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6275 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6276 // CHECK13:       omp.inner.for.end:
6277 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6278 // CHECK13:       omp.loop.exit:
6279 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
6280 // CHECK13-NEXT:    ret void
6281 //
6282 //
6283 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
6284 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6285 // CHECK13-NEXT:  entry:
6286 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6287 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6288 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6289 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])
6290 // CHECK13-NEXT:    ret void
6291 //
6292 //
6293 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined
6294 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6295 // CHECK13-NEXT:  entry:
6296 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6297 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6298 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6299 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6300 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6301 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6302 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6303 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6304 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6305 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6306 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6307 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6308 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6309 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6310 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6311 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6312 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6313 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6314 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6315 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
6316 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6317 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6318 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6319 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6320 // CHECK13:       cond.true:
6321 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6322 // CHECK13:       cond.false:
6323 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6324 // CHECK13-NEXT:    br label [[COND_END]]
6325 // CHECK13:       cond.end:
6326 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6327 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6328 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6329 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
6330 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6331 // CHECK13:       omp.inner.for.cond:
6332 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6333 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6334 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6335 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6336 // CHECK13:       omp.inner.for.body:
6337 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6338 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6339 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6340 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6341 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
6342 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6343 // CHECK13:       omp.inner.for.inc:
6344 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6345 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6346 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6347 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6348 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6349 // CHECK13:       omp.inner.for.end:
6350 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6351 // CHECK13:       omp.loop.exit:
6352 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
6353 // CHECK13-NEXT:    ret void
6354 //
6355 //
6356 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined
6357 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6358 // CHECK13-NEXT:  entry:
6359 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6360 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6361 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6362 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6363 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6364 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6365 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6366 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6367 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6368 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6369 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6370 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6371 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6372 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6373 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6374 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6375 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6376 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6377 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6378 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6379 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6380 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6381 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6382 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6383 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6384 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6385 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6386 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6387 // CHECK13-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6388 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
6389 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6390 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6391 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
6392 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6393 // CHECK13:       cond.true:
6394 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6395 // CHECK13:       cond.false:
6396 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6397 // CHECK13-NEXT:    br label [[COND_END]]
6398 // CHECK13:       cond.end:
6399 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6400 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6401 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6402 // CHECK13-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6403 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6404 // CHECK13:       omp.inner.for.cond:
6405 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6406 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6407 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6408 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6409 // CHECK13:       omp.inner.for.body:
6410 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6411 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6412 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6413 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6414 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
6415 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6416 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
6417 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
6418 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6419 // CHECK13:       omp.body.continue:
6420 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6421 // CHECK13:       omp.inner.for.inc:
6422 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6423 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6424 // CHECK13-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6425 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6426 // CHECK13:       omp.inner.for.end:
6427 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6428 // CHECK13:       omp.loop.exit:
6429 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
6430 // CHECK13-NEXT:    ret void
6431 //
6432 //
6433 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
6434 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6435 // CHECK13-NEXT:  entry:
6436 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6437 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6438 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6439 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6440 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6441 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6442 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
6443 // CHECK13-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
6444 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
6445 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i64 [[TMP2]])
6446 // CHECK13-NEXT:    ret void
6447 //
6448 //
6449 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined
6450 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6451 // CHECK13-NEXT:  entry:
6452 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6453 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6454 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6455 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6456 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6457 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6458 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6459 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6460 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6461 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6462 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6463 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6464 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6465 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6466 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6467 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6468 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6469 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6470 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6471 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6472 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6473 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6474 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
6475 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6476 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6477 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6478 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6479 // CHECK13:       cond.true:
6480 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6481 // CHECK13:       cond.false:
6482 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6483 // CHECK13-NEXT:    br label [[COND_END]]
6484 // CHECK13:       cond.end:
6485 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6486 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6487 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6488 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
6489 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6490 // CHECK13:       omp.inner.for.cond:
6491 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6492 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6493 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6494 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6495 // CHECK13:       omp.inner.for.body:
6496 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6497 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6498 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6499 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6500 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
6501 // CHECK13-NEXT:    store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
6502 // CHECK13-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
6503 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])
6504 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6505 // CHECK13:       omp.inner.for.inc:
6506 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6507 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6508 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6509 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6510 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6511 // CHECK13:       omp.inner.for.end:
6512 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6513 // CHECK13:       omp.loop.exit:
6514 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
6515 // CHECK13-NEXT:    ret void
6516 //
6517 //
6518 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined
6519 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6520 // CHECK13-NEXT:  entry:
6521 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6522 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6523 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6524 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6525 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6526 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6527 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6528 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6529 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6530 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6531 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6532 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6533 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6534 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6535 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6536 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6537 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6538 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6539 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6540 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6541 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6542 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6543 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6544 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6545 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6546 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6547 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6548 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6549 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6550 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6551 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
6552 // CHECK13-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6553 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
6554 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
6555 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6556 // CHECK13:       omp.dispatch.cond:
6557 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6558 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6559 // CHECK13-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP7]] to i32
6560 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV2]]
6561 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6562 // CHECK13:       cond.true:
6563 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6564 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
6565 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6566 // CHECK13:       cond.false:
6567 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6568 // CHECK13-NEXT:    br label [[COND_END]]
6569 // CHECK13:       cond.end:
6570 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
6571 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6572 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6573 // CHECK13-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
6574 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6575 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6576 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
6577 // CHECK13-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6578 // CHECK13:       omp.dispatch.body:
6579 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6580 // CHECK13:       omp.inner.for.cond:
6581 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6582 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6583 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
6584 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6585 // CHECK13:       omp.inner.for.body:
6586 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6587 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
6588 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6589 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6590 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
6591 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
6592 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
6593 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
6594 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6595 // CHECK13:       omp.body.continue:
6596 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6597 // CHECK13:       omp.inner.for.inc:
6598 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6599 // CHECK13-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
6600 // CHECK13-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
6601 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6602 // CHECK13:       omp.inner.for.end:
6603 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6604 // CHECK13:       omp.dispatch.inc:
6605 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6606 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6607 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6608 // CHECK13-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4
6609 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6610 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6611 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
6612 // CHECK13-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4
6613 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
6614 // CHECK13:       omp.dispatch.end:
6615 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
6616 // CHECK13-NEXT:    ret void
6617 //
6618 //
6619 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
6620 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6621 // CHECK13-NEXT:  entry:
6622 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6623 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6624 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6625 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]])
6626 // CHECK13-NEXT:    ret void
6627 //
6628 //
6629 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined
6630 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6631 // CHECK13-NEXT:  entry:
6632 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6633 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6634 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6635 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6636 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6637 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6638 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6639 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6640 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6641 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6642 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6643 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6644 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6645 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6646 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6647 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6648 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6649 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6650 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6651 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
6652 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6653 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6654 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6655 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6656 // CHECK13:       cond.true:
6657 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6658 // CHECK13:       cond.false:
6659 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6660 // CHECK13-NEXT:    br label [[COND_END]]
6661 // CHECK13:       cond.end:
6662 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6663 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6664 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6665 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
6666 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6667 // CHECK13:       omp.inner.for.cond:
6668 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6669 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6670 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6671 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6672 // CHECK13:       omp.inner.for.body:
6673 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6674 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6675 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6676 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6677 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
6678 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6679 // CHECK13:       omp.inner.for.inc:
6680 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6681 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6682 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6683 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6684 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6685 // CHECK13:       omp.inner.for.end:
6686 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6687 // CHECK13:       omp.loop.exit:
6688 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
6689 // CHECK13-NEXT:    ret void
6690 //
6691 //
6692 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined
6693 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6694 // CHECK13-NEXT:  entry:
6695 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6696 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6697 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6698 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6699 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6700 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6701 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6702 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6703 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6704 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6705 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6706 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6707 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6708 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6709 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6710 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6711 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6712 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6713 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6714 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6715 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6716 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6717 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6718 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6719 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6720 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6721 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6722 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6723 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6724 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6725 // CHECK13-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6726 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
6727 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
6728 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6729 // CHECK13:       omp.dispatch.cond:
6730 // CHECK13-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
6731 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6732 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6733 // CHECK13:       omp.dispatch.body:
6734 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6735 // CHECK13-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
6736 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6737 // CHECK13:       omp.inner.for.cond:
6738 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
6739 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
6740 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6741 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6742 // CHECK13:       omp.inner.for.body:
6743 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
6744 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6745 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6746 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
6747 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
6748 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
6749 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
6750 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]
6751 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6752 // CHECK13:       omp.body.continue:
6753 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6754 // CHECK13:       omp.inner.for.inc:
6755 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
6756 // CHECK13-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
6757 // CHECK13-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
6758 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
6759 // CHECK13:       omp.inner.for.end:
6760 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6761 // CHECK13:       omp.dispatch.inc:
6762 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
6763 // CHECK13:       omp.dispatch.end:
6764 // CHECK13-NEXT:    ret void
6765 //
6766 //
6767 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
6768 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6769 // CHECK13-NEXT:  entry:
6770 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6771 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6772 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6773 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6774 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6775 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6776 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
6777 // CHECK13-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
6778 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
6779 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i64 [[TMP2]])
6780 // CHECK13-NEXT:    ret void
6781 //
6782 //
6783 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined
6784 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6785 // CHECK13-NEXT:  entry:
6786 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6787 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6788 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6789 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6790 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6791 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6792 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6793 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6794 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6795 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6796 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6797 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6798 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6799 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6800 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6801 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6802 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6803 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6804 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6805 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6806 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6807 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6808 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
6809 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6810 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6811 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6812 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6813 // CHECK13:       cond.true:
6814 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6815 // CHECK13:       cond.false:
6816 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6817 // CHECK13-NEXT:    br label [[COND_END]]
6818 // CHECK13:       cond.end:
6819 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6820 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6821 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6822 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
6823 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6824 // CHECK13:       omp.inner.for.cond:
6825 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6826 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6827 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6828 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6829 // CHECK13:       omp.inner.for.body:
6830 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6831 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6832 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6833 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6834 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
6835 // CHECK13-NEXT:    store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
6836 // CHECK13-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
6837 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])
6838 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6839 // CHECK13:       omp.inner.for.inc:
6840 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6841 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6842 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6843 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6844 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6845 // CHECK13:       omp.inner.for.end:
6846 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6847 // CHECK13:       omp.loop.exit:
6848 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
6849 // CHECK13-NEXT:    ret void
6850 //
6851 //
6852 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined
6853 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
6854 // CHECK13-NEXT:  entry:
6855 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6856 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6857 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6858 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6859 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6860 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6861 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6862 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6863 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6864 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6865 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6866 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6867 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6868 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6869 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6870 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6871 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6872 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6873 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6874 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6875 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6876 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6877 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6878 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6879 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6880 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6881 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6882 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6883 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6884 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6885 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
6886 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6887 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6888 // CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6889 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
6890 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
6891 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6892 // CHECK13:       omp.dispatch.cond:
6893 // CHECK13-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
6894 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
6895 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6896 // CHECK13:       omp.dispatch.body:
6897 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6898 // CHECK13-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
6899 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6900 // CHECK13:       omp.inner.for.cond:
6901 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
6902 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
6903 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
6904 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6905 // CHECK13:       omp.inner.for.body:
6906 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
6907 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
6908 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6909 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
6910 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
6911 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
6912 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
6913 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]]
6914 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6915 // CHECK13:       omp.body.continue:
6916 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6917 // CHECK13:       omp.inner.for.inc:
6918 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
6919 // CHECK13-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1
6920 // CHECK13-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
6921 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
6922 // CHECK13:       omp.inner.for.end:
6923 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6924 // CHECK13:       omp.dispatch.inc:
6925 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
6926 // CHECK13:       omp.dispatch.end:
6927 // CHECK13-NEXT:    ret void
6928 //
6929 //
6930 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6931 // CHECK13-SAME: () #[[ATTR6:[0-9]+]] {
6932 // CHECK13-NEXT:  entry:
6933 // CHECK13-NEXT:    call void @__tgt_register_requires(i64 1)
6934 // CHECK13-NEXT:    ret void
6935 //
6936 //
6937 // CHECK15-LABEL: define {{[^@]+}}@main
6938 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6939 // CHECK15-NEXT:  entry:
6940 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
6941 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
6942 // CHECK15-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 4
6943 // CHECK15-NEXT:    [[N:%.*]] = alloca i32, align 4
6944 // CHECK15-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 4
6945 // CHECK15-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
6946 // CHECK15-NEXT:    [[M:%.*]] = alloca i32, align 4
6947 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
6948 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4
6949 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4
6950 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4
6951 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
6952 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6953 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6954 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6955 // CHECK15-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6956 // CHECK15-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
6957 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4
6958 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4
6959 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4
6960 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
6961 // CHECK15-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
6962 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
6963 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
6964 // CHECK15-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6965 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
6966 // CHECK15-NEXT:    [[N_CASTED19:%.*]] = alloca i32, align 4
6967 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
6968 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 4
6969 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 4
6970 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 4
6971 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4
6972 // CHECK15-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
6973 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
6974 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
6975 // CHECK15-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6976 // CHECK15-NEXT:    [[N_CASTED34:%.*]] = alloca i32, align 4
6977 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 4
6978 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 4
6979 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 4
6980 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 4
6981 // CHECK15-NEXT:    [[_TMP39:%.*]] = alloca i32, align 4
6982 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
6983 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
6984 // CHECK15-NEXT:    [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6985 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4
6986 // CHECK15-NEXT:    [[N_CASTED50:%.*]] = alloca i32, align 4
6987 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i32, align 4
6988 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 4
6989 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 4
6990 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 4
6991 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 4
6992 // CHECK15-NEXT:    [[_TMP56:%.*]] = alloca i32, align 4
6993 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4
6994 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
6995 // CHECK15-NEXT:    [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6996 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
6997 // CHECK15-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
6998 // CHECK15-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4
6999 // CHECK15-NEXT:    store i32 100, ptr [[N]], align 4
7000 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
7001 // CHECK15-NEXT:    [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()
7002 // CHECK15-NEXT:    store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4
7003 // CHECK15-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
7004 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4
7005 // CHECK15-NEXT:    store i32 10, ptr [[M]], align 4
7006 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N]], align 4
7007 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
7008 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
7009 // CHECK15-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
7010 // CHECK15-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
7011 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false)
7012 // CHECK15-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7013 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[TMP6]], align 4
7014 // CHECK15-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7015 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[TMP7]], align 4
7016 // CHECK15-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
7017 // CHECK15-NEXT:    store ptr null, ptr [[TMP8]], align 4
7018 // CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7019 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP9]], align 4
7020 // CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7021 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP10]], align 4
7022 // CHECK15-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
7023 // CHECK15-NEXT:    store ptr null, ptr [[TMP11]], align 4
7024 // CHECK15-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7025 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 4
7026 // CHECK15-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7027 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 4
7028 // CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
7029 // CHECK15-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 4
7030 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
7031 // CHECK15-NEXT:    store ptr null, ptr [[TMP15]], align 4
7032 // CHECK15-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7033 // CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7034 // CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7035 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 4
7036 // CHECK15-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
7037 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7038 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
7039 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7040 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7041 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7042 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7043 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
7044 // CHECK15-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i64
7045 // CHECK15-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
7046 // CHECK15-NEXT:    store i32 2, ptr [[TMP23]], align 4
7047 // CHECK15-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
7048 // CHECK15-NEXT:    store i32 3, ptr [[TMP24]], align 4
7049 // CHECK15-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
7050 // CHECK15-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 4
7051 // CHECK15-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
7052 // CHECK15-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 4
7053 // CHECK15-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
7054 // CHECK15-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 4
7055 // CHECK15-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
7056 // CHECK15-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 4
7057 // CHECK15-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
7058 // CHECK15-NEXT:    store ptr null, ptr [[TMP29]], align 4
7059 // CHECK15-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
7060 // CHECK15-NEXT:    store ptr null, ptr [[TMP30]], align 4
7061 // CHECK15-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
7062 // CHECK15-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 8
7063 // CHECK15-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
7064 // CHECK15-NEXT:    store i64 0, ptr [[TMP32]], align 8
7065 // CHECK15-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
7066 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
7067 // CHECK15-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
7068 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
7069 // CHECK15-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
7070 // CHECK15-NEXT:    store i32 0, ptr [[TMP35]], align 4
7071 // CHECK15-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]])
7072 // CHECK15-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
7073 // CHECK15-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7074 // CHECK15:       omp_offload.failed:
7075 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]
7076 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7077 // CHECK15:       omp_offload.cont:
7078 // CHECK15-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 4
7079 // CHECK15-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
7080 // CHECK15-NEXT:    [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4
7081 // CHECK15-NEXT:    [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4
7082 // CHECK15-NEXT:    [[TMP41:%.*]] = sext i32 [[TMP40]] to i64
7083 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false)
7084 // CHECK15-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
7085 // CHECK15-NEXT:    store i32 [[TMP39]], ptr [[TMP42]], align 4
7086 // CHECK15-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
7087 // CHECK15-NEXT:    store i32 [[TMP39]], ptr [[TMP43]], align 4
7088 // CHECK15-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
7089 // CHECK15-NEXT:    store ptr null, ptr [[TMP44]], align 4
7090 // CHECK15-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
7091 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP45]], align 4
7092 // CHECK15-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
7093 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP46]], align 4
7094 // CHECK15-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
7095 // CHECK15-NEXT:    store ptr null, ptr [[TMP47]], align 4
7096 // CHECK15-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
7097 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 4
7098 // CHECK15-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
7099 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP49]], align 4
7100 // CHECK15-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
7101 // CHECK15-NEXT:    store i64 [[TMP41]], ptr [[TMP50]], align 4
7102 // CHECK15-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
7103 // CHECK15-NEXT:    store ptr null, ptr [[TMP51]], align 4
7104 // CHECK15-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
7105 // CHECK15-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
7106 // CHECK15-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
7107 // CHECK15-NEXT:    [[TMP55:%.*]] = load i32, ptr [[N]], align 4
7108 // CHECK15-NEXT:    store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4
7109 // CHECK15-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
7110 // CHECK15-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0
7111 // CHECK15-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
7112 // CHECK15-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
7113 // CHECK15-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
7114 // CHECK15-NEXT:    [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
7115 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1
7116 // CHECK15-NEXT:    [[TMP58:%.*]] = zext i32 [[ADD14]] to i64
7117 // CHECK15-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
7118 // CHECK15-NEXT:    store i32 2, ptr [[TMP59]], align 4
7119 // CHECK15-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
7120 // CHECK15-NEXT:    store i32 3, ptr [[TMP60]], align 4
7121 // CHECK15-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
7122 // CHECK15-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 4
7123 // CHECK15-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
7124 // CHECK15-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 4
7125 // CHECK15-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
7126 // CHECK15-NEXT:    store ptr [[TMP54]], ptr [[TMP63]], align 4
7127 // CHECK15-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
7128 // CHECK15-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4
7129 // CHECK15-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
7130 // CHECK15-NEXT:    store ptr null, ptr [[TMP65]], align 4
7131 // CHECK15-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
7132 // CHECK15-NEXT:    store ptr null, ptr [[TMP66]], align 4
7133 // CHECK15-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
7134 // CHECK15-NEXT:    store i64 [[TMP58]], ptr [[TMP67]], align 8
7135 // CHECK15-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
7136 // CHECK15-NEXT:    store i64 0, ptr [[TMP68]], align 8
7137 // CHECK15-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
7138 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
7139 // CHECK15-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
7140 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP70]], align 4
7141 // CHECK15-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
7142 // CHECK15-NEXT:    store i32 0, ptr [[TMP71]], align 4
7143 // CHECK15-NEXT:    [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]])
7144 // CHECK15-NEXT:    [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0
7145 // CHECK15-NEXT:    br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
7146 // CHECK15:       omp_offload.failed16:
7147 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]
7148 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
7149 // CHECK15:       omp_offload.cont17:
7150 // CHECK15-NEXT:    [[TMP74:%.*]] = load i32, ptr [[M]], align 4
7151 // CHECK15-NEXT:    store i32 [[TMP74]], ptr [[DOTCAPTURE_EXPR_18]], align 4
7152 // CHECK15-NEXT:    [[TMP75:%.*]] = load i32, ptr [[N]], align 4
7153 // CHECK15-NEXT:    store i32 [[TMP75]], ptr [[N_CASTED19]], align 4
7154 // CHECK15-NEXT:    [[TMP76:%.*]] = load i32, ptr [[N_CASTED19]], align 4
7155 // CHECK15-NEXT:    [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4
7156 // CHECK15-NEXT:    store i32 [[TMP77]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
7157 // CHECK15-NEXT:    [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
7158 // CHECK15-NEXT:    [[TMP79:%.*]] = mul nuw i32 [[TMP0]], 4
7159 // CHECK15-NEXT:    [[TMP80:%.*]] = sext i32 [[TMP79]] to i64
7160 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES23]], ptr align 4 @.offload_sizes.3, i32 32, i1 false)
7161 // CHECK15-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
7162 // CHECK15-NEXT:    store i32 [[TMP76]], ptr [[TMP81]], align 4
7163 // CHECK15-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
7164 // CHECK15-NEXT:    store i32 [[TMP76]], ptr [[TMP82]], align 4
7165 // CHECK15-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
7166 // CHECK15-NEXT:    store ptr null, ptr [[TMP83]], align 4
7167 // CHECK15-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
7168 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP84]], align 4
7169 // CHECK15-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
7170 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP85]], align 4
7171 // CHECK15-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
7172 // CHECK15-NEXT:    store ptr null, ptr [[TMP86]], align 4
7173 // CHECK15-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
7174 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP87]], align 4
7175 // CHECK15-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
7176 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP88]], align 4
7177 // CHECK15-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
7178 // CHECK15-NEXT:    store i64 [[TMP80]], ptr [[TMP89]], align 4
7179 // CHECK15-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2
7180 // CHECK15-NEXT:    store ptr null, ptr [[TMP90]], align 4
7181 // CHECK15-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
7182 // CHECK15-NEXT:    store i32 [[TMP78]], ptr [[TMP91]], align 4
7183 // CHECK15-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
7184 // CHECK15-NEXT:    store i32 [[TMP78]], ptr [[TMP92]], align 4
7185 // CHECK15-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3
7186 // CHECK15-NEXT:    store ptr null, ptr [[TMP93]], align 4
7187 // CHECK15-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
7188 // CHECK15-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
7189 // CHECK15-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
7190 // CHECK15-NEXT:    [[TMP97:%.*]] = load i32, ptr [[N]], align 4
7191 // CHECK15-NEXT:    store i32 [[TMP97]], ptr [[DOTCAPTURE_EXPR_25]], align 4
7192 // CHECK15-NEXT:    [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
7193 // CHECK15-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP98]], 0
7194 // CHECK15-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
7195 // CHECK15-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
7196 // CHECK15-NEXT:    store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4
7197 // CHECK15-NEXT:    [[TMP99:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4
7198 // CHECK15-NEXT:    [[ADD30:%.*]] = add nsw i32 [[TMP99]], 1
7199 // CHECK15-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD30]] to i64
7200 // CHECK15-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
7201 // CHECK15-NEXT:    store i32 2, ptr [[TMP101]], align 4
7202 // CHECK15-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
7203 // CHECK15-NEXT:    store i32 4, ptr [[TMP102]], align 4
7204 // CHECK15-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
7205 // CHECK15-NEXT:    store ptr [[TMP94]], ptr [[TMP103]], align 4
7206 // CHECK15-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
7207 // CHECK15-NEXT:    store ptr [[TMP95]], ptr [[TMP104]], align 4
7208 // CHECK15-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
7209 // CHECK15-NEXT:    store ptr [[TMP96]], ptr [[TMP105]], align 4
7210 // CHECK15-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
7211 // CHECK15-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP106]], align 4
7212 // CHECK15-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
7213 // CHECK15-NEXT:    store ptr null, ptr [[TMP107]], align 4
7214 // CHECK15-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
7215 // CHECK15-NEXT:    store ptr null, ptr [[TMP108]], align 4
7216 // CHECK15-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
7217 // CHECK15-NEXT:    store i64 [[TMP100]], ptr [[TMP109]], align 8
7218 // CHECK15-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
7219 // CHECK15-NEXT:    store i64 0, ptr [[TMP110]], align 8
7220 // CHECK15-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
7221 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4
7222 // CHECK15-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
7223 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP112]], align 4
7224 // CHECK15-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
7225 // CHECK15-NEXT:    store i32 0, ptr [[TMP113]], align 4
7226 // CHECK15-NEXT:    [[TMP114:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]])
7227 // CHECK15-NEXT:    [[TMP115:%.*]] = icmp ne i32 [[TMP114]], 0
7228 // CHECK15-NEXT:    br i1 [[TMP115]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
7229 // CHECK15:       omp_offload.failed32:
7230 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP76]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP78]]) #[[ATTR3]]
7231 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
7232 // CHECK15:       omp_offload.cont33:
7233 // CHECK15-NEXT:    [[TMP116:%.*]] = load i32, ptr [[N]], align 4
7234 // CHECK15-NEXT:    store i32 [[TMP116]], ptr [[N_CASTED34]], align 4
7235 // CHECK15-NEXT:    [[TMP117:%.*]] = load i32, ptr [[N_CASTED34]], align 4
7236 // CHECK15-NEXT:    [[TMP118:%.*]] = mul nuw i32 [[TMP0]], 4
7237 // CHECK15-NEXT:    [[TMP119:%.*]] = sext i32 [[TMP118]] to i64
7238 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES38]], ptr align 4 @.offload_sizes.5, i32 24, i1 false)
7239 // CHECK15-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
7240 // CHECK15-NEXT:    store i32 [[TMP117]], ptr [[TMP120]], align 4
7241 // CHECK15-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
7242 // CHECK15-NEXT:    store i32 [[TMP117]], ptr [[TMP121]], align 4
7243 // CHECK15-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 0
7244 // CHECK15-NEXT:    store ptr null, ptr [[TMP122]], align 4
7245 // CHECK15-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1
7246 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP123]], align 4
7247 // CHECK15-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1
7248 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP124]], align 4
7249 // CHECK15-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 1
7250 // CHECK15-NEXT:    store ptr null, ptr [[TMP125]], align 4
7251 // CHECK15-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2
7252 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP126]], align 4
7253 // CHECK15-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2
7254 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP127]], align 4
7255 // CHECK15-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2
7256 // CHECK15-NEXT:    store i64 [[TMP119]], ptr [[TMP128]], align 4
7257 // CHECK15-NEXT:    [[TMP129:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 2
7258 // CHECK15-NEXT:    store ptr null, ptr [[TMP129]], align 4
7259 // CHECK15-NEXT:    [[TMP130:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
7260 // CHECK15-NEXT:    [[TMP131:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
7261 // CHECK15-NEXT:    [[TMP132:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0
7262 // CHECK15-NEXT:    [[TMP133:%.*]] = load i32, ptr [[N]], align 4
7263 // CHECK15-NEXT:    store i32 [[TMP133]], ptr [[DOTCAPTURE_EXPR_40]], align 4
7264 // CHECK15-NEXT:    [[TMP134:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
7265 // CHECK15-NEXT:    [[SUB42:%.*]] = sub nsw i32 [[TMP134]], 0
7266 // CHECK15-NEXT:    [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
7267 // CHECK15-NEXT:    [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
7268 // CHECK15-NEXT:    store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4
7269 // CHECK15-NEXT:    [[TMP135:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4
7270 // CHECK15-NEXT:    [[ADD45:%.*]] = add nsw i32 [[TMP135]], 1
7271 // CHECK15-NEXT:    [[TMP136:%.*]] = zext i32 [[ADD45]] to i64
7272 // CHECK15-NEXT:    [[TMP137:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0
7273 // CHECK15-NEXT:    store i32 2, ptr [[TMP137]], align 4
7274 // CHECK15-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1
7275 // CHECK15-NEXT:    store i32 3, ptr [[TMP138]], align 4
7276 // CHECK15-NEXT:    [[TMP139:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2
7277 // CHECK15-NEXT:    store ptr [[TMP130]], ptr [[TMP139]], align 4
7278 // CHECK15-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3
7279 // CHECK15-NEXT:    store ptr [[TMP131]], ptr [[TMP140]], align 4
7280 // CHECK15-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4
7281 // CHECK15-NEXT:    store ptr [[TMP132]], ptr [[TMP141]], align 4
7282 // CHECK15-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5
7283 // CHECK15-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP142]], align 4
7284 // CHECK15-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6
7285 // CHECK15-NEXT:    store ptr null, ptr [[TMP143]], align 4
7286 // CHECK15-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7
7287 // CHECK15-NEXT:    store ptr null, ptr [[TMP144]], align 4
7288 // CHECK15-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8
7289 // CHECK15-NEXT:    store i64 [[TMP136]], ptr [[TMP145]], align 8
7290 // CHECK15-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9
7291 // CHECK15-NEXT:    store i64 0, ptr [[TMP146]], align 8
7292 // CHECK15-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10
7293 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP147]], align 4
7294 // CHECK15-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11
7295 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP148]], align 4
7296 // CHECK15-NEXT:    [[TMP149:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12
7297 // CHECK15-NEXT:    store i32 0, ptr [[TMP149]], align 4
7298 // CHECK15-NEXT:    [[TMP150:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]])
7299 // CHECK15-NEXT:    [[TMP151:%.*]] = icmp ne i32 [[TMP150]], 0
7300 // CHECK15-NEXT:    br i1 [[TMP151]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
7301 // CHECK15:       omp_offload.failed47:
7302 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP117]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]
7303 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
7304 // CHECK15:       omp_offload.cont48:
7305 // CHECK15-NEXT:    [[TMP152:%.*]] = load i32, ptr [[M]], align 4
7306 // CHECK15-NEXT:    store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR_49]], align 4
7307 // CHECK15-NEXT:    [[TMP153:%.*]] = load i32, ptr [[N]], align 4
7308 // CHECK15-NEXT:    store i32 [[TMP153]], ptr [[N_CASTED50]], align 4
7309 // CHECK15-NEXT:    [[TMP154:%.*]] = load i32, ptr [[N_CASTED50]], align 4
7310 // CHECK15-NEXT:    [[TMP155:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4
7311 // CHECK15-NEXT:    store i32 [[TMP155]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4
7312 // CHECK15-NEXT:    [[TMP156:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4
7313 // CHECK15-NEXT:    [[TMP157:%.*]] = mul nuw i32 [[TMP0]], 4
7314 // CHECK15-NEXT:    [[TMP158:%.*]] = sext i32 [[TMP157]] to i64
7315 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES55]], ptr align 4 @.offload_sizes.7, i32 32, i1 false)
7316 // CHECK15-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
7317 // CHECK15-NEXT:    store i32 [[TMP154]], ptr [[TMP159]], align 4
7318 // CHECK15-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
7319 // CHECK15-NEXT:    store i32 [[TMP154]], ptr [[TMP160]], align 4
7320 // CHECK15-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 0
7321 // CHECK15-NEXT:    store ptr null, ptr [[TMP161]], align 4
7322 // CHECK15-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1
7323 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP162]], align 4
7324 // CHECK15-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1
7325 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP163]], align 4
7326 // CHECK15-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 1
7327 // CHECK15-NEXT:    store ptr null, ptr [[TMP164]], align 4
7328 // CHECK15-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2
7329 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP165]], align 4
7330 // CHECK15-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2
7331 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP166]], align 4
7332 // CHECK15-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2
7333 // CHECK15-NEXT:    store i64 [[TMP158]], ptr [[TMP167]], align 4
7334 // CHECK15-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 2
7335 // CHECK15-NEXT:    store ptr null, ptr [[TMP168]], align 4
7336 // CHECK15-NEXT:    [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3
7337 // CHECK15-NEXT:    store i32 [[TMP156]], ptr [[TMP169]], align 4
7338 // CHECK15-NEXT:    [[TMP170:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3
7339 // CHECK15-NEXT:    store i32 [[TMP156]], ptr [[TMP170]], align 4
7340 // CHECK15-NEXT:    [[TMP171:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 3
7341 // CHECK15-NEXT:    store ptr null, ptr [[TMP171]], align 4
7342 // CHECK15-NEXT:    [[TMP172:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
7343 // CHECK15-NEXT:    [[TMP173:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
7344 // CHECK15-NEXT:    [[TMP174:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0
7345 // CHECK15-NEXT:    [[TMP175:%.*]] = load i32, ptr [[N]], align 4
7346 // CHECK15-NEXT:    store i32 [[TMP175]], ptr [[DOTCAPTURE_EXPR_57]], align 4
7347 // CHECK15-NEXT:    [[TMP176:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4
7348 // CHECK15-NEXT:    [[SUB59:%.*]] = sub nsw i32 [[TMP176]], 0
7349 // CHECK15-NEXT:    [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1
7350 // CHECK15-NEXT:    [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1
7351 // CHECK15-NEXT:    store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4
7352 // CHECK15-NEXT:    [[TMP177:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4
7353 // CHECK15-NEXT:    [[ADD62:%.*]] = add nsw i32 [[TMP177]], 1
7354 // CHECK15-NEXT:    [[TMP178:%.*]] = zext i32 [[ADD62]] to i64
7355 // CHECK15-NEXT:    [[TMP179:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0
7356 // CHECK15-NEXT:    store i32 2, ptr [[TMP179]], align 4
7357 // CHECK15-NEXT:    [[TMP180:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1
7358 // CHECK15-NEXT:    store i32 4, ptr [[TMP180]], align 4
7359 // CHECK15-NEXT:    [[TMP181:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2
7360 // CHECK15-NEXT:    store ptr [[TMP172]], ptr [[TMP181]], align 4
7361 // CHECK15-NEXT:    [[TMP182:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3
7362 // CHECK15-NEXT:    store ptr [[TMP173]], ptr [[TMP182]], align 4
7363 // CHECK15-NEXT:    [[TMP183:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4
7364 // CHECK15-NEXT:    store ptr [[TMP174]], ptr [[TMP183]], align 4
7365 // CHECK15-NEXT:    [[TMP184:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5
7366 // CHECK15-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP184]], align 4
7367 // CHECK15-NEXT:    [[TMP185:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6
7368 // CHECK15-NEXT:    store ptr null, ptr [[TMP185]], align 4
7369 // CHECK15-NEXT:    [[TMP186:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7
7370 // CHECK15-NEXT:    store ptr null, ptr [[TMP186]], align 4
7371 // CHECK15-NEXT:    [[TMP187:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8
7372 // CHECK15-NEXT:    store i64 [[TMP178]], ptr [[TMP187]], align 8
7373 // CHECK15-NEXT:    [[TMP188:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9
7374 // CHECK15-NEXT:    store i64 0, ptr [[TMP188]], align 8
7375 // CHECK15-NEXT:    [[TMP189:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10
7376 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP189]], align 4
7377 // CHECK15-NEXT:    [[TMP190:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11
7378 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP190]], align 4
7379 // CHECK15-NEXT:    [[TMP191:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12
7380 // CHECK15-NEXT:    store i32 0, ptr [[TMP191]], align 4
7381 // CHECK15-NEXT:    [[TMP192:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]])
7382 // CHECK15-NEXT:    [[TMP193:%.*]] = icmp ne i32 [[TMP192]], 0
7383 // CHECK15-NEXT:    br i1 [[TMP193]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
7384 // CHECK15:       omp_offload.failed64:
7385 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP154]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP156]]) #[[ATTR3]]
7386 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
7387 // CHECK15:       omp_offload.cont65:
7388 // CHECK15-NEXT:    [[TMP194:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
7389 // CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP194]])
7390 // CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
7391 // CHECK15-NEXT:    [[TMP195:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4
7392 // CHECK15-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP195]])
7393 // CHECK15-NEXT:    [[TMP196:%.*]] = load i32, ptr [[RETVAL]], align 4
7394 // CHECK15-NEXT:    ret i32 [[TMP196]]
7395 //
7396 //
7397 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
7398 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
7399 // CHECK15-NEXT:  entry:
7400 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7401 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7402 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7403 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
7404 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7405 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7406 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7407 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7408 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7409 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
7410 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
7411 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
7412 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]])
7413 // CHECK15-NEXT:    ret void
7414 //
7415 //
7416 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined
7417 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7418 // CHECK15-NEXT:  entry:
7419 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7420 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7421 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7422 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7423 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7424 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7425 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7426 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7427 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7428 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7429 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7430 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7431 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7432 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7433 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
7434 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
7435 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7436 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7437 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7438 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7439 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7440 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7441 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7442 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
7443 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
7444 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7445 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7446 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7447 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7448 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7449 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7450 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7451 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7452 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7453 // CHECK15:       omp.precond.then:
7454 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7455 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7456 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
7457 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7458 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7459 // CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7460 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
7461 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7462 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7463 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7464 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
7465 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7466 // CHECK15:       cond.true:
7467 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7468 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7469 // CHECK15:       cond.false:
7470 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7471 // CHECK15-NEXT:    br label [[COND_END]]
7472 // CHECK15:       cond.end:
7473 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
7474 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7475 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7476 // CHECK15-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
7477 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7478 // CHECK15:       omp.inner.for.cond:
7479 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7480 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7481 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7482 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7483 // CHECK15:       omp.inner.for.body:
7484 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7485 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7486 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4
7487 // CHECK15-NEXT:    store i32 [[TMP17]], ptr [[N_CASTED]], align 4
7488 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4
7489 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]])
7490 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7491 // CHECK15:       omp.inner.for.inc:
7492 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7493 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7494 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
7495 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
7496 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
7497 // CHECK15:       omp.inner.for.end:
7498 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7499 // CHECK15:       omp.loop.exit:
7500 // CHECK15-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7501 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
7502 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
7503 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
7504 // CHECK15:       omp.precond.end:
7505 // CHECK15-NEXT:    ret void
7506 //
7507 //
7508 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined
7509 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7510 // CHECK15-NEXT:  entry:
7511 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7512 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7513 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7514 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7515 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7516 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7517 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7518 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7519 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7520 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7521 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7522 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7523 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7524 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7525 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7526 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7527 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
7528 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7529 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7530 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7531 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7532 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7533 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7534 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7535 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7536 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7537 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
7538 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
7539 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7540 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7541 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7542 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7543 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7544 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7545 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7546 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7547 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7548 // CHECK15:       omp.precond.then:
7549 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7550 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7551 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
7552 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7553 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7554 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4
7555 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
7556 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7557 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7558 // CHECK15-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7559 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
7560 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7561 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7562 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7563 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
7564 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7565 // CHECK15:       cond.true:
7566 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7567 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7568 // CHECK15:       cond.false:
7569 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7570 // CHECK15-NEXT:    br label [[COND_END]]
7571 // CHECK15:       cond.end:
7572 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
7573 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7574 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7575 // CHECK15-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
7576 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7577 // CHECK15:       omp.inner.for.cond:
7578 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7579 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7580 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
7581 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7582 // CHECK15:       omp.inner.for.body:
7583 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7584 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
7585 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7586 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
7587 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I3]], align 4
7588 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]]
7589 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
7590 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7591 // CHECK15:       omp.body.continue:
7592 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7593 // CHECK15:       omp.inner.for.inc:
7594 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7595 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
7596 // CHECK15-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
7597 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
7598 // CHECK15:       omp.inner.for.end:
7599 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7600 // CHECK15:       omp.loop.exit:
7601 // CHECK15-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7602 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
7603 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
7604 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
7605 // CHECK15:       omp.precond.end:
7606 // CHECK15-NEXT:    ret void
7607 //
7608 //
7609 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
7610 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7611 // CHECK15-NEXT:  entry:
7612 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7613 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7614 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7615 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
7616 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7617 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7618 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7619 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7620 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7621 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
7622 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
7623 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
7624 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]])
7625 // CHECK15-NEXT:    ret void
7626 //
7627 //
7628 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined
7629 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7630 // CHECK15-NEXT:  entry:
7631 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7632 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7633 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7634 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7635 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7636 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7637 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7638 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7639 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7640 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7641 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7642 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7643 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7644 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7645 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
7646 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
7647 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7648 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7649 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7650 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7651 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7652 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7653 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7654 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
7655 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
7656 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7657 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7658 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7659 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7660 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7661 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7662 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7663 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7664 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7665 // CHECK15:       omp.precond.then:
7666 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7667 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7668 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
7669 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7670 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7671 // CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7672 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
7673 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7674 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7675 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7676 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
7677 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7678 // CHECK15:       cond.true:
7679 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7680 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7681 // CHECK15:       cond.false:
7682 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7683 // CHECK15-NEXT:    br label [[COND_END]]
7684 // CHECK15:       cond.end:
7685 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
7686 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7687 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7688 // CHECK15-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
7689 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7690 // CHECK15:       omp.inner.for.cond:
7691 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7692 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7693 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
7694 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7695 // CHECK15:       omp.inner.for.body:
7696 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7697 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7698 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4
7699 // CHECK15-NEXT:    store i32 [[TMP17]], ptr [[N_CASTED]], align 4
7700 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4
7701 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]])
7702 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7703 // CHECK15:       omp.inner.for.inc:
7704 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7705 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7706 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
7707 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
7708 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
7709 // CHECK15:       omp.inner.for.end:
7710 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7711 // CHECK15:       omp.loop.exit:
7712 // CHECK15-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7713 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
7714 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
7715 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
7716 // CHECK15:       omp.precond.end:
7717 // CHECK15-NEXT:    ret void
7718 //
7719 //
7720 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined
7721 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7722 // CHECK15-NEXT:  entry:
7723 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7724 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7725 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7726 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7727 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7728 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7729 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7730 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7731 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7732 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7733 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7734 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7735 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7736 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7737 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7738 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7739 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
7740 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7741 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7742 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7743 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7744 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7745 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7746 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7747 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7748 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7749 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
7750 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
7751 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7752 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7753 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7754 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7755 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7756 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7757 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7758 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7759 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7760 // CHECK15:       omp.precond.then:
7761 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7762 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7763 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
7764 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7765 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7766 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4
7767 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
7768 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7769 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7770 // CHECK15-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7771 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
7772 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7773 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7774 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7775 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
7776 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7777 // CHECK15:       cond.true:
7778 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7779 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7780 // CHECK15:       cond.false:
7781 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7782 // CHECK15-NEXT:    br label [[COND_END]]
7783 // CHECK15:       cond.end:
7784 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
7785 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7786 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7787 // CHECK15-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
7788 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7789 // CHECK15:       omp.inner.for.cond:
7790 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7791 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7792 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
7793 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7794 // CHECK15:       omp.inner.for.body:
7795 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7796 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
7797 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7798 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
7799 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I3]], align 4
7800 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]]
7801 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
7802 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7803 // CHECK15:       omp.body.continue:
7804 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7805 // CHECK15:       omp.inner.for.inc:
7806 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7807 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
7808 // CHECK15-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
7809 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
7810 // CHECK15:       omp.inner.for.end:
7811 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7812 // CHECK15:       omp.loop.exit:
7813 // CHECK15-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7814 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
7815 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
7816 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
7817 // CHECK15:       omp.precond.end:
7818 // CHECK15-NEXT:    ret void
7819 //
7820 //
7821 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
7822 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7823 // CHECK15-NEXT:  entry:
7824 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7825 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7826 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7827 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
7828 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
7829 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
7830 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7831 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7832 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7833 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
7834 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7835 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7836 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
7837 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
7838 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
7839 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
7840 // CHECK15-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
7841 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
7842 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]])
7843 // CHECK15-NEXT:    ret void
7844 //
7845 //
7846 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined
7847 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7848 // CHECK15-NEXT:  entry:
7849 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7850 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7851 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7852 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7853 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7854 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
7855 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7856 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7857 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7858 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7859 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7860 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7861 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7862 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7863 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7864 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
7865 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
7866 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
7867 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7868 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7869 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7870 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7871 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7872 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
7873 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7874 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7875 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
7876 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7877 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7878 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
7879 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7880 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7881 // CHECK15-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
7882 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7883 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7884 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
7885 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7886 // CHECK15:       omp.precond.then:
7887 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7888 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7889 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
7890 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7891 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7892 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
7893 // CHECK15-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7894 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
7895 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
7896 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7897 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7898 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7899 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7900 // CHECK15:       cond.true:
7901 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7902 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7903 // CHECK15:       cond.false:
7904 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7905 // CHECK15-NEXT:    br label [[COND_END]]
7906 // CHECK15:       cond.end:
7907 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7908 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7909 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7910 // CHECK15-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
7911 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7912 // CHECK15:       omp.inner.for.cond:
7913 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7914 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7915 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
7916 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
7917 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7918 // CHECK15:       omp.inner.for.body:
7919 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7920 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7921 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
7922 // CHECK15-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4
7923 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_CASTED]], align 4
7924 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
7925 // CHECK15-NEXT:    store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
7926 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
7927 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP21]])
7928 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7929 // CHECK15:       omp.inner.for.inc:
7930 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7931 // CHECK15-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7932 // CHECK15-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
7933 // CHECK15-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
7934 // CHECK15-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7935 // CHECK15-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7936 // CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
7937 // CHECK15-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4
7938 // CHECK15-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7939 // CHECK15-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7940 // CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
7941 // CHECK15-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4
7942 // CHECK15-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7943 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7944 // CHECK15-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]]
7945 // CHECK15-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
7946 // CHECK15:       cond.true11:
7947 // CHECK15-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7948 // CHECK15-NEXT:    br label [[COND_END13:%.*]]
7949 // CHECK15:       cond.false12:
7950 // CHECK15-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7951 // CHECK15-NEXT:    br label [[COND_END13]]
7952 // CHECK15:       cond.end13:
7953 // CHECK15-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ]
7954 // CHECK15-NEXT:    store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4
7955 // CHECK15-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7956 // CHECK15-NEXT:    store i32 [[TMP32]], ptr [[DOTOMP_IV]], align 4
7957 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
7958 // CHECK15:       omp.inner.for.end:
7959 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7960 // CHECK15:       omp.loop.exit:
7961 // CHECK15-NEXT:    [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7962 // CHECK15-NEXT:    [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4
7963 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP34]])
7964 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
7965 // CHECK15:       omp.precond.end:
7966 // CHECK15-NEXT:    ret void
7967 //
7968 //
7969 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined
7970 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
7971 // CHECK15-NEXT:  entry:
7972 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7973 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7974 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7975 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7976 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7977 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7978 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7979 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
7980 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7981 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7982 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7983 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7984 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7985 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7986 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7987 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7988 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7989 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
7990 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7991 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7992 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7993 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7994 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7995 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7996 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7997 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
7998 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7999 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8000 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
8001 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
8002 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8003 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8004 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8005 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8006 // CHECK15-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
8007 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
8008 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8009 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8010 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8011 // CHECK15:       omp.precond.then:
8012 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8013 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8014 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
8015 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8016 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8017 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4
8018 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
8019 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8020 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8021 // CHECK15-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8022 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
8023 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8024 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8025 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8026 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
8027 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8028 // CHECK15:       cond.true:
8029 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8030 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8031 // CHECK15:       cond.false:
8032 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8033 // CHECK15-NEXT:    br label [[COND_END]]
8034 // CHECK15:       cond.end:
8035 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
8036 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8037 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8038 // CHECK15-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
8039 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8040 // CHECK15:       omp.inner.for.cond:
8041 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8042 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8043 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
8044 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8045 // CHECK15:       omp.inner.for.body:
8046 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8047 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
8048 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8049 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
8050 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I4]], align 4
8051 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]]
8052 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
8053 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8054 // CHECK15:       omp.body.continue:
8055 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8056 // CHECK15:       omp.inner.for.inc:
8057 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8058 // CHECK15-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
8059 // CHECK15-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
8060 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8061 // CHECK15:       omp.inner.for.end:
8062 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8063 // CHECK15:       omp.loop.exit:
8064 // CHECK15-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8065 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
8066 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
8067 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
8068 // CHECK15:       omp.precond.end:
8069 // CHECK15-NEXT:    ret void
8070 //
8071 //
8072 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
8073 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8074 // CHECK15-NEXT:  entry:
8075 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
8076 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8077 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8078 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
8079 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
8080 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8081 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8082 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8083 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8084 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
8085 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
8086 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
8087 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]])
8088 // CHECK15-NEXT:    ret void
8089 //
8090 //
8091 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined
8092 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8093 // CHECK15-NEXT:  entry:
8094 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8095 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8096 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
8097 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8098 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8099 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8100 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8101 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8102 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8103 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8104 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8105 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8106 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8107 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8108 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
8109 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
8110 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8111 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8112 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
8113 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8114 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8115 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8116 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8117 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
8118 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
8119 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
8120 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8121 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8122 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8123 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
8124 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
8125 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
8126 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8127 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8128 // CHECK15:       omp.precond.then:
8129 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
8130 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8131 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
8132 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8133 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8134 // CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8135 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
8136 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8137 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8138 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8139 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
8140 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8141 // CHECK15:       cond.true:
8142 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8143 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8144 // CHECK15:       cond.false:
8145 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8146 // CHECK15-NEXT:    br label [[COND_END]]
8147 // CHECK15:       cond.end:
8148 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
8149 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
8150 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8151 // CHECK15-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
8152 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8153 // CHECK15:       omp.inner.for.cond:
8154 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8155 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8156 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8157 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8158 // CHECK15:       omp.inner.for.body:
8159 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8160 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8161 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4
8162 // CHECK15-NEXT:    store i32 [[TMP17]], ptr [[N_CASTED]], align 4
8163 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4
8164 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]])
8165 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8166 // CHECK15:       omp.inner.for.inc:
8167 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8168 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8169 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
8170 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
8171 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8172 // CHECK15:       omp.inner.for.end:
8173 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8174 // CHECK15:       omp.loop.exit:
8175 // CHECK15-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8176 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
8177 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
8178 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
8179 // CHECK15:       omp.precond.end:
8180 // CHECK15-NEXT:    ret void
8181 //
8182 //
8183 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined
8184 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8185 // CHECK15-NEXT:  entry:
8186 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8187 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8188 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8189 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8190 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
8191 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8192 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8193 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8194 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8195 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8196 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8197 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8198 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8199 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8200 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8201 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8202 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
8203 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8204 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8205 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8206 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8207 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
8208 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8209 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8210 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8211 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8212 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
8213 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
8214 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
8215 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8216 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8217 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8218 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
8219 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
8220 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
8221 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8222 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8223 // CHECK15:       omp.precond.then:
8224 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8225 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8226 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
8227 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8228 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8229 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4
8230 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
8231 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8232 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8233 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8234 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8235 // CHECK15-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8236 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
8237 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 35, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
8238 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
8239 // CHECK15:       omp.dispatch.cond:
8240 // CHECK15-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8241 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
8242 // CHECK15-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
8243 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
8244 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8245 // CHECK15:       omp.dispatch.body:
8246 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8247 // CHECK15-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
8248 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8249 // CHECK15:       omp.inner.for.cond:
8250 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]
8251 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]
8252 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8253 // CHECK15-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8254 // CHECK15:       omp.inner.for.body:
8255 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
8256 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8257 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8258 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]
8259 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]
8260 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP19]]
8261 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]
8262 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8263 // CHECK15:       omp.body.continue:
8264 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8265 // CHECK15:       omp.inner.for.inc:
8266 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
8267 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1
8268 // CHECK15-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
8269 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
8270 // CHECK15:       omp.inner.for.end:
8271 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
8272 // CHECK15:       omp.dispatch.inc:
8273 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
8274 // CHECK15:       omp.dispatch.end:
8275 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
8276 // CHECK15:       omp.precond.end:
8277 // CHECK15-NEXT:    ret void
8278 //
8279 //
8280 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
8281 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8282 // CHECK15-NEXT:  entry:
8283 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
8284 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8285 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8286 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8287 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
8288 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8289 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
8290 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8291 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8292 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
8293 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8294 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8295 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
8296 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
8297 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
8298 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
8299 // CHECK15-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
8300 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
8301 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]])
8302 // CHECK15-NEXT:    ret void
8303 //
8304 //
8305 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined
8306 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8307 // CHECK15-NEXT:  entry:
8308 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8309 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8310 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
8311 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8312 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8313 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8314 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8315 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8316 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8317 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8318 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8319 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8320 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8321 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8322 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8323 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
8324 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
8325 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8326 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8327 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8328 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
8329 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8330 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8331 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
8332 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8333 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8334 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
8335 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
8336 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8337 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8338 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8339 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8340 // CHECK15-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
8341 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
8342 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8343 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8344 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8345 // CHECK15:       omp.precond.then:
8346 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
8347 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8348 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
8349 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8350 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8351 // CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8352 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
8353 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8354 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8355 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8356 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
8357 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8358 // CHECK15:       cond.true:
8359 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8360 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8361 // CHECK15:       cond.false:
8362 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8363 // CHECK15-NEXT:    br label [[COND_END]]
8364 // CHECK15:       cond.end:
8365 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
8366 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
8367 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8368 // CHECK15-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
8369 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8370 // CHECK15:       omp.inner.for.cond:
8371 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8372 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8373 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
8374 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8375 // CHECK15:       omp.inner.for.body:
8376 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8377 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8378 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4
8379 // CHECK15-NEXT:    store i32 [[TMP17]], ptr [[N_CASTED]], align 4
8380 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4
8381 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
8382 // CHECK15-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
8383 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
8384 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP20]])
8385 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8386 // CHECK15:       omp.inner.for.inc:
8387 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8388 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8389 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
8390 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
8391 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8392 // CHECK15:       omp.inner.for.end:
8393 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8394 // CHECK15:       omp.loop.exit:
8395 // CHECK15-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8396 // CHECK15-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
8397 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
8398 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
8399 // CHECK15:       omp.precond.end:
8400 // CHECK15-NEXT:    ret void
8401 //
8402 //
8403 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined
8404 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
8405 // CHECK15-NEXT:  entry:
8406 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8407 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8408 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8409 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8410 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
8411 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8412 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8413 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8414 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8415 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8416 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8417 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8418 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8419 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8420 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8421 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8422 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8423 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
8424 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8425 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8426 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8427 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8428 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
8429 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8430 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8431 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
8432 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8433 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8434 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
8435 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
8436 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8437 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
8438 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8439 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8440 // CHECK15-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
8441 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
8442 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8443 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
8444 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8445 // CHECK15:       omp.precond.then:
8446 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8447 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8448 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
8449 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8450 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8451 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4
8452 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
8453 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8454 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8455 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
8456 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8457 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8458 // CHECK15-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8459 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
8460 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
8461 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
8462 // CHECK15:       omp.dispatch.cond:
8463 // CHECK15-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8464 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
8465 // CHECK15-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
8466 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
8467 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8468 // CHECK15:       omp.dispatch.body:
8469 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8470 // CHECK15-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
8471 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8472 // CHECK15:       omp.inner.for.cond:
8473 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
8474 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
8475 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
8476 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8477 // CHECK15:       omp.inner.for.body:
8478 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
8479 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
8480 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8481 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]
8482 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]
8483 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP20]]
8484 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]
8485 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8486 // CHECK15:       omp.body.continue:
8487 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8488 // CHECK15:       omp.inner.for.inc:
8489 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
8490 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
8491 // CHECK15-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
8492 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
8493 // CHECK15:       omp.inner.for.end:
8494 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
8495 // CHECK15:       omp.dispatch.inc:
8496 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
8497 // CHECK15:       omp.dispatch.end:
8498 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
8499 // CHECK15:       omp.precond.end:
8500 // CHECK15-NEXT:    ret void
8501 //
8502 //
8503 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8504 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
8505 // CHECK15-NEXT:  entry:
8506 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
8507 // CHECK15-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
8508 // CHECK15-NEXT:    [[M:%.*]] = alloca i32, align 4
8509 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
8510 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
8511 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
8512 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8513 // CHECK15-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
8514 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4
8515 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4
8516 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4
8517 // CHECK15-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
8518 // CHECK15-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8519 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8520 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8521 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 4
8522 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 4
8523 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 4
8524 // CHECK15-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
8525 // CHECK15-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8526 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 4
8527 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 4
8528 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 4
8529 // CHECK15-NEXT:    [[_TMP18:%.*]] = alloca i32, align 4
8530 // CHECK15-NEXT:    [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8531 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
8532 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i32, align 4
8533 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 4
8534 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 4
8535 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 4
8536 // CHECK15-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
8537 // CHECK15-NEXT:    [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8538 // CHECK15-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
8539 // CHECK15-NEXT:    store i32 10, ptr [[M]], align 4
8540 // CHECK15-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8541 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP0]], align 4
8542 // CHECK15-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8543 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
8544 // CHECK15-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
8545 // CHECK15-NEXT:    store ptr null, ptr [[TMP2]], align 4
8546 // CHECK15-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8547 // CHECK15-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8548 // CHECK15-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
8549 // CHECK15-NEXT:    store i32 2, ptr [[TMP5]], align 4
8550 // CHECK15-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
8551 // CHECK15-NEXT:    store i32 1, ptr [[TMP6]], align 4
8552 // CHECK15-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
8553 // CHECK15-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
8554 // CHECK15-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
8555 // CHECK15-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
8556 // CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
8557 // CHECK15-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP9]], align 4
8558 // CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
8559 // CHECK15-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP10]], align 4
8560 // CHECK15-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
8561 // CHECK15-NEXT:    store ptr null, ptr [[TMP11]], align 4
8562 // CHECK15-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
8563 // CHECK15-NEXT:    store ptr null, ptr [[TMP12]], align 4
8564 // CHECK15-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
8565 // CHECK15-NEXT:    store i64 10, ptr [[TMP13]], align 8
8566 // CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
8567 // CHECK15-NEXT:    store i64 0, ptr [[TMP14]], align 8
8568 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
8569 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
8570 // CHECK15-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
8571 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
8572 // CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
8573 // CHECK15-NEXT:    store i32 0, ptr [[TMP17]], align 4
8574 // CHECK15-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]])
8575 // CHECK15-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
8576 // CHECK15-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8577 // CHECK15:       omp_offload.failed:
8578 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]]
8579 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT]]
8580 // CHECK15:       omp_offload.cont:
8581 // CHECK15-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
8582 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP20]], align 4
8583 // CHECK15-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
8584 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP21]], align 4
8585 // CHECK15-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
8586 // CHECK15-NEXT:    store ptr null, ptr [[TMP22]], align 4
8587 // CHECK15-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
8588 // CHECK15-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
8589 // CHECK15-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
8590 // CHECK15-NEXT:    store i32 2, ptr [[TMP25]], align 4
8591 // CHECK15-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
8592 // CHECK15-NEXT:    store i32 1, ptr [[TMP26]], align 4
8593 // CHECK15-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
8594 // CHECK15-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
8595 // CHECK15-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
8596 // CHECK15-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
8597 // CHECK15-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
8598 // CHECK15-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP29]], align 4
8599 // CHECK15-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
8600 // CHECK15-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP30]], align 4
8601 // CHECK15-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
8602 // CHECK15-NEXT:    store ptr null, ptr [[TMP31]], align 4
8603 // CHECK15-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
8604 // CHECK15-NEXT:    store ptr null, ptr [[TMP32]], align 4
8605 // CHECK15-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
8606 // CHECK15-NEXT:    store i64 10, ptr [[TMP33]], align 8
8607 // CHECK15-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
8608 // CHECK15-NEXT:    store i64 0, ptr [[TMP34]], align 8
8609 // CHECK15-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
8610 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
8611 // CHECK15-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
8612 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
8613 // CHECK15-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
8614 // CHECK15-NEXT:    store i32 0, ptr [[TMP37]], align 4
8615 // CHECK15-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]])
8616 // CHECK15-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
8617 // CHECK15-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
8618 // CHECK15:       omp_offload.failed6:
8619 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]]
8620 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
8621 // CHECK15:       omp_offload.cont7:
8622 // CHECK15-NEXT:    [[TMP40:%.*]] = load i32, ptr [[M]], align 4
8623 // CHECK15-NEXT:    store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4
8624 // CHECK15-NEXT:    [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
8625 // CHECK15-NEXT:    store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
8626 // CHECK15-NEXT:    [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
8627 // CHECK15-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
8628 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP43]], align 4
8629 // CHECK15-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
8630 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP44]], align 4
8631 // CHECK15-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
8632 // CHECK15-NEXT:    store ptr null, ptr [[TMP45]], align 4
8633 // CHECK15-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
8634 // CHECK15-NEXT:    store i32 [[TMP42]], ptr [[TMP46]], align 4
8635 // CHECK15-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
8636 // CHECK15-NEXT:    store i32 [[TMP42]], ptr [[TMP47]], align 4
8637 // CHECK15-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
8638 // CHECK15-NEXT:    store ptr null, ptr [[TMP48]], align 4
8639 // CHECK15-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
8640 // CHECK15-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
8641 // CHECK15-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
8642 // CHECK15-NEXT:    store i32 2, ptr [[TMP51]], align 4
8643 // CHECK15-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
8644 // CHECK15-NEXT:    store i32 2, ptr [[TMP52]], align 4
8645 // CHECK15-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
8646 // CHECK15-NEXT:    store ptr [[TMP49]], ptr [[TMP53]], align 4
8647 // CHECK15-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
8648 // CHECK15-NEXT:    store ptr [[TMP50]], ptr [[TMP54]], align 4
8649 // CHECK15-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
8650 // CHECK15-NEXT:    store ptr @.offload_sizes.13, ptr [[TMP55]], align 4
8651 // CHECK15-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
8652 // CHECK15-NEXT:    store ptr @.offload_maptypes.14, ptr [[TMP56]], align 4
8653 // CHECK15-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
8654 // CHECK15-NEXT:    store ptr null, ptr [[TMP57]], align 4
8655 // CHECK15-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
8656 // CHECK15-NEXT:    store ptr null, ptr [[TMP58]], align 4
8657 // CHECK15-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
8658 // CHECK15-NEXT:    store i64 10, ptr [[TMP59]], align 8
8659 // CHECK15-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
8660 // CHECK15-NEXT:    store i64 0, ptr [[TMP60]], align 8
8661 // CHECK15-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
8662 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4
8663 // CHECK15-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
8664 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4
8665 // CHECK15-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
8666 // CHECK15-NEXT:    store i32 0, ptr [[TMP63]], align 4
8667 // CHECK15-NEXT:    [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]])
8668 // CHECK15-NEXT:    [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0
8669 // CHECK15-NEXT:    br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
8670 // CHECK15:       omp_offload.failed13:
8671 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i32 [[TMP42]]) #[[ATTR3]]
8672 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT14]]
8673 // CHECK15:       omp_offload.cont14:
8674 // CHECK15-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
8675 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP66]], align 4
8676 // CHECK15-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
8677 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP67]], align 4
8678 // CHECK15-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0
8679 // CHECK15-NEXT:    store ptr null, ptr [[TMP68]], align 4
8680 // CHECK15-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
8681 // CHECK15-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
8682 // CHECK15-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0
8683 // CHECK15-NEXT:    store i32 2, ptr [[TMP71]], align 4
8684 // CHECK15-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1
8685 // CHECK15-NEXT:    store i32 1, ptr [[TMP72]], align 4
8686 // CHECK15-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2
8687 // CHECK15-NEXT:    store ptr [[TMP69]], ptr [[TMP73]], align 4
8688 // CHECK15-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3
8689 // CHECK15-NEXT:    store ptr [[TMP70]], ptr [[TMP74]], align 4
8690 // CHECK15-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4
8691 // CHECK15-NEXT:    store ptr @.offload_sizes.15, ptr [[TMP75]], align 4
8692 // CHECK15-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5
8693 // CHECK15-NEXT:    store ptr @.offload_maptypes.16, ptr [[TMP76]], align 4
8694 // CHECK15-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6
8695 // CHECK15-NEXT:    store ptr null, ptr [[TMP77]], align 4
8696 // CHECK15-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7
8697 // CHECK15-NEXT:    store ptr null, ptr [[TMP78]], align 4
8698 // CHECK15-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8
8699 // CHECK15-NEXT:    store i64 10, ptr [[TMP79]], align 8
8700 // CHECK15-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9
8701 // CHECK15-NEXT:    store i64 0, ptr [[TMP80]], align 8
8702 // CHECK15-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10
8703 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4
8704 // CHECK15-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11
8705 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4
8706 // CHECK15-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12
8707 // CHECK15-NEXT:    store i32 0, ptr [[TMP83]], align 4
8708 // CHECK15-NEXT:    [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]])
8709 // CHECK15-NEXT:    [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0
8710 // CHECK15-NEXT:    br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
8711 // CHECK15:       omp_offload.failed20:
8712 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]]
8713 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT21]]
8714 // CHECK15:       omp_offload.cont21:
8715 // CHECK15-NEXT:    [[TMP86:%.*]] = load i32, ptr [[M]], align 4
8716 // CHECK15-NEXT:    store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4
8717 // CHECK15-NEXT:    [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4
8718 // CHECK15-NEXT:    store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4
8719 // CHECK15-NEXT:    [[TMP88:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4
8720 // CHECK15-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
8721 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP89]], align 4
8722 // CHECK15-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
8723 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP90]], align 4
8724 // CHECK15-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
8725 // CHECK15-NEXT:    store ptr null, ptr [[TMP91]], align 4
8726 // CHECK15-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
8727 // CHECK15-NEXT:    store i32 [[TMP88]], ptr [[TMP92]], align 4
8728 // CHECK15-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
8729 // CHECK15-NEXT:    store i32 [[TMP88]], ptr [[TMP93]], align 4
8730 // CHECK15-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1
8731 // CHECK15-NEXT:    store ptr null, ptr [[TMP94]], align 4
8732 // CHECK15-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
8733 // CHECK15-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
8734 // CHECK15-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0
8735 // CHECK15-NEXT:    store i32 2, ptr [[TMP97]], align 4
8736 // CHECK15-NEXT:    [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1
8737 // CHECK15-NEXT:    store i32 2, ptr [[TMP98]], align 4
8738 // CHECK15-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2
8739 // CHECK15-NEXT:    store ptr [[TMP95]], ptr [[TMP99]], align 4
8740 // CHECK15-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3
8741 // CHECK15-NEXT:    store ptr [[TMP96]], ptr [[TMP100]], align 4
8742 // CHECK15-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4
8743 // CHECK15-NEXT:    store ptr @.offload_sizes.17, ptr [[TMP101]], align 4
8744 // CHECK15-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5
8745 // CHECK15-NEXT:    store ptr @.offload_maptypes.18, ptr [[TMP102]], align 4
8746 // CHECK15-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6
8747 // CHECK15-NEXT:    store ptr null, ptr [[TMP103]], align 4
8748 // CHECK15-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7
8749 // CHECK15-NEXT:    store ptr null, ptr [[TMP104]], align 4
8750 // CHECK15-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8
8751 // CHECK15-NEXT:    store i64 10, ptr [[TMP105]], align 8
8752 // CHECK15-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9
8753 // CHECK15-NEXT:    store i64 0, ptr [[TMP106]], align 8
8754 // CHECK15-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10
8755 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4
8756 // CHECK15-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11
8757 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4
8758 // CHECK15-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12
8759 // CHECK15-NEXT:    store i32 0, ptr [[TMP109]], align 4
8760 // CHECK15-NEXT:    [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]])
8761 // CHECK15-NEXT:    [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0
8762 // CHECK15-NEXT:    br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
8763 // CHECK15:       omp_offload.failed29:
8764 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i32 [[TMP88]]) #[[ATTR3]]
8765 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
8766 // CHECK15:       omp_offload.cont30:
8767 // CHECK15-NEXT:    ret i32 0
8768 //
8769 //
8770 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
8771 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8772 // CHECK15-NEXT:  entry:
8773 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8774 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8775 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8776 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]])
8777 // CHECK15-NEXT:    ret void
8778 //
8779 //
8780 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined
8781 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8782 // CHECK15-NEXT:  entry:
8783 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8784 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8785 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8786 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8787 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8788 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8789 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8790 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8791 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8792 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8793 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8794 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8795 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8796 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8797 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
8798 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
8799 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8800 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8801 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8802 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
8803 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8804 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8805 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8806 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8807 // CHECK15:       cond.true:
8808 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8809 // CHECK15:       cond.false:
8810 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8811 // CHECK15-NEXT:    br label [[COND_END]]
8812 // CHECK15:       cond.end:
8813 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8814 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
8815 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8816 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
8817 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8818 // CHECK15:       omp.inner.for.cond:
8819 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8820 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8821 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8822 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8823 // CHECK15:       omp.inner.for.body:
8824 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8825 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8826 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
8827 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8828 // CHECK15:       omp.inner.for.inc:
8829 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8830 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8831 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
8832 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
8833 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8834 // CHECK15:       omp.inner.for.end:
8835 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8836 // CHECK15:       omp.loop.exit:
8837 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
8838 // CHECK15-NEXT:    ret void
8839 //
8840 //
8841 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined
8842 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8843 // CHECK15-NEXT:  entry:
8844 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8845 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8846 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8847 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8848 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8849 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8850 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8851 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8852 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8853 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8854 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8855 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8856 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8857 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8858 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8859 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8860 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8861 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8862 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8863 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
8864 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8865 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8866 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
8867 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
8868 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8869 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8870 // CHECK15-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8871 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
8872 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8873 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8874 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
8875 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8876 // CHECK15:       cond.true:
8877 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8878 // CHECK15:       cond.false:
8879 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8880 // CHECK15-NEXT:    br label [[COND_END]]
8881 // CHECK15:       cond.end:
8882 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
8883 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8884 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8885 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
8886 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8887 // CHECK15:       omp.inner.for.cond:
8888 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8889 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8890 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
8891 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8892 // CHECK15:       omp.inner.for.body:
8893 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8894 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
8895 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8896 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
8897 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
8898 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]
8899 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
8900 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8901 // CHECK15:       omp.body.continue:
8902 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8903 // CHECK15:       omp.inner.for.inc:
8904 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8905 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
8906 // CHECK15-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
8907 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8908 // CHECK15:       omp.inner.for.end:
8909 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8910 // CHECK15:       omp.loop.exit:
8911 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
8912 // CHECK15-NEXT:    ret void
8913 //
8914 //
8915 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
8916 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8917 // CHECK15-NEXT:  entry:
8918 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8919 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8920 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8921 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])
8922 // CHECK15-NEXT:    ret void
8923 //
8924 //
8925 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined
8926 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8927 // CHECK15-NEXT:  entry:
8928 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8929 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8930 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8931 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8932 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8933 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8934 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8935 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8936 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8937 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8938 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8939 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8940 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8941 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8942 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
8943 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
8944 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8945 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8946 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8947 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
8948 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8949 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8950 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8951 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8952 // CHECK15:       cond.true:
8953 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8954 // CHECK15:       cond.false:
8955 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8956 // CHECK15-NEXT:    br label [[COND_END]]
8957 // CHECK15:       cond.end:
8958 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8959 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
8960 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8961 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
8962 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8963 // CHECK15:       omp.inner.for.cond:
8964 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8965 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8966 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8967 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8968 // CHECK15:       omp.inner.for.body:
8969 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8970 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8971 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
8972 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8973 // CHECK15:       omp.inner.for.inc:
8974 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8975 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8976 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
8977 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
8978 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8979 // CHECK15:       omp.inner.for.end:
8980 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8981 // CHECK15:       omp.loop.exit:
8982 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
8983 // CHECK15-NEXT:    ret void
8984 //
8985 //
8986 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined
8987 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8988 // CHECK15-NEXT:  entry:
8989 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8990 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8991 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8992 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8993 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8994 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8995 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8996 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8997 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8998 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8999 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9000 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9001 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9002 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9003 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9004 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9005 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9006 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9007 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
9008 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
9009 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9010 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9011 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
9012 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
9013 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9014 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9015 // CHECK15-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9016 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
9017 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9018 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9019 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
9020 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9021 // CHECK15:       cond.true:
9022 // CHECK15-NEXT:    br label [[COND_END:%.*]]
9023 // CHECK15:       cond.false:
9024 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9025 // CHECK15-NEXT:    br label [[COND_END]]
9026 // CHECK15:       cond.end:
9027 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
9028 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
9029 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9030 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
9031 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9032 // CHECK15:       omp.inner.for.cond:
9033 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9034 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9035 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
9036 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9037 // CHECK15:       omp.inner.for.body:
9038 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9039 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
9040 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9041 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
9042 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
9043 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]
9044 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
9045 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9046 // CHECK15:       omp.body.continue:
9047 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9048 // CHECK15:       omp.inner.for.inc:
9049 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9050 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
9051 // CHECK15-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
9052 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
9053 // CHECK15:       omp.inner.for.end:
9054 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9055 // CHECK15:       omp.loop.exit:
9056 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
9057 // CHECK15-NEXT:    ret void
9058 //
9059 //
9060 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
9061 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9062 // CHECK15-NEXT:  entry:
9063 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9064 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9065 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9066 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9067 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9068 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9069 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9070 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9071 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9072 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i32 [[TMP2]])
9073 // CHECK15-NEXT:    ret void
9074 //
9075 //
9076 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined
9077 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9078 // CHECK15-NEXT:  entry:
9079 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9080 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9081 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9082 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9083 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9084 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9085 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9086 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9087 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9088 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9089 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9090 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9091 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9092 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9093 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9094 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9095 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9096 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
9097 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
9098 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9099 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9100 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9101 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
9102 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9103 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9104 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9105 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9106 // CHECK15:       cond.true:
9107 // CHECK15-NEXT:    br label [[COND_END:%.*]]
9108 // CHECK15:       cond.false:
9109 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9110 // CHECK15-NEXT:    br label [[COND_END]]
9111 // CHECK15:       cond.end:
9112 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9113 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
9114 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9115 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
9116 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9117 // CHECK15:       omp.inner.for.cond:
9118 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9119 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9120 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9121 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9122 // CHECK15:       omp.inner.for.body:
9123 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9124 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9125 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9126 // CHECK15-NEXT:    store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9127 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9128 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]])
9129 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9130 // CHECK15:       omp.inner.for.inc:
9131 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9132 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9133 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9134 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
9135 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
9136 // CHECK15:       omp.inner.for.end:
9137 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9138 // CHECK15:       omp.loop.exit:
9139 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
9140 // CHECK15-NEXT:    ret void
9141 //
9142 //
9143 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined
9144 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9145 // CHECK15-NEXT:  entry:
9146 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9147 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9148 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9149 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9150 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9151 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9152 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9153 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9154 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9155 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9156 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9157 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9158 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9159 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9160 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9161 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9162 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9163 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9164 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9165 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9166 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
9167 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
9168 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9169 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9170 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
9171 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
9172 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9173 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9174 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9175 // CHECK15-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9176 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
9177 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
9178 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9179 // CHECK15:       omp.dispatch.cond:
9180 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9181 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9182 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
9183 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9184 // CHECK15:       cond.true:
9185 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9186 // CHECK15-NEXT:    br label [[COND_END:%.*]]
9187 // CHECK15:       cond.false:
9188 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9189 // CHECK15-NEXT:    br label [[COND_END]]
9190 // CHECK15:       cond.end:
9191 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
9192 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
9193 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9194 // CHECK15-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
9195 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9196 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9197 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
9198 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9199 // CHECK15:       omp.dispatch.body:
9200 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9201 // CHECK15:       omp.inner.for.cond:
9202 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9203 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9204 // CHECK15-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
9205 // CHECK15-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9206 // CHECK15:       omp.inner.for.body:
9207 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9208 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
9209 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9210 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
9211 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
9212 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]]
9213 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
9214 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9215 // CHECK15:       omp.body.continue:
9216 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9217 // CHECK15:       omp.inner.for.inc:
9218 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9219 // CHECK15-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
9220 // CHECK15-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
9221 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
9222 // CHECK15:       omp.inner.for.end:
9223 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9224 // CHECK15:       omp.dispatch.inc:
9225 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9226 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9227 // CHECK15-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
9228 // CHECK15-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
9229 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9230 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9231 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9232 // CHECK15-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
9233 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
9234 // CHECK15:       omp.dispatch.end:
9235 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
9236 // CHECK15-NEXT:    ret void
9237 //
9238 //
9239 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
9240 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9241 // CHECK15-NEXT:  entry:
9242 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9243 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9244 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9245 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]])
9246 // CHECK15-NEXT:    ret void
9247 //
9248 //
9249 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined
9250 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9251 // CHECK15-NEXT:  entry:
9252 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9253 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9254 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9255 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9256 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9257 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9258 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9259 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9260 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9261 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9262 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9263 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9264 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9265 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9266 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
9267 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
9268 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9269 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9270 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9271 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
9272 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9273 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9274 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9275 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9276 // CHECK15:       cond.true:
9277 // CHECK15-NEXT:    br label [[COND_END:%.*]]
9278 // CHECK15:       cond.false:
9279 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9280 // CHECK15-NEXT:    br label [[COND_END]]
9281 // CHECK15:       cond.end:
9282 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9283 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
9284 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9285 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
9286 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9287 // CHECK15:       omp.inner.for.cond:
9288 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9289 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9290 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9291 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9292 // CHECK15:       omp.inner.for.body:
9293 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9294 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9295 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
9296 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9297 // CHECK15:       omp.inner.for.inc:
9298 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9299 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9300 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
9301 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
9302 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
9303 // CHECK15:       omp.inner.for.end:
9304 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9305 // CHECK15:       omp.loop.exit:
9306 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
9307 // CHECK15-NEXT:    ret void
9308 //
9309 //
9310 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined
9311 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9312 // CHECK15-NEXT:  entry:
9313 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9314 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9315 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9316 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9317 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9318 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9319 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9320 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9321 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9322 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9323 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9324 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9325 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9326 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9327 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9328 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9329 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9330 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9331 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
9332 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
9333 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9334 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9335 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
9336 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
9337 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9338 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9339 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9340 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9341 // CHECK15-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9342 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
9343 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
9344 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9345 // CHECK15:       omp.dispatch.cond:
9346 // CHECK15-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
9347 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
9348 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9349 // CHECK15:       omp.dispatch.body:
9350 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9351 // CHECK15-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
9352 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9353 // CHECK15:       omp.inner.for.cond:
9354 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
9355 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]
9356 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
9357 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9358 // CHECK15:       omp.inner.for.body:
9359 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
9360 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
9361 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9362 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
9363 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
9364 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP12]]
9365 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]
9366 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9367 // CHECK15:       omp.body.continue:
9368 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9369 // CHECK15:       omp.inner.for.inc:
9370 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
9371 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
9372 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
9373 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
9374 // CHECK15:       omp.inner.for.end:
9375 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9376 // CHECK15:       omp.dispatch.inc:
9377 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
9378 // CHECK15:       omp.dispatch.end:
9379 // CHECK15-NEXT:    ret void
9380 //
9381 //
9382 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
9383 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9384 // CHECK15-NEXT:  entry:
9385 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9386 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9387 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9388 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9389 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9390 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9391 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9392 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9393 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9394 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i32 [[TMP2]])
9395 // CHECK15-NEXT:    ret void
9396 //
9397 //
9398 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined
9399 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9400 // CHECK15-NEXT:  entry:
9401 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9402 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9403 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9404 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9405 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9406 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9407 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9408 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9409 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9410 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9411 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9412 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9413 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9414 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9415 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9416 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9417 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9418 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
9419 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
9420 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9421 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9422 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9423 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
9424 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9425 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9426 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9427 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9428 // CHECK15:       cond.true:
9429 // CHECK15-NEXT:    br label [[COND_END:%.*]]
9430 // CHECK15:       cond.false:
9431 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9432 // CHECK15-NEXT:    br label [[COND_END]]
9433 // CHECK15:       cond.end:
9434 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9435 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
9436 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9437 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
9438 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9439 // CHECK15:       omp.inner.for.cond:
9440 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9441 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9442 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9443 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9444 // CHECK15:       omp.inner.for.body:
9445 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9446 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9447 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9448 // CHECK15-NEXT:    store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9449 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9450 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]])
9451 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9452 // CHECK15:       omp.inner.for.inc:
9453 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9454 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9455 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9456 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
9457 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
9458 // CHECK15:       omp.inner.for.end:
9459 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9460 // CHECK15:       omp.loop.exit:
9461 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
9462 // CHECK15-NEXT:    ret void
9463 //
9464 //
9465 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined
9466 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
9467 // CHECK15-NEXT:  entry:
9468 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9469 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9470 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9471 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9472 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9473 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9474 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9475 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9476 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9477 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9478 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9479 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9480 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9481 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9482 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9483 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9484 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9485 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9486 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9487 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9488 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
9489 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
9490 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9491 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9492 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
9493 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
9494 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9495 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9496 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9497 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9498 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9499 // CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9500 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
9501 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
9502 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9503 // CHECK15:       omp.dispatch.cond:
9504 // CHECK15-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
9505 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
9506 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9507 // CHECK15:       omp.dispatch.body:
9508 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9509 // CHECK15-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
9510 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9511 // CHECK15:       omp.inner.for.cond:
9512 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]
9513 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]]
9514 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
9515 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9516 // CHECK15:       omp.inner.for.body:
9517 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
9518 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
9519 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9520 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]
9521 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]
9522 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]]
9523 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]]
9524 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9525 // CHECK15:       omp.body.continue:
9526 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9527 // CHECK15:       omp.inner.for.inc:
9528 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
9529 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
9530 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
9531 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
9532 // CHECK15:       omp.inner.for.end:
9533 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9534 // CHECK15:       omp.dispatch.inc:
9535 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
9536 // CHECK15:       omp.dispatch.end:
9537 // CHECK15-NEXT:    ret void
9538 //
9539 //
9540 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
9541 // CHECK15-SAME: () #[[ATTR6:[0-9]+]] {
9542 // CHECK15-NEXT:  entry:
9543 // CHECK15-NEXT:    call void @__tgt_register_requires(i64 1)
9544 // CHECK15-NEXT:    ret void
9545 //
9546 //
9547 // CHECK17-LABEL: define {{[^@]+}}@main
9548 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9549 // CHECK17-NEXT:  entry:
9550 // CHECK17-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
9551 // CHECK17-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
9552 // CHECK17-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8
9553 // CHECK17-NEXT:    [[N:%.*]] = alloca i32, align 4
9554 // CHECK17-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
9555 // CHECK17-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
9556 // CHECK17-NEXT:    [[M:%.*]] = alloca i32, align 4
9557 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
9558 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8
9559 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8
9560 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8
9561 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
9562 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9563 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9564 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9565 // CHECK17-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
9566 // CHECK17-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
9567 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8
9568 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8
9569 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8
9570 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8
9571 // CHECK17-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
9572 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
9573 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
9574 // CHECK17-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9575 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
9576 // CHECK17-NEXT:    [[N_CASTED19:%.*]] = alloca i64, align 8
9577 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
9578 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 8
9579 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 8
9580 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 8
9581 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 8
9582 // CHECK17-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
9583 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
9584 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
9585 // CHECK17-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9586 // CHECK17-NEXT:    [[N_CASTED34:%.*]] = alloca i64, align 8
9587 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 8
9588 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 8
9589 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 8
9590 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 8
9591 // CHECK17-NEXT:    [[_TMP39:%.*]] = alloca i32, align 4
9592 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
9593 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
9594 // CHECK17-NEXT:    [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9595 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4
9596 // CHECK17-NEXT:    [[N_CASTED50:%.*]] = alloca i64, align 8
9597 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i64, align 8
9598 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 8
9599 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 8
9600 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 8
9601 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 8
9602 // CHECK17-NEXT:    [[_TMP56:%.*]] = alloca i32, align 4
9603 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4
9604 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
9605 // CHECK17-NEXT:    [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9606 // CHECK17-NEXT:    store i32 0, ptr [[RETVAL]], align 4
9607 // CHECK17-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
9608 // CHECK17-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
9609 // CHECK17-NEXT:    store i32 100, ptr [[N]], align 4
9610 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
9611 // CHECK17-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
9612 // CHECK17-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
9613 // CHECK17-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
9614 // CHECK17-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
9615 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
9616 // CHECK17-NEXT:    store i32 10, ptr [[M]], align 4
9617 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
9618 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 4
9619 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
9620 // CHECK17-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
9621 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false)
9622 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9623 // CHECK17-NEXT:    store i64 [[TMP4]], ptr [[TMP6]], align 8
9624 // CHECK17-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9625 // CHECK17-NEXT:    store i64 [[TMP4]], ptr [[TMP7]], align 8
9626 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9627 // CHECK17-NEXT:    store ptr null, ptr [[TMP8]], align 8
9628 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
9629 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP9]], align 8
9630 // CHECK17-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
9631 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP10]], align 8
9632 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
9633 // CHECK17-NEXT:    store ptr null, ptr [[TMP11]], align 8
9634 // CHECK17-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
9635 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 8
9636 // CHECK17-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
9637 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 8
9638 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
9639 // CHECK17-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 8
9640 // CHECK17-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
9641 // CHECK17-NEXT:    store ptr null, ptr [[TMP15]], align 8
9642 // CHECK17-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9643 // CHECK17-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9644 // CHECK17-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
9645 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 4
9646 // CHECK17-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
9647 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
9648 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
9649 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9650 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9651 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
9652 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
9653 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
9654 // CHECK17-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i64
9655 // CHECK17-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
9656 // CHECK17-NEXT:    store i32 2, ptr [[TMP23]], align 4
9657 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
9658 // CHECK17-NEXT:    store i32 3, ptr [[TMP24]], align 4
9659 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
9660 // CHECK17-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 8
9661 // CHECK17-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
9662 // CHECK17-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 8
9663 // CHECK17-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
9664 // CHECK17-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 8
9665 // CHECK17-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
9666 // CHECK17-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 8
9667 // CHECK17-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
9668 // CHECK17-NEXT:    store ptr null, ptr [[TMP29]], align 8
9669 // CHECK17-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
9670 // CHECK17-NEXT:    store ptr null, ptr [[TMP30]], align 8
9671 // CHECK17-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
9672 // CHECK17-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 8
9673 // CHECK17-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
9674 // CHECK17-NEXT:    store i64 0, ptr [[TMP32]], align 8
9675 // CHECK17-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
9676 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
9677 // CHECK17-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
9678 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
9679 // CHECK17-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
9680 // CHECK17-NEXT:    store i32 0, ptr [[TMP35]], align 4
9681 // CHECK17-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]])
9682 // CHECK17-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
9683 // CHECK17-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9684 // CHECK17:       omp_offload.failed:
9685 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]
9686 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
9687 // CHECK17:       omp_offload.cont:
9688 // CHECK17-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 4
9689 // CHECK17-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
9690 // CHECK17-NEXT:    [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8
9691 // CHECK17-NEXT:    [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4
9692 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false)
9693 // CHECK17-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
9694 // CHECK17-NEXT:    store i64 [[TMP39]], ptr [[TMP41]], align 8
9695 // CHECK17-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
9696 // CHECK17-NEXT:    store i64 [[TMP39]], ptr [[TMP42]], align 8
9697 // CHECK17-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
9698 // CHECK17-NEXT:    store ptr null, ptr [[TMP43]], align 8
9699 // CHECK17-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
9700 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP44]], align 8
9701 // CHECK17-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
9702 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP45]], align 8
9703 // CHECK17-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
9704 // CHECK17-NEXT:    store ptr null, ptr [[TMP46]], align 8
9705 // CHECK17-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
9706 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP47]], align 8
9707 // CHECK17-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
9708 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 8
9709 // CHECK17-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
9710 // CHECK17-NEXT:    store i64 [[TMP40]], ptr [[TMP49]], align 8
9711 // CHECK17-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2
9712 // CHECK17-NEXT:    store ptr null, ptr [[TMP50]], align 8
9713 // CHECK17-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
9714 // CHECK17-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
9715 // CHECK17-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
9716 // CHECK17-NEXT:    [[TMP54:%.*]] = load i32, ptr [[N]], align 4
9717 // CHECK17-NEXT:    store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4
9718 // CHECK17-NEXT:    [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
9719 // CHECK17-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0
9720 // CHECK17-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
9721 // CHECK17-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
9722 // CHECK17-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
9723 // CHECK17-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
9724 // CHECK17-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1
9725 // CHECK17-NEXT:    [[TMP57:%.*]] = zext i32 [[ADD14]] to i64
9726 // CHECK17-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
9727 // CHECK17-NEXT:    store i32 2, ptr [[TMP58]], align 4
9728 // CHECK17-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
9729 // CHECK17-NEXT:    store i32 3, ptr [[TMP59]], align 4
9730 // CHECK17-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
9731 // CHECK17-NEXT:    store ptr [[TMP51]], ptr [[TMP60]], align 8
9732 // CHECK17-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
9733 // CHECK17-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 8
9734 // CHECK17-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
9735 // CHECK17-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 8
9736 // CHECK17-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
9737 // CHECK17-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8
9738 // CHECK17-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
9739 // CHECK17-NEXT:    store ptr null, ptr [[TMP64]], align 8
9740 // CHECK17-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
9741 // CHECK17-NEXT:    store ptr null, ptr [[TMP65]], align 8
9742 // CHECK17-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
9743 // CHECK17-NEXT:    store i64 [[TMP57]], ptr [[TMP66]], align 8
9744 // CHECK17-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
9745 // CHECK17-NEXT:    store i64 0, ptr [[TMP67]], align 8
9746 // CHECK17-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
9747 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4
9748 // CHECK17-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
9749 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
9750 // CHECK17-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
9751 // CHECK17-NEXT:    store i32 0, ptr [[TMP70]], align 4
9752 // CHECK17-NEXT:    [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]])
9753 // CHECK17-NEXT:    [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0
9754 // CHECK17-NEXT:    br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
9755 // CHECK17:       omp_offload.failed16:
9756 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]
9757 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
9758 // CHECK17:       omp_offload.cont17:
9759 // CHECK17-NEXT:    [[TMP73:%.*]] = load i32, ptr [[M]], align 4
9760 // CHECK17-NEXT:    store i32 [[TMP73]], ptr [[DOTCAPTURE_EXPR_18]], align 4
9761 // CHECK17-NEXT:    [[TMP74:%.*]] = load i32, ptr [[N]], align 4
9762 // CHECK17-NEXT:    store i32 [[TMP74]], ptr [[N_CASTED19]], align 4
9763 // CHECK17-NEXT:    [[TMP75:%.*]] = load i64, ptr [[N_CASTED19]], align 8
9764 // CHECK17-NEXT:    [[TMP76:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4
9765 // CHECK17-NEXT:    store i32 [[TMP76]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9766 // CHECK17-NEXT:    [[TMP77:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
9767 // CHECK17-NEXT:    [[TMP78:%.*]] = mul nuw i64 [[TMP1]], 4
9768 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES23]], ptr align 8 @.offload_sizes.3, i64 32, i1 false)
9769 // CHECK17-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
9770 // CHECK17-NEXT:    store i64 [[TMP75]], ptr [[TMP79]], align 8
9771 // CHECK17-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
9772 // CHECK17-NEXT:    store i64 [[TMP75]], ptr [[TMP80]], align 8
9773 // CHECK17-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 0
9774 // CHECK17-NEXT:    store ptr null, ptr [[TMP81]], align 8
9775 // CHECK17-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
9776 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP82]], align 8
9777 // CHECK17-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
9778 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP83]], align 8
9779 // CHECK17-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 1
9780 // CHECK17-NEXT:    store ptr null, ptr [[TMP84]], align 8
9781 // CHECK17-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
9782 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP85]], align 8
9783 // CHECK17-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
9784 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP86]], align 8
9785 // CHECK17-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
9786 // CHECK17-NEXT:    store i64 [[TMP78]], ptr [[TMP87]], align 8
9787 // CHECK17-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 2
9788 // CHECK17-NEXT:    store ptr null, ptr [[TMP88]], align 8
9789 // CHECK17-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
9790 // CHECK17-NEXT:    store i64 [[TMP77]], ptr [[TMP89]], align 8
9791 // CHECK17-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
9792 // CHECK17-NEXT:    store i64 [[TMP77]], ptr [[TMP90]], align 8
9793 // CHECK17-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i64 0, i64 3
9794 // CHECK17-NEXT:    store ptr null, ptr [[TMP91]], align 8
9795 // CHECK17-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
9796 // CHECK17-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
9797 // CHECK17-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
9798 // CHECK17-NEXT:    [[TMP95:%.*]] = load i32, ptr [[N]], align 4
9799 // CHECK17-NEXT:    store i32 [[TMP95]], ptr [[DOTCAPTURE_EXPR_25]], align 4
9800 // CHECK17-NEXT:    [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
9801 // CHECK17-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP96]], 0
9802 // CHECK17-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
9803 // CHECK17-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
9804 // CHECK17-NEXT:    store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4
9805 // CHECK17-NEXT:    [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4
9806 // CHECK17-NEXT:    [[ADD30:%.*]] = add nsw i32 [[TMP97]], 1
9807 // CHECK17-NEXT:    [[TMP98:%.*]] = zext i32 [[ADD30]] to i64
9808 // CHECK17-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
9809 // CHECK17-NEXT:    store i32 2, ptr [[TMP99]], align 4
9810 // CHECK17-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
9811 // CHECK17-NEXT:    store i32 4, ptr [[TMP100]], align 4
9812 // CHECK17-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
9813 // CHECK17-NEXT:    store ptr [[TMP92]], ptr [[TMP101]], align 8
9814 // CHECK17-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
9815 // CHECK17-NEXT:    store ptr [[TMP93]], ptr [[TMP102]], align 8
9816 // CHECK17-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
9817 // CHECK17-NEXT:    store ptr [[TMP94]], ptr [[TMP103]], align 8
9818 // CHECK17-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
9819 // CHECK17-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP104]], align 8
9820 // CHECK17-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
9821 // CHECK17-NEXT:    store ptr null, ptr [[TMP105]], align 8
9822 // CHECK17-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
9823 // CHECK17-NEXT:    store ptr null, ptr [[TMP106]], align 8
9824 // CHECK17-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
9825 // CHECK17-NEXT:    store i64 [[TMP98]], ptr [[TMP107]], align 8
9826 // CHECK17-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
9827 // CHECK17-NEXT:    store i64 0, ptr [[TMP108]], align 8
9828 // CHECK17-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
9829 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4
9830 // CHECK17-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
9831 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP110]], align 4
9832 // CHECK17-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
9833 // CHECK17-NEXT:    store i32 0, ptr [[TMP111]], align 4
9834 // CHECK17-NEXT:    [[TMP112:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]])
9835 // CHECK17-NEXT:    [[TMP113:%.*]] = icmp ne i32 [[TMP112]], 0
9836 // CHECK17-NEXT:    br i1 [[TMP113]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
9837 // CHECK17:       omp_offload.failed32:
9838 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i64 [[TMP75]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP77]]) #[[ATTR3]]
9839 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
9840 // CHECK17:       omp_offload.cont33:
9841 // CHECK17-NEXT:    [[TMP114:%.*]] = load i32, ptr [[N]], align 4
9842 // CHECK17-NEXT:    store i32 [[TMP114]], ptr [[N_CASTED34]], align 4
9843 // CHECK17-NEXT:    [[TMP115:%.*]] = load i64, ptr [[N_CASTED34]], align 8
9844 // CHECK17-NEXT:    [[TMP116:%.*]] = mul nuw i64 [[TMP1]], 4
9845 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES38]], ptr align 8 @.offload_sizes.5, i64 24, i1 false)
9846 // CHECK17-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
9847 // CHECK17-NEXT:    store i64 [[TMP115]], ptr [[TMP117]], align 8
9848 // CHECK17-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
9849 // CHECK17-NEXT:    store i64 [[TMP115]], ptr [[TMP118]], align 8
9850 // CHECK17-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 0
9851 // CHECK17-NEXT:    store ptr null, ptr [[TMP119]], align 8
9852 // CHECK17-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1
9853 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP120]], align 8
9854 // CHECK17-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1
9855 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP121]], align 8
9856 // CHECK17-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 1
9857 // CHECK17-NEXT:    store ptr null, ptr [[TMP122]], align 8
9858 // CHECK17-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2
9859 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP123]], align 8
9860 // CHECK17-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2
9861 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP124]], align 8
9862 // CHECK17-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2
9863 // CHECK17-NEXT:    store i64 [[TMP116]], ptr [[TMP125]], align 8
9864 // CHECK17-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i64 0, i64 2
9865 // CHECK17-NEXT:    store ptr null, ptr [[TMP126]], align 8
9866 // CHECK17-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
9867 // CHECK17-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
9868 // CHECK17-NEXT:    [[TMP129:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0
9869 // CHECK17-NEXT:    [[TMP130:%.*]] = load i32, ptr [[N]], align 4
9870 // CHECK17-NEXT:    store i32 [[TMP130]], ptr [[DOTCAPTURE_EXPR_40]], align 4
9871 // CHECK17-NEXT:    [[TMP131:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
9872 // CHECK17-NEXT:    [[SUB42:%.*]] = sub nsw i32 [[TMP131]], 0
9873 // CHECK17-NEXT:    [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
9874 // CHECK17-NEXT:    [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
9875 // CHECK17-NEXT:    store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4
9876 // CHECK17-NEXT:    [[TMP132:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4
9877 // CHECK17-NEXT:    [[ADD45:%.*]] = add nsw i32 [[TMP132]], 1
9878 // CHECK17-NEXT:    [[TMP133:%.*]] = zext i32 [[ADD45]] to i64
9879 // CHECK17-NEXT:    [[TMP134:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0
9880 // CHECK17-NEXT:    store i32 2, ptr [[TMP134]], align 4
9881 // CHECK17-NEXT:    [[TMP135:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1
9882 // CHECK17-NEXT:    store i32 3, ptr [[TMP135]], align 4
9883 // CHECK17-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2
9884 // CHECK17-NEXT:    store ptr [[TMP127]], ptr [[TMP136]], align 8
9885 // CHECK17-NEXT:    [[TMP137:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3
9886 // CHECK17-NEXT:    store ptr [[TMP128]], ptr [[TMP137]], align 8
9887 // CHECK17-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4
9888 // CHECK17-NEXT:    store ptr [[TMP129]], ptr [[TMP138]], align 8
9889 // CHECK17-NEXT:    [[TMP139:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5
9890 // CHECK17-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP139]], align 8
9891 // CHECK17-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6
9892 // CHECK17-NEXT:    store ptr null, ptr [[TMP140]], align 8
9893 // CHECK17-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7
9894 // CHECK17-NEXT:    store ptr null, ptr [[TMP141]], align 8
9895 // CHECK17-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8
9896 // CHECK17-NEXT:    store i64 [[TMP133]], ptr [[TMP142]], align 8
9897 // CHECK17-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9
9898 // CHECK17-NEXT:    store i64 0, ptr [[TMP143]], align 8
9899 // CHECK17-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10
9900 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP144]], align 4
9901 // CHECK17-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11
9902 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP145]], align 4
9903 // CHECK17-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12
9904 // CHECK17-NEXT:    store i32 0, ptr [[TMP146]], align 4
9905 // CHECK17-NEXT:    [[TMP147:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]])
9906 // CHECK17-NEXT:    [[TMP148:%.*]] = icmp ne i32 [[TMP147]], 0
9907 // CHECK17-NEXT:    br i1 [[TMP148]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
9908 // CHECK17:       omp_offload.failed47:
9909 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i64 [[TMP115]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR3]]
9910 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
9911 // CHECK17:       omp_offload.cont48:
9912 // CHECK17-NEXT:    [[TMP149:%.*]] = load i32, ptr [[M]], align 4
9913 // CHECK17-NEXT:    store i32 [[TMP149]], ptr [[DOTCAPTURE_EXPR_49]], align 4
9914 // CHECK17-NEXT:    [[TMP150:%.*]] = load i32, ptr [[N]], align 4
9915 // CHECK17-NEXT:    store i32 [[TMP150]], ptr [[N_CASTED50]], align 4
9916 // CHECK17-NEXT:    [[TMP151:%.*]] = load i64, ptr [[N_CASTED50]], align 8
9917 // CHECK17-NEXT:    [[TMP152:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4
9918 // CHECK17-NEXT:    store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4
9919 // CHECK17-NEXT:    [[TMP153:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 8
9920 // CHECK17-NEXT:    [[TMP154:%.*]] = mul nuw i64 [[TMP1]], 4
9921 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES55]], ptr align 8 @.offload_sizes.7, i64 32, i1 false)
9922 // CHECK17-NEXT:    [[TMP155:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
9923 // CHECK17-NEXT:    store i64 [[TMP151]], ptr [[TMP155]], align 8
9924 // CHECK17-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
9925 // CHECK17-NEXT:    store i64 [[TMP151]], ptr [[TMP156]], align 8
9926 // CHECK17-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 0
9927 // CHECK17-NEXT:    store ptr null, ptr [[TMP157]], align 8
9928 // CHECK17-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1
9929 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP158]], align 8
9930 // CHECK17-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1
9931 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP159]], align 8
9932 // CHECK17-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 1
9933 // CHECK17-NEXT:    store ptr null, ptr [[TMP160]], align 8
9934 // CHECK17-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2
9935 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP161]], align 8
9936 // CHECK17-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2
9937 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP162]], align 8
9938 // CHECK17-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2
9939 // CHECK17-NEXT:    store i64 [[TMP154]], ptr [[TMP163]], align 8
9940 // CHECK17-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 2
9941 // CHECK17-NEXT:    store ptr null, ptr [[TMP164]], align 8
9942 // CHECK17-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3
9943 // CHECK17-NEXT:    store i64 [[TMP153]], ptr [[TMP165]], align 8
9944 // CHECK17-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3
9945 // CHECK17-NEXT:    store i64 [[TMP153]], ptr [[TMP166]], align 8
9946 // CHECK17-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i64 0, i64 3
9947 // CHECK17-NEXT:    store ptr null, ptr [[TMP167]], align 8
9948 // CHECK17-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
9949 // CHECK17-NEXT:    [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
9950 // CHECK17-NEXT:    [[TMP170:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0
9951 // CHECK17-NEXT:    [[TMP171:%.*]] = load i32, ptr [[N]], align 4
9952 // CHECK17-NEXT:    store i32 [[TMP171]], ptr [[DOTCAPTURE_EXPR_57]], align 4
9953 // CHECK17-NEXT:    [[TMP172:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4
9954 // CHECK17-NEXT:    [[SUB59:%.*]] = sub nsw i32 [[TMP172]], 0
9955 // CHECK17-NEXT:    [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1
9956 // CHECK17-NEXT:    [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1
9957 // CHECK17-NEXT:    store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4
9958 // CHECK17-NEXT:    [[TMP173:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4
9959 // CHECK17-NEXT:    [[ADD62:%.*]] = add nsw i32 [[TMP173]], 1
9960 // CHECK17-NEXT:    [[TMP174:%.*]] = zext i32 [[ADD62]] to i64
9961 // CHECK17-NEXT:    [[TMP175:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0
9962 // CHECK17-NEXT:    store i32 2, ptr [[TMP175]], align 4
9963 // CHECK17-NEXT:    [[TMP176:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1
9964 // CHECK17-NEXT:    store i32 4, ptr [[TMP176]], align 4
9965 // CHECK17-NEXT:    [[TMP177:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2
9966 // CHECK17-NEXT:    store ptr [[TMP168]], ptr [[TMP177]], align 8
9967 // CHECK17-NEXT:    [[TMP178:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3
9968 // CHECK17-NEXT:    store ptr [[TMP169]], ptr [[TMP178]], align 8
9969 // CHECK17-NEXT:    [[TMP179:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4
9970 // CHECK17-NEXT:    store ptr [[TMP170]], ptr [[TMP179]], align 8
9971 // CHECK17-NEXT:    [[TMP180:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5
9972 // CHECK17-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP180]], align 8
9973 // CHECK17-NEXT:    [[TMP181:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6
9974 // CHECK17-NEXT:    store ptr null, ptr [[TMP181]], align 8
9975 // CHECK17-NEXT:    [[TMP182:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7
9976 // CHECK17-NEXT:    store ptr null, ptr [[TMP182]], align 8
9977 // CHECK17-NEXT:    [[TMP183:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8
9978 // CHECK17-NEXT:    store i64 [[TMP174]], ptr [[TMP183]], align 8
9979 // CHECK17-NEXT:    [[TMP184:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9
9980 // CHECK17-NEXT:    store i64 0, ptr [[TMP184]], align 8
9981 // CHECK17-NEXT:    [[TMP185:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10
9982 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP185]], align 4
9983 // CHECK17-NEXT:    [[TMP186:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11
9984 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP186]], align 4
9985 // CHECK17-NEXT:    [[TMP187:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12
9986 // CHECK17-NEXT:    store i32 0, ptr [[TMP187]], align 4
9987 // CHECK17-NEXT:    [[TMP188:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]])
9988 // CHECK17-NEXT:    [[TMP189:%.*]] = icmp ne i32 [[TMP188]], 0
9989 // CHECK17-NEXT:    br i1 [[TMP189]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
9990 // CHECK17:       omp_offload.failed64:
9991 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i64 [[TMP151]], i64 [[TMP1]], ptr [[VLA]], i64 [[TMP153]]) #[[ATTR3]]
9992 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
9993 // CHECK17:       omp_offload.cont65:
9994 // CHECK17-NEXT:    [[TMP190:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
9995 // CHECK17-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP190]])
9996 // CHECK17-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
9997 // CHECK17-NEXT:    [[TMP191:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
9998 // CHECK17-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP191]])
9999 // CHECK17-NEXT:    [[TMP192:%.*]] = load i32, ptr [[RETVAL]], align 4
10000 // CHECK17-NEXT:    ret i32 [[TMP192]]
10001 //
10002 //
10003 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
10004 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
10005 // CHECK17-NEXT:  entry:
10006 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10007 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10008 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10009 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10010 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10011 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10012 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10013 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10014 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10015 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10016 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
10017 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
10018 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]])
10019 // CHECK17-NEXT:    ret void
10020 //
10021 //
10022 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined
10023 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10024 // CHECK17-NEXT:  entry:
10025 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10026 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10027 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10028 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10029 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10030 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10031 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10032 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10033 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10034 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10035 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10036 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10037 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10038 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10039 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
10040 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10041 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10042 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10043 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10044 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10045 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10046 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10047 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10048 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10049 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
10050 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10051 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10052 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10053 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10054 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10055 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10056 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10057 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10058 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10059 // CHECK17:       omp.precond.then:
10060 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10061 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10062 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
10063 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10064 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10065 // CHECK17-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10066 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
10067 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10068 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10069 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10070 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
10071 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10072 // CHECK17:       cond.true:
10073 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10074 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10075 // CHECK17:       cond.false:
10076 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10077 // CHECK17-NEXT:    br label [[COND_END]]
10078 // CHECK17:       cond.end:
10079 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
10080 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10081 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10082 // CHECK17-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
10083 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10084 // CHECK17:       omp.inner.for.cond:
10085 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10086 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10087 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
10088 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10089 // CHECK17:       omp.inner.for.body:
10090 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10091 // CHECK17-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
10092 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10093 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10094 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4
10095 // CHECK17-NEXT:    store i32 [[TMP19]], ptr [[N_CASTED]], align 4
10096 // CHECK17-NEXT:    [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8
10097 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]])
10098 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10099 // CHECK17:       omp.inner.for.inc:
10100 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10101 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10102 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
10103 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
10104 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10105 // CHECK17:       omp.inner.for.end:
10106 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10107 // CHECK17:       omp.loop.exit:
10108 // CHECK17-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10109 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
10110 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
10111 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10112 // CHECK17:       omp.precond.end:
10113 // CHECK17-NEXT:    ret void
10114 //
10115 //
10116 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined
10117 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10118 // CHECK17-NEXT:  entry:
10119 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10120 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10121 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10122 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10123 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10124 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10125 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10126 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10127 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10128 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10129 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10130 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10131 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10132 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10133 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10134 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10135 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
10136 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10137 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10138 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10139 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10140 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10141 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10142 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10143 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10144 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10145 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10146 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
10147 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10148 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10149 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10150 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10151 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10152 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10153 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10154 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10155 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10156 // CHECK17:       omp.precond.then:
10157 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
10158 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10159 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
10160 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10161 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
10162 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10163 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
10164 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
10165 // CHECK17-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
10166 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10167 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10168 // CHECK17-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10169 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
10170 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10171 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10172 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10173 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10174 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10175 // CHECK17:       cond.true:
10176 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10177 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10178 // CHECK17:       cond.false:
10179 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10180 // CHECK17-NEXT:    br label [[COND_END]]
10181 // CHECK17:       cond.end:
10182 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10183 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
10184 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10185 // CHECK17-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
10186 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10187 // CHECK17:       omp.inner.for.cond:
10188 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10189 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10190 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
10191 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10192 // CHECK17:       omp.inner.for.body:
10193 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10194 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
10195 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10196 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
10197 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I4]], align 4
10198 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
10199 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
10200 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
10201 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10202 // CHECK17:       omp.body.continue:
10203 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10204 // CHECK17:       omp.inner.for.inc:
10205 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10206 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
10207 // CHECK17-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
10208 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10209 // CHECK17:       omp.inner.for.end:
10210 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10211 // CHECK17:       omp.loop.exit:
10212 // CHECK17-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10213 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
10214 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
10215 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10216 // CHECK17:       omp.precond.end:
10217 // CHECK17-NEXT:    ret void
10218 //
10219 //
10220 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
10221 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10222 // CHECK17-NEXT:  entry:
10223 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10224 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10225 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10226 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10227 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10228 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10229 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10230 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10231 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10232 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10233 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
10234 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
10235 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]])
10236 // CHECK17-NEXT:    ret void
10237 //
10238 //
10239 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined
10240 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10241 // CHECK17-NEXT:  entry:
10242 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10243 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10244 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10245 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10246 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10247 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10248 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10249 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10250 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10251 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10252 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10253 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10254 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10255 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10256 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
10257 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10258 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10259 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10260 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10261 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10262 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10263 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10264 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10265 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10266 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
10267 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10268 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10269 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10270 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10271 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10272 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10273 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10274 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10275 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10276 // CHECK17:       omp.precond.then:
10277 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10278 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10279 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
10280 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10281 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10282 // CHECK17-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10283 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
10284 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10285 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10286 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10287 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
10288 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10289 // CHECK17:       cond.true:
10290 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10291 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10292 // CHECK17:       cond.false:
10293 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10294 // CHECK17-NEXT:    br label [[COND_END]]
10295 // CHECK17:       cond.end:
10296 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
10297 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10298 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10299 // CHECK17-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
10300 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10301 // CHECK17:       omp.inner.for.cond:
10302 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10303 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10304 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
10305 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10306 // CHECK17:       omp.inner.for.body:
10307 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10308 // CHECK17-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
10309 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10310 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10311 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4
10312 // CHECK17-NEXT:    store i32 [[TMP19]], ptr [[N_CASTED]], align 4
10313 // CHECK17-NEXT:    [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8
10314 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]])
10315 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10316 // CHECK17:       omp.inner.for.inc:
10317 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10318 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10319 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
10320 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
10321 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10322 // CHECK17:       omp.inner.for.end:
10323 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10324 // CHECK17:       omp.loop.exit:
10325 // CHECK17-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10326 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
10327 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
10328 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10329 // CHECK17:       omp.precond.end:
10330 // CHECK17-NEXT:    ret void
10331 //
10332 //
10333 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined
10334 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10335 // CHECK17-NEXT:  entry:
10336 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10337 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10338 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10339 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10340 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10341 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10342 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10343 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10344 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10345 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10346 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10347 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10348 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10349 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10350 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10351 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10352 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
10353 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10354 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10355 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10356 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10357 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10358 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10359 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10360 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10361 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10362 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10363 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
10364 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10365 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10366 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10367 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10368 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10369 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10370 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10371 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10372 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10373 // CHECK17:       omp.precond.then:
10374 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
10375 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10376 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
10377 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10378 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
10379 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10380 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
10381 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
10382 // CHECK17-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
10383 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10384 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10385 // CHECK17-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10386 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
10387 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10388 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10389 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10390 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10391 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10392 // CHECK17:       cond.true:
10393 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10394 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10395 // CHECK17:       cond.false:
10396 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10397 // CHECK17-NEXT:    br label [[COND_END]]
10398 // CHECK17:       cond.end:
10399 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10400 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
10401 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10402 // CHECK17-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
10403 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10404 // CHECK17:       omp.inner.for.cond:
10405 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10406 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10407 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
10408 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10409 // CHECK17:       omp.inner.for.body:
10410 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10411 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
10412 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10413 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
10414 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I4]], align 4
10415 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
10416 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
10417 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
10418 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10419 // CHECK17:       omp.body.continue:
10420 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10421 // CHECK17:       omp.inner.for.inc:
10422 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10423 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
10424 // CHECK17-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
10425 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10426 // CHECK17:       omp.inner.for.end:
10427 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10428 // CHECK17:       omp.loop.exit:
10429 // CHECK17-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10430 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
10431 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
10432 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10433 // CHECK17:       omp.precond.end:
10434 // CHECK17-NEXT:    ret void
10435 //
10436 //
10437 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
10438 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10439 // CHECK17-NEXT:  entry:
10440 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10441 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10442 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10443 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10444 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10445 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10446 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10447 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10448 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10449 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
10450 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10451 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10452 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10453 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
10454 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
10455 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
10456 // CHECK17-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
10457 // CHECK17-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
10458 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]])
10459 // CHECK17-NEXT:    ret void
10460 //
10461 //
10462 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined
10463 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10464 // CHECK17-NEXT:  entry:
10465 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10466 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10467 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10468 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10469 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10470 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10471 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10472 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10473 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10474 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10475 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10476 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10477 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10478 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10479 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10480 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
10481 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10482 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10483 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10484 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10485 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10486 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10487 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10488 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
10489 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10490 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10491 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10492 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10493 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10494 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10495 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10496 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10497 // CHECK17-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
10498 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10499 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10500 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10501 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10502 // CHECK17:       omp.precond.then:
10503 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10504 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10505 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
10506 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10507 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10508 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
10509 // CHECK17-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10510 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
10511 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
10512 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10513 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10514 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10515 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10516 // CHECK17:       cond.true:
10517 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10518 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10519 // CHECK17:       cond.false:
10520 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10521 // CHECK17-NEXT:    br label [[COND_END]]
10522 // CHECK17:       cond.end:
10523 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10524 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10525 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10526 // CHECK17-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
10527 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10528 // CHECK17:       omp.inner.for.cond:
10529 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10530 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10531 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
10532 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
10533 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10534 // CHECK17:       omp.inner.for.body:
10535 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10536 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10537 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10538 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10539 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[N_ADDR]], align 4
10540 // CHECK17-NEXT:    store i32 [[TMP20]], ptr [[N_CASTED]], align 4
10541 // CHECK17-NEXT:    [[TMP21:%.*]] = load i64, ptr [[N_CASTED]], align 8
10542 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
10543 // CHECK17-NEXT:    store i32 [[TMP22]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
10544 // CHECK17-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
10545 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], i64 [[TMP21]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP23]])
10546 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10547 // CHECK17:       omp.inner.for.inc:
10548 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10549 // CHECK17-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10550 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
10551 // CHECK17-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
10552 // CHECK17-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10553 // CHECK17-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10554 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
10555 // CHECK17-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4
10556 // CHECK17-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10557 // CHECK17-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10558 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP28]], [[TMP29]]
10559 // CHECK17-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4
10560 // CHECK17-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10561 // CHECK17-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10562 // CHECK17-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP30]], [[TMP31]]
10563 // CHECK17-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
10564 // CHECK17:       cond.true11:
10565 // CHECK17-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10566 // CHECK17-NEXT:    br label [[COND_END13:%.*]]
10567 // CHECK17:       cond.false12:
10568 // CHECK17-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10569 // CHECK17-NEXT:    br label [[COND_END13]]
10570 // CHECK17:       cond.end13:
10571 // CHECK17-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP32]], [[COND_TRUE11]] ], [ [[TMP33]], [[COND_FALSE12]] ]
10572 // CHECK17-NEXT:    store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4
10573 // CHECK17-NEXT:    [[TMP34:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10574 // CHECK17-NEXT:    store i32 [[TMP34]], ptr [[DOTOMP_IV]], align 4
10575 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10576 // CHECK17:       omp.inner.for.end:
10577 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10578 // CHECK17:       omp.loop.exit:
10579 // CHECK17-NEXT:    [[TMP35:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10580 // CHECK17-NEXT:    [[TMP36:%.*]] = load i32, ptr [[TMP35]], align 4
10581 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP36]])
10582 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10583 // CHECK17:       omp.precond.end:
10584 // CHECK17-NEXT:    ret void
10585 //
10586 //
10587 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined
10588 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10589 // CHECK17-NEXT:  entry:
10590 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10591 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10592 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10593 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10594 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10595 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10596 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10597 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10598 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10599 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10600 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10601 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10602 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10603 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10604 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10605 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10606 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10607 // CHECK17-NEXT:    [[I5:%.*]] = alloca i32, align 4
10608 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10609 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10610 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10611 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10612 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10613 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10614 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10615 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
10616 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10617 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10618 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10619 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10620 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10621 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10622 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10623 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10624 // CHECK17-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
10625 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10626 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10627 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10628 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10629 // CHECK17:       omp.precond.then:
10630 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
10631 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10632 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
10633 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10634 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
10635 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10636 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
10637 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
10638 // CHECK17-NEXT:    store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4
10639 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10640 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10641 // CHECK17-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10642 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
10643 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10644 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10645 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10646 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10647 // CHECK17-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10648 // CHECK17:       cond.true:
10649 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10650 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10651 // CHECK17:       cond.false:
10652 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10653 // CHECK17-NEXT:    br label [[COND_END]]
10654 // CHECK17:       cond.end:
10655 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10656 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
10657 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10658 // CHECK17-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
10659 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10660 // CHECK17:       omp.inner.for.cond:
10661 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10662 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10663 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
10664 // CHECK17-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10665 // CHECK17:       omp.inner.for.body:
10666 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10667 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
10668 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10669 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I5]], align 4
10670 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I5]], align 4
10671 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP18]] to i64
10672 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
10673 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
10674 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10675 // CHECK17:       omp.body.continue:
10676 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10677 // CHECK17:       omp.inner.for.inc:
10678 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10679 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], 1
10680 // CHECK17-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
10681 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10682 // CHECK17:       omp.inner.for.end:
10683 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10684 // CHECK17:       omp.loop.exit:
10685 // CHECK17-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10686 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
10687 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
10688 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10689 // CHECK17:       omp.precond.end:
10690 // CHECK17-NEXT:    ret void
10691 //
10692 //
10693 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
10694 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10695 // CHECK17-NEXT:  entry:
10696 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10697 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10698 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10699 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10700 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10701 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10702 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10703 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10704 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10705 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10706 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
10707 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
10708 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]])
10709 // CHECK17-NEXT:    ret void
10710 //
10711 //
10712 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined
10713 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10714 // CHECK17-NEXT:  entry:
10715 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10716 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10717 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10718 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10719 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10720 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10721 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10722 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10723 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10724 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10725 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10726 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10727 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10728 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10729 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
10730 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10731 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10732 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10733 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10734 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10735 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10736 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10737 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10738 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10739 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
10740 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10741 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10742 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10743 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10744 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10745 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10746 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10747 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10748 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10749 // CHECK17:       omp.precond.then:
10750 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10751 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10752 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
10753 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10754 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10755 // CHECK17-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10756 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
10757 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10758 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10759 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10760 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
10761 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10762 // CHECK17:       cond.true:
10763 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10764 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10765 // CHECK17:       cond.false:
10766 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10767 // CHECK17-NEXT:    br label [[COND_END]]
10768 // CHECK17:       cond.end:
10769 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
10770 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10771 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10772 // CHECK17-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
10773 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10774 // CHECK17:       omp.inner.for.cond:
10775 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10776 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10777 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
10778 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10779 // CHECK17:       omp.inner.for.body:
10780 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10781 // CHECK17-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
10782 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10783 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10784 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4
10785 // CHECK17-NEXT:    store i32 [[TMP19]], ptr [[N_CASTED]], align 4
10786 // CHECK17-NEXT:    [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8
10787 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]])
10788 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10789 // CHECK17:       omp.inner.for.inc:
10790 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10791 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10792 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
10793 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
10794 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10795 // CHECK17:       omp.inner.for.end:
10796 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10797 // CHECK17:       omp.loop.exit:
10798 // CHECK17-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10799 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
10800 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
10801 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10802 // CHECK17:       omp.precond.end:
10803 // CHECK17-NEXT:    ret void
10804 //
10805 //
10806 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined
10807 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10808 // CHECK17-NEXT:  entry:
10809 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10810 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10811 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10812 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10813 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10814 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10815 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10816 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10817 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10818 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10819 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10820 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10821 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10822 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10823 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10824 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10825 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
10826 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10827 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10828 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10829 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10830 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10831 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10832 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10833 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10834 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10835 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10836 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
10837 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10838 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10839 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10840 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10841 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10842 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10843 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10844 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10845 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10846 // CHECK17:       omp.precond.then:
10847 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
10848 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10849 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
10850 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10851 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
10852 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10853 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
10854 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
10855 // CHECK17-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
10856 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10857 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10858 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10859 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10860 // CHECK17-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10861 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
10862 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
10863 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
10864 // CHECK17:       omp.dispatch.cond:
10865 // CHECK17-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10866 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
10867 // CHECK17-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
10868 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
10869 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10870 // CHECK17:       omp.dispatch.body:
10871 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10872 // CHECK17-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
10873 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10874 // CHECK17:       omp.inner.for.cond:
10875 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
10876 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
10877 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10878 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10879 // CHECK17:       omp.inner.for.body:
10880 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
10881 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10882 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10883 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]
10884 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]
10885 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10886 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
10887 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]
10888 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10889 // CHECK17:       omp.body.continue:
10890 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10891 // CHECK17:       omp.inner.for.inc:
10892 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
10893 // CHECK17-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
10894 // CHECK17-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
10895 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
10896 // CHECK17:       omp.inner.for.end:
10897 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
10898 // CHECK17:       omp.dispatch.inc:
10899 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
10900 // CHECK17:       omp.dispatch.end:
10901 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10902 // CHECK17:       omp.precond.end:
10903 // CHECK17-NEXT:    ret void
10904 //
10905 //
10906 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
10907 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10908 // CHECK17-NEXT:  entry:
10909 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10910 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10911 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10912 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10913 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10914 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10915 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10916 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10917 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10918 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
10919 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10920 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10921 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10922 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
10923 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, ptr [[N_CASTED]], align 8
10924 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
10925 // CHECK17-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
10926 // CHECK17-NEXT:    [[TMP5:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
10927 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i64 [[TMP3]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP5]])
10928 // CHECK17-NEXT:    ret void
10929 //
10930 //
10931 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined
10932 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
10933 // CHECK17-NEXT:  entry:
10934 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10935 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10936 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10937 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10938 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10939 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10940 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10941 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10942 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10943 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10944 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10945 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10946 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10947 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10948 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10949 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
10950 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
10951 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10952 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10953 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10954 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10955 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10956 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10957 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
10958 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10959 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10960 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
10961 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10962 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10963 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
10964 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10965 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10966 // CHECK17-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
10967 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10968 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10969 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
10970 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10971 // CHECK17:       omp.precond.then:
10972 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10973 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10974 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
10975 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10976 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10977 // CHECK17-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10978 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
10979 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10980 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10981 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10982 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
10983 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10984 // CHECK17:       cond.true:
10985 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10986 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10987 // CHECK17:       cond.false:
10988 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10989 // CHECK17-NEXT:    br label [[COND_END]]
10990 // CHECK17:       cond.end:
10991 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
10992 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10993 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10994 // CHECK17-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
10995 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10996 // CHECK17:       omp.inner.for.cond:
10997 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10998 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10999 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11000 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11001 // CHECK17:       omp.inner.for.body:
11002 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11003 // CHECK17-NEXT:    [[TMP16:%.*]] = zext i32 [[TMP15]] to i64
11004 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11005 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
11006 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_ADDR]], align 4
11007 // CHECK17-NEXT:    store i32 [[TMP19]], ptr [[N_CASTED]], align 4
11008 // CHECK17-NEXT:    [[TMP20:%.*]] = load i64, ptr [[N_CASTED]], align 8
11009 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
11010 // CHECK17-NEXT:    store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
11011 // CHECK17-NEXT:    [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
11012 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i64 [[TMP16]], i64 [[TMP18]], i64 [[TMP20]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP22]])
11013 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11014 // CHECK17:       omp.inner.for.inc:
11015 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11016 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11017 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
11018 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11019 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11020 // CHECK17:       omp.inner.for.end:
11021 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11022 // CHECK17:       omp.loop.exit:
11023 // CHECK17-NEXT:    [[TMP25:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11024 // CHECK17-NEXT:    [[TMP26:%.*]] = load i32, ptr [[TMP25]], align 4
11025 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP26]])
11026 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
11027 // CHECK17:       omp.precond.end:
11028 // CHECK17-NEXT:    ret void
11029 //
11030 //
11031 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined
11032 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11033 // CHECK17-NEXT:  entry:
11034 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11035 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11036 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11037 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11038 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
11039 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
11040 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11041 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11042 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11043 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11044 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
11045 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
11046 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11047 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11048 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11049 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11050 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11051 // CHECK17-NEXT:    [[I5:%.*]] = alloca i32, align 4
11052 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11053 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11054 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11055 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11056 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
11057 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
11058 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11059 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
11060 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
11061 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11062 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
11063 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
11064 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
11065 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
11066 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
11067 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
11068 // CHECK17-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
11069 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
11070 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
11071 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
11072 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
11073 // CHECK17:       omp.precond.then:
11074 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
11075 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
11076 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
11077 // CHECK17-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11078 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP6]] to i32
11079 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11080 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP7]] to i32
11081 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
11082 // CHECK17-NEXT:    store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4
11083 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11084 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11085 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
11086 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11087 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11088 // CHECK17-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11089 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
11090 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
11091 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11092 // CHECK17:       omp.dispatch.cond:
11093 // CHECK17-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11094 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
11095 // CHECK17-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
11096 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
11097 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11098 // CHECK17:       omp.dispatch.body:
11099 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11100 // CHECK17-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
11101 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11102 // CHECK17:       omp.inner.for.cond:
11103 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
11104 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
11105 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
11106 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11107 // CHECK17:       omp.inner.for.body:
11108 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
11109 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
11110 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11111 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]
11112 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]
11113 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
11114 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i64 [[IDXPROM]]
11115 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]
11116 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11117 // CHECK17:       omp.body.continue:
11118 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11119 // CHECK17:       omp.inner.for.inc:
11120 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
11121 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], 1
11122 // CHECK17-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
11123 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
11124 // CHECK17:       omp.inner.for.end:
11125 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11126 // CHECK17:       omp.dispatch.inc:
11127 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
11128 // CHECK17:       omp.dispatch.end:
11129 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
11130 // CHECK17:       omp.precond.end:
11131 // CHECK17-NEXT:    ret void
11132 //
11133 //
11134 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
11135 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
11136 // CHECK17-NEXT:  entry:
11137 // CHECK17-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
11138 // CHECK17-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
11139 // CHECK17-NEXT:    [[M:%.*]] = alloca i32, align 4
11140 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
11141 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
11142 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
11143 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11144 // CHECK17-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
11145 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8
11146 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8
11147 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8
11148 // CHECK17-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
11149 // CHECK17-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11150 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11151 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11152 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 8
11153 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 8
11154 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 8
11155 // CHECK17-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
11156 // CHECK17-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11157 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 8
11158 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 8
11159 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 8
11160 // CHECK17-NEXT:    [[_TMP18:%.*]] = alloca i32, align 4
11161 // CHECK17-NEXT:    [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11162 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
11163 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i64, align 8
11164 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 8
11165 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 8
11166 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 8
11167 // CHECK17-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
11168 // CHECK17-NEXT:    [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11169 // CHECK17-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
11170 // CHECK17-NEXT:    store i32 10, ptr [[M]], align 4
11171 // CHECK17-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11172 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP0]], align 8
11173 // CHECK17-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11174 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
11175 // CHECK17-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11176 // CHECK17-NEXT:    store ptr null, ptr [[TMP2]], align 8
11177 // CHECK17-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11178 // CHECK17-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11179 // CHECK17-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
11180 // CHECK17-NEXT:    store i32 2, ptr [[TMP5]], align 4
11181 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
11182 // CHECK17-NEXT:    store i32 1, ptr [[TMP6]], align 4
11183 // CHECK17-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
11184 // CHECK17-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
11185 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
11186 // CHECK17-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
11187 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
11188 // CHECK17-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP9]], align 8
11189 // CHECK17-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
11190 // CHECK17-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP10]], align 8
11191 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
11192 // CHECK17-NEXT:    store ptr null, ptr [[TMP11]], align 8
11193 // CHECK17-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
11194 // CHECK17-NEXT:    store ptr null, ptr [[TMP12]], align 8
11195 // CHECK17-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
11196 // CHECK17-NEXT:    store i64 10, ptr [[TMP13]], align 8
11197 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
11198 // CHECK17-NEXT:    store i64 0, ptr [[TMP14]], align 8
11199 // CHECK17-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
11200 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
11201 // CHECK17-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
11202 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
11203 // CHECK17-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
11204 // CHECK17-NEXT:    store i32 0, ptr [[TMP17]], align 4
11205 // CHECK17-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]])
11206 // CHECK17-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
11207 // CHECK17-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11208 // CHECK17:       omp_offload.failed:
11209 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]]
11210 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
11211 // CHECK17:       omp_offload.cont:
11212 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11213 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP20]], align 8
11214 // CHECK17-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11215 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP21]], align 8
11216 // CHECK17-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
11217 // CHECK17-NEXT:    store ptr null, ptr [[TMP22]], align 8
11218 // CHECK17-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11219 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11220 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
11221 // CHECK17-NEXT:    store i32 2, ptr [[TMP25]], align 4
11222 // CHECK17-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
11223 // CHECK17-NEXT:    store i32 1, ptr [[TMP26]], align 4
11224 // CHECK17-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
11225 // CHECK17-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
11226 // CHECK17-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
11227 // CHECK17-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
11228 // CHECK17-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
11229 // CHECK17-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP29]], align 8
11230 // CHECK17-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
11231 // CHECK17-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP30]], align 8
11232 // CHECK17-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
11233 // CHECK17-NEXT:    store ptr null, ptr [[TMP31]], align 8
11234 // CHECK17-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
11235 // CHECK17-NEXT:    store ptr null, ptr [[TMP32]], align 8
11236 // CHECK17-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
11237 // CHECK17-NEXT:    store i64 10, ptr [[TMP33]], align 8
11238 // CHECK17-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
11239 // CHECK17-NEXT:    store i64 0, ptr [[TMP34]], align 8
11240 // CHECK17-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
11241 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
11242 // CHECK17-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
11243 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
11244 // CHECK17-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
11245 // CHECK17-NEXT:    store i32 0, ptr [[TMP37]], align 4
11246 // CHECK17-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]])
11247 // CHECK17-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
11248 // CHECK17-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
11249 // CHECK17:       omp_offload.failed6:
11250 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]]
11251 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
11252 // CHECK17:       omp_offload.cont7:
11253 // CHECK17-NEXT:    [[TMP40:%.*]] = load i32, ptr [[M]], align 4
11254 // CHECK17-NEXT:    store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4
11255 // CHECK17-NEXT:    [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
11256 // CHECK17-NEXT:    store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
11257 // CHECK17-NEXT:    [[TMP42:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
11258 // CHECK17-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
11259 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP43]], align 8
11260 // CHECK17-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
11261 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP44]], align 8
11262 // CHECK17-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
11263 // CHECK17-NEXT:    store ptr null, ptr [[TMP45]], align 8
11264 // CHECK17-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
11265 // CHECK17-NEXT:    store i64 [[TMP42]], ptr [[TMP46]], align 8
11266 // CHECK17-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
11267 // CHECK17-NEXT:    store i64 [[TMP42]], ptr [[TMP47]], align 8
11268 // CHECK17-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
11269 // CHECK17-NEXT:    store ptr null, ptr [[TMP48]], align 8
11270 // CHECK17-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
11271 // CHECK17-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
11272 // CHECK17-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
11273 // CHECK17-NEXT:    store i32 2, ptr [[TMP51]], align 4
11274 // CHECK17-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
11275 // CHECK17-NEXT:    store i32 2, ptr [[TMP52]], align 4
11276 // CHECK17-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
11277 // CHECK17-NEXT:    store ptr [[TMP49]], ptr [[TMP53]], align 8
11278 // CHECK17-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
11279 // CHECK17-NEXT:    store ptr [[TMP50]], ptr [[TMP54]], align 8
11280 // CHECK17-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
11281 // CHECK17-NEXT:    store ptr @.offload_sizes.13, ptr [[TMP55]], align 8
11282 // CHECK17-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
11283 // CHECK17-NEXT:    store ptr @.offload_maptypes.14, ptr [[TMP56]], align 8
11284 // CHECK17-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
11285 // CHECK17-NEXT:    store ptr null, ptr [[TMP57]], align 8
11286 // CHECK17-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
11287 // CHECK17-NEXT:    store ptr null, ptr [[TMP58]], align 8
11288 // CHECK17-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
11289 // CHECK17-NEXT:    store i64 10, ptr [[TMP59]], align 8
11290 // CHECK17-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
11291 // CHECK17-NEXT:    store i64 0, ptr [[TMP60]], align 8
11292 // CHECK17-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
11293 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4
11294 // CHECK17-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
11295 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4
11296 // CHECK17-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
11297 // CHECK17-NEXT:    store i32 0, ptr [[TMP63]], align 4
11298 // CHECK17-NEXT:    [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]])
11299 // CHECK17-NEXT:    [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0
11300 // CHECK17-NEXT:    br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
11301 // CHECK17:       omp_offload.failed13:
11302 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i64 [[TMP42]]) #[[ATTR3]]
11303 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT14]]
11304 // CHECK17:       omp_offload.cont14:
11305 // CHECK17-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
11306 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP66]], align 8
11307 // CHECK17-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
11308 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP67]], align 8
11309 // CHECK17-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0
11310 // CHECK17-NEXT:    store ptr null, ptr [[TMP68]], align 8
11311 // CHECK17-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
11312 // CHECK17-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
11313 // CHECK17-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0
11314 // CHECK17-NEXT:    store i32 2, ptr [[TMP71]], align 4
11315 // CHECK17-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1
11316 // CHECK17-NEXT:    store i32 1, ptr [[TMP72]], align 4
11317 // CHECK17-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2
11318 // CHECK17-NEXT:    store ptr [[TMP69]], ptr [[TMP73]], align 8
11319 // CHECK17-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3
11320 // CHECK17-NEXT:    store ptr [[TMP70]], ptr [[TMP74]], align 8
11321 // CHECK17-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4
11322 // CHECK17-NEXT:    store ptr @.offload_sizes.15, ptr [[TMP75]], align 8
11323 // CHECK17-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5
11324 // CHECK17-NEXT:    store ptr @.offload_maptypes.16, ptr [[TMP76]], align 8
11325 // CHECK17-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6
11326 // CHECK17-NEXT:    store ptr null, ptr [[TMP77]], align 8
11327 // CHECK17-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7
11328 // CHECK17-NEXT:    store ptr null, ptr [[TMP78]], align 8
11329 // CHECK17-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8
11330 // CHECK17-NEXT:    store i64 10, ptr [[TMP79]], align 8
11331 // CHECK17-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9
11332 // CHECK17-NEXT:    store i64 0, ptr [[TMP80]], align 8
11333 // CHECK17-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10
11334 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4
11335 // CHECK17-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11
11336 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4
11337 // CHECK17-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12
11338 // CHECK17-NEXT:    store i32 0, ptr [[TMP83]], align 4
11339 // CHECK17-NEXT:    [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]])
11340 // CHECK17-NEXT:    [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0
11341 // CHECK17-NEXT:    br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
11342 // CHECK17:       omp_offload.failed20:
11343 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]]
11344 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT21]]
11345 // CHECK17:       omp_offload.cont21:
11346 // CHECK17-NEXT:    [[TMP86:%.*]] = load i32, ptr [[M]], align 4
11347 // CHECK17-NEXT:    store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4
11348 // CHECK17-NEXT:    [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4
11349 // CHECK17-NEXT:    store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4
11350 // CHECK17-NEXT:    [[TMP88:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 8
11351 // CHECK17-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
11352 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP89]], align 8
11353 // CHECK17-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
11354 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP90]], align 8
11355 // CHECK17-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 0
11356 // CHECK17-NEXT:    store ptr null, ptr [[TMP91]], align 8
11357 // CHECK17-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
11358 // CHECK17-NEXT:    store i64 [[TMP88]], ptr [[TMP92]], align 8
11359 // CHECK17-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
11360 // CHECK17-NEXT:    store i64 [[TMP88]], ptr [[TMP93]], align 8
11361 // CHECK17-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i64 0, i64 1
11362 // CHECK17-NEXT:    store ptr null, ptr [[TMP94]], align 8
11363 // CHECK17-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
11364 // CHECK17-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
11365 // CHECK17-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0
11366 // CHECK17-NEXT:    store i32 2, ptr [[TMP97]], align 4
11367 // CHECK17-NEXT:    [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1
11368 // CHECK17-NEXT:    store i32 2, ptr [[TMP98]], align 4
11369 // CHECK17-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2
11370 // CHECK17-NEXT:    store ptr [[TMP95]], ptr [[TMP99]], align 8
11371 // CHECK17-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3
11372 // CHECK17-NEXT:    store ptr [[TMP96]], ptr [[TMP100]], align 8
11373 // CHECK17-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4
11374 // CHECK17-NEXT:    store ptr @.offload_sizes.17, ptr [[TMP101]], align 8
11375 // CHECK17-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5
11376 // CHECK17-NEXT:    store ptr @.offload_maptypes.18, ptr [[TMP102]], align 8
11377 // CHECK17-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6
11378 // CHECK17-NEXT:    store ptr null, ptr [[TMP103]], align 8
11379 // CHECK17-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7
11380 // CHECK17-NEXT:    store ptr null, ptr [[TMP104]], align 8
11381 // CHECK17-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8
11382 // CHECK17-NEXT:    store i64 10, ptr [[TMP105]], align 8
11383 // CHECK17-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9
11384 // CHECK17-NEXT:    store i64 0, ptr [[TMP106]], align 8
11385 // CHECK17-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10
11386 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4
11387 // CHECK17-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11
11388 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4
11389 // CHECK17-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12
11390 // CHECK17-NEXT:    store i32 0, ptr [[TMP109]], align 4
11391 // CHECK17-NEXT:    [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]])
11392 // CHECK17-NEXT:    [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0
11393 // CHECK17-NEXT:    br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
11394 // CHECK17:       omp_offload.failed29:
11395 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i64 [[TMP88]]) #[[ATTR3]]
11396 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
11397 // CHECK17:       omp_offload.cont30:
11398 // CHECK17-NEXT:    ret i32 0
11399 //
11400 //
11401 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
11402 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11403 // CHECK17-NEXT:  entry:
11404 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11405 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11406 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11407 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]])
11408 // CHECK17-NEXT:    ret void
11409 //
11410 //
11411 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined
11412 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11413 // CHECK17-NEXT:  entry:
11414 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11415 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11416 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11417 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11418 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11419 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11420 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11421 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11422 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11423 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11424 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11425 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11426 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11427 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11428 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11429 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11430 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11431 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11432 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11433 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
11434 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11435 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11436 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11437 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11438 // CHECK17:       cond.true:
11439 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11440 // CHECK17:       cond.false:
11441 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11442 // CHECK17-NEXT:    br label [[COND_END]]
11443 // CHECK17:       cond.end:
11444 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11445 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11446 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11447 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
11448 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11449 // CHECK17:       omp.inner.for.cond:
11450 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11451 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11452 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11453 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11454 // CHECK17:       omp.inner.for.body:
11455 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11456 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11457 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11458 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11459 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
11460 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11461 // CHECK17:       omp.inner.for.inc:
11462 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11463 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11464 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11465 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11466 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11467 // CHECK17:       omp.inner.for.end:
11468 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11469 // CHECK17:       omp.loop.exit:
11470 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
11471 // CHECK17-NEXT:    ret void
11472 //
11473 //
11474 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined
11475 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11476 // CHECK17-NEXT:  entry:
11477 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11478 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11479 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11480 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11481 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11482 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11483 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11484 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11485 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11486 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11487 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11488 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11489 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11490 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11491 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11492 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11493 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11494 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11495 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
11496 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
11497 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11498 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11499 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11500 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11501 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
11502 // CHECK17-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
11503 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11504 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11505 // CHECK17-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11506 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
11507 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11508 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11509 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11510 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11511 // CHECK17:       cond.true:
11512 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11513 // CHECK17:       cond.false:
11514 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11515 // CHECK17-NEXT:    br label [[COND_END]]
11516 // CHECK17:       cond.end:
11517 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11518 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
11519 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11520 // CHECK17-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
11521 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11522 // CHECK17:       omp.inner.for.cond:
11523 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11524 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11525 // CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11526 // CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11527 // CHECK17:       omp.inner.for.body:
11528 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11529 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11530 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11531 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
11532 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
11533 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11534 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
11535 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
11536 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11537 // CHECK17:       omp.body.continue:
11538 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11539 // CHECK17:       omp.inner.for.inc:
11540 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11541 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11542 // CHECK17-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
11543 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11544 // CHECK17:       omp.inner.for.end:
11545 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11546 // CHECK17:       omp.loop.exit:
11547 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
11548 // CHECK17-NEXT:    ret void
11549 //
11550 //
11551 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
11552 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11553 // CHECK17-NEXT:  entry:
11554 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11555 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11556 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11557 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])
11558 // CHECK17-NEXT:    ret void
11559 //
11560 //
11561 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined
11562 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11563 // CHECK17-NEXT:  entry:
11564 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11565 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11566 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11567 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11568 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11569 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11570 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11571 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11572 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11573 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11574 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11575 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11576 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11577 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11578 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11579 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11580 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11581 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11582 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11583 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
11584 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11585 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11586 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11587 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11588 // CHECK17:       cond.true:
11589 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11590 // CHECK17:       cond.false:
11591 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11592 // CHECK17-NEXT:    br label [[COND_END]]
11593 // CHECK17:       cond.end:
11594 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11595 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11596 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11597 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
11598 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11599 // CHECK17:       omp.inner.for.cond:
11600 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11601 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11602 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11603 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11604 // CHECK17:       omp.inner.for.body:
11605 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11606 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11607 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11608 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11609 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
11610 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11611 // CHECK17:       omp.inner.for.inc:
11612 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11613 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11614 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11615 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11616 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11617 // CHECK17:       omp.inner.for.end:
11618 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11619 // CHECK17:       omp.loop.exit:
11620 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
11621 // CHECK17-NEXT:    ret void
11622 //
11623 //
11624 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined
11625 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11626 // CHECK17-NEXT:  entry:
11627 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11628 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11629 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11630 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11631 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11632 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11633 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11634 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11635 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11636 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11637 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11638 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11639 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11640 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11641 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11642 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11643 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11644 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11645 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
11646 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
11647 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11648 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11649 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11650 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11651 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
11652 // CHECK17-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
11653 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11654 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11655 // CHECK17-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11656 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
11657 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11658 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11659 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11660 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11661 // CHECK17:       cond.true:
11662 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11663 // CHECK17:       cond.false:
11664 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11665 // CHECK17-NEXT:    br label [[COND_END]]
11666 // CHECK17:       cond.end:
11667 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11668 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
11669 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11670 // CHECK17-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
11671 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11672 // CHECK17:       omp.inner.for.cond:
11673 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11674 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11675 // CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11676 // CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11677 // CHECK17:       omp.inner.for.body:
11678 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11679 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11680 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11681 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
11682 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
11683 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11684 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
11685 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
11686 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11687 // CHECK17:       omp.body.continue:
11688 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11689 // CHECK17:       omp.inner.for.inc:
11690 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11691 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11692 // CHECK17-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
11693 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11694 // CHECK17:       omp.inner.for.end:
11695 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11696 // CHECK17:       omp.loop.exit:
11697 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
11698 // CHECK17-NEXT:    ret void
11699 //
11700 //
11701 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
11702 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11703 // CHECK17-NEXT:  entry:
11704 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11705 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11706 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11707 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11708 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
11709 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11710 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
11711 // CHECK17-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
11712 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
11713 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i64 [[TMP2]])
11714 // CHECK17-NEXT:    ret void
11715 //
11716 //
11717 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined
11718 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11719 // CHECK17-NEXT:  entry:
11720 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11721 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11722 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11723 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11724 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11725 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11726 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11727 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11728 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11729 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11730 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11731 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11732 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11733 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11734 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11735 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
11736 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11737 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11738 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11739 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11740 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11741 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11742 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
11743 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11744 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11745 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11746 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11747 // CHECK17:       cond.true:
11748 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11749 // CHECK17:       cond.false:
11750 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11751 // CHECK17-NEXT:    br label [[COND_END]]
11752 // CHECK17:       cond.end:
11753 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11754 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11755 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11756 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
11757 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11758 // CHECK17:       omp.inner.for.cond:
11759 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11760 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11761 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11762 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11763 // CHECK17:       omp.inner.for.body:
11764 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11765 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11766 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11767 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11768 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
11769 // CHECK17-NEXT:    store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
11770 // CHECK17-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
11771 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])
11772 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11773 // CHECK17:       omp.inner.for.inc:
11774 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11775 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11776 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11777 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11778 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11779 // CHECK17:       omp.inner.for.end:
11780 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11781 // CHECK17:       omp.loop.exit:
11782 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
11783 // CHECK17-NEXT:    ret void
11784 //
11785 //
11786 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined
11787 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
11788 // CHECK17-NEXT:  entry:
11789 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11790 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11791 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11792 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11793 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11794 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11795 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11796 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11797 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11798 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11799 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11800 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11801 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11802 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11803 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11804 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11805 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11806 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11807 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
11808 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11809 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
11810 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
11811 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11812 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11813 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11814 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11815 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
11816 // CHECK17-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
11817 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11818 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11819 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
11820 // CHECK17-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11821 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
11822 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
11823 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11824 // CHECK17:       omp.dispatch.cond:
11825 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11826 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11827 // CHECK17-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP7]] to i32
11828 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV2]]
11829 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11830 // CHECK17:       cond.true:
11831 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11832 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
11833 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11834 // CHECK17:       cond.false:
11835 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11836 // CHECK17-NEXT:    br label [[COND_END]]
11837 // CHECK17:       cond.end:
11838 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
11839 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
11840 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11841 // CHECK17-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
11842 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11843 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11844 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
11845 // CHECK17-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11846 // CHECK17:       omp.dispatch.body:
11847 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11848 // CHECK17:       omp.inner.for.cond:
11849 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11850 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11851 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11852 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11853 // CHECK17:       omp.inner.for.body:
11854 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11855 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
11856 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11857 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
11858 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
11859 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
11860 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
11861 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
11862 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11863 // CHECK17:       omp.body.continue:
11864 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11865 // CHECK17:       omp.inner.for.inc:
11866 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11867 // CHECK17-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
11868 // CHECK17-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
11869 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11870 // CHECK17:       omp.inner.for.end:
11871 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11872 // CHECK17:       omp.dispatch.inc:
11873 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11874 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11875 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
11876 // CHECK17-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4
11877 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11878 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11879 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11880 // CHECK17-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4
11881 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
11882 // CHECK17:       omp.dispatch.end:
11883 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
11884 // CHECK17-NEXT:    ret void
11885 //
11886 //
11887 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
11888 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11889 // CHECK17-NEXT:  entry:
11890 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11891 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11892 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11893 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]])
11894 // CHECK17-NEXT:    ret void
11895 //
11896 //
11897 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined
11898 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11899 // CHECK17-NEXT:  entry:
11900 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11901 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11902 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11903 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11904 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11905 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11906 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11907 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11908 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11909 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11910 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11911 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11912 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11913 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11914 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11915 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11916 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11917 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11918 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11919 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
11920 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11921 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11922 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11923 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11924 // CHECK17:       cond.true:
11925 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11926 // CHECK17:       cond.false:
11927 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11928 // CHECK17-NEXT:    br label [[COND_END]]
11929 // CHECK17:       cond.end:
11930 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11931 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11932 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11933 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
11934 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11935 // CHECK17:       omp.inner.for.cond:
11936 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11937 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11938 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11939 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11940 // CHECK17:       omp.inner.for.body:
11941 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11942 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11943 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11944 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11945 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
11946 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11947 // CHECK17:       omp.inner.for.inc:
11948 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11949 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11950 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11951 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11952 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11953 // CHECK17:       omp.inner.for.end:
11954 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11955 // CHECK17:       omp.loop.exit:
11956 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
11957 // CHECK17-NEXT:    ret void
11958 //
11959 //
11960 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined
11961 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11962 // CHECK17-NEXT:  entry:
11963 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11964 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11965 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11966 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11967 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11968 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11969 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11970 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11971 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11972 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11973 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11974 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11975 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11976 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11977 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11978 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11979 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11980 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11981 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
11982 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
11983 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11984 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11985 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11986 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11987 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
11988 // CHECK17-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
11989 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11990 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11991 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11992 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11993 // CHECK17-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11994 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
11995 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
11996 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11997 // CHECK17:       omp.dispatch.cond:
11998 // CHECK17-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
11999 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
12000 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12001 // CHECK17:       omp.dispatch.body:
12002 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12003 // CHECK17-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
12004 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12005 // CHECK17:       omp.inner.for.cond:
12006 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
12007 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
12008 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
12009 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12010 // CHECK17:       omp.inner.for.body:
12011 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
12012 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
12013 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12014 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
12015 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
12016 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
12017 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
12018 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]
12019 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12020 // CHECK17:       omp.body.continue:
12021 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12022 // CHECK17:       omp.inner.for.inc:
12023 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
12024 // CHECK17-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
12025 // CHECK17-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
12026 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
12027 // CHECK17:       omp.inner.for.end:
12028 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12029 // CHECK17:       omp.dispatch.inc:
12030 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
12031 // CHECK17:       omp.dispatch.end:
12032 // CHECK17-NEXT:    ret void
12033 //
12034 //
12035 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
12036 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12037 // CHECK17-NEXT:  entry:
12038 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
12039 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12040 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12041 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
12042 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
12043 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
12044 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
12045 // CHECK17-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
12046 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
12047 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i64 [[TMP2]])
12048 // CHECK17-NEXT:    ret void
12049 //
12050 //
12051 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined
12052 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12053 // CHECK17-NEXT:  entry:
12054 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
12055 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
12056 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
12057 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12058 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12059 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12060 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12061 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12062 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12063 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12064 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
12065 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
12066 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
12067 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
12068 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
12069 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
12070 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
12071 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
12072 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
12073 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12074 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12075 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
12076 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
12077 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12078 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12079 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12080 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12081 // CHECK17:       cond.true:
12082 // CHECK17-NEXT:    br label [[COND_END:%.*]]
12083 // CHECK17:       cond.false:
12084 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12085 // CHECK17-NEXT:    br label [[COND_END]]
12086 // CHECK17:       cond.end:
12087 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12088 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12089 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12090 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
12091 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12092 // CHECK17:       omp.inner.for.cond:
12093 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12094 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12095 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12096 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12097 // CHECK17:       omp.inner.for.body:
12098 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12099 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12100 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12101 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12102 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
12103 // CHECK17-NEXT:    store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
12104 // CHECK17-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
12105 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])
12106 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12107 // CHECK17:       omp.inner.for.inc:
12108 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12109 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
12110 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12111 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
12112 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
12113 // CHECK17:       omp.inner.for.end:
12114 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12115 // CHECK17:       omp.loop.exit:
12116 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
12117 // CHECK17-NEXT:    ret void
12118 //
12119 //
12120 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined
12121 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
12122 // CHECK17-NEXT:  entry:
12123 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
12124 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
12125 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12126 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12127 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
12128 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12129 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12130 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12131 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12132 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12133 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12134 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12135 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
12136 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
12137 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
12138 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
12139 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
12140 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
12141 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
12142 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
12143 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
12144 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
12145 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
12146 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
12147 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
12148 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
12149 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
12150 // CHECK17-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
12151 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12152 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12153 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
12154 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12155 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12156 // CHECK17-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
12157 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
12158 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
12159 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
12160 // CHECK17:       omp.dispatch.cond:
12161 // CHECK17-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
12162 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
12163 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12164 // CHECK17:       omp.dispatch.body:
12165 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12166 // CHECK17-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
12167 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12168 // CHECK17:       omp.inner.for.cond:
12169 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
12170 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
12171 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
12172 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12173 // CHECK17:       omp.inner.for.body:
12174 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
12175 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
12176 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12177 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
12178 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
12179 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
12180 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
12181 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]]
12182 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12183 // CHECK17:       omp.body.continue:
12184 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12185 // CHECK17:       omp.inner.for.inc:
12186 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
12187 // CHECK17-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1
12188 // CHECK17-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
12189 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
12190 // CHECK17:       omp.inner.for.end:
12191 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12192 // CHECK17:       omp.dispatch.inc:
12193 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
12194 // CHECK17:       omp.dispatch.end:
12195 // CHECK17-NEXT:    ret void
12196 //
12197 //
12198 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
12199 // CHECK17-SAME: () #[[ATTR6:[0-9]+]] {
12200 // CHECK17-NEXT:  entry:
12201 // CHECK17-NEXT:    call void @__tgt_register_requires(i64 1)
12202 // CHECK17-NEXT:    ret void
12203 //
12204 //
12205 // CHECK19-LABEL: define {{[^@]+}}@main
12206 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
12207 // CHECK19-NEXT:  entry:
12208 // CHECK19-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
12209 // CHECK19-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
12210 // CHECK19-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 4
12211 // CHECK19-NEXT:    [[N:%.*]] = alloca i32, align 4
12212 // CHECK19-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 4
12213 // CHECK19-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
12214 // CHECK19-NEXT:    [[M:%.*]] = alloca i32, align 4
12215 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12216 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4
12217 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4
12218 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4
12219 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
12220 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12221 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12222 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12223 // CHECK19-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
12224 // CHECK19-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
12225 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4
12226 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4
12227 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4
12228 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
12229 // CHECK19-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
12230 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
12231 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
12232 // CHECK19-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12233 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_18:%.*]] = alloca i32, align 4
12234 // CHECK19-NEXT:    [[N_CASTED19:%.*]] = alloca i32, align 4
12235 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
12236 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS20:%.*]] = alloca [4 x ptr], align 4
12237 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS21:%.*]] = alloca [4 x ptr], align 4
12238 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS22:%.*]] = alloca [4 x ptr], align 4
12239 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES23:%.*]] = alloca [4 x i64], align 4
12240 // CHECK19-NEXT:    [[_TMP24:%.*]] = alloca i32, align 4
12241 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
12242 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_26:%.*]] = alloca i32, align 4
12243 // CHECK19-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12244 // CHECK19-NEXT:    [[N_CASTED34:%.*]] = alloca i32, align 4
12245 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS35:%.*]] = alloca [3 x ptr], align 4
12246 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS36:%.*]] = alloca [3 x ptr], align 4
12247 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS37:%.*]] = alloca [3 x ptr], align 4
12248 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES38:%.*]] = alloca [3 x i64], align 4
12249 // CHECK19-NEXT:    [[_TMP39:%.*]] = alloca i32, align 4
12250 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
12251 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_41:%.*]] = alloca i32, align 4
12252 // CHECK19-NEXT:    [[KERNEL_ARGS46:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12253 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_49:%.*]] = alloca i32, align 4
12254 // CHECK19-NEXT:    [[N_CASTED50:%.*]] = alloca i32, align 4
12255 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED51:%.*]] = alloca i32, align 4
12256 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS52:%.*]] = alloca [4 x ptr], align 4
12257 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS53:%.*]] = alloca [4 x ptr], align 4
12258 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS54:%.*]] = alloca [4 x ptr], align 4
12259 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES55:%.*]] = alloca [4 x i64], align 4
12260 // CHECK19-NEXT:    [[_TMP56:%.*]] = alloca i32, align 4
12261 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_57:%.*]] = alloca i32, align 4
12262 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_58:%.*]] = alloca i32, align 4
12263 // CHECK19-NEXT:    [[KERNEL_ARGS63:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12264 // CHECK19-NEXT:    store i32 0, ptr [[RETVAL]], align 4
12265 // CHECK19-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
12266 // CHECK19-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4
12267 // CHECK19-NEXT:    store i32 100, ptr [[N]], align 4
12268 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
12269 // CHECK19-NEXT:    [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()
12270 // CHECK19-NEXT:    store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4
12271 // CHECK19-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
12272 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4
12273 // CHECK19-NEXT:    store i32 10, ptr [[M]], align 4
12274 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N]], align 4
12275 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
12276 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
12277 // CHECK19-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
12278 // CHECK19-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
12279 // CHECK19-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false)
12280 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12281 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[TMP6]], align 4
12282 // CHECK19-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12283 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[TMP7]], align 4
12284 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
12285 // CHECK19-NEXT:    store ptr null, ptr [[TMP8]], align 4
12286 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
12287 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP9]], align 4
12288 // CHECK19-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
12289 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP10]], align 4
12290 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
12291 // CHECK19-NEXT:    store ptr null, ptr [[TMP11]], align 4
12292 // CHECK19-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
12293 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 4
12294 // CHECK19-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
12295 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 4
12296 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
12297 // CHECK19-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 4
12298 // CHECK19-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
12299 // CHECK19-NEXT:    store ptr null, ptr [[TMP15]], align 4
12300 // CHECK19-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12301 // CHECK19-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12302 // CHECK19-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12303 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 4
12304 // CHECK19-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
12305 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12306 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
12307 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12308 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12309 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
12310 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12311 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
12312 // CHECK19-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i64
12313 // CHECK19-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
12314 // CHECK19-NEXT:    store i32 2, ptr [[TMP23]], align 4
12315 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
12316 // CHECK19-NEXT:    store i32 3, ptr [[TMP24]], align 4
12317 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
12318 // CHECK19-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 4
12319 // CHECK19-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
12320 // CHECK19-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 4
12321 // CHECK19-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
12322 // CHECK19-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 4
12323 // CHECK19-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
12324 // CHECK19-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 4
12325 // CHECK19-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
12326 // CHECK19-NEXT:    store ptr null, ptr [[TMP29]], align 4
12327 // CHECK19-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
12328 // CHECK19-NEXT:    store ptr null, ptr [[TMP30]], align 4
12329 // CHECK19-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
12330 // CHECK19-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 8
12331 // CHECK19-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
12332 // CHECK19-NEXT:    store i64 0, ptr [[TMP32]], align 8
12333 // CHECK19-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
12334 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
12335 // CHECK19-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
12336 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
12337 // CHECK19-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
12338 // CHECK19-NEXT:    store i32 0, ptr [[TMP35]], align 4
12339 // CHECK19-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.region_id, ptr [[KERNEL_ARGS]])
12340 // CHECK19-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
12341 // CHECK19-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12342 // CHECK19:       omp_offload.failed:
12343 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3:[0-9]+]]
12344 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
12345 // CHECK19:       omp_offload.cont:
12346 // CHECK19-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 4
12347 // CHECK19-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
12348 // CHECK19-NEXT:    [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4
12349 // CHECK19-NEXT:    [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4
12350 // CHECK19-NEXT:    [[TMP41:%.*]] = sext i32 [[TMP40]] to i64
12351 // CHECK19-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false)
12352 // CHECK19-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12353 // CHECK19-NEXT:    store i32 [[TMP39]], ptr [[TMP42]], align 4
12354 // CHECK19-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12355 // CHECK19-NEXT:    store i32 [[TMP39]], ptr [[TMP43]], align 4
12356 // CHECK19-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
12357 // CHECK19-NEXT:    store ptr null, ptr [[TMP44]], align 4
12358 // CHECK19-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
12359 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP45]], align 4
12360 // CHECK19-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
12361 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP46]], align 4
12362 // CHECK19-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
12363 // CHECK19-NEXT:    store ptr null, ptr [[TMP47]], align 4
12364 // CHECK19-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
12365 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 4
12366 // CHECK19-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
12367 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP49]], align 4
12368 // CHECK19-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
12369 // CHECK19-NEXT:    store i64 [[TMP41]], ptr [[TMP50]], align 4
12370 // CHECK19-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
12371 // CHECK19-NEXT:    store ptr null, ptr [[TMP51]], align 4
12372 // CHECK19-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12373 // CHECK19-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12374 // CHECK19-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
12375 // CHECK19-NEXT:    [[TMP55:%.*]] = load i32, ptr [[N]], align 4
12376 // CHECK19-NEXT:    store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4
12377 // CHECK19-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
12378 // CHECK19-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0
12379 // CHECK19-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
12380 // CHECK19-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
12381 // CHECK19-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
12382 // CHECK19-NEXT:    [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
12383 // CHECK19-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1
12384 // CHECK19-NEXT:    [[TMP58:%.*]] = zext i32 [[ADD14]] to i64
12385 // CHECK19-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
12386 // CHECK19-NEXT:    store i32 2, ptr [[TMP59]], align 4
12387 // CHECK19-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
12388 // CHECK19-NEXT:    store i32 3, ptr [[TMP60]], align 4
12389 // CHECK19-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
12390 // CHECK19-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 4
12391 // CHECK19-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
12392 // CHECK19-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 4
12393 // CHECK19-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
12394 // CHECK19-NEXT:    store ptr [[TMP54]], ptr [[TMP63]], align 4
12395 // CHECK19-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
12396 // CHECK19-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4
12397 // CHECK19-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
12398 // CHECK19-NEXT:    store ptr null, ptr [[TMP65]], align 4
12399 // CHECK19-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
12400 // CHECK19-NEXT:    store ptr null, ptr [[TMP66]], align 4
12401 // CHECK19-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
12402 // CHECK19-NEXT:    store i64 [[TMP58]], ptr [[TMP67]], align 8
12403 // CHECK19-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
12404 // CHECK19-NEXT:    store i64 0, ptr [[TMP68]], align 8
12405 // CHECK19-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
12406 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
12407 // CHECK19-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
12408 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP70]], align 4
12409 // CHECK19-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
12410 // CHECK19-NEXT:    store i32 0, ptr [[TMP71]], align 4
12411 // CHECK19-NEXT:    [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.region_id, ptr [[KERNEL_ARGS15]])
12412 // CHECK19-NEXT:    [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0
12413 // CHECK19-NEXT:    br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
12414 // CHECK19:       omp_offload.failed16:
12415 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]
12416 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
12417 // CHECK19:       omp_offload.cont17:
12418 // CHECK19-NEXT:    [[TMP74:%.*]] = load i32, ptr [[M]], align 4
12419 // CHECK19-NEXT:    store i32 [[TMP74]], ptr [[DOTCAPTURE_EXPR_18]], align 4
12420 // CHECK19-NEXT:    [[TMP75:%.*]] = load i32, ptr [[N]], align 4
12421 // CHECK19-NEXT:    store i32 [[TMP75]], ptr [[N_CASTED19]], align 4
12422 // CHECK19-NEXT:    [[TMP76:%.*]] = load i32, ptr [[N_CASTED19]], align 4
12423 // CHECK19-NEXT:    [[TMP77:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_18]], align 4
12424 // CHECK19-NEXT:    store i32 [[TMP77]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
12425 // CHECK19-NEXT:    [[TMP78:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
12426 // CHECK19-NEXT:    [[TMP79:%.*]] = mul nuw i32 [[TMP0]], 4
12427 // CHECK19-NEXT:    [[TMP80:%.*]] = sext i32 [[TMP79]] to i64
12428 // CHECK19-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES23]], ptr align 4 @.offload_sizes.3, i32 32, i1 false)
12429 // CHECK19-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
12430 // CHECK19-NEXT:    store i32 [[TMP76]], ptr [[TMP81]], align 4
12431 // CHECK19-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
12432 // CHECK19-NEXT:    store i32 [[TMP76]], ptr [[TMP82]], align 4
12433 // CHECK19-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 0
12434 // CHECK19-NEXT:    store ptr null, ptr [[TMP83]], align 4
12435 // CHECK19-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 1
12436 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP84]], align 4
12437 // CHECK19-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 1
12438 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP85]], align 4
12439 // CHECK19-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 1
12440 // CHECK19-NEXT:    store ptr null, ptr [[TMP86]], align 4
12441 // CHECK19-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 2
12442 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP87]], align 4
12443 // CHECK19-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 2
12444 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP88]], align 4
12445 // CHECK19-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 2
12446 // CHECK19-NEXT:    store i64 [[TMP80]], ptr [[TMP89]], align 4
12447 // CHECK19-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 2
12448 // CHECK19-NEXT:    store ptr null, ptr [[TMP90]], align 4
12449 // CHECK19-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 3
12450 // CHECK19-NEXT:    store i32 [[TMP78]], ptr [[TMP91]], align 4
12451 // CHECK19-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 3
12452 // CHECK19-NEXT:    store i32 [[TMP78]], ptr [[TMP92]], align 4
12453 // CHECK19-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS22]], i32 0, i32 3
12454 // CHECK19-NEXT:    store ptr null, ptr [[TMP93]], align 4
12455 // CHECK19-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS20]], i32 0, i32 0
12456 // CHECK19-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS21]], i32 0, i32 0
12457 // CHECK19-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES23]], i32 0, i32 0
12458 // CHECK19-NEXT:    [[TMP97:%.*]] = load i32, ptr [[N]], align 4
12459 // CHECK19-NEXT:    store i32 [[TMP97]], ptr [[DOTCAPTURE_EXPR_25]], align 4
12460 // CHECK19-NEXT:    [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
12461 // CHECK19-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP98]], 0
12462 // CHECK19-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
12463 // CHECK19-NEXT:    [[SUB29:%.*]] = sub nsw i32 [[DIV28]], 1
12464 // CHECK19-NEXT:    store i32 [[SUB29]], ptr [[DOTCAPTURE_EXPR_26]], align 4
12465 // CHECK19-NEXT:    [[TMP99:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_26]], align 4
12466 // CHECK19-NEXT:    [[ADD30:%.*]] = add nsw i32 [[TMP99]], 1
12467 // CHECK19-NEXT:    [[TMP100:%.*]] = zext i32 [[ADD30]] to i64
12468 // CHECK19-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
12469 // CHECK19-NEXT:    store i32 2, ptr [[TMP101]], align 4
12470 // CHECK19-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
12471 // CHECK19-NEXT:    store i32 4, ptr [[TMP102]], align 4
12472 // CHECK19-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
12473 // CHECK19-NEXT:    store ptr [[TMP94]], ptr [[TMP103]], align 4
12474 // CHECK19-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
12475 // CHECK19-NEXT:    store ptr [[TMP95]], ptr [[TMP104]], align 4
12476 // CHECK19-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
12477 // CHECK19-NEXT:    store ptr [[TMP96]], ptr [[TMP105]], align 4
12478 // CHECK19-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
12479 // CHECK19-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP106]], align 4
12480 // CHECK19-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
12481 // CHECK19-NEXT:    store ptr null, ptr [[TMP107]], align 4
12482 // CHECK19-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
12483 // CHECK19-NEXT:    store ptr null, ptr [[TMP108]], align 4
12484 // CHECK19-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
12485 // CHECK19-NEXT:    store i64 [[TMP100]], ptr [[TMP109]], align 8
12486 // CHECK19-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
12487 // CHECK19-NEXT:    store i64 0, ptr [[TMP110]], align 8
12488 // CHECK19-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
12489 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4
12490 // CHECK19-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
12491 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP112]], align 4
12492 // CHECK19-NEXT:    [[TMP113:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
12493 // CHECK19-NEXT:    store i32 0, ptr [[TMP113]], align 4
12494 // CHECK19-NEXT:    [[TMP114:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.region_id, ptr [[KERNEL_ARGS31]])
12495 // CHECK19-NEXT:    [[TMP115:%.*]] = icmp ne i32 [[TMP114]], 0
12496 // CHECK19-NEXT:    br i1 [[TMP115]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
12497 // CHECK19:       omp_offload.failed32:
12498 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147(i32 [[TMP76]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP78]]) #[[ATTR3]]
12499 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
12500 // CHECK19:       omp_offload.cont33:
12501 // CHECK19-NEXT:    [[TMP116:%.*]] = load i32, ptr [[N]], align 4
12502 // CHECK19-NEXT:    store i32 [[TMP116]], ptr [[N_CASTED34]], align 4
12503 // CHECK19-NEXT:    [[TMP117:%.*]] = load i32, ptr [[N_CASTED34]], align 4
12504 // CHECK19-NEXT:    [[TMP118:%.*]] = mul nuw i32 [[TMP0]], 4
12505 // CHECK19-NEXT:    [[TMP119:%.*]] = sext i32 [[TMP118]] to i64
12506 // CHECK19-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES38]], ptr align 4 @.offload_sizes.5, i32 24, i1 false)
12507 // CHECK19-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
12508 // CHECK19-NEXT:    store i32 [[TMP117]], ptr [[TMP120]], align 4
12509 // CHECK19-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
12510 // CHECK19-NEXT:    store i32 [[TMP117]], ptr [[TMP121]], align 4
12511 // CHECK19-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 0
12512 // CHECK19-NEXT:    store ptr null, ptr [[TMP122]], align 4
12513 // CHECK19-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 1
12514 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP123]], align 4
12515 // CHECK19-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 1
12516 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP124]], align 4
12517 // CHECK19-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 1
12518 // CHECK19-NEXT:    store ptr null, ptr [[TMP125]], align 4
12519 // CHECK19-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 2
12520 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP126]], align 4
12521 // CHECK19-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 2
12522 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP127]], align 4
12523 // CHECK19-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 2
12524 // CHECK19-NEXT:    store i64 [[TMP119]], ptr [[TMP128]], align 4
12525 // CHECK19-NEXT:    [[TMP129:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS37]], i32 0, i32 2
12526 // CHECK19-NEXT:    store ptr null, ptr [[TMP129]], align 4
12527 // CHECK19-NEXT:    [[TMP130:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS35]], i32 0, i32 0
12528 // CHECK19-NEXT:    [[TMP131:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS36]], i32 0, i32 0
12529 // CHECK19-NEXT:    [[TMP132:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES38]], i32 0, i32 0
12530 // CHECK19-NEXT:    [[TMP133:%.*]] = load i32, ptr [[N]], align 4
12531 // CHECK19-NEXT:    store i32 [[TMP133]], ptr [[DOTCAPTURE_EXPR_40]], align 4
12532 // CHECK19-NEXT:    [[TMP134:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
12533 // CHECK19-NEXT:    [[SUB42:%.*]] = sub nsw i32 [[TMP134]], 0
12534 // CHECK19-NEXT:    [[DIV43:%.*]] = sdiv i32 [[SUB42]], 1
12535 // CHECK19-NEXT:    [[SUB44:%.*]] = sub nsw i32 [[DIV43]], 1
12536 // CHECK19-NEXT:    store i32 [[SUB44]], ptr [[DOTCAPTURE_EXPR_41]], align 4
12537 // CHECK19-NEXT:    [[TMP135:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_41]], align 4
12538 // CHECK19-NEXT:    [[ADD45:%.*]] = add nsw i32 [[TMP135]], 1
12539 // CHECK19-NEXT:    [[TMP136:%.*]] = zext i32 [[ADD45]] to i64
12540 // CHECK19-NEXT:    [[TMP137:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 0
12541 // CHECK19-NEXT:    store i32 2, ptr [[TMP137]], align 4
12542 // CHECK19-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 1
12543 // CHECK19-NEXT:    store i32 3, ptr [[TMP138]], align 4
12544 // CHECK19-NEXT:    [[TMP139:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 2
12545 // CHECK19-NEXT:    store ptr [[TMP130]], ptr [[TMP139]], align 4
12546 // CHECK19-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 3
12547 // CHECK19-NEXT:    store ptr [[TMP131]], ptr [[TMP140]], align 4
12548 // CHECK19-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 4
12549 // CHECK19-NEXT:    store ptr [[TMP132]], ptr [[TMP141]], align 4
12550 // CHECK19-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 5
12551 // CHECK19-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP142]], align 4
12552 // CHECK19-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 6
12553 // CHECK19-NEXT:    store ptr null, ptr [[TMP143]], align 4
12554 // CHECK19-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 7
12555 // CHECK19-NEXT:    store ptr null, ptr [[TMP144]], align 4
12556 // CHECK19-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 8
12557 // CHECK19-NEXT:    store i64 [[TMP136]], ptr [[TMP145]], align 8
12558 // CHECK19-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 9
12559 // CHECK19-NEXT:    store i64 0, ptr [[TMP146]], align 8
12560 // CHECK19-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 10
12561 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP147]], align 4
12562 // CHECK19-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 11
12563 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP148]], align 4
12564 // CHECK19-NEXT:    [[TMP149:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS46]], i32 0, i32 12
12565 // CHECK19-NEXT:    store i32 0, ptr [[TMP149]], align 4
12566 // CHECK19-NEXT:    [[TMP150:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.region_id, ptr [[KERNEL_ARGS46]])
12567 // CHECK19-NEXT:    [[TMP151:%.*]] = icmp ne i32 [[TMP150]], 0
12568 // CHECK19-NEXT:    br i1 [[TMP151]], label [[OMP_OFFLOAD_FAILED47:%.*]], label [[OMP_OFFLOAD_CONT48:%.*]]
12569 // CHECK19:       omp_offload.failed47:
12570 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151(i32 [[TMP117]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR3]]
12571 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT48]]
12572 // CHECK19:       omp_offload.cont48:
12573 // CHECK19-NEXT:    [[TMP152:%.*]] = load i32, ptr [[M]], align 4
12574 // CHECK19-NEXT:    store i32 [[TMP152]], ptr [[DOTCAPTURE_EXPR_49]], align 4
12575 // CHECK19-NEXT:    [[TMP153:%.*]] = load i32, ptr [[N]], align 4
12576 // CHECK19-NEXT:    store i32 [[TMP153]], ptr [[N_CASTED50]], align 4
12577 // CHECK19-NEXT:    [[TMP154:%.*]] = load i32, ptr [[N_CASTED50]], align 4
12578 // CHECK19-NEXT:    [[TMP155:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_49]], align 4
12579 // CHECK19-NEXT:    store i32 [[TMP155]], ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4
12580 // CHECK19-NEXT:    [[TMP156:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED51]], align 4
12581 // CHECK19-NEXT:    [[TMP157:%.*]] = mul nuw i32 [[TMP0]], 4
12582 // CHECK19-NEXT:    [[TMP158:%.*]] = sext i32 [[TMP157]] to i64
12583 // CHECK19-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES55]], ptr align 4 @.offload_sizes.7, i32 32, i1 false)
12584 // CHECK19-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
12585 // CHECK19-NEXT:    store i32 [[TMP154]], ptr [[TMP159]], align 4
12586 // CHECK19-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
12587 // CHECK19-NEXT:    store i32 [[TMP154]], ptr [[TMP160]], align 4
12588 // CHECK19-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 0
12589 // CHECK19-NEXT:    store ptr null, ptr [[TMP161]], align 4
12590 // CHECK19-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 1
12591 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP162]], align 4
12592 // CHECK19-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 1
12593 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP163]], align 4
12594 // CHECK19-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 1
12595 // CHECK19-NEXT:    store ptr null, ptr [[TMP164]], align 4
12596 // CHECK19-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 2
12597 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP165]], align 4
12598 // CHECK19-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 2
12599 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP166]], align 4
12600 // CHECK19-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 2
12601 // CHECK19-NEXT:    store i64 [[TMP158]], ptr [[TMP167]], align 4
12602 // CHECK19-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 2
12603 // CHECK19-NEXT:    store ptr null, ptr [[TMP168]], align 4
12604 // CHECK19-NEXT:    [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 3
12605 // CHECK19-NEXT:    store i32 [[TMP156]], ptr [[TMP169]], align 4
12606 // CHECK19-NEXT:    [[TMP170:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 3
12607 // CHECK19-NEXT:    store i32 [[TMP156]], ptr [[TMP170]], align 4
12608 // CHECK19-NEXT:    [[TMP171:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS54]], i32 0, i32 3
12609 // CHECK19-NEXT:    store ptr null, ptr [[TMP171]], align 4
12610 // CHECK19-NEXT:    [[TMP172:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS52]], i32 0, i32 0
12611 // CHECK19-NEXT:    [[TMP173:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS53]], i32 0, i32 0
12612 // CHECK19-NEXT:    [[TMP174:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES55]], i32 0, i32 0
12613 // CHECK19-NEXT:    [[TMP175:%.*]] = load i32, ptr [[N]], align 4
12614 // CHECK19-NEXT:    store i32 [[TMP175]], ptr [[DOTCAPTURE_EXPR_57]], align 4
12615 // CHECK19-NEXT:    [[TMP176:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_57]], align 4
12616 // CHECK19-NEXT:    [[SUB59:%.*]] = sub nsw i32 [[TMP176]], 0
12617 // CHECK19-NEXT:    [[DIV60:%.*]] = sdiv i32 [[SUB59]], 1
12618 // CHECK19-NEXT:    [[SUB61:%.*]] = sub nsw i32 [[DIV60]], 1
12619 // CHECK19-NEXT:    store i32 [[SUB61]], ptr [[DOTCAPTURE_EXPR_58]], align 4
12620 // CHECK19-NEXT:    [[TMP177:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_58]], align 4
12621 // CHECK19-NEXT:    [[ADD62:%.*]] = add nsw i32 [[TMP177]], 1
12622 // CHECK19-NEXT:    [[TMP178:%.*]] = zext i32 [[ADD62]] to i64
12623 // CHECK19-NEXT:    [[TMP179:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 0
12624 // CHECK19-NEXT:    store i32 2, ptr [[TMP179]], align 4
12625 // CHECK19-NEXT:    [[TMP180:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 1
12626 // CHECK19-NEXT:    store i32 4, ptr [[TMP180]], align 4
12627 // CHECK19-NEXT:    [[TMP181:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 2
12628 // CHECK19-NEXT:    store ptr [[TMP172]], ptr [[TMP181]], align 4
12629 // CHECK19-NEXT:    [[TMP182:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 3
12630 // CHECK19-NEXT:    store ptr [[TMP173]], ptr [[TMP182]], align 4
12631 // CHECK19-NEXT:    [[TMP183:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 4
12632 // CHECK19-NEXT:    store ptr [[TMP174]], ptr [[TMP183]], align 4
12633 // CHECK19-NEXT:    [[TMP184:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 5
12634 // CHECK19-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP184]], align 4
12635 // CHECK19-NEXT:    [[TMP185:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 6
12636 // CHECK19-NEXT:    store ptr null, ptr [[TMP185]], align 4
12637 // CHECK19-NEXT:    [[TMP186:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 7
12638 // CHECK19-NEXT:    store ptr null, ptr [[TMP186]], align 4
12639 // CHECK19-NEXT:    [[TMP187:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 8
12640 // CHECK19-NEXT:    store i64 [[TMP178]], ptr [[TMP187]], align 8
12641 // CHECK19-NEXT:    [[TMP188:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 9
12642 // CHECK19-NEXT:    store i64 0, ptr [[TMP188]], align 8
12643 // CHECK19-NEXT:    [[TMP189:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 10
12644 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP189]], align 4
12645 // CHECK19-NEXT:    [[TMP190:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 11
12646 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP190]], align 4
12647 // CHECK19-NEXT:    [[TMP191:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS63]], i32 0, i32 12
12648 // CHECK19-NEXT:    store i32 0, ptr [[TMP191]], align 4
12649 // CHECK19-NEXT:    [[TMP192:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.region_id, ptr [[KERNEL_ARGS63]])
12650 // CHECK19-NEXT:    [[TMP193:%.*]] = icmp ne i32 [[TMP192]], 0
12651 // CHECK19-NEXT:    br i1 [[TMP193]], label [[OMP_OFFLOAD_FAILED64:%.*]], label [[OMP_OFFLOAD_CONT65:%.*]]
12652 // CHECK19:       omp_offload.failed64:
12653 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155(i32 [[TMP154]], i32 [[TMP0]], ptr [[VLA]], i32 [[TMP156]]) #[[ATTR3]]
12654 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT65]]
12655 // CHECK19:       omp_offload.cont65:
12656 // CHECK19-NEXT:    [[TMP194:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
12657 // CHECK19-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP194]])
12658 // CHECK19-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
12659 // CHECK19-NEXT:    [[TMP195:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4
12660 // CHECK19-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP195]])
12661 // CHECK19-NEXT:    [[TMP196:%.*]] = load i32, ptr [[RETVAL]], align 4
12662 // CHECK19-NEXT:    ret i32 [[TMP196]]
12663 //
12664 //
12665 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139
12666 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
12667 // CHECK19-NEXT:  entry:
12668 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12669 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12670 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12671 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12672 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
12673 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12674 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12675 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12676 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12677 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
12678 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
12679 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
12680 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]])
12681 // CHECK19-NEXT:    ret void
12682 //
12683 //
12684 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined
12685 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12686 // CHECK19-NEXT:  entry:
12687 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12688 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12689 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12690 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12691 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12692 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12693 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12694 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12695 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12696 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
12697 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12698 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12699 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12700 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12701 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
12702 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12703 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12704 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12705 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
12706 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12707 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12708 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12709 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12710 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
12711 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
12712 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12713 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12714 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12715 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12716 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
12717 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
12718 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12719 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12720 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12721 // CHECK19:       omp.precond.then:
12722 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
12723 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12724 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
12725 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12726 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12727 // CHECK19-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12728 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
12729 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12730 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12731 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12732 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
12733 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12734 // CHECK19:       cond.true:
12735 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12736 // CHECK19-NEXT:    br label [[COND_END:%.*]]
12737 // CHECK19:       cond.false:
12738 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12739 // CHECK19-NEXT:    br label [[COND_END]]
12740 // CHECK19:       cond.end:
12741 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
12742 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12743 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12744 // CHECK19-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
12745 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12746 // CHECK19:       omp.inner.for.cond:
12747 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12748 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12749 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
12750 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12751 // CHECK19:       omp.inner.for.body:
12752 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12753 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12754 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4
12755 // CHECK19-NEXT:    store i32 [[TMP17]], ptr [[N_CASTED]], align 4
12756 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4
12757 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]])
12758 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12759 // CHECK19:       omp.inner.for.inc:
12760 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12761 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
12762 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
12763 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
12764 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
12765 // CHECK19:       omp.inner.for.end:
12766 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12767 // CHECK19:       omp.loop.exit:
12768 // CHECK19-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12769 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
12770 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
12771 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
12772 // CHECK19:       omp.precond.end:
12773 // CHECK19-NEXT:    ret void
12774 //
12775 //
12776 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l139.omp_outlined.omp_outlined
12777 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12778 // CHECK19-NEXT:  entry:
12779 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12780 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12781 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12782 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12783 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12784 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12785 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12786 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12787 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12788 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12789 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12790 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
12791 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12792 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12793 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12794 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12795 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
12796 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12797 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12798 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12799 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12800 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
12801 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12802 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12803 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12804 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12805 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
12806 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
12807 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12808 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12809 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12810 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12811 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
12812 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
12813 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12814 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12815 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12816 // CHECK19:       omp.precond.then:
12817 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
12818 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12819 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
12820 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12821 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12822 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4
12823 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
12824 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12825 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12826 // CHECK19-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12827 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
12828 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12829 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12830 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12831 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
12832 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12833 // CHECK19:       cond.true:
12834 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12835 // CHECK19-NEXT:    br label [[COND_END:%.*]]
12836 // CHECK19:       cond.false:
12837 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12838 // CHECK19-NEXT:    br label [[COND_END]]
12839 // CHECK19:       cond.end:
12840 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
12841 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
12842 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12843 // CHECK19-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
12844 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12845 // CHECK19:       omp.inner.for.cond:
12846 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12847 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12848 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
12849 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12850 // CHECK19:       omp.inner.for.body:
12851 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12852 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
12853 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12854 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
12855 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I3]], align 4
12856 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]]
12857 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
12858 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12859 // CHECK19:       omp.body.continue:
12860 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12861 // CHECK19:       omp.inner.for.inc:
12862 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12863 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
12864 // CHECK19-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
12865 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
12866 // CHECK19:       omp.inner.for.end:
12867 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12868 // CHECK19:       omp.loop.exit:
12869 // CHECK19-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12870 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
12871 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
12872 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
12873 // CHECK19:       omp.precond.end:
12874 // CHECK19-NEXT:    ret void
12875 //
12876 //
12877 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143
12878 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12879 // CHECK19-NEXT:  entry:
12880 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12881 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12882 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12883 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12884 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
12885 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12886 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12887 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12888 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12889 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
12890 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
12891 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
12892 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]])
12893 // CHECK19-NEXT:    ret void
12894 //
12895 //
12896 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined
12897 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12898 // CHECK19-NEXT:  entry:
12899 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12900 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12901 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12902 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12903 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12904 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12905 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12906 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12907 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12908 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
12909 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12910 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12911 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12912 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12913 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
12914 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12915 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12916 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12917 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
12918 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12919 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12920 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12921 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12922 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
12923 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
12924 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12925 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
12926 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12927 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12928 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
12929 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
12930 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12931 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
12932 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12933 // CHECK19:       omp.precond.then:
12934 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
12935 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12936 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
12937 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12938 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12939 // CHECK19-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12940 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
12941 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12942 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12943 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12944 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
12945 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12946 // CHECK19:       cond.true:
12947 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12948 // CHECK19-NEXT:    br label [[COND_END:%.*]]
12949 // CHECK19:       cond.false:
12950 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12951 // CHECK19-NEXT:    br label [[COND_END]]
12952 // CHECK19:       cond.end:
12953 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
12954 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12955 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12956 // CHECK19-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
12957 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12958 // CHECK19:       omp.inner.for.cond:
12959 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12960 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12961 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
12962 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12963 // CHECK19:       omp.inner.for.body:
12964 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12965 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12966 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4
12967 // CHECK19-NEXT:    store i32 [[TMP17]], ptr [[N_CASTED]], align 4
12968 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4
12969 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]])
12970 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12971 // CHECK19:       omp.inner.for.inc:
12972 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12973 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
12974 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
12975 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
12976 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
12977 // CHECK19:       omp.inner.for.end:
12978 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12979 // CHECK19:       omp.loop.exit:
12980 // CHECK19-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12981 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
12982 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
12983 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
12984 // CHECK19:       omp.precond.end:
12985 // CHECK19-NEXT:    ret void
12986 //
12987 //
12988 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l143.omp_outlined.omp_outlined
12989 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12990 // CHECK19-NEXT:  entry:
12991 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12992 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12993 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12994 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12995 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12996 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12997 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12998 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12999 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13000 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13001 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13002 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13003 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13004 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13005 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13006 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13007 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
13008 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13009 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13010 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13011 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13012 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13013 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13014 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13015 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13016 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13017 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
13018 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
13019 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13020 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13021 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13022 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13023 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13024 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13025 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13026 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13027 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13028 // CHECK19:       omp.precond.then:
13029 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
13030 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13031 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
13032 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13033 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13034 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4
13035 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
13036 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13037 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13038 // CHECK19-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13039 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
13040 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13041 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13042 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13043 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
13044 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13045 // CHECK19:       cond.true:
13046 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13047 // CHECK19-NEXT:    br label [[COND_END:%.*]]
13048 // CHECK19:       cond.false:
13049 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13050 // CHECK19-NEXT:    br label [[COND_END]]
13051 // CHECK19:       cond.end:
13052 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
13053 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
13054 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13055 // CHECK19-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
13056 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13057 // CHECK19:       omp.inner.for.cond:
13058 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13059 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13060 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
13061 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13062 // CHECK19:       omp.inner.for.body:
13063 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13064 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
13065 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13066 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
13067 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I3]], align 4
13068 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]]
13069 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
13070 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13071 // CHECK19:       omp.body.continue:
13072 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13073 // CHECK19:       omp.inner.for.inc:
13074 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13075 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP19]], 1
13076 // CHECK19-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
13077 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
13078 // CHECK19:       omp.inner.for.end:
13079 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13080 // CHECK19:       omp.loop.exit:
13081 // CHECK19-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13082 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
13083 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
13084 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13085 // CHECK19:       omp.precond.end:
13086 // CHECK19-NEXT:    ret void
13087 //
13088 //
13089 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147
13090 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13091 // CHECK19-NEXT:  entry:
13092 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13093 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13094 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13095 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13096 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13097 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13098 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13099 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13100 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13101 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13102 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13103 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13104 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
13105 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
13106 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
13107 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13108 // CHECK19-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13109 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13110 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]])
13111 // CHECK19-NEXT:    ret void
13112 //
13113 //
13114 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined
13115 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13116 // CHECK19-NEXT:  entry:
13117 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13118 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13119 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13120 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13121 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13122 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13123 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13124 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13125 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13126 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13127 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13128 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13129 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13130 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13131 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13132 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
13133 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13134 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13135 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13136 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13137 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13138 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13139 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13140 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13141 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13142 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13143 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
13144 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13145 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13146 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13147 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13148 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13149 // CHECK19-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
13150 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13151 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13152 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13153 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13154 // CHECK19:       omp.precond.then:
13155 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13156 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13157 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
13158 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13159 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13160 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13161 // CHECK19-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13162 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
13163 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP6]])
13164 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13165 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13166 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13167 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13168 // CHECK19:       cond.true:
13169 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13170 // CHECK19-NEXT:    br label [[COND_END:%.*]]
13171 // CHECK19:       cond.false:
13172 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13173 // CHECK19-NEXT:    br label [[COND_END]]
13174 // CHECK19:       cond.end:
13175 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13176 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13177 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13178 // CHECK19-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
13179 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13180 // CHECK19:       omp.inner.for.cond:
13181 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13182 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13183 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP15]], 1
13184 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP14]], [[ADD]]
13185 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13186 // CHECK19:       omp.inner.for.body:
13187 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13188 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13189 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_ADDR]], align 4
13190 // CHECK19-NEXT:    store i32 [[TMP18]], ptr [[N_CASTED]], align 4
13191 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N_CASTED]], align 4
13192 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13193 // CHECK19-NEXT:    store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13194 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13195 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], i32 [[TMP19]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP21]])
13196 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13197 // CHECK19:       omp.inner.for.inc:
13198 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13199 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13200 // CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
13201 // CHECK19-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
13202 // CHECK19-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13203 // CHECK19-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13204 // CHECK19-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP24]], [[TMP25]]
13205 // CHECK19-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4
13206 // CHECK19-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13207 // CHECK19-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13208 // CHECK19-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP26]], [[TMP27]]
13209 // CHECK19-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4
13210 // CHECK19-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13211 // CHECK19-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13212 // CHECK19-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP28]], [[TMP29]]
13213 // CHECK19-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
13214 // CHECK19:       cond.true11:
13215 // CHECK19-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13216 // CHECK19-NEXT:    br label [[COND_END13:%.*]]
13217 // CHECK19:       cond.false12:
13218 // CHECK19-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13219 // CHECK19-NEXT:    br label [[COND_END13]]
13220 // CHECK19:       cond.end13:
13221 // CHECK19-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP30]], [[COND_TRUE11]] ], [ [[TMP31]], [[COND_FALSE12]] ]
13222 // CHECK19-NEXT:    store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4
13223 // CHECK19-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13224 // CHECK19-NEXT:    store i32 [[TMP32]], ptr [[DOTOMP_IV]], align 4
13225 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
13226 // CHECK19:       omp.inner.for.end:
13227 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13228 // CHECK19:       omp.loop.exit:
13229 // CHECK19-NEXT:    [[TMP33:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13230 // CHECK19-NEXT:    [[TMP34:%.*]] = load i32, ptr [[TMP33]], align 4
13231 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP34]])
13232 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13233 // CHECK19:       omp.precond.end:
13234 // CHECK19-NEXT:    ret void
13235 //
13236 //
13237 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l147.omp_outlined.omp_outlined
13238 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13239 // CHECK19-NEXT:  entry:
13240 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13241 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13242 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13243 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13244 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13245 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13246 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13247 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13248 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13249 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13250 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13251 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13252 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13253 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13254 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13255 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13256 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13257 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
13258 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13259 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13260 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13261 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13262 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13263 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13264 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13265 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13266 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13267 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13268 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
13269 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13270 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13271 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13272 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13273 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13274 // CHECK19-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
13275 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13276 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13277 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13278 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13279 // CHECK19:       omp.precond.then:
13280 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
13281 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13282 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
13283 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13284 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13285 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4
13286 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
13287 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13288 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13289 // CHECK19-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13290 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
13291 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP9]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13292 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13293 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13294 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
13295 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13296 // CHECK19:       cond.true:
13297 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13298 // CHECK19-NEXT:    br label [[COND_END:%.*]]
13299 // CHECK19:       cond.false:
13300 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13301 // CHECK19-NEXT:    br label [[COND_END]]
13302 // CHECK19:       cond.end:
13303 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
13304 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
13305 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13306 // CHECK19-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
13307 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13308 // CHECK19:       omp.inner.for.cond:
13309 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13310 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13311 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP15]], [[TMP16]]
13312 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13313 // CHECK19:       omp.inner.for.body:
13314 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13315 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP17]], 1
13316 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13317 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
13318 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[I4]], align 4
13319 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP18]]
13320 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
13321 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13322 // CHECK19:       omp.body.continue:
13323 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13324 // CHECK19:       omp.inner.for.inc:
13325 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13326 // CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP19]], 1
13327 // CHECK19-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
13328 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
13329 // CHECK19:       omp.inner.for.end:
13330 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13331 // CHECK19:       omp.loop.exit:
13332 // CHECK19-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13333 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
13334 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
13335 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13336 // CHECK19:       omp.precond.end:
13337 // CHECK19-NEXT:    ret void
13338 //
13339 //
13340 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151
13341 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13342 // CHECK19-NEXT:  entry:
13343 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13344 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13345 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13346 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13347 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13348 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13349 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13350 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13351 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13352 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
13353 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
13354 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
13355 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]])
13356 // CHECK19-NEXT:    ret void
13357 //
13358 //
13359 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined
13360 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13361 // CHECK19-NEXT:  entry:
13362 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13363 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13364 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13365 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13366 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13367 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13368 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13369 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13370 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13371 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13372 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13373 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13374 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13375 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13376 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
13377 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13378 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13379 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13380 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13381 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13382 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13383 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13384 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13385 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
13386 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
13387 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13388 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13389 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13390 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13391 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13392 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13393 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13394 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13395 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13396 // CHECK19:       omp.precond.then:
13397 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13398 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13399 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
13400 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13401 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13402 // CHECK19-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13403 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
13404 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13405 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13406 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13407 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
13408 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13409 // CHECK19:       cond.true:
13410 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13411 // CHECK19-NEXT:    br label [[COND_END:%.*]]
13412 // CHECK19:       cond.false:
13413 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13414 // CHECK19-NEXT:    br label [[COND_END]]
13415 // CHECK19:       cond.end:
13416 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
13417 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13418 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13419 // CHECK19-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
13420 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13421 // CHECK19:       omp.inner.for.cond:
13422 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13423 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13424 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
13425 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13426 // CHECK19:       omp.inner.for.body:
13427 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13428 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13429 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4
13430 // CHECK19-NEXT:    store i32 [[TMP17]], ptr [[N_CASTED]], align 4
13431 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4
13432 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]])
13433 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13434 // CHECK19:       omp.inner.for.inc:
13435 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13436 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13437 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
13438 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
13439 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
13440 // CHECK19:       omp.inner.for.end:
13441 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13442 // CHECK19:       omp.loop.exit:
13443 // CHECK19-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13444 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
13445 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
13446 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13447 // CHECK19:       omp.precond.end:
13448 // CHECK19-NEXT:    ret void
13449 //
13450 //
13451 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l151.omp_outlined.omp_outlined
13452 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13453 // CHECK19-NEXT:  entry:
13454 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13455 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13456 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13457 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13458 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13459 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13460 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13461 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13462 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13463 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13464 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13465 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13466 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13467 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13468 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13469 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13470 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
13471 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13472 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13473 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13474 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13475 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13476 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13477 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13478 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13479 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13480 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
13481 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
13482 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13483 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13484 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13485 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13486 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13487 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13488 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13489 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13490 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13491 // CHECK19:       omp.precond.then:
13492 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
13493 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13494 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
13495 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13496 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13497 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4
13498 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
13499 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13500 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13501 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13502 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13503 // CHECK19-NEXT:    [[TMP10:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13504 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[TMP10]], align 4
13505 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP11]], i32 1073741859, i32 [[TMP8]], i32 [[TMP9]], i32 1, i32 1)
13506 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
13507 // CHECK19:       omp.dispatch.cond:
13508 // CHECK19-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13509 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
13510 // CHECK19-NEXT:    [[TMP14:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP13]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
13511 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP14]], 0
13512 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13513 // CHECK19:       omp.dispatch.body:
13514 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13515 // CHECK19-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
13516 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13517 // CHECK19:       omp.inner.for.cond:
13518 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]
13519 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]
13520 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13521 // CHECK19-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13522 // CHECK19:       omp.inner.for.body:
13523 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
13524 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13525 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13526 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]
13527 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]
13528 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP19]]
13529 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]
13530 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13531 // CHECK19:       omp.body.continue:
13532 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13533 // CHECK19:       omp.inner.for.inc:
13534 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
13535 // CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], 1
13536 // CHECK19-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
13537 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
13538 // CHECK19:       omp.inner.for.end:
13539 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
13540 // CHECK19:       omp.dispatch.inc:
13541 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
13542 // CHECK19:       omp.dispatch.end:
13543 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13544 // CHECK19:       omp.precond.end:
13545 // CHECK19-NEXT:    ret void
13546 //
13547 //
13548 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155
13549 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13550 // CHECK19-NEXT:  entry:
13551 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13552 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13553 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13554 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13555 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13556 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13557 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13558 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13559 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13560 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13561 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13562 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13563 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
13564 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
13565 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
13566 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13567 // CHECK19-NEXT:    store i32 [[TMP4]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13568 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13569 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined, i32 [[TMP3]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP5]])
13570 // CHECK19-NEXT:    ret void
13571 //
13572 //
13573 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined
13574 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13575 // CHECK19-NEXT:  entry:
13576 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13577 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13578 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13579 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13580 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13581 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13582 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13583 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13584 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13585 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13586 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13587 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13588 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13589 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13590 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13591 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
13592 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
13593 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13594 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13595 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13596 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13597 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13598 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13599 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13600 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13601 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13602 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
13603 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13604 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13605 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13606 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13607 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13608 // CHECK19-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
13609 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13610 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13611 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13612 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13613 // CHECK19:       omp.precond.then:
13614 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13615 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13616 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_COMB_UB]], align 4
13617 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13618 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13619 // CHECK19-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13620 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
13621 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP7]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13622 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13623 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13624 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP8]], [[TMP9]]
13625 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13626 // CHECK19:       cond.true:
13627 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13628 // CHECK19-NEXT:    br label [[COND_END:%.*]]
13629 // CHECK19:       cond.false:
13630 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13631 // CHECK19-NEXT:    br label [[COND_END]]
13632 // CHECK19:       cond.end:
13633 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP10]], [[COND_TRUE]] ], [ [[TMP11]], [[COND_FALSE]] ]
13634 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13635 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13636 // CHECK19-NEXT:    store i32 [[TMP12]], ptr [[DOTOMP_IV]], align 4
13637 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13638 // CHECK19:       omp.inner.for.cond:
13639 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13640 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13641 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
13642 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13643 // CHECK19:       omp.inner.for.body:
13644 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13645 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13646 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[N_ADDR]], align 4
13647 // CHECK19-NEXT:    store i32 [[TMP17]], ptr [[N_CASTED]], align 4
13648 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[N_CASTED]], align 4
13649 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13650 // CHECK19-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13651 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13652 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined, i32 [[TMP15]], i32 [[TMP16]], i32 [[TMP18]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP20]])
13653 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13654 // CHECK19:       omp.inner.for.inc:
13655 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13656 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13657 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
13658 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
13659 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
13660 // CHECK19:       omp.inner.for.end:
13661 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13662 // CHECK19:       omp.loop.exit:
13663 // CHECK19-NEXT:    [[TMP23:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13664 // CHECK19-NEXT:    [[TMP24:%.*]] = load i32, ptr [[TMP23]], align 4
13665 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP24]])
13666 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13667 // CHECK19:       omp.precond.end:
13668 // CHECK19-NEXT:    ret void
13669 //
13670 //
13671 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l155.omp_outlined.omp_outlined
13672 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
13673 // CHECK19-NEXT:  entry:
13674 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13675 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13676 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13677 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13678 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13679 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13680 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13681 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13682 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13683 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13684 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13685 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13686 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13687 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13688 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13689 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13690 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13691 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
13692 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13693 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13694 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13695 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13696 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13697 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13698 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13699 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13700 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13701 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13702 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N_ADDR]], align 4
13703 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13704 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13705 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP3]], 0
13706 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13707 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13708 // CHECK19-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
13709 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13710 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13711 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP4]]
13712 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13713 // CHECK19:       omp.precond.then:
13714 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
13715 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13716 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_UB]], align 4
13717 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13718 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13719 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_LB]], align 4
13720 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_UB]], align 4
13721 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13722 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13723 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13724 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13725 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13726 // CHECK19-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13727 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
13728 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 [[TMP8]])
13729 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
13730 // CHECK19:       omp.dispatch.cond:
13731 // CHECK19-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13732 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
13733 // CHECK19-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
13734 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
13735 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13736 // CHECK19:       omp.dispatch.body:
13737 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13738 // CHECK19-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
13739 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13740 // CHECK19:       omp.inner.for.cond:
13741 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
13742 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
13743 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
13744 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13745 // CHECK19:       omp.inner.for.body:
13746 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
13747 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
13748 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13749 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]
13750 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]
13751 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP1]], i32 [[TMP20]]
13752 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]
13753 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13754 // CHECK19:       omp.body.continue:
13755 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13756 // CHECK19:       omp.inner.for.inc:
13757 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
13758 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
13759 // CHECK19-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
13760 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
13761 // CHECK19:       omp.inner.for.end:
13762 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
13763 // CHECK19:       omp.dispatch.inc:
13764 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
13765 // CHECK19:       omp.dispatch.end:
13766 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13767 // CHECK19:       omp.precond.end:
13768 // CHECK19-NEXT:    ret void
13769 //
13770 //
13771 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
13772 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR5:[0-9]+]] comdat {
13773 // CHECK19-NEXT:  entry:
13774 // CHECK19-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
13775 // CHECK19-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
13776 // CHECK19-NEXT:    [[M:%.*]] = alloca i32, align 4
13777 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
13778 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
13779 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
13780 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13781 // CHECK19-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
13782 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4
13783 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4
13784 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4
13785 // CHECK19-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
13786 // CHECK19-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13787 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13788 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13789 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 4
13790 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 4
13791 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 4
13792 // CHECK19-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
13793 // CHECK19-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13794 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 4
13795 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 4
13796 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 4
13797 // CHECK19-NEXT:    [[_TMP18:%.*]] = alloca i32, align 4
13798 // CHECK19-NEXT:    [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13799 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_22:%.*]] = alloca i32, align 4
13800 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED23:%.*]] = alloca i32, align 4
13801 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS24:%.*]] = alloca [2 x ptr], align 4
13802 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS25:%.*]] = alloca [2 x ptr], align 4
13803 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS26:%.*]] = alloca [2 x ptr], align 4
13804 // CHECK19-NEXT:    [[_TMP27:%.*]] = alloca i32, align 4
13805 // CHECK19-NEXT:    [[KERNEL_ARGS28:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13806 // CHECK19-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
13807 // CHECK19-NEXT:    store i32 10, ptr [[M]], align 4
13808 // CHECK19-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13809 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP0]], align 4
13810 // CHECK19-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13811 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
13812 // CHECK19-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
13813 // CHECK19-NEXT:    store ptr null, ptr [[TMP2]], align 4
13814 // CHECK19-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13815 // CHECK19-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13816 // CHECK19-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
13817 // CHECK19-NEXT:    store i32 2, ptr [[TMP5]], align 4
13818 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
13819 // CHECK19-NEXT:    store i32 1, ptr [[TMP6]], align 4
13820 // CHECK19-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
13821 // CHECK19-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
13822 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
13823 // CHECK19-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
13824 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
13825 // CHECK19-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP9]], align 4
13826 // CHECK19-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
13827 // CHECK19-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP10]], align 4
13828 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
13829 // CHECK19-NEXT:    store ptr null, ptr [[TMP11]], align 4
13830 // CHECK19-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
13831 // CHECK19-NEXT:    store ptr null, ptr [[TMP12]], align 4
13832 // CHECK19-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
13833 // CHECK19-NEXT:    store i64 10, ptr [[TMP13]], align 8
13834 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
13835 // CHECK19-NEXT:    store i64 0, ptr [[TMP14]], align 8
13836 // CHECK19-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
13837 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
13838 // CHECK19-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
13839 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
13840 // CHECK19-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
13841 // CHECK19-NEXT:    store i32 0, ptr [[TMP17]], align 4
13842 // CHECK19-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.region_id, ptr [[KERNEL_ARGS]])
13843 // CHECK19-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
13844 // CHECK19-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13845 // CHECK19:       omp_offload.failed:
13846 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112(ptr [[A]]) #[[ATTR3]]
13847 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
13848 // CHECK19:       omp_offload.cont:
13849 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13850 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP20]], align 4
13851 // CHECK19-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13852 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP21]], align 4
13853 // CHECK19-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
13854 // CHECK19-NEXT:    store ptr null, ptr [[TMP22]], align 4
13855 // CHECK19-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13856 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13857 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
13858 // CHECK19-NEXT:    store i32 2, ptr [[TMP25]], align 4
13859 // CHECK19-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
13860 // CHECK19-NEXT:    store i32 1, ptr [[TMP26]], align 4
13861 // CHECK19-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
13862 // CHECK19-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
13863 // CHECK19-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
13864 // CHECK19-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
13865 // CHECK19-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
13866 // CHECK19-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP29]], align 4
13867 // CHECK19-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
13868 // CHECK19-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP30]], align 4
13869 // CHECK19-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
13870 // CHECK19-NEXT:    store ptr null, ptr [[TMP31]], align 4
13871 // CHECK19-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
13872 // CHECK19-NEXT:    store ptr null, ptr [[TMP32]], align 4
13873 // CHECK19-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
13874 // CHECK19-NEXT:    store i64 10, ptr [[TMP33]], align 8
13875 // CHECK19-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
13876 // CHECK19-NEXT:    store i64 0, ptr [[TMP34]], align 8
13877 // CHECK19-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
13878 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
13879 // CHECK19-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
13880 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
13881 // CHECK19-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
13882 // CHECK19-NEXT:    store i32 0, ptr [[TMP37]], align 4
13883 // CHECK19-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS5]])
13884 // CHECK19-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
13885 // CHECK19-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
13886 // CHECK19:       omp_offload.failed6:
13887 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR3]]
13888 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
13889 // CHECK19:       omp_offload.cont7:
13890 // CHECK19-NEXT:    [[TMP40:%.*]] = load i32, ptr [[M]], align 4
13891 // CHECK19-NEXT:    store i32 [[TMP40]], ptr [[DOTCAPTURE_EXPR_]], align 4
13892 // CHECK19-NEXT:    [[TMP41:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13893 // CHECK19-NEXT:    store i32 [[TMP41]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13894 // CHECK19-NEXT:    [[TMP42:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13895 // CHECK19-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
13896 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP43]], align 4
13897 // CHECK19-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
13898 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP44]], align 4
13899 // CHECK19-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
13900 // CHECK19-NEXT:    store ptr null, ptr [[TMP45]], align 4
13901 // CHECK19-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
13902 // CHECK19-NEXT:    store i32 [[TMP42]], ptr [[TMP46]], align 4
13903 // CHECK19-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
13904 // CHECK19-NEXT:    store i32 [[TMP42]], ptr [[TMP47]], align 4
13905 // CHECK19-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
13906 // CHECK19-NEXT:    store ptr null, ptr [[TMP48]], align 4
13907 // CHECK19-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
13908 // CHECK19-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
13909 // CHECK19-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
13910 // CHECK19-NEXT:    store i32 2, ptr [[TMP51]], align 4
13911 // CHECK19-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
13912 // CHECK19-NEXT:    store i32 2, ptr [[TMP52]], align 4
13913 // CHECK19-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
13914 // CHECK19-NEXT:    store ptr [[TMP49]], ptr [[TMP53]], align 4
13915 // CHECK19-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
13916 // CHECK19-NEXT:    store ptr [[TMP50]], ptr [[TMP54]], align 4
13917 // CHECK19-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
13918 // CHECK19-NEXT:    store ptr @.offload_sizes.13, ptr [[TMP55]], align 4
13919 // CHECK19-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
13920 // CHECK19-NEXT:    store ptr @.offload_maptypes.14, ptr [[TMP56]], align 4
13921 // CHECK19-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
13922 // CHECK19-NEXT:    store ptr null, ptr [[TMP57]], align 4
13923 // CHECK19-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
13924 // CHECK19-NEXT:    store ptr null, ptr [[TMP58]], align 4
13925 // CHECK19-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
13926 // CHECK19-NEXT:    store i64 10, ptr [[TMP59]], align 8
13927 // CHECK19-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
13928 // CHECK19-NEXT:    store i64 0, ptr [[TMP60]], align 8
13929 // CHECK19-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
13930 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4
13931 // CHECK19-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
13932 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP62]], align 4
13933 // CHECK19-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
13934 // CHECK19-NEXT:    store i32 0, ptr [[TMP63]], align 4
13935 // CHECK19-NEXT:    [[TMP64:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.region_id, ptr [[KERNEL_ARGS12]])
13936 // CHECK19-NEXT:    [[TMP65:%.*]] = icmp ne i32 [[TMP64]], 0
13937 // CHECK19-NEXT:    br i1 [[TMP65]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
13938 // CHECK19:       omp_offload.failed13:
13939 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120(ptr [[A]], i32 [[TMP42]]) #[[ATTR3]]
13940 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT14]]
13941 // CHECK19:       omp_offload.cont14:
13942 // CHECK19-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
13943 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP66]], align 4
13944 // CHECK19-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
13945 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP67]], align 4
13946 // CHECK19-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0
13947 // CHECK19-NEXT:    store ptr null, ptr [[TMP68]], align 4
13948 // CHECK19-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
13949 // CHECK19-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
13950 // CHECK19-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0
13951 // CHECK19-NEXT:    store i32 2, ptr [[TMP71]], align 4
13952 // CHECK19-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1
13953 // CHECK19-NEXT:    store i32 1, ptr [[TMP72]], align 4
13954 // CHECK19-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2
13955 // CHECK19-NEXT:    store ptr [[TMP69]], ptr [[TMP73]], align 4
13956 // CHECK19-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3
13957 // CHECK19-NEXT:    store ptr [[TMP70]], ptr [[TMP74]], align 4
13958 // CHECK19-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4
13959 // CHECK19-NEXT:    store ptr @.offload_sizes.15, ptr [[TMP75]], align 4
13960 // CHECK19-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5
13961 // CHECK19-NEXT:    store ptr @.offload_maptypes.16, ptr [[TMP76]], align 4
13962 // CHECK19-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6
13963 // CHECK19-NEXT:    store ptr null, ptr [[TMP77]], align 4
13964 // CHECK19-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7
13965 // CHECK19-NEXT:    store ptr null, ptr [[TMP78]], align 4
13966 // CHECK19-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8
13967 // CHECK19-NEXT:    store i64 10, ptr [[TMP79]], align 8
13968 // CHECK19-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9
13969 // CHECK19-NEXT:    store i64 0, ptr [[TMP80]], align 8
13970 // CHECK19-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10
13971 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4
13972 // CHECK19-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11
13973 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP82]], align 4
13974 // CHECK19-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12
13975 // CHECK19-NEXT:    store i32 0, ptr [[TMP83]], align 4
13976 // CHECK19-NEXT:    [[TMP84:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.region_id, ptr [[KERNEL_ARGS19]])
13977 // CHECK19-NEXT:    [[TMP85:%.*]] = icmp ne i32 [[TMP84]], 0
13978 // CHECK19-NEXT:    br i1 [[TMP85]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
13979 // CHECK19:       omp_offload.failed20:
13980 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124(ptr [[A]]) #[[ATTR3]]
13981 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT21]]
13982 // CHECK19:       omp_offload.cont21:
13983 // CHECK19-NEXT:    [[TMP86:%.*]] = load i32, ptr [[M]], align 4
13984 // CHECK19-NEXT:    store i32 [[TMP86]], ptr [[DOTCAPTURE_EXPR_22]], align 4
13985 // CHECK19-NEXT:    [[TMP87:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_22]], align 4
13986 // CHECK19-NEXT:    store i32 [[TMP87]], ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4
13987 // CHECK19-NEXT:    [[TMP88:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED23]], align 4
13988 // CHECK19-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
13989 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP89]], align 4
13990 // CHECK19-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
13991 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP90]], align 4
13992 // CHECK19-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 0
13993 // CHECK19-NEXT:    store ptr null, ptr [[TMP91]], align 4
13994 // CHECK19-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 1
13995 // CHECK19-NEXT:    store i32 [[TMP88]], ptr [[TMP92]], align 4
13996 // CHECK19-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 1
13997 // CHECK19-NEXT:    store i32 [[TMP88]], ptr [[TMP93]], align 4
13998 // CHECK19-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS26]], i32 0, i32 1
13999 // CHECK19-NEXT:    store ptr null, ptr [[TMP94]], align 4
14000 // CHECK19-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS24]], i32 0, i32 0
14001 // CHECK19-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS25]], i32 0, i32 0
14002 // CHECK19-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 0
14003 // CHECK19-NEXT:    store i32 2, ptr [[TMP97]], align 4
14004 // CHECK19-NEXT:    [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 1
14005 // CHECK19-NEXT:    store i32 2, ptr [[TMP98]], align 4
14006 // CHECK19-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 2
14007 // CHECK19-NEXT:    store ptr [[TMP95]], ptr [[TMP99]], align 4
14008 // CHECK19-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 3
14009 // CHECK19-NEXT:    store ptr [[TMP96]], ptr [[TMP100]], align 4
14010 // CHECK19-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 4
14011 // CHECK19-NEXT:    store ptr @.offload_sizes.17, ptr [[TMP101]], align 4
14012 // CHECK19-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 5
14013 // CHECK19-NEXT:    store ptr @.offload_maptypes.18, ptr [[TMP102]], align 4
14014 // CHECK19-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 6
14015 // CHECK19-NEXT:    store ptr null, ptr [[TMP103]], align 4
14016 // CHECK19-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 7
14017 // CHECK19-NEXT:    store ptr null, ptr [[TMP104]], align 4
14018 // CHECK19-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 8
14019 // CHECK19-NEXT:    store i64 10, ptr [[TMP105]], align 8
14020 // CHECK19-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 9
14021 // CHECK19-NEXT:    store i64 0, ptr [[TMP106]], align 8
14022 // CHECK19-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 10
14023 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP107]], align 4
14024 // CHECK19-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 11
14025 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4
14026 // CHECK19-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS28]], i32 0, i32 12
14027 // CHECK19-NEXT:    store i32 0, ptr [[TMP109]], align 4
14028 // CHECK19-NEXT:    [[TMP110:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.region_id, ptr [[KERNEL_ARGS28]])
14029 // CHECK19-NEXT:    [[TMP111:%.*]] = icmp ne i32 [[TMP110]], 0
14030 // CHECK19-NEXT:    br i1 [[TMP111]], label [[OMP_OFFLOAD_FAILED29:%.*]], label [[OMP_OFFLOAD_CONT30:%.*]]
14031 // CHECK19:       omp_offload.failed29:
14032 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128(ptr [[A]], i32 [[TMP88]]) #[[ATTR3]]
14033 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT30]]
14034 // CHECK19:       omp_offload.cont30:
14035 // CHECK19-NEXT:    ret i32 0
14036 //
14037 //
14038 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112
14039 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14040 // CHECK19-NEXT:  entry:
14041 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14042 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14043 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14044 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined, ptr [[TMP0]])
14045 // CHECK19-NEXT:    ret void
14046 //
14047 //
14048 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined
14049 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14050 // CHECK19-NEXT:  entry:
14051 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14052 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14053 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14054 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14055 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14056 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14057 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14058 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14059 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14060 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14061 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14062 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14063 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14064 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14065 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14066 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14067 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14068 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14069 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14070 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
14071 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14072 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14073 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14074 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14075 // CHECK19:       cond.true:
14076 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14077 // CHECK19:       cond.false:
14078 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14079 // CHECK19-NEXT:    br label [[COND_END]]
14080 // CHECK19:       cond.end:
14081 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14082 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14083 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14084 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
14085 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14086 // CHECK19:       omp.inner.for.cond:
14087 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14088 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14089 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14090 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14091 // CHECK19:       omp.inner.for.body:
14092 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14093 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14094 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
14095 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14096 // CHECK19:       omp.inner.for.inc:
14097 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14098 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14099 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14100 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14101 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14102 // CHECK19:       omp.inner.for.end:
14103 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14104 // CHECK19:       omp.loop.exit:
14105 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
14106 // CHECK19-NEXT:    ret void
14107 //
14108 //
14109 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l112.omp_outlined.omp_outlined
14110 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14111 // CHECK19-NEXT:  entry:
14112 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14113 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14114 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14115 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14116 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14117 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14118 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14119 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14120 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14121 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14122 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14123 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14124 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14125 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14126 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14127 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14128 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14129 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14130 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
14131 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
14132 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14133 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14134 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
14135 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
14136 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14137 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14138 // CHECK19-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14139 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
14140 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14141 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14142 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14143 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14144 // CHECK19:       cond.true:
14145 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14146 // CHECK19:       cond.false:
14147 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14148 // CHECK19-NEXT:    br label [[COND_END]]
14149 // CHECK19:       cond.end:
14150 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14151 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
14152 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14153 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
14154 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14155 // CHECK19:       omp.inner.for.cond:
14156 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14157 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14158 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14159 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14160 // CHECK19:       omp.inner.for.body:
14161 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14162 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14163 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14164 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
14165 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
14166 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]
14167 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
14168 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14169 // CHECK19:       omp.body.continue:
14170 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14171 // CHECK19:       omp.inner.for.inc:
14172 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14173 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14174 // CHECK19-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
14175 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14176 // CHECK19:       omp.inner.for.end:
14177 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14178 // CHECK19:       omp.loop.exit:
14179 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
14180 // CHECK19-NEXT:    ret void
14181 //
14182 //
14183 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
14184 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14185 // CHECK19-NEXT:  entry:
14186 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14187 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14188 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14189 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])
14190 // CHECK19-NEXT:    ret void
14191 //
14192 //
14193 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined
14194 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14195 // CHECK19-NEXT:  entry:
14196 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14197 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14198 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14199 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14200 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14201 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14202 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14203 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14204 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14205 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14206 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14207 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14208 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14209 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14210 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14211 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14212 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14213 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14214 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14215 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
14216 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14217 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14218 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14219 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14220 // CHECK19:       cond.true:
14221 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14222 // CHECK19:       cond.false:
14223 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14224 // CHECK19-NEXT:    br label [[COND_END]]
14225 // CHECK19:       cond.end:
14226 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14227 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14228 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14229 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
14230 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14231 // CHECK19:       omp.inner.for.cond:
14232 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14233 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14234 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14235 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14236 // CHECK19:       omp.inner.for.body:
14237 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14238 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14239 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
14240 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14241 // CHECK19:       omp.inner.for.inc:
14242 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14243 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14244 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14245 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14246 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14247 // CHECK19:       omp.inner.for.end:
14248 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14249 // CHECK19:       omp.loop.exit:
14250 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
14251 // CHECK19-NEXT:    ret void
14252 //
14253 //
14254 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined
14255 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14256 // CHECK19-NEXT:  entry:
14257 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14258 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14259 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14260 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14261 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14262 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14263 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14264 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14265 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14266 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14267 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14268 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14269 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14270 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14271 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14272 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14273 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14274 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14275 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
14276 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
14277 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14278 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14279 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
14280 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
14281 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14282 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14283 // CHECK19-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14284 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
14285 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14286 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14287 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14288 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14289 // CHECK19:       cond.true:
14290 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14291 // CHECK19:       cond.false:
14292 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14293 // CHECK19-NEXT:    br label [[COND_END]]
14294 // CHECK19:       cond.end:
14295 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14296 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
14297 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14298 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
14299 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14300 // CHECK19:       omp.inner.for.cond:
14301 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14302 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14303 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14304 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14305 // CHECK19:       omp.inner.for.body:
14306 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14307 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14308 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14309 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
14310 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
14311 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]
14312 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
14313 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14314 // CHECK19:       omp.body.continue:
14315 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14316 // CHECK19:       omp.inner.for.inc:
14317 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14318 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14319 // CHECK19-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
14320 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14321 // CHECK19:       omp.inner.for.end:
14322 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14323 // CHECK19:       omp.loop.exit:
14324 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
14325 // CHECK19-NEXT:    ret void
14326 //
14327 //
14328 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120
14329 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14330 // CHECK19-NEXT:  entry:
14331 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14332 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14333 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14334 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14335 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14336 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14337 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14338 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14339 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14340 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined, ptr [[TMP0]], i32 [[TMP2]])
14341 // CHECK19-NEXT:    ret void
14342 //
14343 //
14344 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined
14345 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14346 // CHECK19-NEXT:  entry:
14347 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14348 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14349 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14350 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14351 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14352 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14353 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14354 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14355 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14356 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14357 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14358 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14359 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14360 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14361 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14362 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14363 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14364 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14365 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14366 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14367 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14368 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14369 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
14370 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14371 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14372 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14373 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14374 // CHECK19:       cond.true:
14375 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14376 // CHECK19:       cond.false:
14377 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14378 // CHECK19-NEXT:    br label [[COND_END]]
14379 // CHECK19:       cond.end:
14380 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14381 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14382 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14383 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
14384 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14385 // CHECK19:       omp.inner.for.cond:
14386 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14387 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14388 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14389 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14390 // CHECK19:       omp.inner.for.body:
14391 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14392 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14393 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14394 // CHECK19-NEXT:    store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14395 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14396 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]])
14397 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14398 // CHECK19:       omp.inner.for.inc:
14399 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14400 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14401 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14402 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14403 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14404 // CHECK19:       omp.inner.for.end:
14405 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14406 // CHECK19:       omp.loop.exit:
14407 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
14408 // CHECK19-NEXT:    ret void
14409 //
14410 //
14411 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l120.omp_outlined.omp_outlined
14412 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14413 // CHECK19-NEXT:  entry:
14414 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14415 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14416 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14417 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14418 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14419 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14420 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14421 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14422 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14423 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14424 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14425 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14426 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14427 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14428 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14429 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14430 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14431 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14432 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14433 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14434 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
14435 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
14436 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14437 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14438 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
14439 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
14440 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14441 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14442 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14443 // CHECK19-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14444 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
14445 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
14446 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14447 // CHECK19:       omp.dispatch.cond:
14448 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14449 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14450 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
14451 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14452 // CHECK19:       cond.true:
14453 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14454 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14455 // CHECK19:       cond.false:
14456 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14457 // CHECK19-NEXT:    br label [[COND_END]]
14458 // CHECK19:       cond.end:
14459 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
14460 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
14461 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14462 // CHECK19-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
14463 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14464 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14465 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
14466 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14467 // CHECK19:       omp.dispatch.body:
14468 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14469 // CHECK19:       omp.inner.for.cond:
14470 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14471 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14472 // CHECK19-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14473 // CHECK19-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14474 // CHECK19:       omp.inner.for.body:
14475 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14476 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
14477 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14478 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
14479 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
14480 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]]
14481 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
14482 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14483 // CHECK19:       omp.body.continue:
14484 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14485 // CHECK19:       omp.inner.for.inc:
14486 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14487 // CHECK19-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
14488 // CHECK19-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
14489 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14490 // CHECK19:       omp.inner.for.end:
14491 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14492 // CHECK19:       omp.dispatch.inc:
14493 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14494 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14495 // CHECK19-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
14496 // CHECK19-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
14497 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14498 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14499 // CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
14500 // CHECK19-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
14501 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
14502 // CHECK19:       omp.dispatch.end:
14503 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
14504 // CHECK19-NEXT:    ret void
14505 //
14506 //
14507 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124
14508 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14509 // CHECK19-NEXT:  entry:
14510 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14511 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14512 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14513 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined, ptr [[TMP0]])
14514 // CHECK19-NEXT:    ret void
14515 //
14516 //
14517 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined
14518 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14519 // CHECK19-NEXT:  entry:
14520 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14521 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14522 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14523 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14524 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14525 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14526 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14527 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14528 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14529 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14530 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14531 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14532 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14533 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14534 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14535 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14536 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14537 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14538 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14539 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
14540 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14541 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14542 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14543 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14544 // CHECK19:       cond.true:
14545 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14546 // CHECK19:       cond.false:
14547 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14548 // CHECK19-NEXT:    br label [[COND_END]]
14549 // CHECK19:       cond.end:
14550 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14551 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14552 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14553 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
14554 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14555 // CHECK19:       omp.inner.for.cond:
14556 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14557 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14558 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14559 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14560 // CHECK19:       omp.inner.for.body:
14561 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14562 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14563 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
14564 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14565 // CHECK19:       omp.inner.for.inc:
14566 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14567 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14568 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14569 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14570 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14571 // CHECK19:       omp.inner.for.end:
14572 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14573 // CHECK19:       omp.loop.exit:
14574 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
14575 // CHECK19-NEXT:    ret void
14576 //
14577 //
14578 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l124.omp_outlined.omp_outlined
14579 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14580 // CHECK19-NEXT:  entry:
14581 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14582 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14583 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14584 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14585 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14586 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14587 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14588 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14589 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14590 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14591 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14592 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14593 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14594 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14595 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14596 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14597 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14598 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14599 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
14600 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
14601 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14602 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14603 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
14604 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
14605 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14606 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14607 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14608 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14609 // CHECK19-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14610 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
14611 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
14612 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14613 // CHECK19:       omp.dispatch.cond:
14614 // CHECK19-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
14615 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
14616 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14617 // CHECK19:       omp.dispatch.body:
14618 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14619 // CHECK19-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
14620 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14621 // CHECK19:       omp.inner.for.cond:
14622 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
14623 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]
14624 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
14625 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14626 // CHECK19:       omp.inner.for.body:
14627 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
14628 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
14629 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14630 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
14631 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
14632 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP12]]
14633 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]
14634 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14635 // CHECK19:       omp.body.continue:
14636 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14637 // CHECK19:       omp.inner.for.inc:
14638 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
14639 // CHECK19-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
14640 // CHECK19-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
14641 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
14642 // CHECK19:       omp.inner.for.end:
14643 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14644 // CHECK19:       omp.dispatch.inc:
14645 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
14646 // CHECK19:       omp.dispatch.end:
14647 // CHECK19-NEXT:    ret void
14648 //
14649 //
14650 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128
14651 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14652 // CHECK19-NEXT:  entry:
14653 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14654 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14655 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14656 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14657 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14658 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14659 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14660 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14661 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14662 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined, ptr [[TMP0]], i32 [[TMP2]])
14663 // CHECK19-NEXT:    ret void
14664 //
14665 //
14666 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined
14667 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14668 // CHECK19-NEXT:  entry:
14669 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14670 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14671 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14672 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14673 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14674 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14675 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14676 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14677 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14678 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14679 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14680 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14681 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14682 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14683 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14684 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14685 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14686 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14687 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14688 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14689 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14690 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14691 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
14692 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14693 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14694 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14695 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14696 // CHECK19:       cond.true:
14697 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14698 // CHECK19:       cond.false:
14699 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14700 // CHECK19-NEXT:    br label [[COND_END]]
14701 // CHECK19:       cond.end:
14702 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14703 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14704 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14705 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
14706 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14707 // CHECK19:       omp.inner.for.cond:
14708 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14709 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14710 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14711 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14712 // CHECK19:       omp.inner.for.body:
14713 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14714 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14715 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14716 // CHECK19-NEXT:    store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14717 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14718 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]])
14719 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14720 // CHECK19:       omp.inner.for.inc:
14721 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14722 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14723 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14724 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14725 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14726 // CHECK19:       omp.inner.for.end:
14727 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14728 // CHECK19:       omp.loop.exit:
14729 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
14730 // CHECK19-NEXT:    ret void
14731 //
14732 //
14733 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l128.omp_outlined.omp_outlined
14734 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR2]] {
14735 // CHECK19-NEXT:  entry:
14736 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14737 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14738 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14739 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14740 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14741 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14742 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14743 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14744 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14745 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14746 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14747 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14748 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14749 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14750 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14751 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14752 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14753 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14754 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14755 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14756 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
14757 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
14758 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14759 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14760 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
14761 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
14762 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14763 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14764 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14765 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14766 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14767 // CHECK19-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14768 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
14769 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
14770 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14771 // CHECK19:       omp.dispatch.cond:
14772 // CHECK19-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
14773 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
14774 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14775 // CHECK19:       omp.dispatch.body:
14776 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14777 // CHECK19-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
14778 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14779 // CHECK19:       omp.inner.for.cond:
14780 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]
14781 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]]
14782 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
14783 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14784 // CHECK19:       omp.inner.for.body:
14785 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
14786 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
14787 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14788 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]
14789 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]
14790 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]]
14791 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]]
14792 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14793 // CHECK19:       omp.body.continue:
14794 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14795 // CHECK19:       omp.inner.for.inc:
14796 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
14797 // CHECK19-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
14798 // CHECK19-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
14799 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
14800 // CHECK19:       omp.inner.for.end:
14801 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14802 // CHECK19:       omp.dispatch.inc:
14803 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
14804 // CHECK19:       omp.dispatch.end:
14805 // CHECK19-NEXT:    ret void
14806 //
14807 //
14808 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
14809 // CHECK19-SAME: () #[[ATTR6:[0-9]+]] {
14810 // CHECK19-NEXT:  entry:
14811 // CHECK19-NEXT:    call void @__tgt_register_requires(i64 1)
14812 // CHECK19-NEXT:    ret void
14813 //