clang/test/OpenMP/teams_distribute_collapse_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // expected-no-diagnostics
   3 #ifndef HEADER
   4 #define HEADER
   5
   6 // Test host codegen.
   7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
  10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
  11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
  13
  14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  15 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  16 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  18 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  19 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  20 #ifdef CK1
  21
  22 template <typename T, int X, long long Y>
  23 struct SS{
  24   T a[X][Y];
  25
  26   int foo(void) {
  27
  28     #pragma omp target
  29     #pragma omp teams distribute collapse(2)
  30     for(int i = 0; i < X; i++) {
  31       for(int j = 0; j < Y; j++) {
  32         a[i][j] = (T)0;
  33       }
  34     }
  35
  36     // discard loop variables not needed here
  37
  38     return a[0][0];
  39   }
  40 };
  41
  42 int teams_template_struct(void) {
  43   SS<int, 123, 456> V;
  44   return V.foo();
  45
  46 }
  47 #endif // CK1
  48
  49 // Test host codegen.
  50 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
  51 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  52 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
  53 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK11
  54 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  55 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK11
  56
  57 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  58 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  59 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  60 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  61 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  62 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  63 #ifdef CK2
  64
  65 template <typename T, int n, int m>
  66 int tmain(T argc) {
  67   T a[n][m];
  68   #pragma omp target
  69   #pragma omp teams distribute collapse(2)
  70   for(int i = 0; i < n; i++) {
  71     for(int j = 0; j < m; j++) {
  72       a[i][j] = (T)0;
  73     }
  74   }
  75   return 0;
  76 }
  77
  78 int main (int argc, char **argv) {
  79   int n = 100;
  80   int m = 2;
  81   int a[n][m];
  82   #pragma omp target
  83   #pragma omp teams distribute collapse(2)
  84   for(int i = 0; i < n; i++) {
  85     for(int j = 0; j < m; j++) {
  86       a[i][j] = 0;
  87     }
  88   }
  89   return tmain<int, 10, 2>(argc);
  90 }
  91
  92
  93
  94
  95
  96 // discard loop variables not needed here
  97
  98 #endif // CK2
  99 #endif // #ifndef HEADER
 100 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
 101 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 102 // CHECK1-NEXT:  entry:
 103 // CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
 104 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])
 105 // CHECK1-NEXT:    ret i32 [[CALL]]
 106 //
 107 //
 108 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
 109 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat {
 110 // CHECK1-NEXT:  entry:
 111 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 112 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
 113 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
 114 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
 115 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 116 // CHECK1-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
 117 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 118 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 119 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 120 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
 121 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 122 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8
 123 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 124 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
 125 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 126 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 127 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 128 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 129 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 130 // CHECK1-NEXT:    store i32 2, ptr [[TMP5]], align 4
 131 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 132 // CHECK1-NEXT:    store i32 1, ptr [[TMP6]], align 4
 133 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 134 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
 135 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 136 // CHECK1-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
 137 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 138 // CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8
 139 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 140 // CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8
 141 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 142 // CHECK1-NEXT:    store ptr null, ptr [[TMP11]], align 8
 143 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 144 // CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8
 145 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 146 // CHECK1-NEXT:    store i64 56088, ptr [[TMP13]], align 8
 147 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 148 // CHECK1-NEXT:    store i64 0, ptr [[TMP14]], align 8
 149 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 150 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
 151 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 152 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
 153 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 154 // CHECK1-NEXT:    store i32 0, ptr [[TMP17]], align 4
 155 // CHECK1-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])
 156 // CHECK1-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
 157 // CHECK1-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 158 // CHECK1:       omp_offload.failed:
 159 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR3:[0-9]+]]
 160 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 161 // CHECK1:       omp_offload.cont:
 162 // CHECK1-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 163 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i64 0, i64 0
 164 // CHECK1-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 0
 165 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4
 166 // CHECK1-NEXT:    ret i32 [[TMP20]]
 167 //
 168 //
 169 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
 170 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
 171 // CHECK1-NEXT:  entry:
 172 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 173 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 174 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 175 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])
 176 // CHECK1-NEXT:    ret void
 177 //
 178 //
 179 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined
 180 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
 181 // CHECK1-NEXT:  entry:
 182 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 183 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 184 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 185 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 186 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 187 // CHECK1-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 188 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 189 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 190 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 191 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 192 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 193 // CHECK1-NEXT:    [[J:%.*]] = alloca i32, align 4
 194 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 195 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 196 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 197 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 198 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 199 // CHECK1-NEXT:    store i32 56087, ptr [[DOTOMP_UB]], align 4
 200 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 201 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 202 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 203 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 204 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 205 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 206 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
 207 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 208 // CHECK1:       cond.true:
 209 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 210 // CHECK1:       cond.false:
 211 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 212 // CHECK1-NEXT:    br label [[COND_END]]
 213 // CHECK1:       cond.end:
 214 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 215 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 216 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 217 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 218 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 219 // CHECK1:       omp.inner.for.cond:
 220 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 221 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 222 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 223 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 224 // CHECK1:       omp.inner.for.body:
 225 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 226 // CHECK1-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 456
 227 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
 228 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 229 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 230 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 231 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 232 // CHECK1-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456
 233 // CHECK1-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
 234 // CHECK1-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
 235 // CHECK1-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
 236 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
 237 // CHECK1-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4
 238 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 239 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
 240 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
 241 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i64 0, i64 [[IDXPROM]]
 242 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4
 243 // CHECK1-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64
 244 // CHECK1-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]
 245 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX8]], align 4
 246 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 247 // CHECK1:       omp.body.continue:
 248 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 249 // CHECK1:       omp.inner.for.inc:
 250 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 251 // CHECK1-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1
 252 // CHECK1-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
 253 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 254 // CHECK1:       omp.inner.for.end:
 255 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 256 // CHECK1:       omp.loop.exit:
 257 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 258 // CHECK1-NEXT:    ret void
 259 //
 260 //
 261 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 262 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
 263 // CHECK1-NEXT:  entry:
 264 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
 265 // CHECK1-NEXT:    ret void
 266 //
 267 //
 268 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
 269 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
 270 // CHECK3-NEXT:  entry:
 271 // CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
 272 // CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(224352) [[V]])
 273 // CHECK3-NEXT:    ret i32 [[CALL]]
 274 //
 275 //
 276 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
 277 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(224352) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
 278 // CHECK3-NEXT:  entry:
 279 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
 280 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
 281 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
 282 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
 283 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 284 // CHECK3-NEXT:    [[_TMP2:%.*]] = alloca i32, align 4
 285 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 286 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
 287 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
 288 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
 289 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 290 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4
 291 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 292 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
 293 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
 294 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 4
 295 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 296 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 297 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 298 // CHECK3-NEXT:    store i32 2, ptr [[TMP5]], align 4
 299 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 300 // CHECK3-NEXT:    store i32 1, ptr [[TMP6]], align 4
 301 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 302 // CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
 303 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 304 // CHECK3-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
 305 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 306 // CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4
 307 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 308 // CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4
 309 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 310 // CHECK3-NEXT:    store ptr null, ptr [[TMP11]], align 4
 311 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 312 // CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 4
 313 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 314 // CHECK3-NEXT:    store i64 56088, ptr [[TMP13]], align 8
 315 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 316 // CHECK3-NEXT:    store i64 0, ptr [[TMP14]], align 8
 317 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 318 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
 319 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 320 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
 321 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 322 // CHECK3-NEXT:    store i32 0, ptr [[TMP17]], align 4
 323 // CHECK3-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.region_id, ptr [[KERNEL_ARGS]])
 324 // CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
 325 // CHECK3-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 326 // CHECK3:       omp_offload.failed:
 327 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28(ptr [[THIS1]]) #[[ATTR3:[0-9]+]]
 328 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 329 // CHECK3:       omp_offload.cont:
 330 // CHECK3-NEXT:    [[A3:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 331 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A3]], i32 0, i32 0
 332 // CHECK3-NEXT:    [[ARRAYIDX4:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 0
 333 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[ARRAYIDX4]], align 4
 334 // CHECK3-NEXT:    ret i32 [[TMP20]]
 335 //
 336 //
 337 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28
 338 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
 339 // CHECK3-NEXT:  entry:
 340 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
 341 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
 342 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
 343 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined, ptr [[TMP0]])
 344 // CHECK3-NEXT:    ret void
 345 //
 346 //
 347 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l28.omp_outlined
 348 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
 349 // CHECK3-NEXT:  entry:
 350 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 351 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 352 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
 353 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 354 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 355 // CHECK3-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 356 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 357 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 358 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 359 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 360 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 361 // CHECK3-NEXT:    [[J:%.*]] = alloca i32, align 4
 362 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 363 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 364 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
 365 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
 366 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 367 // CHECK3-NEXT:    store i32 56087, ptr [[DOTOMP_UB]], align 4
 368 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 369 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 370 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 371 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 372 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 373 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 374 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 56087
 375 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 376 // CHECK3:       cond.true:
 377 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 378 // CHECK3:       cond.false:
 379 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 380 // CHECK3-NEXT:    br label [[COND_END]]
 381 // CHECK3:       cond.end:
 382 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 56087, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 383 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 384 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 385 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 386 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 387 // CHECK3:       omp.inner.for.cond:
 388 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 389 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 390 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 391 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 392 // CHECK3:       omp.inner.for.body:
 393 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 394 // CHECK3-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 456
 395 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
 396 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 397 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 398 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 399 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 400 // CHECK3-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 456
 401 // CHECK3-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 456
 402 // CHECK3-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
 403 // CHECK3-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
 404 // CHECK3-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
 405 // CHECK3-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4
 406 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 407 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
 408 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x [456 x i32]], ptr [[A]], i32 0, i32 [[TMP11]]
 409 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4
 410 // CHECK3-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [456 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]]
 411 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX7]], align 4
 412 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 413 // CHECK3:       omp.body.continue:
 414 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 415 // CHECK3:       omp.inner.for.inc:
 416 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 417 // CHECK3-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1
 418 // CHECK3-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
 419 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
 420 // CHECK3:       omp.inner.for.end:
 421 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 422 // CHECK3:       omp.loop.exit:
 423 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 424 // CHECK3-NEXT:    ret void
 425 //
 426 //
 427 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 428 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
 429 // CHECK3-NEXT:  entry:
 430 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
 431 // CHECK3-NEXT:    ret void
 432 //
 433 //
 434 // CHECK9-LABEL: define {{[^@]+}}@main
 435 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
 436 // CHECK9-NEXT:  entry:
 437 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 438 // CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
 439 // CHECK9-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8
 440 // CHECK9-NEXT:    [[N:%.*]] = alloca i32, align 4
 441 // CHECK9-NEXT:    [[M:%.*]] = alloca i32, align 4
 442 // CHECK9-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
 443 // CHECK9-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
 444 // CHECK9-NEXT:    [[__VLA_EXPR1:%.*]] = alloca i64, align 8
 445 // CHECK9-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
 446 // CHECK9-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
 447 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 8
 448 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 8
 449 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 8
 450 // CHECK9-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 8
 451 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 452 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 453 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 454 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
 455 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
 456 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 457 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 458 // CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
 459 // CHECK9-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
 460 // CHECK9-NEXT:    store i32 100, ptr [[N]], align 4
 461 // CHECK9-NEXT:    store i32 2, ptr [[M]], align 4
 462 // CHECK9-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
 463 // CHECK9-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
 464 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M]], align 4
 465 // CHECK9-NEXT:    [[TMP3:%.*]] = zext i32 [[TMP2]] to i64
 466 // CHECK9-NEXT:    [[TMP4:%.*]] = call ptr @llvm.stacksave.p0()
 467 // CHECK9-NEXT:    store ptr [[TMP4]], ptr [[SAVED_STACK]], align 8
 468 // CHECK9-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
 469 // CHECK9-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP5]], align 4
 470 // CHECK9-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
 471 // CHECK9-NEXT:    store i64 [[TMP3]], ptr [[__VLA_EXPR1]], align 8
 472 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[N]], align 4
 473 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[N_CASTED]], align 4
 474 // CHECK9-NEXT:    [[TMP7:%.*]] = load i64, ptr [[N_CASTED]], align 8
 475 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[M]], align 4
 476 // CHECK9-NEXT:    store i32 [[TMP8]], ptr [[M_CASTED]], align 4
 477 // CHECK9-NEXT:    [[TMP9:%.*]] = load i64, ptr [[M_CASTED]], align 8
 478 // CHECK9-NEXT:    [[TMP10:%.*]] = mul nuw i64 [[TMP1]], [[TMP3]]
 479 // CHECK9-NEXT:    [[TMP11:%.*]] = mul nuw i64 [[TMP10]], 4
 480 // CHECK9-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 40, i1 false)
 481 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 482 // CHECK9-NEXT:    store i64 [[TMP7]], ptr [[TMP12]], align 8
 483 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 484 // CHECK9-NEXT:    store i64 [[TMP7]], ptr [[TMP13]], align 8
 485 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 486 // CHECK9-NEXT:    store ptr null, ptr [[TMP14]], align 8
 487 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 488 // CHECK9-NEXT:    store i64 [[TMP9]], ptr [[TMP15]], align 8
 489 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 490 // CHECK9-NEXT:    store i64 [[TMP9]], ptr [[TMP16]], align 8
 491 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
 492 // CHECK9-NEXT:    store ptr null, ptr [[TMP17]], align 8
 493 // CHECK9-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
 494 // CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP18]], align 8
 495 // CHECK9-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
 496 // CHECK9-NEXT:    store i64 [[TMP1]], ptr [[TMP19]], align 8
 497 // CHECK9-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
 498 // CHECK9-NEXT:    store ptr null, ptr [[TMP20]], align 8
 499 // CHECK9-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
 500 // CHECK9-NEXT:    store i64 [[TMP3]], ptr [[TMP21]], align 8
 501 // CHECK9-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
 502 // CHECK9-NEXT:    store i64 [[TMP3]], ptr [[TMP22]], align 8
 503 // CHECK9-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 3
 504 // CHECK9-NEXT:    store ptr null, ptr [[TMP23]], align 8
 505 // CHECK9-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
 506 // CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP24]], align 8
 507 // CHECK9-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
 508 // CHECK9-NEXT:    store ptr [[VLA]], ptr [[TMP25]], align 8
 509 // CHECK9-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4
 510 // CHECK9-NEXT:    store i64 [[TMP11]], ptr [[TMP26]], align 8
 511 // CHECK9-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 4
 512 // CHECK9-NEXT:    store ptr null, ptr [[TMP27]], align 8
 513 // CHECK9-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 514 // CHECK9-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 515 // CHECK9-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
 516 // CHECK9-NEXT:    [[TMP31:%.*]] = load i32, ptr [[N]], align 4
 517 // CHECK9-NEXT:    store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_]], align 4
 518 // CHECK9-NEXT:    [[TMP32:%.*]] = load i32, ptr [[M]], align 4
 519 // CHECK9-NEXT:    store i32 [[TMP32]], ptr [[DOTCAPTURE_EXPR_2]], align 4
 520 // CHECK9-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 521 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP33]], 0
 522 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 523 // CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64
 524 // CHECK9-NEXT:    [[TMP34:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
 525 // CHECK9-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[TMP34]], 0
 526 // CHECK9-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
 527 // CHECK9-NEXT:    [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
 528 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
 529 // CHECK9-NEXT:    [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
 530 // CHECK9-NEXT:    store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8
 531 // CHECK9-NEXT:    [[TMP35:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
 532 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP35]], 1
 533 // CHECK9-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 534 // CHECK9-NEXT:    store i32 2, ptr [[TMP36]], align 4
 535 // CHECK9-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 536 // CHECK9-NEXT:    store i32 5, ptr [[TMP37]], align 4
 537 // CHECK9-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 538 // CHECK9-NEXT:    store ptr [[TMP28]], ptr [[TMP38]], align 8
 539 // CHECK9-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 540 // CHECK9-NEXT:    store ptr [[TMP29]], ptr [[TMP39]], align 8
 541 // CHECK9-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 542 // CHECK9-NEXT:    store ptr [[TMP30]], ptr [[TMP40]], align 8
 543 // CHECK9-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 544 // CHECK9-NEXT:    store ptr @.offload_maptypes, ptr [[TMP41]], align 8
 545 // CHECK9-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 546 // CHECK9-NEXT:    store ptr null, ptr [[TMP42]], align 8
 547 // CHECK9-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 548 // CHECK9-NEXT:    store ptr null, ptr [[TMP43]], align 8
 549 // CHECK9-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 550 // CHECK9-NEXT:    store i64 [[ADD]], ptr [[TMP44]], align 8
 551 // CHECK9-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 552 // CHECK9-NEXT:    store i64 0, ptr [[TMP45]], align 8
 553 // CHECK9-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 554 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4
 555 // CHECK9-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 556 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP47]], align 4
 557 // CHECK9-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 558 // CHECK9-NEXT:    store i32 0, ptr [[TMP48]], align 4
 559 // CHECK9-NEXT:    [[TMP49:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.region_id, ptr [[KERNEL_ARGS]])
 560 // CHECK9-NEXT:    [[TMP50:%.*]] = icmp ne i32 [[TMP49]], 0
 561 // CHECK9-NEXT:    br i1 [[TMP50]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 562 // CHECK9:       omp_offload.failed:
 563 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82(i64 [[TMP7]], i64 [[TMP9]], i64 [[TMP1]], i64 [[TMP3]], ptr [[VLA]]) #[[ATTR4:[0-9]+]]
 564 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 565 // CHECK9:       omp_offload.cont:
 566 // CHECK9-NEXT:    [[TMP51:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
 567 // CHECK9-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef signext [[TMP51]])
 568 // CHECK9-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
 569 // CHECK9-NEXT:    [[TMP52:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
 570 // CHECK9-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP52]])
 571 // CHECK9-NEXT:    [[TMP53:%.*]] = load i32, ptr [[RETVAL]], align 4
 572 // CHECK9-NEXT:    ret i32 [[TMP53]]
 573 //
 574 //
 575 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82
 576 // CHECK9-SAME: (i64 noundef [[N:%.*]], i64 noundef [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
 577 // CHECK9-NEXT:  entry:
 578 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
 579 // CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
 580 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
 581 // CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8
 582 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 583 // CHECK9-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
 584 // CHECK9-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8
 585 // CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
 586 // CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8
 587 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 588 // CHECK9-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
 589 // CHECK9-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8
 590 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 591 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i64 [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])
 592 // CHECK9-NEXT:    ret void
 593 //
 594 //
 595 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined
 596 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i64 noundef [[VLA:%.*]], i64 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
 597 // CHECK9-NEXT:  entry:
 598 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 599 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 600 // CHECK9-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
 601 // CHECK9-NEXT:    [[M_ADDR:%.*]] = alloca ptr, align 8
 602 // CHECK9-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
 603 // CHECK9-NEXT:    [[VLA_ADDR2:%.*]] = alloca i64, align 8
 604 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 605 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 8
 606 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 607 // CHECK9-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
 608 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 609 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
 610 // CHECK9-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
 611 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
 612 // CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 4
 613 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i64, align 8
 614 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i64, align 8
 615 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
 616 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 617 // CHECK9-NEXT:    [[I11:%.*]] = alloca i32, align 4
 618 // CHECK9-NEXT:    [[J12:%.*]] = alloca i32, align 4
 619 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 620 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 621 // CHECK9-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
 622 // CHECK9-NEXT:    store ptr [[M]], ptr [[M_ADDR]], align 8
 623 // CHECK9-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
 624 // CHECK9-NEXT:    store i64 [[VLA1]], ptr [[VLA_ADDR2]], align 8
 625 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 626 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
 627 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 8
 628 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
 629 // CHECK9-NEXT:    [[TMP3:%.*]] = load i64, ptr [[VLA_ADDR2]], align 8
 630 // CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 631 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4
 632 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4
 633 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4
 634 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4
 635 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 636 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
 637 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 638 // CHECK9-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64
 639 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
 640 // CHECK9-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
 641 // CHECK9-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
 642 // CHECK9-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
 643 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
 644 // CHECK9-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
 645 // CHECK9-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8
 646 // CHECK9-NEXT:    store i32 0, ptr [[I]], align 4
 647 // CHECK9-NEXT:    store i32 0, ptr [[J]], align 4
 648 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 649 // CHECK9-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
 650 // CHECK9-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
 651 // CHECK9:       land.lhs.true:
 652 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
 653 // CHECK9-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
 654 // CHECK9-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
 655 // CHECK9:       omp.precond.then:
 656 // CHECK9-NEXT:    store i64 0, ptr [[DOTOMP_LB]], align 8
 657 // CHECK9-NEXT:    [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
 658 // CHECK9-NEXT:    store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 8
 659 // CHECK9-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 8
 660 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 661 // CHECK9-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 662 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
 663 // CHECK9-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)
 664 // CHECK9-NEXT:    [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
 665 // CHECK9-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
 666 // CHECK9-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
 667 // CHECK9-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 668 // CHECK9:       cond.true:
 669 // CHECK9-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
 670 // CHECK9-NEXT:    br label [[COND_END:%.*]]
 671 // CHECK9:       cond.false:
 672 // CHECK9-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
 673 // CHECK9-NEXT:    br label [[COND_END]]
 674 // CHECK9:       cond.end:
 675 // CHECK9-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
 676 // CHECK9-NEXT:    store i64 [[COND]], ptr [[DOTOMP_UB]], align 8
 677 // CHECK9-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
 678 // CHECK9-NEXT:    store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8
 679 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 680 // CHECK9:       omp.inner.for.cond:
 681 // CHECK9-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
 682 // CHECK9-NEXT:    [[TMP20:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
 683 // CHECK9-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
 684 // CHECK9-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 685 // CHECK9:       omp.inner.for.body:
 686 // CHECK9-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
 687 // CHECK9-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
 688 // CHECK9-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0
 689 // CHECK9-NEXT:    [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
 690 // CHECK9-NEXT:    [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
 691 // CHECK9-NEXT:    [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
 692 // CHECK9-NEXT:    [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]]
 693 // CHECK9-NEXT:    [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
 694 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
 695 // CHECK9-NEXT:    [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
 696 // CHECK9-NEXT:    store i32 [[CONV21]], ptr [[I11]], align 4
 697 // CHECK9-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
 698 // CHECK9-NEXT:    [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
 699 // CHECK9-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
 700 // CHECK9-NEXT:    [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0
 701 // CHECK9-NEXT:    [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
 702 // CHECK9-NEXT:    [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
 703 // CHECK9-NEXT:    [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
 704 // CHECK9-NEXT:    [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]]
 705 // CHECK9-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
 706 // CHECK9-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0
 707 // CHECK9-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
 708 // CHECK9-NEXT:    [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
 709 // CHECK9-NEXT:    [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
 710 // CHECK9-NEXT:    [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
 711 // CHECK9-NEXT:    [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]]
 712 // CHECK9-NEXT:    [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
 713 // CHECK9-NEXT:    [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
 714 // CHECK9-NEXT:    [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
 715 // CHECK9-NEXT:    store i32 [[CONV35]], ptr [[J12]], align 4
 716 // CHECK9-NEXT:    [[TMP27:%.*]] = load i32, ptr [[I11]], align 4
 717 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP27]] to i64
 718 // CHECK9-NEXT:    [[TMP28:%.*]] = mul nsw i64 [[IDXPROM]], [[TMP3]]
 719 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i64 [[TMP28]]
 720 // CHECK9-NEXT:    [[TMP29:%.*]] = load i32, ptr [[J12]], align 4
 721 // CHECK9-NEXT:    [[IDXPROM36:%.*]] = sext i32 [[TMP29]] to i64
 722 // CHECK9-NEXT:    [[ARRAYIDX37:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i64 [[IDXPROM36]]
 723 // CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX37]], align 4
 724 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 725 // CHECK9:       omp.body.continue:
 726 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 727 // CHECK9:       omp.inner.for.inc:
 728 // CHECK9-NEXT:    [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
 729 // CHECK9-NEXT:    [[ADD38:%.*]] = add nsw i64 [[TMP30]], 1
 730 // CHECK9-NEXT:    store i64 [[ADD38]], ptr [[DOTOMP_IV]], align 8
 731 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
 732 // CHECK9:       omp.inner.for.end:
 733 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 734 // CHECK9:       omp.loop.exit:
 735 // CHECK9-NEXT:    [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 736 // CHECK9-NEXT:    [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4
 737 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP32]])
 738 // CHECK9-NEXT:    br label [[OMP_PRECOND_END]]
 739 // CHECK9:       omp.precond.end:
 740 // CHECK9-NEXT:    ret void
 741 //
 742 //
 743 // CHECK9-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
 744 // CHECK9-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
 745 // CHECK9-NEXT:  entry:
 746 // CHECK9-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
 747 // CHECK9-NEXT:    [[A:%.*]] = alloca [10 x [2 x i32]], align 4
 748 // CHECK9-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
 749 // CHECK9-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
 750 // CHECK9-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
 751 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 752 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 753 // CHECK9-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 754 // CHECK9-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
 755 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 756 // CHECK9-NEXT:    store ptr [[A]], ptr [[TMP0]], align 8
 757 // CHECK9-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 758 // CHECK9-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
 759 // CHECK9-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 760 // CHECK9-NEXT:    store ptr null, ptr [[TMP2]], align 8
 761 // CHECK9-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 762 // CHECK9-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 763 // CHECK9-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 764 // CHECK9-NEXT:    store i32 2, ptr [[TMP5]], align 4
 765 // CHECK9-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 766 // CHECK9-NEXT:    store i32 1, ptr [[TMP6]], align 4
 767 // CHECK9-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 768 // CHECK9-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
 769 // CHECK9-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 770 // CHECK9-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
 771 // CHECK9-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 772 // CHECK9-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP9]], align 8
 773 // CHECK9-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 774 // CHECK9-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP10]], align 8
 775 // CHECK9-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 776 // CHECK9-NEXT:    store ptr null, ptr [[TMP11]], align 8
 777 // CHECK9-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 778 // CHECK9-NEXT:    store ptr null, ptr [[TMP12]], align 8
 779 // CHECK9-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 780 // CHECK9-NEXT:    store i64 20, ptr [[TMP13]], align 8
 781 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 782 // CHECK9-NEXT:    store i64 0, ptr [[TMP14]], align 8
 783 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 784 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
 785 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 786 // CHECK9-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
 787 // CHECK9-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 788 // CHECK9-NEXT:    store i32 0, ptr [[TMP17]], align 4
 789 // CHECK9-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, ptr [[KERNEL_ARGS]])
 790 // CHECK9-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
 791 // CHECK9-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 792 // CHECK9:       omp_offload.failed:
 793 // CHECK9-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68(ptr [[A]]) #[[ATTR4]]
 794 // CHECK9-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 795 // CHECK9:       omp_offload.cont:
 796 // CHECK9-NEXT:    ret i32 0
 797 //
 798 //
 799 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
 800 // CHECK9-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
 801 // CHECK9-NEXT:  entry:
 802 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 803 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 804 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 805 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined, ptr [[TMP0]])
 806 // CHECK9-NEXT:    ret void
 807 //
 808 //
 809 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined
 810 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR3]] {
 811 // CHECK9-NEXT:  entry:
 812 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 813 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 814 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 815 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 816 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 817 // CHECK9-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 818 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 819 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 820 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 821 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 822 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
 823 // CHECK9-NEXT:    [[J:%.*]] = alloca i32, align 4
 824 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 825 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 826 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 827 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 828 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 829 // CHECK9-NEXT:    store i32 19, ptr [[DOTOMP_UB]], align 4
 830 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 831 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 832 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 833 // CHECK9-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 834 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 835 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 836 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
 837 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 838 // CHECK9:       cond.true:
 839 // CHECK9-NEXT:    br label [[COND_END:%.*]]
 840 // CHECK9:       cond.false:
 841 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 842 // CHECK9-NEXT:    br label [[COND_END]]
 843 // CHECK9:       cond.end:
 844 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 845 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 846 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 847 // CHECK9-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 848 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 849 // CHECK9:       omp.inner.for.cond:
 850 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 851 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 852 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 853 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 854 // CHECK9:       omp.inner.for.body:
 855 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 856 // CHECK9-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 2
 857 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
 858 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 859 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 860 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 861 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 862 // CHECK9-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2
 863 // CHECK9-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
 864 // CHECK9-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
 865 // CHECK9-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
 866 // CHECK9-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
 867 // CHECK9-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4
 868 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
 869 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
 870 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
 871 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4
 872 // CHECK9-NEXT:    [[IDXPROM7:%.*]] = sext i32 [[TMP12]] to i64
 873 // CHECK9-NEXT:    [[ARRAYIDX8:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i64 0, i64 [[IDXPROM7]]
 874 // CHECK9-NEXT:    store i32 0, ptr [[ARRAYIDX8]], align 4
 875 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 876 // CHECK9:       omp.body.continue:
 877 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 878 // CHECK9:       omp.inner.for.inc:
 879 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 880 // CHECK9-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP13]], 1
 881 // CHECK9-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_IV]], align 4
 882 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
 883 // CHECK9:       omp.inner.for.end:
 884 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 885 // CHECK9:       omp.loop.exit:
 886 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 887 // CHECK9-NEXT:    ret void
 888 //
 889 //
 890 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 891 // CHECK9-SAME: () #[[ATTR7:[0-9]+]] {
 892 // CHECK9-NEXT:  entry:
 893 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
 894 // CHECK9-NEXT:    ret void
 895 //
 896 //
 897 // CHECK11-LABEL: define {{[^@]+}}@main
 898 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
 899 // CHECK11-NEXT:  entry:
 900 // CHECK11-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 901 // CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
 902 // CHECK11-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 4
 903 // CHECK11-NEXT:    [[N:%.*]] = alloca i32, align 4
 904 // CHECK11-NEXT:    [[M:%.*]] = alloca i32, align 4
 905 // CHECK11-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 4
 906 // CHECK11-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
 907 // CHECK11-NEXT:    [[__VLA_EXPR1:%.*]] = alloca i32, align 4
 908 // CHECK11-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
 909 // CHECK11-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
 910 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [5 x ptr], align 4
 911 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [5 x ptr], align 4
 912 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [5 x ptr], align 4
 913 // CHECK11-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [5 x i64], align 4
 914 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 915 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
 916 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
 917 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
 918 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_3:%.*]] = alloca i64, align 8
 919 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 920 // CHECK11-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 921 // CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
 922 // CHECK11-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4
 923 // CHECK11-NEXT:    store i32 100, ptr [[N]], align 4
 924 // CHECK11-NEXT:    store i32 2, ptr [[M]], align 4
 925 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
 926 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M]], align 4
 927 // CHECK11-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
 928 // CHECK11-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 4
 929 // CHECK11-NEXT:    [[TMP3:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
 930 // CHECK11-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP3]], align 4
 931 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4
 932 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[__VLA_EXPR1]], align 4
 933 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[N]], align 4
 934 // CHECK11-NEXT:    store i32 [[TMP4]], ptr [[N_CASTED]], align 4
 935 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[N_CASTED]], align 4
 936 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[M]], align 4
 937 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[M_CASTED]], align 4
 938 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[M_CASTED]], align 4
 939 // CHECK11-NEXT:    [[TMP8:%.*]] = mul nuw i32 [[TMP0]], [[TMP1]]
 940 // CHECK11-NEXT:    [[TMP9:%.*]] = mul nuw i32 [[TMP8]], 4
 941 // CHECK11-NEXT:    [[TMP10:%.*]] = sext i32 [[TMP9]] to i64
 942 // CHECK11-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 40, i1 false)
 943 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 944 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP11]], align 4
 945 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 946 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[TMP12]], align 4
 947 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
 948 // CHECK11-NEXT:    store ptr null, ptr [[TMP13]], align 4
 949 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 950 // CHECK11-NEXT:    store i32 [[TMP7]], ptr [[TMP14]], align 4
 951 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 952 // CHECK11-NEXT:    store i32 [[TMP7]], ptr [[TMP15]], align 4
 953 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
 954 // CHECK11-NEXT:    store ptr null, ptr [[TMP16]], align 4
 955 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
 956 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP17]], align 4
 957 // CHECK11-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
 958 // CHECK11-NEXT:    store i32 [[TMP0]], ptr [[TMP18]], align 4
 959 // CHECK11-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
 960 // CHECK11-NEXT:    store ptr null, ptr [[TMP19]], align 4
 961 // CHECK11-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 3
 962 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[TMP20]], align 4
 963 // CHECK11-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 3
 964 // CHECK11-NEXT:    store i32 [[TMP1]], ptr [[TMP21]], align 4
 965 // CHECK11-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 3
 966 // CHECK11-NEXT:    store ptr null, ptr [[TMP22]], align 4
 967 // CHECK11-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 4
 968 // CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP23]], align 4
 969 // CHECK11-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 4
 970 // CHECK11-NEXT:    store ptr [[VLA]], ptr [[TMP24]], align 4
 971 // CHECK11-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 4
 972 // CHECK11-NEXT:    store i64 [[TMP10]], ptr [[TMP25]], align 4
 973 // CHECK11-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 4
 974 // CHECK11-NEXT:    store ptr null, ptr [[TMP26]], align 4
 975 // CHECK11-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 976 // CHECK11-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [5 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 977 // CHECK11-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [5 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
 978 // CHECK11-NEXT:    [[TMP30:%.*]] = load i32, ptr [[N]], align 4
 979 // CHECK11-NEXT:    store i32 [[TMP30]], ptr [[DOTCAPTURE_EXPR_]], align 4
 980 // CHECK11-NEXT:    [[TMP31:%.*]] = load i32, ptr [[M]], align 4
 981 // CHECK11-NEXT:    store i32 [[TMP31]], ptr [[DOTCAPTURE_EXPR_2]], align 4
 982 // CHECK11-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
 983 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP32]], 0
 984 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
 985 // CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64
 986 // CHECK11-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
 987 // CHECK11-NEXT:    [[SUB4:%.*]] = sub nsw i32 [[TMP33]], 0
 988 // CHECK11-NEXT:    [[DIV5:%.*]] = sdiv i32 [[SUB4]], 1
 989 // CHECK11-NEXT:    [[CONV6:%.*]] = sext i32 [[DIV5]] to i64
 990 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV6]]
 991 // CHECK11-NEXT:    [[SUB7:%.*]] = sub nsw i64 [[MUL]], 1
 992 // CHECK11-NEXT:    store i64 [[SUB7]], ptr [[DOTCAPTURE_EXPR_3]], align 8
 993 // CHECK11-NEXT:    [[TMP34:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_3]], align 8
 994 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 [[TMP34]], 1
 995 // CHECK11-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 996 // CHECK11-NEXT:    store i32 2, ptr [[TMP35]], align 4
 997 // CHECK11-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 998 // CHECK11-NEXT:    store i32 5, ptr [[TMP36]], align 4
 999 // CHECK11-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1000 // CHECK11-NEXT:    store ptr [[TMP27]], ptr [[TMP37]], align 4
1001 // CHECK11-NEXT:    [[TMP38:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1002 // CHECK11-NEXT:    store ptr [[TMP28]], ptr [[TMP38]], align 4
1003 // CHECK11-NEXT:    [[TMP39:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1004 // CHECK11-NEXT:    store ptr [[TMP29]], ptr [[TMP39]], align 4
1005 // CHECK11-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1006 // CHECK11-NEXT:    store ptr @.offload_maptypes, ptr [[TMP40]], align 4
1007 // CHECK11-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1008 // CHECK11-NEXT:    store ptr null, ptr [[TMP41]], align 4
1009 // CHECK11-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1010 // CHECK11-NEXT:    store ptr null, ptr [[TMP42]], align 4
1011 // CHECK11-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1012 // CHECK11-NEXT:    store i64 [[ADD]], ptr [[TMP43]], align 8
1013 // CHECK11-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1014 // CHECK11-NEXT:    store i64 0, ptr [[TMP44]], align 8
1015 // CHECK11-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1016 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP45]], align 4
1017 // CHECK11-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1018 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP46]], align 4
1019 // CHECK11-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1020 // CHECK11-NEXT:    store i32 0, ptr [[TMP47]], align 4
1021 // CHECK11-NEXT:    [[TMP48:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.region_id, ptr [[KERNEL_ARGS]])
1022 // CHECK11-NEXT:    [[TMP49:%.*]] = icmp ne i32 [[TMP48]], 0
1023 // CHECK11-NEXT:    br i1 [[TMP49]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1024 // CHECK11:       omp_offload.failed:
1025 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82(i32 [[TMP5]], i32 [[TMP7]], i32 [[TMP0]], i32 [[TMP1]], ptr [[VLA]]) #[[ATTR4:[0-9]+]]
1026 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1027 // CHECK11:       omp_offload.cont:
1028 // CHECK11-NEXT:    [[TMP50:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
1029 // CHECK11-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10ELi2EEiT_(i32 noundef [[TMP50]])
1030 // CHECK11-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
1031 // CHECK11-NEXT:    [[TMP51:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4
1032 // CHECK11-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP51]])
1033 // CHECK11-NEXT:    [[TMP52:%.*]] = load i32, ptr [[RETVAL]], align 4
1034 // CHECK11-NEXT:    ret i32 [[TMP52]]
1035 //
1036 //
1037 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82
1038 // CHECK11-SAME: (i32 noundef [[N:%.*]], i32 noundef [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1039 // CHECK11-NEXT:  entry:
1040 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
1041 // CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
1042 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
1043 // CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 4
1044 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1045 // CHECK11-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
1046 // CHECK11-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 4
1047 // CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
1048 // CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4
1049 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1050 // CHECK11-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
1051 // CHECK11-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4
1052 // CHECK11-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1053 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined, ptr [[N_ADDR]], ptr [[M_ADDR]], i32 [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])
1054 // CHECK11-NEXT:    ret void
1055 //
1056 //
1057 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l82.omp_outlined
1058 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[M:%.*]], i32 noundef [[VLA:%.*]], i32 noundef [[VLA1:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
1059 // CHECK11-NEXT:  entry:
1060 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1061 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1062 // CHECK11-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
1063 // CHECK11-NEXT:    [[M_ADDR:%.*]] = alloca ptr, align 4
1064 // CHECK11-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
1065 // CHECK11-NEXT:    [[VLA_ADDR2:%.*]] = alloca i32, align 4
1066 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1067 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i64, align 8
1068 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1069 // CHECK11-NEXT:    [[_TMP3:%.*]] = alloca i32, align 4
1070 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
1071 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_4:%.*]] = alloca i32, align 4
1072 // CHECK11-NEXT:    [[DOTCAPTURE_EXPR_5:%.*]] = alloca i64, align 8
1073 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1074 // CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 4
1075 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i64, align 8
1076 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i64, align 8
1077 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i64, align 8
1078 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1079 // CHECK11-NEXT:    [[I11:%.*]] = alloca i32, align 4
1080 // CHECK11-NEXT:    [[J12:%.*]] = alloca i32, align 4
1081 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1082 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1083 // CHECK11-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
1084 // CHECK11-NEXT:    store ptr [[M]], ptr [[M_ADDR]], align 4
1085 // CHECK11-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
1086 // CHECK11-NEXT:    store i32 [[VLA1]], ptr [[VLA_ADDR2]], align 4
1087 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1088 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
1089 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[M_ADDR]], align 4
1090 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
1091 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[VLA_ADDR2]], align 4
1092 // CHECK11-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1093 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP0]], align 4
1094 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTCAPTURE_EXPR_]], align 4
1095 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP1]], align 4
1096 // CHECK11-NEXT:    store i32 [[TMP6]], ptr [[DOTCAPTURE_EXPR_4]], align 4
1097 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1098 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP7]], 0
1099 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
1100 // CHECK11-NEXT:    [[CONV:%.*]] = sext i32 [[DIV]] to i64
1101 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1102 // CHECK11-NEXT:    [[SUB6:%.*]] = sub nsw i32 [[TMP8]], 0
1103 // CHECK11-NEXT:    [[DIV7:%.*]] = sdiv i32 [[SUB6]], 1
1104 // CHECK11-NEXT:    [[CONV8:%.*]] = sext i32 [[DIV7]] to i64
1105 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i64 [[CONV]], [[CONV8]]
1106 // CHECK11-NEXT:    [[SUB9:%.*]] = sub nsw i64 [[MUL]], 1
1107 // CHECK11-NEXT:    store i64 [[SUB9]], ptr [[DOTCAPTURE_EXPR_5]], align 8
1108 // CHECK11-NEXT:    store i32 0, ptr [[I]], align 4
1109 // CHECK11-NEXT:    store i32 0, ptr [[J]], align 4
1110 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
1111 // CHECK11-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP9]]
1112 // CHECK11-NEXT:    br i1 [[CMP]], label [[LAND_LHS_TRUE:%.*]], label [[OMP_PRECOND_END:%.*]]
1113 // CHECK11:       land.lhs.true:
1114 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1115 // CHECK11-NEXT:    [[CMP10:%.*]] = icmp slt i32 0, [[TMP10]]
1116 // CHECK11-NEXT:    br i1 [[CMP10]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END]]
1117 // CHECK11:       omp.precond.then:
1118 // CHECK11-NEXT:    store i64 0, ptr [[DOTOMP_LB]], align 8
1119 // CHECK11-NEXT:    [[TMP11:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
1120 // CHECK11-NEXT:    store i64 [[TMP11]], ptr [[DOTOMP_UB]], align 8
1121 // CHECK11-NEXT:    store i64 1, ptr [[DOTOMP_STRIDE]], align 8
1122 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1123 // CHECK11-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1124 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
1125 // CHECK11-NEXT:    call void @__kmpc_for_static_init_8(ptr @[[GLOB1:[0-9]+]], i32 [[TMP13]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i64 1, i64 1)
1126 // CHECK11-NEXT:    [[TMP14:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
1127 // CHECK11-NEXT:    [[TMP15:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
1128 // CHECK11-NEXT:    [[CMP13:%.*]] = icmp sgt i64 [[TMP14]], [[TMP15]]
1129 // CHECK11-NEXT:    br i1 [[CMP13]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1130 // CHECK11:       cond.true:
1131 // CHECK11-NEXT:    [[TMP16:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR_5]], align 8
1132 // CHECK11-NEXT:    br label [[COND_END:%.*]]
1133 // CHECK11:       cond.false:
1134 // CHECK11-NEXT:    [[TMP17:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
1135 // CHECK11-NEXT:    br label [[COND_END]]
1136 // CHECK11:       cond.end:
1137 // CHECK11-NEXT:    [[COND:%.*]] = phi i64 [ [[TMP16]], [[COND_TRUE]] ], [ [[TMP17]], [[COND_FALSE]] ]
1138 // CHECK11-NEXT:    store i64 [[COND]], ptr [[DOTOMP_UB]], align 8
1139 // CHECK11-NEXT:    [[TMP18:%.*]] = load i64, ptr [[DOTOMP_LB]], align 8
1140 // CHECK11-NEXT:    store i64 [[TMP18]], ptr [[DOTOMP_IV]], align 8
1141 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1142 // CHECK11:       omp.inner.for.cond:
1143 // CHECK11-NEXT:    [[TMP19:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1144 // CHECK11-NEXT:    [[TMP20:%.*]] = load i64, ptr [[DOTOMP_UB]], align 8
1145 // CHECK11-NEXT:    [[CMP14:%.*]] = icmp sle i64 [[TMP19]], [[TMP20]]
1146 // CHECK11-NEXT:    br i1 [[CMP14]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1147 // CHECK11:       omp.inner.for.body:
1148 // CHECK11-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1149 // CHECK11-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1150 // CHECK11-NEXT:    [[SUB15:%.*]] = sub nsw i32 [[TMP22]], 0
1151 // CHECK11-NEXT:    [[DIV16:%.*]] = sdiv i32 [[SUB15]], 1
1152 // CHECK11-NEXT:    [[MUL17:%.*]] = mul nsw i32 1, [[DIV16]]
1153 // CHECK11-NEXT:    [[CONV18:%.*]] = sext i32 [[MUL17]] to i64
1154 // CHECK11-NEXT:    [[DIV19:%.*]] = sdiv i64 [[TMP21]], [[CONV18]]
1155 // CHECK11-NEXT:    [[MUL20:%.*]] = mul nsw i64 [[DIV19]], 1
1156 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i64 0, [[MUL20]]
1157 // CHECK11-NEXT:    [[CONV21:%.*]] = trunc i64 [[ADD]] to i32
1158 // CHECK11-NEXT:    store i32 [[CONV21]], ptr [[I11]], align 4
1159 // CHECK11-NEXT:    [[TMP23:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1160 // CHECK11-NEXT:    [[TMP24:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1161 // CHECK11-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1162 // CHECK11-NEXT:    [[SUB22:%.*]] = sub nsw i32 [[TMP25]], 0
1163 // CHECK11-NEXT:    [[DIV23:%.*]] = sdiv i32 [[SUB22]], 1
1164 // CHECK11-NEXT:    [[MUL24:%.*]] = mul nsw i32 1, [[DIV23]]
1165 // CHECK11-NEXT:    [[CONV25:%.*]] = sext i32 [[MUL24]] to i64
1166 // CHECK11-NEXT:    [[DIV26:%.*]] = sdiv i64 [[TMP24]], [[CONV25]]
1167 // CHECK11-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_4]], align 4
1168 // CHECK11-NEXT:    [[SUB27:%.*]] = sub nsw i32 [[TMP26]], 0
1169 // CHECK11-NEXT:    [[DIV28:%.*]] = sdiv i32 [[SUB27]], 1
1170 // CHECK11-NEXT:    [[MUL29:%.*]] = mul nsw i32 1, [[DIV28]]
1171 // CHECK11-NEXT:    [[CONV30:%.*]] = sext i32 [[MUL29]] to i64
1172 // CHECK11-NEXT:    [[MUL31:%.*]] = mul nsw i64 [[DIV26]], [[CONV30]]
1173 // CHECK11-NEXT:    [[SUB32:%.*]] = sub nsw i64 [[TMP23]], [[MUL31]]
1174 // CHECK11-NEXT:    [[MUL33:%.*]] = mul nsw i64 [[SUB32]], 1
1175 // CHECK11-NEXT:    [[ADD34:%.*]] = add nsw i64 0, [[MUL33]]
1176 // CHECK11-NEXT:    [[CONV35:%.*]] = trunc i64 [[ADD34]] to i32
1177 // CHECK11-NEXT:    store i32 [[CONV35]], ptr [[J12]], align 4
1178 // CHECK11-NEXT:    [[TMP27:%.*]] = load i32, ptr [[I11]], align 4
1179 // CHECK11-NEXT:    [[TMP28:%.*]] = mul nsw i32 [[TMP27]], [[TMP3]]
1180 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP4]], i32 [[TMP28]]
1181 // CHECK11-NEXT:    [[TMP29:%.*]] = load i32, ptr [[J12]], align 4
1182 // CHECK11-NEXT:    [[ARRAYIDX36:%.*]] = getelementptr inbounds i32, ptr [[ARRAYIDX]], i32 [[TMP29]]
1183 // CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX36]], align 4
1184 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1185 // CHECK11:       omp.body.continue:
1186 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1187 // CHECK11:       omp.inner.for.inc:
1188 // CHECK11-NEXT:    [[TMP30:%.*]] = load i64, ptr [[DOTOMP_IV]], align 8
1189 // CHECK11-NEXT:    [[ADD37:%.*]] = add nsw i64 [[TMP30]], 1
1190 // CHECK11-NEXT:    store i64 [[ADD37]], ptr [[DOTOMP_IV]], align 8
1191 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]
1192 // CHECK11:       omp.inner.for.end:
1193 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1194 // CHECK11:       omp.loop.exit:
1195 // CHECK11-NEXT:    [[TMP31:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1196 // CHECK11-NEXT:    [[TMP32:%.*]] = load i32, ptr [[TMP31]], align 4
1197 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP32]])
1198 // CHECK11-NEXT:    br label [[OMP_PRECOND_END]]
1199 // CHECK11:       omp.precond.end:
1200 // CHECK11-NEXT:    ret void
1201 //
1202 //
1203 // CHECK11-LABEL: define {{[^@]+}}@_Z5tmainIiLi10ELi2EEiT_
1204 // CHECK11-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
1205 // CHECK11-NEXT:  entry:
1206 // CHECK11-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
1207 // CHECK11-NEXT:    [[A:%.*]] = alloca [10 x [2 x i32]], align 4
1208 // CHECK11-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
1209 // CHECK11-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
1210 // CHECK11-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
1211 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1212 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1213 // CHECK11-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1214 // CHECK11-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
1215 // CHECK11-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1216 // CHECK11-NEXT:    store ptr [[A]], ptr [[TMP0]], align 4
1217 // CHECK11-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1218 // CHECK11-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
1219 // CHECK11-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1220 // CHECK11-NEXT:    store ptr null, ptr [[TMP2]], align 4
1221 // CHECK11-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1222 // CHECK11-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1223 // CHECK11-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1224 // CHECK11-NEXT:    store i32 2, ptr [[TMP5]], align 4
1225 // CHECK11-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1226 // CHECK11-NEXT:    store i32 1, ptr [[TMP6]], align 4
1227 // CHECK11-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1228 // CHECK11-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
1229 // CHECK11-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1230 // CHECK11-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
1231 // CHECK11-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1232 // CHECK11-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP9]], align 4
1233 // CHECK11-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1234 // CHECK11-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP10]], align 4
1235 // CHECK11-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1236 // CHECK11-NEXT:    store ptr null, ptr [[TMP11]], align 4
1237 // CHECK11-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1238 // CHECK11-NEXT:    store ptr null, ptr [[TMP12]], align 4
1239 // CHECK11-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1240 // CHECK11-NEXT:    store i64 20, ptr [[TMP13]], align 8
1241 // CHECK11-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1242 // CHECK11-NEXT:    store i64 0, ptr [[TMP14]], align 8
1243 // CHECK11-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1244 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
1245 // CHECK11-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1246 // CHECK11-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
1247 // CHECK11-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1248 // CHECK11-NEXT:    store i32 0, ptr [[TMP17]], align 4
1249 // CHECK11-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB2]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.region_id, ptr [[KERNEL_ARGS]])
1250 // CHECK11-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1251 // CHECK11-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1252 // CHECK11:       omp_offload.failed:
1253 // CHECK11-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68(ptr [[A]]) #[[ATTR4]]
1254 // CHECK11-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1255 // CHECK11:       omp_offload.cont:
1256 // CHECK11-NEXT:    ret i32 0
1257 //
1258 //
1259 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68
1260 // CHECK11-SAME: (ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR2]] {
1261 // CHECK11-NEXT:  entry:
1262 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1263 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1264 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1265 // CHECK11-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB2]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined, ptr [[TMP0]])
1266 // CHECK11-NEXT:    ret void
1267 //
1268 //
1269 // CHECK11-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10ELi2EEiT__l68.omp_outlined
1270 // CHECK11-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(80) [[A:%.*]]) #[[ATTR3]] {
1271 // CHECK11-NEXT:  entry:
1272 // CHECK11-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1273 // CHECK11-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1274 // CHECK11-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
1275 // CHECK11-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1276 // CHECK11-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1277 // CHECK11-NEXT:    [[_TMP1:%.*]] = alloca i32, align 4
1278 // CHECK11-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1279 // CHECK11-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1280 // CHECK11-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1281 // CHECK11-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1282 // CHECK11-NEXT:    [[I:%.*]] = alloca i32, align 4
1283 // CHECK11-NEXT:    [[J:%.*]] = alloca i32, align 4
1284 // CHECK11-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1285 // CHECK11-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1286 // CHECK11-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
1287 // CHECK11-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
1288 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1289 // CHECK11-NEXT:    store i32 19, ptr [[DOTOMP_UB]], align 4
1290 // CHECK11-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1291 // CHECK11-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1292 // CHECK11-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1293 // CHECK11-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1294 // CHECK11-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1295 // CHECK11-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1296 // CHECK11-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 19
1297 // CHECK11-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1298 // CHECK11:       cond.true:
1299 // CHECK11-NEXT:    br label [[COND_END:%.*]]
1300 // CHECK11:       cond.false:
1301 // CHECK11-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1302 // CHECK11-NEXT:    br label [[COND_END]]
1303 // CHECK11:       cond.end:
1304 // CHECK11-NEXT:    [[COND:%.*]] = phi i32 [ 19, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1305 // CHECK11-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1306 // CHECK11-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1307 // CHECK11-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1308 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1309 // CHECK11:       omp.inner.for.cond:
1310 // CHECK11-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1311 // CHECK11-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1312 // CHECK11-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1313 // CHECK11-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1314 // CHECK11:       omp.inner.for.body:
1315 // CHECK11-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1316 // CHECK11-NEXT:    [[DIV:%.*]] = sdiv i32 [[TMP8]], 2
1317 // CHECK11-NEXT:    [[MUL:%.*]] = mul nsw i32 [[DIV]], 1
1318 // CHECK11-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1319 // CHECK11-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1320 // CHECK11-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1321 // CHECK11-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1322 // CHECK11-NEXT:    [[DIV3:%.*]] = sdiv i32 [[TMP10]], 2
1323 // CHECK11-NEXT:    [[MUL4:%.*]] = mul nsw i32 [[DIV3]], 2
1324 // CHECK11-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP9]], [[MUL4]]
1325 // CHECK11-NEXT:    [[MUL5:%.*]] = mul nsw i32 [[SUB]], 1
1326 // CHECK11-NEXT:    [[ADD6:%.*]] = add nsw i32 0, [[MUL5]]
1327 // CHECK11-NEXT:    store i32 [[ADD6]], ptr [[J]], align 4
1328 // CHECK11-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
1329 // CHECK11-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x [2 x i32]], ptr [[TMP0]], i32 0, i32 [[TMP11]]
1330 // CHECK11-NEXT:    [[TMP12:%.*]] = load i32, ptr [[J]], align 4
1331 // CHECK11-NEXT:    [[ARRAYIDX7:%.*]] = getelementptr inbounds [2 x i32], ptr [[ARRAYIDX]], i32 0, i32 [[TMP12]]
1332 // CHECK11-NEXT:    store i32 0, ptr [[ARRAYIDX7]], align 4
1333 // CHECK11-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1334 // CHECK11:       omp.body.continue:
1335 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1336 // CHECK11:       omp.inner.for.inc:
1337 // CHECK11-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1338 // CHECK11-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP13]], 1
1339 // CHECK11-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
1340 // CHECK11-NEXT:    br label [[OMP_INNER_FOR_COND]]
1341 // CHECK11:       omp.inner.for.end:
1342 // CHECK11-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1343 // CHECK11:       omp.loop.exit:
1344 // CHECK11-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1345 // CHECK11-NEXT:    ret void
1346 //
1347 //
1348 // CHECK11-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1349 // CHECK11-SAME: () #[[ATTR7:[0-9]+]] {
1350 // CHECK11-NEXT:  entry:
1351 // CHECK11-NEXT:    call void @__tgt_register_requires(i64 1)
1352 // CHECK11-NEXT:    ret void
1353 //