clang/test/OpenMP/teams_distribute_parallel_for_copyin_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   3 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   4 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
   5 // RUN: %clang_cc1 -DCHECK -verify -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
   6 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
   7 // RUN: %clang_cc1 -DCHECK -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
   8
   9 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  10 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  11 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  12 // RUN: %clang_cc1 -DCHECK -verify -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  13 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  14 // RUN: %clang_cc1 -DCHECK -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  15
  16 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK9
  17 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  18 // RUN: %clang_cc1 -DLAMBDA -fopenmp -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK9
  19
  20 // RUN: %clang_cc1 -DLAMBDA -verify -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  21 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  22 // RUN: %clang_cc1 -DLAMBDA -fopenmp-simd -x c++  -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  23
  24 // expected-no-diagnostics
  25 #ifndef HEADER
  26 #define HEADER
  27
  28 int x;
  29 #pragma omp threadprivate(x)
  30
  31 template <typename T>
  32 T tmain() {
  33   int a[2];
  34 #pragma omp target
  35 #pragma omp teams distribute parallel for copyin(x)
  36   for (int i = 0; i < 2; ++i) {
  37     a[i] = x;
  38   }
  39   return T();
  40 }
  41
  42 int main() {
  43   int a[2];
  44 #ifdef LAMBDA
  45   [&]() {
  46 #pragma omp target
  47 #pragma omp teams distribute parallel for copyin(x)
  48   for (int i = 0; i < 2; ++i) {
  49
  50     // Skip global, bound tid and loop vars
  51     a[i] = x;
  52
  53
  54     // Skip global, bound tid and loop vars
  55
  56
  57     [&]() {
  58       a[i] = x;
  59     }();
  60   }
  61   }();
  62   return 0;
  63 #else
  64 #pragma omp target
  65 #pragma omp teams distribute parallel for copyin(x)
  66   for (int i = 0; i < 2; ++i) {
  67     a[i] = x;
  68   }
  69   return tmain<int>();
  70   //return 0;
  71 #endif
  72 }
  73
  74
  75
  76 // Skip global, bound tid and loop vars
  77
  78
  79 // Skip global, bound tid and loop vars
  80
  81
  82
  83
  84 // Skip global, bound tid and loop vars
  85
  86
  87 // Skip global, bound tid and loop vars
  88 // prev lb and ub
  89
  90 // iter variables
  91
  92
  93
  94 #endif
  95 // CHECK1-LABEL: define {{[^@]+}}@main
  96 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
  97 // CHECK1-NEXT:  entry:
  98 // CHECK1-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
  99 // CHECK1-NEXT:    [[A:%.*]] = alloca [2 x i32], align 4
 100 // CHECK1-NEXT:    [[X_CASTED:%.*]] = alloca i64, align 8
 101 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 8
 102 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 8
 103 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 8
 104 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 105 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 106 // CHECK1-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 107 // CHECK1-NEXT:    [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
 108 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 109 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[X_CASTED]], align 4
 110 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[X_CASTED]], align 8
 111 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 112 // CHECK1-NEXT:    store i64 [[TMP2]], ptr [[TMP3]], align 8
 113 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 114 // CHECK1-NEXT:    store i64 [[TMP2]], ptr [[TMP4]], align 8
 115 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 116 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
 117 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 118 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP6]], align 8
 119 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 120 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP7]], align 8
 121 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
 122 // CHECK1-NEXT:    store ptr null, ptr [[TMP8]], align 8
 123 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 124 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 125 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 126 // CHECK1-NEXT:    store i32 2, ptr [[TMP11]], align 4
 127 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 128 // CHECK1-NEXT:    store i32 2, ptr [[TMP12]], align 4
 129 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 130 // CHECK1-NEXT:    store ptr [[TMP9]], ptr [[TMP13]], align 8
 131 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 132 // CHECK1-NEXT:    store ptr [[TMP10]], ptr [[TMP14]], align 8
 133 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 134 // CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP15]], align 8
 135 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 136 // CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP16]], align 8
 137 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 138 // CHECK1-NEXT:    store ptr null, ptr [[TMP17]], align 8
 139 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 140 // CHECK1-NEXT:    store ptr null, ptr [[TMP18]], align 8
 141 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 142 // CHECK1-NEXT:    store i64 2, ptr [[TMP19]], align 8
 143 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 144 // CHECK1-NEXT:    store i64 0, ptr [[TMP20]], align 8
 145 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 146 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP21]], align 4
 147 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 148 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP22]], align 4
 149 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 150 // CHECK1-NEXT:    store i32 0, ptr [[TMP23]], align 4
 151 // CHECK1-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.region_id, ptr [[KERNEL_ARGS]])
 152 // CHECK1-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
 153 // CHECK1-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 154 // CHECK1:       omp_offload.failed:
 155 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64(i64 [[TMP2]], ptr [[A]]) #[[ATTR3:[0-9]+]]
 156 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 157 // CHECK1:       omp_offload.cont:
 158 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiET_v()
 159 // CHECK1-NEXT:    ret i32 [[CALL]]
 160 //
 161 //
 162 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64
 163 // CHECK1-SAME: (i64 noundef [[X:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
 164 // CHECK1-NEXT:  entry:
 165 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca i64, align 8
 166 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 167 // CHECK1-NEXT:    store i64 [[X]], ptr [[X_ADDR]], align 8
 168 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 169 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 170 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.omp_outlined, ptr [[TMP0]], ptr [[X_ADDR]])
 171 // CHECK1-NEXT:    ret void
 172 //
 173 //
 174 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.omp_outlined
 175 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2:[0-9]+]] {
 176 // CHECK1-NEXT:  entry:
 177 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 178 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 179 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 180 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
 181 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 182 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 183 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 184 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 185 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 186 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 187 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 188 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 189 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 190 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 191 // CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
 192 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 193 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 194 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 195 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 196 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 197 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 198 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 199 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 200 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 201 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 202 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
 203 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 204 // CHECK1:       cond.true:
 205 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 206 // CHECK1:       cond.false:
 207 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 208 // CHECK1-NEXT:    br label [[COND_END]]
 209 // CHECK1:       cond.end:
 210 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 211 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 212 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 213 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 214 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 215 // CHECK1:       omp.inner.for.cond:
 216 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 217 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 218 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 219 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 220 // CHECK1:       omp.inner.for.body:
 221 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 222 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 223 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 224 // CHECK1-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
 225 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.omp_outlined.omp_outlined, i64 [[TMP10]], i64 [[TMP12]], ptr [[TMP0]], ptr [[TMP1]])
 226 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 227 // CHECK1:       omp.inner.for.inc:
 228 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 229 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 230 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
 231 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 232 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 233 // CHECK1:       omp.inner.for.end:
 234 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 235 // CHECK1:       omp.loop.exit:
 236 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
 237 // CHECK1-NEXT:    ret void
 238 //
 239 //
 240 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.omp_outlined.omp_outlined
 241 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] {
 242 // CHECK1-NEXT:  entry:
 243 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 244 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 245 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 246 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 247 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 248 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
 249 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 250 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 251 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 252 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 253 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 254 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 255 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 256 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 257 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 258 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 259 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 260 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 261 // CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
 262 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 263 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 264 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 265 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 266 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 267 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP2]] to i32
 268 // CHECK1-NEXT:    [[TMP3:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 269 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32
 270 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 271 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 272 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 273 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 274 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 275 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
 276 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 277 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 278 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
 279 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 280 // CHECK1:       cond.true:
 281 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 282 // CHECK1:       cond.false:
 283 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 284 // CHECK1-NEXT:    br label [[COND_END]]
 285 // CHECK1:       cond.end:
 286 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
 287 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 288 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 289 // CHECK1-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
 290 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 291 // CHECK1:       omp.inner.for.cond:
 292 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 293 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 294 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
 295 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 296 // CHECK1:       omp.inner.for.body:
 297 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 298 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
 299 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 300 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 301 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP1]], align 4
 302 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4
 303 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
 304 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
 305 // CHECK1-NEXT:    store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4
 306 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 307 // CHECK1:       omp.body.continue:
 308 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 309 // CHECK1:       omp.inner.for.inc:
 310 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 311 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
 312 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
 313 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 314 // CHECK1:       omp.inner.for.end:
 315 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 316 // CHECK1:       omp.loop.exit:
 317 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
 318 // CHECK1-NEXT:    ret void
 319 //
 320 //
 321 // CHECK1-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
 322 // CHECK1-SAME: () #[[ATTR5:[0-9]+]] comdat {
 323 // CHECK1-NEXT:  entry:
 324 // CHECK1-NEXT:    [[A:%.*]] = alloca [2 x i32], align 4
 325 // CHECK1-NEXT:    [[X_CASTED:%.*]] = alloca i64, align 8
 326 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 8
 327 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 8
 328 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 8
 329 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 330 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 331 // CHECK1-NEXT:    [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
 332 // CHECK1-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 333 // CHECK1-NEXT:    store i32 [[TMP1]], ptr [[X_CASTED]], align 4
 334 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[X_CASTED]], align 8
 335 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 336 // CHECK1-NEXT:    store i64 [[TMP2]], ptr [[TMP3]], align 8
 337 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 338 // CHECK1-NEXT:    store i64 [[TMP2]], ptr [[TMP4]], align 8
 339 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 340 // CHECK1-NEXT:    store ptr null, ptr [[TMP5]], align 8
 341 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 342 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP6]], align 8
 343 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 344 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP7]], align 8
 345 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
 346 // CHECK1-NEXT:    store ptr null, ptr [[TMP8]], align 8
 347 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 348 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 349 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 350 // CHECK1-NEXT:    store i32 2, ptr [[TMP11]], align 4
 351 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 352 // CHECK1-NEXT:    store i32 2, ptr [[TMP12]], align 4
 353 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 354 // CHECK1-NEXT:    store ptr [[TMP9]], ptr [[TMP13]], align 8
 355 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 356 // CHECK1-NEXT:    store ptr [[TMP10]], ptr [[TMP14]], align 8
 357 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 358 // CHECK1-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP15]], align 8
 359 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 360 // CHECK1-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP16]], align 8
 361 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 362 // CHECK1-NEXT:    store ptr null, ptr [[TMP17]], align 8
 363 // CHECK1-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 364 // CHECK1-NEXT:    store ptr null, ptr [[TMP18]], align 8
 365 // CHECK1-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 366 // CHECK1-NEXT:    store i64 2, ptr [[TMP19]], align 8
 367 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 368 // CHECK1-NEXT:    store i64 0, ptr [[TMP20]], align 8
 369 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 370 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP21]], align 4
 371 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 372 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP22]], align 4
 373 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 374 // CHECK1-NEXT:    store i32 0, ptr [[TMP23]], align 4
 375 // CHECK1-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.region_id, ptr [[KERNEL_ARGS]])
 376 // CHECK1-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
 377 // CHECK1-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 378 // CHECK1:       omp_offload.failed:
 379 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34(i64 [[TMP2]], ptr [[A]]) #[[ATTR3]]
 380 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 381 // CHECK1:       omp_offload.cont:
 382 // CHECK1-NEXT:    ret i32 0
 383 //
 384 //
 385 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34
 386 // CHECK1-SAME: (i64 noundef [[X:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1]] {
 387 // CHECK1-NEXT:  entry:
 388 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca i64, align 8
 389 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 390 // CHECK1-NEXT:    store i64 [[X]], ptr [[X_ADDR]], align 8
 391 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 392 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 393 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.omp_outlined, ptr [[TMP0]], ptr [[X_ADDR]])
 394 // CHECK1-NEXT:    ret void
 395 //
 396 //
 397 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.omp_outlined
 398 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] {
 399 // CHECK1-NEXT:  entry:
 400 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 401 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 402 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 403 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
 404 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 405 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 406 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 407 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 408 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 409 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 410 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 411 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 412 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 413 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 414 // CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
 415 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 416 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 417 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 418 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 419 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 420 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 421 // CHECK1-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 422 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 423 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 424 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 425 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
 426 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 427 // CHECK1:       cond.true:
 428 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 429 // CHECK1:       cond.false:
 430 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 431 // CHECK1-NEXT:    br label [[COND_END]]
 432 // CHECK1:       cond.end:
 433 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 434 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 435 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 436 // CHECK1-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 437 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 438 // CHECK1:       omp.inner.for.cond:
 439 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 440 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 441 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 442 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 443 // CHECK1:       omp.inner.for.body:
 444 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 445 // CHECK1-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
 446 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 447 // CHECK1-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
 448 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.omp_outlined.omp_outlined, i64 [[TMP10]], i64 [[TMP12]], ptr [[TMP0]], ptr [[TMP1]])
 449 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 450 // CHECK1:       omp.inner.for.inc:
 451 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 452 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 453 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
 454 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 455 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 456 // CHECK1:       omp.inner.for.end:
 457 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 458 // CHECK1:       omp.loop.exit:
 459 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
 460 // CHECK1-NEXT:    ret void
 461 //
 462 //
 463 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.omp_outlined.omp_outlined
 464 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] {
 465 // CHECK1-NEXT:  entry:
 466 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 467 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 468 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 469 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 470 // CHECK1-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
 471 // CHECK1-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
 472 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 473 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 474 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 475 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 476 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 477 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 478 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 479 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 480 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 481 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 482 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 483 // CHECK1-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
 484 // CHECK1-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
 485 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
 486 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
 487 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 488 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 489 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 490 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP2]] to i32
 491 // CHECK1-NEXT:    [[TMP3:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 492 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32
 493 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 494 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 495 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 496 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 497 // CHECK1-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 498 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
 499 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 500 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 501 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
 502 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 503 // CHECK1:       cond.true:
 504 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 505 // CHECK1:       cond.false:
 506 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 507 // CHECK1-NEXT:    br label [[COND_END]]
 508 // CHECK1:       cond.end:
 509 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
 510 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 511 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 512 // CHECK1-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
 513 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 514 // CHECK1:       omp.inner.for.cond:
 515 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 516 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 517 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
 518 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 519 // CHECK1:       omp.inner.for.body:
 520 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 521 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
 522 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 523 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 524 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP1]], align 4
 525 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4
 526 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
 527 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
 528 // CHECK1-NEXT:    store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4
 529 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 530 // CHECK1:       omp.body.continue:
 531 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 532 // CHECK1:       omp.inner.for.inc:
 533 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 534 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP14]], 1
 535 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
 536 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 537 // CHECK1:       omp.inner.for.end:
 538 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 539 // CHECK1:       omp.loop.exit:
 540 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
 541 // CHECK1-NEXT:    ret void
 542 //
 543 //
 544 // CHECK1-LABEL: define {{[^@]+}}@_ZTW1x
 545 // CHECK1-SAME: () #[[ATTR6:[0-9]+]] comdat {
 546 // CHECK1-NEXT:    [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
 547 // CHECK1-NEXT:    ret ptr [[TMP1]]
 548 //
 549 //
 550 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
 551 // CHECK1-SAME: () #[[ATTR6]] {
 552 // CHECK1-NEXT:  entry:
 553 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
 554 // CHECK1-NEXT:    ret void
 555 //
 556 //
 557 // CHECK3-LABEL: define {{[^@]+}}@main
 558 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
 559 // CHECK3-NEXT:  entry:
 560 // CHECK3-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
 561 // CHECK3-NEXT:    [[A:%.*]] = alloca [2 x i32], align 4
 562 // CHECK3-NEXT:    [[X_CASTED:%.*]] = alloca i32, align 4
 563 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 4
 564 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 4
 565 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 4
 566 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 567 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 568 // CHECK3-NEXT:    store i32 0, ptr [[RETVAL]], align 4
 569 // CHECK3-NEXT:    [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
 570 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 571 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[X_CASTED]], align 4
 572 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[X_CASTED]], align 4
 573 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 574 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[TMP3]], align 4
 575 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 576 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[TMP4]], align 4
 577 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
 578 // CHECK3-NEXT:    store ptr null, ptr [[TMP5]], align 4
 579 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 580 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP6]], align 4
 581 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 582 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP7]], align 4
 583 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
 584 // CHECK3-NEXT:    store ptr null, ptr [[TMP8]], align 4
 585 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 586 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 587 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 588 // CHECK3-NEXT:    store i32 2, ptr [[TMP11]], align 4
 589 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 590 // CHECK3-NEXT:    store i32 2, ptr [[TMP12]], align 4
 591 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 592 // CHECK3-NEXT:    store ptr [[TMP9]], ptr [[TMP13]], align 4
 593 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 594 // CHECK3-NEXT:    store ptr [[TMP10]], ptr [[TMP14]], align 4
 595 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 596 // CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP15]], align 4
 597 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 598 // CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP16]], align 4
 599 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 600 // CHECK3-NEXT:    store ptr null, ptr [[TMP17]], align 4
 601 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 602 // CHECK3-NEXT:    store ptr null, ptr [[TMP18]], align 4
 603 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 604 // CHECK3-NEXT:    store i64 2, ptr [[TMP19]], align 8
 605 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 606 // CHECK3-NEXT:    store i64 0, ptr [[TMP20]], align 8
 607 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 608 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP21]], align 4
 609 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 610 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP22]], align 4
 611 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 612 // CHECK3-NEXT:    store i32 0, ptr [[TMP23]], align 4
 613 // CHECK3-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.region_id, ptr [[KERNEL_ARGS]])
 614 // CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
 615 // CHECK3-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 616 // CHECK3:       omp_offload.failed:
 617 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64(i32 [[TMP2]], ptr [[A]]) #[[ATTR3:[0-9]+]]
 618 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 619 // CHECK3:       omp_offload.cont:
 620 // CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiET_v()
 621 // CHECK3-NEXT:    ret i32 [[CALL]]
 622 //
 623 //
 624 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64
 625 // CHECK3-SAME: (i32 noundef [[X:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1:[0-9]+]] {
 626 // CHECK3-NEXT:  entry:
 627 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca i32, align 4
 628 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
 629 // CHECK3-NEXT:    store i32 [[X]], ptr [[X_ADDR]], align 4
 630 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
 631 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
 632 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.omp_outlined, ptr [[TMP0]], ptr [[X_ADDR]])
 633 // CHECK3-NEXT:    ret void
 634 //
 635 //
 636 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.omp_outlined
 637 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2:[0-9]+]] {
 638 // CHECK3-NEXT:  entry:
 639 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 640 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 641 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
 642 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 4
 643 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 644 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 645 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 646 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 647 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 648 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 649 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 650 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 651 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 652 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
 653 // CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 4
 654 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
 655 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 4
 656 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 657 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 658 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 659 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 660 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 661 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 662 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 663 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 664 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
 665 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 666 // CHECK3:       cond.true:
 667 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 668 // CHECK3:       cond.false:
 669 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 670 // CHECK3-NEXT:    br label [[COND_END]]
 671 // CHECK3:       cond.end:
 672 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 673 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 674 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 675 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 676 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 677 // CHECK3:       omp.inner.for.cond:
 678 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 679 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 680 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 681 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 682 // CHECK3:       omp.inner.for.body:
 683 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 684 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 685 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.omp_outlined.omp_outlined, i32 [[TMP9]], i32 [[TMP10]], ptr [[TMP0]], ptr [[TMP1]])
 686 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 687 // CHECK3:       omp.inner.for.inc:
 688 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 689 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 690 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 691 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 692 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
 693 // CHECK3:       omp.inner.for.end:
 694 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 695 // CHECK3:       omp.loop.exit:
 696 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
 697 // CHECK3-NEXT:    ret void
 698 //
 699 //
 700 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l64.omp_outlined.omp_outlined
 701 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] {
 702 // CHECK3-NEXT:  entry:
 703 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 704 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 705 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
 706 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
 707 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
 708 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 4
 709 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 710 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 711 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 712 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 713 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 714 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 715 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 716 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 717 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 718 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 719 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 720 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
 721 // CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 4
 722 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
 723 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 4
 724 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 725 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 726 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 727 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 728 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_LB]], align 4
 729 // CHECK3-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_UB]], align 4
 730 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 731 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 732 // CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 733 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
 734 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 735 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 736 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
 737 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 738 // CHECK3:       cond.true:
 739 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 740 // CHECK3:       cond.false:
 741 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 742 // CHECK3-NEXT:    br label [[COND_END]]
 743 // CHECK3:       cond.end:
 744 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
 745 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 746 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 747 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
 748 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 749 // CHECK3:       omp.inner.for.cond:
 750 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 751 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 752 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
 753 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 754 // CHECK3:       omp.inner.for.body:
 755 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 756 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
 757 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 758 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 759 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP1]], align 4
 760 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4
 761 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]]
 762 // CHECK3-NEXT:    store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4
 763 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 764 // CHECK3:       omp.body.continue:
 765 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 766 // CHECK3:       omp.inner.for.inc:
 767 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 768 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1
 769 // CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
 770 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
 771 // CHECK3:       omp.inner.for.end:
 772 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 773 // CHECK3:       omp.loop.exit:
 774 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
 775 // CHECK3-NEXT:    ret void
 776 //
 777 //
 778 // CHECK3-LABEL: define {{[^@]+}}@_Z5tmainIiET_v
 779 // CHECK3-SAME: () #[[ATTR5:[0-9]+]] comdat {
 780 // CHECK3-NEXT:  entry:
 781 // CHECK3-NEXT:    [[A:%.*]] = alloca [2 x i32], align 4
 782 // CHECK3-NEXT:    [[X_CASTED:%.*]] = alloca i32, align 4
 783 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [2 x ptr], align 4
 784 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [2 x ptr], align 4
 785 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [2 x ptr], align 4
 786 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 787 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 788 // CHECK3-NEXT:    [[TMP0:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
 789 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[TMP0]], align 4
 790 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[X_CASTED]], align 4
 791 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[X_CASTED]], align 4
 792 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 793 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[TMP3]], align 4
 794 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 795 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[TMP4]], align 4
 796 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
 797 // CHECK3-NEXT:    store ptr null, ptr [[TMP5]], align 4
 798 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
 799 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP6]], align 4
 800 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
 801 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP7]], align 4
 802 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
 803 // CHECK3-NEXT:    store ptr null, ptr [[TMP8]], align 4
 804 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 805 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 806 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 807 // CHECK3-NEXT:    store i32 2, ptr [[TMP11]], align 4
 808 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 809 // CHECK3-NEXT:    store i32 2, ptr [[TMP12]], align 4
 810 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 811 // CHECK3-NEXT:    store ptr [[TMP9]], ptr [[TMP13]], align 4
 812 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 813 // CHECK3-NEXT:    store ptr [[TMP10]], ptr [[TMP14]], align 4
 814 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 815 // CHECK3-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP15]], align 4
 816 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 817 // CHECK3-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP16]], align 4
 818 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 819 // CHECK3-NEXT:    store ptr null, ptr [[TMP17]], align 4
 820 // CHECK3-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 821 // CHECK3-NEXT:    store ptr null, ptr [[TMP18]], align 4
 822 // CHECK3-NEXT:    [[TMP19:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 823 // CHECK3-NEXT:    store i64 2, ptr [[TMP19]], align 8
 824 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 825 // CHECK3-NEXT:    store i64 0, ptr [[TMP20]], align 8
 826 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 827 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP21]], align 4
 828 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 829 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP22]], align 4
 830 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 831 // CHECK3-NEXT:    store i32 0, ptr [[TMP23]], align 4
 832 // CHECK3-NEXT:    [[TMP24:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.region_id, ptr [[KERNEL_ARGS]])
 833 // CHECK3-NEXT:    [[TMP25:%.*]] = icmp ne i32 [[TMP24]], 0
 834 // CHECK3-NEXT:    br i1 [[TMP25]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 835 // CHECK3:       omp_offload.failed:
 836 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34(i32 [[TMP2]], ptr [[A]]) #[[ATTR3]]
 837 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 838 // CHECK3:       omp_offload.cont:
 839 // CHECK3-NEXT:    ret i32 0
 840 //
 841 //
 842 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34
 843 // CHECK3-SAME: (i32 noundef [[X:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR1]] {
 844 // CHECK3-NEXT:  entry:
 845 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca i32, align 4
 846 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
 847 // CHECK3-NEXT:    store i32 [[X]], ptr [[X_ADDR]], align 4
 848 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
 849 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
 850 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.omp_outlined, ptr [[TMP0]], ptr [[X_ADDR]])
 851 // CHECK3-NEXT:    ret void
 852 //
 853 //
 854 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.omp_outlined
 855 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] {
 856 // CHECK3-NEXT:  entry:
 857 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 858 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 859 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
 860 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 4
 861 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 862 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 863 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 864 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 865 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 866 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 867 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 868 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 869 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 870 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
 871 // CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 4
 872 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
 873 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 4
 874 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 875 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
 876 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 877 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 878 // CHECK3-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 879 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
 880 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 881 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 882 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
 883 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 884 // CHECK3:       cond.true:
 885 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 886 // CHECK3:       cond.false:
 887 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 888 // CHECK3-NEXT:    br label [[COND_END]]
 889 // CHECK3:       cond.end:
 890 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
 891 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 892 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 893 // CHECK3-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
 894 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 895 // CHECK3:       omp.inner.for.cond:
 896 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 897 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 898 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
 899 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 900 // CHECK3:       omp.inner.for.body:
 901 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 902 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 903 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.omp_outlined.omp_outlined, i32 [[TMP9]], i32 [[TMP10]], ptr [[TMP0]], ptr [[TMP1]])
 904 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 905 // CHECK3:       omp.inner.for.inc:
 906 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 907 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 908 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP11]], [[TMP12]]
 909 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 910 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
 911 // CHECK3:       omp.inner.for.end:
 912 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 913 // CHECK3:       omp.loop.exit:
 914 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
 915 // CHECK3-NEXT:    ret void
 916 //
 917 //
 918 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiET_v_l34.omp_outlined.omp_outlined
 919 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR2]] {
 920 // CHECK3-NEXT:  entry:
 921 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
 922 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
 923 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
 924 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
 925 // CHECK3-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
 926 // CHECK3-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 4
 927 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 928 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 929 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 930 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 931 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 932 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 933 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
 934 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
 935 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
 936 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 937 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 938 // CHECK3-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
 939 // CHECK3-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 4
 940 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
 941 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 4
 942 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 943 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
 944 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
 945 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
 946 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_LB]], align 4
 947 // CHECK3-NEXT:    store i32 [[TMP3]], ptr [[DOTOMP_UB]], align 4
 948 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 949 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 950 // CHECK3-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
 951 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
 952 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 953 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 954 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
 955 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 956 // CHECK3:       cond.true:
 957 // CHECK3-NEXT:    br label [[COND_END:%.*]]
 958 // CHECK3:       cond.false:
 959 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 960 // CHECK3-NEXT:    br label [[COND_END]]
 961 // CHECK3:       cond.end:
 962 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
 963 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 964 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 965 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
 966 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 967 // CHECK3:       omp.inner.for.cond:
 968 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 969 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 970 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
 971 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 972 // CHECK3:       omp.inner.for.body:
 973 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 974 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
 975 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 976 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 977 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP1]], align 4
 978 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4
 979 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]]
 980 // CHECK3-NEXT:    store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4
 981 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 982 // CHECK3:       omp.body.continue:
 983 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 984 // CHECK3:       omp.inner.for.inc:
 985 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 986 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1
 987 // CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
 988 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
 989 // CHECK3:       omp.inner.for.end:
 990 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 991 // CHECK3:       omp.loop.exit:
 992 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
 993 // CHECK3-NEXT:    ret void
 994 //
 995 //
 996 // CHECK3-LABEL: define {{[^@]+}}@_ZTW1x
 997 // CHECK3-SAME: () #[[ATTR6:[0-9]+]] comdat {
 998 // CHECK3-NEXT:    [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
 999 // CHECK3-NEXT:    ret ptr [[TMP1]]
1000 //
1001 //
1002 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1003 // CHECK3-SAME: () #[[ATTR7:[0-9]+]] {
1004 // CHECK3-NEXT:  entry:
1005 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
1006 // CHECK3-NEXT:    ret void
1007 //
1008 //
1009 // CHECK9-LABEL: define {{[^@]+}}@main
1010 // CHECK9-SAME: () #[[ATTR0:[0-9]+]] {
1011 // CHECK9-NEXT:  entry:
1012 // CHECK9-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
1013 // CHECK9-NEXT:    [[A:%.*]] = alloca [2 x i32], align 4
1014 // CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON:%.*]], align 8
1015 // CHECK9-NEXT:    store i32 0, ptr [[RETVAL]], align 4
1016 // CHECK9-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [[CLASS_ANON]], ptr [[REF_TMP]], i32 0, i32 0
1017 // CHECK9-NEXT:    store ptr [[A]], ptr [[TMP0]], align 8
1018 // CHECK9-NEXT:    call void @"_ZZ4mainENK3$_0clEv"(ptr noundef nonnull align 8 dereferenceable(8) [[REF_TMP]])
1019 // CHECK9-NEXT:    ret i32 0
1020 //
1021 //
1022 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l46
1023 // CHECK9-SAME: (i64 noundef [[X:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
1024 // CHECK9-NEXT:  entry:
1025 // CHECK9-NEXT:    [[X_ADDR:%.*]] = alloca i64, align 8
1026 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1027 // CHECK9-NEXT:    store i64 [[X]], ptr [[X_ADDR]], align 8
1028 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1029 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1030 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3:[0-9]+]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l46.omp_outlined, ptr [[TMP0]], ptr [[X_ADDR]])
1031 // CHECK9-NEXT:    ret void
1032 //
1033 //
1034 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l46.omp_outlined
1035 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR3:[0-9]+]] {
1036 // CHECK9-NEXT:  entry:
1037 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1038 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1039 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1040 // CHECK9-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
1041 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1042 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1043 // CHECK9-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1044 // CHECK9-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1045 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1046 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1047 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1048 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1049 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1050 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1051 // CHECK9-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
1052 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1053 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
1054 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1055 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_COMB_UB]], align 4
1056 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1057 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1058 // CHECK9-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1059 // CHECK9-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP2]], align 4
1060 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP3]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1061 // CHECK9-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1062 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP4]], 1
1063 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1064 // CHECK9:       cond.true:
1065 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1066 // CHECK9:       cond.false:
1067 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1068 // CHECK9-NEXT:    br label [[COND_END]]
1069 // CHECK9:       cond.end:
1070 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP5]], [[COND_FALSE]] ]
1071 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1072 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1073 // CHECK9-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_IV]], align 4
1074 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1075 // CHECK9:       omp.inner.for.cond:
1076 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1077 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1078 // CHECK9-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP7]], [[TMP8]]
1079 // CHECK9-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1080 // CHECK9:       omp.inner.for.body:
1081 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1082 // CHECK9-NEXT:    [[TMP10:%.*]] = zext i32 [[TMP9]] to i64
1083 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1084 // CHECK9-NEXT:    [[TMP12:%.*]] = zext i32 [[TMP11]] to i64
1085 // CHECK9-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l46.omp_outlined.omp_outlined, i64 [[TMP10]], i64 [[TMP12]], ptr [[TMP0]], ptr [[TMP1]])
1086 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1087 // CHECK9:       omp.inner.for.inc:
1088 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1089 // CHECK9-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1090 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP13]], [[TMP14]]
1091 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1092 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
1093 // CHECK9:       omp.inner.for.end:
1094 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1095 // CHECK9:       omp.loop.exit:
1096 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP3]])
1097 // CHECK9-NEXT:    ret void
1098 //
1099 //
1100 // CHECK9-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l46.omp_outlined.omp_outlined
1101 // CHECK9-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(8) [[A:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[X:%.*]]) #[[ATTR3]] {
1102 // CHECK9-NEXT:  entry:
1103 // CHECK9-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1104 // CHECK9-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1105 // CHECK9-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1106 // CHECK9-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1107 // CHECK9-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
1108 // CHECK9-NEXT:    [[X_ADDR:%.*]] = alloca ptr, align 8
1109 // CHECK9-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1110 // CHECK9-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1111 // CHECK9-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1112 // CHECK9-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1113 // CHECK9-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1114 // CHECK9-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1115 // CHECK9-NEXT:    [[I:%.*]] = alloca i32, align 4
1116 // CHECK9-NEXT:    [[REF_TMP:%.*]] = alloca [[CLASS_ANON_0:%.*]], align 8
1117 // CHECK9-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1118 // CHECK9-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1119 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1120 // CHECK9-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1121 // CHECK9-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
1122 // CHECK9-NEXT:    store ptr [[X]], ptr [[X_ADDR]], align 8
1123 // CHECK9-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
1124 // CHECK9-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[X_ADDR]], align 8
1125 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1126 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_UB]], align 4
1127 // CHECK9-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1128 // CHECK9-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP2]] to i32
1129 // CHECK9-NEXT:    [[TMP3:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1130 // CHECK9-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP3]] to i32
1131 // CHECK9-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1132 // CHECK9-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1133 // CHECK9-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1134 // CHECK9-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1135 // CHECK9-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1136 // CHECK9-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
1137 // CHECK9-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP5]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1138 // CHECK9-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1139 // CHECK9-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], 1
1140 // CHECK9-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1141 // CHECK9:       cond.true:
1142 // CHECK9-NEXT:    br label [[COND_END:%.*]]
1143 // CHECK9:       cond.false:
1144 // CHECK9-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1145 // CHECK9-NEXT:    br label [[COND_END]]
1146 // CHECK9:       cond.end:
1147 // CHECK9-NEXT:    [[COND:%.*]] = phi i32 [ 1, [[COND_TRUE]] ], [ [[TMP7]], [[COND_FALSE]] ]
1148 // CHECK9-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1149 // CHECK9-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1150 // CHECK9-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1151 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1152 // CHECK9:       omp.inner.for.cond:
1153 // CHECK9-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1154 // CHECK9-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1155 // CHECK9-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1156 // CHECK9-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1157 // CHECK9:       omp.inner.for.body:
1158 // CHECK9-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1159 // CHECK9-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1160 // CHECK9-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1161 // CHECK9-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1162 // CHECK9-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP1]], align 4
1163 // CHECK9-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4
1164 // CHECK9-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
1165 // CHECK9-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [2 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
1166 // CHECK9-NEXT:    store i32 [[TMP12]], ptr [[ARRAYIDX]], align 4
1167 // CHECK9-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 0
1168 // CHECK9-NEXT:    store ptr [[TMP0]], ptr [[TMP14]], align 8
1169 // CHECK9-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 1
1170 // CHECK9-NEXT:    store ptr [[I]], ptr [[TMP15]], align 8
1171 // CHECK9-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[CLASS_ANON_0]], ptr [[REF_TMP]], i32 0, i32 2
1172 // CHECK9-NEXT:    store ptr [[TMP1]], ptr [[TMP16]], align 8
1173 // CHECK9-NEXT:    call void @"_ZZZ4mainENK3$_0clEvENKUlvE_clEv"(ptr noundef nonnull align 8 dereferenceable(24) [[REF_TMP]])
1174 // CHECK9-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1175 // CHECK9:       omp.body.continue:
1176 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1177 // CHECK9:       omp.inner.for.inc:
1178 // CHECK9-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1179 // CHECK9-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
1180 // CHECK9-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
1181 // CHECK9-NEXT:    br label [[OMP_INNER_FOR_COND]]
1182 // CHECK9:       omp.inner.for.end:
1183 // CHECK9-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1184 // CHECK9:       omp.loop.exit:
1185 // CHECK9-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
1186 // CHECK9-NEXT:    ret void
1187 //
1188 //
1189 // CHECK9-LABEL: define {{[^@]+}}@_ZTW1x
1190 // CHECK9-SAME: () #[[ATTR6:[0-9]+]] comdat {
1191 // CHECK9-NEXT:    [[TMP1:%.*]] = call align 4 ptr @llvm.threadlocal.address.p0(ptr align 4 @x)
1192 // CHECK9-NEXT:    ret ptr [[TMP1]]
1193 //
1194 //
1195 // CHECK9-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1196 // CHECK9-SAME: () #[[ATTR6]] {
1197 // CHECK9-NEXT:  entry:
1198 // CHECK9-NEXT:    call void @__tgt_register_requires(i64 1)
1199 // CHECK9-NEXT:    ret void
1200 //