clang/test/OpenMP/teams_distribute_parallel_for_schedule_codegen.cpp

   1 // NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py UTC_ARGS: --function-signature --include-generated-funcs --replace-value-regex "__omp_offloading_[0-9a-z]+_[0-9a-z]+" "reduction_size[.].+[.]" "pl_cond[.].+[.|,]" --prefix-filecheck-ir-name _
   2 // expected-no-diagnostics
   3 #ifndef HEADER
   4 #define HEADER
   5
   6 // Test host codegen.
   7 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK1
   8 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
   9 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK1
  10 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK3
  11 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  12 // RUN: %clang_cc1 -DCK1 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK3
  13
  14 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK5
  15 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  16 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK5
  17 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK7
  18 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  19 // RUN: %clang_cc1 -DCK1 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK7
  20
  21 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  22 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  23 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  24 // RUN: %clang_cc1 -DCK1 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  25 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  26 // RUN: %clang_cc1 -DCK1 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
  27 #ifdef CK1
  28
  29 template <typename T, int X, long long Y>
  30 struct SS{
  31   T a[X];
  32   float b;
  33   int foo(void) {
  34
  35     #pragma omp target
  36     #pragma omp teams distribute parallel for
  37     for(int i = 0; i < X; i++) {
  38       a[i] = (T)0;
  39     }
  40     #pragma omp target
  41     #pragma omp teams distribute parallel for schedule(static)
  42     for(int i = 0; i < X; i++) {
  43       a[i] = (T)0;
  44     }
  45     #pragma omp target
  46     #pragma omp teams distribute parallel for schedule(static, X/2)
  47     for(int i = 0; i < X; i++) {
  48       a[i] = (T)0;
  49     }
  50
  51     #pragma omp target
  52     #pragma omp teams distribute parallel for schedule(dynamic)
  53     for(int i = 0; i < X; i++) {
  54       a[i] = (T)0;
  55     }
  56
  57     #pragma omp target
  58     #pragma omp teams distribute parallel for schedule(dynamic, X/2)
  59     for(int i = 0; i < X; i++) {
  60       a[i] = (T)0;
  61     }
  62
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  78     return a[0];
  79   }
  80 };
  81
  82 int teams_template_struct(void) {
  83   SS<int, 123, 456> V;
  84   return V.foo();
  85
  86 }
  87 #endif // CK1
  88
  89 // Test host codegen.
  90 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK13
  91 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  92 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK13
  93 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK15
  94 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
  95 // RUN: %clang_cc1 -DCK2 -fopenmp -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK15
  96
  97 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK17
  98 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
  99 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK17
 100 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --check-prefix=CHECK19
 101 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
 102 // RUN: %clang_cc1 -DCK2 -fopenmp -fopenmp-version=45 -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --check-prefix=CHECK19
 103
 104 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 105 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -emit-pch -o %t %s
 106 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple powerpc64le-unknown-unknown -fopenmp-targets=powerpc64le-ibm-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 107 // RUN: %clang_cc1 -DCK2 -verify -Wno-vla -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-llvm %s -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 108 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -std=c++11 -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -emit-pch -o %t %s
 109 // RUN: %clang_cc1 -DCK2 -fopenmp-simd -x c++ -triple i386-unknown-unknown -fopenmp-targets=i386-pc-linux-gnu -std=c++11 -include-pch %t -verify -Wno-vla %s -emit-llvm -o - | FileCheck %s --implicit-check-not="{{__kmpc|__tgt}}"
 110 #ifdef CK2
 111
 112 template <typename T, int n>
 113 int tmain(T argc) {
 114   T a[n];
 115   int m = 10;
 116 #pragma omp target
 117 #pragma omp teams distribute parallel for
 118   for(int i = 0; i < n; i++) {
 119     a[i] = (T)0;
 120   }
 121 #pragma omp target
 122 #pragma omp teams distribute parallel for schedule(static)
 123   for(int i = 0; i < n; i++) {
 124     a[i] = (T)0;
 125   }
 126 #pragma omp target
 127 #pragma omp teams distribute parallel for schedule(static, m)
 128   for(int i = 0; i < n; i++) {
 129     a[i] = (T)0;
 130   }
 131 #pragma omp target
 132 #pragma omp teams distribute parallel for schedule(dynamic)
 133   for(int i = 0; i < n; i++) {
 134     a[i] = (T)0;
 135   }
 136 #pragma omp target
 137 #pragma omp teams distribute parallel for schedule(dynamic, m)
 138   for(int i = 0; i < n; i++) {
 139     a[i] = (T)0;
 140   }
 141   return 0;
 142 }
 143
 144 int main (int argc, char **argv) {
 145   int n = 100;
 146   int a[n];
 147   int m = 10;
 148 #pragma omp target
 149 #pragma omp teams distribute parallel for
 150   for(int i = 0; i < n; i++) {
 151     a[i] = 0;
 152   }
 153 #pragma omp target
 154 #pragma omp teams distribute parallel for dist_schedule(static)
 155   for(int i = 0; i < n; i++) {
 156     a[i] = 0;
 157   }
 158 #pragma omp target
 159 #pragma omp teams distribute parallel for dist_schedule(static, m)
 160   for(int i = 0; i < n; i++) {
 161     a[i] = 0;
 162   }
 163 #pragma omp target
 164 #pragma omp teams distribute parallel for schedule(dynamic)
 165   for(int i = 0; i < n; i++) {
 166     a[i] = 0;
 167   }
 168 #pragma omp target
 169 #pragma omp teams distribute parallel for schedule(dynamic, m)
 170   for(int i = 0; i < n; i++) {
 171     a[i] = 0;
 172   }
 173   return tmain<int, 10>(argc);
 174 }
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 209 #endif // CK2
 210 #endif // #ifndef HEADER
 211 // CHECK1-LABEL: define {{[^@]+}}@_Z21teams_template_structv
 212 // CHECK1-SAME: () #[[ATTR0:[0-9]+]] {
 213 // CHECK1-NEXT:  entry:
 214 // CHECK1-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
 215 // CHECK1-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
 216 // CHECK1-NEXT:    ret i32 [[CALL]]
 217 //
 218 //
 219 // CHECK1-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
 220 // CHECK1-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {
 221 // CHECK1-NEXT:  entry:
 222 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 223 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
 224 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
 225 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
 226 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 227 // CHECK1-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
 228 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8
 229 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8
 230 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8
 231 // CHECK1-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
 232 // CHECK1-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 233 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8
 234 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8
 235 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8
 236 // CHECK1-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4
 237 // CHECK1-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 238 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 8
 239 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 8
 240 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 8
 241 // CHECK1-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
 242 // CHECK1-NEXT:    [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 243 // CHECK1-NEXT:    [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 8
 244 // CHECK1-NEXT:    [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 8
 245 // CHECK1-NEXT:    [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 8
 246 // CHECK1-NEXT:    [[_TMP30:%.*]] = alloca i32, align 4
 247 // CHECK1-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
 248 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 249 // CHECK1-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 250 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
 251 // CHECK1-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 252 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8
 253 // CHECK1-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 254 // CHECK1-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
 255 // CHECK1-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
 256 // CHECK1-NEXT:    store ptr null, ptr [[TMP2]], align 8
 257 // CHECK1-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
 258 // CHECK1-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
 259 // CHECK1-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
 260 // CHECK1-NEXT:    store i32 2, ptr [[TMP5]], align 4
 261 // CHECK1-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
 262 // CHECK1-NEXT:    store i32 1, ptr [[TMP6]], align 4
 263 // CHECK1-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
 264 // CHECK1-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
 265 // CHECK1-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
 266 // CHECK1-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
 267 // CHECK1-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
 268 // CHECK1-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8
 269 // CHECK1-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
 270 // CHECK1-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8
 271 // CHECK1-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
 272 // CHECK1-NEXT:    store ptr null, ptr [[TMP11]], align 8
 273 // CHECK1-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
 274 // CHECK1-NEXT:    store ptr null, ptr [[TMP12]], align 8
 275 // CHECK1-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
 276 // CHECK1-NEXT:    store i64 123, ptr [[TMP13]], align 8
 277 // CHECK1-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
 278 // CHECK1-NEXT:    store i64 0, ptr [[TMP14]], align 8
 279 // CHECK1-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
 280 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
 281 // CHECK1-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
 282 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
 283 // CHECK1-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
 284 // CHECK1-NEXT:    store i32 0, ptr [[TMP17]], align 4
 285 // CHECK1-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, ptr [[KERNEL_ARGS]])
 286 // CHECK1-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
 287 // CHECK1-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
 288 // CHECK1:       omp_offload.failed:
 289 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(ptr [[THIS1]]) #[[ATTR3:[0-9]+]]
 290 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT]]
 291 // CHECK1:       omp_offload.cont:
 292 // CHECK1-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 293 // CHECK1-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
 294 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 8
 295 // CHECK1-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
 296 // CHECK1-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 8
 297 // CHECK1-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
 298 // CHECK1-NEXT:    store ptr null, ptr [[TMP22]], align 8
 299 // CHECK1-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
 300 // CHECK1-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
 301 // CHECK1-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
 302 // CHECK1-NEXT:    store i32 2, ptr [[TMP25]], align 4
 303 // CHECK1-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
 304 // CHECK1-NEXT:    store i32 1, ptr [[TMP26]], align 4
 305 // CHECK1-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
 306 // CHECK1-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
 307 // CHECK1-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
 308 // CHECK1-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
 309 // CHECK1-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
 310 // CHECK1-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 8
 311 // CHECK1-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
 312 // CHECK1-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8
 313 // CHECK1-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
 314 // CHECK1-NEXT:    store ptr null, ptr [[TMP31]], align 8
 315 // CHECK1-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
 316 // CHECK1-NEXT:    store ptr null, ptr [[TMP32]], align 8
 317 // CHECK1-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
 318 // CHECK1-NEXT:    store i64 123, ptr [[TMP33]], align 8
 319 // CHECK1-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
 320 // CHECK1-NEXT:    store i64 0, ptr [[TMP34]], align 8
 321 // CHECK1-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
 322 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
 323 // CHECK1-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
 324 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
 325 // CHECK1-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
 326 // CHECK1-NEXT:    store i32 0, ptr [[TMP37]], align 4
 327 // CHECK1-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])
 328 // CHECK1-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
 329 // CHECK1-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
 330 // CHECK1:       omp_offload.failed8:
 331 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR3]]
 332 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT9]]
 333 // CHECK1:       omp_offload.cont9:
 334 // CHECK1-NEXT:    [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 335 // CHECK1-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
 336 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 8
 337 // CHECK1-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
 338 // CHECK1-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 8
 339 // CHECK1-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
 340 // CHECK1-NEXT:    store ptr null, ptr [[TMP42]], align 8
 341 // CHECK1-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
 342 // CHECK1-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
 343 // CHECK1-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
 344 // CHECK1-NEXT:    store i32 2, ptr [[TMP45]], align 4
 345 // CHECK1-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
 346 // CHECK1-NEXT:    store i32 1, ptr [[TMP46]], align 4
 347 // CHECK1-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
 348 // CHECK1-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 8
 349 // CHECK1-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
 350 // CHECK1-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 8
 351 // CHECK1-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
 352 // CHECK1-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 8
 353 // CHECK1-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
 354 // CHECK1-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8
 355 // CHECK1-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
 356 // CHECK1-NEXT:    store ptr null, ptr [[TMP51]], align 8
 357 // CHECK1-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
 358 // CHECK1-NEXT:    store ptr null, ptr [[TMP52]], align 8
 359 // CHECK1-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
 360 // CHECK1-NEXT:    store i64 123, ptr [[TMP53]], align 8
 361 // CHECK1-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
 362 // CHECK1-NEXT:    store i64 0, ptr [[TMP54]], align 8
 363 // CHECK1-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
 364 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
 365 // CHECK1-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
 366 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
 367 // CHECK1-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
 368 // CHECK1-NEXT:    store i32 0, ptr [[TMP57]], align 4
 369 // CHECK1-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, ptr [[KERNEL_ARGS15]])
 370 // CHECK1-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
 371 // CHECK1-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
 372 // CHECK1:       omp_offload.failed16:
 373 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(ptr [[THIS1]]) #[[ATTR3]]
 374 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
 375 // CHECK1:       omp_offload.cont17:
 376 // CHECK1-NEXT:    [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 377 // CHECK1-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
 378 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP60]], align 8
 379 // CHECK1-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
 380 // CHECK1-NEXT:    store ptr [[A18]], ptr [[TMP61]], align 8
 381 // CHECK1-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
 382 // CHECK1-NEXT:    store ptr null, ptr [[TMP62]], align 8
 383 // CHECK1-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
 384 // CHECK1-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
 385 // CHECK1-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0
 386 // CHECK1-NEXT:    store i32 2, ptr [[TMP65]], align 4
 387 // CHECK1-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1
 388 // CHECK1-NEXT:    store i32 1, ptr [[TMP66]], align 4
 389 // CHECK1-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2
 390 // CHECK1-NEXT:    store ptr [[TMP63]], ptr [[TMP67]], align 8
 391 // CHECK1-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3
 392 // CHECK1-NEXT:    store ptr [[TMP64]], ptr [[TMP68]], align 8
 393 // CHECK1-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4
 394 // CHECK1-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP69]], align 8
 395 // CHECK1-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5
 396 // CHECK1-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8
 397 // CHECK1-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6
 398 // CHECK1-NEXT:    store ptr null, ptr [[TMP71]], align 8
 399 // CHECK1-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7
 400 // CHECK1-NEXT:    store ptr null, ptr [[TMP72]], align 8
 401 // CHECK1-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8
 402 // CHECK1-NEXT:    store i64 123, ptr [[TMP73]], align 8
 403 // CHECK1-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9
 404 // CHECK1-NEXT:    store i64 0, ptr [[TMP74]], align 8
 405 // CHECK1-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10
 406 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4
 407 // CHECK1-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11
 408 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4
 409 // CHECK1-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12
 410 // CHECK1-NEXT:    store i32 0, ptr [[TMP77]], align 4
 411 // CHECK1-NEXT:    [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, ptr [[KERNEL_ARGS23]])
 412 // CHECK1-NEXT:    [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
 413 // CHECK1-NEXT:    br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
 414 // CHECK1:       omp_offload.failed24:
 415 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(ptr [[THIS1]]) #[[ATTR3]]
 416 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
 417 // CHECK1:       omp_offload.cont25:
 418 // CHECK1-NEXT:    [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 419 // CHECK1-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
 420 // CHECK1-NEXT:    store ptr [[THIS1]], ptr [[TMP80]], align 8
 421 // CHECK1-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
 422 // CHECK1-NEXT:    store ptr [[A26]], ptr [[TMP81]], align 8
 423 // CHECK1-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0
 424 // CHECK1-NEXT:    store ptr null, ptr [[TMP82]], align 8
 425 // CHECK1-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
 426 // CHECK1-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
 427 // CHECK1-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
 428 // CHECK1-NEXT:    store i32 2, ptr [[TMP85]], align 4
 429 // CHECK1-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
 430 // CHECK1-NEXT:    store i32 1, ptr [[TMP86]], align 4
 431 // CHECK1-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
 432 // CHECK1-NEXT:    store ptr [[TMP83]], ptr [[TMP87]], align 8
 433 // CHECK1-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
 434 // CHECK1-NEXT:    store ptr [[TMP84]], ptr [[TMP88]], align 8
 435 // CHECK1-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
 436 // CHECK1-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP89]], align 8
 437 // CHECK1-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
 438 // CHECK1-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8
 439 // CHECK1-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
 440 // CHECK1-NEXT:    store ptr null, ptr [[TMP91]], align 8
 441 // CHECK1-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
 442 // CHECK1-NEXT:    store ptr null, ptr [[TMP92]], align 8
 443 // CHECK1-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
 444 // CHECK1-NEXT:    store i64 123, ptr [[TMP93]], align 8
 445 // CHECK1-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
 446 // CHECK1-NEXT:    store i64 0, ptr [[TMP94]], align 8
 447 // CHECK1-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
 448 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4
 449 // CHECK1-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
 450 // CHECK1-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4
 451 // CHECK1-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
 452 // CHECK1-NEXT:    store i32 0, ptr [[TMP97]], align 4
 453 // CHECK1-NEXT:    [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, ptr [[KERNEL_ARGS31]])
 454 // CHECK1-NEXT:    [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0
 455 // CHECK1-NEXT:    br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
 456 // CHECK1:       omp_offload.failed32:
 457 // CHECK1-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(ptr [[THIS1]]) #[[ATTR3]]
 458 // CHECK1-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
 459 // CHECK1:       omp_offload.cont33:
 460 // CHECK1-NEXT:    [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
 461 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i64 0, i64 0
 462 // CHECK1-NEXT:    [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
 463 // CHECK1-NEXT:    ret i32 [[TMP100]]
 464 //
 465 //
 466 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
 467 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
 468 // CHECK1-NEXT:  entry:
 469 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 470 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 471 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 472 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined, ptr [[TMP0]])
 473 // CHECK1-NEXT:    ret void
 474 //
 475 //
 476 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined
 477 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
 478 // CHECK1-NEXT:  entry:
 479 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 480 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 481 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 482 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 483 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 484 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 485 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 486 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 487 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 488 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 489 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 490 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 491 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 492 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 493 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 494 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
 495 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 496 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 497 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 498 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 499 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 500 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 501 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 502 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 503 // CHECK1:       cond.true:
 504 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 505 // CHECK1:       cond.false:
 506 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 507 // CHECK1-NEXT:    br label [[COND_END]]
 508 // CHECK1:       cond.end:
 509 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 510 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 511 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 512 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 513 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 514 // CHECK1:       omp.inner.for.cond:
 515 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 516 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 517 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 518 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 519 // CHECK1:       omp.inner.for.body:
 520 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 521 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
 522 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 523 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 524 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
 525 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 526 // CHECK1:       omp.inner.for.inc:
 527 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 528 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 529 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 530 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 531 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 532 // CHECK1:       omp.inner.for.end:
 533 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 534 // CHECK1:       omp.loop.exit:
 535 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 536 // CHECK1-NEXT:    ret void
 537 //
 538 //
 539 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined
 540 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
 541 // CHECK1-NEXT:  entry:
 542 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 543 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 544 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 545 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 546 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 547 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 548 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 549 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 550 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 551 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 552 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 553 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 554 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 555 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 556 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 557 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 558 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 559 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 560 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 561 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 562 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 563 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
 564 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 565 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
 566 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 567 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 568 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 569 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 570 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 571 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
 572 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 573 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 574 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
 575 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 576 // CHECK1:       cond.true:
 577 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 578 // CHECK1:       cond.false:
 579 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 580 // CHECK1-NEXT:    br label [[COND_END]]
 581 // CHECK1:       cond.end:
 582 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
 583 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 584 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 585 // CHECK1-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
 586 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 587 // CHECK1:       omp.inner.for.cond:
 588 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 589 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 590 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
 591 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 592 // CHECK1:       omp.inner.for.body:
 593 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 594 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
 595 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 596 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 597 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 598 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
 599 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
 600 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
 601 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
 602 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 603 // CHECK1:       omp.body.continue:
 604 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 605 // CHECK1:       omp.inner.for.inc:
 606 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 607 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
 608 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
 609 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 610 // CHECK1:       omp.inner.for.end:
 611 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 612 // CHECK1:       omp.loop.exit:
 613 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
 614 // CHECK1-NEXT:    ret void
 615 //
 616 //
 617 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
 618 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 619 // CHECK1-NEXT:  entry:
 620 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 621 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 622 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 623 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])
 624 // CHECK1-NEXT:    ret void
 625 //
 626 //
 627 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined
 628 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
 629 // CHECK1-NEXT:  entry:
 630 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 631 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 632 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 633 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 634 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 635 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 636 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 637 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 638 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 639 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 640 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 641 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 642 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 643 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 644 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 645 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
 646 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 647 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 648 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 649 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 650 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 651 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 652 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 653 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 654 // CHECK1:       cond.true:
 655 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 656 // CHECK1:       cond.false:
 657 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 658 // CHECK1-NEXT:    br label [[COND_END]]
 659 // CHECK1:       cond.end:
 660 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 661 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 662 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 663 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 664 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 665 // CHECK1:       omp.inner.for.cond:
 666 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 667 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 668 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 669 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 670 // CHECK1:       omp.inner.for.body:
 671 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 672 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
 673 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 674 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 675 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
 676 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 677 // CHECK1:       omp.inner.for.inc:
 678 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 679 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 680 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 681 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 682 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 683 // CHECK1:       omp.inner.for.end:
 684 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 685 // CHECK1:       omp.loop.exit:
 686 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 687 // CHECK1-NEXT:    ret void
 688 //
 689 //
 690 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined
 691 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
 692 // CHECK1-NEXT:  entry:
 693 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 694 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 695 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 696 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 697 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 698 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 699 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 700 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 701 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 702 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 703 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 704 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 705 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 706 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 707 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 708 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 709 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 710 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 711 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 712 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 713 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 714 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
 715 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 716 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
 717 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 718 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 719 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 720 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 721 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 722 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
 723 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 724 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 725 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
 726 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 727 // CHECK1:       cond.true:
 728 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 729 // CHECK1:       cond.false:
 730 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 731 // CHECK1-NEXT:    br label [[COND_END]]
 732 // CHECK1:       cond.end:
 733 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
 734 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 735 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 736 // CHECK1-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
 737 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 738 // CHECK1:       omp.inner.for.cond:
 739 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 740 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 741 // CHECK1-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
 742 // CHECK1-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 743 // CHECK1:       omp.inner.for.body:
 744 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 745 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
 746 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 747 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 748 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 749 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
 750 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
 751 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
 752 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
 753 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 754 // CHECK1:       omp.body.continue:
 755 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 756 // CHECK1:       omp.inner.for.inc:
 757 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 758 // CHECK1-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
 759 // CHECK1-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
 760 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 761 // CHECK1:       omp.inner.for.end:
 762 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 763 // CHECK1:       omp.loop.exit:
 764 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
 765 // CHECK1-NEXT:    ret void
 766 //
 767 //
 768 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
 769 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 770 // CHECK1-NEXT:  entry:
 771 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 772 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 773 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 774 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined, ptr [[TMP0]])
 775 // CHECK1-NEXT:    ret void
 776 //
 777 //
 778 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined
 779 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
 780 // CHECK1-NEXT:  entry:
 781 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 782 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 783 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 784 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 785 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 786 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 787 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 788 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 789 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 790 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 791 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 792 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 793 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 794 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 795 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 796 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
 797 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 798 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 799 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 800 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 801 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 802 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 803 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 804 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 805 // CHECK1:       cond.true:
 806 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 807 // CHECK1:       cond.false:
 808 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 809 // CHECK1-NEXT:    br label [[COND_END]]
 810 // CHECK1:       cond.end:
 811 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 812 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 813 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 814 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 815 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 816 // CHECK1:       omp.inner.for.cond:
 817 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 818 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 819 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 820 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 821 // CHECK1:       omp.inner.for.body:
 822 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 823 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
 824 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 825 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 826 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
 827 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 828 // CHECK1:       omp.inner.for.inc:
 829 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 830 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 831 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
 832 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
 833 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 834 // CHECK1:       omp.inner.for.end:
 835 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
 836 // CHECK1:       omp.loop.exit:
 837 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
 838 // CHECK1-NEXT:    ret void
 839 //
 840 //
 841 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined
 842 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
 843 // CHECK1-NEXT:  entry:
 844 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 845 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 846 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
 847 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
 848 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 849 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 850 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 851 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
 852 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
 853 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 854 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 855 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 856 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 857 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 858 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 859 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 860 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 861 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 862 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
 863 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
 864 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
 865 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
 866 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 867 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
 868 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
 869 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
 870 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 871 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 872 // CHECK1-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 873 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
 874 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
 875 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
 876 // CHECK1:       omp.dispatch.cond:
 877 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 878 // CHECK1-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 879 // CHECK1-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
 880 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
 881 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 882 // CHECK1:       cond.true:
 883 // CHECK1-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
 884 // CHECK1-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
 885 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 886 // CHECK1:       cond.false:
 887 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 888 // CHECK1-NEXT:    br label [[COND_END]]
 889 // CHECK1:       cond.end:
 890 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
 891 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
 892 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 893 // CHECK1-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
 894 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 895 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 896 // CHECK1-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
 897 // CHECK1-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
 898 // CHECK1:       omp.dispatch.body:
 899 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 900 // CHECK1:       omp.inner.for.cond:
 901 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 902 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 903 // CHECK1-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
 904 // CHECK1-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 905 // CHECK1:       omp.inner.for.body:
 906 // CHECK1-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 907 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
 908 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
 909 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
 910 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
 911 // CHECK1-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
 912 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
 913 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
 914 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
 915 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
 916 // CHECK1:       omp.body.continue:
 917 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
 918 // CHECK1:       omp.inner.for.inc:
 919 // CHECK1-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 920 // CHECK1-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
 921 // CHECK1-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
 922 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
 923 // CHECK1:       omp.inner.for.end:
 924 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
 925 // CHECK1:       omp.dispatch.inc:
 926 // CHECK1-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
 927 // CHECK1-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 928 // CHECK1-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
 929 // CHECK1-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4
 930 // CHECK1-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
 931 // CHECK1-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
 932 // CHECK1-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
 933 // CHECK1-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4
 934 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
 935 // CHECK1:       omp.dispatch.end:
 936 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
 937 // CHECK1-NEXT:    ret void
 938 //
 939 //
 940 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
 941 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
 942 // CHECK1-NEXT:  entry:
 943 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 944 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 945 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 946 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined, ptr [[TMP0]])
 947 // CHECK1-NEXT:    ret void
 948 //
 949 //
 950 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined
 951 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
 952 // CHECK1-NEXT:  entry:
 953 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
 954 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
 955 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
 956 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
 957 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
 958 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
 959 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
 960 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
 961 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
 962 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
 963 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
 964 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
 965 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
 966 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
 967 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
 968 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
 969 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
 970 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
 971 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
 972 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
 973 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
 974 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 975 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
 976 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
 977 // CHECK1:       cond.true:
 978 // CHECK1-NEXT:    br label [[COND_END:%.*]]
 979 // CHECK1:       cond.false:
 980 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 981 // CHECK1-NEXT:    br label [[COND_END]]
 982 // CHECK1:       cond.end:
 983 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
 984 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
 985 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 986 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
 987 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
 988 // CHECK1:       omp.inner.for.cond:
 989 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
 990 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 991 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
 992 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
 993 // CHECK1:       omp.inner.for.body:
 994 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
 995 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
 996 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
 997 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
 998 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
 999 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1000 // CHECK1:       omp.inner.for.inc:
1001 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1002 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1003 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1004 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1005 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1006 // CHECK1:       omp.inner.for.end:
1007 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1008 // CHECK1:       omp.loop.exit:
1009 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1010 // CHECK1-NEXT:    ret void
1011 //
1012 //
1013 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined
1014 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
1015 // CHECK1-NEXT:  entry:
1016 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1017 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1018 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1019 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1020 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1021 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1022 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1023 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1024 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1025 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1026 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1027 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1028 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1029 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1030 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1031 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1032 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1033 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1034 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1035 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1036 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1037 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1038 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1039 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1040 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1041 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1042 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1043 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1044 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1045 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1046 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1047 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1048 // CHECK1-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
1049 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1050 // CHECK1:       omp.dispatch.cond:
1051 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
1052 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1053 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1054 // CHECK1:       omp.dispatch.body:
1055 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1056 // CHECK1-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1057 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1058 // CHECK1:       omp.inner.for.cond:
1059 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
1060 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
1061 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1062 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1063 // CHECK1:       omp.inner.for.body:
1064 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
1065 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1066 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1067 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
1068 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1069 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
1070 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1071 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
1072 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]
1073 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1074 // CHECK1:       omp.body.continue:
1075 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1076 // CHECK1:       omp.inner.for.inc:
1077 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
1078 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1079 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
1080 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
1081 // CHECK1:       omp.inner.for.end:
1082 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1083 // CHECK1:       omp.dispatch.inc:
1084 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
1085 // CHECK1:       omp.dispatch.end:
1086 // CHECK1-NEXT:    ret void
1087 //
1088 //
1089 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
1090 // CHECK1-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1091 // CHECK1-NEXT:  entry:
1092 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1093 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1094 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1095 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined, ptr [[TMP0]])
1096 // CHECK1-NEXT:    ret void
1097 //
1098 //
1099 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined
1100 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
1101 // CHECK1-NEXT:  entry:
1102 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1103 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1104 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1105 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1106 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1107 // CHECK1-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1108 // CHECK1-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1109 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1110 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1111 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1112 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1113 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1114 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1115 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1116 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1117 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
1118 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1119 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1120 // CHECK1-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1121 // CHECK1-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1122 // CHECK1-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1123 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1124 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1125 // CHECK1-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1126 // CHECK1:       cond.true:
1127 // CHECK1-NEXT:    br label [[COND_END:%.*]]
1128 // CHECK1:       cond.false:
1129 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1130 // CHECK1-NEXT:    br label [[COND_END]]
1131 // CHECK1:       cond.end:
1132 // CHECK1-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1133 // CHECK1-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1134 // CHECK1-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1135 // CHECK1-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1136 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1137 // CHECK1:       omp.inner.for.cond:
1138 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1139 // CHECK1-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1140 // CHECK1-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1141 // CHECK1-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1142 // CHECK1:       omp.inner.for.body:
1143 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1144 // CHECK1-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
1145 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1146 // CHECK1-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
1147 // CHECK1-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
1148 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1149 // CHECK1:       omp.inner.for.inc:
1150 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1151 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1152 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
1153 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1154 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]]
1155 // CHECK1:       omp.inner.for.end:
1156 // CHECK1-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1157 // CHECK1:       omp.loop.exit:
1158 // CHECK1-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1159 // CHECK1-NEXT:    ret void
1160 //
1161 //
1162 // CHECK1-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined
1163 // CHECK1-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
1164 // CHECK1-NEXT:  entry:
1165 // CHECK1-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
1166 // CHECK1-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
1167 // CHECK1-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
1168 // CHECK1-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
1169 // CHECK1-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
1170 // CHECK1-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1171 // CHECK1-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1172 // CHECK1-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1173 // CHECK1-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1174 // CHECK1-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1175 // CHECK1-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1176 // CHECK1-NEXT:    [[I:%.*]] = alloca i32, align 4
1177 // CHECK1-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
1178 // CHECK1-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
1179 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1180 // CHECK1-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1181 // CHECK1-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
1182 // CHECK1-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
1183 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1184 // CHECK1-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1185 // CHECK1-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
1186 // CHECK1-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
1187 // CHECK1-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
1188 // CHECK1-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
1189 // CHECK1-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
1190 // CHECK1-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
1191 // CHECK1-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1192 // CHECK1-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1193 // CHECK1-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1194 // CHECK1-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1195 // CHECK1-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
1196 // CHECK1-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
1197 // CHECK1-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
1198 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1199 // CHECK1:       omp.dispatch.cond:
1200 // CHECK1-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
1201 // CHECK1-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
1202 // CHECK1-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1203 // CHECK1:       omp.dispatch.body:
1204 // CHECK1-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1205 // CHECK1-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
1206 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1207 // CHECK1:       omp.inner.for.cond:
1208 // CHECK1-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
1209 // CHECK1-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
1210 // CHECK1-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
1211 // CHECK1-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1212 // CHECK1:       omp.inner.for.body:
1213 // CHECK1-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1214 // CHECK1-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
1215 // CHECK1-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1216 // CHECK1-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
1217 // CHECK1-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1218 // CHECK1-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
1219 // CHECK1-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
1220 // CHECK1-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
1221 // CHECK1-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]
1222 // CHECK1-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1223 // CHECK1:       omp.body.continue:
1224 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1225 // CHECK1:       omp.inner.for.inc:
1226 // CHECK1-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1227 // CHECK1-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
1228 // CHECK1-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
1229 // CHECK1-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
1230 // CHECK1:       omp.inner.for.end:
1231 // CHECK1-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1232 // CHECK1:       omp.dispatch.inc:
1233 // CHECK1-NEXT:    br label [[OMP_DISPATCH_COND]]
1234 // CHECK1:       omp.dispatch.end:
1235 // CHECK1-NEXT:    ret void
1236 //
1237 //
1238 // CHECK1-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
1239 // CHECK1-SAME: () #[[ATTR4:[0-9]+]] {
1240 // CHECK1-NEXT:  entry:
1241 // CHECK1-NEXT:    call void @__tgt_register_requires(i64 1)
1242 // CHECK1-NEXT:    ret void
1243 //
1244 //
1245 // CHECK3-LABEL: define {{[^@]+}}@_Z21teams_template_structv
1246 // CHECK3-SAME: () #[[ATTR0:[0-9]+]] {
1247 // CHECK3-NEXT:  entry:
1248 // CHECK3-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
1249 // CHECK3-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
1250 // CHECK3-NEXT:    ret i32 [[CALL]]
1251 //
1252 //
1253 // CHECK3-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
1254 // CHECK3-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
1255 // CHECK3-NEXT:  entry:
1256 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1257 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
1258 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
1259 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
1260 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1261 // CHECK3-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
1262 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4
1263 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4
1264 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4
1265 // CHECK3-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
1266 // CHECK3-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1267 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4
1268 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4
1269 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4
1270 // CHECK3-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4
1271 // CHECK3-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1272 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 4
1273 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 4
1274 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 4
1275 // CHECK3-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
1276 // CHECK3-NEXT:    [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1277 // CHECK3-NEXT:    [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 4
1278 // CHECK3-NEXT:    [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 4
1279 // CHECK3-NEXT:    [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 4
1280 // CHECK3-NEXT:    [[_TMP30:%.*]] = alloca i32, align 4
1281 // CHECK3-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
1282 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1283 // CHECK3-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1284 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
1285 // CHECK3-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1286 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4
1287 // CHECK3-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1288 // CHECK3-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
1289 // CHECK3-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
1290 // CHECK3-NEXT:    store ptr null, ptr [[TMP2]], align 4
1291 // CHECK3-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
1292 // CHECK3-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
1293 // CHECK3-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
1294 // CHECK3-NEXT:    store i32 2, ptr [[TMP5]], align 4
1295 // CHECK3-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
1296 // CHECK3-NEXT:    store i32 1, ptr [[TMP6]], align 4
1297 // CHECK3-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
1298 // CHECK3-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
1299 // CHECK3-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
1300 // CHECK3-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
1301 // CHECK3-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
1302 // CHECK3-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4
1303 // CHECK3-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
1304 // CHECK3-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4
1305 // CHECK3-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
1306 // CHECK3-NEXT:    store ptr null, ptr [[TMP11]], align 4
1307 // CHECK3-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
1308 // CHECK3-NEXT:    store ptr null, ptr [[TMP12]], align 4
1309 // CHECK3-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
1310 // CHECK3-NEXT:    store i64 123, ptr [[TMP13]], align 8
1311 // CHECK3-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
1312 // CHECK3-NEXT:    store i64 0, ptr [[TMP14]], align 8
1313 // CHECK3-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
1314 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
1315 // CHECK3-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
1316 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
1317 // CHECK3-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
1318 // CHECK3-NEXT:    store i32 0, ptr [[TMP17]], align 4
1319 // CHECK3-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, ptr [[KERNEL_ARGS]])
1320 // CHECK3-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
1321 // CHECK3-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
1322 // CHECK3:       omp_offload.failed:
1323 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(ptr [[THIS1]]) #[[ATTR3:[0-9]+]]
1324 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT]]
1325 // CHECK3:       omp_offload.cont:
1326 // CHECK3-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1327 // CHECK3-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1328 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 4
1329 // CHECK3-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1330 // CHECK3-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 4
1331 // CHECK3-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
1332 // CHECK3-NEXT:    store ptr null, ptr [[TMP22]], align 4
1333 // CHECK3-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
1334 // CHECK3-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
1335 // CHECK3-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
1336 // CHECK3-NEXT:    store i32 2, ptr [[TMP25]], align 4
1337 // CHECK3-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
1338 // CHECK3-NEXT:    store i32 1, ptr [[TMP26]], align 4
1339 // CHECK3-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
1340 // CHECK3-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
1341 // CHECK3-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
1342 // CHECK3-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
1343 // CHECK3-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
1344 // CHECK3-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 4
1345 // CHECK3-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
1346 // CHECK3-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4
1347 // CHECK3-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
1348 // CHECK3-NEXT:    store ptr null, ptr [[TMP31]], align 4
1349 // CHECK3-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
1350 // CHECK3-NEXT:    store ptr null, ptr [[TMP32]], align 4
1351 // CHECK3-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
1352 // CHECK3-NEXT:    store i64 123, ptr [[TMP33]], align 8
1353 // CHECK3-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
1354 // CHECK3-NEXT:    store i64 0, ptr [[TMP34]], align 8
1355 // CHECK3-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
1356 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
1357 // CHECK3-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
1358 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
1359 // CHECK3-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
1360 // CHECK3-NEXT:    store i32 0, ptr [[TMP37]], align 4
1361 // CHECK3-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])
1362 // CHECK3-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
1363 // CHECK3-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
1364 // CHECK3:       omp_offload.failed8:
1365 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR3]]
1366 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT9]]
1367 // CHECK3:       omp_offload.cont9:
1368 // CHECK3-NEXT:    [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1369 // CHECK3-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
1370 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 4
1371 // CHECK3-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
1372 // CHECK3-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 4
1373 // CHECK3-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
1374 // CHECK3-NEXT:    store ptr null, ptr [[TMP42]], align 4
1375 // CHECK3-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
1376 // CHECK3-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
1377 // CHECK3-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
1378 // CHECK3-NEXT:    store i32 2, ptr [[TMP45]], align 4
1379 // CHECK3-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
1380 // CHECK3-NEXT:    store i32 1, ptr [[TMP46]], align 4
1381 // CHECK3-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
1382 // CHECK3-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 4
1383 // CHECK3-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
1384 // CHECK3-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 4
1385 // CHECK3-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
1386 // CHECK3-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 4
1387 // CHECK3-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
1388 // CHECK3-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4
1389 // CHECK3-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
1390 // CHECK3-NEXT:    store ptr null, ptr [[TMP51]], align 4
1391 // CHECK3-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
1392 // CHECK3-NEXT:    store ptr null, ptr [[TMP52]], align 4
1393 // CHECK3-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
1394 // CHECK3-NEXT:    store i64 123, ptr [[TMP53]], align 8
1395 // CHECK3-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
1396 // CHECK3-NEXT:    store i64 0, ptr [[TMP54]], align 8
1397 // CHECK3-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
1398 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
1399 // CHECK3-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
1400 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
1401 // CHECK3-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
1402 // CHECK3-NEXT:    store i32 0, ptr [[TMP57]], align 4
1403 // CHECK3-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, ptr [[KERNEL_ARGS15]])
1404 // CHECK3-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
1405 // CHECK3-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
1406 // CHECK3:       omp_offload.failed16:
1407 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(ptr [[THIS1]]) #[[ATTR3]]
1408 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
1409 // CHECK3:       omp_offload.cont17:
1410 // CHECK3-NEXT:    [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1411 // CHECK3-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1412 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP60]], align 4
1413 // CHECK3-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1414 // CHECK3-NEXT:    store ptr [[A18]], ptr [[TMP61]], align 4
1415 // CHECK3-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
1416 // CHECK3-NEXT:    store ptr null, ptr [[TMP62]], align 4
1417 // CHECK3-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
1418 // CHECK3-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
1419 // CHECK3-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0
1420 // CHECK3-NEXT:    store i32 2, ptr [[TMP65]], align 4
1421 // CHECK3-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1
1422 // CHECK3-NEXT:    store i32 1, ptr [[TMP66]], align 4
1423 // CHECK3-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2
1424 // CHECK3-NEXT:    store ptr [[TMP63]], ptr [[TMP67]], align 4
1425 // CHECK3-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3
1426 // CHECK3-NEXT:    store ptr [[TMP64]], ptr [[TMP68]], align 4
1427 // CHECK3-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4
1428 // CHECK3-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP69]], align 4
1429 // CHECK3-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5
1430 // CHECK3-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP70]], align 4
1431 // CHECK3-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6
1432 // CHECK3-NEXT:    store ptr null, ptr [[TMP71]], align 4
1433 // CHECK3-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7
1434 // CHECK3-NEXT:    store ptr null, ptr [[TMP72]], align 4
1435 // CHECK3-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8
1436 // CHECK3-NEXT:    store i64 123, ptr [[TMP73]], align 8
1437 // CHECK3-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9
1438 // CHECK3-NEXT:    store i64 0, ptr [[TMP74]], align 8
1439 // CHECK3-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10
1440 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4
1441 // CHECK3-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11
1442 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4
1443 // CHECK3-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12
1444 // CHECK3-NEXT:    store i32 0, ptr [[TMP77]], align 4
1445 // CHECK3-NEXT:    [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, ptr [[KERNEL_ARGS23]])
1446 // CHECK3-NEXT:    [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
1447 // CHECK3-NEXT:    br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
1448 // CHECK3:       omp_offload.failed24:
1449 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(ptr [[THIS1]]) #[[ATTR3]]
1450 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
1451 // CHECK3:       omp_offload.cont25:
1452 // CHECK3-NEXT:    [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1453 // CHECK3-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
1454 // CHECK3-NEXT:    store ptr [[THIS1]], ptr [[TMP80]], align 4
1455 // CHECK3-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
1456 // CHECK3-NEXT:    store ptr [[A26]], ptr [[TMP81]], align 4
1457 // CHECK3-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0
1458 // CHECK3-NEXT:    store ptr null, ptr [[TMP82]], align 4
1459 // CHECK3-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
1460 // CHECK3-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
1461 // CHECK3-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
1462 // CHECK3-NEXT:    store i32 2, ptr [[TMP85]], align 4
1463 // CHECK3-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
1464 // CHECK3-NEXT:    store i32 1, ptr [[TMP86]], align 4
1465 // CHECK3-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
1466 // CHECK3-NEXT:    store ptr [[TMP83]], ptr [[TMP87]], align 4
1467 // CHECK3-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
1468 // CHECK3-NEXT:    store ptr [[TMP84]], ptr [[TMP88]], align 4
1469 // CHECK3-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
1470 // CHECK3-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP89]], align 4
1471 // CHECK3-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
1472 // CHECK3-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP90]], align 4
1473 // CHECK3-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
1474 // CHECK3-NEXT:    store ptr null, ptr [[TMP91]], align 4
1475 // CHECK3-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
1476 // CHECK3-NEXT:    store ptr null, ptr [[TMP92]], align 4
1477 // CHECK3-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
1478 // CHECK3-NEXT:    store i64 123, ptr [[TMP93]], align 8
1479 // CHECK3-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
1480 // CHECK3-NEXT:    store i64 0, ptr [[TMP94]], align 8
1481 // CHECK3-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
1482 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4
1483 // CHECK3-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
1484 // CHECK3-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4
1485 // CHECK3-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
1486 // CHECK3-NEXT:    store i32 0, ptr [[TMP97]], align 4
1487 // CHECK3-NEXT:    [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, ptr [[KERNEL_ARGS31]])
1488 // CHECK3-NEXT:    [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0
1489 // CHECK3-NEXT:    br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
1490 // CHECK3:       omp_offload.failed32:
1491 // CHECK3-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(ptr [[THIS1]]) #[[ATTR3]]
1492 // CHECK3-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
1493 // CHECK3:       omp_offload.cont33:
1494 // CHECK3-NEXT:    [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
1495 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i32 0, i32 0
1496 // CHECK3-NEXT:    [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
1497 // CHECK3-NEXT:    ret i32 [[TMP100]]
1498 //
1499 //
1500 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
1501 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
1502 // CHECK3-NEXT:  entry:
1503 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1504 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1505 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1506 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined, ptr [[TMP0]])
1507 // CHECK3-NEXT:    ret void
1508 //
1509 //
1510 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined
1511 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
1512 // CHECK3-NEXT:  entry:
1513 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1514 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1515 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1516 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1517 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1518 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1519 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1520 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1521 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1522 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1523 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1524 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1525 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1526 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1527 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1528 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
1529 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1530 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1531 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1532 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1533 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1534 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1535 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1536 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1537 // CHECK3:       cond.true:
1538 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1539 // CHECK3:       cond.false:
1540 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1541 // CHECK3-NEXT:    br label [[COND_END]]
1542 // CHECK3:       cond.end:
1543 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1544 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1545 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1546 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1547 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1548 // CHECK3:       omp.inner.for.cond:
1549 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1550 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1551 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1552 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1553 // CHECK3:       omp.inner.for.body:
1554 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1555 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1556 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
1557 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1558 // CHECK3:       omp.inner.for.inc:
1559 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1560 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1561 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1562 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1563 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1564 // CHECK3:       omp.inner.for.end:
1565 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1566 // CHECK3:       omp.loop.exit:
1567 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1568 // CHECK3-NEXT:    ret void
1569 //
1570 //
1571 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined
1572 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
1573 // CHECK3-NEXT:  entry:
1574 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1575 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1576 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1577 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1578 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1579 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1580 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1581 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1582 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1583 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1584 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1585 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1586 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1587 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1588 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1589 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1590 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1591 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1592 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1593 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1594 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1595 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1596 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
1597 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
1598 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1599 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1600 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1601 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1602 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1603 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1604 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1605 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1606 // CHECK3:       cond.true:
1607 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1608 // CHECK3:       cond.false:
1609 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1610 // CHECK3-NEXT:    br label [[COND_END]]
1611 // CHECK3:       cond.end:
1612 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1613 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1614 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1615 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1616 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1617 // CHECK3:       omp.inner.for.cond:
1618 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1619 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1620 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1621 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1622 // CHECK3:       omp.inner.for.body:
1623 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1624 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1625 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1626 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1627 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1628 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
1629 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]
1630 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
1631 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1632 // CHECK3:       omp.body.continue:
1633 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1634 // CHECK3:       omp.inner.for.inc:
1635 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1636 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1637 // CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
1638 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1639 // CHECK3:       omp.inner.for.end:
1640 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1641 // CHECK3:       omp.loop.exit:
1642 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
1643 // CHECK3-NEXT:    ret void
1644 //
1645 //
1646 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
1647 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1648 // CHECK3-NEXT:  entry:
1649 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1650 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1651 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1652 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])
1653 // CHECK3-NEXT:    ret void
1654 //
1655 //
1656 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined
1657 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
1658 // CHECK3-NEXT:  entry:
1659 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1660 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1661 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1662 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1663 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1664 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1665 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1666 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1667 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1668 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1669 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1670 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1671 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1672 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1673 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1674 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
1675 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1676 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1677 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1678 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1679 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1680 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1681 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1682 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1683 // CHECK3:       cond.true:
1684 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1685 // CHECK3:       cond.false:
1686 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1687 // CHECK3-NEXT:    br label [[COND_END]]
1688 // CHECK3:       cond.end:
1689 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1690 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1691 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1692 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1693 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1694 // CHECK3:       omp.inner.for.cond:
1695 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1696 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1697 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1698 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1699 // CHECK3:       omp.inner.for.body:
1700 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1701 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1702 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
1703 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1704 // CHECK3:       omp.inner.for.inc:
1705 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1706 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1707 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1708 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1709 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1710 // CHECK3:       omp.inner.for.end:
1711 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1712 // CHECK3:       omp.loop.exit:
1713 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1714 // CHECK3-NEXT:    ret void
1715 //
1716 //
1717 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined
1718 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
1719 // CHECK3-NEXT:  entry:
1720 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1721 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1722 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1723 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1724 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1725 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1726 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1727 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1728 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1729 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1730 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1731 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1732 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1733 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1734 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1735 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1736 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1737 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1738 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1739 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1740 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1741 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1742 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
1743 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
1744 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1745 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1746 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1747 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1748 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1749 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1750 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
1751 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1752 // CHECK3:       cond.true:
1753 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1754 // CHECK3:       cond.false:
1755 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1756 // CHECK3-NEXT:    br label [[COND_END]]
1757 // CHECK3:       cond.end:
1758 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
1759 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1760 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1761 // CHECK3-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
1762 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1763 // CHECK3:       omp.inner.for.cond:
1764 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1765 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1766 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
1767 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1768 // CHECK3:       omp.inner.for.body:
1769 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1770 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
1771 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1772 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1773 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1774 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
1775 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]
1776 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
1777 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1778 // CHECK3:       omp.body.continue:
1779 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1780 // CHECK3:       omp.inner.for.inc:
1781 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1782 // CHECK3-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
1783 // CHECK3-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
1784 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1785 // CHECK3:       omp.inner.for.end:
1786 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1787 // CHECK3:       omp.loop.exit:
1788 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
1789 // CHECK3-NEXT:    ret void
1790 //
1791 //
1792 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
1793 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1794 // CHECK3-NEXT:  entry:
1795 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1796 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1797 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1798 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined, ptr [[TMP0]])
1799 // CHECK3-NEXT:    ret void
1800 //
1801 //
1802 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined
1803 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
1804 // CHECK3-NEXT:  entry:
1805 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1806 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1807 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1808 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1809 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1810 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1811 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1812 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1813 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1814 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1815 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1816 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1817 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1818 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1819 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1820 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
1821 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1822 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1823 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1824 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1825 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1826 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1827 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1828 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1829 // CHECK3:       cond.true:
1830 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1831 // CHECK3:       cond.false:
1832 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1833 // CHECK3-NEXT:    br label [[COND_END]]
1834 // CHECK3:       cond.end:
1835 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
1836 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
1837 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1838 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
1839 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1840 // CHECK3:       omp.inner.for.cond:
1841 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1842 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1843 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
1844 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1845 // CHECK3:       omp.inner.for.body:
1846 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
1847 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1848 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
1849 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1850 // CHECK3:       omp.inner.for.inc:
1851 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1852 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1853 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
1854 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
1855 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1856 // CHECK3:       omp.inner.for.end:
1857 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
1858 // CHECK3:       omp.loop.exit:
1859 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
1860 // CHECK3-NEXT:    ret void
1861 //
1862 //
1863 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined
1864 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
1865 // CHECK3-NEXT:  entry:
1866 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1867 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1868 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
1869 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
1870 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1871 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1872 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1873 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
1874 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
1875 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1876 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1877 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1878 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1879 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1880 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1881 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1882 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1883 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1884 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
1885 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
1886 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
1887 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1888 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
1889 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
1890 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1891 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1892 // CHECK3-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1893 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
1894 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
1895 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
1896 // CHECK3:       omp.dispatch.cond:
1897 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1898 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1899 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
1900 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1901 // CHECK3:       cond.true:
1902 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
1903 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1904 // CHECK3:       cond.false:
1905 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1906 // CHECK3-NEXT:    br label [[COND_END]]
1907 // CHECK3:       cond.end:
1908 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
1909 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
1910 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1911 // CHECK3-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
1912 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1913 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1914 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
1915 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
1916 // CHECK3:       omp.dispatch.body:
1917 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
1918 // CHECK3:       omp.inner.for.cond:
1919 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1920 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1921 // CHECK3-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
1922 // CHECK3-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
1923 // CHECK3:       omp.inner.for.body:
1924 // CHECK3-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1925 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
1926 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
1927 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
1928 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
1929 // CHECK3-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
1930 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP15]]
1931 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
1932 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
1933 // CHECK3:       omp.body.continue:
1934 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
1935 // CHECK3:       omp.inner.for.inc:
1936 // CHECK3-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
1937 // CHECK3-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
1938 // CHECK3-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
1939 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
1940 // CHECK3:       omp.inner.for.end:
1941 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
1942 // CHECK3:       omp.dispatch.inc:
1943 // CHECK3-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
1944 // CHECK3-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1945 // CHECK3-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
1946 // CHECK3-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
1947 // CHECK3-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
1948 // CHECK3-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
1949 // CHECK3-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
1950 // CHECK3-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
1951 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
1952 // CHECK3:       omp.dispatch.end:
1953 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
1954 // CHECK3-NEXT:    ret void
1955 //
1956 //
1957 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
1958 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
1959 // CHECK3-NEXT:  entry:
1960 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1961 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1962 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1963 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined, ptr [[TMP0]])
1964 // CHECK3-NEXT:    ret void
1965 //
1966 //
1967 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined
1968 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
1969 // CHECK3-NEXT:  entry:
1970 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
1971 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
1972 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
1973 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
1974 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
1975 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
1976 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
1977 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
1978 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
1979 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
1980 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
1981 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
1982 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
1983 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
1984 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
1985 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
1986 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
1987 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
1988 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
1989 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
1990 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
1991 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1992 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
1993 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
1994 // CHECK3:       cond.true:
1995 // CHECK3-NEXT:    br label [[COND_END:%.*]]
1996 // CHECK3:       cond.false:
1997 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
1998 // CHECK3-NEXT:    br label [[COND_END]]
1999 // CHECK3:       cond.end:
2000 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2001 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2002 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2003 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2004 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2005 // CHECK3:       omp.inner.for.cond:
2006 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2007 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2008 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2009 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2010 // CHECK3:       omp.inner.for.body:
2011 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2012 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2013 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
2014 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2015 // CHECK3:       omp.inner.for.inc:
2016 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2017 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2018 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2019 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2020 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2021 // CHECK3:       omp.inner.for.end:
2022 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2023 // CHECK3:       omp.loop.exit:
2024 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2025 // CHECK3-NEXT:    ret void
2026 //
2027 //
2028 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined
2029 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
2030 // CHECK3-NEXT:  entry:
2031 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2032 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2033 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2034 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2035 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2036 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2037 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2038 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2039 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2040 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2041 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2042 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2043 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2044 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2045 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2046 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2047 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2048 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2049 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2050 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
2051 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2052 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2053 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
2054 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
2055 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2056 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2057 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2058 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2059 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2060 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2061 // CHECK3-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
2062 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2063 // CHECK3:       omp.dispatch.cond:
2064 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
2065 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2066 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2067 // CHECK3:       omp.dispatch.body:
2068 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2069 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
2070 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2071 // CHECK3:       omp.inner.for.cond:
2072 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
2073 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
2074 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2075 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2076 // CHECK3:       omp.inner.for.body:
2077 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
2078 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2079 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2080 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
2081 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
2082 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
2083 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]
2084 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]
2085 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2086 // CHECK3:       omp.body.continue:
2087 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2088 // CHECK3:       omp.inner.for.inc:
2089 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
2090 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2091 // CHECK3-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
2092 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
2093 // CHECK3:       omp.inner.for.end:
2094 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2095 // CHECK3:       omp.dispatch.inc:
2096 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2097 // CHECK3:       omp.dispatch.end:
2098 // CHECK3-NEXT:    ret void
2099 //
2100 //
2101 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
2102 // CHECK3-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2103 // CHECK3-NEXT:  entry:
2104 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2105 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2106 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2107 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined, ptr [[TMP0]])
2108 // CHECK3-NEXT:    ret void
2109 //
2110 //
2111 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined
2112 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
2113 // CHECK3-NEXT:  entry:
2114 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2115 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2116 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2117 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2118 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2119 // CHECK3-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2120 // CHECK3-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2121 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2122 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2123 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2124 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2125 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2126 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2127 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2128 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2129 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
2130 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2131 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2132 // CHECK3-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2133 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2134 // CHECK3-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2135 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2136 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2137 // CHECK3-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2138 // CHECK3:       cond.true:
2139 // CHECK3-NEXT:    br label [[COND_END:%.*]]
2140 // CHECK3:       cond.false:
2141 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2142 // CHECK3-NEXT:    br label [[COND_END]]
2143 // CHECK3:       cond.end:
2144 // CHECK3-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2145 // CHECK3-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2146 // CHECK3-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2147 // CHECK3-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2148 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2149 // CHECK3:       omp.inner.for.cond:
2150 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2151 // CHECK3-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2152 // CHECK3-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2153 // CHECK3-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2154 // CHECK3:       omp.inner.for.body:
2155 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2156 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2157 // CHECK3-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
2158 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2159 // CHECK3:       omp.inner.for.inc:
2160 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2161 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2162 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
2163 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2164 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]]
2165 // CHECK3:       omp.inner.for.end:
2166 // CHECK3-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2167 // CHECK3:       omp.loop.exit:
2168 // CHECK3-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2169 // CHECK3-NEXT:    ret void
2170 //
2171 //
2172 // CHECK3-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined
2173 // CHECK3-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
2174 // CHECK3-NEXT:  entry:
2175 // CHECK3-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
2176 // CHECK3-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
2177 // CHECK3-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
2178 // CHECK3-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
2179 // CHECK3-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
2180 // CHECK3-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2181 // CHECK3-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2182 // CHECK3-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2183 // CHECK3-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2184 // CHECK3-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2185 // CHECK3-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2186 // CHECK3-NEXT:    [[I:%.*]] = alloca i32, align 4
2187 // CHECK3-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
2188 // CHECK3-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
2189 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2190 // CHECK3-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2191 // CHECK3-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
2192 // CHECK3-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
2193 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2194 // CHECK3-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
2195 // CHECK3-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
2196 // CHECK3-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
2197 // CHECK3-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
2198 // CHECK3-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
2199 // CHECK3-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2200 // CHECK3-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2201 // CHECK3-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2202 // CHECK3-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2203 // CHECK3-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
2204 // CHECK3-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
2205 // CHECK3-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
2206 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2207 // CHECK3:       omp.dispatch.cond:
2208 // CHECK3-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
2209 // CHECK3-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
2210 // CHECK3-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2211 // CHECK3:       omp.dispatch.body:
2212 // CHECK3-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2213 // CHECK3-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
2214 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2215 // CHECK3:       omp.inner.for.cond:
2216 // CHECK3-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
2217 // CHECK3-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
2218 // CHECK3-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
2219 // CHECK3-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2220 // CHECK3:       omp.inner.for.body:
2221 // CHECK3-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
2222 // CHECK3-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
2223 // CHECK3-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2224 // CHECK3-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
2225 // CHECK3-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
2226 // CHECK3-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
2227 // CHECK3-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]
2228 // CHECK3-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]]
2229 // CHECK3-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2230 // CHECK3:       omp.body.continue:
2231 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2232 // CHECK3:       omp.inner.for.inc:
2233 // CHECK3-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
2234 // CHECK3-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
2235 // CHECK3-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
2236 // CHECK3-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
2237 // CHECK3:       omp.inner.for.end:
2238 // CHECK3-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2239 // CHECK3:       omp.dispatch.inc:
2240 // CHECK3-NEXT:    br label [[OMP_DISPATCH_COND]]
2241 // CHECK3:       omp.dispatch.end:
2242 // CHECK3-NEXT:    ret void
2243 //
2244 //
2245 // CHECK3-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
2246 // CHECK3-SAME: () #[[ATTR4:[0-9]+]] {
2247 // CHECK3-NEXT:  entry:
2248 // CHECK3-NEXT:    call void @__tgt_register_requires(i64 1)
2249 // CHECK3-NEXT:    ret void
2250 //
2251 //
2252 // CHECK5-LABEL: define {{[^@]+}}@_Z21teams_template_structv
2253 // CHECK5-SAME: () #[[ATTR0:[0-9]+]] {
2254 // CHECK5-NEXT:  entry:
2255 // CHECK5-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
2256 // CHECK5-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
2257 // CHECK5-NEXT:    ret i32 [[CALL]]
2258 //
2259 //
2260 // CHECK5-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
2261 // CHECK5-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat {
2262 // CHECK5-NEXT:  entry:
2263 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2264 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
2265 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
2266 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
2267 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2268 // CHECK5-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
2269 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 8
2270 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 8
2271 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 8
2272 // CHECK5-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
2273 // CHECK5-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2274 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 8
2275 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 8
2276 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 8
2277 // CHECK5-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4
2278 // CHECK5-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2279 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 8
2280 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 8
2281 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 8
2282 // CHECK5-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
2283 // CHECK5-NEXT:    [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2284 // CHECK5-NEXT:    [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 8
2285 // CHECK5-NEXT:    [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 8
2286 // CHECK5-NEXT:    [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 8
2287 // CHECK5-NEXT:    [[_TMP30:%.*]] = alloca i32, align 4
2288 // CHECK5-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
2289 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2290 // CHECK5-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2291 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
2292 // CHECK5-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2293 // CHECK5-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 8
2294 // CHECK5-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2295 // CHECK5-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
2296 // CHECK5-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
2297 // CHECK5-NEXT:    store ptr null, ptr [[TMP2]], align 8
2298 // CHECK5-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
2299 // CHECK5-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
2300 // CHECK5-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
2301 // CHECK5-NEXT:    store i32 2, ptr [[TMP5]], align 4
2302 // CHECK5-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
2303 // CHECK5-NEXT:    store i32 1, ptr [[TMP6]], align 4
2304 // CHECK5-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
2305 // CHECK5-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
2306 // CHECK5-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
2307 // CHECK5-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
2308 // CHECK5-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
2309 // CHECK5-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 8
2310 // CHECK5-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
2311 // CHECK5-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 8
2312 // CHECK5-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
2313 // CHECK5-NEXT:    store ptr null, ptr [[TMP11]], align 8
2314 // CHECK5-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
2315 // CHECK5-NEXT:    store ptr null, ptr [[TMP12]], align 8
2316 // CHECK5-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
2317 // CHECK5-NEXT:    store i64 123, ptr [[TMP13]], align 8
2318 // CHECK5-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
2319 // CHECK5-NEXT:    store i64 0, ptr [[TMP14]], align 8
2320 // CHECK5-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
2321 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
2322 // CHECK5-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
2323 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
2324 // CHECK5-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
2325 // CHECK5-NEXT:    store i32 0, ptr [[TMP17]], align 4
2326 // CHECK5-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, ptr [[KERNEL_ARGS]])
2327 // CHECK5-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
2328 // CHECK5-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
2329 // CHECK5:       omp_offload.failed:
2330 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(ptr [[THIS1]]) #[[ATTR3:[0-9]+]]
2331 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT]]
2332 // CHECK5:       omp_offload.cont:
2333 // CHECK5-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2334 // CHECK5-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2335 // CHECK5-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 8
2336 // CHECK5-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2337 // CHECK5-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 8
2338 // CHECK5-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i64 0, i64 0
2339 // CHECK5-NEXT:    store ptr null, ptr [[TMP22]], align 8
2340 // CHECK5-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
2341 // CHECK5-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
2342 // CHECK5-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
2343 // CHECK5-NEXT:    store i32 2, ptr [[TMP25]], align 4
2344 // CHECK5-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
2345 // CHECK5-NEXT:    store i32 1, ptr [[TMP26]], align 4
2346 // CHECK5-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
2347 // CHECK5-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
2348 // CHECK5-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
2349 // CHECK5-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
2350 // CHECK5-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
2351 // CHECK5-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 8
2352 // CHECK5-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
2353 // CHECK5-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 8
2354 // CHECK5-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
2355 // CHECK5-NEXT:    store ptr null, ptr [[TMP31]], align 8
2356 // CHECK5-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
2357 // CHECK5-NEXT:    store ptr null, ptr [[TMP32]], align 8
2358 // CHECK5-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
2359 // CHECK5-NEXT:    store i64 123, ptr [[TMP33]], align 8
2360 // CHECK5-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
2361 // CHECK5-NEXT:    store i64 0, ptr [[TMP34]], align 8
2362 // CHECK5-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
2363 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
2364 // CHECK5-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
2365 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
2366 // CHECK5-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
2367 // CHECK5-NEXT:    store i32 0, ptr [[TMP37]], align 4
2368 // CHECK5-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])
2369 // CHECK5-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
2370 // CHECK5-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
2371 // CHECK5:       omp_offload.failed8:
2372 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR3]]
2373 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT9]]
2374 // CHECK5:       omp_offload.cont9:
2375 // CHECK5-NEXT:    [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2376 // CHECK5-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
2377 // CHECK5-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 8
2378 // CHECK5-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
2379 // CHECK5-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 8
2380 // CHECK5-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i64 0, i64 0
2381 // CHECK5-NEXT:    store ptr null, ptr [[TMP42]], align 8
2382 // CHECK5-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
2383 // CHECK5-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
2384 // CHECK5-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
2385 // CHECK5-NEXT:    store i32 2, ptr [[TMP45]], align 4
2386 // CHECK5-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
2387 // CHECK5-NEXT:    store i32 1, ptr [[TMP46]], align 4
2388 // CHECK5-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
2389 // CHECK5-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 8
2390 // CHECK5-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
2391 // CHECK5-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 8
2392 // CHECK5-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
2393 // CHECK5-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 8
2394 // CHECK5-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
2395 // CHECK5-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 8
2396 // CHECK5-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
2397 // CHECK5-NEXT:    store ptr null, ptr [[TMP51]], align 8
2398 // CHECK5-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
2399 // CHECK5-NEXT:    store ptr null, ptr [[TMP52]], align 8
2400 // CHECK5-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
2401 // CHECK5-NEXT:    store i64 123, ptr [[TMP53]], align 8
2402 // CHECK5-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
2403 // CHECK5-NEXT:    store i64 0, ptr [[TMP54]], align 8
2404 // CHECK5-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
2405 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
2406 // CHECK5-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
2407 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
2408 // CHECK5-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
2409 // CHECK5-NEXT:    store i32 0, ptr [[TMP57]], align 4
2410 // CHECK5-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, ptr [[KERNEL_ARGS15]])
2411 // CHECK5-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
2412 // CHECK5-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
2413 // CHECK5:       omp_offload.failed16:
2414 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(ptr [[THIS1]]) #[[ATTR3]]
2415 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
2416 // CHECK5:       omp_offload.cont17:
2417 // CHECK5-NEXT:    [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2418 // CHECK5-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2419 // CHECK5-NEXT:    store ptr [[THIS1]], ptr [[TMP60]], align 8
2420 // CHECK5-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2421 // CHECK5-NEXT:    store ptr [[A18]], ptr [[TMP61]], align 8
2422 // CHECK5-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
2423 // CHECK5-NEXT:    store ptr null, ptr [[TMP62]], align 8
2424 // CHECK5-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
2425 // CHECK5-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
2426 // CHECK5-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0
2427 // CHECK5-NEXT:    store i32 2, ptr [[TMP65]], align 4
2428 // CHECK5-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1
2429 // CHECK5-NEXT:    store i32 1, ptr [[TMP66]], align 4
2430 // CHECK5-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2
2431 // CHECK5-NEXT:    store ptr [[TMP63]], ptr [[TMP67]], align 8
2432 // CHECK5-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3
2433 // CHECK5-NEXT:    store ptr [[TMP64]], ptr [[TMP68]], align 8
2434 // CHECK5-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4
2435 // CHECK5-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP69]], align 8
2436 // CHECK5-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5
2437 // CHECK5-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP70]], align 8
2438 // CHECK5-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6
2439 // CHECK5-NEXT:    store ptr null, ptr [[TMP71]], align 8
2440 // CHECK5-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7
2441 // CHECK5-NEXT:    store ptr null, ptr [[TMP72]], align 8
2442 // CHECK5-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8
2443 // CHECK5-NEXT:    store i64 123, ptr [[TMP73]], align 8
2444 // CHECK5-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9
2445 // CHECK5-NEXT:    store i64 0, ptr [[TMP74]], align 8
2446 // CHECK5-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10
2447 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4
2448 // CHECK5-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11
2449 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4
2450 // CHECK5-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12
2451 // CHECK5-NEXT:    store i32 0, ptr [[TMP77]], align 4
2452 // CHECK5-NEXT:    [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, ptr [[KERNEL_ARGS23]])
2453 // CHECK5-NEXT:    [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
2454 // CHECK5-NEXT:    br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
2455 // CHECK5:       omp_offload.failed24:
2456 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(ptr [[THIS1]]) #[[ATTR3]]
2457 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
2458 // CHECK5:       omp_offload.cont25:
2459 // CHECK5-NEXT:    [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2460 // CHECK5-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
2461 // CHECK5-NEXT:    store ptr [[THIS1]], ptr [[TMP80]], align 8
2462 // CHECK5-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
2463 // CHECK5-NEXT:    store ptr [[A26]], ptr [[TMP81]], align 8
2464 // CHECK5-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i64 0, i64 0
2465 // CHECK5-NEXT:    store ptr null, ptr [[TMP82]], align 8
2466 // CHECK5-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
2467 // CHECK5-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
2468 // CHECK5-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
2469 // CHECK5-NEXT:    store i32 2, ptr [[TMP85]], align 4
2470 // CHECK5-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
2471 // CHECK5-NEXT:    store i32 1, ptr [[TMP86]], align 4
2472 // CHECK5-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
2473 // CHECK5-NEXT:    store ptr [[TMP83]], ptr [[TMP87]], align 8
2474 // CHECK5-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
2475 // CHECK5-NEXT:    store ptr [[TMP84]], ptr [[TMP88]], align 8
2476 // CHECK5-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
2477 // CHECK5-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP89]], align 8
2478 // CHECK5-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
2479 // CHECK5-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP90]], align 8
2480 // CHECK5-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
2481 // CHECK5-NEXT:    store ptr null, ptr [[TMP91]], align 8
2482 // CHECK5-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
2483 // CHECK5-NEXT:    store ptr null, ptr [[TMP92]], align 8
2484 // CHECK5-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
2485 // CHECK5-NEXT:    store i64 123, ptr [[TMP93]], align 8
2486 // CHECK5-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
2487 // CHECK5-NEXT:    store i64 0, ptr [[TMP94]], align 8
2488 // CHECK5-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
2489 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4
2490 // CHECK5-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
2491 // CHECK5-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4
2492 // CHECK5-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
2493 // CHECK5-NEXT:    store i32 0, ptr [[TMP97]], align 4
2494 // CHECK5-NEXT:    [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, ptr [[KERNEL_ARGS31]])
2495 // CHECK5-NEXT:    [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0
2496 // CHECK5-NEXT:    br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
2497 // CHECK5:       omp_offload.failed32:
2498 // CHECK5-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(ptr [[THIS1]]) #[[ATTR3]]
2499 // CHECK5-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
2500 // CHECK5:       omp_offload.cont33:
2501 // CHECK5-NEXT:    [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
2502 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i64 0, i64 0
2503 // CHECK5-NEXT:    [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
2504 // CHECK5-NEXT:    ret i32 [[TMP100]]
2505 //
2506 //
2507 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
2508 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
2509 // CHECK5-NEXT:  entry:
2510 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2511 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2512 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2513 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined, ptr [[TMP0]])
2514 // CHECK5-NEXT:    ret void
2515 //
2516 //
2517 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined
2518 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
2519 // CHECK5-NEXT:  entry:
2520 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2521 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2522 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2523 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2524 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2525 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2526 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2527 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2528 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2529 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2530 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2531 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2532 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2533 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2534 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2535 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
2536 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2537 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2538 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2539 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2540 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2541 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2542 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2543 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2544 // CHECK5:       cond.true:
2545 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2546 // CHECK5:       cond.false:
2547 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2548 // CHECK5-NEXT:    br label [[COND_END]]
2549 // CHECK5:       cond.end:
2550 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2551 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2552 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2553 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2554 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2555 // CHECK5:       omp.inner.for.cond:
2556 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2557 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2558 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2559 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2560 // CHECK5:       omp.inner.for.body:
2561 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2562 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2563 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2564 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2565 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
2566 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2567 // CHECK5:       omp.inner.for.inc:
2568 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2569 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2570 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2571 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2572 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2573 // CHECK5:       omp.inner.for.end:
2574 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2575 // CHECK5:       omp.loop.exit:
2576 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2577 // CHECK5-NEXT:    ret void
2578 //
2579 //
2580 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined
2581 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
2582 // CHECK5-NEXT:  entry:
2583 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2584 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2585 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2586 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2587 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2588 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2589 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2590 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2591 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2592 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2593 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2594 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2595 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2596 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2597 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2598 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2599 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2600 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2601 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2602 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
2603 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2604 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2605 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2606 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2607 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2608 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2609 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2610 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2611 // CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2612 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2613 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2614 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2615 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2616 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2617 // CHECK5:       cond.true:
2618 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2619 // CHECK5:       cond.false:
2620 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2621 // CHECK5-NEXT:    br label [[COND_END]]
2622 // CHECK5:       cond.end:
2623 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2624 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2625 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2626 // CHECK5-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2627 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2628 // CHECK5:       omp.inner.for.cond:
2629 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2630 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2631 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2632 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2633 // CHECK5:       omp.inner.for.body:
2634 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2635 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2636 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2637 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2638 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
2639 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
2640 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2641 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
2642 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
2643 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2644 // CHECK5:       omp.body.continue:
2645 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2646 // CHECK5:       omp.inner.for.inc:
2647 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2648 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2649 // CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2650 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2651 // CHECK5:       omp.inner.for.end:
2652 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2653 // CHECK5:       omp.loop.exit:
2654 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
2655 // CHECK5-NEXT:    ret void
2656 //
2657 //
2658 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
2659 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2660 // CHECK5-NEXT:  entry:
2661 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2662 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2663 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2664 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])
2665 // CHECK5-NEXT:    ret void
2666 //
2667 //
2668 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined
2669 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
2670 // CHECK5-NEXT:  entry:
2671 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2672 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2673 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2674 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2675 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2676 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2677 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2678 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2679 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2680 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2681 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2682 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2683 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2684 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2685 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2686 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
2687 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2688 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2689 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2690 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2691 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2692 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2693 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2694 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2695 // CHECK5:       cond.true:
2696 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2697 // CHECK5:       cond.false:
2698 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2699 // CHECK5-NEXT:    br label [[COND_END]]
2700 // CHECK5:       cond.end:
2701 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2702 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2703 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2704 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2705 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2706 // CHECK5:       omp.inner.for.cond:
2707 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2708 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2709 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2710 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2711 // CHECK5:       omp.inner.for.body:
2712 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2713 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2714 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2715 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2716 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
2717 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2718 // CHECK5:       omp.inner.for.inc:
2719 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2720 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2721 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2722 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2723 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2724 // CHECK5:       omp.inner.for.end:
2725 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2726 // CHECK5:       omp.loop.exit:
2727 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2728 // CHECK5-NEXT:    ret void
2729 //
2730 //
2731 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined
2732 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
2733 // CHECK5-NEXT:  entry:
2734 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2735 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2736 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2737 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2738 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2739 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2740 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2741 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2742 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2743 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2744 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2745 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2746 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2747 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2748 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2749 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2750 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2751 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2752 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2753 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
2754 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2755 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2756 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2757 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2758 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2759 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2760 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2761 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2762 // CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2763 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2764 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2765 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2766 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
2767 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2768 // CHECK5:       cond.true:
2769 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2770 // CHECK5:       cond.false:
2771 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2772 // CHECK5-NEXT:    br label [[COND_END]]
2773 // CHECK5:       cond.end:
2774 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
2775 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2776 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2777 // CHECK5-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
2778 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2779 // CHECK5:       omp.inner.for.cond:
2780 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2781 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2782 // CHECK5-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
2783 // CHECK5-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2784 // CHECK5:       omp.inner.for.body:
2785 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2786 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
2787 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2788 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2789 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
2790 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
2791 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
2792 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
2793 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
2794 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2795 // CHECK5:       omp.body.continue:
2796 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2797 // CHECK5:       omp.inner.for.inc:
2798 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2799 // CHECK5-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
2800 // CHECK5-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
2801 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2802 // CHECK5:       omp.inner.for.end:
2803 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2804 // CHECK5:       omp.loop.exit:
2805 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
2806 // CHECK5-NEXT:    ret void
2807 //
2808 //
2809 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
2810 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2811 // CHECK5-NEXT:  entry:
2812 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2813 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2814 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2815 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined, ptr [[TMP0]])
2816 // CHECK5-NEXT:    ret void
2817 //
2818 //
2819 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined
2820 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
2821 // CHECK5-NEXT:  entry:
2822 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2823 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2824 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2825 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2826 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2827 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
2828 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
2829 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2830 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2831 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2832 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2833 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2834 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2835 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2836 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
2837 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
2838 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2839 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2840 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2841 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
2842 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
2843 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2844 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
2845 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2846 // CHECK5:       cond.true:
2847 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2848 // CHECK5:       cond.false:
2849 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2850 // CHECK5-NEXT:    br label [[COND_END]]
2851 // CHECK5:       cond.end:
2852 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
2853 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
2854 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2855 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
2856 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2857 // CHECK5:       omp.inner.for.cond:
2858 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2859 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2860 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
2861 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2862 // CHECK5:       omp.inner.for.body:
2863 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
2864 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
2865 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
2866 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
2867 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
2868 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2869 // CHECK5:       omp.inner.for.inc:
2870 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2871 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2872 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
2873 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
2874 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2875 // CHECK5:       omp.inner.for.end:
2876 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
2877 // CHECK5:       omp.loop.exit:
2878 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
2879 // CHECK5-NEXT:    ret void
2880 //
2881 //
2882 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined
2883 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
2884 // CHECK5-NEXT:  entry:
2885 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2886 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2887 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
2888 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
2889 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2890 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2891 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2892 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
2893 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
2894 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
2895 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
2896 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
2897 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
2898 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
2899 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2900 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2901 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2902 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2903 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
2904 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
2905 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
2906 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
2907 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2908 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
2909 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
2910 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
2911 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
2912 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
2913 // CHECK5-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
2914 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
2915 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
2916 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
2917 // CHECK5:       omp.dispatch.cond:
2918 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2919 // CHECK5-NEXT:    [[TMP6:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2920 // CHECK5-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP6]] to i32
2921 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[CONV2]]
2922 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
2923 // CHECK5:       cond.true:
2924 // CHECK5-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
2925 // CHECK5-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP7]] to i32
2926 // CHECK5-NEXT:    br label [[COND_END:%.*]]
2927 // CHECK5:       cond.false:
2928 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2929 // CHECK5-NEXT:    br label [[COND_END]]
2930 // CHECK5:       cond.end:
2931 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
2932 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
2933 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2934 // CHECK5-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
2935 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2936 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2937 // CHECK5-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
2938 // CHECK5-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
2939 // CHECK5:       omp.dispatch.body:
2940 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
2941 // CHECK5:       omp.inner.for.cond:
2942 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2943 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2944 // CHECK5-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
2945 // CHECK5-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
2946 // CHECK5:       omp.inner.for.body:
2947 // CHECK5-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2948 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
2949 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
2950 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
2951 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
2952 // CHECK5-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
2953 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP15]] to i64
2954 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
2955 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
2956 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
2957 // CHECK5:       omp.body.continue:
2958 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
2959 // CHECK5:       omp.inner.for.inc:
2960 // CHECK5-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
2961 // CHECK5-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP16]], 1
2962 // CHECK5-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
2963 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
2964 // CHECK5:       omp.inner.for.end:
2965 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
2966 // CHECK5:       omp.dispatch.inc:
2967 // CHECK5-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
2968 // CHECK5-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2969 // CHECK5-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
2970 // CHECK5-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4
2971 // CHECK5-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
2972 // CHECK5-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
2973 // CHECK5-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
2974 // CHECK5-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4
2975 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
2976 // CHECK5:       omp.dispatch.end:
2977 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
2978 // CHECK5-NEXT:    ret void
2979 //
2980 //
2981 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
2982 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
2983 // CHECK5-NEXT:  entry:
2984 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2985 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
2986 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
2987 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined, ptr [[TMP0]])
2988 // CHECK5-NEXT:    ret void
2989 //
2990 //
2991 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined
2992 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
2993 // CHECK5-NEXT:  entry:
2994 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
2995 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
2996 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
2997 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
2998 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
2999 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3000 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3001 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3002 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3003 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3004 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3005 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3006 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3007 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3008 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3009 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
3010 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3011 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3012 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3013 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3014 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3015 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3016 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3017 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3018 // CHECK5:       cond.true:
3019 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3020 // CHECK5:       cond.false:
3021 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3022 // CHECK5-NEXT:    br label [[COND_END]]
3023 // CHECK5:       cond.end:
3024 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3025 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3026 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3027 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3028 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3029 // CHECK5:       omp.inner.for.cond:
3030 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3031 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3032 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3033 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3034 // CHECK5:       omp.inner.for.body:
3035 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3036 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3037 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3038 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3039 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
3040 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3041 // CHECK5:       omp.inner.for.inc:
3042 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3043 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3044 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3045 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3046 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3047 // CHECK5:       omp.inner.for.end:
3048 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3049 // CHECK5:       omp.loop.exit:
3050 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3051 // CHECK5-NEXT:    ret void
3052 //
3053 //
3054 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined
3055 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
3056 // CHECK5-NEXT:  entry:
3057 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3058 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3059 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3060 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3061 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3062 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3063 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3064 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3065 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3066 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3067 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3068 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3069 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3070 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3071 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3072 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3073 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3074 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3075 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3076 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
3077 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3078 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3079 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3080 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3081 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3082 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3083 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3084 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3085 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3086 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3087 // CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3088 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
3089 // CHECK5-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
3090 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3091 // CHECK5:       omp.dispatch.cond:
3092 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
3093 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3094 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3095 // CHECK5:       omp.dispatch.body:
3096 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3097 // CHECK5-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
3098 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3099 // CHECK5:       omp.inner.for.cond:
3100 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10:![0-9]+]]
3101 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP10]]
3102 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3103 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3104 // CHECK5:       omp.inner.for.body:
3105 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
3106 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3107 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3108 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
3109 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
3110 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP10]]
3111 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3112 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
3113 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP10]]
3114 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3115 // CHECK5:       omp.body.continue:
3116 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3117 // CHECK5:       omp.inner.for.inc:
3118 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
3119 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3120 // CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP10]]
3121 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP11:![0-9]+]]
3122 // CHECK5:       omp.inner.for.end:
3123 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3124 // CHECK5:       omp.dispatch.inc:
3125 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
3126 // CHECK5:       omp.dispatch.end:
3127 // CHECK5-NEXT:    ret void
3128 //
3129 //
3130 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
3131 // CHECK5-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3132 // CHECK5-NEXT:  entry:
3133 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3134 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3135 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3136 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined, ptr [[TMP0]])
3137 // CHECK5-NEXT:    ret void
3138 //
3139 //
3140 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined
3141 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
3142 // CHECK5-NEXT:  entry:
3143 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3144 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3145 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3146 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3147 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3148 // CHECK5-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3149 // CHECK5-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3150 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3151 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3152 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3153 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3154 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3155 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3156 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3157 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3158 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
3159 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3160 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3161 // CHECK5-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3162 // CHECK5-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3163 // CHECK5-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3164 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3165 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3166 // CHECK5-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3167 // CHECK5:       cond.true:
3168 // CHECK5-NEXT:    br label [[COND_END:%.*]]
3169 // CHECK5:       cond.false:
3170 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3171 // CHECK5-NEXT:    br label [[COND_END]]
3172 // CHECK5:       cond.end:
3173 // CHECK5-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3174 // CHECK5-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3175 // CHECK5-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3176 // CHECK5-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3177 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3178 // CHECK5:       omp.inner.for.cond:
3179 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3180 // CHECK5-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3181 // CHECK5-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3182 // CHECK5-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3183 // CHECK5:       omp.inner.for.body:
3184 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3185 // CHECK5-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
3186 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3187 // CHECK5-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
3188 // CHECK5-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
3189 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3190 // CHECK5:       omp.inner.for.inc:
3191 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3192 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3193 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
3194 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3195 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]]
3196 // CHECK5:       omp.inner.for.end:
3197 // CHECK5-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3198 // CHECK5:       omp.loop.exit:
3199 // CHECK5-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3200 // CHECK5-NEXT:    ret void
3201 //
3202 //
3203 // CHECK5-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined
3204 // CHECK5-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
3205 // CHECK5-NEXT:  entry:
3206 // CHECK5-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
3207 // CHECK5-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
3208 // CHECK5-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
3209 // CHECK5-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
3210 // CHECK5-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 8
3211 // CHECK5-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3212 // CHECK5-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3213 // CHECK5-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3214 // CHECK5-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3215 // CHECK5-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3216 // CHECK5-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3217 // CHECK5-NEXT:    [[I:%.*]] = alloca i32, align 4
3218 // CHECK5-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
3219 // CHECK5-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
3220 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3221 // CHECK5-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3222 // CHECK5-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 8
3223 // CHECK5-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 8
3224 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3225 // CHECK5-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
3226 // CHECK5-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
3227 // CHECK5-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
3228 // CHECK5-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
3229 // CHECK5-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
3230 // CHECK5-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
3231 // CHECK5-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
3232 // CHECK5-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3233 // CHECK5-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3234 // CHECK5-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3235 // CHECK5-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3236 // CHECK5-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
3237 // CHECK5-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
3238 // CHECK5-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
3239 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3240 // CHECK5:       omp.dispatch.cond:
3241 // CHECK5-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
3242 // CHECK5-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
3243 // CHECK5-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3244 // CHECK5:       omp.dispatch.body:
3245 // CHECK5-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3246 // CHECK5-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
3247 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3248 // CHECK5:       omp.inner.for.cond:
3249 // CHECK5-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13:![0-9]+]]
3250 // CHECK5-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP13]]
3251 // CHECK5-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
3252 // CHECK5-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3253 // CHECK5:       omp.inner.for.body:
3254 // CHECK5-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3255 // CHECK5-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
3256 // CHECK5-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3257 // CHECK5-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
3258 // CHECK5-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
3259 // CHECK5-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP13]]
3260 // CHECK5-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
3261 // CHECK5-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i64 0, i64 [[IDXPROM]]
3262 // CHECK5-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP13]]
3263 // CHECK5-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3264 // CHECK5:       omp.body.continue:
3265 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3266 // CHECK5:       omp.inner.for.inc:
3267 // CHECK5-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3268 // CHECK5-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
3269 // CHECK5-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP13]]
3270 // CHECK5-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP14:![0-9]+]]
3271 // CHECK5:       omp.inner.for.end:
3272 // CHECK5-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3273 // CHECK5:       omp.dispatch.inc:
3274 // CHECK5-NEXT:    br label [[OMP_DISPATCH_COND]]
3275 // CHECK5:       omp.dispatch.end:
3276 // CHECK5-NEXT:    ret void
3277 //
3278 //
3279 // CHECK5-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
3280 // CHECK5-SAME: () #[[ATTR4:[0-9]+]] {
3281 // CHECK5-NEXT:  entry:
3282 // CHECK5-NEXT:    call void @__tgt_register_requires(i64 1)
3283 // CHECK5-NEXT:    ret void
3284 //
3285 //
3286 // CHECK7-LABEL: define {{[^@]+}}@_Z21teams_template_structv
3287 // CHECK7-SAME: () #[[ATTR0:[0-9]+]] {
3288 // CHECK7-NEXT:  entry:
3289 // CHECK7-NEXT:    [[V:%.*]] = alloca [[STRUCT_SS:%.*]], align 4
3290 // CHECK7-NEXT:    [[CALL:%.*]] = call noundef i32 @_ZN2SSIiLi123ELx456EE3fooEv(ptr noundef nonnull align 4 dereferenceable(496) [[V]])
3291 // CHECK7-NEXT:    ret i32 [[CALL]]
3292 //
3293 //
3294 // CHECK7-LABEL: define {{[^@]+}}@_ZN2SSIiLi123ELx456EE3fooEv
3295 // CHECK7-SAME: (ptr noundef nonnull align 4 dereferenceable(496) [[THIS:%.*]]) #[[ATTR0]] comdat align 2 {
3296 // CHECK7-NEXT:  entry:
3297 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3298 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
3299 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
3300 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
3301 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3302 // CHECK7-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
3303 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS3:%.*]] = alloca [1 x ptr], align 4
3304 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS4:%.*]] = alloca [1 x ptr], align 4
3305 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS5:%.*]] = alloca [1 x ptr], align 4
3306 // CHECK7-NEXT:    [[_TMP6:%.*]] = alloca i32, align 4
3307 // CHECK7-NEXT:    [[KERNEL_ARGS7:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3308 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS11:%.*]] = alloca [1 x ptr], align 4
3309 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS12:%.*]] = alloca [1 x ptr], align 4
3310 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS13:%.*]] = alloca [1 x ptr], align 4
3311 // CHECK7-NEXT:    [[_TMP14:%.*]] = alloca i32, align 4
3312 // CHECK7-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3313 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [1 x ptr], align 4
3314 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [1 x ptr], align 4
3315 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [1 x ptr], align 4
3316 // CHECK7-NEXT:    [[_TMP22:%.*]] = alloca i32, align 4
3317 // CHECK7-NEXT:    [[KERNEL_ARGS23:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3318 // CHECK7-NEXT:    [[DOTOFFLOAD_BASEPTRS27:%.*]] = alloca [1 x ptr], align 4
3319 // CHECK7-NEXT:    [[DOTOFFLOAD_PTRS28:%.*]] = alloca [1 x ptr], align 4
3320 // CHECK7-NEXT:    [[DOTOFFLOAD_MAPPERS29:%.*]] = alloca [1 x ptr], align 4
3321 // CHECK7-NEXT:    [[_TMP30:%.*]] = alloca i32, align 4
3322 // CHECK7-NEXT:    [[KERNEL_ARGS31:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
3323 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3324 // CHECK7-NEXT:    [[THIS1:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3325 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[THIS1]], i32 0, i32 0
3326 // CHECK7-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3327 // CHECK7-NEXT:    store ptr [[THIS1]], ptr [[TMP0]], align 4
3328 // CHECK7-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3329 // CHECK7-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
3330 // CHECK7-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
3331 // CHECK7-NEXT:    store ptr null, ptr [[TMP2]], align 4
3332 // CHECK7-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
3333 // CHECK7-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
3334 // CHECK7-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
3335 // CHECK7-NEXT:    store i32 2, ptr [[TMP5]], align 4
3336 // CHECK7-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
3337 // CHECK7-NEXT:    store i32 1, ptr [[TMP6]], align 4
3338 // CHECK7-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
3339 // CHECK7-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
3340 // CHECK7-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
3341 // CHECK7-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
3342 // CHECK7-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
3343 // CHECK7-NEXT:    store ptr @.offload_sizes, ptr [[TMP9]], align 4
3344 // CHECK7-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
3345 // CHECK7-NEXT:    store ptr @.offload_maptypes, ptr [[TMP10]], align 4
3346 // CHECK7-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
3347 // CHECK7-NEXT:    store ptr null, ptr [[TMP11]], align 4
3348 // CHECK7-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
3349 // CHECK7-NEXT:    store ptr null, ptr [[TMP12]], align 4
3350 // CHECK7-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
3351 // CHECK7-NEXT:    store i64 123, ptr [[TMP13]], align 8
3352 // CHECK7-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
3353 // CHECK7-NEXT:    store i64 0, ptr [[TMP14]], align 8
3354 // CHECK7-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
3355 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
3356 // CHECK7-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
3357 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
3358 // CHECK7-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
3359 // CHECK7-NEXT:    store i32 0, ptr [[TMP17]], align 4
3360 // CHECK7-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.region_id, ptr [[KERNEL_ARGS]])
3361 // CHECK7-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
3362 // CHECK7-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
3363 // CHECK7:       omp_offload.failed:
3364 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35(ptr [[THIS1]]) #[[ATTR3:[0-9]+]]
3365 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT]]
3366 // CHECK7:       omp_offload.cont:
3367 // CHECK7-NEXT:    [[A2:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
3368 // CHECK7-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3369 // CHECK7-NEXT:    store ptr [[THIS1]], ptr [[TMP20]], align 4
3370 // CHECK7-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3371 // CHECK7-NEXT:    store ptr [[A2]], ptr [[TMP21]], align 4
3372 // CHECK7-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS5]], i32 0, i32 0
3373 // CHECK7-NEXT:    store ptr null, ptr [[TMP22]], align 4
3374 // CHECK7-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS3]], i32 0, i32 0
3375 // CHECK7-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS4]], i32 0, i32 0
3376 // CHECK7-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 0
3377 // CHECK7-NEXT:    store i32 2, ptr [[TMP25]], align 4
3378 // CHECK7-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 1
3379 // CHECK7-NEXT:    store i32 1, ptr [[TMP26]], align 4
3380 // CHECK7-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 2
3381 // CHECK7-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
3382 // CHECK7-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 3
3383 // CHECK7-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
3384 // CHECK7-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 4
3385 // CHECK7-NEXT:    store ptr @.offload_sizes.1, ptr [[TMP29]], align 4
3386 // CHECK7-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 5
3387 // CHECK7-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP30]], align 4
3388 // CHECK7-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 6
3389 // CHECK7-NEXT:    store ptr null, ptr [[TMP31]], align 4
3390 // CHECK7-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 7
3391 // CHECK7-NEXT:    store ptr null, ptr [[TMP32]], align 4
3392 // CHECK7-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 8
3393 // CHECK7-NEXT:    store i64 123, ptr [[TMP33]], align 8
3394 // CHECK7-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 9
3395 // CHECK7-NEXT:    store i64 0, ptr [[TMP34]], align 8
3396 // CHECK7-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 10
3397 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
3398 // CHECK7-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 11
3399 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
3400 // CHECK7-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS7]], i32 0, i32 12
3401 // CHECK7-NEXT:    store i32 0, ptr [[TMP37]], align 4
3402 // CHECK7-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.region_id, ptr [[KERNEL_ARGS7]])
3403 // CHECK7-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
3404 // CHECK7-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED8:%.*]], label [[OMP_OFFLOAD_CONT9:%.*]]
3405 // CHECK7:       omp_offload.failed8:
3406 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40(ptr [[THIS1]]) #[[ATTR3]]
3407 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT9]]
3408 // CHECK7:       omp_offload.cont9:
3409 // CHECK7-NEXT:    [[A10:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
3410 // CHECK7-NEXT:    [[TMP40:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
3411 // CHECK7-NEXT:    store ptr [[THIS1]], ptr [[TMP40]], align 4
3412 // CHECK7-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
3413 // CHECK7-NEXT:    store ptr [[A10]], ptr [[TMP41]], align 4
3414 // CHECK7-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS13]], i32 0, i32 0
3415 // CHECK7-NEXT:    store ptr null, ptr [[TMP42]], align 4
3416 // CHECK7-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS11]], i32 0, i32 0
3417 // CHECK7-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS12]], i32 0, i32 0
3418 // CHECK7-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
3419 // CHECK7-NEXT:    store i32 2, ptr [[TMP45]], align 4
3420 // CHECK7-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
3421 // CHECK7-NEXT:    store i32 1, ptr [[TMP46]], align 4
3422 // CHECK7-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
3423 // CHECK7-NEXT:    store ptr [[TMP43]], ptr [[TMP47]], align 4
3424 // CHECK7-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
3425 // CHECK7-NEXT:    store ptr [[TMP44]], ptr [[TMP48]], align 4
3426 // CHECK7-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
3427 // CHECK7-NEXT:    store ptr @.offload_sizes.3, ptr [[TMP49]], align 4
3428 // CHECK7-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
3429 // CHECK7-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP50]], align 4
3430 // CHECK7-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
3431 // CHECK7-NEXT:    store ptr null, ptr [[TMP51]], align 4
3432 // CHECK7-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
3433 // CHECK7-NEXT:    store ptr null, ptr [[TMP52]], align 4
3434 // CHECK7-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
3435 // CHECK7-NEXT:    store i64 123, ptr [[TMP53]], align 8
3436 // CHECK7-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
3437 // CHECK7-NEXT:    store i64 0, ptr [[TMP54]], align 8
3438 // CHECK7-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
3439 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP55]], align 4
3440 // CHECK7-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
3441 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP56]], align 4
3442 // CHECK7-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
3443 // CHECK7-NEXT:    store i32 0, ptr [[TMP57]], align 4
3444 // CHECK7-NEXT:    [[TMP58:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.region_id, ptr [[KERNEL_ARGS15]])
3445 // CHECK7-NEXT:    [[TMP59:%.*]] = icmp ne i32 [[TMP58]], 0
3446 // CHECK7-NEXT:    br i1 [[TMP59]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
3447 // CHECK7:       omp_offload.failed16:
3448 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45(ptr [[THIS1]]) #[[ATTR3]]
3449 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
3450 // CHECK7:       omp_offload.cont17:
3451 // CHECK7-NEXT:    [[A18:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
3452 // CHECK7-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3453 // CHECK7-NEXT:    store ptr [[THIS1]], ptr [[TMP60]], align 4
3454 // CHECK7-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3455 // CHECK7-NEXT:    store ptr [[A18]], ptr [[TMP61]], align 4
3456 // CHECK7-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
3457 // CHECK7-NEXT:    store ptr null, ptr [[TMP62]], align 4
3458 // CHECK7-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
3459 // CHECK7-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
3460 // CHECK7-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 0
3461 // CHECK7-NEXT:    store i32 2, ptr [[TMP65]], align 4
3462 // CHECK7-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 1
3463 // CHECK7-NEXT:    store i32 1, ptr [[TMP66]], align 4
3464 // CHECK7-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 2
3465 // CHECK7-NEXT:    store ptr [[TMP63]], ptr [[TMP67]], align 4
3466 // CHECK7-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 3
3467 // CHECK7-NEXT:    store ptr [[TMP64]], ptr [[TMP68]], align 4
3468 // CHECK7-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 4
3469 // CHECK7-NEXT:    store ptr @.offload_sizes.5, ptr [[TMP69]], align 4
3470 // CHECK7-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 5
3471 // CHECK7-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP70]], align 4
3472 // CHECK7-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 6
3473 // CHECK7-NEXT:    store ptr null, ptr [[TMP71]], align 4
3474 // CHECK7-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 7
3475 // CHECK7-NEXT:    store ptr null, ptr [[TMP72]], align 4
3476 // CHECK7-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 8
3477 // CHECK7-NEXT:    store i64 123, ptr [[TMP73]], align 8
3478 // CHECK7-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 9
3479 // CHECK7-NEXT:    store i64 0, ptr [[TMP74]], align 8
3480 // CHECK7-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 10
3481 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP75]], align 4
3482 // CHECK7-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 11
3483 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP76]], align 4
3484 // CHECK7-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS23]], i32 0, i32 12
3485 // CHECK7-NEXT:    store i32 0, ptr [[TMP77]], align 4
3486 // CHECK7-NEXT:    [[TMP78:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.region_id, ptr [[KERNEL_ARGS23]])
3487 // CHECK7-NEXT:    [[TMP79:%.*]] = icmp ne i32 [[TMP78]], 0
3488 // CHECK7-NEXT:    br i1 [[TMP79]], label [[OMP_OFFLOAD_FAILED24:%.*]], label [[OMP_OFFLOAD_CONT25:%.*]]
3489 // CHECK7:       omp_offload.failed24:
3490 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51(ptr [[THIS1]]) #[[ATTR3]]
3491 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT25]]
3492 // CHECK7:       omp_offload.cont25:
3493 // CHECK7-NEXT:    [[A26:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
3494 // CHECK7-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
3495 // CHECK7-NEXT:    store ptr [[THIS1]], ptr [[TMP80]], align 4
3496 // CHECK7-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
3497 // CHECK7-NEXT:    store ptr [[A26]], ptr [[TMP81]], align 4
3498 // CHECK7-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS29]], i32 0, i32 0
3499 // CHECK7-NEXT:    store ptr null, ptr [[TMP82]], align 4
3500 // CHECK7-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS27]], i32 0, i32 0
3501 // CHECK7-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS28]], i32 0, i32 0
3502 // CHECK7-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 0
3503 // CHECK7-NEXT:    store i32 2, ptr [[TMP85]], align 4
3504 // CHECK7-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 1
3505 // CHECK7-NEXT:    store i32 1, ptr [[TMP86]], align 4
3506 // CHECK7-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 2
3507 // CHECK7-NEXT:    store ptr [[TMP83]], ptr [[TMP87]], align 4
3508 // CHECK7-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 3
3509 // CHECK7-NEXT:    store ptr [[TMP84]], ptr [[TMP88]], align 4
3510 // CHECK7-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 4
3511 // CHECK7-NEXT:    store ptr @.offload_sizes.7, ptr [[TMP89]], align 4
3512 // CHECK7-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 5
3513 // CHECK7-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP90]], align 4
3514 // CHECK7-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 6
3515 // CHECK7-NEXT:    store ptr null, ptr [[TMP91]], align 4
3516 // CHECK7-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 7
3517 // CHECK7-NEXT:    store ptr null, ptr [[TMP92]], align 4
3518 // CHECK7-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 8
3519 // CHECK7-NEXT:    store i64 123, ptr [[TMP93]], align 8
3520 // CHECK7-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 9
3521 // CHECK7-NEXT:    store i64 0, ptr [[TMP94]], align 8
3522 // CHECK7-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 10
3523 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP95]], align 4
3524 // CHECK7-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 11
3525 // CHECK7-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP96]], align 4
3526 // CHECK7-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS31]], i32 0, i32 12
3527 // CHECK7-NEXT:    store i32 0, ptr [[TMP97]], align 4
3528 // CHECK7-NEXT:    [[TMP98:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.region_id, ptr [[KERNEL_ARGS31]])
3529 // CHECK7-NEXT:    [[TMP99:%.*]] = icmp ne i32 [[TMP98]], 0
3530 // CHECK7-NEXT:    br i1 [[TMP99]], label [[OMP_OFFLOAD_FAILED32:%.*]], label [[OMP_OFFLOAD_CONT33:%.*]]
3531 // CHECK7:       omp_offload.failed32:
3532 // CHECK7-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57(ptr [[THIS1]]) #[[ATTR3]]
3533 // CHECK7-NEXT:    br label [[OMP_OFFLOAD_CONT33]]
3534 // CHECK7:       omp_offload.cont33:
3535 // CHECK7-NEXT:    [[A34:%.*]] = getelementptr inbounds [[STRUCT_SS]], ptr [[THIS1]], i32 0, i32 0
3536 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A34]], i32 0, i32 0
3537 // CHECK7-NEXT:    [[TMP100:%.*]] = load i32, ptr [[ARRAYIDX]], align 4
3538 // CHECK7-NEXT:    ret i32 [[TMP100]]
3539 //
3540 //
3541 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35
3542 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1:[0-9]+]] {
3543 // CHECK7-NEXT:  entry:
3544 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3545 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3546 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3547 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined, ptr [[TMP0]])
3548 // CHECK7-NEXT:    ret void
3549 //
3550 //
3551 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined
3552 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2:[0-9]+]] {
3553 // CHECK7-NEXT:  entry:
3554 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3555 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3556 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3557 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3558 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3559 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3560 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3561 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3562 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3563 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3564 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3565 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3566 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3567 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3568 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3569 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
3570 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3571 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3572 // CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3573 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3574 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3575 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3576 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3577 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3578 // CHECK7:       cond.true:
3579 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3580 // CHECK7:       cond.false:
3581 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3582 // CHECK7-NEXT:    br label [[COND_END]]
3583 // CHECK7:       cond.end:
3584 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3585 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3586 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3587 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3588 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3589 // CHECK7:       omp.inner.for.cond:
3590 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3591 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3592 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3593 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3594 // CHECK7:       omp.inner.for.body:
3595 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3596 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3597 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
3598 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3599 // CHECK7:       omp.inner.for.inc:
3600 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3601 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3602 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3603 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3604 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3605 // CHECK7:       omp.inner.for.end:
3606 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3607 // CHECK7:       omp.loop.exit:
3608 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3609 // CHECK7-NEXT:    ret void
3610 //
3611 //
3612 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l35.omp_outlined.omp_outlined
3613 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
3614 // CHECK7-NEXT:  entry:
3615 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3616 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3617 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3618 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3619 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3620 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3621 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3622 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3623 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3624 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3625 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3626 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3627 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3628 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3629 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3630 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3631 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3632 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3633 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3634 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
3635 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3636 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3637 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
3638 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
3639 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3640 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3641 // CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3642 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
3643 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3644 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3645 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3646 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3647 // CHECK7:       cond.true:
3648 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3649 // CHECK7:       cond.false:
3650 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3651 // CHECK7-NEXT:    br label [[COND_END]]
3652 // CHECK7:       cond.end:
3653 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3654 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3655 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3656 // CHECK7-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
3657 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3658 // CHECK7:       omp.inner.for.cond:
3659 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3660 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3661 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3662 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3663 // CHECK7:       omp.inner.for.body:
3664 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3665 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3666 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3667 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3668 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
3669 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
3670 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]
3671 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
3672 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3673 // CHECK7:       omp.body.continue:
3674 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3675 // CHECK7:       omp.inner.for.inc:
3676 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3677 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3678 // CHECK7-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
3679 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3680 // CHECK7:       omp.inner.for.end:
3681 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3682 // CHECK7:       omp.loop.exit:
3683 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
3684 // CHECK7-NEXT:    ret void
3685 //
3686 //
3687 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40
3688 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3689 // CHECK7-NEXT:  entry:
3690 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3691 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3692 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3693 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined, ptr [[TMP0]])
3694 // CHECK7-NEXT:    ret void
3695 //
3696 //
3697 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined
3698 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
3699 // CHECK7-NEXT:  entry:
3700 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3701 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3702 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3703 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3704 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3705 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3706 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3707 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3708 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3709 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3710 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3711 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3712 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3713 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3714 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3715 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
3716 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3717 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3718 // CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3719 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3720 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3721 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3722 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3723 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3724 // CHECK7:       cond.true:
3725 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3726 // CHECK7:       cond.false:
3727 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3728 // CHECK7-NEXT:    br label [[COND_END]]
3729 // CHECK7:       cond.end:
3730 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3731 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3732 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3733 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3734 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3735 // CHECK7:       omp.inner.for.cond:
3736 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3737 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3738 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3739 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3740 // CHECK7:       omp.inner.for.body:
3741 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3742 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3743 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
3744 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3745 // CHECK7:       omp.inner.for.inc:
3746 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3747 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3748 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3749 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3750 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3751 // CHECK7:       omp.inner.for.end:
3752 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3753 // CHECK7:       omp.loop.exit:
3754 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3755 // CHECK7-NEXT:    ret void
3756 //
3757 //
3758 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l40.omp_outlined.omp_outlined
3759 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
3760 // CHECK7-NEXT:  entry:
3761 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3762 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3763 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3764 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3765 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3766 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3767 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3768 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3769 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3770 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3771 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3772 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3773 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3774 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3775 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3776 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3777 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3778 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3779 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3780 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
3781 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3782 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3783 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
3784 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
3785 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3786 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3787 // CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3788 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
3789 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3790 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3791 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 122
3792 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3793 // CHECK7:       cond.true:
3794 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3795 // CHECK7:       cond.false:
3796 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3797 // CHECK7-NEXT:    br label [[COND_END]]
3798 // CHECK7:       cond.end:
3799 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
3800 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3801 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3802 // CHECK7-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
3803 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3804 // CHECK7:       omp.inner.for.cond:
3805 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3806 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3807 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
3808 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3809 // CHECK7:       omp.inner.for.body:
3810 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3811 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
3812 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3813 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3814 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
3815 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
3816 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP11]]
3817 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
3818 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3819 // CHECK7:       omp.body.continue:
3820 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3821 // CHECK7:       omp.inner.for.inc:
3822 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3823 // CHECK7-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
3824 // CHECK7-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
3825 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3826 // CHECK7:       omp.inner.for.end:
3827 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3828 // CHECK7:       omp.loop.exit:
3829 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
3830 // CHECK7-NEXT:    ret void
3831 //
3832 //
3833 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45
3834 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
3835 // CHECK7-NEXT:  entry:
3836 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3837 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3838 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3839 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined, ptr [[TMP0]])
3840 // CHECK7-NEXT:    ret void
3841 //
3842 //
3843 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined
3844 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
3845 // CHECK7-NEXT:  entry:
3846 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3847 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3848 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3849 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3850 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3851 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
3852 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
3853 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3854 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3855 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3856 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3857 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3858 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3859 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3860 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
3861 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
3862 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3863 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3864 // CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3865 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
3866 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
3867 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3868 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
3869 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3870 // CHECK7:       cond.true:
3871 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3872 // CHECK7:       cond.false:
3873 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3874 // CHECK7-NEXT:    br label [[COND_END]]
3875 // CHECK7:       cond.end:
3876 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
3877 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
3878 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3879 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
3880 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3881 // CHECK7:       omp.inner.for.cond:
3882 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3883 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3884 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
3885 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3886 // CHECK7:       omp.inner.for.body:
3887 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
3888 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
3889 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
3890 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3891 // CHECK7:       omp.inner.for.inc:
3892 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3893 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3894 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
3895 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
3896 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3897 // CHECK7:       omp.inner.for.end:
3898 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
3899 // CHECK7:       omp.loop.exit:
3900 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
3901 // CHECK7-NEXT:    ret void
3902 //
3903 //
3904 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l45.omp_outlined.omp_outlined
3905 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
3906 // CHECK7-NEXT:  entry:
3907 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
3908 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
3909 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
3910 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
3911 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
3912 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
3913 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
3914 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
3915 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
3916 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
3917 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
3918 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
3919 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
3920 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
3921 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3922 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3923 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
3924 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
3925 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
3926 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
3927 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
3928 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3929 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
3930 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
3931 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
3932 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
3933 // CHECK7-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
3934 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
3935 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 61)
3936 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
3937 // CHECK7:       omp.dispatch.cond:
3938 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3939 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3940 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], [[TMP6]]
3941 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
3942 // CHECK7:       cond.true:
3943 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
3944 // CHECK7-NEXT:    br label [[COND_END:%.*]]
3945 // CHECK7:       cond.false:
3946 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3947 // CHECK7-NEXT:    br label [[COND_END]]
3948 // CHECK7:       cond.end:
3949 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP7]], [[COND_TRUE]] ], [ [[TMP8]], [[COND_FALSE]] ]
3950 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
3951 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3952 // CHECK7-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
3953 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3954 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3955 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
3956 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
3957 // CHECK7:       omp.dispatch.body:
3958 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
3959 // CHECK7:       omp.inner.for.cond:
3960 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3961 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3962 // CHECK7-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP12]], [[TMP13]]
3963 // CHECK7-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
3964 // CHECK7:       omp.inner.for.body:
3965 // CHECK7-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3966 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP14]], 1
3967 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
3968 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
3969 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
3970 // CHECK7-NEXT:    [[TMP15:%.*]] = load i32, ptr [[I]], align 4
3971 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP15]]
3972 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
3973 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
3974 // CHECK7:       omp.body.continue:
3975 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
3976 // CHECK7:       omp.inner.for.inc:
3977 // CHECK7-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
3978 // CHECK7-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP16]], 1
3979 // CHECK7-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
3980 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
3981 // CHECK7:       omp.inner.for.end:
3982 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
3983 // CHECK7:       omp.dispatch.inc:
3984 // CHECK7-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
3985 // CHECK7-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3986 // CHECK7-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP17]], [[TMP18]]
3987 // CHECK7-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
3988 // CHECK7-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
3989 // CHECK7-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
3990 // CHECK7-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP19]], [[TMP20]]
3991 // CHECK7-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
3992 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
3993 // CHECK7:       omp.dispatch.end:
3994 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
3995 // CHECK7-NEXT:    ret void
3996 //
3997 //
3998 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51
3999 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
4000 // CHECK7-NEXT:  entry:
4001 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4002 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4003 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4004 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined, ptr [[TMP0]])
4005 // CHECK7-NEXT:    ret void
4006 //
4007 //
4008 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined
4009 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
4010 // CHECK7-NEXT:  entry:
4011 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4012 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4013 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4014 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4015 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4016 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4017 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4018 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4019 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4020 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
4021 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4022 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4023 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4024 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4025 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4026 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
4027 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4028 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4029 // CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4030 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
4031 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4032 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4033 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4034 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4035 // CHECK7:       cond.true:
4036 // CHECK7-NEXT:    br label [[COND_END:%.*]]
4037 // CHECK7:       cond.false:
4038 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4039 // CHECK7-NEXT:    br label [[COND_END]]
4040 // CHECK7:       cond.end:
4041 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4042 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4043 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4044 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
4045 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4046 // CHECK7:       omp.inner.for.cond:
4047 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4048 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4049 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4050 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4051 // CHECK7:       omp.inner.for.body:
4052 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4053 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4054 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
4055 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4056 // CHECK7:       omp.inner.for.inc:
4057 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4058 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4059 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4060 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4061 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
4062 // CHECK7:       omp.inner.for.end:
4063 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4064 // CHECK7:       omp.loop.exit:
4065 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
4066 // CHECK7-NEXT:    ret void
4067 //
4068 //
4069 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l51.omp_outlined.omp_outlined
4070 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
4071 // CHECK7-NEXT:  entry:
4072 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4073 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4074 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4075 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4076 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4077 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4078 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4079 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4080 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4081 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4082 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4083 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
4084 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4085 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4086 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
4087 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
4088 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4089 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4090 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4091 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
4092 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
4093 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
4094 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
4095 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
4096 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4097 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4098 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4099 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4100 // CHECK7-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4101 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
4102 // CHECK7-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
4103 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4104 // CHECK7:       omp.dispatch.cond:
4105 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
4106 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4107 // CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4108 // CHECK7:       omp.dispatch.body:
4109 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4110 // CHECK7-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
4111 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4112 // CHECK7:       omp.inner.for.cond:
4113 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11:![0-9]+]]
4114 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP11]]
4115 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4116 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4117 // CHECK7:       omp.inner.for.body:
4118 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4119 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4120 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4121 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
4122 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
4123 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP11]]
4124 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]
4125 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP11]]
4126 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4127 // CHECK7:       omp.body.continue:
4128 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4129 // CHECK7:       omp.inner.for.inc:
4130 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4131 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
4132 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP11]]
4133 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP12:![0-9]+]]
4134 // CHECK7:       omp.inner.for.end:
4135 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4136 // CHECK7:       omp.dispatch.inc:
4137 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
4138 // CHECK7:       omp.dispatch.end:
4139 // CHECK7-NEXT:    ret void
4140 //
4141 //
4142 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57
4143 // CHECK7-SAME: (ptr noundef [[THIS:%.*]]) #[[ATTR1]] {
4144 // CHECK7-NEXT:  entry:
4145 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4146 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4147 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4148 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined, ptr [[TMP0]])
4149 // CHECK7-NEXT:    ret void
4150 //
4151 //
4152 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined
4153 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
4154 // CHECK7-NEXT:  entry:
4155 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4156 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4157 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4158 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4159 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4160 // CHECK7-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4161 // CHECK7-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4162 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4163 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4164 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
4165 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4166 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4167 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4168 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4169 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4170 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_COMB_UB]], align 4
4171 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4172 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4173 // CHECK7-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4174 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
4175 // CHECK7-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4176 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4177 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 122
4178 // CHECK7-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4179 // CHECK7:       cond.true:
4180 // CHECK7-NEXT:    br label [[COND_END:%.*]]
4181 // CHECK7:       cond.false:
4182 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4183 // CHECK7-NEXT:    br label [[COND_END]]
4184 // CHECK7:       cond.end:
4185 // CHECK7-NEXT:    [[COND:%.*]] = phi i32 [ 122, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
4186 // CHECK7-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4187 // CHECK7-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4188 // CHECK7-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
4189 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4190 // CHECK7:       omp.inner.for.cond:
4191 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4192 // CHECK7-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4193 // CHECK7-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
4194 // CHECK7-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4195 // CHECK7:       omp.inner.for.body:
4196 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4197 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4198 // CHECK7-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
4199 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4200 // CHECK7:       omp.inner.for.inc:
4201 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4202 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4203 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
4204 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4205 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]]
4206 // CHECK7:       omp.inner.for.end:
4207 // CHECK7-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4208 // CHECK7:       omp.loop.exit:
4209 // CHECK7-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
4210 // CHECK7-NEXT:    ret void
4211 //
4212 //
4213 // CHECK7-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__ZN2SSIiLi123ELx456EE3fooEv_l57.omp_outlined.omp_outlined
4214 // CHECK7-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef [[THIS:%.*]]) #[[ATTR2]] {
4215 // CHECK7-NEXT:  entry:
4216 // CHECK7-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
4217 // CHECK7-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
4218 // CHECK7-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
4219 // CHECK7-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
4220 // CHECK7-NEXT:    [[THIS_ADDR:%.*]] = alloca ptr, align 4
4221 // CHECK7-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4222 // CHECK7-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4223 // CHECK7-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4224 // CHECK7-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4225 // CHECK7-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4226 // CHECK7-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4227 // CHECK7-NEXT:    [[I:%.*]] = alloca i32, align 4
4228 // CHECK7-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
4229 // CHECK7-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
4230 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
4231 // CHECK7-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
4232 // CHECK7-NEXT:    store ptr [[THIS]], ptr [[THIS_ADDR]], align 4
4233 // CHECK7-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[THIS_ADDR]], align 4
4234 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4235 // CHECK7-NEXT:    store i32 122, ptr [[DOTOMP_UB]], align 4
4236 // CHECK7-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
4237 // CHECK7-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
4238 // CHECK7-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
4239 // CHECK7-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
4240 // CHECK7-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4241 // CHECK7-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4242 // CHECK7-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4243 // CHECK7-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4244 // CHECK7-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
4245 // CHECK7-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
4246 // CHECK7-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 61)
4247 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
4248 // CHECK7:       omp.dispatch.cond:
4249 // CHECK7-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
4250 // CHECK7-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
4251 // CHECK7-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
4252 // CHECK7:       omp.dispatch.body:
4253 // CHECK7-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4254 // CHECK7-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
4255 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4256 // CHECK7:       omp.inner.for.cond:
4257 // CHECK7-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14:![0-9]+]]
4258 // CHECK7-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP14]]
4259 // CHECK7-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
4260 // CHECK7-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4261 // CHECK7:       omp.inner.for.body:
4262 // CHECK7-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
4263 // CHECK7-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
4264 // CHECK7-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4265 // CHECK7-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
4266 // CHECK7-NEXT:    [[A:%.*]] = getelementptr inbounds [[STRUCT_SS:%.*]], ptr [[TMP0]], i32 0, i32 0
4267 // CHECK7-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP14]]
4268 // CHECK7-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [123 x i32], ptr [[A]], i32 0, i32 [[TMP12]]
4269 // CHECK7-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP14]]
4270 // CHECK7-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4271 // CHECK7:       omp.body.continue:
4272 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4273 // CHECK7:       omp.inner.for.inc:
4274 // CHECK7-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
4275 // CHECK7-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
4276 // CHECK7-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP14]]
4277 // CHECK7-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP15:![0-9]+]]
4278 // CHECK7:       omp.inner.for.end:
4279 // CHECK7-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
4280 // CHECK7:       omp.dispatch.inc:
4281 // CHECK7-NEXT:    br label [[OMP_DISPATCH_COND]]
4282 // CHECK7:       omp.dispatch.end:
4283 // CHECK7-NEXT:    ret void
4284 //
4285 //
4286 // CHECK7-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
4287 // CHECK7-SAME: () #[[ATTR4:[0-9]+]] {
4288 // CHECK7-NEXT:  entry:
4289 // CHECK7-NEXT:    call void @__tgt_register_requires(i64 1)
4290 // CHECK7-NEXT:    ret void
4291 //
4292 //
4293 // CHECK13-LABEL: define {{[^@]+}}@main
4294 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
4295 // CHECK13-NEXT:  entry:
4296 // CHECK13-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
4297 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
4298 // CHECK13-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8
4299 // CHECK13-NEXT:    [[N:%.*]] = alloca i32, align 4
4300 // CHECK13-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
4301 // CHECK13-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
4302 // CHECK13-NEXT:    [[M:%.*]] = alloca i32, align 4
4303 // CHECK13-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
4304 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8
4305 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8
4306 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8
4307 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
4308 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4309 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4310 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4311 // CHECK13-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
4312 // CHECK13-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
4313 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8
4314 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8
4315 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8
4316 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8
4317 // CHECK13-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
4318 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
4319 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
4320 // CHECK13-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4321 // CHECK13-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
4322 // CHECK13-NEXT:    [[N_CASTED18:%.*]] = alloca i64, align 8
4323 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x ptr], align 8
4324 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x ptr], align 8
4325 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x ptr], align 8
4326 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 8
4327 // CHECK13-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
4328 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
4329 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
4330 // CHECK13-NEXT:    [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4331 // CHECK13-NEXT:    [[N_CASTED33:%.*]] = alloca i64, align 8
4332 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [3 x ptr], align 8
4333 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS35:%.*]] = alloca [3 x ptr], align 8
4334 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [3 x ptr], align 8
4335 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES37:%.*]] = alloca [3 x i64], align 8
4336 // CHECK13-NEXT:    [[_TMP38:%.*]] = alloca i32, align 4
4337 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
4338 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
4339 // CHECK13-NEXT:    [[KERNEL_ARGS45:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4340 // CHECK13-NEXT:    [[M_CASTED48:%.*]] = alloca i64, align 8
4341 // CHECK13-NEXT:    [[N_CASTED49:%.*]] = alloca i64, align 8
4342 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [4 x ptr], align 8
4343 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS51:%.*]] = alloca [4 x ptr], align 8
4344 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [4 x ptr], align 8
4345 // CHECK13-NEXT:    [[DOTOFFLOAD_SIZES53:%.*]] = alloca [4 x i64], align 8
4346 // CHECK13-NEXT:    [[_TMP54:%.*]] = alloca i32, align 4
4347 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4
4348 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_56:%.*]] = alloca i32, align 4
4349 // CHECK13-NEXT:    [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
4350 // CHECK13-NEXT:    store i32 0, ptr [[RETVAL]], align 4
4351 // CHECK13-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
4352 // CHECK13-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
4353 // CHECK13-NEXT:    store i32 100, ptr [[N]], align 4
4354 // CHECK13-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
4355 // CHECK13-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
4356 // CHECK13-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
4357 // CHECK13-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
4358 // CHECK13-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
4359 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
4360 // CHECK13-NEXT:    store i32 10, ptr [[M]], align 4
4361 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
4362 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 4
4363 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
4364 // CHECK13-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
4365 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false)
4366 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4367 // CHECK13-NEXT:    store i64 [[TMP4]], ptr [[TMP6]], align 8
4368 // CHECK13-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4369 // CHECK13-NEXT:    store i64 [[TMP4]], ptr [[TMP7]], align 8
4370 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
4371 // CHECK13-NEXT:    store ptr null, ptr [[TMP8]], align 8
4372 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
4373 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP9]], align 8
4374 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
4375 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP10]], align 8
4376 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
4377 // CHECK13-NEXT:    store ptr null, ptr [[TMP11]], align 8
4378 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
4379 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 8
4380 // CHECK13-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
4381 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 8
4382 // CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
4383 // CHECK13-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 8
4384 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
4385 // CHECK13-NEXT:    store ptr null, ptr [[TMP15]], align 8
4386 // CHECK13-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
4387 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
4388 // CHECK13-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
4389 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 4
4390 // CHECK13-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
4391 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4392 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
4393 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4394 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4395 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
4396 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4397 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
4398 // CHECK13-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i64
4399 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
4400 // CHECK13-NEXT:    store i32 2, ptr [[TMP23]], align 4
4401 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
4402 // CHECK13-NEXT:    store i32 3, ptr [[TMP24]], align 4
4403 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
4404 // CHECK13-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 8
4405 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
4406 // CHECK13-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 8
4407 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
4408 // CHECK13-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 8
4409 // CHECK13-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
4410 // CHECK13-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 8
4411 // CHECK13-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
4412 // CHECK13-NEXT:    store ptr null, ptr [[TMP29]], align 8
4413 // CHECK13-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
4414 // CHECK13-NEXT:    store ptr null, ptr [[TMP30]], align 8
4415 // CHECK13-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
4416 // CHECK13-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 8
4417 // CHECK13-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
4418 // CHECK13-NEXT:    store i64 0, ptr [[TMP32]], align 8
4419 // CHECK13-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
4420 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
4421 // CHECK13-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
4422 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
4423 // CHECK13-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
4424 // CHECK13-NEXT:    store i32 0, ptr [[TMP35]], align 4
4425 // CHECK13-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, ptr [[KERNEL_ARGS]])
4426 // CHECK13-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
4427 // CHECK13-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
4428 // CHECK13:       omp_offload.failed:
4429 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4:[0-9]+]]
4430 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
4431 // CHECK13:       omp_offload.cont:
4432 // CHECK13-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 4
4433 // CHECK13-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
4434 // CHECK13-NEXT:    [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8
4435 // CHECK13-NEXT:    [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4
4436 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false)
4437 // CHECK13-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4438 // CHECK13-NEXT:    store i64 [[TMP39]], ptr [[TMP41]], align 8
4439 // CHECK13-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4440 // CHECK13-NEXT:    store i64 [[TMP39]], ptr [[TMP42]], align 8
4441 // CHECK13-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
4442 // CHECK13-NEXT:    store ptr null, ptr [[TMP43]], align 8
4443 // CHECK13-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
4444 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP44]], align 8
4445 // CHECK13-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
4446 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP45]], align 8
4447 // CHECK13-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
4448 // CHECK13-NEXT:    store ptr null, ptr [[TMP46]], align 8
4449 // CHECK13-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
4450 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP47]], align 8
4451 // CHECK13-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
4452 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 8
4453 // CHECK13-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
4454 // CHECK13-NEXT:    store i64 [[TMP40]], ptr [[TMP49]], align 8
4455 // CHECK13-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2
4456 // CHECK13-NEXT:    store ptr null, ptr [[TMP50]], align 8
4457 // CHECK13-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
4458 // CHECK13-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
4459 // CHECK13-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
4460 // CHECK13-NEXT:    [[TMP54:%.*]] = load i32, ptr [[N]], align 4
4461 // CHECK13-NEXT:    store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4
4462 // CHECK13-NEXT:    [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
4463 // CHECK13-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0
4464 // CHECK13-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
4465 // CHECK13-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
4466 // CHECK13-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
4467 // CHECK13-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
4468 // CHECK13-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1
4469 // CHECK13-NEXT:    [[TMP57:%.*]] = zext i32 [[ADD14]] to i64
4470 // CHECK13-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
4471 // CHECK13-NEXT:    store i32 2, ptr [[TMP58]], align 4
4472 // CHECK13-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
4473 // CHECK13-NEXT:    store i32 3, ptr [[TMP59]], align 4
4474 // CHECK13-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
4475 // CHECK13-NEXT:    store ptr [[TMP51]], ptr [[TMP60]], align 8
4476 // CHECK13-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
4477 // CHECK13-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 8
4478 // CHECK13-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
4479 // CHECK13-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 8
4480 // CHECK13-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
4481 // CHECK13-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8
4482 // CHECK13-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
4483 // CHECK13-NEXT:    store ptr null, ptr [[TMP64]], align 8
4484 // CHECK13-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
4485 // CHECK13-NEXT:    store ptr null, ptr [[TMP65]], align 8
4486 // CHECK13-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
4487 // CHECK13-NEXT:    store i64 [[TMP57]], ptr [[TMP66]], align 8
4488 // CHECK13-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
4489 // CHECK13-NEXT:    store i64 0, ptr [[TMP67]], align 8
4490 // CHECK13-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
4491 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4
4492 // CHECK13-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
4493 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
4494 // CHECK13-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
4495 // CHECK13-NEXT:    store i32 0, ptr [[TMP70]], align 4
4496 // CHECK13-NEXT:    [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, ptr [[KERNEL_ARGS15]])
4497 // CHECK13-NEXT:    [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0
4498 // CHECK13-NEXT:    br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
4499 // CHECK13:       omp_offload.failed16:
4500 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4]]
4501 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
4502 // CHECK13:       omp_offload.cont17:
4503 // CHECK13-NEXT:    [[TMP73:%.*]] = load i32, ptr [[M]], align 4
4504 // CHECK13-NEXT:    store i32 [[TMP73]], ptr [[M_CASTED]], align 4
4505 // CHECK13-NEXT:    [[TMP74:%.*]] = load i64, ptr [[M_CASTED]], align 8
4506 // CHECK13-NEXT:    [[TMP75:%.*]] = load i32, ptr [[N]], align 4
4507 // CHECK13-NEXT:    store i32 [[TMP75]], ptr [[N_CASTED18]], align 4
4508 // CHECK13-NEXT:    [[TMP76:%.*]] = load i64, ptr [[N_CASTED18]], align 8
4509 // CHECK13-NEXT:    [[TMP77:%.*]] = mul nuw i64 [[TMP1]], 4
4510 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES22]], ptr align 8 @.offload_sizes.3, i64 32, i1 false)
4511 // CHECK13-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
4512 // CHECK13-NEXT:    store i64 [[TMP74]], ptr [[TMP78]], align 8
4513 // CHECK13-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
4514 // CHECK13-NEXT:    store i64 [[TMP74]], ptr [[TMP79]], align 8
4515 // CHECK13-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
4516 // CHECK13-NEXT:    store ptr null, ptr [[TMP80]], align 8
4517 // CHECK13-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
4518 // CHECK13-NEXT:    store i64 [[TMP76]], ptr [[TMP81]], align 8
4519 // CHECK13-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
4520 // CHECK13-NEXT:    store i64 [[TMP76]], ptr [[TMP82]], align 8
4521 // CHECK13-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 1
4522 // CHECK13-NEXT:    store ptr null, ptr [[TMP83]], align 8
4523 // CHECK13-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
4524 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP84]], align 8
4525 // CHECK13-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
4526 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP85]], align 8
4527 // CHECK13-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 2
4528 // CHECK13-NEXT:    store ptr null, ptr [[TMP86]], align 8
4529 // CHECK13-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
4530 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP87]], align 8
4531 // CHECK13-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
4532 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP88]], align 8
4533 // CHECK13-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
4534 // CHECK13-NEXT:    store i64 [[TMP77]], ptr [[TMP89]], align 8
4535 // CHECK13-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 3
4536 // CHECK13-NEXT:    store ptr null, ptr [[TMP90]], align 8
4537 // CHECK13-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
4538 // CHECK13-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
4539 // CHECK13-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
4540 // CHECK13-NEXT:    [[TMP94:%.*]] = load i32, ptr [[N]], align 4
4541 // CHECK13-NEXT:    store i32 [[TMP94]], ptr [[DOTCAPTURE_EXPR_24]], align 4
4542 // CHECK13-NEXT:    [[TMP95:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 4
4543 // CHECK13-NEXT:    [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 0
4544 // CHECK13-NEXT:    [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
4545 // CHECK13-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
4546 // CHECK13-NEXT:    store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 4
4547 // CHECK13-NEXT:    [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
4548 // CHECK13-NEXT:    [[ADD29:%.*]] = add nsw i32 [[TMP96]], 1
4549 // CHECK13-NEXT:    [[TMP97:%.*]] = zext i32 [[ADD29]] to i64
4550 // CHECK13-NEXT:    [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 0
4551 // CHECK13-NEXT:    store i32 2, ptr [[TMP98]], align 4
4552 // CHECK13-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1
4553 // CHECK13-NEXT:    store i32 4, ptr [[TMP99]], align 4
4554 // CHECK13-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 2
4555 // CHECK13-NEXT:    store ptr [[TMP91]], ptr [[TMP100]], align 8
4556 // CHECK13-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 3
4557 // CHECK13-NEXT:    store ptr [[TMP92]], ptr [[TMP101]], align 8
4558 // CHECK13-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 4
4559 // CHECK13-NEXT:    store ptr [[TMP93]], ptr [[TMP102]], align 8
4560 // CHECK13-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 5
4561 // CHECK13-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP103]], align 8
4562 // CHECK13-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 6
4563 // CHECK13-NEXT:    store ptr null, ptr [[TMP104]], align 8
4564 // CHECK13-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 7
4565 // CHECK13-NEXT:    store ptr null, ptr [[TMP105]], align 8
4566 // CHECK13-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 8
4567 // CHECK13-NEXT:    store i64 [[TMP97]], ptr [[TMP106]], align 8
4568 // CHECK13-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 9
4569 // CHECK13-NEXT:    store i64 0, ptr [[TMP107]], align 8
4570 // CHECK13-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 10
4571 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4
4572 // CHECK13-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 11
4573 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4
4574 // CHECK13-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 12
4575 // CHECK13-NEXT:    store i32 0, ptr [[TMP110]], align 4
4576 // CHECK13-NEXT:    [[TMP111:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, ptr [[KERNEL_ARGS30]])
4577 // CHECK13-NEXT:    [[TMP112:%.*]] = icmp ne i32 [[TMP111]], 0
4578 // CHECK13-NEXT:    br i1 [[TMP112]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]
4579 // CHECK13:       omp_offload.failed31:
4580 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP74]], i64 [[TMP76]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4]]
4581 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT32]]
4582 // CHECK13:       omp_offload.cont32:
4583 // CHECK13-NEXT:    [[TMP113:%.*]] = load i32, ptr [[N]], align 4
4584 // CHECK13-NEXT:    store i32 [[TMP113]], ptr [[N_CASTED33]], align 4
4585 // CHECK13-NEXT:    [[TMP114:%.*]] = load i64, ptr [[N_CASTED33]], align 8
4586 // CHECK13-NEXT:    [[TMP115:%.*]] = mul nuw i64 [[TMP1]], 4
4587 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES37]], ptr align 8 @.offload_sizes.5, i64 24, i1 false)
4588 // CHECK13-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
4589 // CHECK13-NEXT:    store i64 [[TMP114]], ptr [[TMP116]], align 8
4590 // CHECK13-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
4591 // CHECK13-NEXT:    store i64 [[TMP114]], ptr [[TMP117]], align 8
4592 // CHECK13-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 0
4593 // CHECK13-NEXT:    store ptr null, ptr [[TMP118]], align 8
4594 // CHECK13-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1
4595 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP119]], align 8
4596 // CHECK13-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 1
4597 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP120]], align 8
4598 // CHECK13-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 1
4599 // CHECK13-NEXT:    store ptr null, ptr [[TMP121]], align 8
4600 // CHECK13-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2
4601 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP122]], align 8
4602 // CHECK13-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 2
4603 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP123]], align 8
4604 // CHECK13-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 2
4605 // CHECK13-NEXT:    store i64 [[TMP115]], ptr [[TMP124]], align 8
4606 // CHECK13-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 2
4607 // CHECK13-NEXT:    store ptr null, ptr [[TMP125]], align 8
4608 // CHECK13-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
4609 // CHECK13-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
4610 // CHECK13-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 0
4611 // CHECK13-NEXT:    [[TMP129:%.*]] = load i32, ptr [[N]], align 4
4612 // CHECK13-NEXT:    store i32 [[TMP129]], ptr [[DOTCAPTURE_EXPR_39]], align 4
4613 // CHECK13-NEXT:    [[TMP130:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_39]], align 4
4614 // CHECK13-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[TMP130]], 0
4615 // CHECK13-NEXT:    [[DIV42:%.*]] = sdiv i32 [[SUB41]], 1
4616 // CHECK13-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[DIV42]], 1
4617 // CHECK13-NEXT:    store i32 [[SUB43]], ptr [[DOTCAPTURE_EXPR_40]], align 4
4618 // CHECK13-NEXT:    [[TMP131:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
4619 // CHECK13-NEXT:    [[ADD44:%.*]] = add nsw i32 [[TMP131]], 1
4620 // CHECK13-NEXT:    [[TMP132:%.*]] = zext i32 [[ADD44]] to i64
4621 // CHECK13-NEXT:    [[TMP133:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 0
4622 // CHECK13-NEXT:    store i32 2, ptr [[TMP133]], align 4
4623 // CHECK13-NEXT:    [[TMP134:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 1
4624 // CHECK13-NEXT:    store i32 3, ptr [[TMP134]], align 4
4625 // CHECK13-NEXT:    [[TMP135:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 2
4626 // CHECK13-NEXT:    store ptr [[TMP126]], ptr [[TMP135]], align 8
4627 // CHECK13-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 3
4628 // CHECK13-NEXT:    store ptr [[TMP127]], ptr [[TMP136]], align 8
4629 // CHECK13-NEXT:    [[TMP137:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 4
4630 // CHECK13-NEXT:    store ptr [[TMP128]], ptr [[TMP137]], align 8
4631 // CHECK13-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 5
4632 // CHECK13-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP138]], align 8
4633 // CHECK13-NEXT:    [[TMP139:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 6
4634 // CHECK13-NEXT:    store ptr null, ptr [[TMP139]], align 8
4635 // CHECK13-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 7
4636 // CHECK13-NEXT:    store ptr null, ptr [[TMP140]], align 8
4637 // CHECK13-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 8
4638 // CHECK13-NEXT:    store i64 [[TMP132]], ptr [[TMP141]], align 8
4639 // CHECK13-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 9
4640 // CHECK13-NEXT:    store i64 0, ptr [[TMP142]], align 8
4641 // CHECK13-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 10
4642 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP143]], align 4
4643 // CHECK13-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 11
4644 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP144]], align 4
4645 // CHECK13-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 12
4646 // CHECK13-NEXT:    store i32 0, ptr [[TMP145]], align 4
4647 // CHECK13-NEXT:    [[TMP146:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, ptr [[KERNEL_ARGS45]])
4648 // CHECK13-NEXT:    [[TMP147:%.*]] = icmp ne i32 [[TMP146]], 0
4649 // CHECK13-NEXT:    br i1 [[TMP147]], label [[OMP_OFFLOAD_FAILED46:%.*]], label [[OMP_OFFLOAD_CONT47:%.*]]
4650 // CHECK13:       omp_offload.failed46:
4651 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP114]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4]]
4652 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT47]]
4653 // CHECK13:       omp_offload.cont47:
4654 // CHECK13-NEXT:    [[TMP148:%.*]] = load i32, ptr [[M]], align 4
4655 // CHECK13-NEXT:    store i32 [[TMP148]], ptr [[M_CASTED48]], align 4
4656 // CHECK13-NEXT:    [[TMP149:%.*]] = load i64, ptr [[M_CASTED48]], align 8
4657 // CHECK13-NEXT:    [[TMP150:%.*]] = load i32, ptr [[N]], align 4
4658 // CHECK13-NEXT:    store i32 [[TMP150]], ptr [[N_CASTED49]], align 4
4659 // CHECK13-NEXT:    [[TMP151:%.*]] = load i64, ptr [[N_CASTED49]], align 8
4660 // CHECK13-NEXT:    [[TMP152:%.*]] = mul nuw i64 [[TMP1]], 4
4661 // CHECK13-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES53]], ptr align 8 @.offload_sizes.7, i64 32, i1 false)
4662 // CHECK13-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
4663 // CHECK13-NEXT:    store i64 [[TMP149]], ptr [[TMP153]], align 8
4664 // CHECK13-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
4665 // CHECK13-NEXT:    store i64 [[TMP149]], ptr [[TMP154]], align 8
4666 // CHECK13-NEXT:    [[TMP155:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0
4667 // CHECK13-NEXT:    store ptr null, ptr [[TMP155]], align 8
4668 // CHECK13-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1
4669 // CHECK13-NEXT:    store i64 [[TMP151]], ptr [[TMP156]], align 8
4670 // CHECK13-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 1
4671 // CHECK13-NEXT:    store i64 [[TMP151]], ptr [[TMP157]], align 8
4672 // CHECK13-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 1
4673 // CHECK13-NEXT:    store ptr null, ptr [[TMP158]], align 8
4674 // CHECK13-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2
4675 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP159]], align 8
4676 // CHECK13-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 2
4677 // CHECK13-NEXT:    store i64 [[TMP1]], ptr [[TMP160]], align 8
4678 // CHECK13-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 2
4679 // CHECK13-NEXT:    store ptr null, ptr [[TMP161]], align 8
4680 // CHECK13-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3
4681 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP162]], align 8
4682 // CHECK13-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 3
4683 // CHECK13-NEXT:    store ptr [[VLA]], ptr [[TMP163]], align 8
4684 // CHECK13-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 3
4685 // CHECK13-NEXT:    store i64 [[TMP152]], ptr [[TMP164]], align 8
4686 // CHECK13-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 3
4687 // CHECK13-NEXT:    store ptr null, ptr [[TMP165]], align 8
4688 // CHECK13-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
4689 // CHECK13-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
4690 // CHECK13-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 0
4691 // CHECK13-NEXT:    [[TMP169:%.*]] = load i32, ptr [[N]], align 4
4692 // CHECK13-NEXT:    store i32 [[TMP169]], ptr [[DOTCAPTURE_EXPR_55]], align 4
4693 // CHECK13-NEXT:    [[TMP170:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_55]], align 4
4694 // CHECK13-NEXT:    [[SUB57:%.*]] = sub nsw i32 [[TMP170]], 0
4695 // CHECK13-NEXT:    [[DIV58:%.*]] = sdiv i32 [[SUB57]], 1
4696 // CHECK13-NEXT:    [[SUB59:%.*]] = sub nsw i32 [[DIV58]], 1
4697 // CHECK13-NEXT:    store i32 [[SUB59]], ptr [[DOTCAPTURE_EXPR_56]], align 4
4698 // CHECK13-NEXT:    [[TMP171:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_56]], align 4
4699 // CHECK13-NEXT:    [[ADD60:%.*]] = add nsw i32 [[TMP171]], 1
4700 // CHECK13-NEXT:    [[TMP172:%.*]] = zext i32 [[ADD60]] to i64
4701 // CHECK13-NEXT:    [[TMP173:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 0
4702 // CHECK13-NEXT:    store i32 2, ptr [[TMP173]], align 4
4703 // CHECK13-NEXT:    [[TMP174:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1
4704 // CHECK13-NEXT:    store i32 4, ptr [[TMP174]], align 4
4705 // CHECK13-NEXT:    [[TMP175:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 2
4706 // CHECK13-NEXT:    store ptr [[TMP166]], ptr [[TMP175]], align 8
4707 // CHECK13-NEXT:    [[TMP176:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 3
4708 // CHECK13-NEXT:    store ptr [[TMP167]], ptr [[TMP176]], align 8
4709 // CHECK13-NEXT:    [[TMP177:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 4
4710 // CHECK13-NEXT:    store ptr [[TMP168]], ptr [[TMP177]], align 8
4711 // CHECK13-NEXT:    [[TMP178:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 5
4712 // CHECK13-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP178]], align 8
4713 // CHECK13-NEXT:    [[TMP179:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 6
4714 // CHECK13-NEXT:    store ptr null, ptr [[TMP179]], align 8
4715 // CHECK13-NEXT:    [[TMP180:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 7
4716 // CHECK13-NEXT:    store ptr null, ptr [[TMP180]], align 8
4717 // CHECK13-NEXT:    [[TMP181:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 8
4718 // CHECK13-NEXT:    store i64 [[TMP172]], ptr [[TMP181]], align 8
4719 // CHECK13-NEXT:    [[TMP182:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 9
4720 // CHECK13-NEXT:    store i64 0, ptr [[TMP182]], align 8
4721 // CHECK13-NEXT:    [[TMP183:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 10
4722 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP183]], align 4
4723 // CHECK13-NEXT:    [[TMP184:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 11
4724 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP184]], align 4
4725 // CHECK13-NEXT:    [[TMP185:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 12
4726 // CHECK13-NEXT:    store i32 0, ptr [[TMP185]], align 4
4727 // CHECK13-NEXT:    [[TMP186:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, ptr [[KERNEL_ARGS61]])
4728 // CHECK13-NEXT:    [[TMP187:%.*]] = icmp ne i32 [[TMP186]], 0
4729 // CHECK13-NEXT:    br i1 [[TMP187]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]
4730 // CHECK13:       omp_offload.failed62:
4731 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP149]], i64 [[TMP151]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4]]
4732 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT63]]
4733 // CHECK13:       omp_offload.cont63:
4734 // CHECK13-NEXT:    [[TMP188:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
4735 // CHECK13-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP188]])
4736 // CHECK13-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
4737 // CHECK13-NEXT:    [[TMP189:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
4738 // CHECK13-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP189]])
4739 // CHECK13-NEXT:    [[TMP190:%.*]] = load i32, ptr [[RETVAL]], align 4
4740 // CHECK13-NEXT:    ret i32 [[TMP190]]
4741 //
4742 //
4743 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
4744 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
4745 // CHECK13-NEXT:  entry:
4746 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
4747 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
4748 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4749 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
4750 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
4751 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4752 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
4753 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4754 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])
4755 // CHECK13-NEXT:    ret void
4756 //
4757 //
4758 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined
4759 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
4760 // CHECK13-NEXT:  entry:
4761 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4762 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4763 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
4764 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
4765 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4766 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4767 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4768 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4769 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4770 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4771 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4772 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4773 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4774 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4775 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
4776 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4777 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4778 // CHECK13-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
4779 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
4780 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4781 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
4782 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
4783 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4784 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
4785 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
4786 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4787 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4788 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4789 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4790 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
4791 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
4792 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4793 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4794 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4795 // CHECK13:       omp.precond.then:
4796 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
4797 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4798 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
4799 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4800 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4801 // CHECK13-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4802 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
4803 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4804 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4805 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4806 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
4807 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4808 // CHECK13:       cond.true:
4809 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4810 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4811 // CHECK13:       cond.false:
4812 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4813 // CHECK13-NEXT:    br label [[COND_END]]
4814 // CHECK13:       cond.end:
4815 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
4816 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
4817 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4818 // CHECK13-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
4819 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4820 // CHECK13:       omp.inner.for.cond:
4821 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4822 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4823 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
4824 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4825 // CHECK13:       omp.inner.for.body:
4826 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
4827 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
4828 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
4829 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
4830 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])
4831 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4832 // CHECK13:       omp.inner.for.inc:
4833 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4834 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
4835 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
4836 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
4837 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4838 // CHECK13:       omp.inner.for.end:
4839 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4840 // CHECK13:       omp.loop.exit:
4841 // CHECK13-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4842 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
4843 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
4844 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
4845 // CHECK13:       omp.precond.end:
4846 // CHECK13-NEXT:    ret void
4847 //
4848 //
4849 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined
4850 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
4851 // CHECK13-NEXT:  entry:
4852 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4853 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4854 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
4855 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
4856 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
4857 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
4858 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4859 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4860 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4861 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4862 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4863 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4864 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
4865 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
4866 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4867 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4868 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
4869 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4870 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4871 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4872 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4873 // CHECK13-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
4874 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
4875 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4876 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
4877 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
4878 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4879 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
4880 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
4881 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4882 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4883 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
4884 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
4885 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
4886 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
4887 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4888 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
4889 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
4890 // CHECK13:       omp.precond.then:
4891 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
4892 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4893 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
4894 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
4895 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
4896 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
4897 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
4898 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
4899 // CHECK13-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
4900 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
4901 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
4902 // CHECK13-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4903 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
4904 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
4905 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4906 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4907 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
4908 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
4909 // CHECK13:       cond.true:
4910 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
4911 // CHECK13-NEXT:    br label [[COND_END:%.*]]
4912 // CHECK13:       cond.false:
4913 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4914 // CHECK13-NEXT:    br label [[COND_END]]
4915 // CHECK13:       cond.end:
4916 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
4917 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
4918 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
4919 // CHECK13-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
4920 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
4921 // CHECK13:       omp.inner.for.cond:
4922 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4923 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
4924 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
4925 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
4926 // CHECK13:       omp.inner.for.body:
4927 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4928 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
4929 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
4930 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
4931 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4
4932 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
4933 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
4934 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
4935 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
4936 // CHECK13:       omp.body.continue:
4937 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
4938 // CHECK13:       omp.inner.for.inc:
4939 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
4940 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
4941 // CHECK13-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
4942 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
4943 // CHECK13:       omp.inner.for.end:
4944 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
4945 // CHECK13:       omp.loop.exit:
4946 // CHECK13-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
4947 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
4948 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
4949 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
4950 // CHECK13:       omp.precond.end:
4951 // CHECK13-NEXT:    ret void
4952 //
4953 //
4954 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
4955 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
4956 // CHECK13-NEXT:  entry:
4957 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
4958 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
4959 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4960 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
4961 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
4962 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4963 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
4964 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4965 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])
4966 // CHECK13-NEXT:    ret void
4967 //
4968 //
4969 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined
4970 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
4971 // CHECK13-NEXT:  entry:
4972 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
4973 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
4974 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
4975 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
4976 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
4977 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
4978 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
4979 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
4980 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
4981 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
4982 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
4983 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
4984 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
4985 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
4986 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
4987 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
4988 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
4989 // CHECK13-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
4990 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
4991 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
4992 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
4993 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
4994 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
4995 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
4996 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
4997 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
4998 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
4999 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5000 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5001 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5002 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5003 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5004 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5005 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5006 // CHECK13:       omp.precond.then:
5007 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5008 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5009 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
5010 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5011 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5012 // CHECK13-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5013 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
5014 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5015 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5016 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5017 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5018 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5019 // CHECK13:       cond.true:
5020 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5021 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5022 // CHECK13:       cond.false:
5023 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5024 // CHECK13-NEXT:    br label [[COND_END]]
5025 // CHECK13:       cond.end:
5026 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5027 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5028 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5029 // CHECK13-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
5030 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5031 // CHECK13:       omp.inner.for.cond:
5032 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5033 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5034 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
5035 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5036 // CHECK13:       omp.inner.for.body:
5037 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5038 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
5039 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5040 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
5041 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])
5042 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5043 // CHECK13:       omp.inner.for.inc:
5044 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5045 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5046 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
5047 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5048 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5049 // CHECK13:       omp.inner.for.end:
5050 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5051 // CHECK13:       omp.loop.exit:
5052 // CHECK13-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5053 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
5054 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
5055 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5056 // CHECK13:       omp.precond.end:
5057 // CHECK13-NEXT:    ret void
5058 //
5059 //
5060 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined
5061 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
5062 // CHECK13-NEXT:  entry:
5063 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5064 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5065 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5066 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5067 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
5068 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5069 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5070 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5071 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5072 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5073 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5074 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5075 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5076 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5077 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5078 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5079 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
5080 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5081 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5082 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5083 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5084 // CHECK13-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
5085 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5086 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5087 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
5088 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5089 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5090 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
5091 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
5092 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5093 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5094 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5095 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5096 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5097 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5098 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5099 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5100 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5101 // CHECK13:       omp.precond.then:
5102 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5103 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5104 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
5105 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5106 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
5107 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5108 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
5109 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5110 // CHECK13-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
5111 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5112 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5113 // CHECK13-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5114 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
5115 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5116 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5117 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5118 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
5119 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5120 // CHECK13:       cond.true:
5121 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5122 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5123 // CHECK13:       cond.false:
5124 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5125 // CHECK13-NEXT:    br label [[COND_END]]
5126 // CHECK13:       cond.end:
5127 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
5128 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5129 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5130 // CHECK13-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
5131 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5132 // CHECK13:       omp.inner.for.cond:
5133 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5134 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5135 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
5136 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5137 // CHECK13:       omp.inner.for.body:
5138 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5139 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
5140 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5141 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
5142 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4
5143 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
5144 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
5145 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
5146 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5147 // CHECK13:       omp.body.continue:
5148 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5149 // CHECK13:       omp.inner.for.inc:
5150 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5151 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
5152 // CHECK13-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
5153 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5154 // CHECK13:       omp.inner.for.end:
5155 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5156 // CHECK13:       omp.loop.exit:
5157 // CHECK13-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5158 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
5159 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
5160 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5161 // CHECK13:       omp.precond.end:
5162 // CHECK13-NEXT:    ret void
5163 //
5164 //
5165 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
5166 // CHECK13-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5167 // CHECK13-NEXT:  entry:
5168 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
5169 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5170 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5171 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5172 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5173 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5174 // CHECK13-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8
5175 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5176 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5177 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5178 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5179 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5180 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 4
5181 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
5182 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5183 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
5184 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5185 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]])
5186 // CHECK13-NEXT:    ret void
5187 //
5188 //
5189 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined
5190 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
5191 // CHECK13-NEXT:  entry:
5192 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5193 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5194 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
5195 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5196 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5197 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5198 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5199 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5200 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5201 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5202 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5203 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5204 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5205 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5206 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5207 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
5208 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5209 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5210 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5211 // CHECK13-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
5212 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5213 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5214 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5215 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
5216 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5217 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5218 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
5219 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5220 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5221 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5222 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5223 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5224 // CHECK13-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
5225 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5226 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5227 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5228 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5229 // CHECK13:       omp.precond.then:
5230 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5231 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5232 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
5233 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5234 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5235 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
5236 // CHECK13-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5237 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
5238 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
5239 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5240 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5241 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
5242 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5243 // CHECK13:       cond.true:
5244 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5245 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5246 // CHECK13:       cond.false:
5247 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5248 // CHECK13-NEXT:    br label [[COND_END]]
5249 // CHECK13:       cond.end:
5250 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
5251 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5252 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5253 // CHECK13-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
5254 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5255 // CHECK13:       omp.inner.for.cond:
5256 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5257 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5258 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
5259 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
5260 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5261 // CHECK13:       omp.inner.for.body:
5262 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5263 // CHECK13-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
5264 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5265 // CHECK13-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
5266 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
5267 // CHECK13-NEXT:    store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
5268 // CHECK13-NEXT:    [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5269 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]], i64 [[TMP22]])
5270 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5271 // CHECK13:       omp.inner.for.inc:
5272 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5273 // CHECK13-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5274 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
5275 // CHECK13-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
5276 // CHECK13-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5277 // CHECK13-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5278 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
5279 // CHECK13-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4
5280 // CHECK13-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5281 // CHECK13-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5282 // CHECK13-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
5283 // CHECK13-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4
5284 // CHECK13-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5285 // CHECK13-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5286 // CHECK13-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
5287 // CHECK13-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
5288 // CHECK13:       cond.true11:
5289 // CHECK13-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5290 // CHECK13-NEXT:    br label [[COND_END13:%.*]]
5291 // CHECK13:       cond.false12:
5292 // CHECK13-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5293 // CHECK13-NEXT:    br label [[COND_END13]]
5294 // CHECK13:       cond.end13:
5295 // CHECK13-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE11]] ], [ [[TMP32]], [[COND_FALSE12]] ]
5296 // CHECK13-NEXT:    store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4
5297 // CHECK13-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5298 // CHECK13-NEXT:    store i32 [[TMP33]], ptr [[DOTOMP_IV]], align 4
5299 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5300 // CHECK13:       omp.inner.for.end:
5301 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5302 // CHECK13:       omp.loop.exit:
5303 // CHECK13-NEXT:    [[TMP34:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5304 // CHECK13-NEXT:    [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4
5305 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP35]])
5306 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5307 // CHECK13:       omp.precond.end:
5308 // CHECK13-NEXT:    ret void
5309 //
5310 //
5311 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined
5312 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
5313 // CHECK13-NEXT:  entry:
5314 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5315 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5316 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5317 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5318 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
5319 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5320 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5321 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5322 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5323 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5324 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5325 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5326 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5327 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5328 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5329 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5330 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5331 // CHECK13-NEXT:    [[I5:%.*]] = alloca i32, align 4
5332 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5333 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5334 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5335 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5336 // CHECK13-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
5337 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5338 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5339 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5340 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
5341 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5342 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5343 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
5344 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5345 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5346 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5347 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5348 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5349 // CHECK13-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
5350 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5351 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5352 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5353 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5354 // CHECK13:       omp.precond.then:
5355 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5356 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5357 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
5358 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5359 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
5360 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5361 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
5362 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5363 // CHECK13-NEXT:    store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4
5364 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5365 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5366 // CHECK13-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5367 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
5368 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5369 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5370 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5371 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
5372 // CHECK13-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5373 // CHECK13:       cond.true:
5374 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5375 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5376 // CHECK13:       cond.false:
5377 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5378 // CHECK13-NEXT:    br label [[COND_END]]
5379 // CHECK13:       cond.end:
5380 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
5381 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
5382 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5383 // CHECK13-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
5384 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5385 // CHECK13:       omp.inner.for.cond:
5386 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5387 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5388 // CHECK13-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
5389 // CHECK13-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5390 // CHECK13:       omp.inner.for.body:
5391 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5392 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
5393 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5394 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I5]], align 4
5395 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I5]], align 4
5396 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
5397 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
5398 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
5399 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5400 // CHECK13:       omp.body.continue:
5401 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5402 // CHECK13:       omp.inner.for.inc:
5403 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5404 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
5405 // CHECK13-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
5406 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5407 // CHECK13:       omp.inner.for.end:
5408 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5409 // CHECK13:       omp.loop.exit:
5410 // CHECK13-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5411 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
5412 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
5413 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5414 // CHECK13:       omp.precond.end:
5415 // CHECK13-NEXT:    ret void
5416 //
5417 //
5418 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
5419 // CHECK13-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5420 // CHECK13-NEXT:  entry:
5421 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5422 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5423 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5424 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5425 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5426 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5427 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5428 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5429 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])
5430 // CHECK13-NEXT:    ret void
5431 //
5432 //
5433 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined
5434 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
5435 // CHECK13-NEXT:  entry:
5436 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5437 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5438 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
5439 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5440 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5441 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5442 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5443 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5444 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5445 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5446 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5447 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5448 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5449 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5450 // CHECK13-NEXT:    [[I3:%.*]] = alloca i32, align 4
5451 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5452 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5453 // CHECK13-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
5454 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5455 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5456 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
5457 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5458 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5459 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
5460 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
5461 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5462 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5463 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5464 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5465 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5466 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5467 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5468 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5469 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5470 // CHECK13:       omp.precond.then:
5471 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5472 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5473 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
5474 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5475 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5476 // CHECK13-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5477 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
5478 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5479 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5480 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5481 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5482 // CHECK13-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5483 // CHECK13:       cond.true:
5484 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5485 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5486 // CHECK13:       cond.false:
5487 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5488 // CHECK13-NEXT:    br label [[COND_END]]
5489 // CHECK13:       cond.end:
5490 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5491 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5492 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5493 // CHECK13-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
5494 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5495 // CHECK13:       omp.inner.for.cond:
5496 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5497 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5498 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
5499 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5500 // CHECK13:       omp.inner.for.body:
5501 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5502 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
5503 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5504 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
5505 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])
5506 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5507 // CHECK13:       omp.inner.for.inc:
5508 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5509 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5510 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
5511 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5512 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5513 // CHECK13:       omp.inner.for.end:
5514 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5515 // CHECK13:       omp.loop.exit:
5516 // CHECK13-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5517 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
5518 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
5519 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5520 // CHECK13:       omp.precond.end:
5521 // CHECK13-NEXT:    ret void
5522 //
5523 //
5524 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined
5525 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
5526 // CHECK13-NEXT:  entry:
5527 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5528 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5529 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5530 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5531 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
5532 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5533 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5534 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5535 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5536 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5537 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5538 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5539 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5540 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5541 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5542 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5543 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
5544 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5545 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5546 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5547 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5548 // CHECK13-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
5549 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5550 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5551 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
5552 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5553 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5554 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
5555 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
5556 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5557 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5558 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5559 // CHECK13-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
5560 // CHECK13-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5561 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5562 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5563 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5564 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5565 // CHECK13:       omp.precond.then:
5566 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5567 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5568 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
5569 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5570 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
5571 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5572 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
5573 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5574 // CHECK13-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
5575 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5576 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5577 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5578 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5579 // CHECK13-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5580 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
5581 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
5582 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5583 // CHECK13:       omp.dispatch.cond:
5584 // CHECK13-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5585 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
5586 // CHECK13-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
5587 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
5588 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5589 // CHECK13:       omp.dispatch.body:
5590 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5591 // CHECK13-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
5592 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5593 // CHECK13:       omp.inner.for.cond:
5594 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
5595 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
5596 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
5597 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5598 // CHECK13:       omp.inner.for.body:
5599 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5600 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
5601 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5602 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]
5603 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]
5604 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
5605 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
5606 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]
5607 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5608 // CHECK13:       omp.body.continue:
5609 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5610 // CHECK13:       omp.inner.for.inc:
5611 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5612 // CHECK13-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
5613 // CHECK13-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
5614 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
5615 // CHECK13:       omp.inner.for.end:
5616 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5617 // CHECK13:       omp.dispatch.inc:
5618 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
5619 // CHECK13:       omp.dispatch.end:
5620 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5621 // CHECK13:       omp.precond.end:
5622 // CHECK13-NEXT:    ret void
5623 //
5624 //
5625 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
5626 // CHECK13-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
5627 // CHECK13-NEXT:  entry:
5628 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
5629 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
5630 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5631 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5632 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
5633 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5634 // CHECK13-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8
5635 // CHECK13-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
5636 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5637 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5638 // CHECK13-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5639 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5640 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 4
5641 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
5642 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
5643 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
5644 // CHECK13-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5645 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]])
5646 // CHECK13-NEXT:    ret void
5647 //
5648 //
5649 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined
5650 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
5651 // CHECK13-NEXT:  entry:
5652 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5653 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5654 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
5655 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5656 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5657 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5658 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5659 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5660 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5661 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5662 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5663 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
5664 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
5665 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5666 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5667 // CHECK13-NEXT:    [[I4:%.*]] = alloca i32, align 4
5668 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
5669 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5670 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5671 // CHECK13-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
5672 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5673 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5674 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5675 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
5676 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5677 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5678 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
5679 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5680 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5681 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5682 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5683 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5684 // CHECK13-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
5685 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5686 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5687 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5688 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5689 // CHECK13:       omp.precond.then:
5690 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
5691 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5692 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
5693 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5694 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5695 // CHECK13-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5696 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
5697 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
5698 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5699 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5700 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
5701 // CHECK13-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
5702 // CHECK13:       cond.true:
5703 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5704 // CHECK13-NEXT:    br label [[COND_END:%.*]]
5705 // CHECK13:       cond.false:
5706 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5707 // CHECK13-NEXT:    br label [[COND_END]]
5708 // CHECK13:       cond.end:
5709 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
5710 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
5711 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5712 // CHECK13-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
5713 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5714 // CHECK13:       omp.inner.for.cond:
5715 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5716 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5717 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
5718 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5719 // CHECK13:       omp.inner.for.body:
5720 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
5721 // CHECK13-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
5722 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
5723 // CHECK13-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
5724 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
5725 // CHECK13-NEXT:    store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
5726 // CHECK13-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
5727 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]], i64 [[TMP21]])
5728 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5729 // CHECK13:       omp.inner.for.inc:
5730 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
5731 // CHECK13-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
5732 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
5733 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
5734 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
5735 // CHECK13:       omp.inner.for.end:
5736 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
5737 // CHECK13:       omp.loop.exit:
5738 // CHECK13-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5739 // CHECK13-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
5740 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP25]])
5741 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5742 // CHECK13:       omp.precond.end:
5743 // CHECK13-NEXT:    ret void
5744 //
5745 //
5746 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined
5747 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
5748 // CHECK13-NEXT:  entry:
5749 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
5750 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
5751 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
5752 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
5753 // CHECK13-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
5754 // CHECK13-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
5755 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
5756 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
5757 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
5758 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5759 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
5760 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
5761 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
5762 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
5763 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
5764 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
5765 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
5766 // CHECK13-NEXT:    [[I5:%.*]] = alloca i32, align 4
5767 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
5768 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
5769 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5770 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5771 // CHECK13-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
5772 // CHECK13-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
5773 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
5774 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
5775 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
5776 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
5777 // CHECK13-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
5778 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
5779 // CHECK13-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
5780 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5781 // CHECK13-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
5782 // CHECK13-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
5783 // CHECK13-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
5784 // CHECK13-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
5785 // CHECK13-NEXT:    store i32 0, ptr [[I]], align 4
5786 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
5787 // CHECK13-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
5788 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
5789 // CHECK13:       omp.precond.then:
5790 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
5791 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
5792 // CHECK13-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
5793 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
5794 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
5795 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
5796 // CHECK13-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
5797 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
5798 // CHECK13-NEXT:    store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4
5799 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
5800 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
5801 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
5802 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5803 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
5804 // CHECK13-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5805 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
5806 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
5807 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
5808 // CHECK13:       omp.dispatch.cond:
5809 // CHECK13-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
5810 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
5811 // CHECK13-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
5812 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
5813 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
5814 // CHECK13:       omp.dispatch.body:
5815 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
5816 // CHECK13-NEXT:    store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4
5817 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
5818 // CHECK13:       omp.inner.for.cond:
5819 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
5820 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
5821 // CHECK13-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
5822 // CHECK13-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
5823 // CHECK13:       omp.inner.for.body:
5824 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
5825 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
5826 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
5827 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]
5828 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]
5829 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
5830 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
5831 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]
5832 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
5833 // CHECK13:       omp.body.continue:
5834 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
5835 // CHECK13:       omp.inner.for.inc:
5836 // CHECK13-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
5837 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP22]], 1
5838 // CHECK13-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
5839 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
5840 // CHECK13:       omp.inner.for.end:
5841 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
5842 // CHECK13:       omp.dispatch.inc:
5843 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
5844 // CHECK13:       omp.dispatch.end:
5845 // CHECK13-NEXT:    br label [[OMP_PRECOND_END]]
5846 // CHECK13:       omp.precond.end:
5847 // CHECK13-NEXT:    ret void
5848 //
5849 //
5850 // CHECK13-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
5851 // CHECK13-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
5852 // CHECK13-NEXT:  entry:
5853 // CHECK13-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
5854 // CHECK13-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
5855 // CHECK13-NEXT:    [[M:%.*]] = alloca i32, align 4
5856 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
5857 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
5858 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
5859 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
5860 // CHECK13-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
5861 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8
5862 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8
5863 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8
5864 // CHECK13-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
5865 // CHECK13-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5866 // CHECK13-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
5867 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 8
5868 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 8
5869 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 8
5870 // CHECK13-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
5871 // CHECK13-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5872 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 8
5873 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 8
5874 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 8
5875 // CHECK13-NEXT:    [[_TMP18:%.*]] = alloca i32, align 4
5876 // CHECK13-NEXT:    [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5877 // CHECK13-NEXT:    [[M_CASTED22:%.*]] = alloca i64, align 8
5878 // CHECK13-NEXT:    [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [2 x ptr], align 8
5879 // CHECK13-NEXT:    [[DOTOFFLOAD_PTRS24:%.*]] = alloca [2 x ptr], align 8
5880 // CHECK13-NEXT:    [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [2 x ptr], align 8
5881 // CHECK13-NEXT:    [[_TMP26:%.*]] = alloca i32, align 4
5882 // CHECK13-NEXT:    [[KERNEL_ARGS27:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
5883 // CHECK13-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
5884 // CHECK13-NEXT:    store i32 10, ptr [[M]], align 4
5885 // CHECK13-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5886 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP0]], align 8
5887 // CHECK13-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5888 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
5889 // CHECK13-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
5890 // CHECK13-NEXT:    store ptr null, ptr [[TMP2]], align 8
5891 // CHECK13-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
5892 // CHECK13-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
5893 // CHECK13-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
5894 // CHECK13-NEXT:    store i32 2, ptr [[TMP5]], align 4
5895 // CHECK13-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
5896 // CHECK13-NEXT:    store i32 1, ptr [[TMP6]], align 4
5897 // CHECK13-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
5898 // CHECK13-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
5899 // CHECK13-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
5900 // CHECK13-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
5901 // CHECK13-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
5902 // CHECK13-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP9]], align 8
5903 // CHECK13-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
5904 // CHECK13-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP10]], align 8
5905 // CHECK13-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
5906 // CHECK13-NEXT:    store ptr null, ptr [[TMP11]], align 8
5907 // CHECK13-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
5908 // CHECK13-NEXT:    store ptr null, ptr [[TMP12]], align 8
5909 // CHECK13-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
5910 // CHECK13-NEXT:    store i64 10, ptr [[TMP13]], align 8
5911 // CHECK13-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
5912 // CHECK13-NEXT:    store i64 0, ptr [[TMP14]], align 8
5913 // CHECK13-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
5914 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
5915 // CHECK13-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
5916 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
5917 // CHECK13-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
5918 // CHECK13-NEXT:    store i32 0, ptr [[TMP17]], align 4
5919 // CHECK13-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS]])
5920 // CHECK13-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
5921 // CHECK13-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
5922 // CHECK13:       omp_offload.failed:
5923 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR4]]
5924 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT]]
5925 // CHECK13:       omp_offload.cont:
5926 // CHECK13-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5927 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP20]], align 8
5928 // CHECK13-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5929 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP21]], align 8
5930 // CHECK13-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
5931 // CHECK13-NEXT:    store ptr null, ptr [[TMP22]], align 8
5932 // CHECK13-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
5933 // CHECK13-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
5934 // CHECK13-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
5935 // CHECK13-NEXT:    store i32 2, ptr [[TMP25]], align 4
5936 // CHECK13-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
5937 // CHECK13-NEXT:    store i32 1, ptr [[TMP26]], align 4
5938 // CHECK13-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
5939 // CHECK13-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
5940 // CHECK13-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
5941 // CHECK13-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
5942 // CHECK13-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
5943 // CHECK13-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP29]], align 8
5944 // CHECK13-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
5945 // CHECK13-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP30]], align 8
5946 // CHECK13-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
5947 // CHECK13-NEXT:    store ptr null, ptr [[TMP31]], align 8
5948 // CHECK13-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
5949 // CHECK13-NEXT:    store ptr null, ptr [[TMP32]], align 8
5950 // CHECK13-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
5951 // CHECK13-NEXT:    store i64 10, ptr [[TMP33]], align 8
5952 // CHECK13-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
5953 // CHECK13-NEXT:    store i64 0, ptr [[TMP34]], align 8
5954 // CHECK13-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
5955 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
5956 // CHECK13-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
5957 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
5958 // CHECK13-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
5959 // CHECK13-NEXT:    store i32 0, ptr [[TMP37]], align 4
5960 // CHECK13-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, ptr [[KERNEL_ARGS5]])
5961 // CHECK13-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
5962 // CHECK13-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
5963 // CHECK13:       omp_offload.failed6:
5964 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121(ptr [[A]]) #[[ATTR4]]
5965 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
5966 // CHECK13:       omp_offload.cont7:
5967 // CHECK13-NEXT:    [[TMP40:%.*]] = load i32, ptr [[M]], align 4
5968 // CHECK13-NEXT:    store i32 [[TMP40]], ptr [[M_CASTED]], align 4
5969 // CHECK13-NEXT:    [[TMP41:%.*]] = load i64, ptr [[M_CASTED]], align 8
5970 // CHECK13-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
5971 // CHECK13-NEXT:    store i64 [[TMP41]], ptr [[TMP42]], align 8
5972 // CHECK13-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
5973 // CHECK13-NEXT:    store i64 [[TMP41]], ptr [[TMP43]], align 8
5974 // CHECK13-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
5975 // CHECK13-NEXT:    store ptr null, ptr [[TMP44]], align 8
5976 // CHECK13-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
5977 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP45]], align 8
5978 // CHECK13-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
5979 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP46]], align 8
5980 // CHECK13-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
5981 // CHECK13-NEXT:    store ptr null, ptr [[TMP47]], align 8
5982 // CHECK13-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
5983 // CHECK13-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
5984 // CHECK13-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
5985 // CHECK13-NEXT:    store i32 2, ptr [[TMP50]], align 4
5986 // CHECK13-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
5987 // CHECK13-NEXT:    store i32 2, ptr [[TMP51]], align 4
5988 // CHECK13-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
5989 // CHECK13-NEXT:    store ptr [[TMP48]], ptr [[TMP52]], align 8
5990 // CHECK13-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
5991 // CHECK13-NEXT:    store ptr [[TMP49]], ptr [[TMP53]], align 8
5992 // CHECK13-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
5993 // CHECK13-NEXT:    store ptr @.offload_sizes.13, ptr [[TMP54]], align 8
5994 // CHECK13-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
5995 // CHECK13-NEXT:    store ptr @.offload_maptypes.14, ptr [[TMP55]], align 8
5996 // CHECK13-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
5997 // CHECK13-NEXT:    store ptr null, ptr [[TMP56]], align 8
5998 // CHECK13-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
5999 // CHECK13-NEXT:    store ptr null, ptr [[TMP57]], align 8
6000 // CHECK13-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
6001 // CHECK13-NEXT:    store i64 10, ptr [[TMP58]], align 8
6002 // CHECK13-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
6003 // CHECK13-NEXT:    store i64 0, ptr [[TMP59]], align 8
6004 // CHECK13-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
6005 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP60]], align 4
6006 // CHECK13-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
6007 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4
6008 // CHECK13-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
6009 // CHECK13-NEXT:    store i32 0, ptr [[TMP62]], align 4
6010 // CHECK13-NEXT:    [[TMP63:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, ptr [[KERNEL_ARGS12]])
6011 // CHECK13-NEXT:    [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 0
6012 // CHECK13-NEXT:    br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
6013 // CHECK13:       omp_offload.failed13:
6014 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP41]], ptr [[A]]) #[[ATTR4]]
6015 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT14]]
6016 // CHECK13:       omp_offload.cont14:
6017 // CHECK13-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
6018 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP65]], align 8
6019 // CHECK13-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
6020 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP66]], align 8
6021 // CHECK13-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0
6022 // CHECK13-NEXT:    store ptr null, ptr [[TMP67]], align 8
6023 // CHECK13-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
6024 // CHECK13-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
6025 // CHECK13-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0
6026 // CHECK13-NEXT:    store i32 2, ptr [[TMP70]], align 4
6027 // CHECK13-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1
6028 // CHECK13-NEXT:    store i32 1, ptr [[TMP71]], align 4
6029 // CHECK13-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2
6030 // CHECK13-NEXT:    store ptr [[TMP68]], ptr [[TMP72]], align 8
6031 // CHECK13-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3
6032 // CHECK13-NEXT:    store ptr [[TMP69]], ptr [[TMP73]], align 8
6033 // CHECK13-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4
6034 // CHECK13-NEXT:    store ptr @.offload_sizes.15, ptr [[TMP74]], align 8
6035 // CHECK13-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5
6036 // CHECK13-NEXT:    store ptr @.offload_maptypes.16, ptr [[TMP75]], align 8
6037 // CHECK13-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6
6038 // CHECK13-NEXT:    store ptr null, ptr [[TMP76]], align 8
6039 // CHECK13-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7
6040 // CHECK13-NEXT:    store ptr null, ptr [[TMP77]], align 8
6041 // CHECK13-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8
6042 // CHECK13-NEXT:    store i64 10, ptr [[TMP78]], align 8
6043 // CHECK13-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9
6044 // CHECK13-NEXT:    store i64 0, ptr [[TMP79]], align 8
6045 // CHECK13-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10
6046 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP80]], align 4
6047 // CHECK13-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11
6048 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4
6049 // CHECK13-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12
6050 // CHECK13-NEXT:    store i32 0, ptr [[TMP82]], align 4
6051 // CHECK13-NEXT:    [[TMP83:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, ptr [[KERNEL_ARGS19]])
6052 // CHECK13-NEXT:    [[TMP84:%.*]] = icmp ne i32 [[TMP83]], 0
6053 // CHECK13-NEXT:    br i1 [[TMP84]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
6054 // CHECK13:       omp_offload.failed20:
6055 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131(ptr [[A]]) #[[ATTR4]]
6056 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT21]]
6057 // CHECK13:       omp_offload.cont21:
6058 // CHECK13-NEXT:    [[TMP85:%.*]] = load i32, ptr [[M]], align 4
6059 // CHECK13-NEXT:    store i32 [[TMP85]], ptr [[M_CASTED22]], align 4
6060 // CHECK13-NEXT:    [[TMP86:%.*]] = load i64, ptr [[M_CASTED22]], align 8
6061 // CHECK13-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
6062 // CHECK13-NEXT:    store i64 [[TMP86]], ptr [[TMP87]], align 8
6063 // CHECK13-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
6064 // CHECK13-NEXT:    store i64 [[TMP86]], ptr [[TMP88]], align 8
6065 // CHECK13-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 0
6066 // CHECK13-NEXT:    store ptr null, ptr [[TMP89]], align 8
6067 // CHECK13-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
6068 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP90]], align 8
6069 // CHECK13-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
6070 // CHECK13-NEXT:    store ptr [[A]], ptr [[TMP91]], align 8
6071 // CHECK13-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 1
6072 // CHECK13-NEXT:    store ptr null, ptr [[TMP92]], align 8
6073 // CHECK13-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
6074 // CHECK13-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
6075 // CHECK13-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 0
6076 // CHECK13-NEXT:    store i32 2, ptr [[TMP95]], align 4
6077 // CHECK13-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 1
6078 // CHECK13-NEXT:    store i32 2, ptr [[TMP96]], align 4
6079 // CHECK13-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 2
6080 // CHECK13-NEXT:    store ptr [[TMP93]], ptr [[TMP97]], align 8
6081 // CHECK13-NEXT:    [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 3
6082 // CHECK13-NEXT:    store ptr [[TMP94]], ptr [[TMP98]], align 8
6083 // CHECK13-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 4
6084 // CHECK13-NEXT:    store ptr @.offload_sizes.17, ptr [[TMP99]], align 8
6085 // CHECK13-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 5
6086 // CHECK13-NEXT:    store ptr @.offload_maptypes.18, ptr [[TMP100]], align 8
6087 // CHECK13-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 6
6088 // CHECK13-NEXT:    store ptr null, ptr [[TMP101]], align 8
6089 // CHECK13-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 7
6090 // CHECK13-NEXT:    store ptr null, ptr [[TMP102]], align 8
6091 // CHECK13-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 8
6092 // CHECK13-NEXT:    store i64 10, ptr [[TMP103]], align 8
6093 // CHECK13-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 9
6094 // CHECK13-NEXT:    store i64 0, ptr [[TMP104]], align 8
6095 // CHECK13-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 10
6096 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP105]], align 4
6097 // CHECK13-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 11
6098 // CHECK13-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP106]], align 4
6099 // CHECK13-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 12
6100 // CHECK13-NEXT:    store i32 0, ptr [[TMP107]], align 4
6101 // CHECK13-NEXT:    [[TMP108:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, ptr [[KERNEL_ARGS27]])
6102 // CHECK13-NEXT:    [[TMP109:%.*]] = icmp ne i32 [[TMP108]], 0
6103 // CHECK13-NEXT:    br i1 [[TMP109]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
6104 // CHECK13:       omp_offload.failed28:
6105 // CHECK13-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP86]], ptr [[A]]) #[[ATTR4]]
6106 // CHECK13-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
6107 // CHECK13:       omp_offload.cont29:
6108 // CHECK13-NEXT:    ret i32 0
6109 //
6110 //
6111 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
6112 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6113 // CHECK13-NEXT:  entry:
6114 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6115 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6116 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6117 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])
6118 // CHECK13-NEXT:    ret void
6119 //
6120 //
6121 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined
6122 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
6123 // CHECK13-NEXT:  entry:
6124 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6125 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6126 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6127 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6128 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6129 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6130 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6131 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6132 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6133 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6134 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6135 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6136 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6137 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6138 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6139 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6140 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6141 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6142 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6143 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
6144 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6145 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6146 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6147 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6148 // CHECK13:       cond.true:
6149 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6150 // CHECK13:       cond.false:
6151 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6152 // CHECK13-NEXT:    br label [[COND_END]]
6153 // CHECK13:       cond.end:
6154 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6155 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6156 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6157 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
6158 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6159 // CHECK13:       omp.inner.for.cond:
6160 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6161 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6162 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6163 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6164 // CHECK13:       omp.inner.for.body:
6165 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6166 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6167 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6168 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6169 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
6170 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6171 // CHECK13:       omp.inner.for.inc:
6172 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6173 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6174 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6175 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6176 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6177 // CHECK13:       omp.inner.for.end:
6178 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6179 // CHECK13:       omp.loop.exit:
6180 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
6181 // CHECK13-NEXT:    ret void
6182 //
6183 //
6184 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined
6185 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
6186 // CHECK13-NEXT:  entry:
6187 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6188 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6189 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6190 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6191 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6192 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6193 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6194 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6195 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6196 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6197 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6198 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6199 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6200 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6201 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6202 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6203 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6204 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6205 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6206 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6207 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6208 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6209 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6210 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6211 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6212 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6213 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6214 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6215 // CHECK13-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6216 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
6217 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6218 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6219 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
6220 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6221 // CHECK13:       cond.true:
6222 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6223 // CHECK13:       cond.false:
6224 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6225 // CHECK13-NEXT:    br label [[COND_END]]
6226 // CHECK13:       cond.end:
6227 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6228 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6229 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6230 // CHECK13-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6231 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6232 // CHECK13:       omp.inner.for.cond:
6233 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6234 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6235 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6236 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6237 // CHECK13:       omp.inner.for.body:
6238 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6239 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6240 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6241 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6242 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
6243 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6244 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
6245 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
6246 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6247 // CHECK13:       omp.body.continue:
6248 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6249 // CHECK13:       omp.inner.for.inc:
6250 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6251 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6252 // CHECK13-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6253 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6254 // CHECK13:       omp.inner.for.end:
6255 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6256 // CHECK13:       omp.loop.exit:
6257 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
6258 // CHECK13-NEXT:    ret void
6259 //
6260 //
6261 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
6262 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6263 // CHECK13-NEXT:  entry:
6264 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6265 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6266 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6267 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined, ptr [[TMP0]])
6268 // CHECK13-NEXT:    ret void
6269 //
6270 //
6271 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined
6272 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
6273 // CHECK13-NEXT:  entry:
6274 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6275 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6276 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6277 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6278 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6279 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6280 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6281 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6282 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6283 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6284 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6285 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6286 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6287 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6288 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6289 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6290 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6291 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6292 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6293 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
6294 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6295 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6296 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6297 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6298 // CHECK13:       cond.true:
6299 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6300 // CHECK13:       cond.false:
6301 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6302 // CHECK13-NEXT:    br label [[COND_END]]
6303 // CHECK13:       cond.end:
6304 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6305 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6306 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6307 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
6308 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6309 // CHECK13:       omp.inner.for.cond:
6310 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6311 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6312 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6313 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6314 // CHECK13:       omp.inner.for.body:
6315 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6316 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6317 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6318 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6319 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
6320 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6321 // CHECK13:       omp.inner.for.inc:
6322 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6323 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6324 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6325 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6326 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6327 // CHECK13:       omp.inner.for.end:
6328 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6329 // CHECK13:       omp.loop.exit:
6330 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
6331 // CHECK13-NEXT:    ret void
6332 //
6333 //
6334 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined
6335 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
6336 // CHECK13-NEXT:  entry:
6337 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6338 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6339 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6340 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6341 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6342 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6343 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6344 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6345 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6346 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6347 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6348 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6349 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6350 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6351 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6352 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6353 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6354 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6355 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6356 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6357 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6358 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6359 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6360 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6361 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6362 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6363 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6364 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6365 // CHECK13-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6366 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
6367 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6368 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6369 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
6370 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6371 // CHECK13:       cond.true:
6372 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6373 // CHECK13:       cond.false:
6374 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6375 // CHECK13-NEXT:    br label [[COND_END]]
6376 // CHECK13:       cond.end:
6377 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
6378 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6379 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6380 // CHECK13-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
6381 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6382 // CHECK13:       omp.inner.for.cond:
6383 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6384 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6385 // CHECK13-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
6386 // CHECK13-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6387 // CHECK13:       omp.inner.for.body:
6388 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6389 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
6390 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6391 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6392 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
6393 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
6394 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
6395 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
6396 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6397 // CHECK13:       omp.body.continue:
6398 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6399 // CHECK13:       omp.inner.for.inc:
6400 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6401 // CHECK13-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
6402 // CHECK13-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
6403 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6404 // CHECK13:       omp.inner.for.end:
6405 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6406 // CHECK13:       omp.loop.exit:
6407 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
6408 // CHECK13-NEXT:    ret void
6409 //
6410 //
6411 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
6412 // CHECK13-SAME: (i64 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6413 // CHECK13-NEXT:  entry:
6414 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
6415 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6416 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6417 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6418 // CHECK13-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8
6419 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6420 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6421 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 4
6422 // CHECK13-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
6423 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
6424 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
6425 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
6426 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined, ptr [[TMP0]], i64 [[TMP3]])
6427 // CHECK13-NEXT:    ret void
6428 //
6429 //
6430 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined
6431 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
6432 // CHECK13-NEXT:  entry:
6433 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6434 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6435 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6436 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6437 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6438 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6439 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6440 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6441 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6442 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6443 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6444 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6445 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6446 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6447 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6448 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6449 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6450 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6451 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6452 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6453 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6454 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6455 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
6456 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6457 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6458 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6459 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6460 // CHECK13:       cond.true:
6461 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6462 // CHECK13:       cond.false:
6463 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6464 // CHECK13-NEXT:    br label [[COND_END]]
6465 // CHECK13:       cond.end:
6466 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6467 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6468 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6469 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
6470 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6471 // CHECK13:       omp.inner.for.cond:
6472 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6473 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6474 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6475 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6476 // CHECK13:       omp.inner.for.body:
6477 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6478 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6479 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6480 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6481 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
6482 // CHECK13-NEXT:    store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
6483 // CHECK13-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
6484 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])
6485 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6486 // CHECK13:       omp.inner.for.inc:
6487 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6488 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6489 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6490 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6491 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6492 // CHECK13:       omp.inner.for.end:
6493 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6494 // CHECK13:       omp.loop.exit:
6495 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
6496 // CHECK13-NEXT:    ret void
6497 //
6498 //
6499 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined
6500 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
6501 // CHECK13-NEXT:  entry:
6502 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6503 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6504 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6505 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6506 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6507 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6508 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6509 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6510 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6511 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6512 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6513 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6514 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6515 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6516 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6517 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6518 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6519 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6520 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6521 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6522 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6523 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6524 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6525 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6526 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6527 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6528 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6529 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6530 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6531 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6532 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
6533 // CHECK13-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6534 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
6535 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
6536 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6537 // CHECK13:       omp.dispatch.cond:
6538 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6539 // CHECK13-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6540 // CHECK13-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP7]] to i32
6541 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV2]]
6542 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6543 // CHECK13:       cond.true:
6544 // CHECK13-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6545 // CHECK13-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
6546 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6547 // CHECK13:       cond.false:
6548 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6549 // CHECK13-NEXT:    br label [[COND_END]]
6550 // CHECK13:       cond.end:
6551 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
6552 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
6553 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6554 // CHECK13-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
6555 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6556 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6557 // CHECK13-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
6558 // CHECK13-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6559 // CHECK13:       omp.dispatch.body:
6560 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6561 // CHECK13:       omp.inner.for.cond:
6562 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6563 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6564 // CHECK13-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
6565 // CHECK13-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6566 // CHECK13:       omp.inner.for.body:
6567 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6568 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
6569 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6570 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
6571 // CHECK13-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
6572 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
6573 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
6574 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
6575 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6576 // CHECK13:       omp.body.continue:
6577 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6578 // CHECK13:       omp.inner.for.inc:
6579 // CHECK13-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6580 // CHECK13-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
6581 // CHECK13-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
6582 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6583 // CHECK13:       omp.inner.for.end:
6584 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6585 // CHECK13:       omp.dispatch.inc:
6586 // CHECK13-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6587 // CHECK13-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6588 // CHECK13-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
6589 // CHECK13-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4
6590 // CHECK13-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6591 // CHECK13-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6592 // CHECK13-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
6593 // CHECK13-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4
6594 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
6595 // CHECK13:       omp.dispatch.end:
6596 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
6597 // CHECK13-NEXT:    ret void
6598 //
6599 //
6600 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
6601 // CHECK13-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6602 // CHECK13-NEXT:  entry:
6603 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6604 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6605 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6606 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined, ptr [[TMP0]])
6607 // CHECK13-NEXT:    ret void
6608 //
6609 //
6610 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined
6611 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
6612 // CHECK13-NEXT:  entry:
6613 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6614 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6615 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6616 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6617 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6618 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6619 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6620 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6621 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6622 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6623 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6624 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6625 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6626 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6627 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6628 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6629 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6630 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6631 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6632 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
6633 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6634 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6635 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6636 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6637 // CHECK13:       cond.true:
6638 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6639 // CHECK13:       cond.false:
6640 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6641 // CHECK13-NEXT:    br label [[COND_END]]
6642 // CHECK13:       cond.end:
6643 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6644 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6645 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6646 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
6647 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6648 // CHECK13:       omp.inner.for.cond:
6649 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6650 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6651 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6652 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6653 // CHECK13:       omp.inner.for.body:
6654 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6655 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6656 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6657 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6658 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
6659 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6660 // CHECK13:       omp.inner.for.inc:
6661 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6662 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6663 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
6664 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6665 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6666 // CHECK13:       omp.inner.for.end:
6667 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6668 // CHECK13:       omp.loop.exit:
6669 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
6670 // CHECK13-NEXT:    ret void
6671 //
6672 //
6673 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined
6674 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
6675 // CHECK13-NEXT:  entry:
6676 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6677 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6678 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6679 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6680 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6681 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6682 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6683 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6684 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6685 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6686 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6687 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6688 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6689 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6690 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6691 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6692 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6693 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6694 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6695 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6696 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6697 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6698 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6699 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6700 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6701 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6702 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6703 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6704 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6705 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6706 // CHECK13-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6707 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
6708 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
6709 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6710 // CHECK13:       omp.dispatch.cond:
6711 // CHECK13-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
6712 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
6713 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6714 // CHECK13:       omp.dispatch.body:
6715 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6716 // CHECK13-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
6717 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6718 // CHECK13:       omp.inner.for.cond:
6719 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
6720 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
6721 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
6722 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6723 // CHECK13:       omp.inner.for.body:
6724 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
6725 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
6726 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6727 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
6728 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
6729 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
6730 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
6731 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]
6732 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6733 // CHECK13:       omp.body.continue:
6734 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6735 // CHECK13:       omp.inner.for.inc:
6736 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
6737 // CHECK13-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
6738 // CHECK13-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
6739 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
6740 // CHECK13:       omp.inner.for.end:
6741 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6742 // CHECK13:       omp.dispatch.inc:
6743 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
6744 // CHECK13:       omp.dispatch.end:
6745 // CHECK13-NEXT:    ret void
6746 //
6747 //
6748 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
6749 // CHECK13-SAME: (i64 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
6750 // CHECK13-NEXT:  entry:
6751 // CHECK13-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
6752 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6753 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6754 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6755 // CHECK13-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8
6756 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6757 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6758 // CHECK13-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 4
6759 // CHECK13-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
6760 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
6761 // CHECK13-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
6762 // CHECK13-NEXT:    [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
6763 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined, ptr [[TMP0]], i64 [[TMP3]])
6764 // CHECK13-NEXT:    ret void
6765 //
6766 //
6767 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined
6768 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
6769 // CHECK13-NEXT:  entry:
6770 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6771 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6772 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6773 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6774 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6775 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6776 // CHECK13-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
6777 // CHECK13-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
6778 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6779 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6780 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6781 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
6782 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6783 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6784 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6785 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6786 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6787 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
6788 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
6789 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6790 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6791 // CHECK13-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6792 // CHECK13-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
6793 // CHECK13-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
6794 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6795 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
6796 // CHECK13-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
6797 // CHECK13:       cond.true:
6798 // CHECK13-NEXT:    br label [[COND_END:%.*]]
6799 // CHECK13:       cond.false:
6800 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6801 // CHECK13-NEXT:    br label [[COND_END]]
6802 // CHECK13:       cond.end:
6803 // CHECK13-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
6804 // CHECK13-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
6805 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6806 // CHECK13-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
6807 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6808 // CHECK13:       omp.inner.for.cond:
6809 // CHECK13-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6810 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6811 // CHECK13-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
6812 // CHECK13-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6813 // CHECK13:       omp.inner.for.body:
6814 // CHECK13-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
6815 // CHECK13-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
6816 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
6817 // CHECK13-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
6818 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
6819 // CHECK13-NEXT:    store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
6820 // CHECK13-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
6821 // CHECK13-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])
6822 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6823 // CHECK13:       omp.inner.for.inc:
6824 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
6825 // CHECK13-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
6826 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
6827 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
6828 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]]
6829 // CHECK13:       omp.inner.for.end:
6830 // CHECK13-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
6831 // CHECK13:       omp.loop.exit:
6832 // CHECK13-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
6833 // CHECK13-NEXT:    ret void
6834 //
6835 //
6836 // CHECK13-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined
6837 // CHECK13-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
6838 // CHECK13-NEXT:  entry:
6839 // CHECK13-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
6840 // CHECK13-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
6841 // CHECK13-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
6842 // CHECK13-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
6843 // CHECK13-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
6844 // CHECK13-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
6845 // CHECK13-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
6846 // CHECK13-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6847 // CHECK13-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
6848 // CHECK13-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
6849 // CHECK13-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
6850 // CHECK13-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
6851 // CHECK13-NEXT:    [[I:%.*]] = alloca i32, align 4
6852 // CHECK13-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
6853 // CHECK13-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
6854 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6855 // CHECK13-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6856 // CHECK13-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
6857 // CHECK13-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
6858 // CHECK13-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
6859 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
6860 // CHECK13-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
6861 // CHECK13-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
6862 // CHECK13-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
6863 // CHECK13-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
6864 // CHECK13-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
6865 // CHECK13-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
6866 // CHECK13-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
6867 // CHECK13-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
6868 // CHECK13-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
6869 // CHECK13-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
6870 // CHECK13-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6871 // CHECK13-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
6872 // CHECK13-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
6873 // CHECK13-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
6874 // CHECK13-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
6875 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
6876 // CHECK13:       omp.dispatch.cond:
6877 // CHECK13-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
6878 // CHECK13-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
6879 // CHECK13-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
6880 // CHECK13:       omp.dispatch.body:
6881 // CHECK13-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
6882 // CHECK13-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
6883 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
6884 // CHECK13:       omp.inner.for.cond:
6885 // CHECK13-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
6886 // CHECK13-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
6887 // CHECK13-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
6888 // CHECK13-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
6889 // CHECK13:       omp.inner.for.body:
6890 // CHECK13-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
6891 // CHECK13-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
6892 // CHECK13-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
6893 // CHECK13-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
6894 // CHECK13-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
6895 // CHECK13-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
6896 // CHECK13-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
6897 // CHECK13-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]]
6898 // CHECK13-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
6899 // CHECK13:       omp.body.continue:
6900 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
6901 // CHECK13:       omp.inner.for.inc:
6902 // CHECK13-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
6903 // CHECK13-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1
6904 // CHECK13-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
6905 // CHECK13-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
6906 // CHECK13:       omp.inner.for.end:
6907 // CHECK13-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
6908 // CHECK13:       omp.dispatch.inc:
6909 // CHECK13-NEXT:    br label [[OMP_DISPATCH_COND]]
6910 // CHECK13:       omp.dispatch.end:
6911 // CHECK13-NEXT:    ret void
6912 //
6913 //
6914 // CHECK13-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
6915 // CHECK13-SAME: () #[[ATTR7:[0-9]+]] {
6916 // CHECK13-NEXT:  entry:
6917 // CHECK13-NEXT:    call void @__tgt_register_requires(i64 1)
6918 // CHECK13-NEXT:    ret void
6919 //
6920 //
6921 // CHECK15-LABEL: define {{[^@]+}}@main
6922 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
6923 // CHECK15-NEXT:  entry:
6924 // CHECK15-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
6925 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
6926 // CHECK15-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 4
6927 // CHECK15-NEXT:    [[N:%.*]] = alloca i32, align 4
6928 // CHECK15-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 4
6929 // CHECK15-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
6930 // CHECK15-NEXT:    [[M:%.*]] = alloca i32, align 4
6931 // CHECK15-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
6932 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4
6933 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4
6934 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4
6935 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
6936 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
6937 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
6938 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
6939 // CHECK15-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
6940 // CHECK15-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
6941 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4
6942 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4
6943 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4
6944 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
6945 // CHECK15-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
6946 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
6947 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
6948 // CHECK15-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6949 // CHECK15-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
6950 // CHECK15-NEXT:    [[N_CASTED18:%.*]] = alloca i32, align 4
6951 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x ptr], align 4
6952 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x ptr], align 4
6953 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x ptr], align 4
6954 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
6955 // CHECK15-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
6956 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
6957 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
6958 // CHECK15-NEXT:    [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6959 // CHECK15-NEXT:    [[N_CASTED33:%.*]] = alloca i32, align 4
6960 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [3 x ptr], align 4
6961 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS35:%.*]] = alloca [3 x ptr], align 4
6962 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [3 x ptr], align 4
6963 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES37:%.*]] = alloca [3 x i64], align 4
6964 // CHECK15-NEXT:    [[_TMP38:%.*]] = alloca i32, align 4
6965 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
6966 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
6967 // CHECK15-NEXT:    [[KERNEL_ARGS45:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6968 // CHECK15-NEXT:    [[M_CASTED48:%.*]] = alloca i32, align 4
6969 // CHECK15-NEXT:    [[N_CASTED49:%.*]] = alloca i32, align 4
6970 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [4 x ptr], align 4
6971 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS51:%.*]] = alloca [4 x ptr], align 4
6972 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [4 x ptr], align 4
6973 // CHECK15-NEXT:    [[DOTOFFLOAD_SIZES53:%.*]] = alloca [4 x i64], align 4
6974 // CHECK15-NEXT:    [[_TMP54:%.*]] = alloca i32, align 4
6975 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4
6976 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_56:%.*]] = alloca i32, align 4
6977 // CHECK15-NEXT:    [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
6978 // CHECK15-NEXT:    store i32 0, ptr [[RETVAL]], align 4
6979 // CHECK15-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
6980 // CHECK15-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4
6981 // CHECK15-NEXT:    store i32 100, ptr [[N]], align 4
6982 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
6983 // CHECK15-NEXT:    [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()
6984 // CHECK15-NEXT:    store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4
6985 // CHECK15-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
6986 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4
6987 // CHECK15-NEXT:    store i32 10, ptr [[M]], align 4
6988 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N]], align 4
6989 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
6990 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
6991 // CHECK15-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
6992 // CHECK15-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
6993 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false)
6994 // CHECK15-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
6995 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[TMP6]], align 4
6996 // CHECK15-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
6997 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[TMP7]], align 4
6998 // CHECK15-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
6999 // CHECK15-NEXT:    store ptr null, ptr [[TMP8]], align 4
7000 // CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
7001 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP9]], align 4
7002 // CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
7003 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP10]], align 4
7004 // CHECK15-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
7005 // CHECK15-NEXT:    store ptr null, ptr [[TMP11]], align 4
7006 // CHECK15-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
7007 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 4
7008 // CHECK15-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
7009 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 4
7010 // CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
7011 // CHECK15-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 4
7012 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
7013 // CHECK15-NEXT:    store ptr null, ptr [[TMP15]], align 4
7014 // CHECK15-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
7015 // CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
7016 // CHECK15-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
7017 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 4
7018 // CHECK15-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
7019 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7020 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
7021 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7022 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7023 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7024 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7025 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
7026 // CHECK15-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i64
7027 // CHECK15-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
7028 // CHECK15-NEXT:    store i32 2, ptr [[TMP23]], align 4
7029 // CHECK15-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
7030 // CHECK15-NEXT:    store i32 3, ptr [[TMP24]], align 4
7031 // CHECK15-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
7032 // CHECK15-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 4
7033 // CHECK15-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
7034 // CHECK15-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 4
7035 // CHECK15-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
7036 // CHECK15-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 4
7037 // CHECK15-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
7038 // CHECK15-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 4
7039 // CHECK15-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
7040 // CHECK15-NEXT:    store ptr null, ptr [[TMP29]], align 4
7041 // CHECK15-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
7042 // CHECK15-NEXT:    store ptr null, ptr [[TMP30]], align 4
7043 // CHECK15-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
7044 // CHECK15-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 8
7045 // CHECK15-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
7046 // CHECK15-NEXT:    store i64 0, ptr [[TMP32]], align 8
7047 // CHECK15-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
7048 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
7049 // CHECK15-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
7050 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
7051 // CHECK15-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
7052 // CHECK15-NEXT:    store i32 0, ptr [[TMP35]], align 4
7053 // CHECK15-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, ptr [[KERNEL_ARGS]])
7054 // CHECK15-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
7055 // CHECK15-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
7056 // CHECK15:       omp_offload.failed:
7057 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR4:[0-9]+]]
7058 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT]]
7059 // CHECK15:       omp_offload.cont:
7060 // CHECK15-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 4
7061 // CHECK15-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
7062 // CHECK15-NEXT:    [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4
7063 // CHECK15-NEXT:    [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4
7064 // CHECK15-NEXT:    [[TMP41:%.*]] = sext i32 [[TMP40]] to i64
7065 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false)
7066 // CHECK15-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
7067 // CHECK15-NEXT:    store i32 [[TMP39]], ptr [[TMP42]], align 4
7068 // CHECK15-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
7069 // CHECK15-NEXT:    store i32 [[TMP39]], ptr [[TMP43]], align 4
7070 // CHECK15-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
7071 // CHECK15-NEXT:    store ptr null, ptr [[TMP44]], align 4
7072 // CHECK15-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
7073 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP45]], align 4
7074 // CHECK15-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
7075 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP46]], align 4
7076 // CHECK15-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
7077 // CHECK15-NEXT:    store ptr null, ptr [[TMP47]], align 4
7078 // CHECK15-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
7079 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 4
7080 // CHECK15-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
7081 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP49]], align 4
7082 // CHECK15-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
7083 // CHECK15-NEXT:    store i64 [[TMP41]], ptr [[TMP50]], align 4
7084 // CHECK15-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
7085 // CHECK15-NEXT:    store ptr null, ptr [[TMP51]], align 4
7086 // CHECK15-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
7087 // CHECK15-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
7088 // CHECK15-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
7089 // CHECK15-NEXT:    [[TMP55:%.*]] = load i32, ptr [[N]], align 4
7090 // CHECK15-NEXT:    store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4
7091 // CHECK15-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
7092 // CHECK15-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0
7093 // CHECK15-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
7094 // CHECK15-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
7095 // CHECK15-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
7096 // CHECK15-NEXT:    [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
7097 // CHECK15-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1
7098 // CHECK15-NEXT:    [[TMP58:%.*]] = zext i32 [[ADD14]] to i64
7099 // CHECK15-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
7100 // CHECK15-NEXT:    store i32 2, ptr [[TMP59]], align 4
7101 // CHECK15-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
7102 // CHECK15-NEXT:    store i32 3, ptr [[TMP60]], align 4
7103 // CHECK15-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
7104 // CHECK15-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 4
7105 // CHECK15-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
7106 // CHECK15-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 4
7107 // CHECK15-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
7108 // CHECK15-NEXT:    store ptr [[TMP54]], ptr [[TMP63]], align 4
7109 // CHECK15-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
7110 // CHECK15-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4
7111 // CHECK15-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
7112 // CHECK15-NEXT:    store ptr null, ptr [[TMP65]], align 4
7113 // CHECK15-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
7114 // CHECK15-NEXT:    store ptr null, ptr [[TMP66]], align 4
7115 // CHECK15-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
7116 // CHECK15-NEXT:    store i64 [[TMP58]], ptr [[TMP67]], align 8
7117 // CHECK15-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
7118 // CHECK15-NEXT:    store i64 0, ptr [[TMP68]], align 8
7119 // CHECK15-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
7120 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
7121 // CHECK15-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
7122 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP70]], align 4
7123 // CHECK15-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
7124 // CHECK15-NEXT:    store i32 0, ptr [[TMP71]], align 4
7125 // CHECK15-NEXT:    [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, ptr [[KERNEL_ARGS15]])
7126 // CHECK15-NEXT:    [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0
7127 // CHECK15-NEXT:    br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
7128 // CHECK15:       omp_offload.failed16:
7129 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR4]]
7130 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
7131 // CHECK15:       omp_offload.cont17:
7132 // CHECK15-NEXT:    [[TMP74:%.*]] = load i32, ptr [[M]], align 4
7133 // CHECK15-NEXT:    store i32 [[TMP74]], ptr [[M_CASTED]], align 4
7134 // CHECK15-NEXT:    [[TMP75:%.*]] = load i32, ptr [[M_CASTED]], align 4
7135 // CHECK15-NEXT:    [[TMP76:%.*]] = load i32, ptr [[N]], align 4
7136 // CHECK15-NEXT:    store i32 [[TMP76]], ptr [[N_CASTED18]], align 4
7137 // CHECK15-NEXT:    [[TMP77:%.*]] = load i32, ptr [[N_CASTED18]], align 4
7138 // CHECK15-NEXT:    [[TMP78:%.*]] = mul nuw i32 [[TMP0]], 4
7139 // CHECK15-NEXT:    [[TMP79:%.*]] = sext i32 [[TMP78]] to i64
7140 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES22]], ptr align 4 @.offload_sizes.3, i32 32, i1 false)
7141 // CHECK15-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
7142 // CHECK15-NEXT:    store i32 [[TMP75]], ptr [[TMP80]], align 4
7143 // CHECK15-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
7144 // CHECK15-NEXT:    store i32 [[TMP75]], ptr [[TMP81]], align 4
7145 // CHECK15-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
7146 // CHECK15-NEXT:    store ptr null, ptr [[TMP82]], align 4
7147 // CHECK15-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
7148 // CHECK15-NEXT:    store i32 [[TMP77]], ptr [[TMP83]], align 4
7149 // CHECK15-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
7150 // CHECK15-NEXT:    store i32 [[TMP77]], ptr [[TMP84]], align 4
7151 // CHECK15-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
7152 // CHECK15-NEXT:    store ptr null, ptr [[TMP85]], align 4
7153 // CHECK15-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
7154 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP86]], align 4
7155 // CHECK15-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
7156 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP87]], align 4
7157 // CHECK15-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
7158 // CHECK15-NEXT:    store ptr null, ptr [[TMP88]], align 4
7159 // CHECK15-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
7160 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP89]], align 4
7161 // CHECK15-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
7162 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP90]], align 4
7163 // CHECK15-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
7164 // CHECK15-NEXT:    store i64 [[TMP79]], ptr [[TMP91]], align 4
7165 // CHECK15-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
7166 // CHECK15-NEXT:    store ptr null, ptr [[TMP92]], align 4
7167 // CHECK15-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
7168 // CHECK15-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
7169 // CHECK15-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
7170 // CHECK15-NEXT:    [[TMP96:%.*]] = load i32, ptr [[N]], align 4
7171 // CHECK15-NEXT:    store i32 [[TMP96]], ptr [[DOTCAPTURE_EXPR_24]], align 4
7172 // CHECK15-NEXT:    [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 4
7173 // CHECK15-NEXT:    [[SUB26:%.*]] = sub nsw i32 [[TMP97]], 0
7174 // CHECK15-NEXT:    [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
7175 // CHECK15-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
7176 // CHECK15-NEXT:    store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 4
7177 // CHECK15-NEXT:    [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
7178 // CHECK15-NEXT:    [[ADD29:%.*]] = add nsw i32 [[TMP98]], 1
7179 // CHECK15-NEXT:    [[TMP99:%.*]] = zext i32 [[ADD29]] to i64
7180 // CHECK15-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 0
7181 // CHECK15-NEXT:    store i32 2, ptr [[TMP100]], align 4
7182 // CHECK15-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1
7183 // CHECK15-NEXT:    store i32 4, ptr [[TMP101]], align 4
7184 // CHECK15-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 2
7185 // CHECK15-NEXT:    store ptr [[TMP93]], ptr [[TMP102]], align 4
7186 // CHECK15-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 3
7187 // CHECK15-NEXT:    store ptr [[TMP94]], ptr [[TMP103]], align 4
7188 // CHECK15-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 4
7189 // CHECK15-NEXT:    store ptr [[TMP95]], ptr [[TMP104]], align 4
7190 // CHECK15-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 5
7191 // CHECK15-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP105]], align 4
7192 // CHECK15-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 6
7193 // CHECK15-NEXT:    store ptr null, ptr [[TMP106]], align 4
7194 // CHECK15-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 7
7195 // CHECK15-NEXT:    store ptr null, ptr [[TMP107]], align 4
7196 // CHECK15-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 8
7197 // CHECK15-NEXT:    store i64 [[TMP99]], ptr [[TMP108]], align 8
7198 // CHECK15-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 9
7199 // CHECK15-NEXT:    store i64 0, ptr [[TMP109]], align 8
7200 // CHECK15-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 10
7201 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP110]], align 4
7202 // CHECK15-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 11
7203 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4
7204 // CHECK15-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 12
7205 // CHECK15-NEXT:    store i32 0, ptr [[TMP112]], align 4
7206 // CHECK15-NEXT:    [[TMP113:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, ptr [[KERNEL_ARGS30]])
7207 // CHECK15-NEXT:    [[TMP114:%.*]] = icmp ne i32 [[TMP113]], 0
7208 // CHECK15-NEXT:    br i1 [[TMP114]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]
7209 // CHECK15:       omp_offload.failed31:
7210 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP75]], i32 [[TMP77]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR4]]
7211 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT32]]
7212 // CHECK15:       omp_offload.cont32:
7213 // CHECK15-NEXT:    [[TMP115:%.*]] = load i32, ptr [[N]], align 4
7214 // CHECK15-NEXT:    store i32 [[TMP115]], ptr [[N_CASTED33]], align 4
7215 // CHECK15-NEXT:    [[TMP116:%.*]] = load i32, ptr [[N_CASTED33]], align 4
7216 // CHECK15-NEXT:    [[TMP117:%.*]] = mul nuw i32 [[TMP0]], 4
7217 // CHECK15-NEXT:    [[TMP118:%.*]] = sext i32 [[TMP117]] to i64
7218 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES37]], ptr align 4 @.offload_sizes.5, i32 24, i1 false)
7219 // CHECK15-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
7220 // CHECK15-NEXT:    store i32 [[TMP116]], ptr [[TMP119]], align 4
7221 // CHECK15-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
7222 // CHECK15-NEXT:    store i32 [[TMP116]], ptr [[TMP120]], align 4
7223 // CHECK15-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 0
7224 // CHECK15-NEXT:    store ptr null, ptr [[TMP121]], align 4
7225 // CHECK15-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1
7226 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP122]], align 4
7227 // CHECK15-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 1
7228 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP123]], align 4
7229 // CHECK15-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 1
7230 // CHECK15-NEXT:    store ptr null, ptr [[TMP124]], align 4
7231 // CHECK15-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2
7232 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP125]], align 4
7233 // CHECK15-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 2
7234 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP126]], align 4
7235 // CHECK15-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 2
7236 // CHECK15-NEXT:    store i64 [[TMP118]], ptr [[TMP127]], align 4
7237 // CHECK15-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 2
7238 // CHECK15-NEXT:    store ptr null, ptr [[TMP128]], align 4
7239 // CHECK15-NEXT:    [[TMP129:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
7240 // CHECK15-NEXT:    [[TMP130:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
7241 // CHECK15-NEXT:    [[TMP131:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 0
7242 // CHECK15-NEXT:    [[TMP132:%.*]] = load i32, ptr [[N]], align 4
7243 // CHECK15-NEXT:    store i32 [[TMP132]], ptr [[DOTCAPTURE_EXPR_39]], align 4
7244 // CHECK15-NEXT:    [[TMP133:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_39]], align 4
7245 // CHECK15-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[TMP133]], 0
7246 // CHECK15-NEXT:    [[DIV42:%.*]] = sdiv i32 [[SUB41]], 1
7247 // CHECK15-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[DIV42]], 1
7248 // CHECK15-NEXT:    store i32 [[SUB43]], ptr [[DOTCAPTURE_EXPR_40]], align 4
7249 // CHECK15-NEXT:    [[TMP134:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
7250 // CHECK15-NEXT:    [[ADD44:%.*]] = add nsw i32 [[TMP134]], 1
7251 // CHECK15-NEXT:    [[TMP135:%.*]] = zext i32 [[ADD44]] to i64
7252 // CHECK15-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 0
7253 // CHECK15-NEXT:    store i32 2, ptr [[TMP136]], align 4
7254 // CHECK15-NEXT:    [[TMP137:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 1
7255 // CHECK15-NEXT:    store i32 3, ptr [[TMP137]], align 4
7256 // CHECK15-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 2
7257 // CHECK15-NEXT:    store ptr [[TMP129]], ptr [[TMP138]], align 4
7258 // CHECK15-NEXT:    [[TMP139:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 3
7259 // CHECK15-NEXT:    store ptr [[TMP130]], ptr [[TMP139]], align 4
7260 // CHECK15-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 4
7261 // CHECK15-NEXT:    store ptr [[TMP131]], ptr [[TMP140]], align 4
7262 // CHECK15-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 5
7263 // CHECK15-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP141]], align 4
7264 // CHECK15-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 6
7265 // CHECK15-NEXT:    store ptr null, ptr [[TMP142]], align 4
7266 // CHECK15-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 7
7267 // CHECK15-NEXT:    store ptr null, ptr [[TMP143]], align 4
7268 // CHECK15-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 8
7269 // CHECK15-NEXT:    store i64 [[TMP135]], ptr [[TMP144]], align 8
7270 // CHECK15-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 9
7271 // CHECK15-NEXT:    store i64 0, ptr [[TMP145]], align 8
7272 // CHECK15-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 10
7273 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP146]], align 4
7274 // CHECK15-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 11
7275 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP147]], align 4
7276 // CHECK15-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 12
7277 // CHECK15-NEXT:    store i32 0, ptr [[TMP148]], align 4
7278 // CHECK15-NEXT:    [[TMP149:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, ptr [[KERNEL_ARGS45]])
7279 // CHECK15-NEXT:    [[TMP150:%.*]] = icmp ne i32 [[TMP149]], 0
7280 // CHECK15-NEXT:    br i1 [[TMP150]], label [[OMP_OFFLOAD_FAILED46:%.*]], label [[OMP_OFFLOAD_CONT47:%.*]]
7281 // CHECK15:       omp_offload.failed46:
7282 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP116]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR4]]
7283 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT47]]
7284 // CHECK15:       omp_offload.cont47:
7285 // CHECK15-NEXT:    [[TMP151:%.*]] = load i32, ptr [[M]], align 4
7286 // CHECK15-NEXT:    store i32 [[TMP151]], ptr [[M_CASTED48]], align 4
7287 // CHECK15-NEXT:    [[TMP152:%.*]] = load i32, ptr [[M_CASTED48]], align 4
7288 // CHECK15-NEXT:    [[TMP153:%.*]] = load i32, ptr [[N]], align 4
7289 // CHECK15-NEXT:    store i32 [[TMP153]], ptr [[N_CASTED49]], align 4
7290 // CHECK15-NEXT:    [[TMP154:%.*]] = load i32, ptr [[N_CASTED49]], align 4
7291 // CHECK15-NEXT:    [[TMP155:%.*]] = mul nuw i32 [[TMP0]], 4
7292 // CHECK15-NEXT:    [[TMP156:%.*]] = sext i32 [[TMP155]] to i64
7293 // CHECK15-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES53]], ptr align 4 @.offload_sizes.7, i32 32, i1 false)
7294 // CHECK15-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
7295 // CHECK15-NEXT:    store i32 [[TMP152]], ptr [[TMP157]], align 4
7296 // CHECK15-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
7297 // CHECK15-NEXT:    store i32 [[TMP152]], ptr [[TMP158]], align 4
7298 // CHECK15-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 0
7299 // CHECK15-NEXT:    store ptr null, ptr [[TMP159]], align 4
7300 // CHECK15-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1
7301 // CHECK15-NEXT:    store i32 [[TMP154]], ptr [[TMP160]], align 4
7302 // CHECK15-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 1
7303 // CHECK15-NEXT:    store i32 [[TMP154]], ptr [[TMP161]], align 4
7304 // CHECK15-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 1
7305 // CHECK15-NEXT:    store ptr null, ptr [[TMP162]], align 4
7306 // CHECK15-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2
7307 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP163]], align 4
7308 // CHECK15-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 2
7309 // CHECK15-NEXT:    store i32 [[TMP0]], ptr [[TMP164]], align 4
7310 // CHECK15-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 2
7311 // CHECK15-NEXT:    store ptr null, ptr [[TMP165]], align 4
7312 // CHECK15-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3
7313 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP166]], align 4
7314 // CHECK15-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 3
7315 // CHECK15-NEXT:    store ptr [[VLA]], ptr [[TMP167]], align 4
7316 // CHECK15-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 3
7317 // CHECK15-NEXT:    store i64 [[TMP156]], ptr [[TMP168]], align 4
7318 // CHECK15-NEXT:    [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 3
7319 // CHECK15-NEXT:    store ptr null, ptr [[TMP169]], align 4
7320 // CHECK15-NEXT:    [[TMP170:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
7321 // CHECK15-NEXT:    [[TMP171:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
7322 // CHECK15-NEXT:    [[TMP172:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 0
7323 // CHECK15-NEXT:    [[TMP173:%.*]] = load i32, ptr [[N]], align 4
7324 // CHECK15-NEXT:    store i32 [[TMP173]], ptr [[DOTCAPTURE_EXPR_55]], align 4
7325 // CHECK15-NEXT:    [[TMP174:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_55]], align 4
7326 // CHECK15-NEXT:    [[SUB57:%.*]] = sub nsw i32 [[TMP174]], 0
7327 // CHECK15-NEXT:    [[DIV58:%.*]] = sdiv i32 [[SUB57]], 1
7328 // CHECK15-NEXT:    [[SUB59:%.*]] = sub nsw i32 [[DIV58]], 1
7329 // CHECK15-NEXT:    store i32 [[SUB59]], ptr [[DOTCAPTURE_EXPR_56]], align 4
7330 // CHECK15-NEXT:    [[TMP175:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_56]], align 4
7331 // CHECK15-NEXT:    [[ADD60:%.*]] = add nsw i32 [[TMP175]], 1
7332 // CHECK15-NEXT:    [[TMP176:%.*]] = zext i32 [[ADD60]] to i64
7333 // CHECK15-NEXT:    [[TMP177:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 0
7334 // CHECK15-NEXT:    store i32 2, ptr [[TMP177]], align 4
7335 // CHECK15-NEXT:    [[TMP178:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1
7336 // CHECK15-NEXT:    store i32 4, ptr [[TMP178]], align 4
7337 // CHECK15-NEXT:    [[TMP179:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 2
7338 // CHECK15-NEXT:    store ptr [[TMP170]], ptr [[TMP179]], align 4
7339 // CHECK15-NEXT:    [[TMP180:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 3
7340 // CHECK15-NEXT:    store ptr [[TMP171]], ptr [[TMP180]], align 4
7341 // CHECK15-NEXT:    [[TMP181:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 4
7342 // CHECK15-NEXT:    store ptr [[TMP172]], ptr [[TMP181]], align 4
7343 // CHECK15-NEXT:    [[TMP182:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 5
7344 // CHECK15-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP182]], align 4
7345 // CHECK15-NEXT:    [[TMP183:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 6
7346 // CHECK15-NEXT:    store ptr null, ptr [[TMP183]], align 4
7347 // CHECK15-NEXT:    [[TMP184:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 7
7348 // CHECK15-NEXT:    store ptr null, ptr [[TMP184]], align 4
7349 // CHECK15-NEXT:    [[TMP185:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 8
7350 // CHECK15-NEXT:    store i64 [[TMP176]], ptr [[TMP185]], align 8
7351 // CHECK15-NEXT:    [[TMP186:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 9
7352 // CHECK15-NEXT:    store i64 0, ptr [[TMP186]], align 8
7353 // CHECK15-NEXT:    [[TMP187:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 10
7354 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP187]], align 4
7355 // CHECK15-NEXT:    [[TMP188:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 11
7356 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP188]], align 4
7357 // CHECK15-NEXT:    [[TMP189:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 12
7358 // CHECK15-NEXT:    store i32 0, ptr [[TMP189]], align 4
7359 // CHECK15-NEXT:    [[TMP190:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, ptr [[KERNEL_ARGS61]])
7360 // CHECK15-NEXT:    [[TMP191:%.*]] = icmp ne i32 [[TMP190]], 0
7361 // CHECK15-NEXT:    br i1 [[TMP191]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]
7362 // CHECK15:       omp_offload.failed62:
7363 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP152]], i32 [[TMP154]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR4]]
7364 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT63]]
7365 // CHECK15:       omp_offload.cont63:
7366 // CHECK15-NEXT:    [[TMP192:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
7367 // CHECK15-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP192]])
7368 // CHECK15-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
7369 // CHECK15-NEXT:    [[TMP193:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4
7370 // CHECK15-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP193]])
7371 // CHECK15-NEXT:    [[TMP194:%.*]] = load i32, ptr [[RETVAL]], align 4
7372 // CHECK15-NEXT:    ret i32 [[TMP194]]
7373 //
7374 //
7375 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
7376 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
7377 // CHECK15-NEXT:  entry:
7378 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7379 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7380 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7381 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7382 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7383 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7384 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7385 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7386 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])
7387 // CHECK15-NEXT:    ret void
7388 //
7389 //
7390 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined
7391 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
7392 // CHECK15-NEXT:  entry:
7393 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7394 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7395 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
7396 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7397 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7398 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7399 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7400 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7401 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7402 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7403 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7404 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7405 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7406 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7407 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
7408 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7409 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7410 // CHECK15-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
7411 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7412 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7413 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
7414 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7415 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7416 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
7417 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
7418 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7419 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7420 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7421 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7422 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7423 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7424 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7425 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7426 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7427 // CHECK15:       omp.precond.then:
7428 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7429 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7430 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
7431 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7432 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7433 // CHECK15-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7434 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
7435 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7436 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7437 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7438 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7439 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7440 // CHECK15:       cond.true:
7441 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7442 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7443 // CHECK15:       cond.false:
7444 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7445 // CHECK15-NEXT:    br label [[COND_END]]
7446 // CHECK15:       cond.end:
7447 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7448 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7449 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7450 // CHECK15-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
7451 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7452 // CHECK15:       omp.inner.for.cond:
7453 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7454 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7455 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
7456 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7457 // CHECK15:       omp.inner.for.body:
7458 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7459 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7460 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])
7461 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7462 // CHECK15:       omp.inner.for.inc:
7463 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7464 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7465 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
7466 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
7467 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
7468 // CHECK15:       omp.inner.for.end:
7469 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7470 // CHECK15:       omp.loop.exit:
7471 // CHECK15-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7472 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
7473 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
7474 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
7475 // CHECK15:       omp.precond.end:
7476 // CHECK15-NEXT:    ret void
7477 //
7478 //
7479 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined
7480 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
7481 // CHECK15-NEXT:  entry:
7482 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7483 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7484 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7485 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7486 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
7487 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7488 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7489 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7490 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7491 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7492 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7493 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7494 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7495 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7496 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7497 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7498 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
7499 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7500 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7501 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7502 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7503 // CHECK15-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
7504 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7505 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7506 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
7507 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7508 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7509 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
7510 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
7511 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7512 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7513 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7514 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7515 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7516 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7517 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7518 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7519 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7520 // CHECK15:       omp.precond.then:
7521 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7522 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7523 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
7524 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7525 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7526 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
7527 // CHECK15-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
7528 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7529 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7530 // CHECK15-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7531 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
7532 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7533 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7534 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7535 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
7536 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7537 // CHECK15:       cond.true:
7538 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7539 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7540 // CHECK15:       cond.false:
7541 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7542 // CHECK15-NEXT:    br label [[COND_END]]
7543 // CHECK15:       cond.end:
7544 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
7545 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7546 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7547 // CHECK15-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
7548 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7549 // CHECK15:       omp.inner.for.cond:
7550 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7551 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7552 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
7553 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7554 // CHECK15:       omp.inner.for.body:
7555 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7556 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
7557 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7558 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
7559 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I3]], align 4
7560 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]
7561 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
7562 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7563 // CHECK15:       omp.body.continue:
7564 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7565 // CHECK15:       omp.inner.for.inc:
7566 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7567 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
7568 // CHECK15-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
7569 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
7570 // CHECK15:       omp.inner.for.end:
7571 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7572 // CHECK15:       omp.loop.exit:
7573 // CHECK15-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7574 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
7575 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
7576 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
7577 // CHECK15:       omp.precond.end:
7578 // CHECK15-NEXT:    ret void
7579 //
7580 //
7581 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
7582 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7583 // CHECK15-NEXT:  entry:
7584 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7585 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7586 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7587 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7588 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7589 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7590 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7591 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7592 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])
7593 // CHECK15-NEXT:    ret void
7594 //
7595 //
7596 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined
7597 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
7598 // CHECK15-NEXT:  entry:
7599 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7600 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7601 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
7602 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7603 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7604 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7605 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7606 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7607 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7608 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7609 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7610 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7611 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7612 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7613 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
7614 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7615 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7616 // CHECK15-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
7617 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7618 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7619 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
7620 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7621 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7622 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
7623 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
7624 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7625 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7626 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7627 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7628 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7629 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7630 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7631 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7632 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7633 // CHECK15:       omp.precond.then:
7634 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7635 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7636 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
7637 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7638 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7639 // CHECK15-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7640 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
7641 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7642 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7643 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7644 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
7645 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7646 // CHECK15:       cond.true:
7647 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7648 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7649 // CHECK15:       cond.false:
7650 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7651 // CHECK15-NEXT:    br label [[COND_END]]
7652 // CHECK15:       cond.end:
7653 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
7654 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7655 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7656 // CHECK15-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
7657 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7658 // CHECK15:       omp.inner.for.cond:
7659 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7660 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7661 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
7662 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7663 // CHECK15:       omp.inner.for.body:
7664 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7665 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7666 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])
7667 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7668 // CHECK15:       omp.inner.for.inc:
7669 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7670 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7671 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
7672 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
7673 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
7674 // CHECK15:       omp.inner.for.end:
7675 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7676 // CHECK15:       omp.loop.exit:
7677 // CHECK15-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7678 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
7679 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
7680 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
7681 // CHECK15:       omp.precond.end:
7682 // CHECK15-NEXT:    ret void
7683 //
7684 //
7685 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined
7686 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
7687 // CHECK15-NEXT:  entry:
7688 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7689 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7690 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7691 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7692 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
7693 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7694 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7695 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7696 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7697 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7698 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7699 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7700 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7701 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7702 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7703 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7704 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
7705 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7706 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7707 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7708 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7709 // CHECK15-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
7710 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7711 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7712 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
7713 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7714 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7715 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
7716 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
7717 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7718 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7719 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7720 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
7721 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7722 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7723 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7724 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7725 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7726 // CHECK15:       omp.precond.then:
7727 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7728 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7729 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
7730 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7731 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7732 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
7733 // CHECK15-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
7734 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7735 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7736 // CHECK15-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7737 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
7738 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7739 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7740 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7741 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
7742 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7743 // CHECK15:       cond.true:
7744 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7745 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7746 // CHECK15:       cond.false:
7747 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7748 // CHECK15-NEXT:    br label [[COND_END]]
7749 // CHECK15:       cond.end:
7750 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
7751 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
7752 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
7753 // CHECK15-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
7754 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7755 // CHECK15:       omp.inner.for.cond:
7756 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7757 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7758 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
7759 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7760 // CHECK15:       omp.inner.for.body:
7761 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7762 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
7763 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
7764 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
7765 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I3]], align 4
7766 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]
7767 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
7768 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
7769 // CHECK15:       omp.body.continue:
7770 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7771 // CHECK15:       omp.inner.for.inc:
7772 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7773 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
7774 // CHECK15-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
7775 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
7776 // CHECK15:       omp.inner.for.end:
7777 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7778 // CHECK15:       omp.loop.exit:
7779 // CHECK15-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7780 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
7781 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
7782 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
7783 // CHECK15:       omp.precond.end:
7784 // CHECK15-NEXT:    ret void
7785 //
7786 //
7787 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
7788 // CHECK15-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
7789 // CHECK15-NEXT:  entry:
7790 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
7791 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
7792 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7793 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7794 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
7795 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
7796 // CHECK15-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 4
7797 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
7798 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7799 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7800 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7801 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7802 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 4
7803 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
7804 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
7805 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
7806 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
7807 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]])
7808 // CHECK15-NEXT:    ret void
7809 //
7810 //
7811 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined
7812 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
7813 // CHECK15-NEXT:  entry:
7814 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7815 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7816 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
7817 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7818 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7819 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
7820 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7821 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7822 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7823 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7824 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7825 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
7826 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
7827 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7828 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7829 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
7830 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
7831 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7832 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7833 // CHECK15-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
7834 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7835 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7836 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
7837 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
7838 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7839 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7840 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
7841 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7842 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7843 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7844 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7845 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7846 // CHECK15-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
7847 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7848 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7849 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7850 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7851 // CHECK15:       omp.precond.then:
7852 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
7853 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7854 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
7855 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7856 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7857 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
7858 // CHECK15-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7859 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
7860 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
7861 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7862 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7863 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
7864 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7865 // CHECK15:       cond.true:
7866 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7867 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7868 // CHECK15:       cond.false:
7869 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7870 // CHECK15-NEXT:    br label [[COND_END]]
7871 // CHECK15:       cond.end:
7872 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
7873 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
7874 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7875 // CHECK15-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
7876 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
7877 // CHECK15:       omp.inner.for.cond:
7878 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7879 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7880 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
7881 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
7882 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
7883 // CHECK15:       omp.inner.for.body:
7884 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7885 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7886 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
7887 // CHECK15-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
7888 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
7889 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]], i32 [[TMP20]])
7890 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
7891 // CHECK15:       omp.inner.for.inc:
7892 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
7893 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7894 // CHECK15-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
7895 // CHECK15-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
7896 // CHECK15-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7897 // CHECK15-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7898 // CHECK15-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
7899 // CHECK15-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4
7900 // CHECK15-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7901 // CHECK15-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
7902 // CHECK15-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
7903 // CHECK15-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4
7904 // CHECK15-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7905 // CHECK15-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7906 // CHECK15-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
7907 // CHECK15-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
7908 // CHECK15:       cond.true11:
7909 // CHECK15-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7910 // CHECK15-NEXT:    br label [[COND_END13:%.*]]
7911 // CHECK15:       cond.false12:
7912 // CHECK15-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
7913 // CHECK15-NEXT:    br label [[COND_END13]]
7914 // CHECK15:       cond.end13:
7915 // CHECK15-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
7916 // CHECK15-NEXT:    store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4
7917 // CHECK15-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
7918 // CHECK15-NEXT:    store i32 [[TMP31]], ptr [[DOTOMP_IV]], align 4
7919 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
7920 // CHECK15:       omp.inner.for.end:
7921 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
7922 // CHECK15:       omp.loop.exit:
7923 // CHECK15-NEXT:    [[TMP32:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7924 // CHECK15-NEXT:    [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
7925 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP33]])
7926 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
7927 // CHECK15:       omp.precond.end:
7928 // CHECK15-NEXT:    ret void
7929 //
7930 //
7931 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined
7932 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
7933 // CHECK15-NEXT:  entry:
7934 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
7935 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
7936 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
7937 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
7938 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
7939 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
7940 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
7941 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
7942 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
7943 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
7944 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
7945 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
7946 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
7947 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
7948 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
7949 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
7950 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
7951 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
7952 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
7953 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
7954 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7955 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7956 // CHECK15-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
7957 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
7958 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
7959 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
7960 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
7961 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
7962 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
7963 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
7964 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
7965 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7966 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
7967 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
7968 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
7969 // CHECK15-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
7970 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
7971 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
7972 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
7973 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
7974 // CHECK15:       omp.precond.then:
7975 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
7976 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7977 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
7978 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
7979 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
7980 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
7981 // CHECK15-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
7982 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
7983 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
7984 // CHECK15-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
7985 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
7986 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
7987 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7988 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7989 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
7990 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
7991 // CHECK15:       cond.true:
7992 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
7993 // CHECK15-NEXT:    br label [[COND_END:%.*]]
7994 // CHECK15:       cond.false:
7995 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
7996 // CHECK15-NEXT:    br label [[COND_END]]
7997 // CHECK15:       cond.end:
7998 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
7999 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8000 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8001 // CHECK15-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
8002 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8003 // CHECK15:       omp.inner.for.cond:
8004 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8005 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8006 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
8007 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8008 // CHECK15:       omp.inner.for.body:
8009 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8010 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
8011 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8012 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
8013 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4
8014 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]
8015 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
8016 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8017 // CHECK15:       omp.body.continue:
8018 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8019 // CHECK15:       omp.inner.for.inc:
8020 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8021 // CHECK15-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
8022 // CHECK15-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
8023 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8024 // CHECK15:       omp.inner.for.end:
8025 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8026 // CHECK15:       omp.loop.exit:
8027 // CHECK15-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8028 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
8029 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
8030 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
8031 // CHECK15:       omp.precond.end:
8032 // CHECK15-NEXT:    ret void
8033 //
8034 //
8035 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
8036 // CHECK15-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8037 // CHECK15-NEXT:  entry:
8038 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
8039 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8040 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8041 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
8042 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8043 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8044 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8045 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8046 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])
8047 // CHECK15-NEXT:    ret void
8048 //
8049 //
8050 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined
8051 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
8052 // CHECK15-NEXT:  entry:
8053 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8054 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8055 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
8056 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8057 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8058 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8059 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8060 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8061 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8062 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8063 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8064 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8065 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8066 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8067 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
8068 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8069 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8070 // CHECK15-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
8071 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8072 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8073 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
8074 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8075 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8076 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
8077 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
8078 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
8079 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8080 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8081 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8082 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
8083 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
8084 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
8085 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8086 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8087 // CHECK15:       omp.precond.then:
8088 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
8089 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8090 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
8091 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8092 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8093 // CHECK15-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8094 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
8095 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8096 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8097 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8098 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8099 // CHECK15-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8100 // CHECK15:       cond.true:
8101 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8102 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8103 // CHECK15:       cond.false:
8104 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8105 // CHECK15-NEXT:    br label [[COND_END]]
8106 // CHECK15:       cond.end:
8107 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8108 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
8109 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8110 // CHECK15-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
8111 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8112 // CHECK15:       omp.inner.for.cond:
8113 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8114 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8115 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8116 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8117 // CHECK15:       omp.inner.for.body:
8118 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8119 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8120 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])
8121 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8122 // CHECK15:       omp.inner.for.inc:
8123 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8124 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8125 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
8126 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
8127 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8128 // CHECK15:       omp.inner.for.end:
8129 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8130 // CHECK15:       omp.loop.exit:
8131 // CHECK15-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8132 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
8133 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
8134 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
8135 // CHECK15:       omp.precond.end:
8136 // CHECK15-NEXT:    ret void
8137 //
8138 //
8139 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined
8140 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
8141 // CHECK15-NEXT:  entry:
8142 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8143 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8144 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8145 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8146 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
8147 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8148 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8149 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8150 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8151 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8152 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8153 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8154 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8155 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8156 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8157 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8158 // CHECK15-NEXT:    [[I3:%.*]] = alloca i32, align 4
8159 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8160 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8161 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8162 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8163 // CHECK15-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
8164 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8165 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8166 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
8167 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8168 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8169 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
8170 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
8171 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
8172 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8173 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8174 // CHECK15-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
8175 // CHECK15-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
8176 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
8177 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
8178 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8179 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8180 // CHECK15:       omp.precond.then:
8181 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8182 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8183 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
8184 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8185 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8186 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
8187 // CHECK15-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
8188 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8189 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8190 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8191 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8192 // CHECK15-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8193 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
8194 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 1073741859, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
8195 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
8196 // CHECK15:       omp.dispatch.cond:
8197 // CHECK15-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8198 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
8199 // CHECK15-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
8200 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
8201 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8202 // CHECK15:       omp.dispatch.body:
8203 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8204 // CHECK15-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
8205 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8206 // CHECK15:       omp.inner.for.cond:
8207 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]
8208 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]
8209 // CHECK15-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
8210 // CHECK15-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8211 // CHECK15:       omp.inner.for.body:
8212 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
8213 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
8214 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8215 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]
8216 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]
8217 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP20]]
8218 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]
8219 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8220 // CHECK15:       omp.body.continue:
8221 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8222 // CHECK15:       omp.inner.for.inc:
8223 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
8224 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
8225 // CHECK15-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
8226 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
8227 // CHECK15:       omp.inner.for.end:
8228 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
8229 // CHECK15:       omp.dispatch.inc:
8230 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
8231 // CHECK15:       omp.dispatch.end:
8232 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
8233 // CHECK15:       omp.precond.end:
8234 // CHECK15-NEXT:    ret void
8235 //
8236 //
8237 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
8238 // CHECK15-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
8239 // CHECK15-NEXT:  entry:
8240 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
8241 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
8242 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8243 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8244 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
8245 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8246 // CHECK15-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 4
8247 // CHECK15-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
8248 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8249 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8250 // CHECK15-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8251 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8252 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 4
8253 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
8254 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
8255 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
8256 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
8257 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]])
8258 // CHECK15-NEXT:    ret void
8259 //
8260 //
8261 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined
8262 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
8263 // CHECK15-NEXT:  entry:
8264 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8265 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8266 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
8267 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8268 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8269 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8270 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8271 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8272 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8273 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8274 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8275 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8276 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8277 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8278 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8279 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
8280 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
8281 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8282 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8283 // CHECK15-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
8284 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8285 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8286 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
8287 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
8288 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8289 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8290 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
8291 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
8292 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8293 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8294 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8295 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8296 // CHECK15-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
8297 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
8298 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8299 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8300 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8301 // CHECK15:       omp.precond.then:
8302 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
8303 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8304 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
8305 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8306 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8307 // CHECK15-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8308 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
8309 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8310 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8311 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8312 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
8313 // CHECK15-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8314 // CHECK15:       cond.true:
8315 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8316 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8317 // CHECK15:       cond.false:
8318 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8319 // CHECK15-NEXT:    br label [[COND_END]]
8320 // CHECK15:       cond.end:
8321 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
8322 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
8323 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8324 // CHECK15-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
8325 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8326 // CHECK15:       omp.inner.for.cond:
8327 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8328 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8329 // CHECK15-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
8330 // CHECK15-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8331 // CHECK15:       omp.inner.for.body:
8332 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8333 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8334 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
8335 // CHECK15-NEXT:    store i32 [[TMP18]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
8336 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
8337 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]], i32 [[TMP19]])
8338 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8339 // CHECK15:       omp.inner.for.inc:
8340 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8341 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8342 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
8343 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
8344 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8345 // CHECK15:       omp.inner.for.end:
8346 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8347 // CHECK15:       omp.loop.exit:
8348 // CHECK15-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8349 // CHECK15-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
8350 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
8351 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
8352 // CHECK15:       omp.precond.end:
8353 // CHECK15-NEXT:    ret void
8354 //
8355 //
8356 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined
8357 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
8358 // CHECK15-NEXT:  entry:
8359 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8360 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8361 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8362 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8363 // CHECK15-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
8364 // CHECK15-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
8365 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8366 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
8367 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8368 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8369 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
8370 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
8371 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8372 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8373 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8374 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8375 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8376 // CHECK15-NEXT:    [[I4:%.*]] = alloca i32, align 4
8377 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8378 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8379 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8380 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8381 // CHECK15-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
8382 // CHECK15-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
8383 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8384 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
8385 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
8386 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
8387 // CHECK15-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8388 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
8389 // CHECK15-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
8390 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8391 // CHECK15-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
8392 // CHECK15-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
8393 // CHECK15-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
8394 // CHECK15-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
8395 // CHECK15-NEXT:    store i32 0, ptr [[I]], align 4
8396 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
8397 // CHECK15-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
8398 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
8399 // CHECK15:       omp.precond.then:
8400 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8401 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
8402 // CHECK15-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
8403 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8404 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8405 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
8406 // CHECK15-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
8407 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8408 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8409 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
8410 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8411 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8412 // CHECK15-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8413 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
8414 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 1073741859, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
8415 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
8416 // CHECK15:       omp.dispatch.cond:
8417 // CHECK15-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8418 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
8419 // CHECK15-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
8420 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
8421 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
8422 // CHECK15:       omp.dispatch.body:
8423 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8424 // CHECK15-NEXT:    store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4
8425 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8426 // CHECK15:       omp.inner.for.cond:
8427 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
8428 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
8429 // CHECK15-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
8430 // CHECK15-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8431 // CHECK15:       omp.inner.for.body:
8432 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
8433 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
8434 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8435 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]
8436 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]
8437 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP21]]
8438 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]
8439 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8440 // CHECK15:       omp.body.continue:
8441 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8442 // CHECK15:       omp.inner.for.inc:
8443 // CHECK15-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
8444 // CHECK15-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
8445 // CHECK15-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
8446 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
8447 // CHECK15:       omp.inner.for.end:
8448 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
8449 // CHECK15:       omp.dispatch.inc:
8450 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
8451 // CHECK15:       omp.dispatch.end:
8452 // CHECK15-NEXT:    br label [[OMP_PRECOND_END]]
8453 // CHECK15:       omp.precond.end:
8454 // CHECK15-NEXT:    ret void
8455 //
8456 //
8457 // CHECK15-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
8458 // CHECK15-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
8459 // CHECK15-NEXT:  entry:
8460 // CHECK15-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
8461 // CHECK15-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
8462 // CHECK15-NEXT:    [[M:%.*]] = alloca i32, align 4
8463 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
8464 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
8465 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
8466 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8467 // CHECK15-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
8468 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4
8469 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4
8470 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4
8471 // CHECK15-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
8472 // CHECK15-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8473 // CHECK15-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
8474 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 4
8475 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 4
8476 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 4
8477 // CHECK15-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
8478 // CHECK15-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8479 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 4
8480 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 4
8481 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 4
8482 // CHECK15-NEXT:    [[_TMP18:%.*]] = alloca i32, align 4
8483 // CHECK15-NEXT:    [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8484 // CHECK15-NEXT:    [[M_CASTED22:%.*]] = alloca i32, align 4
8485 // CHECK15-NEXT:    [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [2 x ptr], align 4
8486 // CHECK15-NEXT:    [[DOTOFFLOAD_PTRS24:%.*]] = alloca [2 x ptr], align 4
8487 // CHECK15-NEXT:    [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [2 x ptr], align 4
8488 // CHECK15-NEXT:    [[_TMP26:%.*]] = alloca i32, align 4
8489 // CHECK15-NEXT:    [[KERNEL_ARGS27:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
8490 // CHECK15-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
8491 // CHECK15-NEXT:    store i32 10, ptr [[M]], align 4
8492 // CHECK15-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8493 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP0]], align 4
8494 // CHECK15-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8495 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
8496 // CHECK15-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
8497 // CHECK15-NEXT:    store ptr null, ptr [[TMP2]], align 4
8498 // CHECK15-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
8499 // CHECK15-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
8500 // CHECK15-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
8501 // CHECK15-NEXT:    store i32 2, ptr [[TMP5]], align 4
8502 // CHECK15-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
8503 // CHECK15-NEXT:    store i32 1, ptr [[TMP6]], align 4
8504 // CHECK15-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
8505 // CHECK15-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
8506 // CHECK15-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
8507 // CHECK15-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
8508 // CHECK15-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
8509 // CHECK15-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP9]], align 4
8510 // CHECK15-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
8511 // CHECK15-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP10]], align 4
8512 // CHECK15-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
8513 // CHECK15-NEXT:    store ptr null, ptr [[TMP11]], align 4
8514 // CHECK15-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
8515 // CHECK15-NEXT:    store ptr null, ptr [[TMP12]], align 4
8516 // CHECK15-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
8517 // CHECK15-NEXT:    store i64 10, ptr [[TMP13]], align 8
8518 // CHECK15-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
8519 // CHECK15-NEXT:    store i64 0, ptr [[TMP14]], align 8
8520 // CHECK15-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
8521 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
8522 // CHECK15-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
8523 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
8524 // CHECK15-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
8525 // CHECK15-NEXT:    store i32 0, ptr [[TMP17]], align 4
8526 // CHECK15-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS]])
8527 // CHECK15-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
8528 // CHECK15-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
8529 // CHECK15:       omp_offload.failed:
8530 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR4]]
8531 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT]]
8532 // CHECK15:       omp_offload.cont:
8533 // CHECK15-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
8534 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP20]], align 4
8535 // CHECK15-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
8536 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP21]], align 4
8537 // CHECK15-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
8538 // CHECK15-NEXT:    store ptr null, ptr [[TMP22]], align 4
8539 // CHECK15-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
8540 // CHECK15-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
8541 // CHECK15-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
8542 // CHECK15-NEXT:    store i32 2, ptr [[TMP25]], align 4
8543 // CHECK15-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
8544 // CHECK15-NEXT:    store i32 1, ptr [[TMP26]], align 4
8545 // CHECK15-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
8546 // CHECK15-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
8547 // CHECK15-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
8548 // CHECK15-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
8549 // CHECK15-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
8550 // CHECK15-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP29]], align 4
8551 // CHECK15-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
8552 // CHECK15-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP30]], align 4
8553 // CHECK15-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
8554 // CHECK15-NEXT:    store ptr null, ptr [[TMP31]], align 4
8555 // CHECK15-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
8556 // CHECK15-NEXT:    store ptr null, ptr [[TMP32]], align 4
8557 // CHECK15-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
8558 // CHECK15-NEXT:    store i64 10, ptr [[TMP33]], align 8
8559 // CHECK15-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
8560 // CHECK15-NEXT:    store i64 0, ptr [[TMP34]], align 8
8561 // CHECK15-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
8562 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
8563 // CHECK15-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
8564 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
8565 // CHECK15-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
8566 // CHECK15-NEXT:    store i32 0, ptr [[TMP37]], align 4
8567 // CHECK15-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, ptr [[KERNEL_ARGS5]])
8568 // CHECK15-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
8569 // CHECK15-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
8570 // CHECK15:       omp_offload.failed6:
8571 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121(ptr [[A]]) #[[ATTR4]]
8572 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
8573 // CHECK15:       omp_offload.cont7:
8574 // CHECK15-NEXT:    [[TMP40:%.*]] = load i32, ptr [[M]], align 4
8575 // CHECK15-NEXT:    store i32 [[TMP40]], ptr [[M_CASTED]], align 4
8576 // CHECK15-NEXT:    [[TMP41:%.*]] = load i32, ptr [[M_CASTED]], align 4
8577 // CHECK15-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
8578 // CHECK15-NEXT:    store i32 [[TMP41]], ptr [[TMP42]], align 4
8579 // CHECK15-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
8580 // CHECK15-NEXT:    store i32 [[TMP41]], ptr [[TMP43]], align 4
8581 // CHECK15-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
8582 // CHECK15-NEXT:    store ptr null, ptr [[TMP44]], align 4
8583 // CHECK15-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
8584 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP45]], align 4
8585 // CHECK15-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
8586 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP46]], align 4
8587 // CHECK15-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
8588 // CHECK15-NEXT:    store ptr null, ptr [[TMP47]], align 4
8589 // CHECK15-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
8590 // CHECK15-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
8591 // CHECK15-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
8592 // CHECK15-NEXT:    store i32 2, ptr [[TMP50]], align 4
8593 // CHECK15-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
8594 // CHECK15-NEXT:    store i32 2, ptr [[TMP51]], align 4
8595 // CHECK15-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
8596 // CHECK15-NEXT:    store ptr [[TMP48]], ptr [[TMP52]], align 4
8597 // CHECK15-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
8598 // CHECK15-NEXT:    store ptr [[TMP49]], ptr [[TMP53]], align 4
8599 // CHECK15-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
8600 // CHECK15-NEXT:    store ptr @.offload_sizes.13, ptr [[TMP54]], align 4
8601 // CHECK15-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
8602 // CHECK15-NEXT:    store ptr @.offload_maptypes.14, ptr [[TMP55]], align 4
8603 // CHECK15-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
8604 // CHECK15-NEXT:    store ptr null, ptr [[TMP56]], align 4
8605 // CHECK15-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
8606 // CHECK15-NEXT:    store ptr null, ptr [[TMP57]], align 4
8607 // CHECK15-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
8608 // CHECK15-NEXT:    store i64 10, ptr [[TMP58]], align 8
8609 // CHECK15-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
8610 // CHECK15-NEXT:    store i64 0, ptr [[TMP59]], align 8
8611 // CHECK15-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
8612 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP60]], align 4
8613 // CHECK15-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
8614 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4
8615 // CHECK15-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
8616 // CHECK15-NEXT:    store i32 0, ptr [[TMP62]], align 4
8617 // CHECK15-NEXT:    [[TMP63:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, ptr [[KERNEL_ARGS12]])
8618 // CHECK15-NEXT:    [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 0
8619 // CHECK15-NEXT:    br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
8620 // CHECK15:       omp_offload.failed13:
8621 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP41]], ptr [[A]]) #[[ATTR4]]
8622 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT14]]
8623 // CHECK15:       omp_offload.cont14:
8624 // CHECK15-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
8625 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP65]], align 4
8626 // CHECK15-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
8627 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP66]], align 4
8628 // CHECK15-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0
8629 // CHECK15-NEXT:    store ptr null, ptr [[TMP67]], align 4
8630 // CHECK15-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
8631 // CHECK15-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
8632 // CHECK15-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0
8633 // CHECK15-NEXT:    store i32 2, ptr [[TMP70]], align 4
8634 // CHECK15-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1
8635 // CHECK15-NEXT:    store i32 1, ptr [[TMP71]], align 4
8636 // CHECK15-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2
8637 // CHECK15-NEXT:    store ptr [[TMP68]], ptr [[TMP72]], align 4
8638 // CHECK15-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3
8639 // CHECK15-NEXT:    store ptr [[TMP69]], ptr [[TMP73]], align 4
8640 // CHECK15-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4
8641 // CHECK15-NEXT:    store ptr @.offload_sizes.15, ptr [[TMP74]], align 4
8642 // CHECK15-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5
8643 // CHECK15-NEXT:    store ptr @.offload_maptypes.16, ptr [[TMP75]], align 4
8644 // CHECK15-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6
8645 // CHECK15-NEXT:    store ptr null, ptr [[TMP76]], align 4
8646 // CHECK15-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7
8647 // CHECK15-NEXT:    store ptr null, ptr [[TMP77]], align 4
8648 // CHECK15-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8
8649 // CHECK15-NEXT:    store i64 10, ptr [[TMP78]], align 8
8650 // CHECK15-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9
8651 // CHECK15-NEXT:    store i64 0, ptr [[TMP79]], align 8
8652 // CHECK15-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10
8653 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP80]], align 4
8654 // CHECK15-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11
8655 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4
8656 // CHECK15-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12
8657 // CHECK15-NEXT:    store i32 0, ptr [[TMP82]], align 4
8658 // CHECK15-NEXT:    [[TMP83:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, ptr [[KERNEL_ARGS19]])
8659 // CHECK15-NEXT:    [[TMP84:%.*]] = icmp ne i32 [[TMP83]], 0
8660 // CHECK15-NEXT:    br i1 [[TMP84]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
8661 // CHECK15:       omp_offload.failed20:
8662 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131(ptr [[A]]) #[[ATTR4]]
8663 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT21]]
8664 // CHECK15:       omp_offload.cont21:
8665 // CHECK15-NEXT:    [[TMP85:%.*]] = load i32, ptr [[M]], align 4
8666 // CHECK15-NEXT:    store i32 [[TMP85]], ptr [[M_CASTED22]], align 4
8667 // CHECK15-NEXT:    [[TMP86:%.*]] = load i32, ptr [[M_CASTED22]], align 4
8668 // CHECK15-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
8669 // CHECK15-NEXT:    store i32 [[TMP86]], ptr [[TMP87]], align 4
8670 // CHECK15-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
8671 // CHECK15-NEXT:    store i32 [[TMP86]], ptr [[TMP88]], align 4
8672 // CHECK15-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0
8673 // CHECK15-NEXT:    store ptr null, ptr [[TMP89]], align 4
8674 // CHECK15-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
8675 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP90]], align 4
8676 // CHECK15-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
8677 // CHECK15-NEXT:    store ptr [[A]], ptr [[TMP91]], align 4
8678 // CHECK15-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1
8679 // CHECK15-NEXT:    store ptr null, ptr [[TMP92]], align 4
8680 // CHECK15-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
8681 // CHECK15-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
8682 // CHECK15-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 0
8683 // CHECK15-NEXT:    store i32 2, ptr [[TMP95]], align 4
8684 // CHECK15-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 1
8685 // CHECK15-NEXT:    store i32 2, ptr [[TMP96]], align 4
8686 // CHECK15-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 2
8687 // CHECK15-NEXT:    store ptr [[TMP93]], ptr [[TMP97]], align 4
8688 // CHECK15-NEXT:    [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 3
8689 // CHECK15-NEXT:    store ptr [[TMP94]], ptr [[TMP98]], align 4
8690 // CHECK15-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 4
8691 // CHECK15-NEXT:    store ptr @.offload_sizes.17, ptr [[TMP99]], align 4
8692 // CHECK15-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 5
8693 // CHECK15-NEXT:    store ptr @.offload_maptypes.18, ptr [[TMP100]], align 4
8694 // CHECK15-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 6
8695 // CHECK15-NEXT:    store ptr null, ptr [[TMP101]], align 4
8696 // CHECK15-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 7
8697 // CHECK15-NEXT:    store ptr null, ptr [[TMP102]], align 4
8698 // CHECK15-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 8
8699 // CHECK15-NEXT:    store i64 10, ptr [[TMP103]], align 8
8700 // CHECK15-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 9
8701 // CHECK15-NEXT:    store i64 0, ptr [[TMP104]], align 8
8702 // CHECK15-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 10
8703 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP105]], align 4
8704 // CHECK15-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 11
8705 // CHECK15-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP106]], align 4
8706 // CHECK15-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 12
8707 // CHECK15-NEXT:    store i32 0, ptr [[TMP107]], align 4
8708 // CHECK15-NEXT:    [[TMP108:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, ptr [[KERNEL_ARGS27]])
8709 // CHECK15-NEXT:    [[TMP109:%.*]] = icmp ne i32 [[TMP108]], 0
8710 // CHECK15-NEXT:    br i1 [[TMP109]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
8711 // CHECK15:       omp_offload.failed28:
8712 // CHECK15-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP86]], ptr [[A]]) #[[ATTR4]]
8713 // CHECK15-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
8714 // CHECK15:       omp_offload.cont29:
8715 // CHECK15-NEXT:    ret i32 0
8716 //
8717 //
8718 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
8719 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8720 // CHECK15-NEXT:  entry:
8721 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8722 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8723 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8724 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])
8725 // CHECK15-NEXT:    ret void
8726 //
8727 //
8728 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined
8729 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
8730 // CHECK15-NEXT:  entry:
8731 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8732 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8733 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8734 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8735 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8736 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8737 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8738 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8739 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8740 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8741 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8742 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8743 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8744 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8745 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
8746 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
8747 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8748 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8749 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8750 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
8751 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8752 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8753 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8754 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8755 // CHECK15:       cond.true:
8756 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8757 // CHECK15:       cond.false:
8758 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8759 // CHECK15-NEXT:    br label [[COND_END]]
8760 // CHECK15:       cond.end:
8761 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8762 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
8763 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8764 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
8765 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8766 // CHECK15:       omp.inner.for.cond:
8767 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8768 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8769 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8770 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8771 // CHECK15:       omp.inner.for.body:
8772 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8773 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8774 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
8775 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8776 // CHECK15:       omp.inner.for.inc:
8777 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8778 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8779 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
8780 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
8781 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8782 // CHECK15:       omp.inner.for.end:
8783 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8784 // CHECK15:       omp.loop.exit:
8785 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
8786 // CHECK15-NEXT:    ret void
8787 //
8788 //
8789 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined
8790 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
8791 // CHECK15-NEXT:  entry:
8792 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8793 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8794 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8795 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8796 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8797 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8798 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8799 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8800 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8801 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8802 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8803 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8804 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8805 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8806 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8807 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8808 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8809 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8810 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8811 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
8812 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8813 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8814 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
8815 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
8816 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8817 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8818 // CHECK15-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8819 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
8820 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8821 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8822 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
8823 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8824 // CHECK15:       cond.true:
8825 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8826 // CHECK15:       cond.false:
8827 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8828 // CHECK15-NEXT:    br label [[COND_END]]
8829 // CHECK15:       cond.end:
8830 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
8831 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8832 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8833 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
8834 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8835 // CHECK15:       omp.inner.for.cond:
8836 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8837 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8838 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
8839 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8840 // CHECK15:       omp.inner.for.body:
8841 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8842 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
8843 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8844 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
8845 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
8846 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]
8847 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
8848 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8849 // CHECK15:       omp.body.continue:
8850 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8851 // CHECK15:       omp.inner.for.inc:
8852 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8853 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
8854 // CHECK15-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
8855 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8856 // CHECK15:       omp.inner.for.end:
8857 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8858 // CHECK15:       omp.loop.exit:
8859 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
8860 // CHECK15-NEXT:    ret void
8861 //
8862 //
8863 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
8864 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
8865 // CHECK15-NEXT:  entry:
8866 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8867 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8868 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8869 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined, ptr [[TMP0]])
8870 // CHECK15-NEXT:    ret void
8871 //
8872 //
8873 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined
8874 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
8875 // CHECK15-NEXT:  entry:
8876 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8877 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8878 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8879 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8880 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8881 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
8882 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
8883 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8884 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8885 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8886 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8887 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8888 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8889 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8890 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
8891 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
8892 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8893 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8894 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8895 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
8896 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8897 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8898 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
8899 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8900 // CHECK15:       cond.true:
8901 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8902 // CHECK15:       cond.false:
8903 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8904 // CHECK15-NEXT:    br label [[COND_END]]
8905 // CHECK15:       cond.end:
8906 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
8907 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
8908 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8909 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
8910 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8911 // CHECK15:       omp.inner.for.cond:
8912 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8913 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8914 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
8915 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8916 // CHECK15:       omp.inner.for.body:
8917 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
8918 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
8919 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
8920 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8921 // CHECK15:       omp.inner.for.inc:
8922 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8923 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
8924 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
8925 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
8926 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
8927 // CHECK15:       omp.inner.for.end:
8928 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
8929 // CHECK15:       omp.loop.exit:
8930 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
8931 // CHECK15-NEXT:    ret void
8932 //
8933 //
8934 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined
8935 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
8936 // CHECK15-NEXT:  entry:
8937 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
8938 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
8939 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
8940 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
8941 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
8942 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
8943 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
8944 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
8945 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
8946 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
8947 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
8948 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
8949 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
8950 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
8951 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8952 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8953 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
8954 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
8955 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
8956 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
8957 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
8958 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
8959 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
8960 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
8961 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
8962 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
8963 // CHECK15-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
8964 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
8965 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
8966 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8967 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
8968 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
8969 // CHECK15:       cond.true:
8970 // CHECK15-NEXT:    br label [[COND_END:%.*]]
8971 // CHECK15:       cond.false:
8972 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8973 // CHECK15-NEXT:    br label [[COND_END]]
8974 // CHECK15:       cond.end:
8975 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
8976 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
8977 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
8978 // CHECK15-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
8979 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
8980 // CHECK15:       omp.inner.for.cond:
8981 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8982 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
8983 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
8984 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
8985 // CHECK15:       omp.inner.for.body:
8986 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8987 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
8988 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
8989 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
8990 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
8991 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]
8992 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
8993 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
8994 // CHECK15:       omp.body.continue:
8995 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
8996 // CHECK15:       omp.inner.for.inc:
8997 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
8998 // CHECK15-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
8999 // CHECK15-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
9000 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
9001 // CHECK15:       omp.inner.for.end:
9002 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9003 // CHECK15:       omp.loop.exit:
9004 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
9005 // CHECK15-NEXT:    ret void
9006 //
9007 //
9008 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
9009 // CHECK15-SAME: (i32 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9010 // CHECK15-NEXT:  entry:
9011 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
9012 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9013 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9014 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9015 // CHECK15-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 4
9016 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9017 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9018 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 4
9019 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
9020 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
9021 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9022 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9023 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined, ptr [[TMP0]], i32 [[TMP3]])
9024 // CHECK15-NEXT:    ret void
9025 //
9026 //
9027 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined
9028 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
9029 // CHECK15-NEXT:  entry:
9030 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9031 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9032 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9033 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9034 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9035 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9036 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9037 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9038 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9039 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9040 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9041 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9042 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9043 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9044 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9045 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9046 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9047 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
9048 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
9049 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9050 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9051 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9052 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
9053 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9054 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9055 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9056 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9057 // CHECK15:       cond.true:
9058 // CHECK15-NEXT:    br label [[COND_END:%.*]]
9059 // CHECK15:       cond.false:
9060 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9061 // CHECK15-NEXT:    br label [[COND_END]]
9062 // CHECK15:       cond.end:
9063 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9064 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
9065 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9066 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
9067 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9068 // CHECK15:       omp.inner.for.cond:
9069 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9070 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9071 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9072 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9073 // CHECK15:       omp.inner.for.body:
9074 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9075 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9076 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9077 // CHECK15-NEXT:    store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9078 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9079 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]])
9080 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9081 // CHECK15:       omp.inner.for.inc:
9082 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9083 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9084 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9085 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
9086 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
9087 // CHECK15:       omp.inner.for.end:
9088 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9089 // CHECK15:       omp.loop.exit:
9090 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
9091 // CHECK15-NEXT:    ret void
9092 //
9093 //
9094 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined
9095 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
9096 // CHECK15-NEXT:  entry:
9097 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9098 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9099 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9100 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9101 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9102 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9103 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9104 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9105 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9106 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9107 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9108 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9109 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9110 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9111 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9112 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9113 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9114 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9115 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9116 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9117 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
9118 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
9119 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9120 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9121 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
9122 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
9123 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9124 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9125 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9126 // CHECK15-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9127 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
9128 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
9129 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9130 // CHECK15:       omp.dispatch.cond:
9131 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9132 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9133 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
9134 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9135 // CHECK15:       cond.true:
9136 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9137 // CHECK15-NEXT:    br label [[COND_END:%.*]]
9138 // CHECK15:       cond.false:
9139 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9140 // CHECK15-NEXT:    br label [[COND_END]]
9141 // CHECK15:       cond.end:
9142 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
9143 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
9144 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9145 // CHECK15-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
9146 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9147 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9148 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
9149 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9150 // CHECK15:       omp.dispatch.body:
9151 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9152 // CHECK15:       omp.inner.for.cond:
9153 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9154 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9155 // CHECK15-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
9156 // CHECK15-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9157 // CHECK15:       omp.inner.for.body:
9158 // CHECK15-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9159 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
9160 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9161 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
9162 // CHECK15-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
9163 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]]
9164 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
9165 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9166 // CHECK15:       omp.body.continue:
9167 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9168 // CHECK15:       omp.inner.for.inc:
9169 // CHECK15-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9170 // CHECK15-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
9171 // CHECK15-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
9172 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
9173 // CHECK15:       omp.inner.for.end:
9174 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9175 // CHECK15:       omp.dispatch.inc:
9176 // CHECK15-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9177 // CHECK15-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9178 // CHECK15-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
9179 // CHECK15-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
9180 // CHECK15-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9181 // CHECK15-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9182 // CHECK15-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
9183 // CHECK15-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
9184 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
9185 // CHECK15:       omp.dispatch.end:
9186 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
9187 // CHECK15-NEXT:    ret void
9188 //
9189 //
9190 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
9191 // CHECK15-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9192 // CHECK15-NEXT:  entry:
9193 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9194 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9195 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9196 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined, ptr [[TMP0]])
9197 // CHECK15-NEXT:    ret void
9198 //
9199 //
9200 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined
9201 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
9202 // CHECK15-NEXT:  entry:
9203 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9204 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9205 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9206 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9207 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9208 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9209 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9210 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9211 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9212 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9213 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9214 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9215 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9216 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9217 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
9218 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
9219 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9220 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9221 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9222 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
9223 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9224 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9225 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9226 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9227 // CHECK15:       cond.true:
9228 // CHECK15-NEXT:    br label [[COND_END:%.*]]
9229 // CHECK15:       cond.false:
9230 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9231 // CHECK15-NEXT:    br label [[COND_END]]
9232 // CHECK15:       cond.end:
9233 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9234 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
9235 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9236 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
9237 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9238 // CHECK15:       omp.inner.for.cond:
9239 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9240 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9241 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9242 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9243 // CHECK15:       omp.inner.for.body:
9244 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9245 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9246 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
9247 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9248 // CHECK15:       omp.inner.for.inc:
9249 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9250 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9251 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
9252 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
9253 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
9254 // CHECK15:       omp.inner.for.end:
9255 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9256 // CHECK15:       omp.loop.exit:
9257 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
9258 // CHECK15-NEXT:    ret void
9259 //
9260 //
9261 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined
9262 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
9263 // CHECK15-NEXT:  entry:
9264 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9265 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9266 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9267 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9268 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9269 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9270 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9271 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9272 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9273 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9274 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9275 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9276 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9277 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9278 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9279 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9280 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9281 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9282 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
9283 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
9284 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9285 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9286 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
9287 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
9288 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9289 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9290 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9291 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9292 // CHECK15-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9293 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
9294 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 1073741859, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
9295 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9296 // CHECK15:       omp.dispatch.cond:
9297 // CHECK15-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
9298 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
9299 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9300 // CHECK15:       omp.dispatch.body:
9301 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9302 // CHECK15-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
9303 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9304 // CHECK15:       omp.inner.for.cond:
9305 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
9306 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]
9307 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
9308 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9309 // CHECK15:       omp.inner.for.body:
9310 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
9311 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
9312 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9313 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
9314 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
9315 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP12]]
9316 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]
9317 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9318 // CHECK15:       omp.body.continue:
9319 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9320 // CHECK15:       omp.inner.for.inc:
9321 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
9322 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
9323 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
9324 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
9325 // CHECK15:       omp.inner.for.end:
9326 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9327 // CHECK15:       omp.dispatch.inc:
9328 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
9329 // CHECK15:       omp.dispatch.end:
9330 // CHECK15-NEXT:    ret void
9331 //
9332 //
9333 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
9334 // CHECK15-SAME: (i32 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
9335 // CHECK15-NEXT:  entry:
9336 // CHECK15-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
9337 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9338 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9339 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9340 // CHECK15-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 4
9341 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9342 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9343 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 4
9344 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
9345 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
9346 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9347 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9348 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined, ptr [[TMP0]], i32 [[TMP3]])
9349 // CHECK15-NEXT:    ret void
9350 //
9351 //
9352 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined
9353 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
9354 // CHECK15-NEXT:  entry:
9355 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9356 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9357 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9358 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9359 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9360 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9361 // CHECK15-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9362 // CHECK15-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9363 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9364 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9365 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9366 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
9367 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9368 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9369 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9370 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9371 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9372 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
9373 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
9374 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9375 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9376 // CHECK15-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9377 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
9378 // CHECK15-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
9379 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9380 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
9381 // CHECK15-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
9382 // CHECK15:       cond.true:
9383 // CHECK15-NEXT:    br label [[COND_END:%.*]]
9384 // CHECK15:       cond.false:
9385 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9386 // CHECK15-NEXT:    br label [[COND_END]]
9387 // CHECK15:       cond.end:
9388 // CHECK15-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
9389 // CHECK15-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
9390 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9391 // CHECK15-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
9392 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9393 // CHECK15:       omp.inner.for.cond:
9394 // CHECK15-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9395 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9396 // CHECK15-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
9397 // CHECK15-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9398 // CHECK15:       omp.inner.for.body:
9399 // CHECK15-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
9400 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
9401 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9402 // CHECK15-NEXT:    store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9403 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
9404 // CHECK15-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]])
9405 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9406 // CHECK15:       omp.inner.for.inc:
9407 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
9408 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
9409 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
9410 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
9411 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]]
9412 // CHECK15:       omp.inner.for.end:
9413 // CHECK15-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
9414 // CHECK15:       omp.loop.exit:
9415 // CHECK15-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
9416 // CHECK15-NEXT:    ret void
9417 //
9418 //
9419 // CHECK15-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined
9420 // CHECK15-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
9421 // CHECK15-NEXT:  entry:
9422 // CHECK15-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
9423 // CHECK15-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
9424 // CHECK15-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
9425 // CHECK15-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
9426 // CHECK15-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
9427 // CHECK15-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
9428 // CHECK15-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9429 // CHECK15-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9430 // CHECK15-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
9431 // CHECK15-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
9432 // CHECK15-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9433 // CHECK15-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9434 // CHECK15-NEXT:    [[I:%.*]] = alloca i32, align 4
9435 // CHECK15-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
9436 // CHECK15-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
9437 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9438 // CHECK15-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9439 // CHECK15-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
9440 // CHECK15-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9441 // CHECK15-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
9442 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
9443 // CHECK15-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
9444 // CHECK15-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
9445 // CHECK15-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
9446 // CHECK15-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
9447 // CHECK15-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
9448 // CHECK15-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
9449 // CHECK15-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
9450 // CHECK15-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
9451 // CHECK15-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9452 // CHECK15-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
9453 // CHECK15-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
9454 // CHECK15-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
9455 // CHECK15-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 1073741859, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
9456 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
9457 // CHECK15:       omp.dispatch.cond:
9458 // CHECK15-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
9459 // CHECK15-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
9460 // CHECK15-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
9461 // CHECK15:       omp.dispatch.body:
9462 // CHECK15-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
9463 // CHECK15-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
9464 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
9465 // CHECK15:       omp.inner.for.cond:
9466 // CHECK15-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]
9467 // CHECK15-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]]
9468 // CHECK15-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
9469 // CHECK15-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
9470 // CHECK15:       omp.inner.for.body:
9471 // CHECK15-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
9472 // CHECK15-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
9473 // CHECK15-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
9474 // CHECK15-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]
9475 // CHECK15-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]
9476 // CHECK15-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]]
9477 // CHECK15-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]]
9478 // CHECK15-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
9479 // CHECK15:       omp.body.continue:
9480 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
9481 // CHECK15:       omp.inner.for.inc:
9482 // CHECK15-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
9483 // CHECK15-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
9484 // CHECK15-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
9485 // CHECK15-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
9486 // CHECK15:       omp.inner.for.end:
9487 // CHECK15-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
9488 // CHECK15:       omp.dispatch.inc:
9489 // CHECK15-NEXT:    br label [[OMP_DISPATCH_COND]]
9490 // CHECK15:       omp.dispatch.end:
9491 // CHECK15-NEXT:    ret void
9492 //
9493 //
9494 // CHECK15-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
9495 // CHECK15-SAME: () #[[ATTR7:[0-9]+]] {
9496 // CHECK15-NEXT:  entry:
9497 // CHECK15-NEXT:    call void @__tgt_register_requires(i64 1)
9498 // CHECK15-NEXT:    ret void
9499 //
9500 //
9501 // CHECK17-LABEL: define {{[^@]+}}@main
9502 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
9503 // CHECK17-NEXT:  entry:
9504 // CHECK17-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
9505 // CHECK17-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
9506 // CHECK17-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 8
9507 // CHECK17-NEXT:    [[N:%.*]] = alloca i32, align 4
9508 // CHECK17-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 8
9509 // CHECK17-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i64, align 8
9510 // CHECK17-NEXT:    [[M:%.*]] = alloca i32, align 4
9511 // CHECK17-NEXT:    [[N_CASTED:%.*]] = alloca i64, align 8
9512 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 8
9513 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 8
9514 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 8
9515 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 8
9516 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9517 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9518 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9519 // CHECK17-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
9520 // CHECK17-NEXT:    [[N_CASTED3:%.*]] = alloca i64, align 8
9521 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 8
9522 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 8
9523 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 8
9524 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 8
9525 // CHECK17-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
9526 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
9527 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
9528 // CHECK17-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9529 // CHECK17-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
9530 // CHECK17-NEXT:    [[N_CASTED18:%.*]] = alloca i64, align 8
9531 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x ptr], align 8
9532 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x ptr], align 8
9533 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x ptr], align 8
9534 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 8
9535 // CHECK17-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
9536 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
9537 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
9538 // CHECK17-NEXT:    [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9539 // CHECK17-NEXT:    [[N_CASTED33:%.*]] = alloca i64, align 8
9540 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [3 x ptr], align 8
9541 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS35:%.*]] = alloca [3 x ptr], align 8
9542 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [3 x ptr], align 8
9543 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES37:%.*]] = alloca [3 x i64], align 8
9544 // CHECK17-NEXT:    [[_TMP38:%.*]] = alloca i32, align 4
9545 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
9546 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
9547 // CHECK17-NEXT:    [[KERNEL_ARGS45:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9548 // CHECK17-NEXT:    [[M_CASTED48:%.*]] = alloca i64, align 8
9549 // CHECK17-NEXT:    [[N_CASTED49:%.*]] = alloca i64, align 8
9550 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [4 x ptr], align 8
9551 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS51:%.*]] = alloca [4 x ptr], align 8
9552 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [4 x ptr], align 8
9553 // CHECK17-NEXT:    [[DOTOFFLOAD_SIZES53:%.*]] = alloca [4 x i64], align 8
9554 // CHECK17-NEXT:    [[_TMP54:%.*]] = alloca i32, align 4
9555 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4
9556 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_56:%.*]] = alloca i32, align 4
9557 // CHECK17-NEXT:    [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
9558 // CHECK17-NEXT:    store i32 0, ptr [[RETVAL]], align 4
9559 // CHECK17-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
9560 // CHECK17-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 8
9561 // CHECK17-NEXT:    store i32 100, ptr [[N]], align 4
9562 // CHECK17-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
9563 // CHECK17-NEXT:    [[TMP1:%.*]] = zext i32 [[TMP0]] to i64
9564 // CHECK17-NEXT:    [[TMP2:%.*]] = call ptr @llvm.stacksave.p0()
9565 // CHECK17-NEXT:    store ptr [[TMP2]], ptr [[SAVED_STACK]], align 8
9566 // CHECK17-NEXT:    [[VLA:%.*]] = alloca i32, i64 [[TMP1]], align 4
9567 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[__VLA_EXPR0]], align 8
9568 // CHECK17-NEXT:    store i32 10, ptr [[M]], align 4
9569 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N]], align 4
9570 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[N_CASTED]], align 4
9571 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, ptr [[N_CASTED]], align 8
9572 // CHECK17-NEXT:    [[TMP5:%.*]] = mul nuw i64 [[TMP1]], 4
9573 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES]], ptr align 8 @.offload_sizes, i64 24, i1 false)
9574 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9575 // CHECK17-NEXT:    store i64 [[TMP4]], ptr [[TMP6]], align 8
9576 // CHECK17-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9577 // CHECK17-NEXT:    store i64 [[TMP4]], ptr [[TMP7]], align 8
9578 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
9579 // CHECK17-NEXT:    store ptr null, ptr [[TMP8]], align 8
9580 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
9581 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP9]], align 8
9582 // CHECK17-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
9583 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP10]], align 8
9584 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 1
9585 // CHECK17-NEXT:    store ptr null, ptr [[TMP11]], align 8
9586 // CHECK17-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
9587 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 8
9588 // CHECK17-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
9589 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 8
9590 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
9591 // CHECK17-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 8
9592 // CHECK17-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 2
9593 // CHECK17-NEXT:    store ptr null, ptr [[TMP15]], align 8
9594 // CHECK17-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
9595 // CHECK17-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
9596 // CHECK17-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
9597 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 4
9598 // CHECK17-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
9599 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
9600 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
9601 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9602 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9603 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
9604 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
9605 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
9606 // CHECK17-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i64
9607 // CHECK17-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
9608 // CHECK17-NEXT:    store i32 2, ptr [[TMP23]], align 4
9609 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
9610 // CHECK17-NEXT:    store i32 3, ptr [[TMP24]], align 4
9611 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
9612 // CHECK17-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 8
9613 // CHECK17-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
9614 // CHECK17-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 8
9615 // CHECK17-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
9616 // CHECK17-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 8
9617 // CHECK17-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
9618 // CHECK17-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 8
9619 // CHECK17-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
9620 // CHECK17-NEXT:    store ptr null, ptr [[TMP29]], align 8
9621 // CHECK17-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
9622 // CHECK17-NEXT:    store ptr null, ptr [[TMP30]], align 8
9623 // CHECK17-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
9624 // CHECK17-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 8
9625 // CHECK17-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
9626 // CHECK17-NEXT:    store i64 0, ptr [[TMP32]], align 8
9627 // CHECK17-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
9628 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
9629 // CHECK17-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
9630 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
9631 // CHECK17-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
9632 // CHECK17-NEXT:    store i32 0, ptr [[TMP35]], align 4
9633 // CHECK17-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, ptr [[KERNEL_ARGS]])
9634 // CHECK17-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
9635 // CHECK17-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
9636 // CHECK17:       omp_offload.failed:
9637 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i64 [[TMP4]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4:[0-9]+]]
9638 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
9639 // CHECK17:       omp_offload.cont:
9640 // CHECK17-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 4
9641 // CHECK17-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
9642 // CHECK17-NEXT:    [[TMP39:%.*]] = load i64, ptr [[N_CASTED3]], align 8
9643 // CHECK17-NEXT:    [[TMP40:%.*]] = mul nuw i64 [[TMP1]], 4
9644 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES7]], ptr align 8 @.offload_sizes.1, i64 24, i1 false)
9645 // CHECK17-NEXT:    [[TMP41:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
9646 // CHECK17-NEXT:    store i64 [[TMP39]], ptr [[TMP41]], align 8
9647 // CHECK17-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
9648 // CHECK17-NEXT:    store i64 [[TMP39]], ptr [[TMP42]], align 8
9649 // CHECK17-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 0
9650 // CHECK17-NEXT:    store ptr null, ptr [[TMP43]], align 8
9651 // CHECK17-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
9652 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP44]], align 8
9653 // CHECK17-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
9654 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP45]], align 8
9655 // CHECK17-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 1
9656 // CHECK17-NEXT:    store ptr null, ptr [[TMP46]], align 8
9657 // CHECK17-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
9658 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP47]], align 8
9659 // CHECK17-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
9660 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 8
9661 // CHECK17-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
9662 // CHECK17-NEXT:    store i64 [[TMP40]], ptr [[TMP49]], align 8
9663 // CHECK17-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i64 0, i64 2
9664 // CHECK17-NEXT:    store ptr null, ptr [[TMP50]], align 8
9665 // CHECK17-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
9666 // CHECK17-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
9667 // CHECK17-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
9668 // CHECK17-NEXT:    [[TMP54:%.*]] = load i32, ptr [[N]], align 4
9669 // CHECK17-NEXT:    store i32 [[TMP54]], ptr [[DOTCAPTURE_EXPR_9]], align 4
9670 // CHECK17-NEXT:    [[TMP55:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
9671 // CHECK17-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP55]], 0
9672 // CHECK17-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
9673 // CHECK17-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
9674 // CHECK17-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
9675 // CHECK17-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
9676 // CHECK17-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP56]], 1
9677 // CHECK17-NEXT:    [[TMP57:%.*]] = zext i32 [[ADD14]] to i64
9678 // CHECK17-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
9679 // CHECK17-NEXT:    store i32 2, ptr [[TMP58]], align 4
9680 // CHECK17-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
9681 // CHECK17-NEXT:    store i32 3, ptr [[TMP59]], align 4
9682 // CHECK17-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
9683 // CHECK17-NEXT:    store ptr [[TMP51]], ptr [[TMP60]], align 8
9684 // CHECK17-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
9685 // CHECK17-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 8
9686 // CHECK17-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
9687 // CHECK17-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 8
9688 // CHECK17-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
9689 // CHECK17-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP63]], align 8
9690 // CHECK17-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
9691 // CHECK17-NEXT:    store ptr null, ptr [[TMP64]], align 8
9692 // CHECK17-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
9693 // CHECK17-NEXT:    store ptr null, ptr [[TMP65]], align 8
9694 // CHECK17-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
9695 // CHECK17-NEXT:    store i64 [[TMP57]], ptr [[TMP66]], align 8
9696 // CHECK17-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
9697 // CHECK17-NEXT:    store i64 0, ptr [[TMP67]], align 8
9698 // CHECK17-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
9699 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP68]], align 4
9700 // CHECK17-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
9701 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
9702 // CHECK17-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
9703 // CHECK17-NEXT:    store i32 0, ptr [[TMP70]], align 4
9704 // CHECK17-NEXT:    [[TMP71:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, ptr [[KERNEL_ARGS15]])
9705 // CHECK17-NEXT:    [[TMP72:%.*]] = icmp ne i32 [[TMP71]], 0
9706 // CHECK17-NEXT:    br i1 [[TMP72]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
9707 // CHECK17:       omp_offload.failed16:
9708 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i64 [[TMP39]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4]]
9709 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
9710 // CHECK17:       omp_offload.cont17:
9711 // CHECK17-NEXT:    [[TMP73:%.*]] = load i32, ptr [[M]], align 4
9712 // CHECK17-NEXT:    store i32 [[TMP73]], ptr [[M_CASTED]], align 4
9713 // CHECK17-NEXT:    [[TMP74:%.*]] = load i64, ptr [[M_CASTED]], align 8
9714 // CHECK17-NEXT:    [[TMP75:%.*]] = load i32, ptr [[N]], align 4
9715 // CHECK17-NEXT:    store i32 [[TMP75]], ptr [[N_CASTED18]], align 4
9716 // CHECK17-NEXT:    [[TMP76:%.*]] = load i64, ptr [[N_CASTED18]], align 8
9717 // CHECK17-NEXT:    [[TMP77:%.*]] = mul nuw i64 [[TMP1]], 4
9718 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES22]], ptr align 8 @.offload_sizes.3, i64 32, i1 false)
9719 // CHECK17-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
9720 // CHECK17-NEXT:    store i64 [[TMP74]], ptr [[TMP78]], align 8
9721 // CHECK17-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
9722 // CHECK17-NEXT:    store i64 [[TMP74]], ptr [[TMP79]], align 8
9723 // CHECK17-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 0
9724 // CHECK17-NEXT:    store ptr null, ptr [[TMP80]], align 8
9725 // CHECK17-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
9726 // CHECK17-NEXT:    store i64 [[TMP76]], ptr [[TMP81]], align 8
9727 // CHECK17-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
9728 // CHECK17-NEXT:    store i64 [[TMP76]], ptr [[TMP82]], align 8
9729 // CHECK17-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 1
9730 // CHECK17-NEXT:    store ptr null, ptr [[TMP83]], align 8
9731 // CHECK17-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
9732 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP84]], align 8
9733 // CHECK17-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
9734 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP85]], align 8
9735 // CHECK17-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 2
9736 // CHECK17-NEXT:    store ptr null, ptr [[TMP86]], align 8
9737 // CHECK17-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
9738 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP87]], align 8
9739 // CHECK17-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
9740 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP88]], align 8
9741 // CHECK17-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
9742 // CHECK17-NEXT:    store i64 [[TMP77]], ptr [[TMP89]], align 8
9743 // CHECK17-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i64 0, i64 3
9744 // CHECK17-NEXT:    store ptr null, ptr [[TMP90]], align 8
9745 // CHECK17-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
9746 // CHECK17-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
9747 // CHECK17-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
9748 // CHECK17-NEXT:    [[TMP94:%.*]] = load i32, ptr [[N]], align 4
9749 // CHECK17-NEXT:    store i32 [[TMP94]], ptr [[DOTCAPTURE_EXPR_24]], align 4
9750 // CHECK17-NEXT:    [[TMP95:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 4
9751 // CHECK17-NEXT:    [[SUB26:%.*]] = sub nsw i32 [[TMP95]], 0
9752 // CHECK17-NEXT:    [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
9753 // CHECK17-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
9754 // CHECK17-NEXT:    store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 4
9755 // CHECK17-NEXT:    [[TMP96:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
9756 // CHECK17-NEXT:    [[ADD29:%.*]] = add nsw i32 [[TMP96]], 1
9757 // CHECK17-NEXT:    [[TMP97:%.*]] = zext i32 [[ADD29]] to i64
9758 // CHECK17-NEXT:    [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 0
9759 // CHECK17-NEXT:    store i32 2, ptr [[TMP98]], align 4
9760 // CHECK17-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1
9761 // CHECK17-NEXT:    store i32 4, ptr [[TMP99]], align 4
9762 // CHECK17-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 2
9763 // CHECK17-NEXT:    store ptr [[TMP91]], ptr [[TMP100]], align 8
9764 // CHECK17-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 3
9765 // CHECK17-NEXT:    store ptr [[TMP92]], ptr [[TMP101]], align 8
9766 // CHECK17-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 4
9767 // CHECK17-NEXT:    store ptr [[TMP93]], ptr [[TMP102]], align 8
9768 // CHECK17-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 5
9769 // CHECK17-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP103]], align 8
9770 // CHECK17-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 6
9771 // CHECK17-NEXT:    store ptr null, ptr [[TMP104]], align 8
9772 // CHECK17-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 7
9773 // CHECK17-NEXT:    store ptr null, ptr [[TMP105]], align 8
9774 // CHECK17-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 8
9775 // CHECK17-NEXT:    store i64 [[TMP97]], ptr [[TMP106]], align 8
9776 // CHECK17-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 9
9777 // CHECK17-NEXT:    store i64 0, ptr [[TMP107]], align 8
9778 // CHECK17-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 10
9779 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP108]], align 4
9780 // CHECK17-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 11
9781 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP109]], align 4
9782 // CHECK17-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 12
9783 // CHECK17-NEXT:    store i32 0, ptr [[TMP110]], align 4
9784 // CHECK17-NEXT:    [[TMP111:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, ptr [[KERNEL_ARGS30]])
9785 // CHECK17-NEXT:    [[TMP112:%.*]] = icmp ne i32 [[TMP111]], 0
9786 // CHECK17-NEXT:    br i1 [[TMP112]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]
9787 // CHECK17:       omp_offload.failed31:
9788 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i64 [[TMP74]], i64 [[TMP76]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4]]
9789 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT32]]
9790 // CHECK17:       omp_offload.cont32:
9791 // CHECK17-NEXT:    [[TMP113:%.*]] = load i32, ptr [[N]], align 4
9792 // CHECK17-NEXT:    store i32 [[TMP113]], ptr [[N_CASTED33]], align 4
9793 // CHECK17-NEXT:    [[TMP114:%.*]] = load i64, ptr [[N_CASTED33]], align 8
9794 // CHECK17-NEXT:    [[TMP115:%.*]] = mul nuw i64 [[TMP1]], 4
9795 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES37]], ptr align 8 @.offload_sizes.5, i64 24, i1 false)
9796 // CHECK17-NEXT:    [[TMP116:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
9797 // CHECK17-NEXT:    store i64 [[TMP114]], ptr [[TMP116]], align 8
9798 // CHECK17-NEXT:    [[TMP117:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
9799 // CHECK17-NEXT:    store i64 [[TMP114]], ptr [[TMP117]], align 8
9800 // CHECK17-NEXT:    [[TMP118:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 0
9801 // CHECK17-NEXT:    store ptr null, ptr [[TMP118]], align 8
9802 // CHECK17-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1
9803 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP119]], align 8
9804 // CHECK17-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 1
9805 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP120]], align 8
9806 // CHECK17-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 1
9807 // CHECK17-NEXT:    store ptr null, ptr [[TMP121]], align 8
9808 // CHECK17-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2
9809 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP122]], align 8
9810 // CHECK17-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 2
9811 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP123]], align 8
9812 // CHECK17-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 2
9813 // CHECK17-NEXT:    store i64 [[TMP115]], ptr [[TMP124]], align 8
9814 // CHECK17-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i64 0, i64 2
9815 // CHECK17-NEXT:    store ptr null, ptr [[TMP125]], align 8
9816 // CHECK17-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
9817 // CHECK17-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
9818 // CHECK17-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 0
9819 // CHECK17-NEXT:    [[TMP129:%.*]] = load i32, ptr [[N]], align 4
9820 // CHECK17-NEXT:    store i32 [[TMP129]], ptr [[DOTCAPTURE_EXPR_39]], align 4
9821 // CHECK17-NEXT:    [[TMP130:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_39]], align 4
9822 // CHECK17-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[TMP130]], 0
9823 // CHECK17-NEXT:    [[DIV42:%.*]] = sdiv i32 [[SUB41]], 1
9824 // CHECK17-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[DIV42]], 1
9825 // CHECK17-NEXT:    store i32 [[SUB43]], ptr [[DOTCAPTURE_EXPR_40]], align 4
9826 // CHECK17-NEXT:    [[TMP131:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
9827 // CHECK17-NEXT:    [[ADD44:%.*]] = add nsw i32 [[TMP131]], 1
9828 // CHECK17-NEXT:    [[TMP132:%.*]] = zext i32 [[ADD44]] to i64
9829 // CHECK17-NEXT:    [[TMP133:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 0
9830 // CHECK17-NEXT:    store i32 2, ptr [[TMP133]], align 4
9831 // CHECK17-NEXT:    [[TMP134:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 1
9832 // CHECK17-NEXT:    store i32 3, ptr [[TMP134]], align 4
9833 // CHECK17-NEXT:    [[TMP135:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 2
9834 // CHECK17-NEXT:    store ptr [[TMP126]], ptr [[TMP135]], align 8
9835 // CHECK17-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 3
9836 // CHECK17-NEXT:    store ptr [[TMP127]], ptr [[TMP136]], align 8
9837 // CHECK17-NEXT:    [[TMP137:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 4
9838 // CHECK17-NEXT:    store ptr [[TMP128]], ptr [[TMP137]], align 8
9839 // CHECK17-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 5
9840 // CHECK17-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP138]], align 8
9841 // CHECK17-NEXT:    [[TMP139:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 6
9842 // CHECK17-NEXT:    store ptr null, ptr [[TMP139]], align 8
9843 // CHECK17-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 7
9844 // CHECK17-NEXT:    store ptr null, ptr [[TMP140]], align 8
9845 // CHECK17-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 8
9846 // CHECK17-NEXT:    store i64 [[TMP132]], ptr [[TMP141]], align 8
9847 // CHECK17-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 9
9848 // CHECK17-NEXT:    store i64 0, ptr [[TMP142]], align 8
9849 // CHECK17-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 10
9850 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP143]], align 4
9851 // CHECK17-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 11
9852 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP144]], align 4
9853 // CHECK17-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 12
9854 // CHECK17-NEXT:    store i32 0, ptr [[TMP145]], align 4
9855 // CHECK17-NEXT:    [[TMP146:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, ptr [[KERNEL_ARGS45]])
9856 // CHECK17-NEXT:    [[TMP147:%.*]] = icmp ne i32 [[TMP146]], 0
9857 // CHECK17-NEXT:    br i1 [[TMP147]], label [[OMP_OFFLOAD_FAILED46:%.*]], label [[OMP_OFFLOAD_CONT47:%.*]]
9858 // CHECK17:       omp_offload.failed46:
9859 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i64 [[TMP114]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4]]
9860 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT47]]
9861 // CHECK17:       omp_offload.cont47:
9862 // CHECK17-NEXT:    [[TMP148:%.*]] = load i32, ptr [[M]], align 4
9863 // CHECK17-NEXT:    store i32 [[TMP148]], ptr [[M_CASTED48]], align 4
9864 // CHECK17-NEXT:    [[TMP149:%.*]] = load i64, ptr [[M_CASTED48]], align 8
9865 // CHECK17-NEXT:    [[TMP150:%.*]] = load i32, ptr [[N]], align 4
9866 // CHECK17-NEXT:    store i32 [[TMP150]], ptr [[N_CASTED49]], align 4
9867 // CHECK17-NEXT:    [[TMP151:%.*]] = load i64, ptr [[N_CASTED49]], align 8
9868 // CHECK17-NEXT:    [[TMP152:%.*]] = mul nuw i64 [[TMP1]], 4
9869 // CHECK17-NEXT:    call void @llvm.memcpy.p0.p0.i64(ptr align 8 [[DOTOFFLOAD_SIZES53]], ptr align 8 @.offload_sizes.7, i64 32, i1 false)
9870 // CHECK17-NEXT:    [[TMP153:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
9871 // CHECK17-NEXT:    store i64 [[TMP149]], ptr [[TMP153]], align 8
9872 // CHECK17-NEXT:    [[TMP154:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
9873 // CHECK17-NEXT:    store i64 [[TMP149]], ptr [[TMP154]], align 8
9874 // CHECK17-NEXT:    [[TMP155:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 0
9875 // CHECK17-NEXT:    store ptr null, ptr [[TMP155]], align 8
9876 // CHECK17-NEXT:    [[TMP156:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1
9877 // CHECK17-NEXT:    store i64 [[TMP151]], ptr [[TMP156]], align 8
9878 // CHECK17-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 1
9879 // CHECK17-NEXT:    store i64 [[TMP151]], ptr [[TMP157]], align 8
9880 // CHECK17-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 1
9881 // CHECK17-NEXT:    store ptr null, ptr [[TMP158]], align 8
9882 // CHECK17-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2
9883 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP159]], align 8
9884 // CHECK17-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 2
9885 // CHECK17-NEXT:    store i64 [[TMP1]], ptr [[TMP160]], align 8
9886 // CHECK17-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 2
9887 // CHECK17-NEXT:    store ptr null, ptr [[TMP161]], align 8
9888 // CHECK17-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3
9889 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP162]], align 8
9890 // CHECK17-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 3
9891 // CHECK17-NEXT:    store ptr [[VLA]], ptr [[TMP163]], align 8
9892 // CHECK17-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 3
9893 // CHECK17-NEXT:    store i64 [[TMP152]], ptr [[TMP164]], align 8
9894 // CHECK17-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i64 0, i64 3
9895 // CHECK17-NEXT:    store ptr null, ptr [[TMP165]], align 8
9896 // CHECK17-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
9897 // CHECK17-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
9898 // CHECK17-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 0
9899 // CHECK17-NEXT:    [[TMP169:%.*]] = load i32, ptr [[N]], align 4
9900 // CHECK17-NEXT:    store i32 [[TMP169]], ptr [[DOTCAPTURE_EXPR_55]], align 4
9901 // CHECK17-NEXT:    [[TMP170:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_55]], align 4
9902 // CHECK17-NEXT:    [[SUB57:%.*]] = sub nsw i32 [[TMP170]], 0
9903 // CHECK17-NEXT:    [[DIV58:%.*]] = sdiv i32 [[SUB57]], 1
9904 // CHECK17-NEXT:    [[SUB59:%.*]] = sub nsw i32 [[DIV58]], 1
9905 // CHECK17-NEXT:    store i32 [[SUB59]], ptr [[DOTCAPTURE_EXPR_56]], align 4
9906 // CHECK17-NEXT:    [[TMP171:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_56]], align 4
9907 // CHECK17-NEXT:    [[ADD60:%.*]] = add nsw i32 [[TMP171]], 1
9908 // CHECK17-NEXT:    [[TMP172:%.*]] = zext i32 [[ADD60]] to i64
9909 // CHECK17-NEXT:    [[TMP173:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 0
9910 // CHECK17-NEXT:    store i32 2, ptr [[TMP173]], align 4
9911 // CHECK17-NEXT:    [[TMP174:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1
9912 // CHECK17-NEXT:    store i32 4, ptr [[TMP174]], align 4
9913 // CHECK17-NEXT:    [[TMP175:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 2
9914 // CHECK17-NEXT:    store ptr [[TMP166]], ptr [[TMP175]], align 8
9915 // CHECK17-NEXT:    [[TMP176:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 3
9916 // CHECK17-NEXT:    store ptr [[TMP167]], ptr [[TMP176]], align 8
9917 // CHECK17-NEXT:    [[TMP177:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 4
9918 // CHECK17-NEXT:    store ptr [[TMP168]], ptr [[TMP177]], align 8
9919 // CHECK17-NEXT:    [[TMP178:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 5
9920 // CHECK17-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP178]], align 8
9921 // CHECK17-NEXT:    [[TMP179:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 6
9922 // CHECK17-NEXT:    store ptr null, ptr [[TMP179]], align 8
9923 // CHECK17-NEXT:    [[TMP180:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 7
9924 // CHECK17-NEXT:    store ptr null, ptr [[TMP180]], align 8
9925 // CHECK17-NEXT:    [[TMP181:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 8
9926 // CHECK17-NEXT:    store i64 [[TMP172]], ptr [[TMP181]], align 8
9927 // CHECK17-NEXT:    [[TMP182:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 9
9928 // CHECK17-NEXT:    store i64 0, ptr [[TMP182]], align 8
9929 // CHECK17-NEXT:    [[TMP183:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 10
9930 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP183]], align 4
9931 // CHECK17-NEXT:    [[TMP184:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 11
9932 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP184]], align 4
9933 // CHECK17-NEXT:    [[TMP185:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 12
9934 // CHECK17-NEXT:    store i32 0, ptr [[TMP185]], align 4
9935 // CHECK17-NEXT:    [[TMP186:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, ptr [[KERNEL_ARGS61]])
9936 // CHECK17-NEXT:    [[TMP187:%.*]] = icmp ne i32 [[TMP186]], 0
9937 // CHECK17-NEXT:    br i1 [[TMP187]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]
9938 // CHECK17:       omp_offload.failed62:
9939 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i64 [[TMP149]], i64 [[TMP151]], i64 [[TMP1]], ptr [[VLA]]) #[[ATTR4]]
9940 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT63]]
9941 // CHECK17:       omp_offload.cont63:
9942 // CHECK17-NEXT:    [[TMP188:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
9943 // CHECK17-NEXT:    [[CALL:%.*]] = call noundef signext i32 @_Z5tmainIiLi10EEiT_(i32 noundef signext [[TMP188]])
9944 // CHECK17-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
9945 // CHECK17-NEXT:    [[TMP189:%.*]] = load ptr, ptr [[SAVED_STACK]], align 8
9946 // CHECK17-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP189]])
9947 // CHECK17-NEXT:    [[TMP190:%.*]] = load i32, ptr [[RETVAL]], align 4
9948 // CHECK17-NEXT:    ret i32 [[TMP190]]
9949 //
9950 //
9951 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
9952 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
9953 // CHECK17-NEXT:  entry:
9954 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
9955 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
9956 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
9957 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
9958 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
9959 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
9960 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
9961 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
9962 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])
9963 // CHECK17-NEXT:    ret void
9964 //
9965 //
9966 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined
9967 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
9968 // CHECK17-NEXT:  entry:
9969 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
9970 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
9971 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
9972 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
9973 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
9974 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
9975 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
9976 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
9977 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
9978 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
9979 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
9980 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
9981 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
9982 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
9983 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
9984 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
9985 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
9986 // CHECK17-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
9987 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
9988 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
9989 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
9990 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
9991 // CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
9992 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
9993 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
9994 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
9995 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
9996 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
9997 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
9998 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
9999 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10000 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10001 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10002 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10003 // CHECK17:       omp.precond.then:
10004 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10005 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10006 // CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
10007 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10008 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10009 // CHECK17-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10010 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
10011 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10012 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10013 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10014 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10015 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10016 // CHECK17:       cond.true:
10017 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10018 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10019 // CHECK17:       cond.false:
10020 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10021 // CHECK17-NEXT:    br label [[COND_END]]
10022 // CHECK17:       cond.end:
10023 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10024 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10025 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10026 // CHECK17-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
10027 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10028 // CHECK17:       omp.inner.for.cond:
10029 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10030 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10031 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10032 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10033 // CHECK17:       omp.inner.for.body:
10034 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10035 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10036 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10037 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10038 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])
10039 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10040 // CHECK17:       omp.inner.for.inc:
10041 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10042 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10043 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10044 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
10045 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10046 // CHECK17:       omp.inner.for.end:
10047 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10048 // CHECK17:       omp.loop.exit:
10049 // CHECK17-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10050 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
10051 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
10052 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10053 // CHECK17:       omp.precond.end:
10054 // CHECK17-NEXT:    ret void
10055 //
10056 //
10057 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined
10058 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
10059 // CHECK17-NEXT:  entry:
10060 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10061 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10062 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10063 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10064 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
10065 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10066 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10067 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10068 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10069 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10070 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10071 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10072 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10073 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10074 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10075 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10076 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
10077 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10078 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10079 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10080 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10081 // CHECK17-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
10082 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10083 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10084 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
10085 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10086 // CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10087 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
10088 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
10089 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10090 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10091 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10092 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10093 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10094 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10095 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10096 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10097 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10098 // CHECK17:       omp.precond.then:
10099 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
10100 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10101 // CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
10102 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10103 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
10104 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10105 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
10106 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
10107 // CHECK17-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
10108 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10109 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10110 // CHECK17-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10111 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
10112 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10113 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10114 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10115 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
10116 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10117 // CHECK17:       cond.true:
10118 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10119 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10120 // CHECK17:       cond.false:
10121 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10122 // CHECK17-NEXT:    br label [[COND_END]]
10123 // CHECK17:       cond.end:
10124 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
10125 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
10126 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10127 // CHECK17-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
10128 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10129 // CHECK17:       omp.inner.for.cond:
10130 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10131 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10132 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10133 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10134 // CHECK17:       omp.inner.for.body:
10135 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10136 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10137 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10138 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
10139 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4
10140 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10141 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
10142 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
10143 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10144 // CHECK17:       omp.body.continue:
10145 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10146 // CHECK17:       omp.inner.for.inc:
10147 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10148 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
10149 // CHECK17-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
10150 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10151 // CHECK17:       omp.inner.for.end:
10152 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10153 // CHECK17:       omp.loop.exit:
10154 // CHECK17-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10155 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
10156 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
10157 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10158 // CHECK17:       omp.precond.end:
10159 // CHECK17-NEXT:    ret void
10160 //
10161 //
10162 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
10163 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10164 // CHECK17-NEXT:  entry:
10165 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10166 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10167 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10168 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10169 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10170 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10171 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10172 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10173 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])
10174 // CHECK17-NEXT:    ret void
10175 //
10176 //
10177 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined
10178 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
10179 // CHECK17-NEXT:  entry:
10180 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10181 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10182 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
10183 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10184 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10185 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10186 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10187 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10188 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10189 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10190 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10191 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10192 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10193 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10194 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
10195 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10196 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10197 // CHECK17-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
10198 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10199 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10200 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
10201 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10202 // CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10203 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
10204 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
10205 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10206 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10207 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10208 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10209 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10210 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10211 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10212 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10213 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10214 // CHECK17:       omp.precond.then:
10215 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10216 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10217 // CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
10218 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10219 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10220 // CHECK17-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10221 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
10222 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10223 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10224 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10225 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10226 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10227 // CHECK17:       cond.true:
10228 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10229 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10230 // CHECK17:       cond.false:
10231 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10232 // CHECK17-NEXT:    br label [[COND_END]]
10233 // CHECK17:       cond.end:
10234 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10235 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10236 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10237 // CHECK17-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
10238 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10239 // CHECK17:       omp.inner.for.cond:
10240 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10241 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10242 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10243 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10244 // CHECK17:       omp.inner.for.body:
10245 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10246 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10247 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10248 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10249 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])
10250 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10251 // CHECK17:       omp.inner.for.inc:
10252 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10253 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10254 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10255 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
10256 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10257 // CHECK17:       omp.inner.for.end:
10258 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10259 // CHECK17:       omp.loop.exit:
10260 // CHECK17-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10261 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
10262 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
10263 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10264 // CHECK17:       omp.precond.end:
10265 // CHECK17-NEXT:    ret void
10266 //
10267 //
10268 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined
10269 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
10270 // CHECK17-NEXT:  entry:
10271 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10272 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10273 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10274 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10275 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
10276 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10277 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10278 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10279 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10280 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10281 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10282 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10283 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10284 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10285 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10286 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10287 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
10288 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10289 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10290 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10291 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10292 // CHECK17-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
10293 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10294 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10295 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
10296 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10297 // CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10298 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
10299 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
10300 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10301 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10302 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10303 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10304 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10305 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10306 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10307 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10308 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10309 // CHECK17:       omp.precond.then:
10310 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
10311 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10312 // CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
10313 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10314 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
10315 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10316 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
10317 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
10318 // CHECK17-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
10319 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10320 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10321 // CHECK17-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10322 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
10323 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10324 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10325 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10326 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
10327 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10328 // CHECK17:       cond.true:
10329 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10330 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10331 // CHECK17:       cond.false:
10332 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10333 // CHECK17-NEXT:    br label [[COND_END]]
10334 // CHECK17:       cond.end:
10335 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
10336 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
10337 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10338 // CHECK17-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
10339 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10340 // CHECK17:       omp.inner.for.cond:
10341 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10342 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10343 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10344 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10345 // CHECK17:       omp.inner.for.body:
10346 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10347 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10348 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10349 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
10350 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4
10351 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10352 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
10353 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
10354 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10355 // CHECK17:       omp.body.continue:
10356 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10357 // CHECK17:       omp.inner.for.inc:
10358 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10359 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
10360 // CHECK17-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
10361 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10362 // CHECK17:       omp.inner.for.end:
10363 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10364 // CHECK17:       omp.loop.exit:
10365 // CHECK17-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10366 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
10367 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
10368 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10369 // CHECK17:       omp.precond.end:
10370 // CHECK17-NEXT:    ret void
10371 //
10372 //
10373 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
10374 // CHECK17-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10375 // CHECK17-NEXT:  entry:
10376 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
10377 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10378 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10379 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10380 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10381 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10382 // CHECK17-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8
10383 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10384 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10385 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10386 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10387 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10388 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 4
10389 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
10390 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10391 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
10392 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
10393 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]])
10394 // CHECK17-NEXT:    ret void
10395 //
10396 //
10397 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined
10398 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
10399 // CHECK17-NEXT:  entry:
10400 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10401 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10402 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
10403 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10404 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10405 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10406 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10407 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10408 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10409 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10410 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10411 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10412 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10413 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10414 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10415 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
10416 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10417 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10418 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10419 // CHECK17-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
10420 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10421 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10422 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
10423 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
10424 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10425 // CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10426 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
10427 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10428 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10429 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10430 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10431 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10432 // CHECK17-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
10433 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10434 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10435 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10436 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10437 // CHECK17:       omp.precond.then:
10438 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10439 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10440 // CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
10441 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10442 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10443 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
10444 // CHECK17-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10445 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
10446 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
10447 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10448 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10449 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
10450 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10451 // CHECK17:       cond.true:
10452 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10453 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10454 // CHECK17:       cond.false:
10455 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10456 // CHECK17-NEXT:    br label [[COND_END]]
10457 // CHECK17:       cond.end:
10458 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
10459 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10460 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10461 // CHECK17-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
10462 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10463 // CHECK17:       omp.inner.for.cond:
10464 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10465 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10466 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
10467 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
10468 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10469 // CHECK17:       omp.inner.for.body:
10470 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10471 // CHECK17-NEXT:    [[TMP18:%.*]] = zext i32 [[TMP17]] to i64
10472 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10473 // CHECK17-NEXT:    [[TMP20:%.*]] = zext i32 [[TMP19]] to i64
10474 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
10475 // CHECK17-NEXT:    store i32 [[TMP21]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
10476 // CHECK17-NEXT:    [[TMP22:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
10477 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined, i64 [[TMP18]], i64 [[TMP20]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]], i64 [[TMP22]])
10478 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10479 // CHECK17:       omp.inner.for.inc:
10480 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10481 // CHECK17-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10482 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
10483 // CHECK17-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
10484 // CHECK17-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10485 // CHECK17-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10486 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
10487 // CHECK17-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4
10488 // CHECK17-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10489 // CHECK17-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10490 // CHECK17-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP27]], [[TMP28]]
10491 // CHECK17-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4
10492 // CHECK17-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10493 // CHECK17-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10494 // CHECK17-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP29]], [[TMP30]]
10495 // CHECK17-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
10496 // CHECK17:       cond.true11:
10497 // CHECK17-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10498 // CHECK17-NEXT:    br label [[COND_END13:%.*]]
10499 // CHECK17:       cond.false12:
10500 // CHECK17-NEXT:    [[TMP32:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10501 // CHECK17-NEXT:    br label [[COND_END13]]
10502 // CHECK17:       cond.end13:
10503 // CHECK17-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP31]], [[COND_TRUE11]] ], [ [[TMP32]], [[COND_FALSE12]] ]
10504 // CHECK17-NEXT:    store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4
10505 // CHECK17-NEXT:    [[TMP33:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10506 // CHECK17-NEXT:    store i32 [[TMP33]], ptr [[DOTOMP_IV]], align 4
10507 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10508 // CHECK17:       omp.inner.for.end:
10509 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10510 // CHECK17:       omp.loop.exit:
10511 // CHECK17-NEXT:    [[TMP34:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10512 // CHECK17-NEXT:    [[TMP35:%.*]] = load i32, ptr [[TMP34]], align 4
10513 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP35]])
10514 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10515 // CHECK17:       omp.precond.end:
10516 // CHECK17-NEXT:    ret void
10517 //
10518 //
10519 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined
10520 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
10521 // CHECK17-NEXT:  entry:
10522 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10523 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10524 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10525 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10526 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
10527 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10528 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10529 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10530 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10531 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10532 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10533 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10534 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10535 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10536 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10537 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10538 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10539 // CHECK17-NEXT:    [[I5:%.*]] = alloca i32, align 4
10540 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10541 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10542 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10543 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10544 // CHECK17-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
10545 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10546 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10547 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
10548 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
10549 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10550 // CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10551 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
10552 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10553 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10554 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10555 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10556 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10557 // CHECK17-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
10558 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10559 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10560 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10561 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10562 // CHECK17:       omp.precond.then:
10563 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
10564 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10565 // CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
10566 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10567 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
10568 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10569 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
10570 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
10571 // CHECK17-NEXT:    store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4
10572 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10573 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10574 // CHECK17-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10575 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
10576 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10577 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10578 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10579 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
10580 // CHECK17-NEXT:    br i1 [[CMP6]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10581 // CHECK17:       cond.true:
10582 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10583 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10584 // CHECK17:       cond.false:
10585 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10586 // CHECK17-NEXT:    br label [[COND_END]]
10587 // CHECK17:       cond.end:
10588 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
10589 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
10590 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10591 // CHECK17-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
10592 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10593 // CHECK17:       omp.inner.for.cond:
10594 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10595 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10596 // CHECK17-NEXT:    [[CMP7:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
10597 // CHECK17-NEXT:    br i1 [[CMP7]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10598 // CHECK17:       omp.inner.for.body:
10599 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10600 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
10601 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10602 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I5]], align 4
10603 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I5]], align 4
10604 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP19]] to i64
10605 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
10606 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
10607 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10608 // CHECK17:       omp.body.continue:
10609 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10610 // CHECK17:       omp.inner.for.inc:
10611 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10612 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], 1
10613 // CHECK17-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_IV]], align 4
10614 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10615 // CHECK17:       omp.inner.for.end:
10616 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10617 // CHECK17:       omp.loop.exit:
10618 // CHECK17-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10619 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
10620 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
10621 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10622 // CHECK17:       omp.precond.end:
10623 // CHECK17-NEXT:    ret void
10624 //
10625 //
10626 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
10627 // CHECK17-SAME: (i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10628 // CHECK17-NEXT:  entry:
10629 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10630 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10631 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10632 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10633 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10634 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10635 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10636 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10637 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]])
10638 // CHECK17-NEXT:    ret void
10639 //
10640 //
10641 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined
10642 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
10643 // CHECK17-NEXT:  entry:
10644 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10645 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10646 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
10647 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10648 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10649 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10650 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10651 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10652 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10653 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10654 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10655 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10656 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10657 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10658 // CHECK17-NEXT:    [[I3:%.*]] = alloca i32, align 4
10659 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10660 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10661 // CHECK17-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
10662 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10663 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10664 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
10665 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10666 // CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10667 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
10668 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
10669 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10670 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10671 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10672 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10673 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10674 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10675 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10676 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10677 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10678 // CHECK17:       omp.precond.then:
10679 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10680 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10681 // CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
10682 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10683 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10684 // CHECK17-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10685 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
10686 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10687 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10688 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10689 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10690 // CHECK17-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10691 // CHECK17:       cond.true:
10692 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10693 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10694 // CHECK17:       cond.false:
10695 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10696 // CHECK17-NEXT:    br label [[COND_END]]
10697 // CHECK17:       cond.end:
10698 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10699 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10700 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10701 // CHECK17-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
10702 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10703 // CHECK17:       omp.inner.for.cond:
10704 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10705 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10706 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10707 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10708 // CHECK17:       omp.inner.for.body:
10709 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10710 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10711 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10712 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10713 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]])
10714 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10715 // CHECK17:       omp.inner.for.inc:
10716 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10717 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10718 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
10719 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
10720 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10721 // CHECK17:       omp.inner.for.end:
10722 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10723 // CHECK17:       omp.loop.exit:
10724 // CHECK17-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10725 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
10726 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
10727 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10728 // CHECK17:       omp.precond.end:
10729 // CHECK17-NEXT:    ret void
10730 //
10731 //
10732 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined
10733 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
10734 // CHECK17-NEXT:  entry:
10735 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10736 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10737 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10738 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10739 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
10740 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10741 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10742 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10743 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10744 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10745 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10746 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10747 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10748 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10749 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10750 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10751 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
10752 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10753 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10754 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10755 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10756 // CHECK17-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
10757 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10758 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10759 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
10760 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10761 // CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10762 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
10763 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
10764 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10765 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10766 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10767 // CHECK17-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
10768 // CHECK17-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10769 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10770 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10771 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10772 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10773 // CHECK17:       omp.precond.then:
10774 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
10775 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10776 // CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
10777 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10778 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
10779 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10780 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
10781 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
10782 // CHECK17-NEXT:    store i32 [[CONV3]], ptr [[DOTOMP_UB]], align 4
10783 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10784 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10785 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10786 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
10787 // CHECK17-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10788 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
10789 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
10790 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
10791 // CHECK17:       omp.dispatch.cond:
10792 // CHECK17-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10793 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
10794 // CHECK17-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
10795 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
10796 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
10797 // CHECK17:       omp.dispatch.body:
10798 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
10799 // CHECK17-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
10800 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10801 // CHECK17:       omp.inner.for.cond:
10802 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15:![0-9]+]]
10803 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP15]]
10804 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
10805 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10806 // CHECK17:       omp.inner.for.body:
10807 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
10808 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
10809 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
10810 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]
10811 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP15]]
10812 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP20]] to i64
10813 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
10814 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP15]]
10815 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
10816 // CHECK17:       omp.body.continue:
10817 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10818 // CHECK17:       omp.inner.for.inc:
10819 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
10820 // CHECK17-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP21]], 1
10821 // CHECK17-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP15]]
10822 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP16:![0-9]+]]
10823 // CHECK17:       omp.inner.for.end:
10824 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
10825 // CHECK17:       omp.dispatch.inc:
10826 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
10827 // CHECK17:       omp.dispatch.end:
10828 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10829 // CHECK17:       omp.precond.end:
10830 // CHECK17-NEXT:    ret void
10831 //
10832 //
10833 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
10834 // CHECK17-SAME: (i64 noundef [[M:%.*]], i64 noundef [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
10835 // CHECK17-NEXT:  entry:
10836 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
10837 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca i64, align 8
10838 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10839 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10840 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
10841 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10842 // CHECK17-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8
10843 // CHECK17-NEXT:    store i64 [[N]], ptr [[N_ADDR]], align 8
10844 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10845 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10846 // CHECK17-NEXT:    [[TMP0:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10847 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10848 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 4
10849 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
10850 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
10851 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
10852 // CHECK17-NEXT:    [[TMP4:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
10853 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined, ptr [[N_ADDR]], i64 [[TMP0]], ptr [[TMP1]], i64 [[TMP4]])
10854 // CHECK17-NEXT:    ret void
10855 //
10856 //
10857 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined
10858 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
10859 // CHECK17-NEXT:  entry:
10860 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10861 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10862 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
10863 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10864 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10865 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10866 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10867 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10868 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10869 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10870 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10871 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
10872 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
10873 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10874 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10875 // CHECK17-NEXT:    [[I4:%.*]] = alloca i32, align 4
10876 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
10877 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10878 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10879 // CHECK17-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
10880 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10881 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10882 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
10883 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
10884 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10885 // CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10886 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
10887 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10888 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10889 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10890 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10891 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10892 // CHECK17-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
10893 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10894 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10895 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10896 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10897 // CHECK17:       omp.precond.then:
10898 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
10899 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10900 // CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
10901 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
10902 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
10903 // CHECK17-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10904 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
10905 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
10906 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10907 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10908 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
10909 // CHECK17-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
10910 // CHECK17:       cond.true:
10911 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
10912 // CHECK17-NEXT:    br label [[COND_END:%.*]]
10913 // CHECK17:       cond.false:
10914 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10915 // CHECK17-NEXT:    br label [[COND_END]]
10916 // CHECK17:       cond.end:
10917 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
10918 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
10919 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10920 // CHECK17-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
10921 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
10922 // CHECK17:       omp.inner.for.cond:
10923 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10924 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10925 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
10926 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
10927 // CHECK17:       omp.inner.for.body:
10928 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
10929 // CHECK17-NEXT:    [[TMP17:%.*]] = zext i32 [[TMP16]] to i64
10930 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
10931 // CHECK17-NEXT:    [[TMP19:%.*]] = zext i32 [[TMP18]] to i64
10932 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
10933 // CHECK17-NEXT:    store i32 [[TMP20]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
10934 // CHECK17-NEXT:    [[TMP21:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
10935 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined, i64 [[TMP17]], i64 [[TMP19]], ptr [[TMP0]], i64 [[TMP1]], ptr [[TMP2]], i64 [[TMP21]])
10936 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
10937 // CHECK17:       omp.inner.for.inc:
10938 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
10939 // CHECK17-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
10940 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP22]], [[TMP23]]
10941 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
10942 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
10943 // CHECK17:       omp.inner.for.end:
10944 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
10945 // CHECK17:       omp.loop.exit:
10946 // CHECK17-NEXT:    [[TMP24:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
10947 // CHECK17-NEXT:    [[TMP25:%.*]] = load i32, ptr [[TMP24]], align 4
10948 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP25]])
10949 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
10950 // CHECK17:       omp.precond.end:
10951 // CHECK17-NEXT:    ret void
10952 //
10953 //
10954 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined
10955 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i64 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
10956 // CHECK17-NEXT:  entry:
10957 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
10958 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
10959 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
10960 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
10961 // CHECK17-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 8
10962 // CHECK17-NEXT:    [[VLA_ADDR:%.*]] = alloca i64, align 8
10963 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
10964 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
10965 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
10966 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
10967 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
10968 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
10969 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
10970 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
10971 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
10972 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
10973 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
10974 // CHECK17-NEXT:    [[I5:%.*]] = alloca i32, align 4
10975 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
10976 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
10977 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
10978 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
10979 // CHECK17-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 8
10980 // CHECK17-NEXT:    store i64 [[VLA]], ptr [[VLA_ADDR]], align 8
10981 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
10982 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
10983 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 8
10984 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[VLA_ADDR]], align 8
10985 // CHECK17-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 8
10986 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
10987 // CHECK17-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
10988 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10989 // CHECK17-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
10990 // CHECK17-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
10991 // CHECK17-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
10992 // CHECK17-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
10993 // CHECK17-NEXT:    store i32 0, ptr [[I]], align 4
10994 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
10995 // CHECK17-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
10996 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
10997 // CHECK17:       omp.precond.then:
10998 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
10999 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
11000 // CHECK17-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
11001 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11002 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP7]] to i32
11003 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11004 // CHECK17-NEXT:    [[CONV4:%.*]] = trunc i64 [[TMP8]] to i32
11005 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
11006 // CHECK17-NEXT:    store i32 [[CONV4]], ptr [[DOTOMP_UB]], align 4
11007 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11008 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11009 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
11010 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11011 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11012 // CHECK17-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11013 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
11014 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
11015 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11016 // CHECK17:       omp.dispatch.cond:
11017 // CHECK17-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11018 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
11019 // CHECK17-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
11020 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
11021 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11022 // CHECK17:       omp.dispatch.body:
11023 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11024 // CHECK17-NEXT:    store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4
11025 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11026 // CHECK17:       omp.inner.for.cond:
11027 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18:![0-9]+]]
11028 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP18]]
11029 // CHECK17-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
11030 // CHECK17-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11031 // CHECK17:       omp.inner.for.body:
11032 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
11033 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
11034 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11035 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]
11036 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I5]], align 4, !llvm.access.group [[ACC_GRP18]]
11037 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP21]] to i64
11038 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i64 [[IDXPROM]]
11039 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP18]]
11040 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11041 // CHECK17:       omp.body.continue:
11042 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11043 // CHECK17:       omp.inner.for.inc:
11044 // CHECK17-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
11045 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP22]], 1
11046 // CHECK17-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP18]]
11047 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP19:![0-9]+]]
11048 // CHECK17:       omp.inner.for.end:
11049 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11050 // CHECK17:       omp.dispatch.inc:
11051 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
11052 // CHECK17:       omp.dispatch.end:
11053 // CHECK17-NEXT:    br label [[OMP_PRECOND_END]]
11054 // CHECK17:       omp.precond.end:
11055 // CHECK17-NEXT:    ret void
11056 //
11057 //
11058 // CHECK17-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
11059 // CHECK17-SAME: (i32 noundef signext [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
11060 // CHECK17-NEXT:  entry:
11061 // CHECK17-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
11062 // CHECK17-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
11063 // CHECK17-NEXT:    [[M:%.*]] = alloca i32, align 4
11064 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 8
11065 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 8
11066 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 8
11067 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11068 // CHECK17-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
11069 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 8
11070 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 8
11071 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 8
11072 // CHECK17-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
11073 // CHECK17-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11074 // CHECK17-NEXT:    [[M_CASTED:%.*]] = alloca i64, align 8
11075 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 8
11076 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 8
11077 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 8
11078 // CHECK17-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
11079 // CHECK17-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11080 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 8
11081 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 8
11082 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 8
11083 // CHECK17-NEXT:    [[_TMP18:%.*]] = alloca i32, align 4
11084 // CHECK17-NEXT:    [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11085 // CHECK17-NEXT:    [[M_CASTED22:%.*]] = alloca i64, align 8
11086 // CHECK17-NEXT:    [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [2 x ptr], align 8
11087 // CHECK17-NEXT:    [[DOTOFFLOAD_PTRS24:%.*]] = alloca [2 x ptr], align 8
11088 // CHECK17-NEXT:    [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [2 x ptr], align 8
11089 // CHECK17-NEXT:    [[_TMP26:%.*]] = alloca i32, align 4
11090 // CHECK17-NEXT:    [[KERNEL_ARGS27:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
11091 // CHECK17-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
11092 // CHECK17-NEXT:    store i32 10, ptr [[M]], align 4
11093 // CHECK17-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11094 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP0]], align 8
11095 // CHECK17-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11096 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP1]], align 8
11097 // CHECK17-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i64 0, i64 0
11098 // CHECK17-NEXT:    store ptr null, ptr [[TMP2]], align 8
11099 // CHECK17-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
11100 // CHECK17-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
11101 // CHECK17-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
11102 // CHECK17-NEXT:    store i32 2, ptr [[TMP5]], align 4
11103 // CHECK17-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
11104 // CHECK17-NEXT:    store i32 1, ptr [[TMP6]], align 4
11105 // CHECK17-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
11106 // CHECK17-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 8
11107 // CHECK17-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
11108 // CHECK17-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 8
11109 // CHECK17-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
11110 // CHECK17-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP9]], align 8
11111 // CHECK17-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
11112 // CHECK17-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP10]], align 8
11113 // CHECK17-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
11114 // CHECK17-NEXT:    store ptr null, ptr [[TMP11]], align 8
11115 // CHECK17-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
11116 // CHECK17-NEXT:    store ptr null, ptr [[TMP12]], align 8
11117 // CHECK17-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
11118 // CHECK17-NEXT:    store i64 10, ptr [[TMP13]], align 8
11119 // CHECK17-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
11120 // CHECK17-NEXT:    store i64 0, ptr [[TMP14]], align 8
11121 // CHECK17-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
11122 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
11123 // CHECK17-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
11124 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
11125 // CHECK17-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
11126 // CHECK17-NEXT:    store i32 0, ptr [[TMP17]], align 4
11127 // CHECK17-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS]])
11128 // CHECK17-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
11129 // CHECK17-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
11130 // CHECK17:       omp_offload.failed:
11131 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR4]]
11132 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT]]
11133 // CHECK17:       omp_offload.cont:
11134 // CHECK17-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11135 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP20]], align 8
11136 // CHECK17-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11137 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP21]], align 8
11138 // CHECK17-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i64 0, i64 0
11139 // CHECK17-NEXT:    store ptr null, ptr [[TMP22]], align 8
11140 // CHECK17-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
11141 // CHECK17-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
11142 // CHECK17-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
11143 // CHECK17-NEXT:    store i32 2, ptr [[TMP25]], align 4
11144 // CHECK17-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
11145 // CHECK17-NEXT:    store i32 1, ptr [[TMP26]], align 4
11146 // CHECK17-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
11147 // CHECK17-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 8
11148 // CHECK17-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
11149 // CHECK17-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 8
11150 // CHECK17-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
11151 // CHECK17-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP29]], align 8
11152 // CHECK17-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
11153 // CHECK17-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP30]], align 8
11154 // CHECK17-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
11155 // CHECK17-NEXT:    store ptr null, ptr [[TMP31]], align 8
11156 // CHECK17-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
11157 // CHECK17-NEXT:    store ptr null, ptr [[TMP32]], align 8
11158 // CHECK17-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
11159 // CHECK17-NEXT:    store i64 10, ptr [[TMP33]], align 8
11160 // CHECK17-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
11161 // CHECK17-NEXT:    store i64 0, ptr [[TMP34]], align 8
11162 // CHECK17-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
11163 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
11164 // CHECK17-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
11165 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
11166 // CHECK17-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
11167 // CHECK17-NEXT:    store i32 0, ptr [[TMP37]], align 4
11168 // CHECK17-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, ptr [[KERNEL_ARGS5]])
11169 // CHECK17-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
11170 // CHECK17-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
11171 // CHECK17:       omp_offload.failed6:
11172 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121(ptr [[A]]) #[[ATTR4]]
11173 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
11174 // CHECK17:       omp_offload.cont7:
11175 // CHECK17-NEXT:    [[TMP40:%.*]] = load i32, ptr [[M]], align 4
11176 // CHECK17-NEXT:    store i32 [[TMP40]], ptr [[M_CASTED]], align 4
11177 // CHECK17-NEXT:    [[TMP41:%.*]] = load i64, ptr [[M_CASTED]], align 8
11178 // CHECK17-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
11179 // CHECK17-NEXT:    store i64 [[TMP41]], ptr [[TMP42]], align 8
11180 // CHECK17-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
11181 // CHECK17-NEXT:    store i64 [[TMP41]], ptr [[TMP43]], align 8
11182 // CHECK17-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 0
11183 // CHECK17-NEXT:    store ptr null, ptr [[TMP44]], align 8
11184 // CHECK17-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
11185 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP45]], align 8
11186 // CHECK17-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
11187 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP46]], align 8
11188 // CHECK17-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i64 0, i64 1
11189 // CHECK17-NEXT:    store ptr null, ptr [[TMP47]], align 8
11190 // CHECK17-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
11191 // CHECK17-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
11192 // CHECK17-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
11193 // CHECK17-NEXT:    store i32 2, ptr [[TMP50]], align 4
11194 // CHECK17-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
11195 // CHECK17-NEXT:    store i32 2, ptr [[TMP51]], align 4
11196 // CHECK17-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
11197 // CHECK17-NEXT:    store ptr [[TMP48]], ptr [[TMP52]], align 8
11198 // CHECK17-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
11199 // CHECK17-NEXT:    store ptr [[TMP49]], ptr [[TMP53]], align 8
11200 // CHECK17-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
11201 // CHECK17-NEXT:    store ptr @.offload_sizes.13, ptr [[TMP54]], align 8
11202 // CHECK17-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
11203 // CHECK17-NEXT:    store ptr @.offload_maptypes.14, ptr [[TMP55]], align 8
11204 // CHECK17-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
11205 // CHECK17-NEXT:    store ptr null, ptr [[TMP56]], align 8
11206 // CHECK17-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
11207 // CHECK17-NEXT:    store ptr null, ptr [[TMP57]], align 8
11208 // CHECK17-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
11209 // CHECK17-NEXT:    store i64 10, ptr [[TMP58]], align 8
11210 // CHECK17-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
11211 // CHECK17-NEXT:    store i64 0, ptr [[TMP59]], align 8
11212 // CHECK17-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
11213 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP60]], align 4
11214 // CHECK17-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
11215 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4
11216 // CHECK17-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
11217 // CHECK17-NEXT:    store i32 0, ptr [[TMP62]], align 4
11218 // CHECK17-NEXT:    [[TMP63:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, ptr [[KERNEL_ARGS12]])
11219 // CHECK17-NEXT:    [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 0
11220 // CHECK17-NEXT:    br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
11221 // CHECK17:       omp_offload.failed13:
11222 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i64 [[TMP41]], ptr [[A]]) #[[ATTR4]]
11223 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT14]]
11224 // CHECK17:       omp_offload.cont14:
11225 // CHECK17-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
11226 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP65]], align 8
11227 // CHECK17-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
11228 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP66]], align 8
11229 // CHECK17-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i64 0, i64 0
11230 // CHECK17-NEXT:    store ptr null, ptr [[TMP67]], align 8
11231 // CHECK17-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
11232 // CHECK17-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
11233 // CHECK17-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0
11234 // CHECK17-NEXT:    store i32 2, ptr [[TMP70]], align 4
11235 // CHECK17-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1
11236 // CHECK17-NEXT:    store i32 1, ptr [[TMP71]], align 4
11237 // CHECK17-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2
11238 // CHECK17-NEXT:    store ptr [[TMP68]], ptr [[TMP72]], align 8
11239 // CHECK17-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3
11240 // CHECK17-NEXT:    store ptr [[TMP69]], ptr [[TMP73]], align 8
11241 // CHECK17-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4
11242 // CHECK17-NEXT:    store ptr @.offload_sizes.15, ptr [[TMP74]], align 8
11243 // CHECK17-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5
11244 // CHECK17-NEXT:    store ptr @.offload_maptypes.16, ptr [[TMP75]], align 8
11245 // CHECK17-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6
11246 // CHECK17-NEXT:    store ptr null, ptr [[TMP76]], align 8
11247 // CHECK17-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7
11248 // CHECK17-NEXT:    store ptr null, ptr [[TMP77]], align 8
11249 // CHECK17-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8
11250 // CHECK17-NEXT:    store i64 10, ptr [[TMP78]], align 8
11251 // CHECK17-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9
11252 // CHECK17-NEXT:    store i64 0, ptr [[TMP79]], align 8
11253 // CHECK17-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10
11254 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP80]], align 4
11255 // CHECK17-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11
11256 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4
11257 // CHECK17-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12
11258 // CHECK17-NEXT:    store i32 0, ptr [[TMP82]], align 4
11259 // CHECK17-NEXT:    [[TMP83:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, ptr [[KERNEL_ARGS19]])
11260 // CHECK17-NEXT:    [[TMP84:%.*]] = icmp ne i32 [[TMP83]], 0
11261 // CHECK17-NEXT:    br i1 [[TMP84]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
11262 // CHECK17:       omp_offload.failed20:
11263 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131(ptr [[A]]) #[[ATTR4]]
11264 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT21]]
11265 // CHECK17:       omp_offload.cont21:
11266 // CHECK17-NEXT:    [[TMP85:%.*]] = load i32, ptr [[M]], align 4
11267 // CHECK17-NEXT:    store i32 [[TMP85]], ptr [[M_CASTED22]], align 4
11268 // CHECK17-NEXT:    [[TMP86:%.*]] = load i64, ptr [[M_CASTED22]], align 8
11269 // CHECK17-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
11270 // CHECK17-NEXT:    store i64 [[TMP86]], ptr [[TMP87]], align 8
11271 // CHECK17-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
11272 // CHECK17-NEXT:    store i64 [[TMP86]], ptr [[TMP88]], align 8
11273 // CHECK17-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 0
11274 // CHECK17-NEXT:    store ptr null, ptr [[TMP89]], align 8
11275 // CHECK17-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
11276 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP90]], align 8
11277 // CHECK17-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
11278 // CHECK17-NEXT:    store ptr [[A]], ptr [[TMP91]], align 8
11279 // CHECK17-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i64 0, i64 1
11280 // CHECK17-NEXT:    store ptr null, ptr [[TMP92]], align 8
11281 // CHECK17-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
11282 // CHECK17-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
11283 // CHECK17-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 0
11284 // CHECK17-NEXT:    store i32 2, ptr [[TMP95]], align 4
11285 // CHECK17-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 1
11286 // CHECK17-NEXT:    store i32 2, ptr [[TMP96]], align 4
11287 // CHECK17-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 2
11288 // CHECK17-NEXT:    store ptr [[TMP93]], ptr [[TMP97]], align 8
11289 // CHECK17-NEXT:    [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 3
11290 // CHECK17-NEXT:    store ptr [[TMP94]], ptr [[TMP98]], align 8
11291 // CHECK17-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 4
11292 // CHECK17-NEXT:    store ptr @.offload_sizes.17, ptr [[TMP99]], align 8
11293 // CHECK17-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 5
11294 // CHECK17-NEXT:    store ptr @.offload_maptypes.18, ptr [[TMP100]], align 8
11295 // CHECK17-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 6
11296 // CHECK17-NEXT:    store ptr null, ptr [[TMP101]], align 8
11297 // CHECK17-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 7
11298 // CHECK17-NEXT:    store ptr null, ptr [[TMP102]], align 8
11299 // CHECK17-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 8
11300 // CHECK17-NEXT:    store i64 10, ptr [[TMP103]], align 8
11301 // CHECK17-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 9
11302 // CHECK17-NEXT:    store i64 0, ptr [[TMP104]], align 8
11303 // CHECK17-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 10
11304 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP105]], align 4
11305 // CHECK17-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 11
11306 // CHECK17-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP106]], align 4
11307 // CHECK17-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 12
11308 // CHECK17-NEXT:    store i32 0, ptr [[TMP107]], align 4
11309 // CHECK17-NEXT:    [[TMP108:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, ptr [[KERNEL_ARGS27]])
11310 // CHECK17-NEXT:    [[TMP109:%.*]] = icmp ne i32 [[TMP108]], 0
11311 // CHECK17-NEXT:    br i1 [[TMP109]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
11312 // CHECK17:       omp_offload.failed28:
11313 // CHECK17-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i64 [[TMP86]], ptr [[A]]) #[[ATTR4]]
11314 // CHECK17-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
11315 // CHECK17:       omp_offload.cont29:
11316 // CHECK17-NEXT:    ret i32 0
11317 //
11318 //
11319 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
11320 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11321 // CHECK17-NEXT:  entry:
11322 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11323 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11324 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11325 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])
11326 // CHECK17-NEXT:    ret void
11327 //
11328 //
11329 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined
11330 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
11331 // CHECK17-NEXT:  entry:
11332 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11333 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11334 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11335 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11336 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11337 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11338 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11339 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11340 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11341 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11342 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11343 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11344 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11345 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11346 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11347 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11348 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11349 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11350 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11351 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
11352 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11353 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11354 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11355 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11356 // CHECK17:       cond.true:
11357 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11358 // CHECK17:       cond.false:
11359 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11360 // CHECK17-NEXT:    br label [[COND_END]]
11361 // CHECK17:       cond.end:
11362 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11363 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11364 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11365 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
11366 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11367 // CHECK17:       omp.inner.for.cond:
11368 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11369 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11370 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11371 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11372 // CHECK17:       omp.inner.for.body:
11373 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11374 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11375 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11376 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11377 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
11378 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11379 // CHECK17:       omp.inner.for.inc:
11380 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11381 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11382 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11383 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11384 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11385 // CHECK17:       omp.inner.for.end:
11386 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11387 // CHECK17:       omp.loop.exit:
11388 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
11389 // CHECK17-NEXT:    ret void
11390 //
11391 //
11392 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined
11393 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
11394 // CHECK17-NEXT:  entry:
11395 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11396 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11397 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11398 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11399 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11400 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11401 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11402 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11403 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11404 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11405 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11406 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11407 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11408 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11409 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11410 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11411 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11412 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11413 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
11414 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
11415 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11416 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11417 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11418 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11419 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
11420 // CHECK17-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
11421 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11422 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11423 // CHECK17-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11424 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
11425 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11426 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11427 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11428 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11429 // CHECK17:       cond.true:
11430 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11431 // CHECK17:       cond.false:
11432 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11433 // CHECK17-NEXT:    br label [[COND_END]]
11434 // CHECK17:       cond.end:
11435 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11436 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
11437 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11438 // CHECK17-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
11439 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11440 // CHECK17:       omp.inner.for.cond:
11441 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11442 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11443 // CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11444 // CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11445 // CHECK17:       omp.inner.for.body:
11446 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11447 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11448 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11449 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
11450 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
11451 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11452 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
11453 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
11454 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11455 // CHECK17:       omp.body.continue:
11456 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11457 // CHECK17:       omp.inner.for.inc:
11458 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11459 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11460 // CHECK17-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
11461 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11462 // CHECK17:       omp.inner.for.end:
11463 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11464 // CHECK17:       omp.loop.exit:
11465 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
11466 // CHECK17-NEXT:    ret void
11467 //
11468 //
11469 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
11470 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11471 // CHECK17-NEXT:  entry:
11472 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11473 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11474 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11475 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined, ptr [[TMP0]])
11476 // CHECK17-NEXT:    ret void
11477 //
11478 //
11479 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined
11480 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
11481 // CHECK17-NEXT:  entry:
11482 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11483 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11484 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11485 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11486 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11487 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11488 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11489 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11490 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11491 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11492 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11493 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11494 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11495 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11496 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11497 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11498 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11499 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11500 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11501 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
11502 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11503 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11504 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11505 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11506 // CHECK17:       cond.true:
11507 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11508 // CHECK17:       cond.false:
11509 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11510 // CHECK17-NEXT:    br label [[COND_END]]
11511 // CHECK17:       cond.end:
11512 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11513 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11514 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11515 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
11516 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11517 // CHECK17:       omp.inner.for.cond:
11518 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11519 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11520 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11521 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11522 // CHECK17:       omp.inner.for.body:
11523 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11524 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11525 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11526 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11527 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
11528 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11529 // CHECK17:       omp.inner.for.inc:
11530 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11531 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11532 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11533 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11534 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11535 // CHECK17:       omp.inner.for.end:
11536 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11537 // CHECK17:       omp.loop.exit:
11538 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
11539 // CHECK17-NEXT:    ret void
11540 //
11541 //
11542 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined
11543 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
11544 // CHECK17-NEXT:  entry:
11545 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11546 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11547 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11548 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11549 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11550 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11551 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11552 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11553 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11554 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11555 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11556 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11557 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11558 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11559 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11560 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11561 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11562 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11563 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
11564 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
11565 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11566 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11567 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11568 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11569 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
11570 // CHECK17-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
11571 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11572 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11573 // CHECK17-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11574 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
11575 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11576 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11577 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
11578 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11579 // CHECK17:       cond.true:
11580 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11581 // CHECK17:       cond.false:
11582 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11583 // CHECK17-NEXT:    br label [[COND_END]]
11584 // CHECK17:       cond.end:
11585 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
11586 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
11587 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11588 // CHECK17-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
11589 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11590 // CHECK17:       omp.inner.for.cond:
11591 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11592 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11593 // CHECK17-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
11594 // CHECK17-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11595 // CHECK17:       omp.inner.for.body:
11596 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11597 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
11598 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11599 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
11600 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
11601 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP11]] to i64
11602 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
11603 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
11604 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11605 // CHECK17:       omp.body.continue:
11606 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11607 // CHECK17:       omp.inner.for.inc:
11608 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11609 // CHECK17-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP12]], 1
11610 // CHECK17-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
11611 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11612 // CHECK17:       omp.inner.for.end:
11613 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11614 // CHECK17:       omp.loop.exit:
11615 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
11616 // CHECK17-NEXT:    ret void
11617 //
11618 //
11619 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
11620 // CHECK17-SAME: (i64 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11621 // CHECK17-NEXT:  entry:
11622 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
11623 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11624 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11625 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11626 // CHECK17-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8
11627 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11628 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11629 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 4
11630 // CHECK17-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
11631 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
11632 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
11633 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
11634 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined, ptr [[TMP0]], i64 [[TMP3]])
11635 // CHECK17-NEXT:    ret void
11636 //
11637 //
11638 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined
11639 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
11640 // CHECK17-NEXT:  entry:
11641 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11642 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11643 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11644 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11645 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11646 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11647 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11648 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11649 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11650 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11651 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11652 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11653 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11654 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11655 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11656 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
11657 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11658 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11659 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11660 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11661 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11662 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11663 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
11664 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11665 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11666 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11667 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11668 // CHECK17:       cond.true:
11669 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11670 // CHECK17:       cond.false:
11671 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11672 // CHECK17-NEXT:    br label [[COND_END]]
11673 // CHECK17:       cond.end:
11674 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11675 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11676 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11677 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
11678 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11679 // CHECK17:       omp.inner.for.cond:
11680 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11681 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11682 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11683 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11684 // CHECK17:       omp.inner.for.body:
11685 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11686 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11687 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11688 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11689 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
11690 // CHECK17-NEXT:    store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
11691 // CHECK17-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
11692 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])
11693 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11694 // CHECK17:       omp.inner.for.inc:
11695 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11696 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11697 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
11698 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11699 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11700 // CHECK17:       omp.inner.for.end:
11701 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11702 // CHECK17:       omp.loop.exit:
11703 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
11704 // CHECK17-NEXT:    ret void
11705 //
11706 //
11707 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined
11708 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
11709 // CHECK17-NEXT:  entry:
11710 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11711 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11712 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11713 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11714 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11715 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11716 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11717 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11718 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11719 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11720 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11721 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11722 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11723 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11724 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11725 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11726 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11727 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11728 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
11729 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11730 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
11731 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
11732 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11733 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11734 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11735 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11736 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
11737 // CHECK17-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
11738 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11739 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11740 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
11741 // CHECK17-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11742 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
11743 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
11744 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11745 // CHECK17:       omp.dispatch.cond:
11746 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11747 // CHECK17-NEXT:    [[TMP7:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11748 // CHECK17-NEXT:    [[CONV2:%.*]] = trunc i64 [[TMP7]] to i32
11749 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[CONV2]]
11750 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11751 // CHECK17:       cond.true:
11752 // CHECK17-NEXT:    [[TMP8:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11753 // CHECK17-NEXT:    [[CONV3:%.*]] = trunc i64 [[TMP8]] to i32
11754 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11755 // CHECK17:       cond.false:
11756 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11757 // CHECK17-NEXT:    br label [[COND_END]]
11758 // CHECK17:       cond.end:
11759 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ [[CONV3]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
11760 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
11761 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11762 // CHECK17-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
11763 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11764 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11765 // CHECK17-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
11766 // CHECK17-NEXT:    br i1 [[CMP4]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11767 // CHECK17:       omp.dispatch.body:
11768 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11769 // CHECK17:       omp.inner.for.cond:
11770 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11771 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11772 // CHECK17-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
11773 // CHECK17-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11774 // CHECK17:       omp.inner.for.body:
11775 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11776 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
11777 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11778 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
11779 // CHECK17-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
11780 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP16]] to i64
11781 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
11782 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
11783 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11784 // CHECK17:       omp.body.continue:
11785 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11786 // CHECK17:       omp.inner.for.inc:
11787 // CHECK17-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11788 // CHECK17-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP17]], 1
11789 // CHECK17-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
11790 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11791 // CHECK17:       omp.inner.for.end:
11792 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11793 // CHECK17:       omp.dispatch.inc:
11794 // CHECK17-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11795 // CHECK17-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11796 // CHECK17-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
11797 // CHECK17-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_LB]], align 4
11798 // CHECK17-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11799 // CHECK17-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11800 // CHECK17-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
11801 // CHECK17-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_UB]], align 4
11802 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
11803 // CHECK17:       omp.dispatch.end:
11804 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
11805 // CHECK17-NEXT:    ret void
11806 //
11807 //
11808 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
11809 // CHECK17-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11810 // CHECK17-NEXT:  entry:
11811 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11812 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11813 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11814 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined, ptr [[TMP0]])
11815 // CHECK17-NEXT:    ret void
11816 //
11817 //
11818 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined
11819 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
11820 // CHECK17-NEXT:  entry:
11821 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11822 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11823 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11824 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11825 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11826 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11827 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11828 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11829 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11830 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11831 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11832 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11833 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11834 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11835 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11836 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11837 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11838 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11839 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11840 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
11841 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
11842 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11843 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
11844 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
11845 // CHECK17:       cond.true:
11846 // CHECK17-NEXT:    br label [[COND_END:%.*]]
11847 // CHECK17:       cond.false:
11848 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11849 // CHECK17-NEXT:    br label [[COND_END]]
11850 // CHECK17:       cond.end:
11851 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
11852 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
11853 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11854 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
11855 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11856 // CHECK17:       omp.inner.for.cond:
11857 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11858 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11859 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
11860 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11861 // CHECK17:       omp.inner.for.body:
11862 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
11863 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
11864 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
11865 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
11866 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]])
11867 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11868 // CHECK17:       omp.inner.for.inc:
11869 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
11870 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
11871 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
11872 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
11873 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
11874 // CHECK17:       omp.inner.for.end:
11875 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
11876 // CHECK17:       omp.loop.exit:
11877 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
11878 // CHECK17-NEXT:    ret void
11879 //
11880 //
11881 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined
11882 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
11883 // CHECK17-NEXT:  entry:
11884 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11885 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11886 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
11887 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
11888 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11889 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11890 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11891 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
11892 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
11893 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11894 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11895 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11896 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11897 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11898 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11899 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11900 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11901 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11902 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
11903 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
11904 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
11905 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
11906 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
11907 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
11908 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
11909 // CHECK17-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
11910 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11911 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11912 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11913 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
11914 // CHECK17-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
11915 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
11916 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
11917 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
11918 // CHECK17:       omp.dispatch.cond:
11919 // CHECK17-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
11920 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
11921 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
11922 // CHECK17:       omp.dispatch.body:
11923 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
11924 // CHECK17-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
11925 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
11926 // CHECK17:       omp.inner.for.cond:
11927 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21:![0-9]+]]
11928 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP21]]
11929 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
11930 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
11931 // CHECK17:       omp.inner.for.body:
11932 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
11933 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
11934 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
11935 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
11936 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP21]]
11937 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP12]] to i64
11938 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
11939 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP21]]
11940 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
11941 // CHECK17:       omp.body.continue:
11942 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
11943 // CHECK17:       omp.inner.for.inc:
11944 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
11945 // CHECK17-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP13]], 1
11946 // CHECK17-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP21]]
11947 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP22:![0-9]+]]
11948 // CHECK17:       omp.inner.for.end:
11949 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
11950 // CHECK17:       omp.dispatch.inc:
11951 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
11952 // CHECK17:       omp.dispatch.end:
11953 // CHECK17-NEXT:    ret void
11954 //
11955 //
11956 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
11957 // CHECK17-SAME: (i64 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
11958 // CHECK17-NEXT:  entry:
11959 // CHECK17-NEXT:    [[M_ADDR:%.*]] = alloca i64, align 8
11960 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11961 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
11962 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11963 // CHECK17-NEXT:    store i64 [[M]], ptr [[M_ADDR]], align 8
11964 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11965 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11966 // CHECK17-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 4
11967 // CHECK17-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
11968 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
11969 // CHECK17-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
11970 // CHECK17-NEXT:    [[TMP3:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
11971 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined, ptr [[TMP0]], i64 [[TMP3]])
11972 // CHECK17-NEXT:    ret void
11973 //
11974 //
11975 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined
11976 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
11977 // CHECK17-NEXT:  entry:
11978 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
11979 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
11980 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
11981 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
11982 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
11983 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
11984 // CHECK17-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
11985 // CHECK17-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
11986 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
11987 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
11988 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
11989 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i64, align 8
11990 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
11991 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
11992 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
11993 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
11994 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
11995 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
11996 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
11997 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
11998 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
11999 // CHECK17-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
12000 // CHECK17-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
12001 // CHECK17-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12002 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12003 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
12004 // CHECK17-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12005 // CHECK17:       cond.true:
12006 // CHECK17-NEXT:    br label [[COND_END:%.*]]
12007 // CHECK17:       cond.false:
12008 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12009 // CHECK17-NEXT:    br label [[COND_END]]
12010 // CHECK17:       cond.end:
12011 // CHECK17-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
12012 // CHECK17-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12013 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12014 // CHECK17-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
12015 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12016 // CHECK17:       omp.inner.for.cond:
12017 // CHECK17-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12018 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12019 // CHECK17-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
12020 // CHECK17-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12021 // CHECK17:       omp.inner.for.body:
12022 // CHECK17-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12023 // CHECK17-NEXT:    [[TMP9:%.*]] = zext i32 [[TMP8]] to i64
12024 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12025 // CHECK17-NEXT:    [[TMP11:%.*]] = zext i32 [[TMP10]] to i64
12026 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
12027 // CHECK17-NEXT:    store i32 [[TMP12]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
12028 // CHECK17-NEXT:    [[TMP13:%.*]] = load i64, ptr [[DOTCAPTURE_EXPR__CASTED]], align 8
12029 // CHECK17-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined, i64 [[TMP9]], i64 [[TMP11]], ptr [[TMP0]], i64 [[TMP13]])
12030 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12031 // CHECK17:       omp.inner.for.inc:
12032 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12033 // CHECK17-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
12034 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP14]], [[TMP15]]
12035 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
12036 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]]
12037 // CHECK17:       omp.inner.for.end:
12038 // CHECK17-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12039 // CHECK17:       omp.loop.exit:
12040 // CHECK17-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
12041 // CHECK17-NEXT:    ret void
12042 //
12043 //
12044 // CHECK17-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined
12045 // CHECK17-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i64 noundef [[DOTPREVIOUS_LB_:%.*]], i64 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i64 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
12046 // CHECK17-NEXT:  entry:
12047 // CHECK17-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 8
12048 // CHECK17-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 8
12049 // CHECK17-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i64, align 8
12050 // CHECK17-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i64, align 8
12051 // CHECK17-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 8
12052 // CHECK17-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i64, align 8
12053 // CHECK17-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12054 // CHECK17-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12055 // CHECK17-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12056 // CHECK17-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12057 // CHECK17-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12058 // CHECK17-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12059 // CHECK17-NEXT:    [[I:%.*]] = alloca i32, align 4
12060 // CHECK17-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 8
12061 // CHECK17-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 8
12062 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 8
12063 // CHECK17-NEXT:    store i64 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 8
12064 // CHECK17-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 8
12065 // CHECK17-NEXT:    store i64 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 8
12066 // CHECK17-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 8
12067 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
12068 // CHECK17-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
12069 // CHECK17-NEXT:    [[TMP1:%.*]] = load i64, ptr [[DOTPREVIOUS_LB__ADDR]], align 8
12070 // CHECK17-NEXT:    [[CONV:%.*]] = trunc i64 [[TMP1]] to i32
12071 // CHECK17-NEXT:    [[TMP2:%.*]] = load i64, ptr [[DOTPREVIOUS_UB__ADDR]], align 8
12072 // CHECK17-NEXT:    [[CONV1:%.*]] = trunc i64 [[TMP2]] to i32
12073 // CHECK17-NEXT:    store i32 [[CONV]], ptr [[DOTOMP_LB]], align 4
12074 // CHECK17-NEXT:    store i32 [[CONV1]], ptr [[DOTOMP_UB]], align 4
12075 // CHECK17-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12076 // CHECK17-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12077 // CHECK17-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
12078 // CHECK17-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12079 // CHECK17-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12080 // CHECK17-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 8
12081 // CHECK17-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
12082 // CHECK17-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
12083 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
12084 // CHECK17:       omp.dispatch.cond:
12085 // CHECK17-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
12086 // CHECK17-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
12087 // CHECK17-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
12088 // CHECK17:       omp.dispatch.body:
12089 // CHECK17-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12090 // CHECK17-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
12091 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12092 // CHECK17:       omp.inner.for.cond:
12093 // CHECK17-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24:![0-9]+]]
12094 // CHECK17-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP24]]
12095 // CHECK17-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
12096 // CHECK17-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12097 // CHECK17:       omp.inner.for.body:
12098 // CHECK17-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
12099 // CHECK17-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
12100 // CHECK17-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12101 // CHECK17-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
12102 // CHECK17-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP24]]
12103 // CHECK17-NEXT:    [[IDXPROM:%.*]] = sext i32 [[TMP13]] to i64
12104 // CHECK17-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i64 0, i64 [[IDXPROM]]
12105 // CHECK17-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP24]]
12106 // CHECK17-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12107 // CHECK17:       omp.body.continue:
12108 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12109 // CHECK17:       omp.inner.for.inc:
12110 // CHECK17-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
12111 // CHECK17-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP14]], 1
12112 // CHECK17-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP24]]
12113 // CHECK17-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP25:![0-9]+]]
12114 // CHECK17:       omp.inner.for.end:
12115 // CHECK17-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
12116 // CHECK17:       omp.dispatch.inc:
12117 // CHECK17-NEXT:    br label [[OMP_DISPATCH_COND]]
12118 // CHECK17:       omp.dispatch.end:
12119 // CHECK17-NEXT:    ret void
12120 //
12121 //
12122 // CHECK17-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
12123 // CHECK17-SAME: () #[[ATTR7:[0-9]+]] {
12124 // CHECK17-NEXT:  entry:
12125 // CHECK17-NEXT:    call void @__tgt_register_requires(i64 1)
12126 // CHECK17-NEXT:    ret void
12127 //
12128 //
12129 // CHECK19-LABEL: define {{[^@]+}}@main
12130 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]], ptr noundef [[ARGV:%.*]]) #[[ATTR0:[0-9]+]] {
12131 // CHECK19-NEXT:  entry:
12132 // CHECK19-NEXT:    [[RETVAL:%.*]] = alloca i32, align 4
12133 // CHECK19-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
12134 // CHECK19-NEXT:    [[ARGV_ADDR:%.*]] = alloca ptr, align 4
12135 // CHECK19-NEXT:    [[N:%.*]] = alloca i32, align 4
12136 // CHECK19-NEXT:    [[SAVED_STACK:%.*]] = alloca ptr, align 4
12137 // CHECK19-NEXT:    [[__VLA_EXPR0:%.*]] = alloca i32, align 4
12138 // CHECK19-NEXT:    [[M:%.*]] = alloca i32, align 4
12139 // CHECK19-NEXT:    [[N_CASTED:%.*]] = alloca i32, align 4
12140 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [3 x ptr], align 4
12141 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [3 x ptr], align 4
12142 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [3 x ptr], align 4
12143 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES:%.*]] = alloca [3 x i64], align 4
12144 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12145 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12146 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12147 // CHECK19-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
12148 // CHECK19-NEXT:    [[N_CASTED3:%.*]] = alloca i32, align 4
12149 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS4:%.*]] = alloca [3 x ptr], align 4
12150 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS5:%.*]] = alloca [3 x ptr], align 4
12151 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS6:%.*]] = alloca [3 x ptr], align 4
12152 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES7:%.*]] = alloca [3 x i64], align 4
12153 // CHECK19-NEXT:    [[_TMP8:%.*]] = alloca i32, align 4
12154 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_9:%.*]] = alloca i32, align 4
12155 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_10:%.*]] = alloca i32, align 4
12156 // CHECK19-NEXT:    [[KERNEL_ARGS15:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12157 // CHECK19-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
12158 // CHECK19-NEXT:    [[N_CASTED18:%.*]] = alloca i32, align 4
12159 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS19:%.*]] = alloca [4 x ptr], align 4
12160 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS20:%.*]] = alloca [4 x ptr], align 4
12161 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS21:%.*]] = alloca [4 x ptr], align 4
12162 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES22:%.*]] = alloca [4 x i64], align 4
12163 // CHECK19-NEXT:    [[_TMP23:%.*]] = alloca i32, align 4
12164 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_24:%.*]] = alloca i32, align 4
12165 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_25:%.*]] = alloca i32, align 4
12166 // CHECK19-NEXT:    [[KERNEL_ARGS30:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12167 // CHECK19-NEXT:    [[N_CASTED33:%.*]] = alloca i32, align 4
12168 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS34:%.*]] = alloca [3 x ptr], align 4
12169 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS35:%.*]] = alloca [3 x ptr], align 4
12170 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS36:%.*]] = alloca [3 x ptr], align 4
12171 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES37:%.*]] = alloca [3 x i64], align 4
12172 // CHECK19-NEXT:    [[_TMP38:%.*]] = alloca i32, align 4
12173 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_39:%.*]] = alloca i32, align 4
12174 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_40:%.*]] = alloca i32, align 4
12175 // CHECK19-NEXT:    [[KERNEL_ARGS45:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12176 // CHECK19-NEXT:    [[M_CASTED48:%.*]] = alloca i32, align 4
12177 // CHECK19-NEXT:    [[N_CASTED49:%.*]] = alloca i32, align 4
12178 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS50:%.*]] = alloca [4 x ptr], align 4
12179 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS51:%.*]] = alloca [4 x ptr], align 4
12180 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS52:%.*]] = alloca [4 x ptr], align 4
12181 // CHECK19-NEXT:    [[DOTOFFLOAD_SIZES53:%.*]] = alloca [4 x i64], align 4
12182 // CHECK19-NEXT:    [[_TMP54:%.*]] = alloca i32, align 4
12183 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_55:%.*]] = alloca i32, align 4
12184 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_56:%.*]] = alloca i32, align 4
12185 // CHECK19-NEXT:    [[KERNEL_ARGS61:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
12186 // CHECK19-NEXT:    store i32 0, ptr [[RETVAL]], align 4
12187 // CHECK19-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
12188 // CHECK19-NEXT:    store ptr [[ARGV]], ptr [[ARGV_ADDR]], align 4
12189 // CHECK19-NEXT:    store i32 100, ptr [[N]], align 4
12190 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[N]], align 4
12191 // CHECK19-NEXT:    [[TMP1:%.*]] = call ptr @llvm.stacksave.p0()
12192 // CHECK19-NEXT:    store ptr [[TMP1]], ptr [[SAVED_STACK]], align 4
12193 // CHECK19-NEXT:    [[VLA:%.*]] = alloca i32, i32 [[TMP0]], align 4
12194 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[__VLA_EXPR0]], align 4
12195 // CHECK19-NEXT:    store i32 10, ptr [[M]], align 4
12196 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[N]], align 4
12197 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[N_CASTED]], align 4
12198 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[N_CASTED]], align 4
12199 // CHECK19-NEXT:    [[TMP4:%.*]] = mul nuw i32 [[TMP0]], 4
12200 // CHECK19-NEXT:    [[TMP5:%.*]] = sext i32 [[TMP4]] to i64
12201 // CHECK19-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES]], ptr align 4 @.offload_sizes, i32 24, i1 false)
12202 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12203 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[TMP6]], align 4
12204 // CHECK19-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12205 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[TMP7]], align 4
12206 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
12207 // CHECK19-NEXT:    store ptr null, ptr [[TMP8]], align 4
12208 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 1
12209 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP9]], align 4
12210 // CHECK19-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 1
12211 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP10]], align 4
12212 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 1
12213 // CHECK19-NEXT:    store ptr null, ptr [[TMP11]], align 4
12214 // CHECK19-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 2
12215 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP12]], align 4
12216 // CHECK19-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 2
12217 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP13]], align 4
12218 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 2
12219 // CHECK19-NEXT:    store i64 [[TMP5]], ptr [[TMP14]], align 4
12220 // CHECK19-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 2
12221 // CHECK19-NEXT:    store ptr null, ptr [[TMP15]], align 4
12222 // CHECK19-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
12223 // CHECK19-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
12224 // CHECK19-NEXT:    [[TMP18:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES]], i32 0, i32 0
12225 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[N]], align 4
12226 // CHECK19-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR_]], align 4
12227 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12228 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP20]], 0
12229 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12230 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12231 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
12232 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12233 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP21]], 1
12234 // CHECK19-NEXT:    [[TMP22:%.*]] = zext i32 [[ADD]] to i64
12235 // CHECK19-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
12236 // CHECK19-NEXT:    store i32 2, ptr [[TMP23]], align 4
12237 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
12238 // CHECK19-NEXT:    store i32 3, ptr [[TMP24]], align 4
12239 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
12240 // CHECK19-NEXT:    store ptr [[TMP16]], ptr [[TMP25]], align 4
12241 // CHECK19-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
12242 // CHECK19-NEXT:    store ptr [[TMP17]], ptr [[TMP26]], align 4
12243 // CHECK19-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
12244 // CHECK19-NEXT:    store ptr [[TMP18]], ptr [[TMP27]], align 4
12245 // CHECK19-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
12246 // CHECK19-NEXT:    store ptr @.offload_maptypes, ptr [[TMP28]], align 4
12247 // CHECK19-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
12248 // CHECK19-NEXT:    store ptr null, ptr [[TMP29]], align 4
12249 // CHECK19-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
12250 // CHECK19-NEXT:    store ptr null, ptr [[TMP30]], align 4
12251 // CHECK19-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
12252 // CHECK19-NEXT:    store i64 [[TMP22]], ptr [[TMP31]], align 8
12253 // CHECK19-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
12254 // CHECK19-NEXT:    store i64 0, ptr [[TMP32]], align 8
12255 // CHECK19-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
12256 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP33]], align 4
12257 // CHECK19-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
12258 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP34]], align 4
12259 // CHECK19-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
12260 // CHECK19-NEXT:    store i32 0, ptr [[TMP35]], align 4
12261 // CHECK19-NEXT:    [[TMP36:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3:[0-9]+]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.region_id, ptr [[KERNEL_ARGS]])
12262 // CHECK19-NEXT:    [[TMP37:%.*]] = icmp ne i32 [[TMP36]], 0
12263 // CHECK19-NEXT:    br i1 [[TMP37]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
12264 // CHECK19:       omp_offload.failed:
12265 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148(i32 [[TMP3]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR4:[0-9]+]]
12266 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
12267 // CHECK19:       omp_offload.cont:
12268 // CHECK19-NEXT:    [[TMP38:%.*]] = load i32, ptr [[N]], align 4
12269 // CHECK19-NEXT:    store i32 [[TMP38]], ptr [[N_CASTED3]], align 4
12270 // CHECK19-NEXT:    [[TMP39:%.*]] = load i32, ptr [[N_CASTED3]], align 4
12271 // CHECK19-NEXT:    [[TMP40:%.*]] = mul nuw i32 [[TMP0]], 4
12272 // CHECK19-NEXT:    [[TMP41:%.*]] = sext i32 [[TMP40]] to i64
12273 // CHECK19-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES7]], ptr align 4 @.offload_sizes.1, i32 24, i1 false)
12274 // CHECK19-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12275 // CHECK19-NEXT:    store i32 [[TMP39]], ptr [[TMP42]], align 4
12276 // CHECK19-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12277 // CHECK19-NEXT:    store i32 [[TMP39]], ptr [[TMP43]], align 4
12278 // CHECK19-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 0
12279 // CHECK19-NEXT:    store ptr null, ptr [[TMP44]], align 4
12280 // CHECK19-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 1
12281 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP45]], align 4
12282 // CHECK19-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 1
12283 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP46]], align 4
12284 // CHECK19-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 1
12285 // CHECK19-NEXT:    store ptr null, ptr [[TMP47]], align 4
12286 // CHECK19-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 2
12287 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP48]], align 4
12288 // CHECK19-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 2
12289 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP49]], align 4
12290 // CHECK19-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 2
12291 // CHECK19-NEXT:    store i64 [[TMP41]], ptr [[TMP50]], align 4
12292 // CHECK19-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS6]], i32 0, i32 2
12293 // CHECK19-NEXT:    store ptr null, ptr [[TMP51]], align 4
12294 // CHECK19-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS4]], i32 0, i32 0
12295 // CHECK19-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS5]], i32 0, i32 0
12296 // CHECK19-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES7]], i32 0, i32 0
12297 // CHECK19-NEXT:    [[TMP55:%.*]] = load i32, ptr [[N]], align 4
12298 // CHECK19-NEXT:    store i32 [[TMP55]], ptr [[DOTCAPTURE_EXPR_9]], align 4
12299 // CHECK19-NEXT:    [[TMP56:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_9]], align 4
12300 // CHECK19-NEXT:    [[SUB11:%.*]] = sub nsw i32 [[TMP56]], 0
12301 // CHECK19-NEXT:    [[DIV12:%.*]] = sdiv i32 [[SUB11]], 1
12302 // CHECK19-NEXT:    [[SUB13:%.*]] = sub nsw i32 [[DIV12]], 1
12303 // CHECK19-NEXT:    store i32 [[SUB13]], ptr [[DOTCAPTURE_EXPR_10]], align 4
12304 // CHECK19-NEXT:    [[TMP57:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_10]], align 4
12305 // CHECK19-NEXT:    [[ADD14:%.*]] = add nsw i32 [[TMP57]], 1
12306 // CHECK19-NEXT:    [[TMP58:%.*]] = zext i32 [[ADD14]] to i64
12307 // CHECK19-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 0
12308 // CHECK19-NEXT:    store i32 2, ptr [[TMP59]], align 4
12309 // CHECK19-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 1
12310 // CHECK19-NEXT:    store i32 3, ptr [[TMP60]], align 4
12311 // CHECK19-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 2
12312 // CHECK19-NEXT:    store ptr [[TMP52]], ptr [[TMP61]], align 4
12313 // CHECK19-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 3
12314 // CHECK19-NEXT:    store ptr [[TMP53]], ptr [[TMP62]], align 4
12315 // CHECK19-NEXT:    [[TMP63:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 4
12316 // CHECK19-NEXT:    store ptr [[TMP54]], ptr [[TMP63]], align 4
12317 // CHECK19-NEXT:    [[TMP64:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 5
12318 // CHECK19-NEXT:    store ptr @.offload_maptypes.2, ptr [[TMP64]], align 4
12319 // CHECK19-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 6
12320 // CHECK19-NEXT:    store ptr null, ptr [[TMP65]], align 4
12321 // CHECK19-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 7
12322 // CHECK19-NEXT:    store ptr null, ptr [[TMP66]], align 4
12323 // CHECK19-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 8
12324 // CHECK19-NEXT:    store i64 [[TMP58]], ptr [[TMP67]], align 8
12325 // CHECK19-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 9
12326 // CHECK19-NEXT:    store i64 0, ptr [[TMP68]], align 8
12327 // CHECK19-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 10
12328 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP69]], align 4
12329 // CHECK19-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 11
12330 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP70]], align 4
12331 // CHECK19-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS15]], i32 0, i32 12
12332 // CHECK19-NEXT:    store i32 0, ptr [[TMP71]], align 4
12333 // CHECK19-NEXT:    [[TMP72:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.region_id, ptr [[KERNEL_ARGS15]])
12334 // CHECK19-NEXT:    [[TMP73:%.*]] = icmp ne i32 [[TMP72]], 0
12335 // CHECK19-NEXT:    br i1 [[TMP73]], label [[OMP_OFFLOAD_FAILED16:%.*]], label [[OMP_OFFLOAD_CONT17:%.*]]
12336 // CHECK19:       omp_offload.failed16:
12337 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153(i32 [[TMP39]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR4]]
12338 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT17]]
12339 // CHECK19:       omp_offload.cont17:
12340 // CHECK19-NEXT:    [[TMP74:%.*]] = load i32, ptr [[M]], align 4
12341 // CHECK19-NEXT:    store i32 [[TMP74]], ptr [[M_CASTED]], align 4
12342 // CHECK19-NEXT:    [[TMP75:%.*]] = load i32, ptr [[M_CASTED]], align 4
12343 // CHECK19-NEXT:    [[TMP76:%.*]] = load i32, ptr [[N]], align 4
12344 // CHECK19-NEXT:    store i32 [[TMP76]], ptr [[N_CASTED18]], align 4
12345 // CHECK19-NEXT:    [[TMP77:%.*]] = load i32, ptr [[N_CASTED18]], align 4
12346 // CHECK19-NEXT:    [[TMP78:%.*]] = mul nuw i32 [[TMP0]], 4
12347 // CHECK19-NEXT:    [[TMP79:%.*]] = sext i32 [[TMP78]] to i64
12348 // CHECK19-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES22]], ptr align 4 @.offload_sizes.3, i32 32, i1 false)
12349 // CHECK19-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
12350 // CHECK19-NEXT:    store i32 [[TMP75]], ptr [[TMP80]], align 4
12351 // CHECK19-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
12352 // CHECK19-NEXT:    store i32 [[TMP75]], ptr [[TMP81]], align 4
12353 // CHECK19-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 0
12354 // CHECK19-NEXT:    store ptr null, ptr [[TMP82]], align 4
12355 // CHECK19-NEXT:    [[TMP83:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 1
12356 // CHECK19-NEXT:    store i32 [[TMP77]], ptr [[TMP83]], align 4
12357 // CHECK19-NEXT:    [[TMP84:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 1
12358 // CHECK19-NEXT:    store i32 [[TMP77]], ptr [[TMP84]], align 4
12359 // CHECK19-NEXT:    [[TMP85:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 1
12360 // CHECK19-NEXT:    store ptr null, ptr [[TMP85]], align 4
12361 // CHECK19-NEXT:    [[TMP86:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 2
12362 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP86]], align 4
12363 // CHECK19-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 2
12364 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP87]], align 4
12365 // CHECK19-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 2
12366 // CHECK19-NEXT:    store ptr null, ptr [[TMP88]], align 4
12367 // CHECK19-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 3
12368 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP89]], align 4
12369 // CHECK19-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 3
12370 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP90]], align 4
12371 // CHECK19-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 3
12372 // CHECK19-NEXT:    store i64 [[TMP79]], ptr [[TMP91]], align 4
12373 // CHECK19-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS21]], i32 0, i32 3
12374 // CHECK19-NEXT:    store ptr null, ptr [[TMP92]], align 4
12375 // CHECK19-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS19]], i32 0, i32 0
12376 // CHECK19-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS20]], i32 0, i32 0
12377 // CHECK19-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES22]], i32 0, i32 0
12378 // CHECK19-NEXT:    [[TMP96:%.*]] = load i32, ptr [[N]], align 4
12379 // CHECK19-NEXT:    store i32 [[TMP96]], ptr [[DOTCAPTURE_EXPR_24]], align 4
12380 // CHECK19-NEXT:    [[TMP97:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_24]], align 4
12381 // CHECK19-NEXT:    [[SUB26:%.*]] = sub nsw i32 [[TMP97]], 0
12382 // CHECK19-NEXT:    [[DIV27:%.*]] = sdiv i32 [[SUB26]], 1
12383 // CHECK19-NEXT:    [[SUB28:%.*]] = sub nsw i32 [[DIV27]], 1
12384 // CHECK19-NEXT:    store i32 [[SUB28]], ptr [[DOTCAPTURE_EXPR_25]], align 4
12385 // CHECK19-NEXT:    [[TMP98:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_25]], align 4
12386 // CHECK19-NEXT:    [[ADD29:%.*]] = add nsw i32 [[TMP98]], 1
12387 // CHECK19-NEXT:    [[TMP99:%.*]] = zext i32 [[ADD29]] to i64
12388 // CHECK19-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 0
12389 // CHECK19-NEXT:    store i32 2, ptr [[TMP100]], align 4
12390 // CHECK19-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 1
12391 // CHECK19-NEXT:    store i32 4, ptr [[TMP101]], align 4
12392 // CHECK19-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 2
12393 // CHECK19-NEXT:    store ptr [[TMP93]], ptr [[TMP102]], align 4
12394 // CHECK19-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 3
12395 // CHECK19-NEXT:    store ptr [[TMP94]], ptr [[TMP103]], align 4
12396 // CHECK19-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 4
12397 // CHECK19-NEXT:    store ptr [[TMP95]], ptr [[TMP104]], align 4
12398 // CHECK19-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 5
12399 // CHECK19-NEXT:    store ptr @.offload_maptypes.4, ptr [[TMP105]], align 4
12400 // CHECK19-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 6
12401 // CHECK19-NEXT:    store ptr null, ptr [[TMP106]], align 4
12402 // CHECK19-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 7
12403 // CHECK19-NEXT:    store ptr null, ptr [[TMP107]], align 4
12404 // CHECK19-NEXT:    [[TMP108:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 8
12405 // CHECK19-NEXT:    store i64 [[TMP99]], ptr [[TMP108]], align 8
12406 // CHECK19-NEXT:    [[TMP109:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 9
12407 // CHECK19-NEXT:    store i64 0, ptr [[TMP109]], align 8
12408 // CHECK19-NEXT:    [[TMP110:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 10
12409 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP110]], align 4
12410 // CHECK19-NEXT:    [[TMP111:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 11
12411 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP111]], align 4
12412 // CHECK19-NEXT:    [[TMP112:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS30]], i32 0, i32 12
12413 // CHECK19-NEXT:    store i32 0, ptr [[TMP112]], align 4
12414 // CHECK19-NEXT:    [[TMP113:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.region_id, ptr [[KERNEL_ARGS30]])
12415 // CHECK19-NEXT:    [[TMP114:%.*]] = icmp ne i32 [[TMP113]], 0
12416 // CHECK19-NEXT:    br i1 [[TMP114]], label [[OMP_OFFLOAD_FAILED31:%.*]], label [[OMP_OFFLOAD_CONT32:%.*]]
12417 // CHECK19:       omp_offload.failed31:
12418 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158(i32 [[TMP75]], i32 [[TMP77]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR4]]
12419 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT32]]
12420 // CHECK19:       omp_offload.cont32:
12421 // CHECK19-NEXT:    [[TMP115:%.*]] = load i32, ptr [[N]], align 4
12422 // CHECK19-NEXT:    store i32 [[TMP115]], ptr [[N_CASTED33]], align 4
12423 // CHECK19-NEXT:    [[TMP116:%.*]] = load i32, ptr [[N_CASTED33]], align 4
12424 // CHECK19-NEXT:    [[TMP117:%.*]] = mul nuw i32 [[TMP0]], 4
12425 // CHECK19-NEXT:    [[TMP118:%.*]] = sext i32 [[TMP117]] to i64
12426 // CHECK19-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES37]], ptr align 4 @.offload_sizes.5, i32 24, i1 false)
12427 // CHECK19-NEXT:    [[TMP119:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
12428 // CHECK19-NEXT:    store i32 [[TMP116]], ptr [[TMP119]], align 4
12429 // CHECK19-NEXT:    [[TMP120:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
12430 // CHECK19-NEXT:    store i32 [[TMP116]], ptr [[TMP120]], align 4
12431 // CHECK19-NEXT:    [[TMP121:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 0
12432 // CHECK19-NEXT:    store ptr null, ptr [[TMP121]], align 4
12433 // CHECK19-NEXT:    [[TMP122:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 1
12434 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP122]], align 4
12435 // CHECK19-NEXT:    [[TMP123:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 1
12436 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP123]], align 4
12437 // CHECK19-NEXT:    [[TMP124:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 1
12438 // CHECK19-NEXT:    store ptr null, ptr [[TMP124]], align 4
12439 // CHECK19-NEXT:    [[TMP125:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 2
12440 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP125]], align 4
12441 // CHECK19-NEXT:    [[TMP126:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 2
12442 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP126]], align 4
12443 // CHECK19-NEXT:    [[TMP127:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 2
12444 // CHECK19-NEXT:    store i64 [[TMP118]], ptr [[TMP127]], align 4
12445 // CHECK19-NEXT:    [[TMP128:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_MAPPERS36]], i32 0, i32 2
12446 // CHECK19-NEXT:    store ptr null, ptr [[TMP128]], align 4
12447 // CHECK19-NEXT:    [[TMP129:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_BASEPTRS34]], i32 0, i32 0
12448 // CHECK19-NEXT:    [[TMP130:%.*]] = getelementptr inbounds [3 x ptr], ptr [[DOTOFFLOAD_PTRS35]], i32 0, i32 0
12449 // CHECK19-NEXT:    [[TMP131:%.*]] = getelementptr inbounds [3 x i64], ptr [[DOTOFFLOAD_SIZES37]], i32 0, i32 0
12450 // CHECK19-NEXT:    [[TMP132:%.*]] = load i32, ptr [[N]], align 4
12451 // CHECK19-NEXT:    store i32 [[TMP132]], ptr [[DOTCAPTURE_EXPR_39]], align 4
12452 // CHECK19-NEXT:    [[TMP133:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_39]], align 4
12453 // CHECK19-NEXT:    [[SUB41:%.*]] = sub nsw i32 [[TMP133]], 0
12454 // CHECK19-NEXT:    [[DIV42:%.*]] = sdiv i32 [[SUB41]], 1
12455 // CHECK19-NEXT:    [[SUB43:%.*]] = sub nsw i32 [[DIV42]], 1
12456 // CHECK19-NEXT:    store i32 [[SUB43]], ptr [[DOTCAPTURE_EXPR_40]], align 4
12457 // CHECK19-NEXT:    [[TMP134:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_40]], align 4
12458 // CHECK19-NEXT:    [[ADD44:%.*]] = add nsw i32 [[TMP134]], 1
12459 // CHECK19-NEXT:    [[TMP135:%.*]] = zext i32 [[ADD44]] to i64
12460 // CHECK19-NEXT:    [[TMP136:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 0
12461 // CHECK19-NEXT:    store i32 2, ptr [[TMP136]], align 4
12462 // CHECK19-NEXT:    [[TMP137:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 1
12463 // CHECK19-NEXT:    store i32 3, ptr [[TMP137]], align 4
12464 // CHECK19-NEXT:    [[TMP138:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 2
12465 // CHECK19-NEXT:    store ptr [[TMP129]], ptr [[TMP138]], align 4
12466 // CHECK19-NEXT:    [[TMP139:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 3
12467 // CHECK19-NEXT:    store ptr [[TMP130]], ptr [[TMP139]], align 4
12468 // CHECK19-NEXT:    [[TMP140:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 4
12469 // CHECK19-NEXT:    store ptr [[TMP131]], ptr [[TMP140]], align 4
12470 // CHECK19-NEXT:    [[TMP141:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 5
12471 // CHECK19-NEXT:    store ptr @.offload_maptypes.6, ptr [[TMP141]], align 4
12472 // CHECK19-NEXT:    [[TMP142:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 6
12473 // CHECK19-NEXT:    store ptr null, ptr [[TMP142]], align 4
12474 // CHECK19-NEXT:    [[TMP143:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 7
12475 // CHECK19-NEXT:    store ptr null, ptr [[TMP143]], align 4
12476 // CHECK19-NEXT:    [[TMP144:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 8
12477 // CHECK19-NEXT:    store i64 [[TMP135]], ptr [[TMP144]], align 8
12478 // CHECK19-NEXT:    [[TMP145:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 9
12479 // CHECK19-NEXT:    store i64 0, ptr [[TMP145]], align 8
12480 // CHECK19-NEXT:    [[TMP146:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 10
12481 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP146]], align 4
12482 // CHECK19-NEXT:    [[TMP147:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 11
12483 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP147]], align 4
12484 // CHECK19-NEXT:    [[TMP148:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS45]], i32 0, i32 12
12485 // CHECK19-NEXT:    store i32 0, ptr [[TMP148]], align 4
12486 // CHECK19-NEXT:    [[TMP149:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.region_id, ptr [[KERNEL_ARGS45]])
12487 // CHECK19-NEXT:    [[TMP150:%.*]] = icmp ne i32 [[TMP149]], 0
12488 // CHECK19-NEXT:    br i1 [[TMP150]], label [[OMP_OFFLOAD_FAILED46:%.*]], label [[OMP_OFFLOAD_CONT47:%.*]]
12489 // CHECK19:       omp_offload.failed46:
12490 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163(i32 [[TMP116]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR4]]
12491 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT47]]
12492 // CHECK19:       omp_offload.cont47:
12493 // CHECK19-NEXT:    [[TMP151:%.*]] = load i32, ptr [[M]], align 4
12494 // CHECK19-NEXT:    store i32 [[TMP151]], ptr [[M_CASTED48]], align 4
12495 // CHECK19-NEXT:    [[TMP152:%.*]] = load i32, ptr [[M_CASTED48]], align 4
12496 // CHECK19-NEXT:    [[TMP153:%.*]] = load i32, ptr [[N]], align 4
12497 // CHECK19-NEXT:    store i32 [[TMP153]], ptr [[N_CASTED49]], align 4
12498 // CHECK19-NEXT:    [[TMP154:%.*]] = load i32, ptr [[N_CASTED49]], align 4
12499 // CHECK19-NEXT:    [[TMP155:%.*]] = mul nuw i32 [[TMP0]], 4
12500 // CHECK19-NEXT:    [[TMP156:%.*]] = sext i32 [[TMP155]] to i64
12501 // CHECK19-NEXT:    call void @llvm.memcpy.p0.p0.i32(ptr align 4 [[DOTOFFLOAD_SIZES53]], ptr align 4 @.offload_sizes.7, i32 32, i1 false)
12502 // CHECK19-NEXT:    [[TMP157:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
12503 // CHECK19-NEXT:    store i32 [[TMP152]], ptr [[TMP157]], align 4
12504 // CHECK19-NEXT:    [[TMP158:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
12505 // CHECK19-NEXT:    store i32 [[TMP152]], ptr [[TMP158]], align 4
12506 // CHECK19-NEXT:    [[TMP159:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 0
12507 // CHECK19-NEXT:    store ptr null, ptr [[TMP159]], align 4
12508 // CHECK19-NEXT:    [[TMP160:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 1
12509 // CHECK19-NEXT:    store i32 [[TMP154]], ptr [[TMP160]], align 4
12510 // CHECK19-NEXT:    [[TMP161:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 1
12511 // CHECK19-NEXT:    store i32 [[TMP154]], ptr [[TMP161]], align 4
12512 // CHECK19-NEXT:    [[TMP162:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 1
12513 // CHECK19-NEXT:    store ptr null, ptr [[TMP162]], align 4
12514 // CHECK19-NEXT:    [[TMP163:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 2
12515 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP163]], align 4
12516 // CHECK19-NEXT:    [[TMP164:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 2
12517 // CHECK19-NEXT:    store i32 [[TMP0]], ptr [[TMP164]], align 4
12518 // CHECK19-NEXT:    [[TMP165:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 2
12519 // CHECK19-NEXT:    store ptr null, ptr [[TMP165]], align 4
12520 // CHECK19-NEXT:    [[TMP166:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 3
12521 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP166]], align 4
12522 // CHECK19-NEXT:    [[TMP167:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 3
12523 // CHECK19-NEXT:    store ptr [[VLA]], ptr [[TMP167]], align 4
12524 // CHECK19-NEXT:    [[TMP168:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 3
12525 // CHECK19-NEXT:    store i64 [[TMP156]], ptr [[TMP168]], align 4
12526 // CHECK19-NEXT:    [[TMP169:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_MAPPERS52]], i32 0, i32 3
12527 // CHECK19-NEXT:    store ptr null, ptr [[TMP169]], align 4
12528 // CHECK19-NEXT:    [[TMP170:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_BASEPTRS50]], i32 0, i32 0
12529 // CHECK19-NEXT:    [[TMP171:%.*]] = getelementptr inbounds [4 x ptr], ptr [[DOTOFFLOAD_PTRS51]], i32 0, i32 0
12530 // CHECK19-NEXT:    [[TMP172:%.*]] = getelementptr inbounds [4 x i64], ptr [[DOTOFFLOAD_SIZES53]], i32 0, i32 0
12531 // CHECK19-NEXT:    [[TMP173:%.*]] = load i32, ptr [[N]], align 4
12532 // CHECK19-NEXT:    store i32 [[TMP173]], ptr [[DOTCAPTURE_EXPR_55]], align 4
12533 // CHECK19-NEXT:    [[TMP174:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_55]], align 4
12534 // CHECK19-NEXT:    [[SUB57:%.*]] = sub nsw i32 [[TMP174]], 0
12535 // CHECK19-NEXT:    [[DIV58:%.*]] = sdiv i32 [[SUB57]], 1
12536 // CHECK19-NEXT:    [[SUB59:%.*]] = sub nsw i32 [[DIV58]], 1
12537 // CHECK19-NEXT:    store i32 [[SUB59]], ptr [[DOTCAPTURE_EXPR_56]], align 4
12538 // CHECK19-NEXT:    [[TMP175:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_56]], align 4
12539 // CHECK19-NEXT:    [[ADD60:%.*]] = add nsw i32 [[TMP175]], 1
12540 // CHECK19-NEXT:    [[TMP176:%.*]] = zext i32 [[ADD60]] to i64
12541 // CHECK19-NEXT:    [[TMP177:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 0
12542 // CHECK19-NEXT:    store i32 2, ptr [[TMP177]], align 4
12543 // CHECK19-NEXT:    [[TMP178:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 1
12544 // CHECK19-NEXT:    store i32 4, ptr [[TMP178]], align 4
12545 // CHECK19-NEXT:    [[TMP179:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 2
12546 // CHECK19-NEXT:    store ptr [[TMP170]], ptr [[TMP179]], align 4
12547 // CHECK19-NEXT:    [[TMP180:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 3
12548 // CHECK19-NEXT:    store ptr [[TMP171]], ptr [[TMP180]], align 4
12549 // CHECK19-NEXT:    [[TMP181:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 4
12550 // CHECK19-NEXT:    store ptr [[TMP172]], ptr [[TMP181]], align 4
12551 // CHECK19-NEXT:    [[TMP182:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 5
12552 // CHECK19-NEXT:    store ptr @.offload_maptypes.8, ptr [[TMP182]], align 4
12553 // CHECK19-NEXT:    [[TMP183:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 6
12554 // CHECK19-NEXT:    store ptr null, ptr [[TMP183]], align 4
12555 // CHECK19-NEXT:    [[TMP184:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 7
12556 // CHECK19-NEXT:    store ptr null, ptr [[TMP184]], align 4
12557 // CHECK19-NEXT:    [[TMP185:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 8
12558 // CHECK19-NEXT:    store i64 [[TMP176]], ptr [[TMP185]], align 8
12559 // CHECK19-NEXT:    [[TMP186:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 9
12560 // CHECK19-NEXT:    store i64 0, ptr [[TMP186]], align 8
12561 // CHECK19-NEXT:    [[TMP187:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 10
12562 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP187]], align 4
12563 // CHECK19-NEXT:    [[TMP188:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 11
12564 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP188]], align 4
12565 // CHECK19-NEXT:    [[TMP189:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS61]], i32 0, i32 12
12566 // CHECK19-NEXT:    store i32 0, ptr [[TMP189]], align 4
12567 // CHECK19-NEXT:    [[TMP190:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.region_id, ptr [[KERNEL_ARGS61]])
12568 // CHECK19-NEXT:    [[TMP191:%.*]] = icmp ne i32 [[TMP190]], 0
12569 // CHECK19-NEXT:    br i1 [[TMP191]], label [[OMP_OFFLOAD_FAILED62:%.*]], label [[OMP_OFFLOAD_CONT63:%.*]]
12570 // CHECK19:       omp_offload.failed62:
12571 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168(i32 [[TMP152]], i32 [[TMP154]], i32 [[TMP0]], ptr [[VLA]]) #[[ATTR4]]
12572 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT63]]
12573 // CHECK19:       omp_offload.cont63:
12574 // CHECK19-NEXT:    [[TMP192:%.*]] = load i32, ptr [[ARGC_ADDR]], align 4
12575 // CHECK19-NEXT:    [[CALL:%.*]] = call noundef i32 @_Z5tmainIiLi10EEiT_(i32 noundef [[TMP192]])
12576 // CHECK19-NEXT:    store i32 [[CALL]], ptr [[RETVAL]], align 4
12577 // CHECK19-NEXT:    [[TMP193:%.*]] = load ptr, ptr [[SAVED_STACK]], align 4
12578 // CHECK19-NEXT:    call void @llvm.stackrestore.p0(ptr [[TMP193]])
12579 // CHECK19-NEXT:    [[TMP194:%.*]] = load i32, ptr [[RETVAL]], align 4
12580 // CHECK19-NEXT:    ret i32 [[TMP194]]
12581 //
12582 //
12583 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148
12584 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2:[0-9]+]] {
12585 // CHECK19-NEXT:  entry:
12586 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12587 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12588 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12589 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
12590 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12591 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12592 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12593 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12594 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])
12595 // CHECK19-NEXT:    ret void
12596 //
12597 //
12598 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined
12599 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3:[0-9]+]] {
12600 // CHECK19-NEXT:  entry:
12601 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12602 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12603 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
12604 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12605 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12606 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12607 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12608 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12609 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12610 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
12611 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12612 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12613 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12614 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12615 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
12616 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12617 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12618 // CHECK19-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
12619 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12620 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12621 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
12622 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12623 // CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12624 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
12625 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
12626 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12627 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12628 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12629 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12630 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
12631 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
12632 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12633 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12634 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12635 // CHECK19:       omp.precond.then:
12636 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
12637 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12638 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
12639 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12640 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12641 // CHECK19-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12642 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
12643 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1:[0-9]+]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12644 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12645 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12646 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
12647 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12648 // CHECK19:       cond.true:
12649 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12650 // CHECK19-NEXT:    br label [[COND_END:%.*]]
12651 // CHECK19:       cond.false:
12652 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12653 // CHECK19-NEXT:    br label [[COND_END]]
12654 // CHECK19:       cond.end:
12655 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
12656 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12657 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12658 // CHECK19-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
12659 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12660 // CHECK19:       omp.inner.for.cond:
12661 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12662 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12663 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
12664 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12665 // CHECK19:       omp.inner.for.body:
12666 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12667 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12668 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])
12669 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12670 // CHECK19:       omp.inner.for.inc:
12671 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12672 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
12673 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
12674 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
12675 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
12676 // CHECK19:       omp.inner.for.end:
12677 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12678 // CHECK19:       omp.loop.exit:
12679 // CHECK19-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12680 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
12681 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
12682 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
12683 // CHECK19:       omp.precond.end:
12684 // CHECK19-NEXT:    ret void
12685 //
12686 //
12687 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l148.omp_outlined.omp_outlined
12688 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
12689 // CHECK19-NEXT:  entry:
12690 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12691 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12692 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12693 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12694 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
12695 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12696 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12697 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12698 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12699 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12700 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12701 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
12702 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12703 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12704 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12705 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12706 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
12707 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12708 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12709 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12710 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12711 // CHECK19-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
12712 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12713 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12714 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
12715 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12716 // CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12717 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
12718 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
12719 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12720 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12721 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12722 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12723 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
12724 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
12725 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12726 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12727 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12728 // CHECK19:       omp.precond.then:
12729 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
12730 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12731 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
12732 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12733 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12734 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
12735 // CHECK19-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
12736 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12737 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12738 // CHECK19-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12739 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
12740 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2:[0-9]+]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12741 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12742 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12743 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
12744 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12745 // CHECK19:       cond.true:
12746 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12747 // CHECK19-NEXT:    br label [[COND_END:%.*]]
12748 // CHECK19:       cond.false:
12749 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12750 // CHECK19-NEXT:    br label [[COND_END]]
12751 // CHECK19:       cond.end:
12752 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
12753 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
12754 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12755 // CHECK19-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
12756 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12757 // CHECK19:       omp.inner.for.cond:
12758 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12759 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12760 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
12761 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12762 // CHECK19:       omp.inner.for.body:
12763 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12764 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
12765 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12766 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
12767 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I3]], align 4
12768 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]
12769 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
12770 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12771 // CHECK19:       omp.body.continue:
12772 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12773 // CHECK19:       omp.inner.for.inc:
12774 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12775 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
12776 // CHECK19-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
12777 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
12778 // CHECK19:       omp.inner.for.end:
12779 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12780 // CHECK19:       omp.loop.exit:
12781 // CHECK19-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12782 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
12783 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
12784 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
12785 // CHECK19:       omp.precond.end:
12786 // CHECK19-NEXT:    ret void
12787 //
12788 //
12789 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153
12790 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12791 // CHECK19-NEXT:  entry:
12792 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
12793 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12794 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12795 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
12796 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12797 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12798 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12799 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12800 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])
12801 // CHECK19-NEXT:    ret void
12802 //
12803 //
12804 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined
12805 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
12806 // CHECK19-NEXT:  entry:
12807 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12808 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12809 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
12810 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12811 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12812 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12813 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12814 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12815 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12816 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
12817 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
12818 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
12819 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12820 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12821 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
12822 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12823 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12824 // CHECK19-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
12825 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12826 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12827 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
12828 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12829 // CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12830 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
12831 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
12832 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12833 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12834 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12835 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12836 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
12837 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
12838 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12839 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12840 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12841 // CHECK19:       omp.precond.then:
12842 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
12843 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12844 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
12845 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12846 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12847 // CHECK19-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12848 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
12849 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12850 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12851 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12852 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
12853 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12854 // CHECK19:       cond.true:
12855 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12856 // CHECK19-NEXT:    br label [[COND_END:%.*]]
12857 // CHECK19:       cond.false:
12858 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12859 // CHECK19-NEXT:    br label [[COND_END]]
12860 // CHECK19:       cond.end:
12861 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
12862 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
12863 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12864 // CHECK19-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
12865 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12866 // CHECK19:       omp.inner.for.cond:
12867 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12868 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12869 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
12870 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12871 // CHECK19:       omp.inner.for.body:
12872 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
12873 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
12874 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])
12875 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12876 // CHECK19:       omp.inner.for.inc:
12877 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12878 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
12879 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
12880 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
12881 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
12882 // CHECK19:       omp.inner.for.end:
12883 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12884 // CHECK19:       omp.loop.exit:
12885 // CHECK19-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12886 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
12887 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
12888 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
12889 // CHECK19:       omp.precond.end:
12890 // CHECK19-NEXT:    ret void
12891 //
12892 //
12893 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l153.omp_outlined.omp_outlined
12894 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
12895 // CHECK19-NEXT:  entry:
12896 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
12897 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
12898 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
12899 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
12900 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
12901 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
12902 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
12903 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
12904 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
12905 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
12906 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
12907 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
12908 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
12909 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
12910 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
12911 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
12912 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
12913 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
12914 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
12915 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12916 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12917 // CHECK19-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
12918 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
12919 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
12920 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
12921 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
12922 // CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
12923 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
12924 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
12925 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12926 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
12927 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
12928 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
12929 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
12930 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
12931 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
12932 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
12933 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
12934 // CHECK19:       omp.precond.then:
12935 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
12936 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12937 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
12938 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
12939 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
12940 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
12941 // CHECK19-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
12942 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
12943 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
12944 // CHECK19-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12945 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
12946 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
12947 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12948 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12949 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
12950 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
12951 // CHECK19:       cond.true:
12952 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
12953 // CHECK19-NEXT:    br label [[COND_END:%.*]]
12954 // CHECK19:       cond.false:
12955 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12956 // CHECK19-NEXT:    br label [[COND_END]]
12957 // CHECK19:       cond.end:
12958 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
12959 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
12960 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
12961 // CHECK19-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
12962 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
12963 // CHECK19:       omp.inner.for.cond:
12964 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12965 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
12966 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
12967 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
12968 // CHECK19:       omp.inner.for.body:
12969 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12970 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
12971 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
12972 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4
12973 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I3]], align 4
12974 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]
12975 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
12976 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
12977 // CHECK19:       omp.body.continue:
12978 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
12979 // CHECK19:       omp.inner.for.inc:
12980 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
12981 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP20]], 1
12982 // CHECK19-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4
12983 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
12984 // CHECK19:       omp.inner.for.end:
12985 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
12986 // CHECK19:       omp.loop.exit:
12987 // CHECK19-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
12988 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
12989 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
12990 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
12991 // CHECK19:       omp.precond.end:
12992 // CHECK19-NEXT:    ret void
12993 //
12994 //
12995 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158
12996 // CHECK19-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
12997 // CHECK19-NEXT:  entry:
12998 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
12999 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13000 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13001 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13002 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13003 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13004 // CHECK19-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 4
13005 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13006 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13007 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13008 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13009 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13010 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 4
13011 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
13012 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13013 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13014 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13015 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]])
13016 // CHECK19-NEXT:    ret void
13017 //
13018 //
13019 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined
13020 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
13021 // CHECK19-NEXT:  entry:
13022 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13023 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13024 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
13025 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13026 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13027 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13028 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13029 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13030 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13031 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13032 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13033 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13034 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13035 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13036 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13037 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
13038 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13039 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13040 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13041 // CHECK19-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
13042 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13043 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13044 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13045 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
13046 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13047 // CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13048 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
13049 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13050 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13051 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13052 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13053 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13054 // CHECK19-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
13055 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13056 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13057 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13058 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13059 // CHECK19:       omp.precond.then:
13060 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13061 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13062 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
13063 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13064 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13065 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13066 // CHECK19-NEXT:    [[TMP8:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13067 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[TMP8]], align 4
13068 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP9]], i32 91, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP7]])
13069 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13070 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13071 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP10]], [[TMP11]]
13072 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13073 // CHECK19:       cond.true:
13074 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13075 // CHECK19-NEXT:    br label [[COND_END:%.*]]
13076 // CHECK19:       cond.false:
13077 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13078 // CHECK19-NEXT:    br label [[COND_END]]
13079 // CHECK19:       cond.end:
13080 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP12]], [[COND_TRUE]] ], [ [[TMP13]], [[COND_FALSE]] ]
13081 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13082 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13083 // CHECK19-NEXT:    store i32 [[TMP14]], ptr [[DOTOMP_IV]], align 4
13084 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13085 // CHECK19:       omp.inner.for.cond:
13086 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13087 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13088 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP16]], 1
13089 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp slt i32 [[TMP15]], [[ADD]]
13090 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13091 // CHECK19:       omp.inner.for.body:
13092 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13093 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13094 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13095 // CHECK19-NEXT:    store i32 [[TMP19]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13096 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13097 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined, i32 [[TMP17]], i32 [[TMP18]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]], i32 [[TMP20]])
13098 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13099 // CHECK19:       omp.inner.for.inc:
13100 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13101 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13102 // CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP21]], [[TMP22]]
13103 // CHECK19-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
13104 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13105 // CHECK19-NEXT:    [[TMP24:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13106 // CHECK19-NEXT:    [[ADD8:%.*]] = add nsw i32 [[TMP23]], [[TMP24]]
13107 // CHECK19-NEXT:    store i32 [[ADD8]], ptr [[DOTOMP_COMB_LB]], align 4
13108 // CHECK19-NEXT:    [[TMP25:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13109 // CHECK19-NEXT:    [[TMP26:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13110 // CHECK19-NEXT:    [[ADD9:%.*]] = add nsw i32 [[TMP25]], [[TMP26]]
13111 // CHECK19-NEXT:    store i32 [[ADD9]], ptr [[DOTOMP_COMB_UB]], align 4
13112 // CHECK19-NEXT:    [[TMP27:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13113 // CHECK19-NEXT:    [[TMP28:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13114 // CHECK19-NEXT:    [[CMP10:%.*]] = icmp sgt i32 [[TMP27]], [[TMP28]]
13115 // CHECK19-NEXT:    br i1 [[CMP10]], label [[COND_TRUE11:%.*]], label [[COND_FALSE12:%.*]]
13116 // CHECK19:       cond.true11:
13117 // CHECK19-NEXT:    [[TMP29:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13118 // CHECK19-NEXT:    br label [[COND_END13:%.*]]
13119 // CHECK19:       cond.false12:
13120 // CHECK19-NEXT:    [[TMP30:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13121 // CHECK19-NEXT:    br label [[COND_END13]]
13122 // CHECK19:       cond.end13:
13123 // CHECK19-NEXT:    [[COND14:%.*]] = phi i32 [ [[TMP29]], [[COND_TRUE11]] ], [ [[TMP30]], [[COND_FALSE12]] ]
13124 // CHECK19-NEXT:    store i32 [[COND14]], ptr [[DOTOMP_COMB_UB]], align 4
13125 // CHECK19-NEXT:    [[TMP31:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13126 // CHECK19-NEXT:    store i32 [[TMP31]], ptr [[DOTOMP_IV]], align 4
13127 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
13128 // CHECK19:       omp.inner.for.end:
13129 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13130 // CHECK19:       omp.loop.exit:
13131 // CHECK19-NEXT:    [[TMP32:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13132 // CHECK19-NEXT:    [[TMP33:%.*]] = load i32, ptr [[TMP32]], align 4
13133 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP33]])
13134 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13135 // CHECK19:       omp.precond.end:
13136 // CHECK19-NEXT:    ret void
13137 //
13138 //
13139 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l158.omp_outlined.omp_outlined
13140 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
13141 // CHECK19-NEXT:  entry:
13142 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13143 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13144 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13145 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13146 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
13147 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13148 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13149 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13150 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13151 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13152 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13153 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13154 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13155 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13156 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13157 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13158 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13159 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
13160 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13161 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13162 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13163 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13164 // CHECK19-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
13165 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13166 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13167 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13168 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
13169 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13170 // CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13171 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
13172 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13173 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13174 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13175 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13176 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13177 // CHECK19-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
13178 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13179 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13180 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13181 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13182 // CHECK19:       omp.precond.then:
13183 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
13184 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13185 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
13186 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13187 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13188 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
13189 // CHECK19-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
13190 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13191 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13192 // CHECK19-NEXT:    [[TMP9:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13193 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[TMP9]], align 4
13194 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP10]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13195 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13196 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13197 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP11]], [[TMP12]]
13198 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13199 // CHECK19:       cond.true:
13200 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13201 // CHECK19-NEXT:    br label [[COND_END:%.*]]
13202 // CHECK19:       cond.false:
13203 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13204 // CHECK19-NEXT:    br label [[COND_END]]
13205 // CHECK19:       cond.end:
13206 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP13]], [[COND_TRUE]] ], [ [[TMP14]], [[COND_FALSE]] ]
13207 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
13208 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13209 // CHECK19-NEXT:    store i32 [[TMP15]], ptr [[DOTOMP_IV]], align 4
13210 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13211 // CHECK19:       omp.inner.for.cond:
13212 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13213 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13214 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP16]], [[TMP17]]
13215 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13216 // CHECK19:       omp.inner.for.body:
13217 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13218 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP18]], 1
13219 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13220 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4
13221 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[I4]], align 4
13222 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP19]]
13223 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
13224 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13225 // CHECK19:       omp.body.continue:
13226 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13227 // CHECK19:       omp.inner.for.inc:
13228 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13229 // CHECK19-NEXT:    [[ADD7:%.*]] = add nsw i32 [[TMP20]], 1
13230 // CHECK19-NEXT:    store i32 [[ADD7]], ptr [[DOTOMP_IV]], align 4
13231 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
13232 // CHECK19:       omp.inner.for.end:
13233 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13234 // CHECK19:       omp.loop.exit:
13235 // CHECK19-NEXT:    [[TMP21:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13236 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[TMP21]], align 4
13237 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP22]])
13238 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13239 // CHECK19:       omp.precond.end:
13240 // CHECK19-NEXT:    ret void
13241 //
13242 //
13243 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163
13244 // CHECK19-SAME: (i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13245 // CHECK19-NEXT:  entry:
13246 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13247 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13248 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13249 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13250 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13251 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13252 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13253 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13254 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]])
13255 // CHECK19-NEXT:    ret void
13256 //
13257 //
13258 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined
13259 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
13260 // CHECK19-NEXT:  entry:
13261 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13262 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13263 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
13264 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13265 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13266 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13267 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13268 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13269 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13270 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13271 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13272 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13273 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13274 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13275 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
13276 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13277 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13278 // CHECK19-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
13279 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13280 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13281 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
13282 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13283 // CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13284 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
13285 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
13286 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13287 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13288 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13289 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13290 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13291 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13292 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13293 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13294 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13295 // CHECK19:       omp.precond.then:
13296 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13297 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13298 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
13299 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13300 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13301 // CHECK19-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13302 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
13303 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13304 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13305 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13306 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13307 // CHECK19-NEXT:    br i1 [[CMP4]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13308 // CHECK19:       cond.true:
13309 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13310 // CHECK19-NEXT:    br label [[COND_END:%.*]]
13311 // CHECK19:       cond.false:
13312 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13313 // CHECK19-NEXT:    br label [[COND_END]]
13314 // CHECK19:       cond.end:
13315 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13316 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13317 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13318 // CHECK19-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
13319 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13320 // CHECK19:       omp.inner.for.cond:
13321 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13322 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13323 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13324 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13325 // CHECK19:       omp.inner.for.body:
13326 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13327 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13328 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 5, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]])
13329 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13330 // CHECK19:       omp.inner.for.inc:
13331 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13332 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13333 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
13334 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
13335 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
13336 // CHECK19:       omp.inner.for.end:
13337 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13338 // CHECK19:       omp.loop.exit:
13339 // CHECK19-NEXT:    [[TMP20:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13340 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[TMP20]], align 4
13341 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP21]])
13342 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13343 // CHECK19:       omp.precond.end:
13344 // CHECK19-NEXT:    ret void
13345 //
13346 //
13347 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l163.omp_outlined.omp_outlined
13348 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR3]] {
13349 // CHECK19-NEXT:  entry:
13350 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13351 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13352 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13353 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13354 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
13355 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13356 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13357 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13358 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13359 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13360 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13361 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13362 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13363 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13364 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13365 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13366 // CHECK19-NEXT:    [[I3:%.*]] = alloca i32, align 4
13367 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13368 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13369 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13370 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13371 // CHECK19-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
13372 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13373 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13374 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
13375 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13376 // CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13377 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
13378 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_]], align 4
13379 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13380 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13381 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13382 // CHECK19-NEXT:    [[SUB2:%.*]] = sub nsw i32 [[DIV]], 1
13383 // CHECK19-NEXT:    store i32 [[SUB2]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13384 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13385 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13386 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13387 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13388 // CHECK19:       omp.precond.then:
13389 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
13390 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13391 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
13392 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13393 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13394 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
13395 // CHECK19-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
13396 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13397 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13398 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13399 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13400 // CHECK19-NEXT:    [[TMP11:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13401 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[TMP11]], align 4
13402 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP12]], i32 35, i32 [[TMP9]], i32 [[TMP10]], i32 1, i32 1)
13403 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
13404 // CHECK19:       omp.dispatch.cond:
13405 // CHECK19-NEXT:    [[TMP13:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13406 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[TMP13]], align 4
13407 // CHECK19-NEXT:    [[TMP15:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP14]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
13408 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP15]], 0
13409 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13410 // CHECK19:       omp.dispatch.body:
13411 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13412 // CHECK19-NEXT:    store i32 [[TMP16]], ptr [[DOTOMP_IV]], align 4
13413 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13414 // CHECK19:       omp.inner.for.cond:
13415 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16:![0-9]+]]
13416 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP16]]
13417 // CHECK19-NEXT:    [[CMP4:%.*]] = icmp sle i32 [[TMP17]], [[TMP18]]
13418 // CHECK19-NEXT:    br i1 [[CMP4]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13419 // CHECK19:       omp.inner.for.body:
13420 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
13421 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP19]], 1
13422 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13423 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]
13424 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[I3]], align 4, !llvm.access.group [[ACC_GRP16]]
13425 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP20]]
13426 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP16]]
13427 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13428 // CHECK19:       omp.body.continue:
13429 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13430 // CHECK19:       omp.inner.for.inc:
13431 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
13432 // CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP21]], 1
13433 // CHECK19-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP16]]
13434 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP17:![0-9]+]]
13435 // CHECK19:       omp.inner.for.end:
13436 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
13437 // CHECK19:       omp.dispatch.inc:
13438 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
13439 // CHECK19:       omp.dispatch.end:
13440 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13441 // CHECK19:       omp.precond.end:
13442 // CHECK19-NEXT:    ret void
13443 //
13444 //
13445 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168
13446 // CHECK19-SAME: (i32 noundef [[M:%.*]], i32 noundef [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]]) #[[ATTR2]] {
13447 // CHECK19-NEXT:  entry:
13448 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
13449 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca i32, align 4
13450 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13451 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13452 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
13453 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13454 // CHECK19-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 4
13455 // CHECK19-NEXT:    store i32 [[N]], ptr [[N_ADDR]], align 4
13456 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13457 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13458 // CHECK19-NEXT:    [[TMP0:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13459 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13460 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[M_ADDR]], align 4
13461 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR_]], align 4
13462 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
13463 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13464 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13465 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined, ptr [[N_ADDR]], i32 [[TMP0]], ptr [[TMP1]], i32 [[TMP4]])
13466 // CHECK19-NEXT:    ret void
13467 //
13468 //
13469 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined
13470 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
13471 // CHECK19-NEXT:  entry:
13472 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13473 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13474 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
13475 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13476 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13477 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13478 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13479 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13480 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13481 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13482 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13483 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13484 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13485 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13486 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13487 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
13488 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
13489 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13490 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13491 // CHECK19-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
13492 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13493 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13494 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13495 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
13496 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13497 // CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13498 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
13499 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13500 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13501 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13502 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13503 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13504 // CHECK19-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
13505 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13506 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13507 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13508 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13509 // CHECK19:       omp.precond.then:
13510 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13511 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13512 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_COMB_UB]], align 4
13513 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13514 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13515 // CHECK19-NEXT:    [[TMP7:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13516 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[TMP7]], align 4
13517 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP8]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13518 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13519 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13520 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sgt i32 [[TMP9]], [[TMP10]]
13521 // CHECK19-NEXT:    br i1 [[CMP5]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13522 // CHECK19:       cond.true:
13523 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13524 // CHECK19-NEXT:    br label [[COND_END:%.*]]
13525 // CHECK19:       cond.false:
13526 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13527 // CHECK19-NEXT:    br label [[COND_END]]
13528 // CHECK19:       cond.end:
13529 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP11]], [[COND_TRUE]] ], [ [[TMP12]], [[COND_FALSE]] ]
13530 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13531 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13532 // CHECK19-NEXT:    store i32 [[TMP13]], ptr [[DOTOMP_IV]], align 4
13533 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13534 // CHECK19:       omp.inner.for.cond:
13535 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13536 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13537 // CHECK19-NEXT:    [[CMP6:%.*]] = icmp sle i32 [[TMP14]], [[TMP15]]
13538 // CHECK19-NEXT:    br i1 [[CMP6]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13539 // CHECK19:       omp.inner.for.body:
13540 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13541 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13542 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13543 // CHECK19-NEXT:    store i32 [[TMP18]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13544 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
13545 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 6, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined, i32 [[TMP16]], i32 [[TMP17]], ptr [[TMP0]], i32 [[TMP1]], ptr [[TMP2]], i32 [[TMP19]])
13546 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13547 // CHECK19:       omp.inner.for.inc:
13548 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13549 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13550 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
13551 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
13552 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
13553 // CHECK19:       omp.inner.for.end:
13554 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13555 // CHECK19:       omp.loop.exit:
13556 // CHECK19-NEXT:    [[TMP22:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13557 // CHECK19-NEXT:    [[TMP23:%.*]] = load i32, ptr [[TMP22]], align 4
13558 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP23]])
13559 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13560 // CHECK19:       omp.precond.end:
13561 // CHECK19-NEXT:    ret void
13562 //
13563 //
13564 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}_main_l168.omp_outlined.omp_outlined
13565 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[N:%.*]], i32 noundef [[VLA:%.*]], ptr noundef nonnull align 4 dereferenceable(4) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
13566 // CHECK19-NEXT:  entry:
13567 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13568 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13569 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
13570 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
13571 // CHECK19-NEXT:    [[N_ADDR:%.*]] = alloca ptr, align 4
13572 // CHECK19-NEXT:    [[VLA_ADDR:%.*]] = alloca i32, align 4
13573 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13574 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
13575 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13576 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13577 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_1:%.*]] = alloca i32, align 4
13578 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_2:%.*]] = alloca i32, align 4
13579 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13580 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
13581 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
13582 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13583 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13584 // CHECK19-NEXT:    [[I4:%.*]] = alloca i32, align 4
13585 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13586 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13587 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13588 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13589 // CHECK19-NEXT:    store ptr [[N]], ptr [[N_ADDR]], align 4
13590 // CHECK19-NEXT:    store i32 [[VLA]], ptr [[VLA_ADDR]], align 4
13591 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13592 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13593 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[N_ADDR]], align 4
13594 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[VLA_ADDR]], align 4
13595 // CHECK19-NEXT:    [[TMP2:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13596 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[TMP0]], align 4
13597 // CHECK19-NEXT:    store i32 [[TMP3]], ptr [[DOTCAPTURE_EXPR_1]], align 4
13598 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13599 // CHECK19-NEXT:    [[SUB:%.*]] = sub nsw i32 [[TMP4]], 0
13600 // CHECK19-NEXT:    [[DIV:%.*]] = sdiv i32 [[SUB]], 1
13601 // CHECK19-NEXT:    [[SUB3:%.*]] = sub nsw i32 [[DIV]], 1
13602 // CHECK19-NEXT:    store i32 [[SUB3]], ptr [[DOTCAPTURE_EXPR_2]], align 4
13603 // CHECK19-NEXT:    store i32 0, ptr [[I]], align 4
13604 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_1]], align 4
13605 // CHECK19-NEXT:    [[CMP:%.*]] = icmp slt i32 0, [[TMP5]]
13606 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_PRECOND_THEN:%.*]], label [[OMP_PRECOND_END:%.*]]
13607 // CHECK19:       omp.precond.then:
13608 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
13609 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_2]], align 4
13610 // CHECK19-NEXT:    store i32 [[TMP6]], ptr [[DOTOMP_UB]], align 4
13611 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
13612 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
13613 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_LB]], align 4
13614 // CHECK19-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_UB]], align 4
13615 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13616 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13617 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
13618 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13619 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
13620 // CHECK19-NEXT:    [[TMP12:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13621 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[TMP12]], align 4
13622 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP13]], i32 35, i32 [[TMP10]], i32 [[TMP11]], i32 1, i32 [[TMP9]])
13623 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
13624 // CHECK19:       omp.dispatch.cond:
13625 // CHECK19-NEXT:    [[TMP14:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13626 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[TMP14]], align 4
13627 // CHECK19-NEXT:    [[TMP16:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP15]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
13628 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP16]], 0
13629 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
13630 // CHECK19:       omp.dispatch.body:
13631 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
13632 // CHECK19-NEXT:    store i32 [[TMP17]], ptr [[DOTOMP_IV]], align 4
13633 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13634 // CHECK19:       omp.inner.for.cond:
13635 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19:![0-9]+]]
13636 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP19]]
13637 // CHECK19-NEXT:    [[CMP5:%.*]] = icmp sle i32 [[TMP18]], [[TMP19]]
13638 // CHECK19-NEXT:    br i1 [[CMP5]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13639 // CHECK19:       omp.inner.for.body:
13640 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
13641 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP20]], 1
13642 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
13643 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]
13644 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[I4]], align 4, !llvm.access.group [[ACC_GRP19]]
13645 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds i32, ptr [[TMP2]], i32 [[TMP21]]
13646 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP19]]
13647 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
13648 // CHECK19:       omp.body.continue:
13649 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13650 // CHECK19:       omp.inner.for.inc:
13651 // CHECK19-NEXT:    [[TMP22:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
13652 // CHECK19-NEXT:    [[ADD6:%.*]] = add nsw i32 [[TMP22]], 1
13653 // CHECK19-NEXT:    store i32 [[ADD6]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP19]]
13654 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP20:![0-9]+]]
13655 // CHECK19:       omp.inner.for.end:
13656 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
13657 // CHECK19:       omp.dispatch.inc:
13658 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
13659 // CHECK19:       omp.dispatch.end:
13660 // CHECK19-NEXT:    br label [[OMP_PRECOND_END]]
13661 // CHECK19:       omp.precond.end:
13662 // CHECK19-NEXT:    ret void
13663 //
13664 //
13665 // CHECK19-LABEL: define {{[^@]+}}@_Z5tmainIiLi10EEiT_
13666 // CHECK19-SAME: (i32 noundef [[ARGC:%.*]]) #[[ATTR6:[0-9]+]] comdat {
13667 // CHECK19-NEXT:  entry:
13668 // CHECK19-NEXT:    [[ARGC_ADDR:%.*]] = alloca i32, align 4
13669 // CHECK19-NEXT:    [[A:%.*]] = alloca [10 x i32], align 4
13670 // CHECK19-NEXT:    [[M:%.*]] = alloca i32, align 4
13671 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS:%.*]] = alloca [1 x ptr], align 4
13672 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS:%.*]] = alloca [1 x ptr], align 4
13673 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS:%.*]] = alloca [1 x ptr], align 4
13674 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13675 // CHECK19-NEXT:    [[KERNEL_ARGS:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS:%.*]], align 8
13676 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS1:%.*]] = alloca [1 x ptr], align 4
13677 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS2:%.*]] = alloca [1 x ptr], align 4
13678 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS3:%.*]] = alloca [1 x ptr], align 4
13679 // CHECK19-NEXT:    [[_TMP4:%.*]] = alloca i32, align 4
13680 // CHECK19-NEXT:    [[KERNEL_ARGS5:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13681 // CHECK19-NEXT:    [[M_CASTED:%.*]] = alloca i32, align 4
13682 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS8:%.*]] = alloca [2 x ptr], align 4
13683 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS9:%.*]] = alloca [2 x ptr], align 4
13684 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS10:%.*]] = alloca [2 x ptr], align 4
13685 // CHECK19-NEXT:    [[_TMP11:%.*]] = alloca i32, align 4
13686 // CHECK19-NEXT:    [[KERNEL_ARGS12:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13687 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS15:%.*]] = alloca [1 x ptr], align 4
13688 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS16:%.*]] = alloca [1 x ptr], align 4
13689 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS17:%.*]] = alloca [1 x ptr], align 4
13690 // CHECK19-NEXT:    [[_TMP18:%.*]] = alloca i32, align 4
13691 // CHECK19-NEXT:    [[KERNEL_ARGS19:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13692 // CHECK19-NEXT:    [[M_CASTED22:%.*]] = alloca i32, align 4
13693 // CHECK19-NEXT:    [[DOTOFFLOAD_BASEPTRS23:%.*]] = alloca [2 x ptr], align 4
13694 // CHECK19-NEXT:    [[DOTOFFLOAD_PTRS24:%.*]] = alloca [2 x ptr], align 4
13695 // CHECK19-NEXT:    [[DOTOFFLOAD_MAPPERS25:%.*]] = alloca [2 x ptr], align 4
13696 // CHECK19-NEXT:    [[_TMP26:%.*]] = alloca i32, align 4
13697 // CHECK19-NEXT:    [[KERNEL_ARGS27:%.*]] = alloca [[STRUCT___TGT_KERNEL_ARGUMENTS]], align 8
13698 // CHECK19-NEXT:    store i32 [[ARGC]], ptr [[ARGC_ADDR]], align 4
13699 // CHECK19-NEXT:    store i32 10, ptr [[M]], align 4
13700 // CHECK19-NEXT:    [[TMP0:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13701 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP0]], align 4
13702 // CHECK19-NEXT:    [[TMP1:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13703 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP1]], align 4
13704 // CHECK19-NEXT:    [[TMP2:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS]], i32 0, i32 0
13705 // CHECK19-NEXT:    store ptr null, ptr [[TMP2]], align 4
13706 // CHECK19-NEXT:    [[TMP3:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS]], i32 0, i32 0
13707 // CHECK19-NEXT:    [[TMP4:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS]], i32 0, i32 0
13708 // CHECK19-NEXT:    [[TMP5:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 0
13709 // CHECK19-NEXT:    store i32 2, ptr [[TMP5]], align 4
13710 // CHECK19-NEXT:    [[TMP6:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 1
13711 // CHECK19-NEXT:    store i32 1, ptr [[TMP6]], align 4
13712 // CHECK19-NEXT:    [[TMP7:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 2
13713 // CHECK19-NEXT:    store ptr [[TMP3]], ptr [[TMP7]], align 4
13714 // CHECK19-NEXT:    [[TMP8:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 3
13715 // CHECK19-NEXT:    store ptr [[TMP4]], ptr [[TMP8]], align 4
13716 // CHECK19-NEXT:    [[TMP9:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 4
13717 // CHECK19-NEXT:    store ptr @.offload_sizes.9, ptr [[TMP9]], align 4
13718 // CHECK19-NEXT:    [[TMP10:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 5
13719 // CHECK19-NEXT:    store ptr @.offload_maptypes.10, ptr [[TMP10]], align 4
13720 // CHECK19-NEXT:    [[TMP11:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 6
13721 // CHECK19-NEXT:    store ptr null, ptr [[TMP11]], align 4
13722 // CHECK19-NEXT:    [[TMP12:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 7
13723 // CHECK19-NEXT:    store ptr null, ptr [[TMP12]], align 4
13724 // CHECK19-NEXT:    [[TMP13:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 8
13725 // CHECK19-NEXT:    store i64 10, ptr [[TMP13]], align 8
13726 // CHECK19-NEXT:    [[TMP14:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 9
13727 // CHECK19-NEXT:    store i64 0, ptr [[TMP14]], align 8
13728 // CHECK19-NEXT:    [[TMP15:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 10
13729 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP15]], align 4
13730 // CHECK19-NEXT:    [[TMP16:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 11
13731 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP16]], align 4
13732 // CHECK19-NEXT:    [[TMP17:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS]], i32 0, i32 12
13733 // CHECK19-NEXT:    store i32 0, ptr [[TMP17]], align 4
13734 // CHECK19-NEXT:    [[TMP18:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.region_id, ptr [[KERNEL_ARGS]])
13735 // CHECK19-NEXT:    [[TMP19:%.*]] = icmp ne i32 [[TMP18]], 0
13736 // CHECK19-NEXT:    br i1 [[TMP19]], label [[OMP_OFFLOAD_FAILED:%.*]], label [[OMP_OFFLOAD_CONT:%.*]]
13737 // CHECK19:       omp_offload.failed:
13738 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116(ptr [[A]]) #[[ATTR4]]
13739 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT]]
13740 // CHECK19:       omp_offload.cont:
13741 // CHECK19-NEXT:    [[TMP20:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13742 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP20]], align 4
13743 // CHECK19-NEXT:    [[TMP21:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13744 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP21]], align 4
13745 // CHECK19-NEXT:    [[TMP22:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS3]], i32 0, i32 0
13746 // CHECK19-NEXT:    store ptr null, ptr [[TMP22]], align 4
13747 // CHECK19-NEXT:    [[TMP23:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS1]], i32 0, i32 0
13748 // CHECK19-NEXT:    [[TMP24:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS2]], i32 0, i32 0
13749 // CHECK19-NEXT:    [[TMP25:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 0
13750 // CHECK19-NEXT:    store i32 2, ptr [[TMP25]], align 4
13751 // CHECK19-NEXT:    [[TMP26:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 1
13752 // CHECK19-NEXT:    store i32 1, ptr [[TMP26]], align 4
13753 // CHECK19-NEXT:    [[TMP27:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 2
13754 // CHECK19-NEXT:    store ptr [[TMP23]], ptr [[TMP27]], align 4
13755 // CHECK19-NEXT:    [[TMP28:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 3
13756 // CHECK19-NEXT:    store ptr [[TMP24]], ptr [[TMP28]], align 4
13757 // CHECK19-NEXT:    [[TMP29:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 4
13758 // CHECK19-NEXT:    store ptr @.offload_sizes.11, ptr [[TMP29]], align 4
13759 // CHECK19-NEXT:    [[TMP30:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 5
13760 // CHECK19-NEXT:    store ptr @.offload_maptypes.12, ptr [[TMP30]], align 4
13761 // CHECK19-NEXT:    [[TMP31:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 6
13762 // CHECK19-NEXT:    store ptr null, ptr [[TMP31]], align 4
13763 // CHECK19-NEXT:    [[TMP32:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 7
13764 // CHECK19-NEXT:    store ptr null, ptr [[TMP32]], align 4
13765 // CHECK19-NEXT:    [[TMP33:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 8
13766 // CHECK19-NEXT:    store i64 10, ptr [[TMP33]], align 8
13767 // CHECK19-NEXT:    [[TMP34:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 9
13768 // CHECK19-NEXT:    store i64 0, ptr [[TMP34]], align 8
13769 // CHECK19-NEXT:    [[TMP35:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 10
13770 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP35]], align 4
13771 // CHECK19-NEXT:    [[TMP36:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 11
13772 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP36]], align 4
13773 // CHECK19-NEXT:    [[TMP37:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS5]], i32 0, i32 12
13774 // CHECK19-NEXT:    store i32 0, ptr [[TMP37]], align 4
13775 // CHECK19-NEXT:    [[TMP38:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.region_id, ptr [[KERNEL_ARGS5]])
13776 // CHECK19-NEXT:    [[TMP39:%.*]] = icmp ne i32 [[TMP38]], 0
13777 // CHECK19-NEXT:    br i1 [[TMP39]], label [[OMP_OFFLOAD_FAILED6:%.*]], label [[OMP_OFFLOAD_CONT7:%.*]]
13778 // CHECK19:       omp_offload.failed6:
13779 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121(ptr [[A]]) #[[ATTR4]]
13780 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT7]]
13781 // CHECK19:       omp_offload.cont7:
13782 // CHECK19-NEXT:    [[TMP40:%.*]] = load i32, ptr [[M]], align 4
13783 // CHECK19-NEXT:    store i32 [[TMP40]], ptr [[M_CASTED]], align 4
13784 // CHECK19-NEXT:    [[TMP41:%.*]] = load i32, ptr [[M_CASTED]], align 4
13785 // CHECK19-NEXT:    [[TMP42:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
13786 // CHECK19-NEXT:    store i32 [[TMP41]], ptr [[TMP42]], align 4
13787 // CHECK19-NEXT:    [[TMP43:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
13788 // CHECK19-NEXT:    store i32 [[TMP41]], ptr [[TMP43]], align 4
13789 // CHECK19-NEXT:    [[TMP44:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 0
13790 // CHECK19-NEXT:    store ptr null, ptr [[TMP44]], align 4
13791 // CHECK19-NEXT:    [[TMP45:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 1
13792 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP45]], align 4
13793 // CHECK19-NEXT:    [[TMP46:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 1
13794 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP46]], align 4
13795 // CHECK19-NEXT:    [[TMP47:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS10]], i32 0, i32 1
13796 // CHECK19-NEXT:    store ptr null, ptr [[TMP47]], align 4
13797 // CHECK19-NEXT:    [[TMP48:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS8]], i32 0, i32 0
13798 // CHECK19-NEXT:    [[TMP49:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS9]], i32 0, i32 0
13799 // CHECK19-NEXT:    [[TMP50:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 0
13800 // CHECK19-NEXT:    store i32 2, ptr [[TMP50]], align 4
13801 // CHECK19-NEXT:    [[TMP51:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 1
13802 // CHECK19-NEXT:    store i32 2, ptr [[TMP51]], align 4
13803 // CHECK19-NEXT:    [[TMP52:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 2
13804 // CHECK19-NEXT:    store ptr [[TMP48]], ptr [[TMP52]], align 4
13805 // CHECK19-NEXT:    [[TMP53:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 3
13806 // CHECK19-NEXT:    store ptr [[TMP49]], ptr [[TMP53]], align 4
13807 // CHECK19-NEXT:    [[TMP54:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 4
13808 // CHECK19-NEXT:    store ptr @.offload_sizes.13, ptr [[TMP54]], align 4
13809 // CHECK19-NEXT:    [[TMP55:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 5
13810 // CHECK19-NEXT:    store ptr @.offload_maptypes.14, ptr [[TMP55]], align 4
13811 // CHECK19-NEXT:    [[TMP56:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 6
13812 // CHECK19-NEXT:    store ptr null, ptr [[TMP56]], align 4
13813 // CHECK19-NEXT:    [[TMP57:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 7
13814 // CHECK19-NEXT:    store ptr null, ptr [[TMP57]], align 4
13815 // CHECK19-NEXT:    [[TMP58:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 8
13816 // CHECK19-NEXT:    store i64 10, ptr [[TMP58]], align 8
13817 // CHECK19-NEXT:    [[TMP59:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 9
13818 // CHECK19-NEXT:    store i64 0, ptr [[TMP59]], align 8
13819 // CHECK19-NEXT:    [[TMP60:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 10
13820 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP60]], align 4
13821 // CHECK19-NEXT:    [[TMP61:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 11
13822 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP61]], align 4
13823 // CHECK19-NEXT:    [[TMP62:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS12]], i32 0, i32 12
13824 // CHECK19-NEXT:    store i32 0, ptr [[TMP62]], align 4
13825 // CHECK19-NEXT:    [[TMP63:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.region_id, ptr [[KERNEL_ARGS12]])
13826 // CHECK19-NEXT:    [[TMP64:%.*]] = icmp ne i32 [[TMP63]], 0
13827 // CHECK19-NEXT:    br i1 [[TMP64]], label [[OMP_OFFLOAD_FAILED13:%.*]], label [[OMP_OFFLOAD_CONT14:%.*]]
13828 // CHECK19:       omp_offload.failed13:
13829 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126(i32 [[TMP41]], ptr [[A]]) #[[ATTR4]]
13830 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT14]]
13831 // CHECK19:       omp_offload.cont14:
13832 // CHECK19-NEXT:    [[TMP65:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
13833 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP65]], align 4
13834 // CHECK19-NEXT:    [[TMP66:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
13835 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP66]], align 4
13836 // CHECK19-NEXT:    [[TMP67:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_MAPPERS17]], i32 0, i32 0
13837 // CHECK19-NEXT:    store ptr null, ptr [[TMP67]], align 4
13838 // CHECK19-NEXT:    [[TMP68:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_BASEPTRS15]], i32 0, i32 0
13839 // CHECK19-NEXT:    [[TMP69:%.*]] = getelementptr inbounds [1 x ptr], ptr [[DOTOFFLOAD_PTRS16]], i32 0, i32 0
13840 // CHECK19-NEXT:    [[TMP70:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 0
13841 // CHECK19-NEXT:    store i32 2, ptr [[TMP70]], align 4
13842 // CHECK19-NEXT:    [[TMP71:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 1
13843 // CHECK19-NEXT:    store i32 1, ptr [[TMP71]], align 4
13844 // CHECK19-NEXT:    [[TMP72:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 2
13845 // CHECK19-NEXT:    store ptr [[TMP68]], ptr [[TMP72]], align 4
13846 // CHECK19-NEXT:    [[TMP73:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 3
13847 // CHECK19-NEXT:    store ptr [[TMP69]], ptr [[TMP73]], align 4
13848 // CHECK19-NEXT:    [[TMP74:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 4
13849 // CHECK19-NEXT:    store ptr @.offload_sizes.15, ptr [[TMP74]], align 4
13850 // CHECK19-NEXT:    [[TMP75:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 5
13851 // CHECK19-NEXT:    store ptr @.offload_maptypes.16, ptr [[TMP75]], align 4
13852 // CHECK19-NEXT:    [[TMP76:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 6
13853 // CHECK19-NEXT:    store ptr null, ptr [[TMP76]], align 4
13854 // CHECK19-NEXT:    [[TMP77:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 7
13855 // CHECK19-NEXT:    store ptr null, ptr [[TMP77]], align 4
13856 // CHECK19-NEXT:    [[TMP78:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 8
13857 // CHECK19-NEXT:    store i64 10, ptr [[TMP78]], align 8
13858 // CHECK19-NEXT:    [[TMP79:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 9
13859 // CHECK19-NEXT:    store i64 0, ptr [[TMP79]], align 8
13860 // CHECK19-NEXT:    [[TMP80:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 10
13861 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP80]], align 4
13862 // CHECK19-NEXT:    [[TMP81:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 11
13863 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP81]], align 4
13864 // CHECK19-NEXT:    [[TMP82:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS19]], i32 0, i32 12
13865 // CHECK19-NEXT:    store i32 0, ptr [[TMP82]], align 4
13866 // CHECK19-NEXT:    [[TMP83:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.region_id, ptr [[KERNEL_ARGS19]])
13867 // CHECK19-NEXT:    [[TMP84:%.*]] = icmp ne i32 [[TMP83]], 0
13868 // CHECK19-NEXT:    br i1 [[TMP84]], label [[OMP_OFFLOAD_FAILED20:%.*]], label [[OMP_OFFLOAD_CONT21:%.*]]
13869 // CHECK19:       omp_offload.failed20:
13870 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131(ptr [[A]]) #[[ATTR4]]
13871 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT21]]
13872 // CHECK19:       omp_offload.cont21:
13873 // CHECK19-NEXT:    [[TMP85:%.*]] = load i32, ptr [[M]], align 4
13874 // CHECK19-NEXT:    store i32 [[TMP85]], ptr [[M_CASTED22]], align 4
13875 // CHECK19-NEXT:    [[TMP86:%.*]] = load i32, ptr [[M_CASTED22]], align 4
13876 // CHECK19-NEXT:    [[TMP87:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
13877 // CHECK19-NEXT:    store i32 [[TMP86]], ptr [[TMP87]], align 4
13878 // CHECK19-NEXT:    [[TMP88:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
13879 // CHECK19-NEXT:    store i32 [[TMP86]], ptr [[TMP88]], align 4
13880 // CHECK19-NEXT:    [[TMP89:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 0
13881 // CHECK19-NEXT:    store ptr null, ptr [[TMP89]], align 4
13882 // CHECK19-NEXT:    [[TMP90:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 1
13883 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP90]], align 4
13884 // CHECK19-NEXT:    [[TMP91:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 1
13885 // CHECK19-NEXT:    store ptr [[A]], ptr [[TMP91]], align 4
13886 // CHECK19-NEXT:    [[TMP92:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_MAPPERS25]], i32 0, i32 1
13887 // CHECK19-NEXT:    store ptr null, ptr [[TMP92]], align 4
13888 // CHECK19-NEXT:    [[TMP93:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_BASEPTRS23]], i32 0, i32 0
13889 // CHECK19-NEXT:    [[TMP94:%.*]] = getelementptr inbounds [2 x ptr], ptr [[DOTOFFLOAD_PTRS24]], i32 0, i32 0
13890 // CHECK19-NEXT:    [[TMP95:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 0
13891 // CHECK19-NEXT:    store i32 2, ptr [[TMP95]], align 4
13892 // CHECK19-NEXT:    [[TMP96:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 1
13893 // CHECK19-NEXT:    store i32 2, ptr [[TMP96]], align 4
13894 // CHECK19-NEXT:    [[TMP97:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 2
13895 // CHECK19-NEXT:    store ptr [[TMP93]], ptr [[TMP97]], align 4
13896 // CHECK19-NEXT:    [[TMP98:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 3
13897 // CHECK19-NEXT:    store ptr [[TMP94]], ptr [[TMP98]], align 4
13898 // CHECK19-NEXT:    [[TMP99:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 4
13899 // CHECK19-NEXT:    store ptr @.offload_sizes.17, ptr [[TMP99]], align 4
13900 // CHECK19-NEXT:    [[TMP100:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 5
13901 // CHECK19-NEXT:    store ptr @.offload_maptypes.18, ptr [[TMP100]], align 4
13902 // CHECK19-NEXT:    [[TMP101:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 6
13903 // CHECK19-NEXT:    store ptr null, ptr [[TMP101]], align 4
13904 // CHECK19-NEXT:    [[TMP102:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 7
13905 // CHECK19-NEXT:    store ptr null, ptr [[TMP102]], align 4
13906 // CHECK19-NEXT:    [[TMP103:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 8
13907 // CHECK19-NEXT:    store i64 10, ptr [[TMP103]], align 8
13908 // CHECK19-NEXT:    [[TMP104:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 9
13909 // CHECK19-NEXT:    store i64 0, ptr [[TMP104]], align 8
13910 // CHECK19-NEXT:    [[TMP105:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 10
13911 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP105]], align 4
13912 // CHECK19-NEXT:    [[TMP106:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 11
13913 // CHECK19-NEXT:    store [3 x i32] zeroinitializer, ptr [[TMP106]], align 4
13914 // CHECK19-NEXT:    [[TMP107:%.*]] = getelementptr inbounds [[STRUCT___TGT_KERNEL_ARGUMENTS]], ptr [[KERNEL_ARGS27]], i32 0, i32 12
13915 // CHECK19-NEXT:    store i32 0, ptr [[TMP107]], align 4
13916 // CHECK19-NEXT:    [[TMP108:%.*]] = call i32 @__tgt_target_kernel(ptr @[[GLOB3]], i64 -1, i32 0, i32 0, ptr @.{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.region_id, ptr [[KERNEL_ARGS27]])
13917 // CHECK19-NEXT:    [[TMP109:%.*]] = icmp ne i32 [[TMP108]], 0
13918 // CHECK19-NEXT:    br i1 [[TMP109]], label [[OMP_OFFLOAD_FAILED28:%.*]], label [[OMP_OFFLOAD_CONT29:%.*]]
13919 // CHECK19:       omp_offload.failed28:
13920 // CHECK19-NEXT:    call void @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136(i32 [[TMP86]], ptr [[A]]) #[[ATTR4]]
13921 // CHECK19-NEXT:    br label [[OMP_OFFLOAD_CONT29]]
13922 // CHECK19:       omp_offload.cont29:
13923 // CHECK19-NEXT:    ret i32 0
13924 //
13925 //
13926 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116
13927 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
13928 // CHECK19-NEXT:  entry:
13929 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13930 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13931 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13932 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined, ptr [[TMP0]])
13933 // CHECK19-NEXT:    ret void
13934 //
13935 //
13936 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined
13937 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
13938 // CHECK19-NEXT:  entry:
13939 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
13940 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
13941 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
13942 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
13943 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
13944 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
13945 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
13946 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
13947 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
13948 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
13949 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
13950 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
13951 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
13952 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
13953 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
13954 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
13955 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
13956 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
13957 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
13958 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
13959 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
13960 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13961 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
13962 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
13963 // CHECK19:       cond.true:
13964 // CHECK19-NEXT:    br label [[COND_END:%.*]]
13965 // CHECK19:       cond.false:
13966 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13967 // CHECK19-NEXT:    br label [[COND_END]]
13968 // CHECK19:       cond.end:
13969 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
13970 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
13971 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13972 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
13973 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
13974 // CHECK19:       omp.inner.for.cond:
13975 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13976 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13977 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
13978 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
13979 // CHECK19:       omp.inner.for.body:
13980 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
13981 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
13982 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
13983 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
13984 // CHECK19:       omp.inner.for.inc:
13985 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
13986 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
13987 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
13988 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
13989 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
13990 // CHECK19:       omp.inner.for.end:
13991 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
13992 // CHECK19:       omp.loop.exit:
13993 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
13994 // CHECK19-NEXT:    ret void
13995 //
13996 //
13997 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l116.omp_outlined.omp_outlined
13998 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
13999 // CHECK19-NEXT:  entry:
14000 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14001 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14002 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14003 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14004 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14005 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14006 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14007 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14008 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14009 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14010 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14011 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14012 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14013 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14014 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14015 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14016 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14017 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14018 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
14019 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
14020 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14021 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14022 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
14023 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
14024 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14025 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14026 // CHECK19-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14027 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
14028 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14029 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14030 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14031 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14032 // CHECK19:       cond.true:
14033 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14034 // CHECK19:       cond.false:
14035 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14036 // CHECK19-NEXT:    br label [[COND_END]]
14037 // CHECK19:       cond.end:
14038 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14039 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
14040 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14041 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
14042 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14043 // CHECK19:       omp.inner.for.cond:
14044 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14045 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14046 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14047 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14048 // CHECK19:       omp.inner.for.body:
14049 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14050 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14051 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14052 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
14053 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
14054 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]
14055 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
14056 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14057 // CHECK19:       omp.body.continue:
14058 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14059 // CHECK19:       omp.inner.for.inc:
14060 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14061 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14062 // CHECK19-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
14063 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14064 // CHECK19:       omp.inner.for.end:
14065 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14066 // CHECK19:       omp.loop.exit:
14067 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
14068 // CHECK19-NEXT:    ret void
14069 //
14070 //
14071 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121
14072 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14073 // CHECK19-NEXT:  entry:
14074 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14075 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14076 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14077 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined, ptr [[TMP0]])
14078 // CHECK19-NEXT:    ret void
14079 //
14080 //
14081 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined
14082 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
14083 // CHECK19-NEXT:  entry:
14084 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14085 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14086 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14087 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14088 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14089 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14090 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14091 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14092 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14093 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14094 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14095 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14096 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14097 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14098 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14099 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14100 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14101 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14102 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14103 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
14104 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14105 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14106 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14107 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14108 // CHECK19:       cond.true:
14109 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14110 // CHECK19:       cond.false:
14111 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14112 // CHECK19-NEXT:    br label [[COND_END]]
14113 // CHECK19:       cond.end:
14114 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14115 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14116 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14117 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
14118 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14119 // CHECK19:       omp.inner.for.cond:
14120 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14121 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14122 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14123 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14124 // CHECK19:       omp.inner.for.body:
14125 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14126 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14127 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
14128 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14129 // CHECK19:       omp.inner.for.inc:
14130 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14131 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14132 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14133 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14134 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14135 // CHECK19:       omp.inner.for.end:
14136 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14137 // CHECK19:       omp.loop.exit:
14138 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
14139 // CHECK19-NEXT:    ret void
14140 //
14141 //
14142 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l121.omp_outlined.omp_outlined
14143 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
14144 // CHECK19-NEXT:  entry:
14145 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14146 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14147 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14148 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14149 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14150 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14151 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14152 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14153 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14154 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14155 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14156 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14157 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14158 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14159 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14160 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14161 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14162 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14163 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
14164 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
14165 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14166 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14167 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
14168 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
14169 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14170 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14171 // CHECK19-NEXT:    [[TMP3:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14172 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[TMP3]], align 4
14173 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP4]], i32 34, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14174 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14175 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP5]], 9
14176 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14177 // CHECK19:       cond.true:
14178 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14179 // CHECK19:       cond.false:
14180 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14181 // CHECK19-NEXT:    br label [[COND_END]]
14182 // CHECK19:       cond.end:
14183 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP6]], [[COND_FALSE]] ]
14184 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
14185 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14186 // CHECK19-NEXT:    store i32 [[TMP7]], ptr [[DOTOMP_IV]], align 4
14187 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14188 // CHECK19:       omp.inner.for.cond:
14189 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14190 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14191 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP8]], [[TMP9]]
14192 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14193 // CHECK19:       omp.inner.for.body:
14194 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14195 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP10]], 1
14196 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14197 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
14198 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[I]], align 4
14199 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP11]]
14200 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
14201 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14202 // CHECK19:       omp.body.continue:
14203 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14204 // CHECK19:       omp.inner.for.inc:
14205 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14206 // CHECK19-NEXT:    [[ADD2:%.*]] = add nsw i32 [[TMP12]], 1
14207 // CHECK19-NEXT:    store i32 [[ADD2]], ptr [[DOTOMP_IV]], align 4
14208 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14209 // CHECK19:       omp.inner.for.end:
14210 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14211 // CHECK19:       omp.loop.exit:
14212 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP4]])
14213 // CHECK19-NEXT:    ret void
14214 //
14215 //
14216 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126
14217 // CHECK19-SAME: (i32 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14218 // CHECK19-NEXT:  entry:
14219 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
14220 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14221 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14222 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14223 // CHECK19-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 4
14224 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14225 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14226 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 4
14227 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
14228 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
14229 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14230 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14231 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined, ptr [[TMP0]], i32 [[TMP3]])
14232 // CHECK19-NEXT:    ret void
14233 //
14234 //
14235 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined
14236 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
14237 // CHECK19-NEXT:  entry:
14238 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14239 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14240 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14241 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14242 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14243 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14244 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14245 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14246 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14247 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14248 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14249 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14250 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14251 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14252 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14253 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14254 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14255 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14256 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14257 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14258 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14259 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14260 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
14261 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14262 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14263 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14264 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14265 // CHECK19:       cond.true:
14266 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14267 // CHECK19:       cond.false:
14268 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14269 // CHECK19-NEXT:    br label [[COND_END]]
14270 // CHECK19:       cond.end:
14271 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14272 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14273 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14274 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
14275 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14276 // CHECK19:       omp.inner.for.cond:
14277 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14278 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14279 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14280 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14281 // CHECK19:       omp.inner.for.body:
14282 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14283 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14284 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14285 // CHECK19-NEXT:    store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14286 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14287 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]])
14288 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14289 // CHECK19:       omp.inner.for.inc:
14290 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14291 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14292 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14293 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14294 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14295 // CHECK19:       omp.inner.for.end:
14296 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14297 // CHECK19:       omp.loop.exit:
14298 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
14299 // CHECK19-NEXT:    ret void
14300 //
14301 //
14302 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l126.omp_outlined.omp_outlined
14303 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
14304 // CHECK19-NEXT:  entry:
14305 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14306 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14307 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14308 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14309 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14310 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14311 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14312 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14313 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14314 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14315 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14316 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14317 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14318 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14319 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14320 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14321 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14322 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14323 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14324 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14325 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
14326 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
14327 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14328 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14329 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
14330 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
14331 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14332 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14333 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14334 // CHECK19-NEXT:    [[TMP4:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14335 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[TMP4]], align 4
14336 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB2]], i32 [[TMP5]], i32 33, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 [[TMP3]])
14337 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14338 // CHECK19:       omp.dispatch.cond:
14339 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14340 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14341 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP6]], [[TMP7]]
14342 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14343 // CHECK19:       cond.true:
14344 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14345 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14346 // CHECK19:       cond.false:
14347 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14348 // CHECK19-NEXT:    br label [[COND_END]]
14349 // CHECK19:       cond.end:
14350 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ [[TMP8]], [[COND_TRUE]] ], [ [[TMP9]], [[COND_FALSE]] ]
14351 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_UB]], align 4
14352 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14353 // CHECK19-NEXT:    store i32 [[TMP10]], ptr [[DOTOMP_IV]], align 4
14354 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14355 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14356 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP11]], [[TMP12]]
14357 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14358 // CHECK19:       omp.dispatch.body:
14359 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14360 // CHECK19:       omp.inner.for.cond:
14361 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14362 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14363 // CHECK19-NEXT:    [[CMP2:%.*]] = icmp sle i32 [[TMP13]], [[TMP14]]
14364 // CHECK19-NEXT:    br i1 [[CMP2]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14365 // CHECK19:       omp.inner.for.body:
14366 // CHECK19-NEXT:    [[TMP15:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14367 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP15]], 1
14368 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14369 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4
14370 // CHECK19-NEXT:    [[TMP16:%.*]] = load i32, ptr [[I]], align 4
14371 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP16]]
14372 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4
14373 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14374 // CHECK19:       omp.body.continue:
14375 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14376 // CHECK19:       omp.inner.for.inc:
14377 // CHECK19-NEXT:    [[TMP17:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14378 // CHECK19-NEXT:    [[ADD3:%.*]] = add nsw i32 [[TMP17]], 1
14379 // CHECK19-NEXT:    store i32 [[ADD3]], ptr [[DOTOMP_IV]], align 4
14380 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14381 // CHECK19:       omp.inner.for.end:
14382 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14383 // CHECK19:       omp.dispatch.inc:
14384 // CHECK19-NEXT:    [[TMP18:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14385 // CHECK19-NEXT:    [[TMP19:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14386 // CHECK19-NEXT:    [[ADD4:%.*]] = add nsw i32 [[TMP18]], [[TMP19]]
14387 // CHECK19-NEXT:    store i32 [[ADD4]], ptr [[DOTOMP_LB]], align 4
14388 // CHECK19-NEXT:    [[TMP20:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14389 // CHECK19-NEXT:    [[TMP21:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14390 // CHECK19-NEXT:    [[ADD5:%.*]] = add nsw i32 [[TMP20]], [[TMP21]]
14391 // CHECK19-NEXT:    store i32 [[ADD5]], ptr [[DOTOMP_UB]], align 4
14392 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
14393 // CHECK19:       omp.dispatch.end:
14394 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP5]])
14395 // CHECK19-NEXT:    ret void
14396 //
14397 //
14398 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131
14399 // CHECK19-SAME: (ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14400 // CHECK19-NEXT:  entry:
14401 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14402 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14403 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14404 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 1, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined, ptr [[TMP0]])
14405 // CHECK19-NEXT:    ret void
14406 //
14407 //
14408 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined
14409 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
14410 // CHECK19-NEXT:  entry:
14411 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14412 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14413 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14414 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14415 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14416 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14417 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14418 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14419 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14420 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14421 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14422 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14423 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14424 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14425 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14426 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14427 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14428 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14429 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14430 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
14431 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14432 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14433 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14434 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14435 // CHECK19:       cond.true:
14436 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14437 // CHECK19:       cond.false:
14438 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14439 // CHECK19-NEXT:    br label [[COND_END]]
14440 // CHECK19:       cond.end:
14441 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14442 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14443 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14444 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
14445 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14446 // CHECK19:       omp.inner.for.cond:
14447 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14448 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14449 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14450 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14451 // CHECK19:       omp.inner.for.body:
14452 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14453 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14454 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 3, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]])
14455 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14456 // CHECK19:       omp.inner.for.inc:
14457 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14458 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14459 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP10]], [[TMP11]]
14460 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14461 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14462 // CHECK19:       omp.inner.for.end:
14463 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14464 // CHECK19:       omp.loop.exit:
14465 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
14466 // CHECK19-NEXT:    ret void
14467 //
14468 //
14469 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l131.omp_outlined.omp_outlined
14470 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR3]] {
14471 // CHECK19-NEXT:  entry:
14472 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14473 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14474 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14475 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14476 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14477 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14478 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14479 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14480 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14481 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14482 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14483 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14484 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14485 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14486 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14487 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14488 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14489 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14490 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
14491 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
14492 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14493 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14494 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
14495 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
14496 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14497 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14498 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14499 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14500 // CHECK19-NEXT:    [[TMP5:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14501 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[TMP5]], align 4
14502 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP6]], i32 35, i32 [[TMP3]], i32 [[TMP4]], i32 1, i32 1)
14503 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14504 // CHECK19:       omp.dispatch.cond:
14505 // CHECK19-NEXT:    [[TMP7:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP6]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
14506 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP7]], 0
14507 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14508 // CHECK19:       omp.dispatch.body:
14509 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14510 // CHECK19-NEXT:    store i32 [[TMP8]], ptr [[DOTOMP_IV]], align 4
14511 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14512 // CHECK19:       omp.inner.for.cond:
14513 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22:![0-9]+]]
14514 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP22]]
14515 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP9]], [[TMP10]]
14516 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14517 // CHECK19:       omp.inner.for.body:
14518 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
14519 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP11]], 1
14520 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14521 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
14522 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP22]]
14523 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP12]]
14524 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP22]]
14525 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14526 // CHECK19:       omp.body.continue:
14527 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14528 // CHECK19:       omp.inner.for.inc:
14529 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
14530 // CHECK19-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP13]], 1
14531 // CHECK19-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP22]]
14532 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP23:![0-9]+]]
14533 // CHECK19:       omp.inner.for.end:
14534 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14535 // CHECK19:       omp.dispatch.inc:
14536 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
14537 // CHECK19:       omp.dispatch.end:
14538 // CHECK19-NEXT:    ret void
14539 //
14540 //
14541 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136
14542 // CHECK19-SAME: (i32 noundef [[M:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]]) #[[ATTR2]] {
14543 // CHECK19-NEXT:  entry:
14544 // CHECK19-NEXT:    [[M_ADDR:%.*]] = alloca i32, align 4
14545 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14546 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR_:%.*]] = alloca i32, align 4
14547 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14548 // CHECK19-NEXT:    store i32 [[M]], ptr [[M_ADDR]], align 4
14549 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14550 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14551 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[M_ADDR]], align 4
14552 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTCAPTURE_EXPR_]], align 4
14553 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR_]], align 4
14554 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14555 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14556 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_teams(ptr @[[GLOB3]], i32 2, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined, ptr [[TMP0]], i32 [[TMP3]])
14557 // CHECK19-NEXT:    ret void
14558 //
14559 //
14560 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined
14561 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
14562 // CHECK19-NEXT:  entry:
14563 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14564 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14565 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14566 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14567 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14568 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14569 // CHECK19-NEXT:    [[DOTOMP_COMB_LB:%.*]] = alloca i32, align 4
14570 // CHECK19-NEXT:    [[DOTOMP_COMB_UB:%.*]] = alloca i32, align 4
14571 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14572 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14573 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14574 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__CASTED:%.*]] = alloca i32, align 4
14575 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14576 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14577 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14578 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14579 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14580 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_COMB_LB]], align 4
14581 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_COMB_UB]], align 4
14582 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14583 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14584 // CHECK19-NEXT:    [[TMP1:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14585 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[TMP1]], align 4
14586 // CHECK19-NEXT:    call void @__kmpc_for_static_init_4(ptr @[[GLOB1]], i32 [[TMP2]], i32 92, ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_COMB_LB]], ptr [[DOTOMP_COMB_UB]], ptr [[DOTOMP_STRIDE]], i32 1, i32 1)
14587 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14588 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sgt i32 [[TMP3]], 9
14589 // CHECK19-NEXT:    br i1 [[CMP]], label [[COND_TRUE:%.*]], label [[COND_FALSE:%.*]]
14590 // CHECK19:       cond.true:
14591 // CHECK19-NEXT:    br label [[COND_END:%.*]]
14592 // CHECK19:       cond.false:
14593 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14594 // CHECK19-NEXT:    br label [[COND_END]]
14595 // CHECK19:       cond.end:
14596 // CHECK19-NEXT:    [[COND:%.*]] = phi i32 [ 9, [[COND_TRUE]] ], [ [[TMP4]], [[COND_FALSE]] ]
14597 // CHECK19-NEXT:    store i32 [[COND]], ptr [[DOTOMP_COMB_UB]], align 4
14598 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14599 // CHECK19-NEXT:    store i32 [[TMP5]], ptr [[DOTOMP_IV]], align 4
14600 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14601 // CHECK19:       omp.inner.for.cond:
14602 // CHECK19-NEXT:    [[TMP6:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14603 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14604 // CHECK19-NEXT:    [[CMP1:%.*]] = icmp sle i32 [[TMP6]], [[TMP7]]
14605 // CHECK19-NEXT:    br i1 [[CMP1]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14606 // CHECK19:       omp.inner.for.body:
14607 // CHECK19-NEXT:    [[TMP8:%.*]] = load i32, ptr [[DOTOMP_COMB_LB]], align 4
14608 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_COMB_UB]], align 4
14609 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14610 // CHECK19-NEXT:    store i32 [[TMP10]], ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14611 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__CASTED]], align 4
14612 // CHECK19-NEXT:    call void (ptr, i32, ptr, ...) @__kmpc_fork_call(ptr @[[GLOB3]], i32 4, ptr @{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined, i32 [[TMP8]], i32 [[TMP9]], ptr [[TMP0]], i32 [[TMP11]])
14613 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14614 // CHECK19:       omp.inner.for.inc:
14615 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4
14616 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[DOTOMP_STRIDE]], align 4
14617 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 [[TMP12]], [[TMP13]]
14618 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[DOTOMP_IV]], align 4
14619 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]]
14620 // CHECK19:       omp.inner.for.end:
14621 // CHECK19-NEXT:    br label [[OMP_LOOP_EXIT:%.*]]
14622 // CHECK19:       omp.loop.exit:
14623 // CHECK19-NEXT:    call void @__kmpc_for_static_fini(ptr @[[GLOB1]], i32 [[TMP2]])
14624 // CHECK19-NEXT:    ret void
14625 //
14626 //
14627 // CHECK19-LABEL: define {{[^@]+}}@{{__omp_offloading_[0-9a-z]+_[0-9a-z]+}}__Z5tmainIiLi10EEiT__l136.omp_outlined.omp_outlined
14628 // CHECK19-SAME: (ptr noalias noundef [[DOTGLOBAL_TID_:%.*]], ptr noalias noundef [[DOTBOUND_TID_:%.*]], i32 noundef [[DOTPREVIOUS_LB_:%.*]], i32 noundef [[DOTPREVIOUS_UB_:%.*]], ptr noundef nonnull align 4 dereferenceable(40) [[A:%.*]], i32 noundef [[DOTCAPTURE_EXPR_:%.*]]) #[[ATTR3]] {
14629 // CHECK19-NEXT:  entry:
14630 // CHECK19-NEXT:    [[DOTGLOBAL_TID__ADDR:%.*]] = alloca ptr, align 4
14631 // CHECK19-NEXT:    [[DOTBOUND_TID__ADDR:%.*]] = alloca ptr, align 4
14632 // CHECK19-NEXT:    [[DOTPREVIOUS_LB__ADDR:%.*]] = alloca i32, align 4
14633 // CHECK19-NEXT:    [[DOTPREVIOUS_UB__ADDR:%.*]] = alloca i32, align 4
14634 // CHECK19-NEXT:    [[A_ADDR:%.*]] = alloca ptr, align 4
14635 // CHECK19-NEXT:    [[DOTCAPTURE_EXPR__ADDR:%.*]] = alloca i32, align 4
14636 // CHECK19-NEXT:    [[DOTOMP_IV:%.*]] = alloca i32, align 4
14637 // CHECK19-NEXT:    [[TMP:%.*]] = alloca i32, align 4
14638 // CHECK19-NEXT:    [[DOTOMP_LB:%.*]] = alloca i32, align 4
14639 // CHECK19-NEXT:    [[DOTOMP_UB:%.*]] = alloca i32, align 4
14640 // CHECK19-NEXT:    [[DOTOMP_STRIDE:%.*]] = alloca i32, align 4
14641 // CHECK19-NEXT:    [[DOTOMP_IS_LAST:%.*]] = alloca i32, align 4
14642 // CHECK19-NEXT:    [[I:%.*]] = alloca i32, align 4
14643 // CHECK19-NEXT:    store ptr [[DOTGLOBAL_TID_]], ptr [[DOTGLOBAL_TID__ADDR]], align 4
14644 // CHECK19-NEXT:    store ptr [[DOTBOUND_TID_]], ptr [[DOTBOUND_TID__ADDR]], align 4
14645 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_LB_]], ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14646 // CHECK19-NEXT:    store i32 [[DOTPREVIOUS_UB_]], ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14647 // CHECK19-NEXT:    store ptr [[A]], ptr [[A_ADDR]], align 4
14648 // CHECK19-NEXT:    store i32 [[DOTCAPTURE_EXPR_]], ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14649 // CHECK19-NEXT:    [[TMP0:%.*]] = load ptr, ptr [[A_ADDR]], align 4
14650 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_LB]], align 4
14651 // CHECK19-NEXT:    store i32 9, ptr [[DOTOMP_UB]], align 4
14652 // CHECK19-NEXT:    [[TMP1:%.*]] = load i32, ptr [[DOTPREVIOUS_LB__ADDR]], align 4
14653 // CHECK19-NEXT:    [[TMP2:%.*]] = load i32, ptr [[DOTPREVIOUS_UB__ADDR]], align 4
14654 // CHECK19-NEXT:    store i32 [[TMP1]], ptr [[DOTOMP_LB]], align 4
14655 // CHECK19-NEXT:    store i32 [[TMP2]], ptr [[DOTOMP_UB]], align 4
14656 // CHECK19-NEXT:    store i32 1, ptr [[DOTOMP_STRIDE]], align 4
14657 // CHECK19-NEXT:    store i32 0, ptr [[DOTOMP_IS_LAST]], align 4
14658 // CHECK19-NEXT:    [[TMP3:%.*]] = load i32, ptr [[DOTCAPTURE_EXPR__ADDR]], align 4
14659 // CHECK19-NEXT:    [[TMP4:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14660 // CHECK19-NEXT:    [[TMP5:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4
14661 // CHECK19-NEXT:    [[TMP6:%.*]] = load ptr, ptr [[DOTGLOBAL_TID__ADDR]], align 4
14662 // CHECK19-NEXT:    [[TMP7:%.*]] = load i32, ptr [[TMP6]], align 4
14663 // CHECK19-NEXT:    call void @__kmpc_dispatch_init_4(ptr @[[GLOB3]], i32 [[TMP7]], i32 35, i32 [[TMP4]], i32 [[TMP5]], i32 1, i32 [[TMP3]])
14664 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND:%.*]]
14665 // CHECK19:       omp.dispatch.cond:
14666 // CHECK19-NEXT:    [[TMP8:%.*]] = call i32 @__kmpc_dispatch_next_4(ptr @[[GLOB3]], i32 [[TMP7]], ptr [[DOTOMP_IS_LAST]], ptr [[DOTOMP_LB]], ptr [[DOTOMP_UB]], ptr [[DOTOMP_STRIDE]])
14667 // CHECK19-NEXT:    [[TOBOOL:%.*]] = icmp ne i32 [[TMP8]], 0
14668 // CHECK19-NEXT:    br i1 [[TOBOOL]], label [[OMP_DISPATCH_BODY:%.*]], label [[OMP_DISPATCH_END:%.*]]
14669 // CHECK19:       omp.dispatch.body:
14670 // CHECK19-NEXT:    [[TMP9:%.*]] = load i32, ptr [[DOTOMP_LB]], align 4
14671 // CHECK19-NEXT:    store i32 [[TMP9]], ptr [[DOTOMP_IV]], align 4
14672 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND:%.*]]
14673 // CHECK19:       omp.inner.for.cond:
14674 // CHECK19-NEXT:    [[TMP10:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25:![0-9]+]]
14675 // CHECK19-NEXT:    [[TMP11:%.*]] = load i32, ptr [[DOTOMP_UB]], align 4, !llvm.access.group [[ACC_GRP25]]
14676 // CHECK19-NEXT:    [[CMP:%.*]] = icmp sle i32 [[TMP10]], [[TMP11]]
14677 // CHECK19-NEXT:    br i1 [[CMP]], label [[OMP_INNER_FOR_BODY:%.*]], label [[OMP_INNER_FOR_END:%.*]]
14678 // CHECK19:       omp.inner.for.body:
14679 // CHECK19-NEXT:    [[TMP12:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
14680 // CHECK19-NEXT:    [[MUL:%.*]] = mul nsw i32 [[TMP12]], 1
14681 // CHECK19-NEXT:    [[ADD:%.*]] = add nsw i32 0, [[MUL]]
14682 // CHECK19-NEXT:    store i32 [[ADD]], ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]
14683 // CHECK19-NEXT:    [[TMP13:%.*]] = load i32, ptr [[I]], align 4, !llvm.access.group [[ACC_GRP25]]
14684 // CHECK19-NEXT:    [[ARRAYIDX:%.*]] = getelementptr inbounds [10 x i32], ptr [[TMP0]], i32 0, i32 [[TMP13]]
14685 // CHECK19-NEXT:    store i32 0, ptr [[ARRAYIDX]], align 4, !llvm.access.group [[ACC_GRP25]]
14686 // CHECK19-NEXT:    br label [[OMP_BODY_CONTINUE:%.*]]
14687 // CHECK19:       omp.body.continue:
14688 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_INC:%.*]]
14689 // CHECK19:       omp.inner.for.inc:
14690 // CHECK19-NEXT:    [[TMP14:%.*]] = load i32, ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
14691 // CHECK19-NEXT:    [[ADD1:%.*]] = add nsw i32 [[TMP14]], 1
14692 // CHECK19-NEXT:    store i32 [[ADD1]], ptr [[DOTOMP_IV]], align 4, !llvm.access.group [[ACC_GRP25]]
14693 // CHECK19-NEXT:    br label [[OMP_INNER_FOR_COND]], !llvm.loop [[LOOP26:![0-9]+]]
14694 // CHECK19:       omp.inner.for.end:
14695 // CHECK19-NEXT:    br label [[OMP_DISPATCH_INC:%.*]]
14696 // CHECK19:       omp.dispatch.inc:
14697 // CHECK19-NEXT:    br label [[OMP_DISPATCH_COND]]
14698 // CHECK19:       omp.dispatch.end:
14699 // CHECK19-NEXT:    ret void
14700 //
14701 //
14702 // CHECK19-LABEL: define {{[^@]+}}@.omp_offloading.requires_reg
14703 // CHECK19-SAME: () #[[ATTR7:[0-9]+]] {
14704 // CHECK19-NEXT:  entry:
14705 // CHECK19-NEXT:    call void @__tgt_register_requires(i64 1)
14706 // CHECK19-NEXT:    ret void
14707 //