Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / clang / test / Sema / riscv-vector-float64-check.c
blobee7db32663959e39beb4c250f3f0ffa1adb7cf8c
1 // RUN: %clang_cc1 -triple riscv64 -target-feature +f -target-feature +d \
2 // RUN: -target-feature +zve64f -target-feature +zfh \
3 // RUN: -disable-O0-optnone -o - -fsyntax-only %s -verify
4 // REQUIRES: riscv-registered-target
5 #include <riscv_vector.h>
7 vfloat64m1_t foo() { /* expected-error {{RISC-V type 'vfloat64m1_t' (aka '__rvv_float64m1_t') requires the 'zve64d' extension}} */
8 vfloat64m1_t f64m1; /* expected-error {{RISC-V type 'vfloat64m1_t' (aka '__rvv_float64m1_t') requires the 'zve64d' extension}} */
10 (void)f64m1; /* expected-error {{RISC-V type 'vfloat64m1_t' (aka '__rvv_float64m1_t') requires the 'zve64d' extension}} */
12 return f64m1; /* expected-error {{RISC-V type 'vfloat64m1_t' (aka '__rvv_float64m1_t') requires the 'zve64d' extension}} */
15 vfloat64m1x2_t bar() { /* expected-error {{RISC-V type 'vfloat64m1x2_t' (aka '__rvv_float64m1x2_t') requires the 'zve64d' extension}} */
16 vfloat64m1x2_t f64m1x2; /* expected-error {{RISC-V type 'vfloat64m1x2_t' (aka '__rvv_float64m1x2_t') requires the 'zve64d' extension}} */
18 (void)f64m1x2; /* expected-error {{RISC-V type 'vfloat64m1x2_t' (aka '__rvv_float64m1x2_t') requires the 'zve64d' extension}} */
20 return f64m1x2; /* expected-error {{RISC-V type 'vfloat64m1x2_t' (aka '__rvv_float64m1x2_t') requires the 'zve64d' extension}} */