clang/test/Sema/riscv-vector-zve64x-check.c

   1 // RUN: %clang_cc1 -triple riscv64 \
   2 // RUN:   -target-feature +zve32x -disable-O0-optnone -o - \
   3 // RUN:   -fsyntax-only %s -verify
   4 // REQUIRES: riscv-registered-target
   5
   6   // (ELEN, LMUL) pairs of (8, mf8), (16, mf4), (32, mf2), (64, m1) is not in zve32*
   7   // available when ELEN is smaller than 64.
   8
   9 __rvv_int8mf8_t foo8() { /* expected-error {{RISC-V type '__rvv_int8mf8_t' requires the 'zve64x' extension}} */
  10   __rvv_int8mf8_t i8mf8; /* expected-error {{RISC-V type '__rvv_int8mf8_t' requires the 'zve64x' extension}} */
  11
  12   (void)i8mf8; /* expected-error {{RISC-V type '__rvv_int8mf8_t' requires the 'zve64x' extension}} */
  13
  14   return i8mf8; /* expected-error {{RISC-V type '__rvv_int8mf8_t' requires the 'zve64x' extension}} */
  15 }
  16
  17 __rvv_int16mf4_t foo16() { /* expected-error {{RISC-V type '__rvv_int16mf4_t' requires the 'zve64x' extension}} */
  18   __rvv_int16mf4_t i16mf4; /* expected-error {{RISC-V type '__rvv_int16mf4_t' requires the 'zve64x' extension}} */
  19
  20   (void)i16mf4; /* expected-error {{RISC-V type '__rvv_int16mf4_t' requires the 'zve64x' extension}} */
  21
  22   return i16mf4; /* expected-error {{RISC-V type '__rvv_int16mf4_t' requires the 'zve64x' extension}} */
  23 }
  24
  25 __rvv_int32mf2_t foo32() { /* expected-error {{RISC-V type '__rvv_int32mf2_t' requires the 'zve64x' extension}} */
  26   __rvv_int32mf2_t i32mf2; /* expected-error {{RISC-V type '__rvv_int32mf2_t' requires the 'zve64x' extension}} */
  27
  28   (void)i32mf2; /* expected-error {{RISC-V type '__rvv_int32mf2_t' requires the 'zve64x' extension}} */
  29
  30   return i32mf2; /* expected-error {{RISC-V type '__rvv_int32mf2_t' requires the 'zve64x' extension}} */
  31 }
  32
  33 __rvv_int64m1_t foo64() { /* expected-error {{RISC-V type '__rvv_int64m1_t' requires the 'zve64x' extension}} */
  34   __rvv_int64m1_t i64m1; /* expected-error {{RISC-V type '__rvv_int64m1_t' requires the 'zve64x' extension}} */
  35
  36   (void)i64m1; /* expected-error {{RISC-V type '__rvv_int64m1_t' requires the 'zve64x' extension}} */
  37
  38   return i64m1; /* expected-error {{RISC-V type '__rvv_int64m1_t' requires the 'zve64x' extension}} */
  39 }