clang/unittests/Format/FormatTestVerilog.cpp

   1 //===- unittest/Format/FormatTestVerilog.cpp ------------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 #include "FormatTestBase.h"
  10
  11 #define DEBUG_TYPE "format-test"
  12
  13 namespace clang {
  14 namespace format {
  15 namespace test {
  16 namespace {
  17 class FormatTestVerilog : public test::FormatTestBase {
  18 protected:
  19   FormatStyle getDefaultStyle() const override {
  20     return getLLVMStyle(FormatStyle::LK_Verilog);
  21   }
  22   std::string messUp(llvm::StringRef Code) const override {
  23     return test::messUp(Code, /*HandleHash=*/false);
  24   }
  25 };
  26
  27 TEST_F(FormatTestVerilog, Align) {
  28   FormatStyle Style = getDefaultStyle();
  29   Style.AlignConsecutiveAssignments.Enabled = true;
  30   verifyFormat("x            <= x;\n"
  31                "sfdbddfbdfbb <= x;\n"
  32                "x             = x;",
  33                Style);
  34   verifyFormat("x            = x;\n"
  35                "sfdbddfbdfbb = x;\n"
  36                "x            = x;",
  37                Style);
  38   // Compound assignments are not aligned by default. '<=' is not a compound
  39   // assignment.
  40   verifyFormat("x            <= x;\n"
  41                "sfdbddfbdfbb <= x;",
  42                Style);
  43   verifyFormat("x += x;\n"
  44                "sfdbddfbdfbb <= x;",
  45                Style);
  46   verifyFormat("x <<= x;\n"
  47                "sfdbddfbdfbb <= x;",
  48                Style);
  49   verifyFormat("x <<<= x;\n"
  50                "sfdbddfbdfbb <= x;",
  51                Style);
  52   verifyFormat("x >>= x;\n"
  53                "sfdbddfbdfbb <= x;",
  54                Style);
  55   verifyFormat("x >>>= x;\n"
  56                "sfdbddfbdfbb <= x;",
  57                Style);
  58   Style.AlignConsecutiveAssignments.AlignCompound = true;
  59   verifyFormat("x            <= x;\n"
  60                "sfdbddfbdfbb <= x;",
  61                Style);
  62   verifyFormat("x            += x;\n"
  63                "sfdbddfbdfbb <= x;",
  64                Style);
  65   verifyFormat("x            <<= x;\n"
  66                "sfdbddfbdfbb  <= x;",
  67                Style);
  68   verifyFormat("x            <<<= x;\n"
  69                "sfdbddfbdfbb   <= x;",
  70                Style);
  71   verifyFormat("x            >>= x;\n"
  72                "sfdbddfbdfbb  <= x;",
  73                Style);
  74   verifyFormat("x            >>>= x;\n"
  75                "sfdbddfbdfbb   <= x;",
  76                Style);
  77 }
  78
  79 TEST_F(FormatTestVerilog, Assign) {
  80   verifyFormat("assign mynet = enable;");
  81   verifyFormat("assign (strong1, pull0) #1 mynet = enable;");
  82   verifyFormat("assign #1 mynet = enable;");
  83   verifyFormat("assign mynet = enable;");
  84   // Test that assignments are on separate lines.
  85   verifyFormat("assign mynet = enable,\n"
  86                "       mynet1 = enable1;");
  87   // Test that `<=` and `,` don't confuse it.
  88   verifyFormat("assign mynet = enable1 <= enable2;");
  89   verifyFormat("assign mynet = enable1 <= enable2,\n"
  90                "       mynet1 = enable3;");
  91   verifyFormat("assign mynet = enable,\n"
  92                "       mynet1 = enable2 <= enable3;");
  93   verifyFormat("assign mynet = enable(enable1, enable2);");
  94 }
  95
  96 TEST_F(FormatTestVerilog, BasedLiteral) {
  97   verifyFormat("x = '0;");
  98   verifyFormat("x = '1;");
  99   verifyFormat("x = 'X;");
 100   verifyFormat("x = 'x;");
 101   verifyFormat("x = 'Z;");
 102   verifyFormat("x = 'z;");
 103   verifyFormat("x = 659;");
 104   verifyFormat("x = 'h837ff;");
 105   verifyFormat("x = 'o7460;");
 106   verifyFormat("x = 4'b1001;");
 107   verifyFormat("x = 5'D3;");
 108   verifyFormat("x = 3'b01x;");
 109   verifyFormat("x = 12'hx;");
 110   verifyFormat("x = 16'hz;");
 111   verifyFormat("x = -8'd6;");
 112   verifyFormat("x = 4'shf;");
 113   verifyFormat("x = -4'sd15;");
 114   verifyFormat("x = 16'sd?;");
 115 }
 116
 117 TEST_F(FormatTestVerilog, Block) {
 118   verifyFormat("begin\n"
 119                "  x = x;\n"
 120                "end");
 121   verifyFormat("begin : x\n"
 122                "  x = x;\n"
 123                "end : x");
 124   verifyFormat("begin\n"
 125                "  x = x;\n"
 126                "  x = x;\n"
 127                "end");
 128   verifyFormat("fork\n"
 129                "  x = x;\n"
 130                "join");
 131   verifyFormat("fork\n"
 132                "  x = x;\n"
 133                "join_any");
 134   verifyFormat("fork\n"
 135                "  x = x;\n"
 136                "join_none");
 137   verifyFormat("generate\n"
 138                "  x = x;\n"
 139                "endgenerate");
 140   verifyFormat("generate : x\n"
 141                "  x = x;\n"
 142                "endgenerate : x");
 143   // Nested blocks.
 144   verifyFormat("begin\n"
 145                "  begin\n"
 146                "  end\n"
 147                "end");
 148   verifyFormat("begin : x\n"
 149                "  begin\n"
 150                "  end\n"
 151                "end : x");
 152   verifyFormat("begin : x\n"
 153                "  begin : x\n"
 154                "  end : x\n"
 155                "end : x");
 156   verifyFormat("begin\n"
 157                "  begin : x\n"
 158                "  end : x\n"
 159                "end");
 160   // Test that 'disable fork' and 'rand join' don't get mistaken as blocks.
 161   verifyFormat("disable fork;\n"
 162                "x = x;");
 163   verifyFormat("rand join x x;\n"
 164                "x = x;");
 165   // The begin keyword should not be indented if it is too long to fit on the
 166   // same line.
 167   verifyFormat("while (true) //\n"
 168                "begin\n"
 169                "  while (true) //\n"
 170                "  begin\n"
 171                "  end\n"
 172                "end");
 173   verifyFormat("while (true) //\n"
 174                "begin : x\n"
 175                "  while (true) //\n"
 176                "  begin : x\n"
 177                "  end : x\n"
 178                "end : x");
 179   verifyFormat("while (true) //\n"
 180                "fork\n"
 181                "  while (true) //\n"
 182                "  fork\n"
 183                "  join\n"
 184                "join");
 185   auto Style = getDefaultStyle();
 186   Style.ColumnLimit = 17;
 187   verifyFormat("while (true)\n"
 188                "begin\n"
 189                "  while (true)\n"
 190                "  begin\n"
 191                "  end\n"
 192                "end",
 193                "while (true) begin\n"
 194                "  while (true) begin"
 195                "  end\n"
 196                "end",
 197                Style);
 198 }
 199
 200 TEST_F(FormatTestVerilog, Case) {
 201   verifyFormat("case (data)\n"
 202                "endcase");
 203   verifyFormat("casex (data)\n"
 204                "endcase");
 205   verifyFormat("casez (data)\n"
 206                "endcase");
 207   verifyFormat("case (data) inside\n"
 208                "endcase");
 209   verifyFormat("case (data)\n"
 210                "  16'd0:\n"
 211                "    result = 10'b0111111111;\n"
 212                "endcase");
 213   verifyFormat("case (data)\n"
 214                "  xxxxxxxx:\n"
 215                "    result = 10'b0111111111;\n"
 216                "endcase");
 217   // Test labels with multiple options.
 218   verifyFormat("case (data)\n"
 219                "  16'd0, 16'd1:\n"
 220                "    result = 10'b0111111111;\n"
 221                "endcase");
 222   verifyFormat("case (data)\n"
 223                "  16'd0, //\n"
 224                "      16'd1:\n"
 225                "    result = 10'b0111111111;\n"
 226                "endcase");
 227   // Test that blocks following labels are indented.
 228   verifyFormat("case (data)\n"
 229                "  16'd1: fork\n"
 230                "    result = 10'b1011111111;\n"
 231                "  join\n"
 232                "endcase");
 233   verifyFormat("case (data)\n"
 234                "  16'd1: fork : x\n"
 235                "    result = 10'b1011111111;\n"
 236                "  join : x\n"
 237                "endcase");
 238   // Test default.
 239   verifyFormat("case (data)\n"
 240                "  default\n"
 241                "    result = 10'b1011111111;\n"
 242                "endcase");
 243   verifyFormat("case (data)\n"
 244                "  default:\n"
 245                "    result = 10'b1011111111;\n"
 246                "endcase");
 247   // Test that question marks and colons don't get mistaken as labels.
 248   verifyFormat("case (data)\n"
 249                "  8'b1???????:\n"
 250                "    instruction1(ir);\n"
 251                "endcase");
 252   verifyFormat("case (data)\n"
 253                "  x ? 8'b1??????? : 1:\n"
 254                "    instruction3(ir);\n"
 255                "endcase");
 256   // Test indention options.
 257   auto Style = getDefaultStyle();
 258   Style.IndentCaseLabels = false;
 259   verifyFormat("case (data)\n"
 260                "16'd0:\n"
 261                "  result = 10'b0111111111;\n"
 262                "endcase",
 263                Style);
 264   verifyFormat("case (data)\n"
 265                "16'd0: begin\n"
 266                "  result = 10'b0111111111;\n"
 267                "end\n"
 268                "endcase",
 269                Style);
 270   Style.IndentCaseLabels = true;
 271   verifyFormat("case (data)\n"
 272                "  16'd0:\n"
 273                "    result = 10'b0111111111;\n"
 274                "endcase",
 275                Style);
 276   verifyFormat("case (data)\n"
 277                "  16'd0: begin\n"
 278                "    result = 10'b0111111111;\n"
 279                "  end\n"
 280                "endcase",
 281                Style);
 282   // Other colons should not be mistaken as case colons.
 283   Style = getDefaultStyle();
 284   Style.BitFieldColonSpacing = FormatStyle::BFCS_None;
 285   verifyFormat("case (x[1:0])\n"
 286                "endcase",
 287                Style);
 288   verifyFormat("default:\n"
 289                "  x[1:0] = x[1:0];",
 290                Style);
 291   Style.BitFieldColonSpacing = FormatStyle::BFCS_Both;
 292   verifyFormat("case (x[1 : 0])\n"
 293                "endcase",
 294                Style);
 295   verifyFormat("default:\n"
 296                "  x[1 : 0] = x[1 : 0];",
 297                Style);
 298   Style = getDefaultStyle();
 299   Style.SpacesInContainerLiterals = true;
 300   verifyFormat("case ('{x : x, default : 9})\n"
 301                "endcase",
 302                Style);
 303   verifyFormat("x = '{x : x, default : 9};", Style);
 304   verifyFormat("default:\n"
 305                "  x = '{x : x, default : 9};",
 306                Style);
 307   Style.SpacesInContainerLiterals = false;
 308   verifyFormat("case ('{x: x, default: 9})\n"
 309                "endcase",
 310                Style);
 311   verifyFormat("x = '{x: x, default: 9};", Style);
 312   verifyFormat("default:\n"
 313                "  x = '{x: x, default: 9};",
 314                Style);
 315   // When the line following the case label needs to be broken, the continuation
 316   // should be indented correctly.
 317   verifyFormat("case (data)\n"
 318                "  16'd0:\n"
 319                "    result = //\n"
 320                "        10'b0111111111;\n"
 321                "endcase");
 322   verifyFormat("case (data)\n"
 323                "  16'd0, //\n"
 324                "      16'd1:\n"
 325                "    result = //\n"
 326                "        10'b0111111111;\n"
 327                "endcase");
 328   verifyFormat("case (data)\n"
 329                "  16'd0:\n"
 330                "    result = (10'b0111111111 + //\n"
 331                "              10'b0111111111 + //\n"
 332                "              10'b0111111111);\n"
 333                "endcase");
 334   verifyFormat("case (data)\n"
 335                "  16'd0:\n"
 336                "    result =              //\n"
 337                "        (10'b0111111111 + //\n"
 338                "         10'b0111111111 + //\n"
 339                "         10'b0111111111);\n"
 340                "endcase");
 341   verifyFormat("case (data)\n"
 342                "  16'd0:\n"
 343                "    result =          //\n"
 344                "        longfunction( //\n"
 345                "            arg);\n"
 346                "endcase");
 347   Style = getDefaultStyle();
 348   Style.ContinuationIndentWidth = 1;
 349   verifyFormat("case (data)\n"
 350                "  16'd0:\n"
 351                "    result = //\n"
 352                "     10'b0111111111;\n"
 353                "endcase",
 354                Style);
 355   verifyFormat("case (data)\n"
 356                "  16'd0:\n"
 357                "    result =       //\n"
 358                "     longfunction( //\n"
 359                "      arg);\n"
 360                "endcase",
 361                Style);
 362 }
 363
 364 TEST_F(FormatTestVerilog, Coverage) {
 365   verifyFormat("covergroup x\n"
 366                "    @@(begin x);\n"
 367                "endgroup");
 368 }
 369
 370 TEST_F(FormatTestVerilog, Declaration) {
 371   verifyFormat("wire mynet;");
 372   verifyFormat("wire mynet, mynet1;");
 373   verifyFormat("wire mynet, //\n"
 374                "     mynet1;");
 375   verifyFormat("wire mynet = enable;");
 376   verifyFormat("wire mynet = enable, mynet1;");
 377   verifyFormat("wire mynet = enable, //\n"
 378                "     mynet1;");
 379   verifyFormat("wire mynet, mynet1 = enable;");
 380   verifyFormat("wire mynet, //\n"
 381                "     mynet1 = enable;");
 382   verifyFormat("wire mynet = enable, mynet1 = enable;");
 383   verifyFormat("wire mynet = enable, //\n"
 384                "     mynet1 = enable;");
 385   verifyFormat("wire (strong1, pull0) mynet;");
 386   verifyFormat("wire (strong1, pull0) mynet, mynet1;");
 387   verifyFormat("wire (strong1, pull0) mynet, //\n"
 388                "                      mynet1;");
 389   verifyFormat("wire (strong1, pull0) mynet = enable;");
 390   verifyFormat("wire (strong1, pull0) mynet = enable, mynet1;");
 391   verifyFormat("wire (strong1, pull0) mynet = enable, //\n"
 392                "                      mynet1;");
 393   verifyFormat("wire (strong1, pull0) mynet, mynet1 = enable;");
 394   verifyFormat("wire (strong1, pull0) mynet, //\n"
 395                "                      mynet1 = enable;");
 396 }
 397
 398 TEST_F(FormatTestVerilog, Delay) {
 399   // Delay by the default unit.
 400   verifyFormat("#0;");
 401   verifyFormat("#1;");
 402   verifyFormat("#10;");
 403   verifyFormat("#1.5;");
 404   // Explicit unit.
 405   verifyFormat("#1fs;");
 406   verifyFormat("#1.5fs;");
 407   verifyFormat("#1ns;");
 408   verifyFormat("#1.5ns;");
 409   verifyFormat("#1us;");
 410   verifyFormat("#1.5us;");
 411   verifyFormat("#1ms;");
 412   verifyFormat("#1.5ms;");
 413   verifyFormat("#1s;");
 414   verifyFormat("#1.5s;");
 415   // The following expression should be on the same line.
 416   verifyFormat("#1 x = x;");
 417   verifyFormat("#1 x = x;", "#1\n"
 418                             "x = x;");
 419 }
 420
 421 TEST_F(FormatTestVerilog, Enum) {
 422   verifyFormat("enum { x } x;");
 423   verifyFormat("typedef enum { x } x;");
 424   verifyFormat("enum { red, yellow, green } x;");
 425   verifyFormat("typedef enum { red, yellow, green } x;");
 426   verifyFormat("enum integer { x } x;");
 427   verifyFormat("typedef enum { x = 0 } x;");
 428   verifyFormat("typedef enum { red = 0, yellow = 1, green = 2 } x;");
 429   verifyFormat("typedef enum integer { x } x;");
 430   verifyFormat("typedef enum bit [0 : 1] { x } x;");
 431   verifyFormat("typedef enum { add = 10, sub[5], jmp[6 : 8] } E1;");
 432   verifyFormat("typedef enum { add = 10, sub[5] = 0, jmp[6 : 8] = 1 } E1;");
 433 }
 434
 435 TEST_F(FormatTestVerilog, Headers) {
 436   // Test headers with multiple ports.
 437   verifyFormat("module mh1\n"
 438                "    (input var int in1,\n"
 439                "     input var shortreal in2,\n"
 440                "     output tagged_st out);\n"
 441                "endmodule");
 442   // There should be a space following the type but not the variable name.
 443   verifyFormat("module test\n"
 444                "    (input wire [7 : 0] a,\n"
 445                "     input wire b[7 : 0],\n"
 446                "     input wire [7 : 0] c[7 : 0]);\n"
 447                "endmodule");
 448   // Ports should be grouped by types.
 449   verifyFormat("module test\n"
 450                "    (input [7 : 0] a,\n"
 451                "     input signed [7 : 0] b, c, d);\n"
 452                "endmodule");
 453   verifyFormat("module test\n"
 454                "    (input [7 : 0] a,\n"
 455                "     (* x = x *) input signed [7 : 0] b, c, d);\n"
 456                "endmodule");
 457   verifyFormat("module test\n"
 458                "    (input [7 : 0] a = 0,\n"
 459                "     input signed [7 : 0] b = 0, c = 0, d = 0);\n"
 460                "endmodule");
 461   verifyFormat("module test\n"
 462                "    #(parameter x)\n"
 463                "    (input [7 : 0] a,\n"
 464                "     input signed [7 : 0] b, c, d);\n"
 465                "endmodule");
 466   // When a line needs to be broken, ports of the same type should be aligned to
 467   // the same column.
 468   verifyFormat("module test\n"
 469                "    (input signed [7 : 0] b, c, //\n"
 470                "                          d);\n"
 471                "endmodule");
 472   verifyFormat("module test\n"
 473                "    ((* x = x *) input signed [7 : 0] b, c, //\n"
 474                "                                      d);\n"
 475                "endmodule");
 476   verifyFormat("module test\n"
 477                "    (input signed [7 : 0] b = 0, c, //\n"
 478                "                          d);\n"
 479                "endmodule");
 480   verifyFormat("module test\n"
 481                "    (input signed [7 : 0] b, c = 0, //\n"
 482                "                          d);\n"
 483                "endmodule");
 484   verifyFormat("module test\n"
 485                "    (input signed [7 : 0] b, c, //\n"
 486                "                          d = 0);\n"
 487                "endmodule");
 488   verifyFormat("module test\n"
 489                "    (input wire logic signed [7 : 0][0 : 1] b, c, //\n"
 490                "                                            d);\n"
 491                "endmodule");
 492   verifyFormat("module test\n"
 493                "    (input signed [7 : 0] b, //\n"
 494                "                          c, //\n"
 495                "                          d);\n"
 496                "endmodule");
 497   verifyFormat("module test\n"
 498                "    (input [7 : 0] a,\n"
 499                "     input signed [7 : 0] b, //\n"
 500                "                          c, //\n"
 501                "                          d);\n"
 502                "endmodule");
 503   verifyFormat("module test\n"
 504                "    (input signed [7 : 0] b, //\n"
 505                "                          c, //\n"
 506                "                          d,\n"
 507                "     output signed [7 : 0] h);\n"
 508                "endmodule");
 509   // With a modport.
 510   verifyFormat("module m\n"
 511                "    (i2.master i);\n"
 512                "endmodule");
 513   verifyFormat("module m\n"
 514                "    (i2.master i, ii);\n"
 515                "endmodule");
 516   verifyFormat("module m\n"
 517                "    (i2.master i, //\n"
 518                "               ii);\n"
 519                "endmodule");
 520   verifyFormat("module m\n"
 521                "    (i2.master i,\n"
 522                "     input ii);\n"
 523                "endmodule");
 524   verifyFormat("module m\n"
 525                "    (i2::i2.master i);\n"
 526                "endmodule");
 527   verifyFormat("module m\n"
 528                "    (i2::i2.master i, ii);\n"
 529                "endmodule");
 530   verifyFormat("module m\n"
 531                "    (i2::i2.master i, //\n"
 532                "                   ii);\n"
 533                "endmodule");
 534   verifyFormat("module m\n"
 535                "    (i2::i2.master i,\n"
 536                "     input ii);\n"
 537                "endmodule");
 538   verifyFormat("module m\n"
 539                "    (i2::i2 i);\n"
 540                "endmodule");
 541   verifyFormat("module m\n"
 542                "    (i2::i2 i, ii);\n"
 543                "endmodule");
 544   verifyFormat("module m\n"
 545                "    (i2::i2 i, //\n"
 546                "            ii);\n"
 547                "endmodule");
 548   verifyFormat("module m\n"
 549                "    (i2::i2 i,\n"
 550                "     input ii);\n"
 551                "endmodule");
 552   // With a macro in the names.
 553   verifyFormat("module m\n"
 554                "    (input var `x a, b);\n"
 555                "endmodule");
 556   verifyFormat("module m\n"
 557                "    (input var `x a, //\n"
 558                "                  b);\n"
 559                "endmodule");
 560   verifyFormat("module m\n"
 561                "    (input var x `a, b);\n"
 562                "endmodule");
 563   verifyFormat("module m\n"
 564                "    (input var x `a, //\n"
 565                "                 b);\n"
 566                "endmodule");
 567   // A line comment shouldn't disrupt the indentation of the port list.
 568   verifyFormat("extern module x\n"
 569                "    (//\n"
 570                "     output y);");
 571   verifyFormat("extern module x\n"
 572                "    #(//\n"
 573                "      parameter x)\n"
 574                "    (//\n"
 575                "     output y);");
 576   // With a concatenation in the names.
 577   auto Style = getDefaultStyle();
 578   Style.ColumnLimit = 40;
 579   verifyFormat("`define X(x)                           \\\n"
 580                "  module test                          \\\n"
 581                "      (input var x``x a, b);",
 582                Style);
 583   verifyFormat("`define X(x)                           \\\n"
 584                "  module test                          \\\n"
 585                "      (input var x``x aaaaaaaaaaaaaaa, \\\n"
 586                "                      b);",
 587                Style);
 588   verifyFormat("`define X(x)                           \\\n"
 589                "  module test                          \\\n"
 590                "      (input var x a``x, b);",
 591                Style);
 592   verifyFormat("`define X(x)                           \\\n"
 593                "  module test                          \\\n"
 594                "      (input var x aaaaaaaaaaaaaaa``x, \\\n"
 595                "                   b);",
 596                Style);
 597 }
 598
 599 TEST_F(FormatTestVerilog, Hierarchy) {
 600   verifyFormat("module x;\n"
 601                "endmodule");
 602   // Test that the end label is on the same line as the end keyword.
 603   verifyFormat("module x;\n"
 604                "endmodule : x");
 605   // Test that things inside are indented.
 606   verifyFormat("module x;\n"
 607                "  generate\n"
 608                "  endgenerate\n"
 609                "endmodule");
 610   verifyFormat("program x;\n"
 611                "  generate\n"
 612                "  endgenerate\n"
 613                "endprogram");
 614   verifyFormat("interface x;\n"
 615                "  generate\n"
 616                "  endgenerate\n"
 617                "endinterface");
 618   verifyFormat("task x;\n"
 619                "  generate\n"
 620                "  endgenerate\n"
 621                "endtask");
 622   verifyFormat("function x;\n"
 623                "  generate\n"
 624                "  endgenerate\n"
 625                "endfunction");
 626   verifyFormat("class x;\n"
 627                "  generate\n"
 628                "  endgenerate\n"
 629                "endclass");
 630   // Test that they nest.
 631   verifyFormat("module x;\n"
 632                "  program x;\n"
 633                "    program x;\n"
 634                "    endprogram\n"
 635                "  endprogram\n"
 636                "endmodule");
 637   // Test that an extern declaration doesn't change the indentation.
 638   verifyFormat("extern module x;\n"
 639                "x = x;");
 640   // Test complex headers
 641   verifyFormat("extern module x\n"
 642                "    import x.x::x::*;\n"
 643                "    import x;\n"
 644                "    #(parameter x)\n"
 645                "    (output x);");
 646   verifyFormat("module x\n"
 647                "    import x.x::x::*;\n"
 648                "    import x;\n"
 649                "    #(parameter x)\n"
 650                "    (output x);\n"
 651                "  generate\n"
 652                "  endgenerate\n"
 653                "endmodule : x");
 654   verifyFormat("virtual class x\n"
 655                "    (x)\n"
 656                "    extends x(x)\n"
 657                "    implements x, x, x;\n"
 658                "  generate\n"
 659                "  endgenerate\n"
 660                "endclass : x");
 661   verifyFormat("function automatic logic [1 : 0] x\n"
 662                "    (input x);\n"
 663                "  generate\n"
 664                "  endgenerate\n"
 665                "endfunction : x");
 666 }
 667
 668 TEST_F(FormatTestVerilog, Identifiers) {
 669   // Escaped identifiers should not be split.
 670   verifyFormat("\\busa+index");
 671   verifyFormat("\\-clock");
 672   verifyFormat("\\***error-condition***");
 673   verifyFormat("\\net1\\/net2");
 674   verifyFormat("\\{a,b}");
 675   verifyFormat("\\a*(b+c)");
 676   // Escaped identifiers can't be joined with the next token.  Extra space
 677   // should be removed.
 678   verifyFormat("\\busa+index ;", "\\busa+index\n"
 679                                  ";");
 680   verifyFormat("\\busa+index ;", "\\busa+index\r\n"
 681                                  ";");
 682   verifyFormat("\\busa+index ;", "\\busa+index  ;");
 683   verifyFormat("\\busa+index ;", "\\busa+index\n"
 684                                  " ;");
 685   verifyFormat("\\busa+index ;");
 686   verifyFormat("(\\busa+index );");
 687   verifyFormat("\\busa+index \\busa+index ;");
 688 }
 689
 690 TEST_F(FormatTestVerilog, If) {
 691   verifyFormat("if (x)\n"
 692                "  x = x;");
 693   verifyFormat("unique if (x)\n"
 694                "  x = x;");
 695   verifyFormat("unique0 if (x)\n"
 696                "  x = x;");
 697   verifyFormat("priority if (x)\n"
 698                "  x = x;");
 699   verifyFormat("if (x)\n"
 700                "  x = x;\n"
 701                "x = x;");
 702
 703   // Test else
 704   verifyFormat("if (x)\n"
 705                "  x = x;\n"
 706                "else if (x)\n"
 707                "  x = x;\n"
 708                "else\n"
 709                "  x = x;");
 710   verifyFormat("if (x) begin\n"
 711                "  x = x;\n"
 712                "end else if (x) begin\n"
 713                "  x = x;\n"
 714                "end else begin\n"
 715                "  x = x;\n"
 716                "end");
 717   verifyFormat("if (x) begin : x\n"
 718                "  x = x;\n"
 719                "end : x else if (x) begin : x\n"
 720                "  x = x;\n"
 721                "end : x else begin : x\n"
 722                "  x = x;\n"
 723                "end : x");
 724
 725   // Test block keywords.
 726   verifyFormat("if (x) begin\n"
 727                "  x = x;\n"
 728                "end");
 729   verifyFormat("if (x) begin : x\n"
 730                "  x = x;\n"
 731                "end : x");
 732   verifyFormat("if (x) begin\n"
 733                "  x = x;\n"
 734                "  x = x;\n"
 735                "end");
 736   verifyFormat("if (x) fork\n"
 737                "  x = x;\n"
 738                "join");
 739   verifyFormat("if (x) fork\n"
 740                "  x = x;\n"
 741                "join_any");
 742   verifyFormat("if (x) fork\n"
 743                "  x = x;\n"
 744                "join_none");
 745   verifyFormat("if (x) generate\n"
 746                "  x = x;\n"
 747                "endgenerate");
 748   verifyFormat("if (x) generate : x\n"
 749                "  x = x;\n"
 750                "endgenerate : x");
 751
 752   // Test that concatenation braces don't get regarded as blocks.
 753   verifyFormat("if (x)\n"
 754                "  {x} = x;");
 755   verifyFormat("if (x)\n"
 756                "  x = {x};");
 757   verifyFormat("if (x)\n"
 758                "  x = {x};\n"
 759                "else\n"
 760                "  {x} = {x};");
 761
 762   // With attributes.
 763   verifyFormat("(* x *) if (x)\n"
 764                "  x = x;");
 765   verifyFormat("(* x = \"x\" *) if (x)\n"
 766                "  x = x;");
 767   verifyFormat("(* x, x = \"x\" *) if (x)\n"
 768                "  x = x;");
 769
 770   // Assert are treated similar to if.  But the else parts should not be
 771   // chained.
 772   verifyFormat("assert (x);");
 773   verifyFormat("assert (x)\n"
 774                "  $info();");
 775   verifyFormat("assert (x)\n"
 776                "  $info();\n"
 777                "else\n"
 778                "  $error();");
 779   verifyFormat("assert (x)\n"
 780                "else\n"
 781                "  $error();");
 782   verifyFormat("assert (x)\n"
 783                "else begin\n"
 784                "end");
 785   verifyFormat("assert (x)\n"
 786                "else\n"
 787                "  if (x)\n"
 788                "    $error();");
 789   verifyFormat("assert (x)\n"
 790                "  $info();\n"
 791                "else\n"
 792                "  if (x)\n"
 793                "    $error();");
 794   verifyFormat("assert (x)\n"
 795                "  $info();\n"
 796                "else\n"
 797                "  if (x)\n"
 798                "    $error();\n"
 799                "  else\n"
 800                "    $error();");
 801   verifyFormat("assert (x)\n"
 802                "  $info();\n"
 803                "else\n"
 804                "  if (x)\n"
 805                "    $error();\n"
 806                "  else if (x)\n"
 807                "    $error();\n"
 808                "  else\n"
 809                "    $error();");
 810   // The body is optional for asserts.  The next line should not be indented if
 811   // the statement already ended with a semicolon.
 812   verifyFormat("assert (x);\n"
 813                "x = x;");
 814   verifyFormat("if (x)\n"
 815                "  assert (x);\n"
 816                "else if (x) begin\n"
 817                "end else begin\n"
 818                "end");
 819   verifyFormat("if (x)\n"
 820                "  assert (x);\n"
 821                "else begin\n"
 822                "end");
 823   verifyFormat("if (x)\n"
 824                "  assert (x)\n"
 825                "  else begin\n"
 826                "  end");
 827   // Other keywords.
 828   verifyFormat("assume (x)\n"
 829                "  $info();");
 830   verifyFormat("cover (x)\n"
 831                "  $info();");
 832   verifyFormat("restrict (x)\n"
 833                "  $info();");
 834   verifyFormat("assert #0 (x)\n"
 835                "  $info();");
 836   verifyFormat("assert final (x)\n"
 837                "  $info();");
 838   verifyFormat("cover #0 (x)\n"
 839                "  $info();");
 840   verifyFormat("cover final (x)\n"
 841                "  $info();");
 842
 843   // The space around parentheses options should work.
 844   auto Style = getDefaultStyle();
 845   verifyFormat("if (x)\n"
 846                "  x = x;\n"
 847                "else if (x)\n"
 848                "  x = x;",
 849                Style);
 850   verifyFormat("assert (x);", Style);
 851   verifyFormat("assert #0 (x);", Style);
 852   verifyFormat("assert (x)\n"
 853                "else\n"
 854                "  if (x)\n"
 855                "    x = x;",
 856                Style);
 857   Style.SpacesInParens = FormatStyle::SIPO_Custom;
 858   Style.SpacesInParensOptions.InConditionalStatements = true;
 859   verifyFormat("if ( x )\n"
 860                "  x = x;\n"
 861                "else if ( x )\n"
 862                "  x = x;",
 863                Style);
 864   verifyFormat("assert ( x );", Style);
 865   verifyFormat("assert #0 ( x );", Style);
 866   verifyFormat("assert ( x )\n"
 867                "else\n"
 868                "  if ( x )\n"
 869                "    x = x;",
 870                Style);
 871 }
 872
 873 TEST_F(FormatTestVerilog, Instantiation) {
 874   // Without ports.
 875   verifyFormat("ffnand ff1;");
 876   // With named ports.
 877   verifyFormat("ffnand ff1(.qbar(out1),\n"
 878                "           .clear(in1),\n"
 879                "           .preset(in2));");
 880   // With wildcard.
 881   verifyFormat("ffnand ff1(.qbar(out1),\n"
 882                "           .clear(in1),\n"
 883                "           .preset(in2),\n"
 884                "           .*);");
 885   verifyFormat("ffnand ff1(.*,\n"
 886                "           .qbar(out1),\n"
 887                "           .clear(in1),\n"
 888                "           .preset(in2));");
 889   // With unconnected ports.
 890   verifyFormat("ffnand ff1(.q(),\n"
 891                "           .qbar(out1),\n"
 892                "           .clear(in1),\n"
 893                "           .preset(in2));");
 894   verifyFormat("ffnand ff1(.q(),\n"
 895                "           .qbar(),\n"
 896                "           .clear(),\n"
 897                "           .preset());");
 898   verifyFormat("ffnand ff1(,\n"
 899                "           .qbar(out1),\n"
 900                "           .clear(in1),\n"
 901                "           .preset(in2));");
 902   // With positional ports.
 903   verifyFormat("ffnand ff1(out1,\n"
 904                "           in1,\n"
 905                "           in2);");
 906   verifyFormat("ffnand ff1(,\n"
 907                "           out1,\n"
 908                "           in1,\n"
 909                "           in2);");
 910   // Multiple instantiations.
 911   verifyFormat("ffnand ff1(.q(),\n"
 912                "           .qbar(out1),\n"
 913                "           .clear(in1),\n"
 914                "           .preset(in2)),\n"
 915                "       ff1(.q(),\n"
 916                "           .qbar(out1),\n"
 917                "           .clear(in1),\n"
 918                "           .preset(in2));");
 919   verifyFormat("ffnand //\n"
 920                "    ff1(.q(),\n"
 921                "        .qbar(out1),\n"
 922                "        .clear(in1),\n"
 923                "        .preset(in2)),\n"
 924                "    ff1(.q(),\n"
 925                "        .qbar(out1),\n"
 926                "        .clear(in1),\n"
 927                "        .preset(in2));");
 928   // With breaking between instance ports disabled.
 929   auto Style = getDefaultStyle();
 930   Style.VerilogBreakBetweenInstancePorts = false;
 931   verifyFormat("ffnand ff1;", Style);
 932   verifyFormat("ffnand ff1(.qbar(out1), .clear(in1), .preset(in2), .*);",
 933                Style);
 934   verifyFormat("ffnand ff1(out1, in1, in2);", Style);
 935   verifyFormat("ffnand ff1(.q(), .qbar(out1), .clear(in1), .preset(in2)),\n"
 936                "       ff1(.q(), .qbar(out1), .clear(in1), .preset(in2));",
 937                Style);
 938   verifyFormat("ffnand //\n"
 939                "    ff1(.q(), .qbar(out1), .clear(in1), .preset(in2)),\n"
 940                "    ff1(.q(), .qbar(out1), .clear(in1), .preset(in2));",
 941                Style);
 942 }
 943
 944 TEST_F(FormatTestVerilog, Loop) {
 945   verifyFormat("foreach (x[x])\n"
 946                "  x = x;");
 947   verifyFormat("repeat (x)\n"
 948                "  x = x;");
 949   verifyFormat("foreach (x[x]) begin\n"
 950                "end");
 951   verifyFormat("repeat (x) begin\n"
 952                "end");
 953   auto Style = getDefaultStyle();
 954   Style.SpacesInParens = FormatStyle::SIPO_Custom;
 955   Style.SpacesInParensOptions.InConditionalStatements = true;
 956   verifyFormat("foreach ( x[x] )\n"
 957                "  x = x;",
 958                Style);
 959   verifyFormat("repeat ( x )\n"
 960                "  x = x;",
 961                Style);
 962 }
 963
 964 TEST_F(FormatTestVerilog, Operators) {
 965   // Test that unary operators are not followed by space.
 966   verifyFormat("x = +x;");
 967   verifyFormat("x = -x;");
 968   verifyFormat("x = !x;");
 969   verifyFormat("x = ~x;");
 970   verifyFormat("x = &x;");
 971   verifyFormat("x = ~&x;");
 972   verifyFormat("x = |x;");
 973   verifyFormat("x = ~|x;");
 974   verifyFormat("x = ^x;");
 975   verifyFormat("x = ~^x;");
 976   verifyFormat("x = ^~x;");
 977   verifyFormat("x = ++x;");
 978   verifyFormat("x = --x;");
 979
 980   // Test that `*` and `*>` are binary.
 981   verifyFormat("x = x * x;");
 982   verifyFormat("x = (x * x);");
 983   verifyFormat("(opcode *> o1) = 6.1;");
 984   verifyFormat("(C, D *> Q) = 18;");
 985   // The wildcard import is not a binary operator.
 986   verifyFormat("import p::*;");
 987
 988   // Test that operators don't get split.
 989   verifyFormat("x = x++;");
 990   verifyFormat("x = x--;");
 991   verifyFormat("x = x ** x;");
 992   verifyFormat("x = x << x;");
 993   verifyFormat("x = x >> x;");
 994   verifyFormat("x = x <<< x;");
 995   verifyFormat("x = x >>> x;");
 996   verifyFormat("x = x <= x;");
 997   verifyFormat("x = x >= x;");
 998   verifyFormat("x = x == x;");
 999   verifyFormat("x = x != x;");
1000   verifyFormat("x = x === x;");
1001   verifyFormat("x = x !== x;");
1002   verifyFormat("x = x ==? x;");
1003   verifyFormat("x = x !=? x;");
1004   verifyFormat("x = x ~^ x;");
1005   verifyFormat("x = x ^~ x;");
1006   verifyFormat("x = x && x;");
1007   verifyFormat("x = x || x;");
1008   verifyFormat("x = x->x;");
1009   verifyFormat("x = x <-> x;");
1010   verifyFormat("x += x;");
1011   verifyFormat("x -= x;");
1012   verifyFormat("x *= x;");
1013   verifyFormat("x /= x;");
1014   verifyFormat("x %= x;");
1015   verifyFormat("x &= x;");
1016   verifyFormat("x ^= x;");
1017   verifyFormat("x |= x;");
1018   verifyFormat("x <<= x;");
1019   verifyFormat("x >>= x;");
1020   verifyFormat("x <<<= x;");
1021   verifyFormat("x >>>= x;");
1022   verifyFormat("x <= x;");
1023
1024   // Test that space is added between operators.
1025   verifyFormat("x = x < -x;", "x=x<-x;");
1026   verifyFormat("x = x << -x;", "x=x<<-x;");
1027   verifyFormat("x = x <<< -x;", "x=x<<<-x;");
1028
1029   // Test that operators that are C++ identifiers get treated as operators.
1030   verifyFormat("solve s before d;");                       // before
1031   verifyFormat("binsof(i) intersect {0};");                // intersect
1032   verifyFormat("req dist {1};");                           // dist
1033   verifyFormat("a inside {b, c};");                        // inside
1034   verifyFormat("bus.randomize() with { atype == low; };"); // with
1035 }
1036
1037 TEST_F(FormatTestVerilog, Preprocessor) {
1038   auto Style = getDefaultStyle();
1039   Style.ColumnLimit = 20;
1040
1041   // Macro definitions.
1042   verifyFormat("`define X          \\\n"
1043                "  if (x)           \\\n"
1044                "    x = x;",
1045                "`define X if(x)x=x;", Style);
1046   verifyFormat("`define X(x)       \\\n"
1047                "  if (x)           \\\n"
1048                "    x = x;",
1049                "`define X(x) if(x)x=x;", Style);
1050   verifyFormat("`define X          \\\n"
1051                "  x = x;           \\\n"
1052                "  x = x;",
1053                "`define X x=x;x=x;", Style);
1054   // Macro definitions with invocations inside.
1055   verifyFormat("`define LIST       \\\n"
1056                "  `ENTRY           \\\n"
1057                "  `ENTRY",
1058                "`define LIST \\\n"
1059                "`ENTRY \\\n"
1060                "`ENTRY",
1061                Style);
1062   verifyFormat("`define LIST       \\\n"
1063                "  `x = `x;         \\\n"
1064                "  `x = `x;",
1065                "`define LIST \\\n"
1066                "`x = `x; \\\n"
1067                "`x = `x;",
1068                Style);
1069   verifyFormat("`define LIST       \\\n"
1070                "  `x = `x;         \\\n"
1071                "  `x = `x;",
1072                "`define LIST `x=`x;`x=`x;", Style);
1073   // Macro invocations.
1074   verifyFormat("`x = (`x1 + `x2 + x);");
1075   // Lines starting with a preprocessor directive should not be indented.
1076   std::string Directives[] = {
1077       "begin_keywords",
1078       "celldefine",
1079       "default_nettype",
1080       "define",
1081       "else",
1082       "elsif",
1083       "end_keywords",
1084       "endcelldefine",
1085       "endif",
1086       "ifdef",
1087       "ifndef",
1088       "include",
1089       "line",
1090       "nounconnected_drive",
1091       "pragma",
1092       "resetall",
1093       "timescale",
1094       "unconnected_drive",
1095       "undef",
1096       "undefineall",
1097   };
1098   for (auto &Name : Directives) {
1099     verifyFormat("if (x)\n"
1100                  "`" +
1101                      Name +
1102                      "\n"
1103                      "  ;",
1104                  "if (x)\n"
1105                  "`" +
1106                      Name +
1107                      "\n"
1108                      ";",
1109                  Style);
1110   }
1111   // Lines starting with a regular macro invocation should be indented as a
1112   // normal line.
1113   verifyFormat("if (x)\n"
1114                "  `x = `x;\n"
1115                "`timescale 1ns / 1ps",
1116                "if (x)\n"
1117                "`x = `x;\n"
1118                "`timescale 1ns / 1ps",
1119                Style);
1120   verifyFormat("if (x)\n"
1121                "`timescale 1ns / 1ps\n"
1122                "  `x = `x;",
1123                "if (x)\n"
1124                "`timescale 1ns / 1ps\n"
1125                "`x = `x;",
1126                Style);
1127   std::string NonDirectives[] = {
1128       // For `__FILE__` and `__LINE__`, although the standard classifies them as
1129       // preprocessor directives, they are used like regular macros.
1130       "__FILE__", "__LINE__", "elif", "foo", "x",
1131   };
1132   for (auto &Name : NonDirectives) {
1133     verifyFormat("if (x)\n"
1134                  "  `" +
1135                      Name + ";",
1136                  "if (x)\n"
1137                  "`" +
1138                      Name +
1139                      "\n"
1140                      ";",
1141                  Style);
1142   }
1143 }
1144
1145 TEST_F(FormatTestVerilog, Primitive) {
1146   verifyFormat("primitive multiplexer\n"
1147                "    (mux, control, dataA, dataB);\n"
1148                "  output mux;\n"
1149                "  input control, dataA, dataB;\n"
1150                "  table\n"
1151                "    0 1 ? : 1;\n"
1152                "    0 0 ? : 0;\n"
1153                "    1 ? 1 : 1;\n"
1154                "    1 ? 0 : 0;\n"
1155                "    x 0 0 : 0;\n"
1156                "    x 1 1 : 1;\n"
1157                "  endtable\n"
1158                "endprimitive");
1159   verifyFormat("primitive latch\n"
1160                "    (q, ena_, data);\n"
1161                "  output q;\n"
1162                "  reg q;\n"
1163                "  input ena_, data;\n"
1164                "  table\n"
1165                "    0 1 : ? : 1;\n"
1166                "    0 0 : ? : 0;\n"
1167                "    1 ? : ? : -;\n"
1168                "    ? * : ? : -;\n"
1169                "  endtable\n"
1170                "endprimitive");
1171   verifyFormat("primitive d\n"
1172                "    (q, clock, data);\n"
1173                "  output q;\n"
1174                "  reg q;\n"
1175                "  input clock, data;\n"
1176                "  table\n"
1177                "    (01) 0 : ? : 0;\n"
1178                "    (01) 1 : ? : 1;\n"
1179                "    (0?) 1 : 1 : 1;\n"
1180                "    (0?) 0 : 0 : 0;\n"
1181                "    (?0) ? : ? : -;\n"
1182                "    (?\?) ? : ? : -;\n"
1183                "  endtable\n"
1184                "endprimitive");
1185 }
1186
1187 TEST_F(FormatTestVerilog, Streaming) {
1188   verifyFormat("x = {>>{j}};");
1189   verifyFormat("x = {>>byte{j}};");
1190   verifyFormat("x = {<<{j}};");
1191   verifyFormat("x = {<<byte{j}};");
1192   verifyFormat("x = {<<16{j}};");
1193   verifyFormat("x = {<<{8'b0011_0101}};");
1194   verifyFormat("x = {<<4{6'b11_0101}};");
1195   verifyFormat("x = {>>4{6'b11_0101}};");
1196   verifyFormat("x = {<<2{{<<{4'b1101}}}};");
1197   verifyFormat("bit [96 : 1] y = {>>{a, b, c}};");
1198   verifyFormat("int j = {>>{a, b, c}};");
1199   verifyFormat("{>>{a, b, c}} = 23'b1;");
1200   verifyFormat("{>>{a, b, c}} = x;");
1201   verifyFormat("{>>{j}} = x;");
1202   verifyFormat("{>>byte{j}} = x;");
1203   verifyFormat("{<<{j}} = x;");
1204   verifyFormat("{<<byte{j}} = x;");
1205 }
1206
1207 TEST_F(FormatTestVerilog, StringLiteral) {
1208   // Long strings should be broken.
1209   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ",
1210    "xxxx"});)",
1211                R"(x({"xxxxxxxxxxxxxxxx xxxx"});)",
1212                getStyleWithColumns(getDefaultStyle(), 23));
1213   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx",
1214    " xxxx"});)",
1215                R"(x({"xxxxxxxxxxxxxxxx xxxx"});)",
1216                getStyleWithColumns(getDefaultStyle(), 22));
1217   // Braces should be added when they don't already exist.
1218   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ",
1219    "xxxx"});)",
1220                R"(x("xxxxxxxxxxxxxxxx xxxx");)",
1221                getStyleWithColumns(getDefaultStyle(), 23));
1222   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx",
1223    " xxxx"});)",
1224                R"(x("xxxxxxxxxxxxxxxx xxxx");)",
1225                getStyleWithColumns(getDefaultStyle(), 22));
1226   verifyFormat(R"(x({{"xxxxxxxxxxxxxxxx ",
1227     "xxxx"} == x});)",
1228                R"(x({"xxxxxxxxxxxxxxxx xxxx" == x});)",
1229                getStyleWithColumns(getDefaultStyle(), 24));
1230   verifyFormat(R"(string x = {"xxxxxxxxxxxxxxxx ",
1231             "xxxxxxxx"};)",
1232                R"(string x = "xxxxxxxxxxxxxxxx xxxxxxxx";)",
1233                getStyleWithColumns(getDefaultStyle(), 32));
1234   // Space around braces should be correct.
1235   auto Style = getStyleWithColumns(getDefaultStyle(), 24);
1236   Style.Cpp11BracedListStyle = false;
1237   verifyFormat(R"(x({ "xxxxxxxxxxxxxxxx ",
1238     "xxxx" });)",
1239                R"(x("xxxxxxxxxxxxxxxx xxxx");)", Style);
1240   // Braces should not be added twice.
1241   verifyFormat(R"(x({"xxxxxxxx",
1242    "xxxxxxxx",
1243    "xxxxxx"});)",
1244                R"(x("xxxxxxxxxxxxxxxxxxxxxx");)",
1245                getStyleWithColumns(getDefaultStyle(), 14));
1246   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ",
1247    "xxxxxxxxxxxxxxxx ",
1248    "xxxx"});)",
1249                R"(x("xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx xxxx");)",
1250                getStyleWithColumns(getDefaultStyle(), 23));
1251   verifyFormat(R"(x({"xxxxxxxxxxxxxxxx ",
1252    "xxxxxxxxxxxxxxxx ",
1253    "xxxx"});)",
1254                R"(x({"xxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxx ", "xxxx"});)",
1255                getStyleWithColumns(getDefaultStyle(), 23));
1256   // import/export "DPI"/"DPI-C" cannot be split.
1257   verifyFormat(R"(import
1258     "DPI-C" function void foo
1259     ();)",
1260                R"(import "DPI-C" function void foo();)",
1261                getStyleWithColumns(getDefaultStyle(), 23));
1262   verifyFormat(R"(export "DPI-C" function foo;)",
1263                R"(export "DPI-C" function foo;)",
1264                getStyleWithColumns(getDefaultStyle(), 23));
1265   // These kinds of strings don't exist in Verilog.
1266   verifyNoCrash(R"(x(@"xxxxxxxxxxxxxxxx xxxx");)",
1267                 getStyleWithColumns(getDefaultStyle(), 23));
1268   verifyNoCrash(R"(x(u"xxxxxxxxxxxxxxxx xxxx");)",
1269                 getStyleWithColumns(getDefaultStyle(), 23));
1270   verifyNoCrash(R"(x(u8"xxxxxxxxxxxxxxxx xxxx");)",
1271                 getStyleWithColumns(getDefaultStyle(), 23));
1272   verifyNoCrash(R"(x(_T("xxxxxxxxxxxxxxxx xxxx"));)",
1273                 getStyleWithColumns(getDefaultStyle(), 23));
1274 }
1275
1276 TEST_F(FormatTestVerilog, StructLiteral) {
1277   verifyFormat("c = '{0, 0.0};");
1278   verifyFormat("c = '{'{1, 1.0}, '{2, 2.0}};");
1279   verifyFormat("c = '{a: 0, b: 0.0};");
1280   verifyFormat("c = '{a: 0, b: 0.0, default: 0};");
1281   verifyFormat("c = ab'{a: 0, b: 0.0};");
1282   verifyFormat("c = ab'{cd: cd'{1, 1.0}, ef: ef'{2, 2.0}};");
1283   verifyFormat("c = ab'{cd'{1, 1.0}, ef'{2, 2.0}};");
1284   verifyFormat("d = {int: 1, shortreal: 1.0};");
1285   verifyFormat("d = ab'{int: 1, shortreal: 1.0};");
1286   verifyFormat("c = '{default: 0};");
1287   auto Style = getDefaultStyle();
1288   Style.SpacesInContainerLiterals = true;
1289   verifyFormat("c = '{a : 0, b : 0.0};", Style);
1290   verifyFormat("c = '{a : 0, b : 0.0, default : 0};", Style);
1291   verifyFormat("c = ab'{a : 0, b : 0.0};", Style);
1292   verifyFormat("c = ab'{cd : cd'{1, 1.0}, ef : ef'{2, 2.0}};", Style);
1293
1294   // It should be indented correctly when the line has to break.
1295   verifyFormat("c = //\n"
1296                "    '{default: 0};");
1297   Style = getDefaultStyle();
1298   Style.ContinuationIndentWidth = 2;
1299   verifyFormat("c = //\n"
1300                "  '{default: 0};",
1301                Style);
1302 }
1303
1304 TEST_F(FormatTestVerilog, StructuredProcedure) {
1305   // Blocks should be indented correctly.
1306   verifyFormat("initial begin\n"
1307                "end");
1308   verifyFormat("initial begin\n"
1309                "  x <= x;\n"
1310                "  x <= x;\n"
1311                "end");
1312   verifyFormat("initial\n"
1313                "  x <= x;\n"
1314                "x <= x;");
1315   verifyFormat("always @(x) begin\n"
1316                "end");
1317   verifyFormat("always @(x) begin\n"
1318                "  x <= x;\n"
1319                "  x <= x;\n"
1320                "end");
1321   verifyFormat("always @(x)\n"
1322                "  x <= x;\n"
1323                "x <= x;");
1324   // Various keywords.
1325   verifyFormat("always @(x)\n"
1326                "  x <= x;");
1327   verifyFormat("always @(posedge x)\n"
1328                "  x <= x;");
1329   verifyFormat("always @(posedge x or posedge y)\n"
1330                "  x <= x;");
1331   verifyFormat("always @(posedge x, posedge y)\n"
1332                "  x <= x;");
1333   verifyFormat("always @(negedge x, negedge y)\n"
1334                "  x <= x;");
1335   verifyFormat("always @(edge x, edge y)\n"
1336                "  x <= x;");
1337   verifyFormat("always\n"
1338                "  x <= x;");
1339   verifyFormat("always @*\n"
1340                "  x <= x;");
1341   verifyFormat("always @(*)\n"
1342                "  x <= x;");
1343   verifyFormat("always_comb\n"
1344                "  x <= x;");
1345   verifyFormat("always_latch @(x)\n"
1346                "  x <= x;");
1347   verifyFormat("always_ff @(posedge x)\n"
1348                "  x <= x;");
1349   verifyFormat("initial\n"
1350                "  x <= x;");
1351   verifyFormat("final\n"
1352                "  x <= x;");
1353   verifyFormat("forever\n"
1354                "  x <= x;");
1355 }
1356 } // namespace
1357 } // namespace test
1358 } // namespace format
1359 } // namespace clang