Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / lld / test / ELF / aarch64-cortex-a53-843419-address.s
blob6f10073918669fe002196326899fbbfab078844b
1 // REQUIRES: aarch64
2 // RUN: llvm-mc -filetype=obj -triple=aarch64-none-linux %s -o %t.o
3 // RUN: echo "SECTIONS { \
4 // RUN: .text : { *(.text) *(.text.*) *(.newisd) } \
5 // RUN: .text2 : { *.(newos) } \
6 // RUN: .data : { *(.data) } }" > %t.script
7 // RUN: ld.lld --script %t.script -fix-cortex-a53-843419 -verbose %t.o -o %t2 2>&1 \
8 // RUN: | FileCheck -check-prefix=CHECK-PRINT %s
9 // RUN: llvm-objdump --no-print-imm-hex --triple=aarch64-linux-gnu -d %t2 | FileCheck %s
11 // Test cases for Cortex-A53 Erratum 843419 that involve interactions
12 // between the generated patches and the address of sections.
14 // See ARM-EPM-048406 Cortex_A53_MPCore_Software_Developers_Errata_Notice.pdf
15 // for full erratum details.
16 // In Summary
17 // 1.)
18 // ADRP (0xff8 or 0xffc).
19 // 2.)
20 // - load or store single register or either integer or vector registers.
21 // - STP or STNP of either vector or vector registers.
22 // - Advanced SIMD ST1 store instruction.
23 // - Must not write Rn.
24 // 3.) optional instruction, can't be a branch, must not write Rn, may read Rn.
25 // 4.) A load or store instruction from the Load/Store register unsigned
26 // immediate class using Rn as the base register.
28 // An aarch64 section can contain ranges of literal data embedded within the
29 // code, these ranges are encoded with mapping symbols. This tests that we
30 // can match the erratum sequence in code, but not data.
31 // - We can handle more than one patch per code range (denoted by mapping
32 // symbols).
33 // - We can handle a patch in more than range of code, with literal data
34 // inbetween.
35 // - We can handle redundant mapping symbols (two or more consecutive mapping
36 // symbols with the same type).
37 // - We can ignore erratum sequences in multiple literal data ranges.
39 // CHECK-PRINT: detected cortex-a53-843419 erratum sequence starting at FF8 in unpatched output.
40 // CHECK: <t3_ff8_ldr>:
41 // CHECK-NEXT: ff8: d0000020 adrp x0, 0x6000
42 // CHECK-NEXT: ffc: f9400021 ldr x1, [x1]
43 // CHECK-NEXT: 1000: 14000ff9 b 0x4fe4
44 // CHECK-NEXT: 1004: d65f03c0 ret
45 .section .text.01, "ax", %progbits
46 .balign 4096
47 .space 4096 - 8
48 .globl t3_ff8_ldr
49 .type t3_ff8_ldr, %function
50 t3_ff8_ldr:
51 adrp x0, dat
52 ldr x1, [x1, #0]
53 ldr x0, [x0, :got_lo12:dat]
54 ret
56 // create a redundant mapping symbol as we are already in a $x range
57 // some object producers unconditionally generate a mapping symbol on
58 // every symbol so we need to handle the case of $x $x.
59 .local $x.999
60 $x.999:
61 // CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 1FFC in unpatched output.
62 // CHECK: <t3_ffc_ldrsimd>:
63 // CHECK-NEXT: 1ffc: b0000020 adrp x0, 0x6000
64 // CHECK-NEXT: 2000: bd400021 ldr s1, [x1]
65 // CHECK-NEXT: 2004: 14000bfa b 0x4fec
66 // CHECK-NEXT: 2008: d65f03c0 ret
67 .globl t3_ffc_ldrsimd
68 .type t3_ffc_ldrsimd, %function
69 .space 4096 - 12
70 t3_ffc_ldrsimd:
71 adrp x0, dat
72 ldr s1, [x1, #0]
73 ldr x2, [x0, :got_lo12:dat]
74 ret
76 // Inline data containing bit pattern of erratum sequence, expect no patch.
77 .globl t3_ffc_ldralldata
78 .type t3_ff8_ldralldata, %function
79 .space 4096 - 20
80 t3_ff8_ldralldata:
81 // 0x90000000 = adrp x0, #0
82 .byte 0x00
83 .byte 0x00
84 .byte 0x00
85 .byte 0x90
86 // 0xf9400021 = ldr x1, [x1]
87 .byte 0x21
88 .byte 0x00
89 .byte 0x40
90 .byte 0xf9
91 // 0xf9400000 = ldr x0, [x0]
92 .byte 0x00
93 .byte 0x00
94 .byte 0x40
95 .byte 0xf9
96 // Check that we can recognise the erratum sequence post literal data.
98 // CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 3FF8 in unpatched output.
99 // CHECK: <t3_ffc_ldr>:
100 // CHECK-NEXT: 3ff8: f0000000 adrp x0, 0x6000
101 // CHECK-NEXT: 3ffc: f9400021 ldr x1, [x1]
102 // CHECK-NEXT: 4000: 140003fd b 0x4ff4
103 // CHECK-NEXT: 4004: d65f03c0 ret
104 .space 4096 - 12
105 .globl t3_ffc_ldr
106 .type t3_ffc_ldr, %function
107 t3_ffc_ldr:
108 adrp x0, dat
109 ldr x1, [x1, #0]
110 ldr x0, [x0, :got_lo12:dat]
113 // CHECK: <__CortexA53843419_1000>:
114 // CHECK-NEXT: 4fe4: f9400c00 ldr x0, [x0, #24]
115 // CHECK-NEXT: 4fe8: 17fff007 b 0x1004
116 // CHECK: <__CortexA53843419_2004>:
117 // CHECK-NEXT: 4fec: f9400c02 ldr x2, [x0, #24]
118 // CHECK-NEXT: 4ff0: 17fff406 b 0x2008
119 // CHECK: <__CortexA53843419_4000>:
120 // CHECK-NEXT: 4ff4: f9400c00 ldr x0, [x0, #24]
121 // CHECK-NEXT: 4ff8: 17fffc03 b 0x4004
123 .section .text.02, "ax", %progbits
124 .space 4096 - 36
126 // Start a new InputSectionDescription (see Linker Script) so the
127 // start address will be affected by any patches added to previous
128 // InputSectionDescription.
130 // CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 4FFC in unpatched output
131 // CHECK: <t3_ffc_str>:
132 // CHECK-NEXT: 4ffc: d0000000 adrp x0, 0x6000
133 // CHECK-NEXT: 5000: f9000021 str x1, [x1]
134 // CHECK-NEXT: 5004: 140003fb b 0x5ff0
135 // CHECK-NEXT: 5008: d65f03c0 ret
137 .section .newisd, "ax", %progbits
138 .globl t3_ffc_str
139 .type t3_ffc_str, %function
140 t3_ffc_str:
141 adrp x0, dat
142 str x1, [x1, #0]
143 ldr x0, [x0, :got_lo12:dat]
145 .space 4096 - 28
147 // CHECK: <__CortexA53843419_5004>:
148 // CHECK-NEXT: 5ff0: f9400c00 ldr x0, [x0, #24]
149 // CHECK-NEXT: 5ff4: 17fffc05 b 0x5008
151 // Start a new OutputSection (see Linker Script) so the
152 // start address will be affected by any patches added to previous
153 // InputSectionDescription.
155 //CHECK-PRINT-NEXT: detected cortex-a53-843419 erratum sequence starting at 5FF8 in unpatched output
156 // CHECK: <t3_ff8_str>:
157 // CHECK-NEXT: 5ff8: b0000000 adrp x0, 0x6000
158 // CHECK-NEXT: 5ffc: f9000021 str x1, [x1]
159 // CHECK-NEXT: 6000: 14000003 b 0x600c
160 // CHECK-NEXT: 6004: d65f03c0 ret
162 .section .newos, "ax", %progbits
163 .globl t3_ff8_str
164 .type t3_ff8_str, %function
165 t3_ff8_str:
166 adrp x0, dat
167 str x1, [x1, #0]
168 ldr x0, [x0, :got_lo12:dat]
170 .globl _start
171 .type _start, %function
172 _start:
175 // CHECK: <__CortexA53843419_6000>:
176 // CHECK-NEXT: 600c: f9400c00 ldr x0, [x0, #24]
177 // CHECK-NEXT: 6010: 17fffffd b 0x6004
179 .data
180 .globl dat
181 dat: .word 0