2 // RUN
: llvm-mc
-filetype
=obj
-triple
=aarch64-none-linux
%s
-o
%t.o
3 // RUN
: ld.lld
-fix-cortex-a53-
843419 -verbose
-t %t.o
-o
/dev
/null | FileCheck
%s
4 // Test cases for Cortex-A53 Erratum
843419 that we don
't expect to recognize
5 // as needing a patch as one or more of the conditions isn't satisfied.
6 // See ARM-EPM-
048406 Cortex_A53_MPCore_Software_Developers_Errata_Notice.pdf
7 // for full erratum details.
10 // ADRP
(0xff8 or 0xffc)
12 // - load
or store single register
or either integer
or vector registers
13 // - STP
or STNP of either vector
or vector registers
14 // - Advanced SIMD ST1 store instruction
16 // 3.) optional instruction, can't be a branch, must not write Rn, may read Rn
17 // 4.) A load or store instruction from the Load/Store register unsigned
18 // immediate class using Rn as the base register
20 // Expect no patches detected.
21 // CHECK-NOT: detected cortex-a53-843419 erratum sequence
23 // erratum sequence but adrp (address & 0xfff) is not 0xff8 or 0xffc
24 .section .text.01, "ax", %progbits
27 .type t3_ff8_ldr, %function
31 ldr x0, [x0, :got_lo12:dat]
34 .section .text.02, "ax", %progbits
38 .type t3_ff4_ldr, %function
42 ldr x0, [x0, :got_lo12:dat]
45 // Close matches for erratum sequence, with adrp at correct address but
46 // instruction 2 is a load or store but not one that matches the erratum
47 // conditions, but with a similar encoding to an instruction that does.
49 // ldp is not part of sequence, although stp is.
50 .section .text.03, "ax", %progbits
53 .type t3_ff8_ldp, %function
58 ldr x13, [x16, :got_lo12:dat]
61 // st2 is not part of sequence although st1 is.
62 .section .text.04, "ax", %progbits
65 .type t3_ffc_st2, %function
69 st2 { v0.16b, v1.16b }, [x1]
70 ldr x13, [x16, :got_lo12:dat]
73 // st3 is not part of sequence although st1 is.
74 .section .text.05, "ax", %progbits
77 .type t3_ffc_st3, %function
81 st3 { v0.16b, v1.16b, v2.16b }, [x1], x2
82 ldr x13, [x16, :got_lo12:dat]
85 // ld1 is not part of sequence although st1 is.
86 .section .text.06, "ax", %progbits
89 .type t3_ffc_st3, %function
93 ld1 { v0.16b }, [x2], x3
94 ldr x13, [x16, :got_lo12:dat]
97 // ldnp is not part of sequence although stnp is.
98 .section .text.07, "ax", %progbits
101 .type t4_ff8_ldnp, %function
107 ldr x10, [x7, :got_lo12:dat]
110 // Close match for erratum sequence, with adrp at correct address but
111 // instruction 2 writes to Rn, with Rn as either destination or as the
112 // transfer register but with writeback.
114 // ldr instruction writes to Rn
115 .section .text.08, "ax", %progbits
118 .type t3_ff8_ldr, %function
123 ldr x0, [x0, :got_lo12:dat]
126 // str instruction writes to Rn via writeback (pre index)
127 .section .text.09, "ax", %progbits
130 .type t3_ff8_str, %function
135 ldr x0, [x0, :got_lo12:dat]
138 // ldr instruction writes to Rn via writeback (post index)
139 .section .text.09, "ax", %progbits
142 .type t3_ffc_ldr, %function
147 ldr x0, [x0, :got_lo12:dat]
150 // stp writes to Rn via writeback (pre index)
151 .section .text.10, "ax", %progbits
154 .type t4_ffc_stppre, %function
158 stp x1,x2, [x16, #16]!
163 // stp writes to Rn via writeback (post index)
164 .section .text.11, "ax", %progbits
166 .globl t4_ff8_stppost
167 .type t4_ff8_stppost, %function
171 stp x1,x2, [x16], #16
176 // st1 writes to Rn via writeback
177 .section .text.12, "ax", %progbits
180 .type t3_ff8_st1, %function
184 st1 { v0.16b}, [x16], x2
185 ldr x13, [x16, :got_lo12:dat]
188 // Close match for erratum sequence, but with optional instruction 3 a branch
190 // function call via immediate
191 .section .text.13, "ax", %progbits
194 .type t4_ffc_blimm, %function
200 ldr x10, [x7, :got_lo12:dat]
203 // function call via register
204 .section .text.14, "ax", %progbits
207 .type t4_ffc_blreg, %function
213 ldr x10, [x7, :got_lo12:dat]
216 // Unconditional branch immediate
217 .section .text.15, "ax", %progbits
219 .globl t4_ffc_branchimm
220 .type t4_ffc_branchimm, %function
226 ldr x10, [x7, :got_lo12:dat]
229 // Unconditional branch register
230 .section .text.16, "ax", %progbits
232 .globl t4_ffc_branchreg
233 .type t4_ffc_branchreg, %function
239 ldr x10, [x7, :got_lo12:dat]
242 // Conditional branch
243 .section .text.17, "ax", %progbits
245 .globl t4_ffc_branchcond
246 .type t4_ffc_branchcond, %function
251 cbz x5, t4_ffc_branchcond
252 ldr x10, [x7, :got_lo12:dat]
255 // Conditional branch immediate
256 .section .text.18, "ax", %progbits
258 .globl t4_ffc_branchcondimm
259 .type t4_ffc_branchcondimm, %function
261 t4_ffc_branchcondimm:
264 beq t4_ffc_branchcondimm
265 ldr x10, [x7, :got_lo12:dat]
268 // Bitpattern matches erratum sequence but either all or part of the sequence
269 // is in inline literal data
270 .section .text.19, "ax", %progbits
272 .globl t3_ffc_ldrtraildata
273 .type t3_ff8_ldrtraildata, %function
278 // 0xf9400000 = ldr x0, [x0]
283 ldr x0, [x0, :got_lo12:dat]
286 .section .text.20, "ax", %progbits
288 .globl t3_ffc_ldrpredata
289 .type t3_ff8_ldrpredata, %function
292 // 0x90000000 = adrp x0, #0
298 ldr x0, [x0, :got_lo12:dat]
301 .section .text.21, "ax", %progbits
303 .globl t3_ffc_ldralldata
304 .type t3_ff8_ldralldata, %function
307 // 0x90000000 = adrp x0, #0
312 // 0xf9400021 = ldr x1, [x1]
317 // 0xf9400000 = ldr x0, [x0]
327 .type _start, %function
335 // Bitpattern matches erratum sequence but section is not executable