lld/test/ELF/aarch64-tls-vaddr-align.s

   1 # REQUIRES: aarch64
   2
   3 # RUN: llvm-mc -filetype=obj -triple=aarch64 %s -o %t.o
   4 # RUN: ld.lld %t.o -o %t
   5 # RUN: llvm-readelf -S -l %t | FileCheck --check-prefix=SEC %s
   6 # RUN: llvm-objdump --no-print-imm-hex -d %t | FileCheck --check-prefix=DIS %s
   7
   8 # SEC: Name   Type     Address          Off    Size   ES Flg Lk Inf Al
   9 # SEC: .tdata PROGBITS 0000000000220200 000200 000001 00 WAT 0    0  1
  10 # SEC: .tbss  NOBITS   0000000000220300 000201 000008 00 WAT 0    0 256
  11
  12 # SEC: Type Offset   VirtAddr           PhysAddr           FileSiz  MemSiz   Flg Align
  13 # SEC: TLS  0x000200 0x0000000000220200 0x0000000000220200 0x000001 0x000108 R   0x100
  14
  15 ## We currently have a hack in Writer.cpp:fixSectionAlignments() to force
  16 ## p_vaddr(PT_TLS)%p_align(PT_TLS)=0, to work around bugs in some dynamic loaders.
  17
  18 ## a@tprel = st_value(a) + GAP + (p_vaddr-GAP_ABOVE_TP & p_align-1) =
  19 ## .tbss-.tdata + 16 + GAP_ABOVE_TP + (p_vaddr-GAP_ABOVE_TP & p_align-1) =
  20 ## 0x220300-0x220200 + 16 + (0x220200-16 & 0x100-1) = 512
  21 # DIS: add x0, x0, #512
  22
  23 add x0, x0, :tprel_lo12_nc:a
  24
  25 .section .tdata,"awT"
  26 .byte 0
  27
  28 .section .tbss,"awT"
  29 .p2align 8
  30 a:
  31 .quad 0