2 // RUN
: llvm-mc
--arm-add-build-attributes
-filetype
=obj
-triple
=thumbv7a-none-linux-gnueabi
%s
-o
%t
3 // RUN
: ld.lld
%t -o
%t2
4 // RUN
: llvm-objdump
--no-print-imm-hex
-d
%t2 | FileCheck
%s
6 /// Check that the ARM ABI rules for undefined weak symbols are applied.
7 /// Branch instructions are resolved to the next instruction. Relative
8 /// relocations are resolved to the place.
13 .type target, %function
24 /// R_ARM_THM_CALL with exchange
26 /// R_ARM_THM_MOVT_PREL
27 movt
r0, :upper16
:target
- .
28 /// R_ARM_THM_MOVW_PREL_NC
29 movw
r0, :lower16
:target
- .
30 /// R_ARM_THM_ALU_PREL_11_0
33 .reloc 0x18, R_ARM_THM_ALU_PREL_11_0, target
37 .reloc 0x1c, R_ARM_THM_PC12, target
38 // CHECK
: Disassembly of section
.text:
40 // CHECK
: 200b4
: {{.*}} beq.w 0x200b8 <_start+0x4> @ imm = #0
41 // CHECK-NEXT
: 200b8
: {{.*}} b.w 0x200bc <_start+0x8> @ imm = #0
42 // CHECK-NEXT
: 200bc: {{.*}} bl 0x200c0 <_start+0xc> @ imm = #0
43 /// blx is transformed into
bl so we don
't change state
44 // CHECK-NEXT: 200c0: {{.*}} bl 0x200c4 <_start+0x10> @ imm = #0
45 // CHECK-NEXT: 200c4: {{.*}} movt r0, #0
46 // CHECK-NEXT: 200c8: {{.*}} movw r0, #0
47 // CHECK-NEXT: 200cc: {{.*}} adr.w r0, #-4
48 // CHECK-NEXT: 200d0: {{.*}} ldr.w r0, [pc, #-4]