lldb/source/Plugins/Process/Utility/RegisterInfoPOSIX_loongarch64.cpp

   1 //===-- RegisterInfoPOSIX_loongarch64.cpp --------------------------------===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===---------------------------------------------------------------------===//
   8
   9 #include <cassert>
  10 #include <lldb/Utility/Flags.h>
  11 #include <stddef.h>
  12
  13 #include "lldb/lldb-defines.h"
  14 #include "llvm/Support/Compiler.h"
  15
  16 #include "RegisterInfoPOSIX_loongarch64.h"
  17
  18 #define GPR_OFFSET(idx) ((idx)*8 + 0)
  19 #define FPR_OFFSET(idx) ((idx)*8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
  20 #define FCC_OFFSET(idx) ((idx)*1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
  21 #define FCSR_OFFSET (8 * 1 + 32 * 8 + sizeof(RegisterInfoPOSIX_loongarch64::GPR))
  22
  23 #define REG_CONTEXT_SIZE                                                       \
  24   (sizeof(RegisterInfoPOSIX_loongarch64::GPR) +                                \
  25    sizeof(RegisterInfoPOSIX_loongarch64::FPR))
  26
  27 #define DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT
  28 #include "RegisterInfos_loongarch64.h"
  29 #undef DECLARE_REGISTER_INFOS_LOONGARCH64_STRUCT
  30
  31 const lldb_private::RegisterInfo *
  32 RegisterInfoPOSIX_loongarch64::GetRegisterInfoPtr(
  33     const lldb_private::ArchSpec &target_arch) {
  34   switch (target_arch.GetMachine()) {
  35   case llvm::Triple::loongarch64:
  36     return g_register_infos_loongarch64;
  37   default:
  38     assert(false && "Unhandled target architecture.");
  39     return nullptr;
  40   }
  41 }
  42
  43 uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterInfoCount(
  44     const lldb_private::ArchSpec &target_arch) {
  45   switch (target_arch.GetMachine()) {
  46   case llvm::Triple::loongarch64:
  47     return static_cast<uint32_t>(sizeof(g_register_infos_loongarch64) /
  48                                  sizeof(g_register_infos_loongarch64[0]));
  49   default:
  50     assert(false && "Unhandled target architecture.");
  51     return 0;
  52   }
  53 }
  54
  55 // Number of register sets provided by this context.
  56 enum {
  57   k_num_gpr_registers = gpr_last_loongarch - gpr_first_loongarch + 1,
  58   k_num_fpr_registers = fpr_last_loongarch - fpr_first_loongarch + 1,
  59   k_num_register_sets = 2
  60 };
  61
  62 // LoongArch64 general purpose registers.
  63 static const uint32_t g_gpr_regnums_loongarch64[] = {
  64     gpr_r0_loongarch,        gpr_r1_loongarch,        gpr_r2_loongarch,
  65     gpr_r3_loongarch,        gpr_r4_loongarch,        gpr_r5_loongarch,
  66     gpr_r6_loongarch,        gpr_r7_loongarch,        gpr_r8_loongarch,
  67     gpr_r9_loongarch,        gpr_r10_loongarch,       gpr_r11_loongarch,
  68     gpr_r12_loongarch,       gpr_r13_loongarch,       gpr_r14_loongarch,
  69     gpr_r15_loongarch,       gpr_r16_loongarch,       gpr_r17_loongarch,
  70     gpr_r18_loongarch,       gpr_r19_loongarch,       gpr_r20_loongarch,
  71     gpr_r21_loongarch,       gpr_r22_loongarch,       gpr_r23_loongarch,
  72     gpr_r24_loongarch,       gpr_r25_loongarch,       gpr_r26_loongarch,
  73     gpr_r27_loongarch,       gpr_r28_loongarch,       gpr_r29_loongarch,
  74     gpr_r30_loongarch,       gpr_r31_loongarch,       gpr_orig_a0_loongarch,
  75     gpr_pc_loongarch,        gpr_badv_loongarch,      gpr_reserved0_loongarch,
  76     gpr_reserved1_loongarch, gpr_reserved2_loongarch, gpr_reserved3_loongarch,
  77     gpr_reserved4_loongarch, gpr_reserved5_loongarch, gpr_reserved6_loongarch,
  78     gpr_reserved7_loongarch, gpr_reserved8_loongarch, gpr_reserved9_loongarch,
  79     LLDB_INVALID_REGNUM};
  80
  81 static_assert(((sizeof g_gpr_regnums_loongarch64 /
  82                 sizeof g_gpr_regnums_loongarch64[0]) -
  83                1) == k_num_gpr_registers,
  84               "g_gpr_regnums_loongarch64 has wrong number of register infos");
  85
  86 // LoongArch64 floating point registers.
  87 static const uint32_t g_fpr_regnums_loongarch64[] = {
  88     fpr_f0_loongarch,   fpr_f1_loongarch,   fpr_f2_loongarch,
  89     fpr_f3_loongarch,   fpr_f4_loongarch,   fpr_f5_loongarch,
  90     fpr_f6_loongarch,   fpr_f7_loongarch,   fpr_f8_loongarch,
  91     fpr_f9_loongarch,   fpr_f10_loongarch,  fpr_f11_loongarch,
  92     fpr_f12_loongarch,  fpr_f13_loongarch,  fpr_f14_loongarch,
  93     fpr_f15_loongarch,  fpr_f16_loongarch,  fpr_f17_loongarch,
  94     fpr_f18_loongarch,  fpr_f19_loongarch,  fpr_f20_loongarch,
  95     fpr_f21_loongarch,  fpr_f22_loongarch,  fpr_f23_loongarch,
  96     fpr_f24_loongarch,  fpr_f25_loongarch,  fpr_f26_loongarch,
  97     fpr_f27_loongarch,  fpr_f28_loongarch,  fpr_f29_loongarch,
  98     fpr_f30_loongarch,  fpr_f31_loongarch,  fpr_fcc0_loongarch,
  99     fpr_fcc1_loongarch, fpr_fcc2_loongarch, fpr_fcc3_loongarch,
 100     fpr_fcc4_loongarch, fpr_fcc5_loongarch, fpr_fcc6_loongarch,
 101     fpr_fcc7_loongarch, fpr_fcsr_loongarch, LLDB_INVALID_REGNUM};
 102
 103 static_assert(((sizeof g_fpr_regnums_loongarch64 /
 104                 sizeof g_fpr_regnums_loongarch64[0]) -
 105                1) == k_num_fpr_registers,
 106               "g_fpr_regnums_loongarch64 has wrong number of register infos");
 107
 108 // Register sets for LoongArch64.
 109 static const lldb_private::RegisterSet
 110     g_reg_sets_loongarch64[k_num_register_sets] = {
 111         {"General Purpose Registers", "gpr", k_num_gpr_registers,
 112          g_gpr_regnums_loongarch64},
 113         {"Floating Point Registers", "fpr", k_num_fpr_registers,
 114          g_fpr_regnums_loongarch64}};
 115
 116 RegisterInfoPOSIX_loongarch64::RegisterInfoPOSIX_loongarch64(
 117     const lldb_private::ArchSpec &target_arch, lldb_private::Flags flags)
 118     : lldb_private::RegisterInfoAndSetInterface(target_arch),
 119       m_register_info_p(GetRegisterInfoPtr(target_arch)),
 120       m_register_info_count(GetRegisterInfoCount(target_arch)) {}
 121
 122 uint32_t RegisterInfoPOSIX_loongarch64::GetRegisterCount() const {
 123   return m_register_info_count;
 124 }
 125
 126 size_t RegisterInfoPOSIX_loongarch64::GetGPRSize() const {
 127   return sizeof(struct RegisterInfoPOSIX_loongarch64::GPR);
 128 }
 129
 130 size_t RegisterInfoPOSIX_loongarch64::GetFPRSize() const {
 131   return sizeof(struct RegisterInfoPOSIX_loongarch64::FPR);
 132 }
 133
 134 const lldb_private::RegisterInfo *
 135 RegisterInfoPOSIX_loongarch64::GetRegisterInfo() const {
 136   return m_register_info_p;
 137 }
 138
 139 size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetCount() const {
 140   return k_num_register_sets;
 141 }
 142
 143 size_t RegisterInfoPOSIX_loongarch64::GetRegisterSetFromRegisterIndex(
 144     uint32_t reg_index) const {
 145   // coverity[unsigned_compare]
 146   if (reg_index >= gpr_first_loongarch && reg_index <= gpr_last_loongarch)
 147     return GPRegSet;
 148   if (reg_index >= fpr_first_loongarch && reg_index <= fpr_last_loongarch)
 149     return FPRegSet;
 150   return LLDB_INVALID_REGNUM;
 151 }
 152
 153 const lldb_private::RegisterSet *
 154 RegisterInfoPOSIX_loongarch64::GetRegisterSet(size_t set_index) const {
 155   if (set_index < GetRegisterSetCount())
 156     return &g_reg_sets_loongarch64[set_index];
 157   return nullptr;
 158 }