llvm/docs/AMDGPU/AMDGPUAsmGFX900.rst

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   8 ====================================================================================
   9 Syntax of gfx900, gfx902, gfx909 and gfx90c Instructions
  10 ====================================================================================
  11
  12 .. contents::
  13   :local:
  14
  15 Introduction
  16 ============
  17
  18 This document describes the syntax of *instructions specific to gfx900, gfx902, gfx909 and gfx90c*.
  19
  20 For a description of other gfx900, gfx902, gfx909 and gfx90c instructions see :doc:`Syntax of Core GFX9 Instructions<AMDGPUAsmGFX9>`.
  21
  22 Notation
  23 ========
  24
  25 Notation used in this document is explained :ref:`here<amdgpu_syn_instruction_notation>`.
  26
  27 Overview
  28 ========
  29
  30 An overview of generic syntax and other features of AMDGPU instructions may be found :ref:`in this document<amdgpu_syn_instructions>`.
  31
  32 Instructions
  33 ============
  34
  35
  36 VOP3P
  37 -----------------------
  38
  39 .. parsed-literal::
  40
  41     **INSTRUCTION**                    **DST**       **SRC0**       **SRC1**       **SRC2**       **MODIFIERS**
  42     \ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|\ |---|
  43     v_mad_mix_f32                  :ref:`vdst<amdgpu_synid_gfx900_vdst>`,     :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src1<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src2<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`  :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
  44     v_mad_mixhi_f16                :ref:`vdst<amdgpu_synid_gfx900_vdst>`,     :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src1<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src2<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`  :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
  45     v_mad_mixlo_f16                :ref:`vdst<amdgpu_synid_gfx900_vdst>`,     :ref:`src0<amdgpu_synid_gfx900_src>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src1<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`, :ref:`src2<amdgpu_synid_gfx900_src_1>`::ref:`m<amdgpu_synid_gfx900_m>`::ref:`fx<amdgpu_synid_gfx900_fx_operand>`  :ref:`m_op_sel<amdgpu_synid_mad_mix_op_sel>` :ref:`m_op_sel_hi<amdgpu_synid_mad_mix_op_sel_hi>` :ref:`clamp<amdgpu_synid_clamp>`
  46
  47 .. |---| unicode:: U+02014 .. em dash
  48
  49 .. toctree::
  50     :hidden:
  51
  52     gfx900_fx_operand
  53     gfx900_m
  54     gfx900_src
  55     gfx900_src_1
  56     gfx900_vdst