Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / llvm / lib / Analysis / TargetTransformInfo.cpp
blobcaa9b17ae695e49b75f32683e5c8d0e89dcbb216
1 //===- llvm/Analysis/TargetTransformInfo.cpp ------------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
9 #include "llvm/Analysis/TargetTransformInfo.h"
10 #include "llvm/Analysis/CFG.h"
11 #include "llvm/Analysis/LoopIterator.h"
12 #include "llvm/Analysis/TargetTransformInfoImpl.h"
13 #include "llvm/IR/CFG.h"
14 #include "llvm/IR/Dominators.h"
15 #include "llvm/IR/Instruction.h"
16 #include "llvm/IR/Instructions.h"
17 #include "llvm/IR/IntrinsicInst.h"
18 #include "llvm/IR/Module.h"
19 #include "llvm/IR/Operator.h"
20 #include "llvm/IR/PatternMatch.h"
21 #include "llvm/InitializePasses.h"
22 #include "llvm/Support/CommandLine.h"
23 #include <optional>
24 #include <utility>
26 using namespace llvm;
27 using namespace PatternMatch;
29 #define DEBUG_TYPE "tti"
31 static cl::opt<bool> EnableReduxCost("costmodel-reduxcost", cl::init(false),
32 cl::Hidden,
33 cl::desc("Recognize reduction patterns."));
35 static cl::opt<unsigned> CacheLineSize(
36 "cache-line-size", cl::init(0), cl::Hidden,
37 cl::desc("Use this to override the target cache line size when "
38 "specified by the user."));
40 static cl::opt<unsigned> PredictableBranchThreshold(
41 "predictable-branch-threshold", cl::init(99), cl::Hidden,
42 cl::desc(
43 "Use this to override the target's predictable branch threshold (%)."));
45 namespace {
46 /// No-op implementation of the TTI interface using the utility base
47 /// classes.
48 ///
49 /// This is used when no target specific information is available.
50 struct NoTTIImpl : TargetTransformInfoImplCRTPBase<NoTTIImpl> {
51 explicit NoTTIImpl(const DataLayout &DL)
52 : TargetTransformInfoImplCRTPBase<NoTTIImpl>(DL) {}
54 } // namespace
56 bool HardwareLoopInfo::canAnalyze(LoopInfo &LI) {
57 // If the loop has irreducible control flow, it can not be converted to
58 // Hardware loop.
59 LoopBlocksRPO RPOT(L);
60 RPOT.perform(&LI);
61 if (containsIrreducibleCFG<const BasicBlock *>(RPOT, LI))
62 return false;
63 return true;
66 IntrinsicCostAttributes::IntrinsicCostAttributes(
67 Intrinsic::ID Id, const CallBase &CI, InstructionCost ScalarizationCost,
68 bool TypeBasedOnly)
69 : II(dyn_cast<IntrinsicInst>(&CI)), RetTy(CI.getType()), IID(Id),
70 ScalarizationCost(ScalarizationCost) {
72 if (const auto *FPMO = dyn_cast<FPMathOperator>(&CI))
73 FMF = FPMO->getFastMathFlags();
75 if (!TypeBasedOnly)
76 Arguments.insert(Arguments.begin(), CI.arg_begin(), CI.arg_end());
77 FunctionType *FTy = CI.getCalledFunction()->getFunctionType();
78 ParamTys.insert(ParamTys.begin(), FTy->param_begin(), FTy->param_end());
81 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
82 ArrayRef<Type *> Tys,
83 FastMathFlags Flags,
84 const IntrinsicInst *I,
85 InstructionCost ScalarCost)
86 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
87 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
90 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *Ty,
91 ArrayRef<const Value *> Args)
92 : RetTy(Ty), IID(Id) {
94 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
95 ParamTys.reserve(Arguments.size());
96 for (unsigned Idx = 0, Size = Arguments.size(); Idx != Size; ++Idx)
97 ParamTys.push_back(Arguments[Idx]->getType());
100 IntrinsicCostAttributes::IntrinsicCostAttributes(Intrinsic::ID Id, Type *RTy,
101 ArrayRef<const Value *> Args,
102 ArrayRef<Type *> Tys,
103 FastMathFlags Flags,
104 const IntrinsicInst *I,
105 InstructionCost ScalarCost)
106 : II(I), RetTy(RTy), IID(Id), FMF(Flags), ScalarizationCost(ScalarCost) {
107 ParamTys.insert(ParamTys.begin(), Tys.begin(), Tys.end());
108 Arguments.insert(Arguments.begin(), Args.begin(), Args.end());
111 HardwareLoopInfo::HardwareLoopInfo(Loop *L) : L(L) {
112 // Match default options:
113 // - hardware-loop-counter-bitwidth = 32
114 // - hardware-loop-decrement = 1
115 CountType = Type::getInt32Ty(L->getHeader()->getContext());
116 LoopDecrement = ConstantInt::get(CountType, 1);
119 bool HardwareLoopInfo::isHardwareLoopCandidate(ScalarEvolution &SE,
120 LoopInfo &LI, DominatorTree &DT,
121 bool ForceNestedLoop,
122 bool ForceHardwareLoopPHI) {
123 SmallVector<BasicBlock *, 4> ExitingBlocks;
124 L->getExitingBlocks(ExitingBlocks);
126 for (BasicBlock *BB : ExitingBlocks) {
127 // If we pass the updated counter back through a phi, we need to know
128 // which latch the updated value will be coming from.
129 if (!L->isLoopLatch(BB)) {
130 if (ForceHardwareLoopPHI || CounterInReg)
131 continue;
134 const SCEV *EC = SE.getExitCount(L, BB);
135 if (isa<SCEVCouldNotCompute>(EC))
136 continue;
137 if (const SCEVConstant *ConstEC = dyn_cast<SCEVConstant>(EC)) {
138 if (ConstEC->getValue()->isZero())
139 continue;
140 } else if (!SE.isLoopInvariant(EC, L))
141 continue;
143 if (SE.getTypeSizeInBits(EC->getType()) > CountType->getBitWidth())
144 continue;
146 // If this exiting block is contained in a nested loop, it is not eligible
147 // for insertion of the branch-and-decrement since the inner loop would
148 // end up messing up the value in the CTR.
149 if (!IsNestingLegal && LI.getLoopFor(BB) != L && !ForceNestedLoop)
150 continue;
152 // We now have a loop-invariant count of loop iterations (which is not the
153 // constant zero) for which we know that this loop will not exit via this
154 // existing block.
156 // We need to make sure that this block will run on every loop iteration.
157 // For this to be true, we must dominate all blocks with backedges. Such
158 // blocks are in-loop predecessors to the header block.
159 bool NotAlways = false;
160 for (BasicBlock *Pred : predecessors(L->getHeader())) {
161 if (!L->contains(Pred))
162 continue;
164 if (!DT.dominates(BB, Pred)) {
165 NotAlways = true;
166 break;
170 if (NotAlways)
171 continue;
173 // Make sure this blocks ends with a conditional branch.
174 Instruction *TI = BB->getTerminator();
175 if (!TI)
176 continue;
178 if (BranchInst *BI = dyn_cast<BranchInst>(TI)) {
179 if (!BI->isConditional())
180 continue;
182 ExitBranch = BI;
183 } else
184 continue;
186 // Note that this block may not be the loop latch block, even if the loop
187 // has a latch block.
188 ExitBlock = BB;
189 ExitCount = EC;
190 break;
193 if (!ExitBlock)
194 return false;
195 return true;
198 TargetTransformInfo::TargetTransformInfo(const DataLayout &DL)
199 : TTIImpl(new Model<NoTTIImpl>(NoTTIImpl(DL))) {}
201 TargetTransformInfo::~TargetTransformInfo() = default;
203 TargetTransformInfo::TargetTransformInfo(TargetTransformInfo &&Arg)
204 : TTIImpl(std::move(Arg.TTIImpl)) {}
206 TargetTransformInfo &TargetTransformInfo::operator=(TargetTransformInfo &&RHS) {
207 TTIImpl = std::move(RHS.TTIImpl);
208 return *this;
211 unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
212 return TTIImpl->getInliningThresholdMultiplier();
215 unsigned
216 TargetTransformInfo::getInliningCostBenefitAnalysisSavingsMultiplier() const {
217 return TTIImpl->getInliningCostBenefitAnalysisSavingsMultiplier();
220 unsigned
221 TargetTransformInfo::getInliningCostBenefitAnalysisProfitableMultiplier()
222 const {
223 return TTIImpl->getInliningCostBenefitAnalysisProfitableMultiplier();
226 unsigned
227 TargetTransformInfo::adjustInliningThreshold(const CallBase *CB) const {
228 return TTIImpl->adjustInliningThreshold(CB);
231 unsigned TargetTransformInfo::getCallerAllocaCost(const CallBase *CB,
232 const AllocaInst *AI) const {
233 return TTIImpl->getCallerAllocaCost(CB, AI);
236 int TargetTransformInfo::getInlinerVectorBonusPercent() const {
237 return TTIImpl->getInlinerVectorBonusPercent();
240 InstructionCost TargetTransformInfo::getGEPCost(
241 Type *PointeeType, const Value *Ptr, ArrayRef<const Value *> Operands,
242 Type *AccessType, TTI::TargetCostKind CostKind) const {
243 return TTIImpl->getGEPCost(PointeeType, Ptr, Operands, AccessType, CostKind);
246 InstructionCost TargetTransformInfo::getPointersChainCost(
247 ArrayRef<const Value *> Ptrs, const Value *Base,
248 const TTI::PointersChainInfo &Info, Type *AccessTy,
249 TTI::TargetCostKind CostKind) const {
250 assert((Base || !Info.isSameBase()) &&
251 "If pointers have same base address it has to be provided.");
252 return TTIImpl->getPointersChainCost(Ptrs, Base, Info, AccessTy, CostKind);
255 unsigned TargetTransformInfo::getEstimatedNumberOfCaseClusters(
256 const SwitchInst &SI, unsigned &JTSize, ProfileSummaryInfo *PSI,
257 BlockFrequencyInfo *BFI) const {
258 return TTIImpl->getEstimatedNumberOfCaseClusters(SI, JTSize, PSI, BFI);
261 InstructionCost
262 TargetTransformInfo::getInstructionCost(const User *U,
263 ArrayRef<const Value *> Operands,
264 enum TargetCostKind CostKind) const {
265 InstructionCost Cost = TTIImpl->getInstructionCost(U, Operands, CostKind);
266 assert((CostKind == TTI::TCK_RecipThroughput || Cost >= 0) &&
267 "TTI should not produce negative costs!");
268 return Cost;
271 BranchProbability TargetTransformInfo::getPredictableBranchThreshold() const {
272 return PredictableBranchThreshold.getNumOccurrences() > 0
273 ? BranchProbability(PredictableBranchThreshold, 100)
274 : TTIImpl->getPredictableBranchThreshold();
277 bool TargetTransformInfo::hasBranchDivergence(const Function *F) const {
278 return TTIImpl->hasBranchDivergence(F);
281 bool TargetTransformInfo::isSourceOfDivergence(const Value *V) const {
282 return TTIImpl->isSourceOfDivergence(V);
285 bool llvm::TargetTransformInfo::isAlwaysUniform(const Value *V) const {
286 return TTIImpl->isAlwaysUniform(V);
289 bool llvm::TargetTransformInfo::isValidAddrSpaceCast(unsigned FromAS,
290 unsigned ToAS) const {
291 return TTIImpl->isValidAddrSpaceCast(FromAS, ToAS);
294 bool llvm::TargetTransformInfo::addrspacesMayAlias(unsigned FromAS,
295 unsigned ToAS) const {
296 return TTIImpl->addrspacesMayAlias(FromAS, ToAS);
299 unsigned TargetTransformInfo::getFlatAddressSpace() const {
300 return TTIImpl->getFlatAddressSpace();
303 bool TargetTransformInfo::collectFlatAddressOperands(
304 SmallVectorImpl<int> &OpIndexes, Intrinsic::ID IID) const {
305 return TTIImpl->collectFlatAddressOperands(OpIndexes, IID);
308 bool TargetTransformInfo::isNoopAddrSpaceCast(unsigned FromAS,
309 unsigned ToAS) const {
310 return TTIImpl->isNoopAddrSpaceCast(FromAS, ToAS);
313 bool TargetTransformInfo::canHaveNonUndefGlobalInitializerInAddressSpace(
314 unsigned AS) const {
315 return TTIImpl->canHaveNonUndefGlobalInitializerInAddressSpace(AS);
318 unsigned TargetTransformInfo::getAssumedAddrSpace(const Value *V) const {
319 return TTIImpl->getAssumedAddrSpace(V);
322 bool TargetTransformInfo::isSingleThreaded() const {
323 return TTIImpl->isSingleThreaded();
326 std::pair<const Value *, unsigned>
327 TargetTransformInfo::getPredicatedAddrSpace(const Value *V) const {
328 return TTIImpl->getPredicatedAddrSpace(V);
331 Value *TargetTransformInfo::rewriteIntrinsicWithAddressSpace(
332 IntrinsicInst *II, Value *OldV, Value *NewV) const {
333 return TTIImpl->rewriteIntrinsicWithAddressSpace(II, OldV, NewV);
336 bool TargetTransformInfo::isLoweredToCall(const Function *F) const {
337 return TTIImpl->isLoweredToCall(F);
340 bool TargetTransformInfo::isHardwareLoopProfitable(
341 Loop *L, ScalarEvolution &SE, AssumptionCache &AC,
342 TargetLibraryInfo *LibInfo, HardwareLoopInfo &HWLoopInfo) const {
343 return TTIImpl->isHardwareLoopProfitable(L, SE, AC, LibInfo, HWLoopInfo);
346 bool TargetTransformInfo::preferPredicateOverEpilogue(
347 TailFoldingInfo *TFI) const {
348 return TTIImpl->preferPredicateOverEpilogue(TFI);
351 TailFoldingStyle TargetTransformInfo::getPreferredTailFoldingStyle(
352 bool IVUpdateMayOverflow) const {
353 return TTIImpl->getPreferredTailFoldingStyle(IVUpdateMayOverflow);
356 std::optional<Instruction *>
357 TargetTransformInfo::instCombineIntrinsic(InstCombiner &IC,
358 IntrinsicInst &II) const {
359 return TTIImpl->instCombineIntrinsic(IC, II);
362 std::optional<Value *> TargetTransformInfo::simplifyDemandedUseBitsIntrinsic(
363 InstCombiner &IC, IntrinsicInst &II, APInt DemandedMask, KnownBits &Known,
364 bool &KnownBitsComputed) const {
365 return TTIImpl->simplifyDemandedUseBitsIntrinsic(IC, II, DemandedMask, Known,
366 KnownBitsComputed);
369 std::optional<Value *> TargetTransformInfo::simplifyDemandedVectorEltsIntrinsic(
370 InstCombiner &IC, IntrinsicInst &II, APInt DemandedElts, APInt &UndefElts,
371 APInt &UndefElts2, APInt &UndefElts3,
372 std::function<void(Instruction *, unsigned, APInt, APInt &)>
373 SimplifyAndSetOp) const {
374 return TTIImpl->simplifyDemandedVectorEltsIntrinsic(
375 IC, II, DemandedElts, UndefElts, UndefElts2, UndefElts3,
376 SimplifyAndSetOp);
379 void TargetTransformInfo::getUnrollingPreferences(
380 Loop *L, ScalarEvolution &SE, UnrollingPreferences &UP,
381 OptimizationRemarkEmitter *ORE) const {
382 return TTIImpl->getUnrollingPreferences(L, SE, UP, ORE);
385 void TargetTransformInfo::getPeelingPreferences(Loop *L, ScalarEvolution &SE,
386 PeelingPreferences &PP) const {
387 return TTIImpl->getPeelingPreferences(L, SE, PP);
390 bool TargetTransformInfo::isLegalAddImmediate(int64_t Imm) const {
391 return TTIImpl->isLegalAddImmediate(Imm);
394 bool TargetTransformInfo::isLegalICmpImmediate(int64_t Imm) const {
395 return TTIImpl->isLegalICmpImmediate(Imm);
398 bool TargetTransformInfo::isLegalAddressingMode(Type *Ty, GlobalValue *BaseGV,
399 int64_t BaseOffset,
400 bool HasBaseReg, int64_t Scale,
401 unsigned AddrSpace,
402 Instruction *I) const {
403 return TTIImpl->isLegalAddressingMode(Ty, BaseGV, BaseOffset, HasBaseReg,
404 Scale, AddrSpace, I);
407 bool TargetTransformInfo::isLSRCostLess(const LSRCost &C1,
408 const LSRCost &C2) const {
409 return TTIImpl->isLSRCostLess(C1, C2);
412 bool TargetTransformInfo::isNumRegsMajorCostOfLSR() const {
413 return TTIImpl->isNumRegsMajorCostOfLSR();
416 bool TargetTransformInfo::isProfitableLSRChainElement(Instruction *I) const {
417 return TTIImpl->isProfitableLSRChainElement(I);
420 bool TargetTransformInfo::canMacroFuseCmp() const {
421 return TTIImpl->canMacroFuseCmp();
424 bool TargetTransformInfo::canSaveCmp(Loop *L, BranchInst **BI,
425 ScalarEvolution *SE, LoopInfo *LI,
426 DominatorTree *DT, AssumptionCache *AC,
427 TargetLibraryInfo *LibInfo) const {
428 return TTIImpl->canSaveCmp(L, BI, SE, LI, DT, AC, LibInfo);
431 TTI::AddressingModeKind
432 TargetTransformInfo::getPreferredAddressingMode(const Loop *L,
433 ScalarEvolution *SE) const {
434 return TTIImpl->getPreferredAddressingMode(L, SE);
437 bool TargetTransformInfo::isLegalMaskedStore(Type *DataType,
438 Align Alignment) const {
439 return TTIImpl->isLegalMaskedStore(DataType, Alignment);
442 bool TargetTransformInfo::isLegalMaskedLoad(Type *DataType,
443 Align Alignment) const {
444 return TTIImpl->isLegalMaskedLoad(DataType, Alignment);
447 bool TargetTransformInfo::isLegalNTStore(Type *DataType,
448 Align Alignment) const {
449 return TTIImpl->isLegalNTStore(DataType, Alignment);
452 bool TargetTransformInfo::isLegalNTLoad(Type *DataType, Align Alignment) const {
453 return TTIImpl->isLegalNTLoad(DataType, Alignment);
456 bool TargetTransformInfo::isLegalBroadcastLoad(Type *ElementTy,
457 ElementCount NumElements) const {
458 return TTIImpl->isLegalBroadcastLoad(ElementTy, NumElements);
461 bool TargetTransformInfo::isLegalMaskedGather(Type *DataType,
462 Align Alignment) const {
463 return TTIImpl->isLegalMaskedGather(DataType, Alignment);
466 bool TargetTransformInfo::isLegalAltInstr(
467 VectorType *VecTy, unsigned Opcode0, unsigned Opcode1,
468 const SmallBitVector &OpcodeMask) const {
469 return TTIImpl->isLegalAltInstr(VecTy, Opcode0, Opcode1, OpcodeMask);
472 bool TargetTransformInfo::isLegalMaskedScatter(Type *DataType,
473 Align Alignment) const {
474 return TTIImpl->isLegalMaskedScatter(DataType, Alignment);
477 bool TargetTransformInfo::forceScalarizeMaskedGather(VectorType *DataType,
478 Align Alignment) const {
479 return TTIImpl->forceScalarizeMaskedGather(DataType, Alignment);
482 bool TargetTransformInfo::forceScalarizeMaskedScatter(VectorType *DataType,
483 Align Alignment) const {
484 return TTIImpl->forceScalarizeMaskedScatter(DataType, Alignment);
487 bool TargetTransformInfo::isLegalMaskedCompressStore(Type *DataType) const {
488 return TTIImpl->isLegalMaskedCompressStore(DataType);
491 bool TargetTransformInfo::isLegalMaskedExpandLoad(Type *DataType) const {
492 return TTIImpl->isLegalMaskedExpandLoad(DataType);
495 bool TargetTransformInfo::enableOrderedReductions() const {
496 return TTIImpl->enableOrderedReductions();
499 bool TargetTransformInfo::hasDivRemOp(Type *DataType, bool IsSigned) const {
500 return TTIImpl->hasDivRemOp(DataType, IsSigned);
503 bool TargetTransformInfo::hasVolatileVariant(Instruction *I,
504 unsigned AddrSpace) const {
505 return TTIImpl->hasVolatileVariant(I, AddrSpace);
508 bool TargetTransformInfo::prefersVectorizedAddressing() const {
509 return TTIImpl->prefersVectorizedAddressing();
512 InstructionCost TargetTransformInfo::getScalingFactorCost(
513 Type *Ty, GlobalValue *BaseGV, int64_t BaseOffset, bool HasBaseReg,
514 int64_t Scale, unsigned AddrSpace) const {
515 InstructionCost Cost = TTIImpl->getScalingFactorCost(
516 Ty, BaseGV, BaseOffset, HasBaseReg, Scale, AddrSpace);
517 assert(Cost >= 0 && "TTI should not produce negative costs!");
518 return Cost;
521 bool TargetTransformInfo::LSRWithInstrQueries() const {
522 return TTIImpl->LSRWithInstrQueries();
525 bool TargetTransformInfo::isTruncateFree(Type *Ty1, Type *Ty2) const {
526 return TTIImpl->isTruncateFree(Ty1, Ty2);
529 bool TargetTransformInfo::isProfitableToHoist(Instruction *I) const {
530 return TTIImpl->isProfitableToHoist(I);
533 bool TargetTransformInfo::useAA() const { return TTIImpl->useAA(); }
535 bool TargetTransformInfo::isTypeLegal(Type *Ty) const {
536 return TTIImpl->isTypeLegal(Ty);
539 unsigned TargetTransformInfo::getRegUsageForType(Type *Ty) const {
540 return TTIImpl->getRegUsageForType(Ty);
543 bool TargetTransformInfo::shouldBuildLookupTables() const {
544 return TTIImpl->shouldBuildLookupTables();
547 bool TargetTransformInfo::shouldBuildLookupTablesForConstant(
548 Constant *C) const {
549 return TTIImpl->shouldBuildLookupTablesForConstant(C);
552 bool TargetTransformInfo::shouldBuildRelLookupTables() const {
553 return TTIImpl->shouldBuildRelLookupTables();
556 bool TargetTransformInfo::useColdCCForColdCall(Function &F) const {
557 return TTIImpl->useColdCCForColdCall(F);
560 InstructionCost TargetTransformInfo::getScalarizationOverhead(
561 VectorType *Ty, const APInt &DemandedElts, bool Insert, bool Extract,
562 TTI::TargetCostKind CostKind) const {
563 return TTIImpl->getScalarizationOverhead(Ty, DemandedElts, Insert, Extract,
564 CostKind);
567 InstructionCost TargetTransformInfo::getOperandsScalarizationOverhead(
568 ArrayRef<const Value *> Args, ArrayRef<Type *> Tys,
569 TTI::TargetCostKind CostKind) const {
570 return TTIImpl->getOperandsScalarizationOverhead(Args, Tys, CostKind);
573 bool TargetTransformInfo::supportsEfficientVectorElementLoadStore() const {
574 return TTIImpl->supportsEfficientVectorElementLoadStore();
577 bool TargetTransformInfo::supportsTailCalls() const {
578 return TTIImpl->supportsTailCalls();
581 bool TargetTransformInfo::supportsTailCallFor(const CallBase *CB) const {
582 return TTIImpl->supportsTailCallFor(CB);
585 bool TargetTransformInfo::enableAggressiveInterleaving(
586 bool LoopHasReductions) const {
587 return TTIImpl->enableAggressiveInterleaving(LoopHasReductions);
590 TargetTransformInfo::MemCmpExpansionOptions
591 TargetTransformInfo::enableMemCmpExpansion(bool OptSize, bool IsZeroCmp) const {
592 return TTIImpl->enableMemCmpExpansion(OptSize, IsZeroCmp);
595 bool TargetTransformInfo::enableSelectOptimize() const {
596 return TTIImpl->enableSelectOptimize();
599 bool TargetTransformInfo::enableInterleavedAccessVectorization() const {
600 return TTIImpl->enableInterleavedAccessVectorization();
603 bool TargetTransformInfo::enableMaskedInterleavedAccessVectorization() const {
604 return TTIImpl->enableMaskedInterleavedAccessVectorization();
607 bool TargetTransformInfo::isFPVectorizationPotentiallyUnsafe() const {
608 return TTIImpl->isFPVectorizationPotentiallyUnsafe();
611 bool
612 TargetTransformInfo::allowsMisalignedMemoryAccesses(LLVMContext &Context,
613 unsigned BitWidth,
614 unsigned AddressSpace,
615 Align Alignment,
616 unsigned *Fast) const {
617 return TTIImpl->allowsMisalignedMemoryAccesses(Context, BitWidth,
618 AddressSpace, Alignment, Fast);
621 TargetTransformInfo::PopcntSupportKind
622 TargetTransformInfo::getPopcntSupport(unsigned IntTyWidthInBit) const {
623 return TTIImpl->getPopcntSupport(IntTyWidthInBit);
626 bool TargetTransformInfo::haveFastSqrt(Type *Ty) const {
627 return TTIImpl->haveFastSqrt(Ty);
630 bool TargetTransformInfo::isExpensiveToSpeculativelyExecute(
631 const Instruction *I) const {
632 return TTIImpl->isExpensiveToSpeculativelyExecute(I);
635 bool TargetTransformInfo::isFCmpOrdCheaperThanFCmpZero(Type *Ty) const {
636 return TTIImpl->isFCmpOrdCheaperThanFCmpZero(Ty);
639 InstructionCost TargetTransformInfo::getFPOpCost(Type *Ty) const {
640 InstructionCost Cost = TTIImpl->getFPOpCost(Ty);
641 assert(Cost >= 0 && "TTI should not produce negative costs!");
642 return Cost;
645 InstructionCost TargetTransformInfo::getIntImmCodeSizeCost(unsigned Opcode,
646 unsigned Idx,
647 const APInt &Imm,
648 Type *Ty) const {
649 InstructionCost Cost = TTIImpl->getIntImmCodeSizeCost(Opcode, Idx, Imm, Ty);
650 assert(Cost >= 0 && "TTI should not produce negative costs!");
651 return Cost;
654 InstructionCost
655 TargetTransformInfo::getIntImmCost(const APInt &Imm, Type *Ty,
656 TTI::TargetCostKind CostKind) const {
657 InstructionCost Cost = TTIImpl->getIntImmCost(Imm, Ty, CostKind);
658 assert(Cost >= 0 && "TTI should not produce negative costs!");
659 return Cost;
662 InstructionCost TargetTransformInfo::getIntImmCostInst(
663 unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty,
664 TTI::TargetCostKind CostKind, Instruction *Inst) const {
665 InstructionCost Cost =
666 TTIImpl->getIntImmCostInst(Opcode, Idx, Imm, Ty, CostKind, Inst);
667 assert(Cost >= 0 && "TTI should not produce negative costs!");
668 return Cost;
671 InstructionCost
672 TargetTransformInfo::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
673 const APInt &Imm, Type *Ty,
674 TTI::TargetCostKind CostKind) const {
675 InstructionCost Cost =
676 TTIImpl->getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
677 assert(Cost >= 0 && "TTI should not produce negative costs!");
678 return Cost;
681 unsigned TargetTransformInfo::getNumberOfRegisters(unsigned ClassID) const {
682 return TTIImpl->getNumberOfRegisters(ClassID);
685 unsigned TargetTransformInfo::getRegisterClassForType(bool Vector,
686 Type *Ty) const {
687 return TTIImpl->getRegisterClassForType(Vector, Ty);
690 const char *TargetTransformInfo::getRegisterClassName(unsigned ClassID) const {
691 return TTIImpl->getRegisterClassName(ClassID);
694 TypeSize TargetTransformInfo::getRegisterBitWidth(
695 TargetTransformInfo::RegisterKind K) const {
696 return TTIImpl->getRegisterBitWidth(K);
699 unsigned TargetTransformInfo::getMinVectorRegisterBitWidth() const {
700 return TTIImpl->getMinVectorRegisterBitWidth();
703 std::optional<unsigned> TargetTransformInfo::getMaxVScale() const {
704 return TTIImpl->getMaxVScale();
707 std::optional<unsigned> TargetTransformInfo::getVScaleForTuning() const {
708 return TTIImpl->getVScaleForTuning();
711 bool TargetTransformInfo::isVScaleKnownToBeAPowerOfTwo() const {
712 return TTIImpl->isVScaleKnownToBeAPowerOfTwo();
715 bool TargetTransformInfo::shouldMaximizeVectorBandwidth(
716 TargetTransformInfo::RegisterKind K) const {
717 return TTIImpl->shouldMaximizeVectorBandwidth(K);
720 ElementCount TargetTransformInfo::getMinimumVF(unsigned ElemWidth,
721 bool IsScalable) const {
722 return TTIImpl->getMinimumVF(ElemWidth, IsScalable);
725 unsigned TargetTransformInfo::getMaximumVF(unsigned ElemWidth,
726 unsigned Opcode) const {
727 return TTIImpl->getMaximumVF(ElemWidth, Opcode);
730 unsigned TargetTransformInfo::getStoreMinimumVF(unsigned VF, Type *ScalarMemTy,
731 Type *ScalarValTy) const {
732 return TTIImpl->getStoreMinimumVF(VF, ScalarMemTy, ScalarValTy);
735 bool TargetTransformInfo::shouldConsiderAddressTypePromotion(
736 const Instruction &I, bool &AllowPromotionWithoutCommonHeader) const {
737 return TTIImpl->shouldConsiderAddressTypePromotion(
738 I, AllowPromotionWithoutCommonHeader);
741 unsigned TargetTransformInfo::getCacheLineSize() const {
742 return CacheLineSize.getNumOccurrences() > 0 ? CacheLineSize
743 : TTIImpl->getCacheLineSize();
746 std::optional<unsigned>
747 TargetTransformInfo::getCacheSize(CacheLevel Level) const {
748 return TTIImpl->getCacheSize(Level);
751 std::optional<unsigned>
752 TargetTransformInfo::getCacheAssociativity(CacheLevel Level) const {
753 return TTIImpl->getCacheAssociativity(Level);
756 unsigned TargetTransformInfo::getPrefetchDistance() const {
757 return TTIImpl->getPrefetchDistance();
760 unsigned TargetTransformInfo::getMinPrefetchStride(
761 unsigned NumMemAccesses, unsigned NumStridedMemAccesses,
762 unsigned NumPrefetches, bool HasCall) const {
763 return TTIImpl->getMinPrefetchStride(NumMemAccesses, NumStridedMemAccesses,
764 NumPrefetches, HasCall);
767 unsigned TargetTransformInfo::getMaxPrefetchIterationsAhead() const {
768 return TTIImpl->getMaxPrefetchIterationsAhead();
771 bool TargetTransformInfo::enableWritePrefetching() const {
772 return TTIImpl->enableWritePrefetching();
775 bool TargetTransformInfo::shouldPrefetchAddressSpace(unsigned AS) const {
776 return TTIImpl->shouldPrefetchAddressSpace(AS);
779 unsigned TargetTransformInfo::getMaxInterleaveFactor(ElementCount VF) const {
780 return TTIImpl->getMaxInterleaveFactor(VF);
783 TargetTransformInfo::OperandValueInfo
784 TargetTransformInfo::getOperandInfo(const Value *V) {
785 OperandValueKind OpInfo = OK_AnyValue;
786 OperandValueProperties OpProps = OP_None;
788 if (isa<ConstantInt>(V) || isa<ConstantFP>(V)) {
789 if (const auto *CI = dyn_cast<ConstantInt>(V)) {
790 if (CI->getValue().isPowerOf2())
791 OpProps = OP_PowerOf2;
792 else if (CI->getValue().isNegatedPowerOf2())
793 OpProps = OP_NegatedPowerOf2;
795 return {OK_UniformConstantValue, OpProps};
798 // A broadcast shuffle creates a uniform value.
799 // TODO: Add support for non-zero index broadcasts.
800 // TODO: Add support for different source vector width.
801 if (const auto *ShuffleInst = dyn_cast<ShuffleVectorInst>(V))
802 if (ShuffleInst->isZeroEltSplat())
803 OpInfo = OK_UniformValue;
805 const Value *Splat = getSplatValue(V);
807 // Check for a splat of a constant or for a non uniform vector of constants
808 // and check if the constant(s) are all powers of two.
809 if (isa<ConstantVector>(V) || isa<ConstantDataVector>(V)) {
810 OpInfo = OK_NonUniformConstantValue;
811 if (Splat) {
812 OpInfo = OK_UniformConstantValue;
813 if (auto *CI = dyn_cast<ConstantInt>(Splat)) {
814 if (CI->getValue().isPowerOf2())
815 OpProps = OP_PowerOf2;
816 else if (CI->getValue().isNegatedPowerOf2())
817 OpProps = OP_NegatedPowerOf2;
819 } else if (const auto *CDS = dyn_cast<ConstantDataSequential>(V)) {
820 bool AllPow2 = true, AllNegPow2 = true;
821 for (unsigned I = 0, E = CDS->getNumElements(); I != E; ++I) {
822 if (auto *CI = dyn_cast<ConstantInt>(CDS->getElementAsConstant(I))) {
823 AllPow2 &= CI->getValue().isPowerOf2();
824 AllNegPow2 &= CI->getValue().isNegatedPowerOf2();
825 if (AllPow2 || AllNegPow2)
826 continue;
828 AllPow2 = AllNegPow2 = false;
829 break;
831 OpProps = AllPow2 ? OP_PowerOf2 : OpProps;
832 OpProps = AllNegPow2 ? OP_NegatedPowerOf2 : OpProps;
836 // Check for a splat of a uniform value. This is not loop aware, so return
837 // true only for the obviously uniform cases (argument, globalvalue)
838 if (Splat && (isa<Argument>(Splat) || isa<GlobalValue>(Splat)))
839 OpInfo = OK_UniformValue;
841 return {OpInfo, OpProps};
844 InstructionCost TargetTransformInfo::getArithmeticInstrCost(
845 unsigned Opcode, Type *Ty, TTI::TargetCostKind CostKind,
846 OperandValueInfo Op1Info, OperandValueInfo Op2Info,
847 ArrayRef<const Value *> Args, const Instruction *CxtI) const {
848 InstructionCost Cost =
849 TTIImpl->getArithmeticInstrCost(Opcode, Ty, CostKind,
850 Op1Info, Op2Info,
851 Args, CxtI);
852 assert(Cost >= 0 && "TTI should not produce negative costs!");
853 return Cost;
856 InstructionCost TargetTransformInfo::getShuffleCost(
857 ShuffleKind Kind, VectorType *Ty, ArrayRef<int> Mask,
858 TTI::TargetCostKind CostKind, int Index, VectorType *SubTp,
859 ArrayRef<const Value *> Args) const {
860 InstructionCost Cost =
861 TTIImpl->getShuffleCost(Kind, Ty, Mask, CostKind, Index, SubTp, Args);
862 assert(Cost >= 0 && "TTI should not produce negative costs!");
863 return Cost;
866 TTI::CastContextHint
867 TargetTransformInfo::getCastContextHint(const Instruction *I) {
868 if (!I)
869 return CastContextHint::None;
871 auto getLoadStoreKind = [](const Value *V, unsigned LdStOp, unsigned MaskedOp,
872 unsigned GatScatOp) {
873 const Instruction *I = dyn_cast<Instruction>(V);
874 if (!I)
875 return CastContextHint::None;
877 if (I->getOpcode() == LdStOp)
878 return CastContextHint::Normal;
880 if (const IntrinsicInst *II = dyn_cast<IntrinsicInst>(I)) {
881 if (II->getIntrinsicID() == MaskedOp)
882 return TTI::CastContextHint::Masked;
883 if (II->getIntrinsicID() == GatScatOp)
884 return TTI::CastContextHint::GatherScatter;
887 return TTI::CastContextHint::None;
890 switch (I->getOpcode()) {
891 case Instruction::ZExt:
892 case Instruction::SExt:
893 case Instruction::FPExt:
894 return getLoadStoreKind(I->getOperand(0), Instruction::Load,
895 Intrinsic::masked_load, Intrinsic::masked_gather);
896 case Instruction::Trunc:
897 case Instruction::FPTrunc:
898 if (I->hasOneUse())
899 return getLoadStoreKind(*I->user_begin(), Instruction::Store,
900 Intrinsic::masked_store,
901 Intrinsic::masked_scatter);
902 break;
903 default:
904 return CastContextHint::None;
907 return TTI::CastContextHint::None;
910 InstructionCost TargetTransformInfo::getCastInstrCost(
911 unsigned Opcode, Type *Dst, Type *Src, CastContextHint CCH,
912 TTI::TargetCostKind CostKind, const Instruction *I) const {
913 assert((I == nullptr || I->getOpcode() == Opcode) &&
914 "Opcode should reflect passed instruction.");
915 InstructionCost Cost =
916 TTIImpl->getCastInstrCost(Opcode, Dst, Src, CCH, CostKind, I);
917 assert(Cost >= 0 && "TTI should not produce negative costs!");
918 return Cost;
921 InstructionCost TargetTransformInfo::getExtractWithExtendCost(
922 unsigned Opcode, Type *Dst, VectorType *VecTy, unsigned Index) const {
923 InstructionCost Cost =
924 TTIImpl->getExtractWithExtendCost(Opcode, Dst, VecTy, Index);
925 assert(Cost >= 0 && "TTI should not produce negative costs!");
926 return Cost;
929 InstructionCost TargetTransformInfo::getCFInstrCost(
930 unsigned Opcode, TTI::TargetCostKind CostKind, const Instruction *I) const {
931 assert((I == nullptr || I->getOpcode() == Opcode) &&
932 "Opcode should reflect passed instruction.");
933 InstructionCost Cost = TTIImpl->getCFInstrCost(Opcode, CostKind, I);
934 assert(Cost >= 0 && "TTI should not produce negative costs!");
935 return Cost;
938 InstructionCost TargetTransformInfo::getCmpSelInstrCost(
939 unsigned Opcode, Type *ValTy, Type *CondTy, CmpInst::Predicate VecPred,
940 TTI::TargetCostKind CostKind, const Instruction *I) const {
941 assert((I == nullptr || I->getOpcode() == Opcode) &&
942 "Opcode should reflect passed instruction.");
943 InstructionCost Cost =
944 TTIImpl->getCmpSelInstrCost(Opcode, ValTy, CondTy, VecPred, CostKind, I);
945 assert(Cost >= 0 && "TTI should not produce negative costs!");
946 return Cost;
949 InstructionCost TargetTransformInfo::getVectorInstrCost(
950 unsigned Opcode, Type *Val, TTI::TargetCostKind CostKind, unsigned Index,
951 Value *Op0, Value *Op1) const {
952 // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
953 // This is mentioned in the interface description and respected by all
954 // callers, but never asserted upon.
955 InstructionCost Cost =
956 TTIImpl->getVectorInstrCost(Opcode, Val, CostKind, Index, Op0, Op1);
957 assert(Cost >= 0 && "TTI should not produce negative costs!");
958 return Cost;
961 InstructionCost
962 TargetTransformInfo::getVectorInstrCost(const Instruction &I, Type *Val,
963 TTI::TargetCostKind CostKind,
964 unsigned Index) const {
965 // FIXME: Assert that Opcode is either InsertElement or ExtractElement.
966 // This is mentioned in the interface description and respected by all
967 // callers, but never asserted upon.
968 InstructionCost Cost = TTIImpl->getVectorInstrCost(I, Val, CostKind, Index);
969 assert(Cost >= 0 && "TTI should not produce negative costs!");
970 return Cost;
973 InstructionCost TargetTransformInfo::getReplicationShuffleCost(
974 Type *EltTy, int ReplicationFactor, int VF, const APInt &DemandedDstElts,
975 TTI::TargetCostKind CostKind) {
976 InstructionCost Cost = TTIImpl->getReplicationShuffleCost(
977 EltTy, ReplicationFactor, VF, DemandedDstElts, CostKind);
978 assert(Cost >= 0 && "TTI should not produce negative costs!");
979 return Cost;
982 InstructionCost TargetTransformInfo::getMemoryOpCost(
983 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
984 TTI::TargetCostKind CostKind, TTI::OperandValueInfo OpInfo,
985 const Instruction *I) const {
986 assert((I == nullptr || I->getOpcode() == Opcode) &&
987 "Opcode should reflect passed instruction.");
988 InstructionCost Cost = TTIImpl->getMemoryOpCost(
989 Opcode, Src, Alignment, AddressSpace, CostKind, OpInfo, I);
990 assert(Cost >= 0 && "TTI should not produce negative costs!");
991 return Cost;
994 InstructionCost TargetTransformInfo::getMaskedMemoryOpCost(
995 unsigned Opcode, Type *Src, Align Alignment, unsigned AddressSpace,
996 TTI::TargetCostKind CostKind) const {
997 InstructionCost Cost = TTIImpl->getMaskedMemoryOpCost(Opcode, Src, Alignment,
998 AddressSpace, CostKind);
999 assert(Cost >= 0 && "TTI should not produce negative costs!");
1000 return Cost;
1003 InstructionCost TargetTransformInfo::getGatherScatterOpCost(
1004 unsigned Opcode, Type *DataTy, const Value *Ptr, bool VariableMask,
1005 Align Alignment, TTI::TargetCostKind CostKind, const Instruction *I) const {
1006 InstructionCost Cost = TTIImpl->getGatherScatterOpCost(
1007 Opcode, DataTy, Ptr, VariableMask, Alignment, CostKind, I);
1008 assert(Cost >= 0 && "TTI should not produce negative costs!");
1009 return Cost;
1012 InstructionCost TargetTransformInfo::getInterleavedMemoryOpCost(
1013 unsigned Opcode, Type *VecTy, unsigned Factor, ArrayRef<unsigned> Indices,
1014 Align Alignment, unsigned AddressSpace, TTI::TargetCostKind CostKind,
1015 bool UseMaskForCond, bool UseMaskForGaps) const {
1016 InstructionCost Cost = TTIImpl->getInterleavedMemoryOpCost(
1017 Opcode, VecTy, Factor, Indices, Alignment, AddressSpace, CostKind,
1018 UseMaskForCond, UseMaskForGaps);
1019 assert(Cost >= 0 && "TTI should not produce negative costs!");
1020 return Cost;
1023 InstructionCost
1024 TargetTransformInfo::getIntrinsicInstrCost(const IntrinsicCostAttributes &ICA,
1025 TTI::TargetCostKind CostKind) const {
1026 InstructionCost Cost = TTIImpl->getIntrinsicInstrCost(ICA, CostKind);
1027 assert(Cost >= 0 && "TTI should not produce negative costs!");
1028 return Cost;
1031 InstructionCost
1032 TargetTransformInfo::getCallInstrCost(Function *F, Type *RetTy,
1033 ArrayRef<Type *> Tys,
1034 TTI::TargetCostKind CostKind) const {
1035 InstructionCost Cost = TTIImpl->getCallInstrCost(F, RetTy, Tys, CostKind);
1036 assert(Cost >= 0 && "TTI should not produce negative costs!");
1037 return Cost;
1040 unsigned TargetTransformInfo::getNumberOfParts(Type *Tp) const {
1041 return TTIImpl->getNumberOfParts(Tp);
1044 InstructionCost
1045 TargetTransformInfo::getAddressComputationCost(Type *Tp, ScalarEvolution *SE,
1046 const SCEV *Ptr) const {
1047 InstructionCost Cost = TTIImpl->getAddressComputationCost(Tp, SE, Ptr);
1048 assert(Cost >= 0 && "TTI should not produce negative costs!");
1049 return Cost;
1052 InstructionCost TargetTransformInfo::getMemcpyCost(const Instruction *I) const {
1053 InstructionCost Cost = TTIImpl->getMemcpyCost(I);
1054 assert(Cost >= 0 && "TTI should not produce negative costs!");
1055 return Cost;
1058 uint64_t TargetTransformInfo::getMaxMemIntrinsicInlineSizeThreshold() const {
1059 return TTIImpl->getMaxMemIntrinsicInlineSizeThreshold();
1062 InstructionCost TargetTransformInfo::getArithmeticReductionCost(
1063 unsigned Opcode, VectorType *Ty, std::optional<FastMathFlags> FMF,
1064 TTI::TargetCostKind CostKind) const {
1065 InstructionCost Cost =
1066 TTIImpl->getArithmeticReductionCost(Opcode, Ty, FMF, CostKind);
1067 assert(Cost >= 0 && "TTI should not produce negative costs!");
1068 return Cost;
1071 InstructionCost TargetTransformInfo::getMinMaxReductionCost(
1072 Intrinsic::ID IID, VectorType *Ty, FastMathFlags FMF,
1073 TTI::TargetCostKind CostKind) const {
1074 InstructionCost Cost =
1075 TTIImpl->getMinMaxReductionCost(IID, Ty, FMF, CostKind);
1076 assert(Cost >= 0 && "TTI should not produce negative costs!");
1077 return Cost;
1080 InstructionCost TargetTransformInfo::getExtendedReductionCost(
1081 unsigned Opcode, bool IsUnsigned, Type *ResTy, VectorType *Ty,
1082 FastMathFlags FMF, TTI::TargetCostKind CostKind) const {
1083 return TTIImpl->getExtendedReductionCost(Opcode, IsUnsigned, ResTy, Ty, FMF,
1084 CostKind);
1087 InstructionCost TargetTransformInfo::getMulAccReductionCost(
1088 bool IsUnsigned, Type *ResTy, VectorType *Ty,
1089 TTI::TargetCostKind CostKind) const {
1090 return TTIImpl->getMulAccReductionCost(IsUnsigned, ResTy, Ty, CostKind);
1093 InstructionCost
1094 TargetTransformInfo::getCostOfKeepingLiveOverCall(ArrayRef<Type *> Tys) const {
1095 return TTIImpl->getCostOfKeepingLiveOverCall(Tys);
1098 bool TargetTransformInfo::getTgtMemIntrinsic(IntrinsicInst *Inst,
1099 MemIntrinsicInfo &Info) const {
1100 return TTIImpl->getTgtMemIntrinsic(Inst, Info);
1103 unsigned TargetTransformInfo::getAtomicMemIntrinsicMaxElementSize() const {
1104 return TTIImpl->getAtomicMemIntrinsicMaxElementSize();
1107 Value *TargetTransformInfo::getOrCreateResultFromMemIntrinsic(
1108 IntrinsicInst *Inst, Type *ExpectedType) const {
1109 return TTIImpl->getOrCreateResultFromMemIntrinsic(Inst, ExpectedType);
1112 Type *TargetTransformInfo::getMemcpyLoopLoweringType(
1113 LLVMContext &Context, Value *Length, unsigned SrcAddrSpace,
1114 unsigned DestAddrSpace, unsigned SrcAlign, unsigned DestAlign,
1115 std::optional<uint32_t> AtomicElementSize) const {
1116 return TTIImpl->getMemcpyLoopLoweringType(Context, Length, SrcAddrSpace,
1117 DestAddrSpace, SrcAlign, DestAlign,
1118 AtomicElementSize);
1121 void TargetTransformInfo::getMemcpyLoopResidualLoweringType(
1122 SmallVectorImpl<Type *> &OpsOut, LLVMContext &Context,
1123 unsigned RemainingBytes, unsigned SrcAddrSpace, unsigned DestAddrSpace,
1124 unsigned SrcAlign, unsigned DestAlign,
1125 std::optional<uint32_t> AtomicCpySize) const {
1126 TTIImpl->getMemcpyLoopResidualLoweringType(
1127 OpsOut, Context, RemainingBytes, SrcAddrSpace, DestAddrSpace, SrcAlign,
1128 DestAlign, AtomicCpySize);
1131 bool TargetTransformInfo::areInlineCompatible(const Function *Caller,
1132 const Function *Callee) const {
1133 return TTIImpl->areInlineCompatible(Caller, Callee);
1136 unsigned
1137 TargetTransformInfo::getInlineCallPenalty(const Function *F,
1138 const CallBase &Call,
1139 unsigned DefaultCallPenalty) const {
1140 return TTIImpl->getInlineCallPenalty(F, Call, DefaultCallPenalty);
1143 bool TargetTransformInfo::areTypesABICompatible(
1144 const Function *Caller, const Function *Callee,
1145 const ArrayRef<Type *> &Types) const {
1146 return TTIImpl->areTypesABICompatible(Caller, Callee, Types);
1149 bool TargetTransformInfo::isIndexedLoadLegal(MemIndexedMode Mode,
1150 Type *Ty) const {
1151 return TTIImpl->isIndexedLoadLegal(Mode, Ty);
1154 bool TargetTransformInfo::isIndexedStoreLegal(MemIndexedMode Mode,
1155 Type *Ty) const {
1156 return TTIImpl->isIndexedStoreLegal(Mode, Ty);
1159 unsigned TargetTransformInfo::getLoadStoreVecRegBitWidth(unsigned AS) const {
1160 return TTIImpl->getLoadStoreVecRegBitWidth(AS);
1163 bool TargetTransformInfo::isLegalToVectorizeLoad(LoadInst *LI) const {
1164 return TTIImpl->isLegalToVectorizeLoad(LI);
1167 bool TargetTransformInfo::isLegalToVectorizeStore(StoreInst *SI) const {
1168 return TTIImpl->isLegalToVectorizeStore(SI);
1171 bool TargetTransformInfo::isLegalToVectorizeLoadChain(
1172 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1173 return TTIImpl->isLegalToVectorizeLoadChain(ChainSizeInBytes, Alignment,
1174 AddrSpace);
1177 bool TargetTransformInfo::isLegalToVectorizeStoreChain(
1178 unsigned ChainSizeInBytes, Align Alignment, unsigned AddrSpace) const {
1179 return TTIImpl->isLegalToVectorizeStoreChain(ChainSizeInBytes, Alignment,
1180 AddrSpace);
1183 bool TargetTransformInfo::isLegalToVectorizeReduction(
1184 const RecurrenceDescriptor &RdxDesc, ElementCount VF) const {
1185 return TTIImpl->isLegalToVectorizeReduction(RdxDesc, VF);
1188 bool TargetTransformInfo::isElementTypeLegalForScalableVector(Type *Ty) const {
1189 return TTIImpl->isElementTypeLegalForScalableVector(Ty);
1192 unsigned TargetTransformInfo::getLoadVectorFactor(unsigned VF,
1193 unsigned LoadSize,
1194 unsigned ChainSizeInBytes,
1195 VectorType *VecTy) const {
1196 return TTIImpl->getLoadVectorFactor(VF, LoadSize, ChainSizeInBytes, VecTy);
1199 unsigned TargetTransformInfo::getStoreVectorFactor(unsigned VF,
1200 unsigned StoreSize,
1201 unsigned ChainSizeInBytes,
1202 VectorType *VecTy) const {
1203 return TTIImpl->getStoreVectorFactor(VF, StoreSize, ChainSizeInBytes, VecTy);
1206 bool TargetTransformInfo::preferInLoopReduction(unsigned Opcode, Type *Ty,
1207 ReductionFlags Flags) const {
1208 return TTIImpl->preferInLoopReduction(Opcode, Ty, Flags);
1211 bool TargetTransformInfo::preferPredicatedReductionSelect(
1212 unsigned Opcode, Type *Ty, ReductionFlags Flags) const {
1213 return TTIImpl->preferPredicatedReductionSelect(Opcode, Ty, Flags);
1216 bool TargetTransformInfo::preferEpilogueVectorization() const {
1217 return TTIImpl->preferEpilogueVectorization();
1220 TargetTransformInfo::VPLegalization
1221 TargetTransformInfo::getVPLegalizationStrategy(const VPIntrinsic &VPI) const {
1222 return TTIImpl->getVPLegalizationStrategy(VPI);
1225 bool TargetTransformInfo::hasArmWideBranch(bool Thumb) const {
1226 return TTIImpl->hasArmWideBranch(Thumb);
1229 unsigned TargetTransformInfo::getMaxNumArgs() const {
1230 return TTIImpl->getMaxNumArgs();
1233 bool TargetTransformInfo::shouldExpandReduction(const IntrinsicInst *II) const {
1234 return TTIImpl->shouldExpandReduction(II);
1237 unsigned TargetTransformInfo::getGISelRematGlobalCost() const {
1238 return TTIImpl->getGISelRematGlobalCost();
1241 unsigned TargetTransformInfo::getMinTripCountTailFoldingThreshold() const {
1242 return TTIImpl->getMinTripCountTailFoldingThreshold();
1245 bool TargetTransformInfo::supportsScalableVectors() const {
1246 return TTIImpl->supportsScalableVectors();
1249 bool TargetTransformInfo::enableScalableVectorization() const {
1250 return TTIImpl->enableScalableVectorization();
1253 bool TargetTransformInfo::hasActiveVectorLength(unsigned Opcode, Type *DataType,
1254 Align Alignment) const {
1255 return TTIImpl->hasActiveVectorLength(Opcode, DataType, Alignment);
1258 TargetTransformInfo::Concept::~Concept() = default;
1260 TargetIRAnalysis::TargetIRAnalysis() : TTICallback(&getDefaultTTI) {}
1262 TargetIRAnalysis::TargetIRAnalysis(
1263 std::function<Result(const Function &)> TTICallback)
1264 : TTICallback(std::move(TTICallback)) {}
1266 TargetIRAnalysis::Result TargetIRAnalysis::run(const Function &F,
1267 FunctionAnalysisManager &) {
1268 return TTICallback(F);
1271 AnalysisKey TargetIRAnalysis::Key;
1273 TargetIRAnalysis::Result TargetIRAnalysis::getDefaultTTI(const Function &F) {
1274 return Result(F.getParent()->getDataLayout());
1277 // Register the basic pass.
1278 INITIALIZE_PASS(TargetTransformInfoWrapperPass, "tti",
1279 "Target Transform Information", false, true)
1280 char TargetTransformInfoWrapperPass::ID = 0;
1282 void TargetTransformInfoWrapperPass::anchor() {}
1284 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass()
1285 : ImmutablePass(ID) {
1286 initializeTargetTransformInfoWrapperPassPass(
1287 *PassRegistry::getPassRegistry());
1290 TargetTransformInfoWrapperPass::TargetTransformInfoWrapperPass(
1291 TargetIRAnalysis TIRA)
1292 : ImmutablePass(ID), TIRA(std::move(TIRA)) {
1293 initializeTargetTransformInfoWrapperPassPass(
1294 *PassRegistry::getPassRegistry());
1297 TargetTransformInfo &TargetTransformInfoWrapperPass::getTTI(const Function &F) {
1298 FunctionAnalysisManager DummyFAM;
1299 TTI = TIRA.run(F, DummyFAM);
1300 return *TTI;
1303 ImmutablePass *
1304 llvm::createTargetTransformInfoWrapperPass(TargetIRAnalysis TIRA) {
1305 return new TargetTransformInfoWrapperPass(std::move(TIRA));