llvm/lib/Target/AVR/AsmParser/AVRAsmParser.cpp

   1 //===---- AVRAsmParser.cpp - Parse AVR assembly to MCInst instructions ----===//
   2 //
   3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
   4 // See https://llvm.org/LICENSE.txt for license information.
   5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
   6 //
   7 //===----------------------------------------------------------------------===//
   8
   9 #include "AVR.h"
  10 #include "AVRRegisterInfo.h"
  11 #include "MCTargetDesc/AVRMCELFStreamer.h"
  12 #include "MCTargetDesc/AVRMCExpr.h"
  13 #include "MCTargetDesc/AVRMCTargetDesc.h"
  14 #include "TargetInfo/AVRTargetInfo.h"
  15
  16 #include "llvm/ADT/APInt.h"
  17 #include "llvm/MC/MCContext.h"
  18 #include "llvm/MC/MCExpr.h"
  19 #include "llvm/MC/MCInst.h"
  20 #include "llvm/MC/MCInstBuilder.h"
  21 #include "llvm/MC/MCParser/MCAsmLexer.h"
  22 #include "llvm/MC/MCParser/MCParsedAsmOperand.h"
  23 #include "llvm/MC/MCParser/MCTargetAsmParser.h"
  24 #include "llvm/MC/MCStreamer.h"
  25 #include "llvm/MC/MCSubtargetInfo.h"
  26 #include "llvm/MC/MCSymbol.h"
  27 #include "llvm/MC/MCValue.h"
  28 #include "llvm/MC/TargetRegistry.h"
  29 #include "llvm/Support/Debug.h"
  30 #include "llvm/Support/MathExtras.h"
  31
  32 #include <array>
  33 #include <sstream>
  34
  35 #define DEBUG_TYPE "avr-asm-parser"
  36
  37 using namespace llvm;
  38
  39 namespace {
  40 /// Parses AVR assembly from a stream.
  41 class AVRAsmParser : public MCTargetAsmParser {
  42   const MCSubtargetInfo &STI;
  43   MCAsmParser &Parser;
  44   const MCRegisterInfo *MRI;
  45   const std::string GENERATE_STUBS = "gs";
  46
  47   enum AVRMatchResultTy {
  48     Match_InvalidRegisterOnTiny = FIRST_TARGET_MATCH_RESULT_TY + 1,
  49   };
  50
  51 #define GET_ASSEMBLER_HEADER
  52 #include "AVRGenAsmMatcher.inc"
  53
  54   bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode,
  55                                OperandVector &Operands, MCStreamer &Out,
  56                                uint64_t &ErrorInfo,
  57                                bool MatchingInlineAsm) override;
  58
  59   bool parseRegister(MCRegister &Reg, SMLoc &StartLoc, SMLoc &EndLoc) override;
  60   ParseStatus tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
  61                                SMLoc &EndLoc) override;
  62
  63   bool ParseInstruction(ParseInstructionInfo &Info, StringRef Name,
  64                         SMLoc NameLoc, OperandVector &Operands) override;
  65
  66   ParseStatus parseDirective(AsmToken DirectiveID) override;
  67
  68   ParseStatus parseMemriOperand(OperandVector &Operands);
  69
  70   bool parseOperand(OperandVector &Operands, bool maybeReg);
  71   int parseRegisterName(unsigned (*matchFn)(StringRef));
  72   int parseRegisterName();
  73   int parseRegister(bool RestoreOnFailure = false);
  74   bool tryParseRegisterOperand(OperandVector &Operands);
  75   bool tryParseExpression(OperandVector &Operands);
  76   bool tryParseRelocExpression(OperandVector &Operands);
  77   void eatComma();
  78
  79   unsigned validateTargetOperandClass(MCParsedAsmOperand &Op,
  80                                       unsigned Kind) override;
  81
  82   unsigned toDREG(unsigned Reg, unsigned From = AVR::sub_lo) {
  83     MCRegisterClass const *Class = &AVRMCRegisterClasses[AVR::DREGSRegClassID];
  84     return MRI->getMatchingSuperReg(Reg, From, Class);
  85   }
  86
  87   bool emit(MCInst &Instruction, SMLoc const &Loc, MCStreamer &Out) const;
  88   bool invalidOperand(SMLoc const &Loc, OperandVector const &Operands,
  89                       uint64_t const &ErrorInfo);
  90   bool missingFeature(SMLoc const &Loc, uint64_t const &ErrorInfo);
  91
  92   ParseStatus parseLiteralValues(unsigned SizeInBytes, SMLoc L);
  93
  94 public:
  95   AVRAsmParser(const MCSubtargetInfo &STI, MCAsmParser &Parser,
  96                const MCInstrInfo &MII, const MCTargetOptions &Options)
  97       : MCTargetAsmParser(Options, STI, MII), STI(STI), Parser(Parser) {
  98     MCAsmParserExtension::Initialize(Parser);
  99     MRI = getContext().getRegisterInfo();
 100
 101     setAvailableFeatures(ComputeAvailableFeatures(STI.getFeatureBits()));
 102   }
 103
 104   MCAsmParser &getParser() const { return Parser; }
 105   MCAsmLexer &getLexer() const { return Parser.getLexer(); }
 106 };
 107
 108 /// An parsed AVR assembly operand.
 109 class AVROperand : public MCParsedAsmOperand {
 110   typedef MCParsedAsmOperand Base;
 111   enum KindTy { k_Immediate, k_Register, k_Token, k_Memri } Kind;
 112
 113 public:
 114   AVROperand(StringRef Tok, SMLoc const &S)
 115       : Kind(k_Token), Tok(Tok), Start(S), End(S) {}
 116   AVROperand(unsigned Reg, SMLoc const &S, SMLoc const &E)
 117       : Kind(k_Register), RegImm({Reg, nullptr}), Start(S), End(E) {}
 118   AVROperand(MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
 119       : Kind(k_Immediate), RegImm({0, Imm}), Start(S), End(E) {}
 120   AVROperand(unsigned Reg, MCExpr const *Imm, SMLoc const &S, SMLoc const &E)
 121       : Kind(k_Memri), RegImm({Reg, Imm}), Start(S), End(E) {}
 122
 123   struct RegisterImmediate {
 124     unsigned Reg;
 125     MCExpr const *Imm;
 126   };
 127   union {
 128     StringRef Tok;
 129     RegisterImmediate RegImm;
 130   };
 131
 132   SMLoc Start, End;
 133
 134 public:
 135   void addRegOperands(MCInst &Inst, unsigned N) const {
 136     assert(Kind == k_Register && "Unexpected operand kind");
 137     assert(N == 1 && "Invalid number of operands!");
 138
 139     Inst.addOperand(MCOperand::createReg(getReg()));
 140   }
 141
 142   void addExpr(MCInst &Inst, const MCExpr *Expr) const {
 143     // Add as immediate when possible
 144     if (!Expr)
 145       Inst.addOperand(MCOperand::createImm(0));
 146     else if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(Expr))
 147       Inst.addOperand(MCOperand::createImm(CE->getValue()));
 148     else
 149       Inst.addOperand(MCOperand::createExpr(Expr));
 150   }
 151
 152   void addImmOperands(MCInst &Inst, unsigned N) const {
 153     assert(Kind == k_Immediate && "Unexpected operand kind");
 154     assert(N == 1 && "Invalid number of operands!");
 155
 156     const MCExpr *Expr = getImm();
 157     addExpr(Inst, Expr);
 158   }
 159
 160   /// Adds the contained reg+imm operand to an instruction.
 161   void addMemriOperands(MCInst &Inst, unsigned N) const {
 162     assert(Kind == k_Memri && "Unexpected operand kind");
 163     assert(N == 2 && "Invalid number of operands");
 164
 165     Inst.addOperand(MCOperand::createReg(getReg()));
 166     addExpr(Inst, getImm());
 167   }
 168
 169   void addImmCom8Operands(MCInst &Inst, unsigned N) const {
 170     assert(N == 1 && "Invalid number of operands!");
 171     // The operand is actually a imm8, but we have its bitwise
 172     // negation in the assembly source, so twiddle it here.
 173     const auto *CE = cast<MCConstantExpr>(getImm());
 174     Inst.addOperand(MCOperand::createImm(~(uint8_t)CE->getValue()));
 175   }
 176
 177   bool isImmCom8() const {
 178     if (!isImm())
 179       return false;
 180     const auto *CE = dyn_cast<MCConstantExpr>(getImm());
 181     if (!CE)
 182       return false;
 183     int64_t Value = CE->getValue();
 184     return isUInt<8>(Value);
 185   }
 186
 187   bool isReg() const override { return Kind == k_Register; }
 188   bool isImm() const override { return Kind == k_Immediate; }
 189   bool isToken() const override { return Kind == k_Token; }
 190   bool isMem() const override { return Kind == k_Memri; }
 191   bool isMemri() const { return Kind == k_Memri; }
 192
 193   StringRef getToken() const {
 194     assert(Kind == k_Token && "Invalid access!");
 195     return Tok;
 196   }
 197
 198   unsigned getReg() const override {
 199     assert((Kind == k_Register || Kind == k_Memri) && "Invalid access!");
 200
 201     return RegImm.Reg;
 202   }
 203
 204   const MCExpr *getImm() const {
 205     assert((Kind == k_Immediate || Kind == k_Memri) && "Invalid access!");
 206     return RegImm.Imm;
 207   }
 208
 209   static std::unique_ptr<AVROperand> CreateToken(StringRef Str, SMLoc S) {
 210     return std::make_unique<AVROperand>(Str, S);
 211   }
 212
 213   static std::unique_ptr<AVROperand> CreateReg(unsigned RegNum, SMLoc S,
 214                                                SMLoc E) {
 215     return std::make_unique<AVROperand>(RegNum, S, E);
 216   }
 217
 218   static std::unique_ptr<AVROperand> CreateImm(const MCExpr *Val, SMLoc S,
 219                                                SMLoc E) {
 220     return std::make_unique<AVROperand>(Val, S, E);
 221   }
 222
 223   static std::unique_ptr<AVROperand>
 224   CreateMemri(unsigned RegNum, const MCExpr *Val, SMLoc S, SMLoc E) {
 225     return std::make_unique<AVROperand>(RegNum, Val, S, E);
 226   }
 227
 228   void makeToken(StringRef Token) {
 229     Kind = k_Token;
 230     Tok = Token;
 231   }
 232
 233   void makeReg(unsigned RegNo) {
 234     Kind = k_Register;
 235     RegImm = {RegNo, nullptr};
 236   }
 237
 238   void makeImm(MCExpr const *Ex) {
 239     Kind = k_Immediate;
 240     RegImm = {0, Ex};
 241   }
 242
 243   void makeMemri(unsigned RegNo, MCExpr const *Imm) {
 244     Kind = k_Memri;
 245     RegImm = {RegNo, Imm};
 246   }
 247
 248   SMLoc getStartLoc() const override { return Start; }
 249   SMLoc getEndLoc() const override { return End; }
 250
 251   void print(raw_ostream &O) const override {
 252     switch (Kind) {
 253     case k_Token:
 254       O << "Token: \"" << getToken() << "\"";
 255       break;
 256     case k_Register:
 257       O << "Register: " << getReg();
 258       break;
 259     case k_Immediate:
 260       O << "Immediate: \"" << *getImm() << "\"";
 261       break;
 262     case k_Memri: {
 263       // only manually print the size for non-negative values,
 264       // as the sign is inserted automatically.
 265       O << "Memri: \"" << getReg() << '+' << *getImm() << "\"";
 266       break;
 267     }
 268     }
 269     O << "\n";
 270   }
 271 };
 272
 273 } // end anonymous namespace.
 274
 275 // Auto-generated Match Functions
 276
 277 /// Maps from the set of all register names to a register number.
 278 /// \note Generated by TableGen.
 279 static unsigned MatchRegisterName(StringRef Name);
 280
 281 /// Maps from the set of all alternative registernames to a register number.
 282 /// \note Generated by TableGen.
 283 static unsigned MatchRegisterAltName(StringRef Name);
 284
 285 bool AVRAsmParser::invalidOperand(SMLoc const &Loc,
 286                                   OperandVector const &Operands,
 287                                   uint64_t const &ErrorInfo) {
 288   SMLoc ErrorLoc = Loc;
 289   char const *Diag = nullptr;
 290
 291   if (ErrorInfo != ~0U) {
 292     if (ErrorInfo >= Operands.size()) {
 293       Diag = "too few operands for instruction.";
 294     } else {
 295       AVROperand const &Op = (AVROperand const &)*Operands[ErrorInfo];
 296
 297       // TODO: See if we can do a better error than just "invalid ...".
 298       if (Op.getStartLoc() != SMLoc()) {
 299         ErrorLoc = Op.getStartLoc();
 300       }
 301     }
 302   }
 303
 304   if (!Diag) {
 305     Diag = "invalid operand for instruction";
 306   }
 307
 308   return Error(ErrorLoc, Diag);
 309 }
 310
 311 bool AVRAsmParser::missingFeature(llvm::SMLoc const &Loc,
 312                                   uint64_t const &ErrorInfo) {
 313   return Error(Loc, "instruction requires a CPU feature not currently enabled");
 314 }
 315
 316 bool AVRAsmParser::emit(MCInst &Inst, SMLoc const &Loc, MCStreamer &Out) const {
 317   Inst.setLoc(Loc);
 318   Out.emitInstruction(Inst, STI);
 319
 320   return false;
 321 }
 322
 323 bool AVRAsmParser::MatchAndEmitInstruction(SMLoc Loc, unsigned &Opcode,
 324                                            OperandVector &Operands,
 325                                            MCStreamer &Out, uint64_t &ErrorInfo,
 326                                            bool MatchingInlineAsm) {
 327   MCInst Inst;
 328   unsigned MatchResult =
 329       MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm);
 330
 331   switch (MatchResult) {
 332   case Match_Success:
 333     return emit(Inst, Loc, Out);
 334   case Match_MissingFeature:
 335     return missingFeature(Loc, ErrorInfo);
 336   case Match_InvalidOperand:
 337     return invalidOperand(Loc, Operands, ErrorInfo);
 338   case Match_MnemonicFail:
 339     return Error(Loc, "invalid instruction");
 340   case Match_InvalidRegisterOnTiny:
 341     return Error(Loc, "invalid register on avrtiny");
 342   default:
 343     return true;
 344   }
 345 }
 346
 347 /// Parses a register name using a given matching function.
 348 /// Checks for lowercase or uppercase if necessary.
 349 int AVRAsmParser::parseRegisterName(unsigned (*matchFn)(StringRef)) {
 350   StringRef Name = Parser.getTok().getString();
 351
 352   int RegNum = matchFn(Name);
 353
 354   // GCC supports case insensitive register names. Some of the AVR registers
 355   // are all lower case, some are all upper case but non are mixed. We prefer
 356   // to use the original names in the register definitions. That is why we
 357   // have to test both upper and lower case here.
 358   if (RegNum == AVR::NoRegister) {
 359     RegNum = matchFn(Name.lower());
 360   }
 361   if (RegNum == AVR::NoRegister) {
 362     RegNum = matchFn(Name.upper());
 363   }
 364
 365   return RegNum;
 366 }
 367
 368 int AVRAsmParser::parseRegisterName() {
 369   int RegNum = parseRegisterName(&MatchRegisterName);
 370
 371   if (RegNum == AVR::NoRegister)
 372     RegNum = parseRegisterName(&MatchRegisterAltName);
 373
 374   return RegNum;
 375 }
 376
 377 int AVRAsmParser::parseRegister(bool RestoreOnFailure) {
 378   int RegNum = AVR::NoRegister;
 379
 380   if (Parser.getTok().is(AsmToken::Identifier)) {
 381     // Check for register pair syntax
 382     if (Parser.getLexer().peekTok().is(AsmToken::Colon)) {
 383       AsmToken HighTok = Parser.getTok();
 384       Parser.Lex();
 385       AsmToken ColonTok = Parser.getTok();
 386       Parser.Lex(); // Eat high (odd) register and colon
 387
 388       if (Parser.getTok().is(AsmToken::Identifier)) {
 389         // Convert lower (even) register to DREG
 390         RegNum = toDREG(parseRegisterName());
 391       }
 392       if (RegNum == AVR::NoRegister && RestoreOnFailure) {
 393         getLexer().UnLex(std::move(ColonTok));
 394         getLexer().UnLex(std::move(HighTok));
 395       }
 396     } else {
 397       RegNum = parseRegisterName();
 398     }
 399   }
 400   return RegNum;
 401 }
 402
 403 bool AVRAsmParser::tryParseRegisterOperand(OperandVector &Operands) {
 404   int RegNo = parseRegister();
 405
 406   if (RegNo == AVR::NoRegister)
 407     return true;
 408
 409   // Reject R0~R15 on avrtiny.
 410   if (AVR::R0 <= RegNo && RegNo <= AVR::R15 &&
 411       STI.hasFeature(AVR::FeatureTinyEncoding))
 412     return Error(Parser.getTok().getLoc(), "invalid register on avrtiny");
 413
 414   AsmToken const &T = Parser.getTok();
 415   Operands.push_back(AVROperand::CreateReg(RegNo, T.getLoc(), T.getEndLoc()));
 416   Parser.Lex(); // Eat register token.
 417
 418   return false;
 419 }
 420
 421 bool AVRAsmParser::tryParseExpression(OperandVector &Operands) {
 422   SMLoc S = Parser.getTok().getLoc();
 423
 424   if (!tryParseRelocExpression(Operands))
 425     return false;
 426
 427   if ((Parser.getTok().getKind() == AsmToken::Plus ||
 428        Parser.getTok().getKind() == AsmToken::Minus) &&
 429       Parser.getLexer().peekTok().getKind() == AsmToken::Identifier) {
 430     // Don't handle this case - it should be split into two
 431     // separate tokens.
 432     return true;
 433   }
 434
 435   // Parse (potentially inner) expression
 436   MCExpr const *Expression;
 437   if (getParser().parseExpression(Expression))
 438     return true;
 439
 440   SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
 441   Operands.push_back(AVROperand::CreateImm(Expression, S, E));
 442   return false;
 443 }
 444
 445 bool AVRAsmParser::tryParseRelocExpression(OperandVector &Operands) {
 446   bool isNegated = false;
 447   AVRMCExpr::VariantKind ModifierKind = AVRMCExpr::VK_AVR_None;
 448
 449   SMLoc S = Parser.getTok().getLoc();
 450
 451   // Reject the form in which sign comes first. This behaviour is
 452   // in accordance with avr-gcc.
 453   AsmToken::TokenKind CurTok = Parser.getLexer().getKind();
 454   if (CurTok == AsmToken::Minus || CurTok == AsmToken::Plus)
 455     return true;
 456
 457   // Check for sign.
 458   AsmToken tokens[2];
 459   if (Parser.getLexer().peekTokens(tokens) == 2)
 460     if (tokens[0].getKind() == AsmToken::LParen &&
 461         tokens[1].getKind() == AsmToken::Minus)
 462       isNegated = true;
 463
 464   // Check if we have a target specific modifier (lo8, hi8, &c)
 465   if (CurTok != AsmToken::Identifier ||
 466       Parser.getLexer().peekTok().getKind() != AsmToken::LParen) {
 467     // Not a reloc expr
 468     return true;
 469   }
 470   StringRef ModifierName = Parser.getTok().getString();
 471   ModifierKind = AVRMCExpr::getKindByName(ModifierName);
 472
 473   if (ModifierKind != AVRMCExpr::VK_AVR_None) {
 474     Parser.Lex();
 475     Parser.Lex(); // Eat modifier name and parenthesis
 476     if (Parser.getTok().getString() == GENERATE_STUBS &&
 477         Parser.getTok().getKind() == AsmToken::Identifier) {
 478       std::string GSModName = ModifierName.str() + "_" + GENERATE_STUBS;
 479       ModifierKind = AVRMCExpr::getKindByName(GSModName);
 480       if (ModifierKind != AVRMCExpr::VK_AVR_None)
 481         Parser.Lex(); // Eat gs modifier name
 482     }
 483   } else {
 484     return Error(Parser.getTok().getLoc(), "unknown modifier");
 485   }
 486
 487   if (tokens[1].getKind() == AsmToken::Minus ||
 488       tokens[1].getKind() == AsmToken::Plus) {
 489     Parser.Lex();
 490     assert(Parser.getTok().getKind() == AsmToken::LParen);
 491     Parser.Lex(); // Eat the sign and parenthesis
 492   }
 493
 494   MCExpr const *InnerExpression;
 495   if (getParser().parseExpression(InnerExpression))
 496     return true;
 497
 498   if (tokens[1].getKind() == AsmToken::Minus ||
 499       tokens[1].getKind() == AsmToken::Plus) {
 500     assert(Parser.getTok().getKind() == AsmToken::RParen);
 501     Parser.Lex(); // Eat closing parenthesis
 502   }
 503
 504   // If we have a modifier wrap the inner expression
 505   assert(Parser.getTok().getKind() == AsmToken::RParen);
 506   Parser.Lex(); // Eat closing parenthesis
 507
 508   MCExpr const *Expression =
 509       AVRMCExpr::create(ModifierKind, InnerExpression, isNegated, getContext());
 510
 511   SMLoc E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
 512   Operands.push_back(AVROperand::CreateImm(Expression, S, E));
 513
 514   return false;
 515 }
 516
 517 bool AVRAsmParser::parseOperand(OperandVector &Operands, bool maybeReg) {
 518   LLVM_DEBUG(dbgs() << "parseOperand\n");
 519
 520   switch (getLexer().getKind()) {
 521   default:
 522     return Error(Parser.getTok().getLoc(), "unexpected token in operand");
 523
 524   case AsmToken::Identifier:
 525     // Try to parse a register, fall through to the next case if it fails.
 526     if (maybeReg && !tryParseRegisterOperand(Operands)) {
 527       return false;
 528     }
 529     [[fallthrough]];
 530   case AsmToken::LParen:
 531   case AsmToken::Integer:
 532   case AsmToken::Dot:
 533     return tryParseExpression(Operands);
 534   case AsmToken::Plus:
 535   case AsmToken::Minus: {
 536     // If the sign preceeds a number, parse the number,
 537     // otherwise treat the sign a an independent token.
 538     switch (getLexer().peekTok().getKind()) {
 539     case AsmToken::Integer:
 540     case AsmToken::BigNum:
 541     case AsmToken::Identifier:
 542     case AsmToken::Real:
 543       if (!tryParseExpression(Operands))
 544         return false;
 545       break;
 546     default:
 547       break;
 548     }
 549     // Treat the token as an independent token.
 550     Operands.push_back(AVROperand::CreateToken(Parser.getTok().getString(),
 551                                                Parser.getTok().getLoc()));
 552     Parser.Lex(); // Eat the token.
 553     return false;
 554   }
 555   }
 556
 557   // Could not parse operand
 558   return true;
 559 }
 560
 561 ParseStatus AVRAsmParser::parseMemriOperand(OperandVector &Operands) {
 562   LLVM_DEBUG(dbgs() << "parseMemriOperand()\n");
 563
 564   SMLoc E, S;
 565   MCExpr const *Expression;
 566   int RegNo;
 567
 568   // Parse register.
 569   {
 570     RegNo = parseRegister();
 571
 572     if (RegNo == AVR::NoRegister)
 573       return ParseStatus::Failure;
 574
 575     S = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
 576     Parser.Lex(); // Eat register token.
 577   }
 578
 579   // Parse immediate;
 580   {
 581     if (getParser().parseExpression(Expression))
 582       return ParseStatus::Failure;
 583
 584     E = SMLoc::getFromPointer(Parser.getTok().getLoc().getPointer() - 1);
 585   }
 586
 587   Operands.push_back(AVROperand::CreateMemri(RegNo, Expression, S, E));
 588
 589   return ParseStatus::Success;
 590 }
 591
 592 bool AVRAsmParser::parseRegister(MCRegister &Reg, SMLoc &StartLoc,
 593                                  SMLoc &EndLoc) {
 594   StartLoc = Parser.getTok().getLoc();
 595   Reg = parseRegister(/*RestoreOnFailure=*/false);
 596   EndLoc = Parser.getTok().getLoc();
 597
 598   return Reg == AVR::NoRegister;
 599 }
 600
 601 ParseStatus AVRAsmParser::tryParseRegister(MCRegister &Reg, SMLoc &StartLoc,
 602                                            SMLoc &EndLoc) {
 603   StartLoc = Parser.getTok().getLoc();
 604   Reg = parseRegister(/*RestoreOnFailure=*/true);
 605   EndLoc = Parser.getTok().getLoc();
 606
 607   if (Reg == AVR::NoRegister)
 608     return ParseStatus::NoMatch;
 609   return ParseStatus::Success;
 610 }
 611
 612 void AVRAsmParser::eatComma() {
 613   if (getLexer().is(AsmToken::Comma)) {
 614     Parser.Lex();
 615   } else {
 616     // GCC allows commas to be omitted.
 617   }
 618 }
 619
 620 bool AVRAsmParser::ParseInstruction(ParseInstructionInfo &Info,
 621                                     StringRef Mnemonic, SMLoc NameLoc,
 622                                     OperandVector &Operands) {
 623   Operands.push_back(AVROperand::CreateToken(Mnemonic, NameLoc));
 624
 625   int OperandNum = -1;
 626   while (getLexer().isNot(AsmToken::EndOfStatement)) {
 627     OperandNum++;
 628     if (OperandNum > 0)
 629       eatComma();
 630
 631     ParseStatus ParseRes = MatchOperandParserImpl(Operands, Mnemonic);
 632
 633     if (ParseRes.isSuccess())
 634       continue;
 635
 636     if (ParseRes.isFailure()) {
 637       SMLoc Loc = getLexer().getLoc();
 638       Parser.eatToEndOfStatement();
 639
 640       return Error(Loc, "failed to parse register and immediate pair");
 641     }
 642
 643     // These specific operands should be treated as addresses/symbols/labels,
 644     // other than registers.
 645     bool maybeReg = true;
 646     if (OperandNum == 1) {
 647       std::array<StringRef, 8> Insts = {"lds", "adiw", "sbiw", "ldi"};
 648       for (auto Inst : Insts) {
 649         if (Inst == Mnemonic) {
 650           maybeReg = false;
 651           break;
 652         }
 653       }
 654     } else if (OperandNum == 0) {
 655       std::array<StringRef, 8> Insts = {"sts", "call", "rcall", "rjmp", "jmp"};
 656       for (auto Inst : Insts) {
 657         if (Inst == Mnemonic) {
 658           maybeReg = false;
 659           break;
 660         }
 661       }
 662     }
 663
 664     if (parseOperand(Operands, maybeReg)) {
 665       SMLoc Loc = getLexer().getLoc();
 666       Parser.eatToEndOfStatement();
 667       return Error(Loc, "unexpected token in argument list");
 668     }
 669   }
 670   Parser.Lex(); // Consume the EndOfStatement
 671   return false;
 672 }
 673
 674 ParseStatus AVRAsmParser::parseDirective(llvm::AsmToken DirectiveID) {
 675   StringRef IDVal = DirectiveID.getIdentifier();
 676   if (IDVal.lower() == ".long")
 677     return parseLiteralValues(SIZE_LONG, DirectiveID.getLoc());
 678   if (IDVal.lower() == ".word" || IDVal.lower() == ".short")
 679     return parseLiteralValues(SIZE_WORD, DirectiveID.getLoc());
 680   if (IDVal.lower() == ".byte")
 681     return parseLiteralValues(1, DirectiveID.getLoc());
 682   return ParseStatus::NoMatch;
 683 }
 684
 685 ParseStatus AVRAsmParser::parseLiteralValues(unsigned SizeInBytes, SMLoc L) {
 686   MCAsmParser &Parser = getParser();
 687   AVRMCELFStreamer &AVRStreamer =
 688       static_cast<AVRMCELFStreamer &>(Parser.getStreamer());
 689   AsmToken Tokens[2];
 690   size_t ReadCount = Parser.getLexer().peekTokens(Tokens);
 691   if (ReadCount == 2 && Parser.getTok().getKind() == AsmToken::Identifier &&
 692       Tokens[0].getKind() == AsmToken::Minus &&
 693       Tokens[1].getKind() == AsmToken::Identifier) {
 694     MCSymbol *Symbol = getContext().getOrCreateSymbol(".text");
 695     AVRStreamer.emitValueForModiferKind(Symbol, SizeInBytes, L,
 696                                         AVRMCExpr::VK_AVR_None);
 697     return ParseStatus::NoMatch;
 698   }
 699
 700   if (Parser.getTok().getKind() == AsmToken::Identifier &&
 701       Parser.getLexer().peekTok().getKind() == AsmToken::LParen) {
 702     StringRef ModifierName = Parser.getTok().getString();
 703     AVRMCExpr::VariantKind ModifierKind =
 704         AVRMCExpr::getKindByName(ModifierName);
 705     if (ModifierKind != AVRMCExpr::VK_AVR_None) {
 706       Parser.Lex();
 707       Parser.Lex(); // Eat the modifier and parenthesis
 708     } else {
 709       return Error(Parser.getTok().getLoc(), "unknown modifier");
 710     }
 711     MCSymbol *Symbol =
 712         getContext().getOrCreateSymbol(Parser.getTok().getString());
 713     AVRStreamer.emitValueForModiferKind(Symbol, SizeInBytes, L, ModifierKind);
 714     Lex(); // Eat the symbol name.
 715     if (parseToken(AsmToken::RParen))
 716       return ParseStatus::Failure;
 717     return parseEOL();
 718   }
 719
 720   auto parseOne = [&]() -> bool {
 721     const MCExpr *Value;
 722     if (Parser.parseExpression(Value))
 723       return true;
 724     Parser.getStreamer().emitValue(Value, SizeInBytes, L);
 725     return false;
 726   };
 727   return (parseMany(parseOne));
 728 }
 729
 730 extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeAVRAsmParser() {
 731   RegisterMCAsmParser<AVRAsmParser> X(getTheAVRTarget());
 732 }
 733
 734 #define GET_REGISTER_MATCHER
 735 #define GET_MATCHER_IMPLEMENTATION
 736 #include "AVRGenAsmMatcher.inc"
 737
 738 // Uses enums defined in AVRGenAsmMatcher.inc
 739 unsigned AVRAsmParser::validateTargetOperandClass(MCParsedAsmOperand &AsmOp,
 740                                                   unsigned ExpectedKind) {
 741   AVROperand &Op = static_cast<AVROperand &>(AsmOp);
 742   MatchClassKind Expected = static_cast<MatchClassKind>(ExpectedKind);
 743
 744   // If need be, GCC converts bare numbers to register names
 745   // It's ugly, but GCC supports it.
 746   if (Op.isImm()) {
 747     if (MCConstantExpr const *Const = dyn_cast<MCConstantExpr>(Op.getImm())) {
 748       int64_t RegNum = Const->getValue();
 749
 750       // Reject R0~R15 on avrtiny.
 751       if (0 <= RegNum && RegNum <= 15 &&
 752           STI.hasFeature(AVR::FeatureTinyEncoding))
 753         return Match_InvalidRegisterOnTiny;
 754
 755       std::ostringstream RegName;
 756       RegName << "r" << RegNum;
 757       RegNum = MatchRegisterName(RegName.str());
 758       if (RegNum != AVR::NoRegister) {
 759         Op.makeReg(RegNum);
 760         if (validateOperandClass(Op, Expected) == Match_Success) {
 761           return Match_Success;
 762         }
 763       }
 764       // Let the other quirks try their magic.
 765     }
 766   }
 767
 768   if (Op.isReg()) {
 769     // If the instruction uses a register pair but we got a single, lower
 770     // register we perform a "class cast".
 771     if (isSubclass(Expected, MCK_DREGS)) {
 772       unsigned correspondingDREG = toDREG(Op.getReg());
 773
 774       if (correspondingDREG != AVR::NoRegister) {
 775         Op.makeReg(correspondingDREG);
 776         return validateOperandClass(Op, Expected);
 777       }
 778     }
 779   }
 780   return Match_InvalidOperand;
 781 }