Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / llvm / lib / Target / NVPTX / NVPTXSubtarget.h
blob93af11c258b480e0361971da168de3cf90c5347b
1 //=====-- NVPTXSubtarget.h - Define Subtarget for the NVPTX ---*- C++ -*--====//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file declares the NVPTX specific subclass of TargetSubtarget.
11 //===----------------------------------------------------------------------===//
13 #ifndef LLVM_LIB_TARGET_NVPTX_NVPTXSUBTARGET_H
14 #define LLVM_LIB_TARGET_NVPTX_NVPTXSUBTARGET_H
16 #include "NVPTX.h"
17 #include "NVPTXFrameLowering.h"
18 #include "NVPTXISelLowering.h"
19 #include "NVPTXInstrInfo.h"
20 #include "NVPTXRegisterInfo.h"
21 #include "llvm/CodeGen/SelectionDAGTargetInfo.h"
22 #include "llvm/CodeGen/TargetSubtargetInfo.h"
23 #include "llvm/IR/DataLayout.h"
24 #include <string>
26 #define GET_SUBTARGETINFO_HEADER
27 #include "NVPTXGenSubtargetInfo.inc"
29 namespace llvm {
31 class NVPTXSubtarget : public NVPTXGenSubtargetInfo {
32 virtual void anchor();
33 std::string TargetName;
35 // PTX version x.y is represented as 10*x+y, e.g. 3.1 == 31
36 unsigned PTXVersion;
38 // SM version x.y is represented as 10*x+y, e.g. 3.1 == 31
39 unsigned int SmVersion;
41 const NVPTXTargetMachine &TM;
42 NVPTXInstrInfo InstrInfo;
43 NVPTXTargetLowering TLInfo;
44 SelectionDAGTargetInfo TSInfo;
46 // NVPTX does not have any call stack frame, but need a NVPTX specific
47 // FrameLowering class because TargetFrameLowering is abstract.
48 NVPTXFrameLowering FrameLowering;
50 public:
51 /// This constructor initializes the data members to match that
52 /// of the specified module.
53 ///
54 NVPTXSubtarget(const Triple &TT, const std::string &CPU,
55 const std::string &FS, const NVPTXTargetMachine &TM);
57 const TargetFrameLowering *getFrameLowering() const override {
58 return &FrameLowering;
60 const NVPTXInstrInfo *getInstrInfo() const override { return &InstrInfo; }
61 const NVPTXRegisterInfo *getRegisterInfo() const override {
62 return &InstrInfo.getRegisterInfo();
64 const NVPTXTargetLowering *getTargetLowering() const override {
65 return &TLInfo;
67 const SelectionDAGTargetInfo *getSelectionDAGInfo() const override {
68 return &TSInfo;
71 bool hasAtomAddF64() const { return SmVersion >= 60; }
72 bool hasAtomScope() const { return SmVersion >= 60; }
73 bool hasAtomBitwise64() const { return SmVersion >= 32; }
74 bool hasAtomMinMax64() const { return SmVersion >= 32; }
75 bool hasLDG() const { return SmVersion >= 32; }
76 inline bool hasHWROT32() const { return SmVersion >= 32; }
77 bool hasImageHandles() const;
78 bool hasFP16Math() const { return SmVersion >= 53; }
79 bool hasBF16Math() const { return SmVersion >= 80; }
80 bool allowFP16Math() const;
81 bool hasMaskOperator() const { return PTXVersion >= 71; }
82 bool hasNoReturn() const { return SmVersion >= 30 && PTXVersion >= 64; }
83 unsigned int getSmVersion() const { return SmVersion; }
84 std::string getTargetName() const { return TargetName; }
86 // Get maximum value of required alignments among the supported data types.
87 // From the PTX ISA doc, section 8.2.3:
88 // The memory consistency model relates operations executed on memory
89 // locations with scalar data-types, which have a maximum size and alignment
90 // of 64 bits. Memory operations with a vector data-type are modelled as a
91 // set of equivalent memory operations with a scalar data-type, executed in
92 // an unspecified order on the elements in the vector.
93 unsigned getMaxRequiredAlignment() const { return 8; }
95 unsigned getPTXVersion() const { return PTXVersion; }
97 NVPTXSubtarget &initializeSubtargetDependencies(StringRef CPU, StringRef FS);
98 void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS);
101 } // End llvm namespace
103 #endif