1 //===-- XCoreTargetMachine.cpp - Define TargetMachine for XCore -----------===//
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
7 //===----------------------------------------------------------------------===//
10 //===----------------------------------------------------------------------===//
12 #include "XCoreTargetMachine.h"
13 #include "MCTargetDesc/XCoreMCTargetDesc.h"
14 #include "TargetInfo/XCoreTargetInfo.h"
16 #include "XCoreMachineFunctionInfo.h"
17 #include "XCoreTargetObjectFile.h"
18 #include "XCoreTargetTransformInfo.h"
19 #include "llvm/ADT/STLExtras.h"
20 #include "llvm/Analysis/TargetTransformInfo.h"
21 #include "llvm/CodeGen/Passes.h"
22 #include "llvm/CodeGen/TargetPassConfig.h"
23 #include "llvm/MC/TargetRegistry.h"
24 #include "llvm/Support/CodeGen.h"
29 static Reloc::Model
getEffectiveRelocModel(std::optional
<Reloc::Model
> RM
) {
30 return RM
.value_or(Reloc::Static
);
33 static CodeModel::Model
34 getEffectiveXCoreCodeModel(std::optional
<CodeModel::Model
> CM
) {
36 if (*CM
!= CodeModel::Small
&& *CM
!= CodeModel::Large
)
37 report_fatal_error("Target only supports CodeModel Small or Large");
40 return CodeModel::Small
;
43 /// Create an ILP32 architecture model
45 XCoreTargetMachine::XCoreTargetMachine(const Target
&T
, const Triple
&TT
,
46 StringRef CPU
, StringRef FS
,
47 const TargetOptions
&Options
,
48 std::optional
<Reloc::Model
> RM
,
49 std::optional
<CodeModel::Model
> CM
,
50 CodeGenOptLevel OL
, bool JIT
)
52 T
, "e-m:e-p:32:32-i1:8:32-i8:8:32-i16:16:32-i64:32-f64:32-a:0:32-n32",
53 TT
, CPU
, FS
, Options
, getEffectiveRelocModel(RM
),
54 getEffectiveXCoreCodeModel(CM
), OL
),
55 TLOF(std::make_unique
<XCoreTargetObjectFile
>()),
56 Subtarget(TT
, std::string(CPU
), std::string(FS
), *this) {
60 XCoreTargetMachine::~XCoreTargetMachine() = default;
64 /// XCore Code Generator Pass Configuration Options.
65 class XCorePassConfig
: public TargetPassConfig
{
67 XCorePassConfig(XCoreTargetMachine
&TM
, PassManagerBase
&PM
)
68 : TargetPassConfig(TM
, PM
) {}
70 XCoreTargetMachine
&getXCoreTargetMachine() const {
71 return getTM
<XCoreTargetMachine
>();
74 void addIRPasses() override
;
75 bool addPreISel() override
;
76 bool addInstSelector() override
;
77 void addPreEmitPass() override
;
80 } // end anonymous namespace
82 TargetPassConfig
*XCoreTargetMachine::createPassConfig(PassManagerBase
&PM
) {
83 return new XCorePassConfig(*this, PM
);
86 void XCorePassConfig::addIRPasses() {
87 addPass(createAtomicExpandPass());
89 TargetPassConfig::addIRPasses();
92 bool XCorePassConfig::addPreISel() {
93 addPass(createXCoreLowerThreadLocalPass());
97 bool XCorePassConfig::addInstSelector() {
98 addPass(createXCoreISelDag(getXCoreTargetMachine(), getOptLevel()));
102 void XCorePassConfig::addPreEmitPass() {
103 addPass(createXCoreFrameToArgsOffsetEliminationPass());
106 // Force static initialization.
107 extern "C" LLVM_EXTERNAL_VISIBILITY
void LLVMInitializeXCoreTarget() {
108 RegisterTargetMachine
<XCoreTargetMachine
> X(getTheXCoreTarget());
109 PassRegistry
&PR
= *PassRegistry::getPassRegistry();
110 initializeXCoreDAGToDAGISelPass(PR
);
114 XCoreTargetMachine::getTargetTransformInfo(const Function
&F
) const {
115 return TargetTransformInfo(XCoreTTIImpl(this, F
));
118 MachineFunctionInfo
*XCoreTargetMachine::createMachineFunctionInfo(
119 BumpPtrAllocator
&Allocator
, const Function
&F
,
120 const TargetSubtargetInfo
*STI
) const {
121 return XCoreFunctionInfo::create
<XCoreFunctionInfo
>(Allocator
, F
, STI
);