| blob | 49ed2902da45ba8d06625aadddde0781e417dd44 |
1 ; NOTE: Assertions have been autogenerated by utils/update_analyze_test_checks.py
2 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse2 | FileCheck %s --check-prefixes=CHECK,SSE
3 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+ssse3 | FileCheck %s --check-prefixes=CHECK,SSE
4 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+sse4.2 | FileCheck %s --check-prefixes=CHECK,SSE
5 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx | FileCheck %s --check-prefixes=CHECK,AVX
6 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx2 | FileCheck %s --check-prefixes=CHECK,AVX
7 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f | FileCheck %s --check-prefixes=CHECK,AVX512
8 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512f,+avx512vl,+prefer-256-bit | FileCheck %s --check-prefixes=CHECK,AVX256
9 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512dq | FileCheck %s --check-prefixes=CHECK,AVX512
10 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512dq,+avx512vl,+prefer-256-bit | FileCheck %s --check-prefixes=CHECK,AVX256
11 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512bw | FileCheck %s --check-prefixes=CHECK,AVX512
12 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mattr=+avx512bw,+avx512vl,+prefer-256-bit | FileCheck %s --check-prefixes=CHECK,AVX256
13 ;
14 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mcpu=slm | FileCheck %s --check-prefixes=CHECK,SSE
15 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mcpu=goldmont | FileCheck %s --check-prefixes=CHECK,SSE
16 ; RUN: opt < %s -passes="print<cost-model>" 2>&1 -disable-output -cost-kind=size-latency -mtriple=x86_64-apple-macosx10.8.0 -mcpu=btver2 | FileCheck %s --check-prefixes=CHECK,AVX
18 define i32 @trunc_vXi32() "min-legal-vector-width"="256" {
19 ; CHECK-LABEL: 'trunc_vXi32'
20 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i32
21 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i32>
22 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = trunc <4 x i64> undef to <4 x i32>
23 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i32>
24 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i32>
25 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
26 ;
27 %i64 = trunc i64 undef to i32
28 %V2i64 = trunc <2 x i64> undef to <2 x i32>
29 %V4i64 = trunc <4 x i64> undef to <4 x i32>
30 %V8i64 = trunc <8 x i64> undef to <8 x i32>
31 %V16i64 = trunc <16 x i64> undef to <16 x i32>
32 ret i32 undef
33 }
35 define i32 @trunc_vXi16() "min-legal-vector-width"="256" {
36 ; CHECK-LABEL: 'trunc_vXi16'
37 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i16
38 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i16>
39 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V3i64 = trunc <3 x i64> undef to <3 x i16>
40 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = trunc <4 x i64> undef to <4 x i16>
41 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V5i64 = trunc <5 x i64> undef to <5 x i16>
42 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V6i64 = trunc <6 x i64> undef to <6 x i16>
43 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V7i64 = trunc <7 x i64> undef to <7 x i16>
44 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i16>
45 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i64 = trunc <10 x i64> undef to <10 x i16>
46 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i64 = trunc <12 x i64> undef to <12 x i16>
47 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i64 = trunc <14 x i64> undef to <14 x i16>
48 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i16>
49 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i64 = trunc <20 x i64> undef to <20 x i16>
50 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i64 = trunc <24 x i64> undef to <24 x i16>
51 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i64 = trunc <28 x i64> undef to <28 x i16>
52 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32i64 = trunc <32 x i64> undef to <32 x i16>
53 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i64 = trunc <40 x i64> undef to <40 x i16>
54 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i64 = trunc <48 x i64> undef to <48 x i16>
55 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i64 = trunc <56 x i64> undef to <56 x i16>
56 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64i64 = trunc <64 x i64> undef to <64 x i16>
57 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i64 = trunc <80 x i64> undef to <80 x i16>
58 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V96i64 = trunc <96 x i64> undef to <96 x i16>
59 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i64 = trunc <112 x i64> undef to <112 x i16>
60 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128i64 = trunc <128 x i64> undef to <128 x i16>
61 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i64 = trunc <160 x i64> undef to <160 x i16>
62 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i64 = trunc <192 x i64> undef to <192 x i16>
63 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i64 = trunc <224 x i64> undef to <224 x i16>
64 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256i64 = trunc <256 x i64> undef to <256 x i16>
65 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i64 = trunc <320 x i64> undef to <320 x i16>
66 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i64 = trunc <384 x i64> undef to <384 x i16>
67 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i64 = trunc <448 x i64> undef to <448 x i16>
68 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512i64 = trunc <512 x i64> undef to <512 x i16>
69 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i32 = trunc i32 undef to i16
70 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = trunc <2 x i32> undef to <2 x i16>
71 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V3i32 = trunc <3 x i32> undef to <3 x i16>
72 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = trunc <4 x i32> undef to <4 x i16>
73 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V5i32 = trunc <5 x i32> undef to <5 x i16>
74 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V6i32 = trunc <6 x i32> undef to <6 x i16>
75 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V7i32 = trunc <7 x i32> undef to <7 x i16>
76 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = trunc <8 x i32> undef to <8 x i16>
77 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i32 = trunc <10 x i32> undef to <10 x i16>
78 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i32 = trunc <12 x i32> undef to <12 x i16>
79 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i32 = trunc <14 x i32> undef to <14 x i16>
80 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = trunc <16 x i32> undef to <16 x i16>
81 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i32 = trunc <20 x i32> undef to <20 x i16>
82 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i32 = trunc <24 x i32> undef to <24 x i16>
83 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i32 = trunc <28 x i32> undef to <28 x i16>
84 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32i32 = trunc <32 x i32> undef to <32 x i16>
85 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i32 = trunc <40 x i32> undef to <40 x i16>
86 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i32 = trunc <48 x i32> undef to <48 x i16>
87 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i32 = trunc <56 x i32> undef to <56 x i16>
88 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64i32 = trunc <64 x i32> undef to <64 x i16>
89 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i32 = trunc <80 x i32> undef to <80 x i16>
90 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V96i32 = trunc <96 x i32> undef to <96 x i16>
91 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i32 = trunc <112 x i32> undef to <112 x i16>
92 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128i32 = trunc <128 x i32> undef to <128 x i16>
93 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i32 = trunc <160 x i32> undef to <160 x i16>
94 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i32 = trunc <192 x i32> undef to <192 x i16>
95 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i32 = trunc <224 x i32> undef to <224 x i16>
96 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256i32 = trunc <256 x i32> undef to <256 x i16>
97 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i32 = trunc <320 x i32> undef to <320 x i16>
98 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i32 = trunc <384 x i32> undef to <384 x i16>
99 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i32 = trunc <448 x i32> undef to <448 x i16>
100 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512i32 = trunc <512 x i32> undef to <512 x i16>
101 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
102 ;
103 %i64 = trunc i64 undef to i16
104 %V2i64 = trunc <2 x i64> undef to <2 x i16>
105 %V3i64 = trunc <3 x i64> undef to <3 x i16>
106 %V4i64 = trunc <4 x i64> undef to <4 x i16>
107 %V5i64 = trunc <5 x i64> undef to <5 x i16>
108 %V6i64 = trunc <6 x i64> undef to <6 x i16>
109 %V7i64 = trunc <7 x i64> undef to <7 x i16>
110 %V8i64 = trunc <8 x i64> undef to <8 x i16>
111 %V10i64 = trunc <10 x i64> undef to <10 x i16>
112 %V12i64 = trunc <12 x i64> undef to <12 x i16>
113 %V14i64 = trunc <14 x i64> undef to <14 x i16>
114 %V16i64 = trunc <16 x i64> undef to <16 x i16>
115 %V20i64 = trunc <20 x i64> undef to <20 x i16>
116 %V24i64 = trunc <24 x i64> undef to <24 x i16>
117 %V28i64 = trunc <28 x i64> undef to <28 x i16>
118 %V32i64 = trunc <32 x i64> undef to <32 x i16>
119 %V40i64 = trunc <40 x i64> undef to <40 x i16>
120 %V48i64 = trunc <48 x i64> undef to <48 x i16>
121 %V56i64 = trunc <56 x i64> undef to <56 x i16>
122 %V64i64 = trunc <64 x i64> undef to <64 x i16>
123 %V80i64 = trunc <80 x i64> undef to <80 x i16>
124 %V96i64 = trunc <96 x i64> undef to <96 x i16>
125 %V112i64 = trunc <112 x i64> undef to <112 x i16>
126 %V128i64 = trunc <128 x i64> undef to <128 x i16>
127 %V160i64 = trunc <160 x i64> undef to <160 x i16>
128 %V192i64 = trunc <192 x i64> undef to <192 x i16>
129 %V224i64 = trunc <224 x i64> undef to <224 x i16>
130 %V256i64 = trunc <256 x i64> undef to <256 x i16>
131 %V320i64 = trunc <320 x i64> undef to <320 x i16>
132 %V384i64 = trunc <384 x i64> undef to <384 x i16>
133 %V448i64 = trunc <448 x i64> undef to <448 x i16>
134 %V512i64 = trunc <512 x i64> undef to <512 x i16>
136 %i32 = trunc i32 undef to i16
137 %V2i32 = trunc <2 x i32> undef to <2 x i16>
138 %V3i32 = trunc <3 x i32> undef to <3 x i16>
139 %V4i32 = trunc <4 x i32> undef to <4 x i16>
140 %V5i32 = trunc <5 x i32> undef to <5 x i16>
141 %V6i32 = trunc <6 x i32> undef to <6 x i16>
142 %V7i32 = trunc <7 x i32> undef to <7 x i16>
143 %V8i32 = trunc <8 x i32> undef to <8 x i16>
144 %V10i32 = trunc <10 x i32> undef to <10 x i16>
145 %V12i32 = trunc <12 x i32> undef to <12 x i16>
146 %V14i32 = trunc <14 x i32> undef to <14 x i16>
147 %V16i32 = trunc <16 x i32> undef to <16 x i16>
148 %V20i32 = trunc <20 x i32> undef to <20 x i16>
149 %V24i32 = trunc <24 x i32> undef to <24 x i16>
150 %V28i32 = trunc <28 x i32> undef to <28 x i16>
151 %V32i32 = trunc <32 x i32> undef to <32 x i16>
152 %V40i32 = trunc <40 x i32> undef to <40 x i16>
153 %V48i32 = trunc <48 x i32> undef to <48 x i16>
154 %V56i32 = trunc <56 x i32> undef to <56 x i16>
155 %V64i32 = trunc <64 x i32> undef to <64 x i16>
156 %V80i32 = trunc <80 x i32> undef to <80 x i16>
157 %V96i32 = trunc <96 x i32> undef to <96 x i16>
158 %V112i32 = trunc <112 x i32> undef to <112 x i16>
159 %V128i32 = trunc <128 x i32> undef to <128 x i16>
160 %V160i32 = trunc <160 x i32> undef to <160 x i16>
161 %V192i32 = trunc <192 x i32> undef to <192 x i16>
162 %V224i32 = trunc <224 x i32> undef to <224 x i16>
163 %V256i32 = trunc <256 x i32> undef to <256 x i16>
164 %V320i32 = trunc <320 x i32> undef to <320 x i16>
165 %V384i32 = trunc <384 x i32> undef to <384 x i16>
166 %V448i32 = trunc <448 x i32> undef to <448 x i16>
167 %V512i32 = trunc <512 x i32> undef to <512 x i16>
169 ret i32 undef
170 }
172 define i32 @trunc_vXi8() "min-legal-vector-width"="256" {
173 ; CHECK-LABEL: 'trunc_vXi8'
174 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i8
175 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i8>
176 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = trunc <4 x i64> undef to <4 x i8>
177 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V6i64 = trunc <6 x i64> undef to <6 x i8>
178 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i8>
179 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i64 = trunc <10 x i64> undef to <10 x i8>
180 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i64 = trunc <12 x i64> undef to <12 x i8>
181 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i64 = trunc <14 x i64> undef to <14 x i8>
182 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i8>
183 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i64 = trunc <20 x i64> undef to <20 x i8>
184 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i64 = trunc <24 x i64> undef to <24 x i8>
185 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i64 = trunc <28 x i64> undef to <28 x i8>
186 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32i64 = trunc <32 x i64> undef to <32 x i8>
187 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i64 = trunc <40 x i64> undef to <40 x i8>
188 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i64 = trunc <48 x i64> undef to <48 x i8>
189 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i64 = trunc <56 x i64> undef to <56 x i8>
190 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64i64 = trunc <64 x i64> undef to <64 x i8>
191 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i64 = trunc <80 x i64> undef to <80 x i8>
192 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V96i64 = trunc <96 x i64> undef to <96 x i8>
193 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i64 = trunc <112 x i64> undef to <112 x i8>
194 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128i64 = trunc <128 x i64> undef to <128 x i8>
195 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i64 = trunc <160 x i64> undef to <160 x i8>
196 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i64 = trunc <192 x i64> undef to <192 x i8>
197 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i64 = trunc <224 x i64> undef to <224 x i8>
198 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256i64 = trunc <256 x i64> undef to <256 x i8>
199 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i64 = trunc <320 x i64> undef to <320 x i8>
200 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i64 = trunc <384 x i64> undef to <384 x i8>
201 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i64 = trunc <448 x i64> undef to <448 x i8>
202 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512i64 = trunc <512 x i64> undef to <512 x i8>
203 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V640i64 = trunc <640 x i64> undef to <640 x i8>
204 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V768i64 = trunc <768 x i64> undef to <768 x i8>
205 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V896i64 = trunc <896 x i64> undef to <896 x i8>
206 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V1024i64 = trunc <1024 x i64> undef to <1024 x i8>
207 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i32 = trunc i32 undef to i8
208 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = trunc <2 x i32> undef to <2 x i8>
209 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i32 = trunc <4 x i32> undef to <4 x i8>
210 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V6i32 = trunc <6 x i32> undef to <6 x i8>
211 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = trunc <8 x i32> undef to <8 x i8>
212 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i32 = trunc <10 x i32> undef to <10 x i8>
213 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i32 = trunc <12 x i32> undef to <12 x i8>
214 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i32 = trunc <14 x i32> undef to <14 x i8>
215 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = trunc <16 x i32> undef to <16 x i8>
216 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i32 = trunc <20 x i32> undef to <20 x i8>
217 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i32 = trunc <24 x i32> undef to <24 x i8>
218 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i32 = trunc <28 x i32> undef to <28 x i8>
219 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32i32 = trunc <32 x i32> undef to <32 x i8>
220 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i32 = trunc <40 x i32> undef to <40 x i8>
221 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i32 = trunc <48 x i32> undef to <48 x i8>
222 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i32 = trunc <56 x i32> undef to <56 x i8>
223 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64i32 = trunc <64 x i32> undef to <64 x i8>
224 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i32 = trunc <80 x i32> undef to <80 x i8>
225 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V96i32 = trunc <96 x i32> undef to <96 x i8>
226 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i32 = trunc <112 x i32> undef to <112 x i8>
227 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128i32 = trunc <128 x i32> undef to <128 x i8>
228 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i32 = trunc <160 x i32> undef to <160 x i8>
229 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i32 = trunc <192 x i32> undef to <192 x i8>
230 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i32 = trunc <224 x i32> undef to <224 x i8>
231 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256i32 = trunc <256 x i32> undef to <256 x i8>
232 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i32 = trunc <320 x i32> undef to <320 x i8>
233 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i32 = trunc <384 x i32> undef to <384 x i8>
234 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i32 = trunc <448 x i32> undef to <448 x i8>
235 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512i32 = trunc <512 x i32> undef to <512 x i8>
236 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V640i32 = trunc <640 x i32> undef to <640 x i8>
237 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V768i32 = trunc <768 x i32> undef to <768 x i8>
238 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V896i32 = trunc <896 x i32> undef to <896 x i8>
239 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V1024i32 = trunc <1024 x i32> undef to <1024 x i8>
240 ; CHECK-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i16 = trunc i16 undef to i8
241 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = trunc <2 x i16> undef to <2 x i8>
242 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = trunc <4 x i16> undef to <4 x i8>
243 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V6i16 = trunc <6 x i16> undef to <6 x i8>
244 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i16 = trunc <8 x i16> undef to <8 x i8>
245 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i16 = trunc <10 x i16> undef to <10 x i8>
246 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i16 = trunc <12 x i16> undef to <12 x i8>
247 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i16 = trunc <14 x i16> undef to <14 x i8>
248 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = trunc <16 x i16> undef to <16 x i8>
249 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i16 = trunc <20 x i16> undef to <20 x i8>
250 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i16 = trunc <24 x i16> undef to <24 x i8>
251 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i16 = trunc <28 x i16> undef to <28 x i8>
252 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32i16 = trunc <32 x i16> undef to <32 x i8>
253 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i16 = trunc <40 x i16> undef to <40 x i8>
254 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i16 = trunc <48 x i16> undef to <48 x i8>
255 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i16 = trunc <56 x i16> undef to <56 x i8>
256 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64i16 = trunc <64 x i16> undef to <64 x i8>
257 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i16 = trunc <80 x i16> undef to <80 x i8>
258 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V96i16 = trunc <96 x i16> undef to <96 x i8>
259 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i16 = trunc <112 x i16> undef to <112 x i8>
260 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128i16 = trunc <128 x i16> undef to <128 x i8>
261 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i16 = trunc <160 x i16> undef to <160 x i8>
262 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i16 = trunc <192 x i16> undef to <192 x i8>
263 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i16 = trunc <224 x i16> undef to <224 x i8>
264 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256i16 = trunc <256 x i16> undef to <256 x i8>
265 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i16 = trunc <320 x i16> undef to <320 x i8>
266 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i16 = trunc <384 x i16> undef to <384 x i8>
267 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i16 = trunc <448 x i16> undef to <448 x i8>
268 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512i16 = trunc <512 x i16> undef to <512 x i8>
269 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V640i16 = trunc <640 x i16> undef to <640 x i8>
270 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V768i16 = trunc <768 x i16> undef to <768 x i8>
271 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V896i16 = trunc <896 x i16> undef to <896 x i8>
272 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V1024i16 = trunc <1024 x i16> undef to <1024 x i8>
273 ; CHECK-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
274 ;
275 %i64 = trunc i64 undef to i8
276 %V2i64 = trunc <2 x i64> undef to <2 x i8>
277 %V4i64 = trunc <4 x i64> undef to <4 x i8>
278 %V6i64 = trunc <6 x i64> undef to <6 x i8>
279 %V8i64 = trunc <8 x i64> undef to <8 x i8>
280 %V10i64 = trunc <10 x i64> undef to <10 x i8>
281 %V12i64 = trunc <12 x i64> undef to <12 x i8>
282 %V14i64 = trunc <14 x i64> undef to <14 x i8>
283 %V16i64 = trunc <16 x i64> undef to <16 x i8>
284 %V20i64 = trunc <20 x i64> undef to <20 x i8>
285 %V24i64 = trunc <24 x i64> undef to <24 x i8>
286 %V28i64 = trunc <28 x i64> undef to <28 x i8>
287 %V32i64 = trunc <32 x i64> undef to <32 x i8>
288 %V40i64 = trunc <40 x i64> undef to <40 x i8>
289 %V48i64 = trunc <48 x i64> undef to <48 x i8>
290 %V56i64 = trunc <56 x i64> undef to <56 x i8>
291 %V64i64 = trunc <64 x i64> undef to <64 x i8>
292 %V80i64 = trunc <80 x i64> undef to <80 x i8>
293 %V96i64 = trunc <96 x i64> undef to <96 x i8>
294 %V112i64 = trunc <112 x i64> undef to <112 x i8>
295 %V128i64 = trunc <128 x i64> undef to <128 x i8>
296 %V160i64 = trunc <160 x i64> undef to <160 x i8>
297 %V192i64 = trunc <192 x i64> undef to <192 x i8>
298 %V224i64 = trunc <224 x i64> undef to <224 x i8>
299 %V256i64 = trunc <256 x i64> undef to <256 x i8>
300 %V320i64 = trunc <320 x i64> undef to <320 x i8>
301 %V384i64 = trunc <384 x i64> undef to <384 x i8>
302 %V448i64 = trunc <448 x i64> undef to <448 x i8>
303 %V512i64 = trunc <512 x i64> undef to <512 x i8>
304 %V640i64 = trunc <640 x i64> undef to <640 x i8>
305 %V768i64 = trunc <768 x i64> undef to <768 x i8>
306 %V896i64 = trunc <896 x i64> undef to <896 x i8>
307 %V1024i64 = trunc <1024 x i64> undef to <1024 x i8>
309 %i32 = trunc i32 undef to i8
310 %V2i32 = trunc <2 x i32> undef to <2 x i8>
311 %V4i32 = trunc <4 x i32> undef to <4 x i8>
312 %V6i32 = trunc <6 x i32> undef to <6 x i8>
313 %V8i32 = trunc <8 x i32> undef to <8 x i8>
314 %V10i32 = trunc <10 x i32> undef to <10 x i8>
315 %V12i32 = trunc <12 x i32> undef to <12 x i8>
316 %V14i32 = trunc <14 x i32> undef to <14 x i8>
317 %V16i32 = trunc <16 x i32> undef to <16 x i8>
318 %V20i32 = trunc <20 x i32> undef to <20 x i8>
319 %V24i32 = trunc <24 x i32> undef to <24 x i8>
320 %V28i32 = trunc <28 x i32> undef to <28 x i8>
321 %V32i32 = trunc <32 x i32> undef to <32 x i8>
322 %V40i32 = trunc <40 x i32> undef to <40 x i8>
323 %V48i32 = trunc <48 x i32> undef to <48 x i8>
324 %V56i32 = trunc <56 x i32> undef to <56 x i8>
325 %V64i32 = trunc <64 x i32> undef to <64 x i8>
326 %V80i32 = trunc <80 x i32> undef to <80 x i8>
327 %V96i32 = trunc <96 x i32> undef to <96 x i8>
328 %V112i32 = trunc <112 x i32> undef to <112 x i8>
329 %V128i32 = trunc <128 x i32> undef to <128 x i8>
330 %V160i32 = trunc <160 x i32> undef to <160 x i8>
331 %V192i32 = trunc <192 x i32> undef to <192 x i8>
332 %V224i32 = trunc <224 x i32> undef to <224 x i8>
333 %V256i32 = trunc <256 x i32> undef to <256 x i8>
334 %V320i32 = trunc <320 x i32> undef to <320 x i8>
335 %V384i32 = trunc <384 x i32> undef to <384 x i8>
336 %V448i32 = trunc <448 x i32> undef to <448 x i8>
337 %V512i32 = trunc <512 x i32> undef to <512 x i8>
338 %V640i32 = trunc <640 x i32> undef to <640 x i8>
339 %V768i32 = trunc <768 x i32> undef to <768 x i8>
340 %V896i32 = trunc <896 x i32> undef to <896 x i8>
341 %V1024i32 = trunc <1024 x i32> undef to <1024 x i8>
343 %i16 = trunc i16 undef to i8
344 %V2i16 = trunc <2 x i16> undef to <2 x i8>
345 %V4i16 = trunc <4 x i16> undef to <4 x i8>
346 %V6i16 = trunc <6 x i16> undef to <6 x i8>
347 %V8i16 = trunc <8 x i16> undef to <8 x i8>
348 %V10i16 = trunc <10 x i16> undef to <10 x i8>
349 %V12i16 = trunc <12 x i16> undef to <12 x i8>
350 %V14i16 = trunc <14 x i16> undef to <14 x i8>
351 %V16i16 = trunc <16 x i16> undef to <16 x i8>
352 %V20i16 = trunc <20 x i16> undef to <20 x i8>
353 %V24i16 = trunc <24 x i16> undef to <24 x i8>
354 %V28i16 = trunc <28 x i16> undef to <28 x i8>
355 %V32i16 = trunc <32 x i16> undef to <32 x i8>
356 %V40i16 = trunc <40 x i16> undef to <40 x i8>
357 %V48i16 = trunc <48 x i16> undef to <48 x i8>
358 %V56i16 = trunc <56 x i16> undef to <56 x i8>
359 %V64i16 = trunc <64 x i16> undef to <64 x i8>
360 %V80i16 = trunc <80 x i16> undef to <80 x i8>
361 %V96i16 = trunc <96 x i16> undef to <96 x i8>
362 %V112i16 = trunc <112 x i16> undef to <112 x i8>
363 %V128i16 = trunc <128 x i16> undef to <128 x i8>
364 %V160i16 = trunc <160 x i16> undef to <160 x i8>
365 %V192i16 = trunc <192 x i16> undef to <192 x i8>
366 %V224i16 = trunc <224 x i16> undef to <224 x i8>
367 %V256i16 = trunc <256 x i16> undef to <256 x i8>
368 %V320i16 = trunc <320 x i16> undef to <320 x i8>
369 %V384i16 = trunc <384 x i16> undef to <384 x i8>
370 %V448i16 = trunc <448 x i16> undef to <448 x i8>
371 %V512i16 = trunc <512 x i16> undef to <512 x i8>
372 %V640i16 = trunc <640 x i16> undef to <640 x i8>
373 %V768i16 = trunc <768 x i16> undef to <768 x i8>
374 %V896i16 = trunc <896 x i16> undef to <896 x i8>
375 %V1024i16 = trunc <1024 x i16> undef to <1024 x i8>
377 ret i32 undef
378 }
380 define i32 @trunc_vXi1() "min-legal-vector-width"="256" {
381 ; SSE-LABEL: 'trunc_vXi1'
382 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i1
383 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i1>
384 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V3i64 = trunc <3 x i64> undef to <3 x i1>
385 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = trunc <4 x i64> undef to <4 x i1>
386 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V5i64 = trunc <5 x i64> undef to <5 x i1>
387 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V6i64 = trunc <6 x i64> undef to <6 x i1>
388 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V7i64 = trunc <7 x i64> undef to <7 x i1>
389 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i1>
390 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i64 = trunc <10 x i64> undef to <10 x i1>
391 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i64 = trunc <12 x i64> undef to <12 x i1>
392 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i64 = trunc <14 x i64> undef to <14 x i1>
393 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i1>
394 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i64 = trunc <20 x i64> undef to <20 x i1>
395 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i64 = trunc <24 x i64> undef to <24 x i1>
396 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i64 = trunc <28 x i64> undef to <28 x i1>
397 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32i64 = trunc <32 x i64> undef to <32 x i1>
398 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i64 = trunc <40 x i64> undef to <40 x i1>
399 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i64 = trunc <48 x i64> undef to <48 x i1>
400 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i64 = trunc <56 x i64> undef to <56 x i1>
401 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64i64 = trunc <64 x i64> undef to <64 x i1>
402 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i64 = trunc <80 x i64> undef to <80 x i1>
403 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i64 = trunc <112 x i64> undef to <112 x i1>
404 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128i64 = trunc <128 x i64> undef to <128 x i1>
405 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i64 = trunc <160 x i64> undef to <160 x i1>
406 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i64 = trunc <192 x i64> undef to <192 x i1>
407 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i64 = trunc <224 x i64> undef to <224 x i1>
408 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256i64 = trunc <256 x i64> undef to <256 x i1>
409 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i64 = trunc <320 x i64> undef to <320 x i1>
410 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i64 = trunc <384 x i64> undef to <384 x i1>
411 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i64 = trunc <448 x i64> undef to <448 x i1>
412 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512i64 = trunc <512 x i64> undef to <512 x i1>
413 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V640i64 = trunc <640 x i64> undef to <640 x i1>
414 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V768i64 = trunc <768 x i64> undef to <768 x i1>
415 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V896i64 = trunc <896 x i64> undef to <896 x i1>
416 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V1024i64 = trunc <1024 x i64> undef to <1024 x i1>
417 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i32 = trunc i32 undef to i1
418 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = trunc <2 x i32> undef to <2 x i1>
419 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V3i32 = trunc <3 x i32> undef to <3 x i1>
420 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V4i32 = trunc <4 x i32> undef to <4 x i1>
421 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V5i32 = trunc <5 x i32> undef to <5 x i1>
422 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V6i32 = trunc <6 x i32> undef to <6 x i1>
423 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V7i32 = trunc <7 x i32> undef to <7 x i1>
424 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = trunc <8 x i32> undef to <8 x i1>
425 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i32 = trunc <10 x i32> undef to <10 x i1>
426 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i32 = trunc <12 x i32> undef to <12 x i1>
427 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i32 = trunc <14 x i32> undef to <14 x i1>
428 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = trunc <16 x i32> undef to <16 x i1>
429 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i32 = trunc <20 x i32> undef to <20 x i1>
430 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i32 = trunc <24 x i32> undef to <24 x i1>
431 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i32 = trunc <28 x i32> undef to <28 x i1>
432 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32i32 = trunc <32 x i32> undef to <32 x i1>
433 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i32 = trunc <40 x i32> undef to <40 x i1>
434 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i32 = trunc <48 x i32> undef to <48 x i1>
435 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i32 = trunc <56 x i32> undef to <56 x i1>
436 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64i32 = trunc <64 x i32> undef to <64 x i1>
437 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i32 = trunc <80 x i32> undef to <80 x i1>
438 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i32 = trunc <112 x i32> undef to <112 x i1>
439 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128i32 = trunc <128 x i32> undef to <128 x i1>
440 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i32 = trunc <160 x i32> undef to <160 x i1>
441 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i32 = trunc <192 x i32> undef to <192 x i1>
442 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i32 = trunc <224 x i32> undef to <224 x i1>
443 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256i32 = trunc <256 x i32> undef to <256 x i1>
444 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i32 = trunc <320 x i32> undef to <320 x i1>
445 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i32 = trunc <384 x i32> undef to <384 x i1>
446 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i32 = trunc <448 x i32> undef to <448 x i1>
447 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512i32 = trunc <512 x i32> undef to <512 x i1>
448 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V640i32 = trunc <640 x i32> undef to <640 x i1>
449 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V768i32 = trunc <768 x i32> undef to <768 x i1>
450 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V896i32 = trunc <896 x i32> undef to <896 x i1>
451 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V1024i32 = trunc <1024 x i32> undef to <1024 x i1>
452 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i16 = trunc i16 undef to i1
453 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = trunc <2 x i16> undef to <2 x i1>
454 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V3i16 = trunc <3 x i16> undef to <3 x i1>
455 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = trunc <4 x i16> undef to <4 x i1>
456 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V5i16 = trunc <5 x i16> undef to <5 x i1>
457 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V6i16 = trunc <6 x i16> undef to <6 x i1>
458 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V7i16 = trunc <7 x i16> undef to <7 x i1>
459 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V8i16 = trunc <8 x i16> undef to <8 x i1>
460 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i16 = trunc <10 x i16> undef to <10 x i1>
461 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i16 = trunc <12 x i16> undef to <12 x i1>
462 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i16 = trunc <14 x i16> undef to <14 x i1>
463 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = trunc <16 x i16> undef to <16 x i1>
464 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i16 = trunc <20 x i16> undef to <20 x i1>
465 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i16 = trunc <24 x i16> undef to <24 x i1>
466 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i16 = trunc <28 x i16> undef to <28 x i1>
467 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V32i16 = trunc <32 x i16> undef to <32 x i1>
468 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i16 = trunc <40 x i16> undef to <40 x i1>
469 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i16 = trunc <48 x i16> undef to <48 x i1>
470 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i16 = trunc <56 x i16> undef to <56 x i1>
471 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V64i16 = trunc <64 x i16> undef to <64 x i1>
472 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i16 = trunc <80 x i16> undef to <80 x i1>
473 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i16 = trunc <112 x i16> undef to <112 x i1>
474 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V128i16 = trunc <128 x i16> undef to <128 x i1>
475 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i16 = trunc <160 x i16> undef to <160 x i1>
476 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i16 = trunc <192 x i16> undef to <192 x i1>
477 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i16 = trunc <224 x i16> undef to <224 x i1>
478 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V256i16 = trunc <256 x i16> undef to <256 x i1>
479 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i16 = trunc <320 x i16> undef to <320 x i1>
480 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i16 = trunc <384 x i16> undef to <384 x i1>
481 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i16 = trunc <448 x i16> undef to <448 x i1>
482 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V512i16 = trunc <512 x i16> undef to <512 x i1>
483 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V640i16 = trunc <640 x i16> undef to <640 x i1>
484 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V768i16 = trunc <768 x i16> undef to <768 x i1>
485 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V896i16 = trunc <896 x i16> undef to <896 x i1>
486 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V1024i16 = trunc <1024 x i16> undef to <1024 x i1>
487 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i8 = trunc i8 undef to i1
488 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i8 = trunc <2 x i8> undef to <2 x i1>
489 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V3i8 = trunc <3 x i8> undef to <3 x i1>
490 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i8 = trunc <4 x i8> undef to <4 x i1>
491 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V5i8 = trunc <5 x i8> undef to <5 x i1>
492 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V6i8 = trunc <6 x i8> undef to <6 x i1>
493 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V7i8 = trunc <7 x i8> undef to <7 x i1>
494 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i8 = trunc <8 x i8> undef to <8 x i1>
495 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V10i8 = trunc <10 x i8> undef to <10 x i1>
496 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V12i8 = trunc <12 x i8> undef to <12 x i1>
497 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V14i8 = trunc <14 x i8> undef to <14 x i1>
498 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V16i8 = trunc <16 x i8> undef to <16 x i1>
499 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V20i8 = trunc <20 x i8> undef to <20 x i1>
500 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V24i8 = trunc <24 x i8> undef to <24 x i1>
501 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V28i8 = trunc <28 x i8> undef to <28 x i1>
502 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V32i8 = trunc <32 x i8> undef to <32 x i1>
503 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V40i8 = trunc <40 x i8> undef to <40 x i1>
504 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V48i8 = trunc <48 x i8> undef to <48 x i1>
505 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V56i8 = trunc <56 x i8> undef to <56 x i1>
506 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V64i8 = trunc <64 x i8> undef to <64 x i1>
507 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V80i8 = trunc <80 x i8> undef to <80 x i1>
508 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V112i8 = trunc <112 x i8> undef to <112 x i1>
509 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V128i8 = trunc <128 x i8> undef to <128 x i1>
510 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V160i8 = trunc <160 x i8> undef to <160 x i1>
511 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V192i8 = trunc <192 x i8> undef to <192 x i1>
512 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V224i8 = trunc <224 x i8> undef to <224 x i1>
513 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V256i8 = trunc <256 x i8> undef to <256 x i1>
514 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V320i8 = trunc <320 x i8> undef to <320 x i1>
515 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V384i8 = trunc <384 x i8> undef to <384 x i1>
516 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V448i8 = trunc <448 x i8> undef to <448 x i1>
517 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V512i8 = trunc <512 x i8> undef to <512 x i1>
518 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V640i8 = trunc <640 x i8> undef to <640 x i1>
519 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V768i8 = trunc <768 x i8> undef to <768 x i1>
520 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V896i8 = trunc <896 x i8> undef to <896 x i1>
521 ; SSE-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1024i8 = trunc <1024 x i8> undef to <1024 x i1>
522 ; SSE-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
523 ;
524 ; AVX-LABEL: 'trunc_vXi1'
525 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i64 = trunc i64 undef to i1
526 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V2i64 = trunc <2 x i64> undef to <2 x i1>
527 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V3i64 = trunc <3 x i64> undef to <3 x i1>
528 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i64 = trunc <4 x i64> undef to <4 x i1>
529 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V5i64 = trunc <5 x i64> undef to <5 x i1>
530 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V6i64 = trunc <6 x i64> undef to <6 x i1>
531 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V7i64 = trunc <7 x i64> undef to <7 x i1>
532 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i64 = trunc <8 x i64> undef to <8 x i1>
533 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i64 = trunc <10 x i64> undef to <10 x i1>
534 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i64 = trunc <12 x i64> undef to <12 x i1>
535 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i64 = trunc <14 x i64> undef to <14 x i1>
536 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i64 = trunc <16 x i64> undef to <16 x i1>
537 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i64 = trunc <20 x i64> undef to <20 x i1>
538 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i64 = trunc <24 x i64> undef to <24 x i1>
539 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i64 = trunc <28 x i64> undef to <28 x i1>
540 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V32i64 = trunc <32 x i64> undef to <32 x i1>
541 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i64 = trunc <40 x i64> undef to <40 x i1>
542 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i64 = trunc <48 x i64> undef to <48 x i1>
543 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i64 = trunc <56 x i64> undef to <56 x i1>
544 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V64i64 = trunc <64 x i64> undef to <64 x i1>
545 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i64 = trunc <80 x i64> undef to <80 x i1>
546 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i64 = trunc <112 x i64> undef to <112 x i1>
547 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V128i64 = trunc <128 x i64> undef to <128 x i1>
548 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i64 = trunc <160 x i64> undef to <160 x i1>
549 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i64 = trunc <192 x i64> undef to <192 x i1>
550 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i64 = trunc <224 x i64> undef to <224 x i1>
551 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V256i64 = trunc <256 x i64> undef to <256 x i1>
552 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i64 = trunc <320 x i64> undef to <320 x i1>
553 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i64 = trunc <384 x i64> undef to <384 x i1>
554 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i64 = trunc <448 x i64> undef to <448 x i1>
555 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V512i64 = trunc <512 x i64> undef to <512 x i1>
556 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V640i64 = trunc <640 x i64> undef to <640 x i1>
557 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V768i64 = trunc <768 x i64> undef to <768 x i1>
558 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V896i64 = trunc <896 x i64> undef to <896 x i1>
559 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1024i64 = trunc <1024 x i64> undef to <1024 x i1>
560 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i32 = trunc i32 undef to i1
561 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i32 = trunc <2 x i32> undef to <2 x i1>
562 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V3i32 = trunc <3 x i32> undef to <3 x i1>
563 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V4i32 = trunc <4 x i32> undef to <4 x i1>
564 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V5i32 = trunc <5 x i32> undef to <5 x i1>
565 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V6i32 = trunc <6 x i32> undef to <6 x i1>
566 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V7i32 = trunc <7 x i32> undef to <7 x i1>
567 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i32 = trunc <8 x i32> undef to <8 x i1>
568 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i32 = trunc <10 x i32> undef to <10 x i1>
569 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i32 = trunc <12 x i32> undef to <12 x i1>
570 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i32 = trunc <14 x i32> undef to <14 x i1>
571 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i32 = trunc <16 x i32> undef to <16 x i1>
572 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i32 = trunc <20 x i32> undef to <20 x i1>
573 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i32 = trunc <24 x i32> undef to <24 x i1>
574 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i32 = trunc <28 x i32> undef to <28 x i1>
575 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V32i32 = trunc <32 x i32> undef to <32 x i1>
576 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i32 = trunc <40 x i32> undef to <40 x i1>
577 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i32 = trunc <48 x i32> undef to <48 x i1>
578 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i32 = trunc <56 x i32> undef to <56 x i1>
579 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V64i32 = trunc <64 x i32> undef to <64 x i1>
580 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i32 = trunc <80 x i32> undef to <80 x i1>
581 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i32 = trunc <112 x i32> undef to <112 x i1>
582 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V128i32 = trunc <128 x i32> undef to <128 x i1>
583 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i32 = trunc <160 x i32> undef to <160 x i1>
584 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i32 = trunc <192 x i32> undef to <192 x i1>
585 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i32 = trunc <224 x i32> undef to <224 x i1>
586 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V256i32 = trunc <256 x i32> undef to <256 x i1>
587 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i32 = trunc <320 x i32> undef to <320 x i1>
588 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i32 = trunc <384 x i32> undef to <384 x i1>
589 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i32 = trunc <448 x i32> undef to <448 x i1>
590 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V512i32 = trunc <512 x i32> undef to <512 x i1>
591 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V640i32 = trunc <640 x i32> undef to <640 x i1>
592 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V768i32 = trunc <768 x i32> undef to <768 x i1>
593 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V896i32 = trunc <896 x i32> undef to <896 x i1>
594 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1024i32 = trunc <1024 x i32> undef to <1024 x i1>
595 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i16 = trunc i16 undef to i1
596 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i16 = trunc <2 x i16> undef to <2 x i1>
597 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V3i16 = trunc <3 x i16> undef to <3 x i1>
598 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i16 = trunc <4 x i16> undef to <4 x i1>
599 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V5i16 = trunc <5 x i16> undef to <5 x i1>
600 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V6i16 = trunc <6 x i16> undef to <6 x i1>
601 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V7i16 = trunc <7 x i16> undef to <7 x i1>
602 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V8i16 = trunc <8 x i16> undef to <8 x i1>
603 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V10i16 = trunc <10 x i16> undef to <10 x i1>
604 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V12i16 = trunc <12 x i16> undef to <12 x i1>
605 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V14i16 = trunc <14 x i16> undef to <14 x i1>
606 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V16i16 = trunc <16 x i16> undef to <16 x i1>
607 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V20i16 = trunc <20 x i16> undef to <20 x i1>
608 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V24i16 = trunc <24 x i16> undef to <24 x i1>
609 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V28i16 = trunc <28 x i16> undef to <28 x i1>
610 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V32i16 = trunc <32 x i16> undef to <32 x i1>
611 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V40i16 = trunc <40 x i16> undef to <40 x i1>
612 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V48i16 = trunc <48 x i16> undef to <48 x i1>
613 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V56i16 = trunc <56 x i16> undef to <56 x i1>
614 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V64i16 = trunc <64 x i16> undef to <64 x i1>
615 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V80i16 = trunc <80 x i16> undef to <80 x i1>
616 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V112i16 = trunc <112 x i16> undef to <112 x i1>
617 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V128i16 = trunc <128 x i16> undef to <128 x i1>
618 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V160i16 = trunc <160 x i16> undef to <160 x i1>
619 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V192i16 = trunc <192 x i16> undef to <192 x i1>
620 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V224i16 = trunc <224 x i16> undef to <224 x i1>
621 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V256i16 = trunc <256 x i16> undef to <256 x i1>
622 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V320i16 = trunc <320 x i16> undef to <320 x i1>
623 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V384i16 = trunc <384 x i16> undef to <384 x i1>
624 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V448i16 = trunc <448 x i16> undef to <448 x i1>
625 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V512i16 = trunc <512 x i16> undef to <512 x i1>
626 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V640i16 = trunc <640 x i16> undef to <640 x i1>
627 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V768i16 = trunc <768 x i16> undef to <768 x i1>
628 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V896i16 = trunc <896 x i16> undef to <896 x i1>
629 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1024i16 = trunc <1024 x i16> undef to <1024 x i1>
630 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %i8 = trunc i8 undef to i1
631 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V2i8 = trunc <2 x i8> undef to <2 x i1>
632 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V3i8 = trunc <3 x i8> undef to <3 x i1>
633 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V4i8 = trunc <4 x i8> undef to <4 x i1>
634 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V5i8 = trunc <5 x i8> undef to <5 x i1>
635 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V6i8 = trunc <6 x i8> undef to <6 x i1>
636 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V7i8 = trunc <7 x i8> undef to <7 x i1>
637 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: %V8i8 = trunc <8 x i8> undef to <8 x i1>
638 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V10i8 = trunc <10 x i8> undef to <10 x i1>
639 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V12i8 = trunc <12 x i8> undef to <12 x i1>
640 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V14i8 = trunc <14 x i8> undef to <14 x i1>
641 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V16i8 = trunc <16 x i8> undef to <16 x i1>
642 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V20i8 = trunc <20 x i8> undef to <20 x i1>
643 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V24i8 = trunc <24 x i8> undef to <24 x i1>
644 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V28i8 = trunc <28 x i8> undef to <28 x i1>
645 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V32i8 = trunc <32 x i8> undef to <32 x i1>
646 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V40i8 = trunc <40 x i8> undef to <40 x i1>
647 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V48i8 = trunc <48 x i8> undef to <48 x i1>
648 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V56i8 = trunc <56 x i8> undef to <56 x i1>
649 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V64i8 = trunc <64 x i8> undef to <64 x i1>
650 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V80i8 = trunc <80 x i8> undef to <80 x i1>
651 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V112i8 = trunc <112 x i8> undef to <112 x i1>
652 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V128i8 = trunc <128 x i8> undef to <128 x i1>
653 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V160i8 = trunc <160 x i8> undef to <160 x i1>
654 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V192i8 = trunc <192 x i8> undef to <192 x i1>
655 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V224i8 = trunc <224 x i8> undef to <224 x i1>
656 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V256i8 = trunc <256 x i8> undef to <256 x i1>
657 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V320i8 = trunc <320 x i8> undef to <320 x i1>
658 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V384i8 = trunc <384 x i8> undef to <384 x i1>
659 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V448i8 = trunc <448 x i8> undef to <448 x i1>
660 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V512i8 = trunc <512 x i8> undef to <512 x i1>
661 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V640i8 = trunc <640 x i8> undef to <640 x i1>
662 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V768i8 = trunc <768 x i8> undef to <768 x i1>
663 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V896i8 = trunc <896 x i8> undef to <896 x i1>
664 ; AVX-NEXT: Cost Model: Found an estimated cost of 0 for instruction: %V1024i8 = trunc <1024 x i8> undef to <1024 x i1>
665 ; AVX-NEXT: Cost Model: Found an estimated cost of 1 for instruction: ret i32 undef
666 ;
667 %i64 = trunc i64 undef to i1
668 %V2i64 = trunc <2 x i64> undef to <2 x i1>
669 %V3i64 = trunc <3 x i64> undef to <3 x i1>
670 %V4i64 = trunc <4 x i64> undef to <4 x i1>
671 %V5i64 = trunc <5 x i64> undef to <5 x i1>
672 %V6i64 = trunc <6 x i64> undef to <6 x i1>
673 %V7i64 = trunc <7 x i64> undef to <7 x i1>
674 %V8i64 = trunc <8 x i64> undef to <8 x i1>
675 %V10i64 = trunc <10 x i64> undef to <10 x i1>
676 %V12i64 = trunc <12 x i64> undef to <12 x i1>
677 %V14i64 = trunc <14 x i64> undef to <14 x i1>
678 %V16i64 = trunc <16 x i64> undef to <16 x i1>
679 %V20i64 = trunc <20 x i64> undef to <20 x i1>
680 %V24i64 = trunc <24 x i64> undef to <24 x i1>
681 %V28i64 = trunc <28 x i64> undef to <28 x i1>
682 %V32i64 = trunc <32 x i64> undef to <32 x i1>
683 %V40i64 = trunc <40 x i64> undef to <40 x i1>
684 %V48i64 = trunc <48 x i64> undef to <48 x i1>
685 %V56i64 = trunc <56 x i64> undef to <56 x i1>
686 %V64i64 = trunc <64 x i64> undef to <64 x i1>
687 %V80i64 = trunc <80 x i64> undef to <80 x i1>
688 %V112i64 = trunc <112 x i64> undef to <112 x i1>
689 %V128i64 = trunc <128 x i64> undef to <128 x i1>
690 %V160i64 = trunc <160 x i64> undef to <160 x i1>
691 %V192i64 = trunc <192 x i64> undef to <192 x i1>
692 %V224i64 = trunc <224 x i64> undef to <224 x i1>
693 %V256i64 = trunc <256 x i64> undef to <256 x i1>
694 %V320i64 = trunc <320 x i64> undef to <320 x i1>
695 %V384i64 = trunc <384 x i64> undef to <384 x i1>
696 %V448i64 = trunc <448 x i64> undef to <448 x i1>
697 %V512i64 = trunc <512 x i64> undef to <512 x i1>
698 %V640i64 = trunc <640 x i64> undef to <640 x i1>
699 %V768i64 = trunc <768 x i64> undef to <768 x i1>
700 %V896i64 = trunc <896 x i64> undef to <896 x i1>
701 %V1024i64 = trunc <1024 x i64> undef to <1024 x i1>
703 %i32 = trunc i32 undef to i1
704 %V2i32 = trunc <2 x i32> undef to <2 x i1>
705 %V3i32 = trunc <3 x i32> undef to <3 x i1>
706 %V4i32 = trunc <4 x i32> undef to <4 x i1>
707 %V5i32 = trunc <5 x i32> undef to <5 x i1>
708 %V6i32 = trunc <6 x i32> undef to <6 x i1>
709 %V7i32 = trunc <7 x i32> undef to <7 x i1>
710 %V8i32 = trunc <8 x i32> undef to <8 x i1>
711 %V10i32 = trunc <10 x i32> undef to <10 x i1>
712 %V12i32 = trunc <12 x i32> undef to <12 x i1>
713 %V14i32 = trunc <14 x i32> undef to <14 x i1>
714 %V16i32 = trunc <16 x i32> undef to <16 x i1>
715 %V20i32 = trunc <20 x i32> undef to <20 x i1>
716 %V24i32 = trunc <24 x i32> undef to <24 x i1>
717 %V28i32 = trunc <28 x i32> undef to <28 x i1>
718 %V32i32 = trunc <32 x i32> undef to <32 x i1>
719 %V40i32 = trunc <40 x i32> undef to <40 x i1>
720 %V48i32 = trunc <48 x i32> undef to <48 x i1>
721 %V56i32 = trunc <56 x i32> undef to <56 x i1>
722 %V64i32 = trunc <64 x i32> undef to <64 x i1>
723 %V80i32 = trunc <80 x i32> undef to <80 x i1>
724 %V112i32 = trunc <112 x i32> undef to <112 x i1>
725 %V128i32 = trunc <128 x i32> undef to <128 x i1>
726 %V160i32 = trunc <160 x i32> undef to <160 x i1>
727 %V192i32 = trunc <192 x i32> undef to <192 x i1>
728 %V224i32 = trunc <224 x i32> undef to <224 x i1>
729 %V256i32 = trunc <256 x i32> undef to <256 x i1>
730 %V320i32 = trunc <320 x i32> undef to <320 x i1>
731 %V384i32 = trunc <384 x i32> undef to <384 x i1>
732 %V448i32 = trunc <448 x i32> undef to <448 x i1>
733 %V512i32 = trunc <512 x i32> undef to <512 x i1>
734 %V640i32 = trunc <640 x i32> undef to <640 x i1>
735 %V768i32 = trunc <768 x i32> undef to <768 x i1>
736 %V896i32 = trunc <896 x i32> undef to <896 x i1>
737 %V1024i32 = trunc <1024 x i32> undef to <1024 x i1>
739 %i16 = trunc i16 undef to i1
740 %V2i16 = trunc <2 x i16> undef to <2 x i1>
741 %V3i16 = trunc <3 x i16> undef to <3 x i1>
742 %V4i16 = trunc <4 x i16> undef to <4 x i1>
743 %V5i16 = trunc <5 x i16> undef to <5 x i1>
744 %V6i16 = trunc <6 x i16> undef to <6 x i1>
745 %V7i16 = trunc <7 x i16> undef to <7 x i1>
746 %V8i16 = trunc <8 x i16> undef to <8 x i1>
747 %V10i16 = trunc <10 x i16> undef to <10 x i1>
748 %V12i16 = trunc <12 x i16> undef to <12 x i1>
749 %V14i16 = trunc <14 x i16> undef to <14 x i1>
750 %V16i16 = trunc <16 x i16> undef to <16 x i1>
751 %V20i16 = trunc <20 x i16> undef to <20 x i1>
752 %V24i16 = trunc <24 x i16> undef to <24 x i1>
753 %V28i16 = trunc <28 x i16> undef to <28 x i1>
754 %V32i16 = trunc <32 x i16> undef to <32 x i1>
755 %V40i16 = trunc <40 x i16> undef to <40 x i1>
756 %V48i16 = trunc <48 x i16> undef to <48 x i1>
757 %V56i16 = trunc <56 x i16> undef to <56 x i1>
758 %V64i16 = trunc <64 x i16> undef to <64 x i1>
759 %V80i16 = trunc <80 x i16> undef to <80 x i1>
760 %V112i16 = trunc <112 x i16> undef to <112 x i1>
761 %V128i16 = trunc <128 x i16> undef to <128 x i1>
762 %V160i16 = trunc <160 x i16> undef to <160 x i1>
763 %V192i16 = trunc <192 x i16> undef to <192 x i1>
764 %V224i16 = trunc <224 x i16> undef to <224 x i1>
765 %V256i16 = trunc <256 x i16> undef to <256 x i1>
766 %V320i16 = trunc <320 x i16> undef to <320 x i1>
767 %V384i16 = trunc <384 x i16> undef to <384 x i1>
768 %V448i16 = trunc <448 x i16> undef to <448 x i1>
769 %V512i16 = trunc <512 x i16> undef to <512 x i1>
770 %V640i16 = trunc <640 x i16> undef to <640 x i1>
771 %V768i16 = trunc <768 x i16> undef to <768 x i1>
772 %V896i16 = trunc <896 x i16> undef to <896 x i1>
773 %V1024i16 = trunc <1024 x i16> undef to <1024 x i1>
775 %i8 = trunc i8 undef to i1
776 %V2i8 = trunc <2 x i8> undef to <2 x i1>
777 %V3i8 = trunc <3 x i8> undef to <3 x i1>
778 %V4i8 = trunc <4 x i8> undef to <4 x i1>
779 %V5i8 = trunc <5 x i8> undef to <5 x i1>
780 %V6i8 = trunc <6 x i8> undef to <6 x i1>
781 %V7i8 = trunc <7 x i8> undef to <7 x i1>
782 %V8i8 = trunc <8 x i8> undef to <8 x i1>
783 %V10i8 = trunc <10 x i8> undef to <10 x i1>
784 %V12i8 = trunc <12 x i8> undef to <12 x i1>
785 %V14i8 = trunc <14 x i8> undef to <14 x i1>
786 %V16i8 = trunc <16 x i8> undef to <16 x i1>
787 %V20i8 = trunc <20 x i8> undef to <20 x i1>
788 %V24i8 = trunc <24 x i8> undef to <24 x i1>
789 %V28i8 = trunc <28 x i8> undef to <28 x i1>
790 %V32i8 = trunc <32 x i8> undef to <32 x i1>
791 %V40i8 = trunc <40 x i8> undef to <40 x i1>
792 %V48i8 = trunc <48 x i8> undef to <48 x i1>
793 %V56i8 = trunc <56 x i8> undef to <56 x i1>
794 %V64i8 = trunc <64 x i8> undef to <64 x i1>
795 %V80i8 = trunc <80 x i8> undef to <80 x i1>
796 %V112i8 = trunc <112 x i8> undef to <112 x i1>
797 %V128i8 = trunc <128 x i8> undef to <128 x i1>
798 %V160i8 = trunc <160 x i8> undef to <160 x i1>
799 %V192i8 = trunc <192 x i8> undef to <192 x i1>
800 %V224i8 = trunc <224 x i8> undef to <224 x i1>
801 %V256i8 = trunc <256 x i8> undef to <256 x i1>
802 %V320i8 = trunc <320 x i8> undef to <320 x i1>
803 %V384i8 = trunc <384 x i8> undef to <384 x i1>
804 %V448i8 = trunc <448 x i8> undef to <448 x i1>
805 %V512i8 = trunc <512 x i8> undef to <512 x i1>
806 %V640i8 = trunc <640 x i8> undef to <640 x i1>
807 %V768i8 = trunc <768 x i8> undef to <768 x i1>
808 %V896i8 = trunc <896 x i8> undef to <896 x i1>
809 %V1024i8 = trunc <1024 x i8> undef to <1024 x i1>
811 ret i32 undef
812 }
813 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
814 ; AVX256: {{.*}}
815 ; AVX512: {{.*}}