| blob | 0abdda5954f570f76b1438edd0047b175f3d2145 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-SD
3 ; RUN: llc -mtriple=aarch64-none-linux-gnu -mattr=+neon -global-isel %s -o - | FileCheck %s --check-prefixes=CHECK,CHECK-GI
5 define <8 x i8> @cmeq8xi8(<8 x i8> %A, <8 x i8> %B) {
6 ; CHECK-LABEL: cmeq8xi8:
7 ; CHECK: // %bb.0:
8 ; CHECK-NEXT: cmeq v0.8b, v0.8b, v1.8b
9 ; CHECK-NEXT: ret
10 %tmp3 = icmp eq <8 x i8> %A, %B;
11 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
12 ret <8 x i8> %tmp4
13 }
15 define <16 x i8> @cmeq16xi8(<16 x i8> %A, <16 x i8> %B) {
16 ; CHECK-LABEL: cmeq16xi8:
17 ; CHECK: // %bb.0:
18 ; CHECK-NEXT: cmeq v0.16b, v0.16b, v1.16b
19 ; CHECK-NEXT: ret
20 %tmp3 = icmp eq <16 x i8> %A, %B;
21 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
22 ret <16 x i8> %tmp4
23 }
25 define <4 x i16> @cmeq4xi16(<4 x i16> %A, <4 x i16> %B) {
26 ; CHECK-LABEL: cmeq4xi16:
27 ; CHECK: // %bb.0:
28 ; CHECK-NEXT: cmeq v0.4h, v0.4h, v1.4h
29 ; CHECK-NEXT: ret
30 %tmp3 = icmp eq <4 x i16> %A, %B;
31 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
32 ret <4 x i16> %tmp4
33 }
35 define <8 x i16> @cmeq8xi16(<8 x i16> %A, <8 x i16> %B) {
36 ; CHECK-LABEL: cmeq8xi16:
37 ; CHECK: // %bb.0:
38 ; CHECK-NEXT: cmeq v0.8h, v0.8h, v1.8h
39 ; CHECK-NEXT: ret
40 %tmp3 = icmp eq <8 x i16> %A, %B;
41 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
42 ret <8 x i16> %tmp4
43 }
45 define <2 x i32> @cmeq2xi32(<2 x i32> %A, <2 x i32> %B) {
46 ; CHECK-LABEL: cmeq2xi32:
47 ; CHECK: // %bb.0:
48 ; CHECK-NEXT: cmeq v0.2s, v0.2s, v1.2s
49 ; CHECK-NEXT: ret
50 %tmp3 = icmp eq <2 x i32> %A, %B;
51 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
52 ret <2 x i32> %tmp4
53 }
55 define <4 x i32> @cmeq4xi32(<4 x i32> %A, <4 x i32> %B) {
56 ; CHECK-LABEL: cmeq4xi32:
57 ; CHECK: // %bb.0:
58 ; CHECK-NEXT: cmeq v0.4s, v0.4s, v1.4s
59 ; CHECK-NEXT: ret
60 %tmp3 = icmp eq <4 x i32> %A, %B;
61 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
62 ret <4 x i32> %tmp4
63 }
65 define <2 x i64> @cmeq2xi64(<2 x i64> %A, <2 x i64> %B) {
66 ; CHECK-LABEL: cmeq2xi64:
67 ; CHECK: // %bb.0:
68 ; CHECK-NEXT: cmeq v0.2d, v0.2d, v1.2d
69 ; CHECK-NEXT: ret
70 %tmp3 = icmp eq <2 x i64> %A, %B;
71 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
72 ret <2 x i64> %tmp4
73 }
75 define <8 x i8> @cmne8xi8(<8 x i8> %A, <8 x i8> %B) {
76 ; CHECK-LABEL: cmne8xi8:
77 ; CHECK: // %bb.0:
78 ; CHECK-NEXT: cmeq v0.8b, v0.8b, v1.8b
79 ; CHECK-NEXT: mvn v0.8b, v0.8b
80 ; CHECK-NEXT: ret
81 %tmp3 = icmp ne <8 x i8> %A, %B;
82 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
83 ret <8 x i8> %tmp4
84 }
86 define <16 x i8> @cmne16xi8(<16 x i8> %A, <16 x i8> %B) {
87 ; CHECK-LABEL: cmne16xi8:
88 ; CHECK: // %bb.0:
89 ; CHECK-NEXT: cmeq v0.16b, v0.16b, v1.16b
90 ; CHECK-NEXT: mvn v0.16b, v0.16b
91 ; CHECK-NEXT: ret
92 %tmp3 = icmp ne <16 x i8> %A, %B;
93 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
94 ret <16 x i8> %tmp4
95 }
97 define <4 x i16> @cmne4xi16(<4 x i16> %A, <4 x i16> %B) {
98 ; CHECK-LABEL: cmne4xi16:
99 ; CHECK: // %bb.0:
100 ; CHECK-NEXT: cmeq v0.4h, v0.4h, v1.4h
101 ; CHECK-NEXT: mvn v0.8b, v0.8b
102 ; CHECK-NEXT: ret
103 %tmp3 = icmp ne <4 x i16> %A, %B;
104 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
105 ret <4 x i16> %tmp4
106 }
108 define <8 x i16> @cmne8xi16(<8 x i16> %A, <8 x i16> %B) {
109 ; CHECK-LABEL: cmne8xi16:
110 ; CHECK: // %bb.0:
111 ; CHECK-NEXT: cmeq v0.8h, v0.8h, v1.8h
112 ; CHECK-NEXT: mvn v0.16b, v0.16b
113 ; CHECK-NEXT: ret
114 %tmp3 = icmp ne <8 x i16> %A, %B;
115 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
116 ret <8 x i16> %tmp4
117 }
119 define <2 x i32> @cmne2xi32(<2 x i32> %A, <2 x i32> %B) {
120 ; CHECK-LABEL: cmne2xi32:
121 ; CHECK: // %bb.0:
122 ; CHECK-NEXT: cmeq v0.2s, v0.2s, v1.2s
123 ; CHECK-NEXT: mvn v0.8b, v0.8b
124 ; CHECK-NEXT: ret
125 %tmp3 = icmp ne <2 x i32> %A, %B;
126 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
127 ret <2 x i32> %tmp4
128 }
130 define <4 x i32> @cmne4xi32(<4 x i32> %A, <4 x i32> %B) {
131 ; CHECK-LABEL: cmne4xi32:
132 ; CHECK: // %bb.0:
133 ; CHECK-NEXT: cmeq v0.4s, v0.4s, v1.4s
134 ; CHECK-NEXT: mvn v0.16b, v0.16b
135 ; CHECK-NEXT: ret
136 %tmp3 = icmp ne <4 x i32> %A, %B;
137 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
138 ret <4 x i32> %tmp4
139 }
141 define <2 x i64> @cmne2xi64(<2 x i64> %A, <2 x i64> %B) {
142 ; CHECK-LABEL: cmne2xi64:
143 ; CHECK: // %bb.0:
144 ; CHECK-NEXT: cmeq v0.2d, v0.2d, v1.2d
145 ; CHECK-NEXT: mvn v0.16b, v0.16b
146 ; CHECK-NEXT: ret
147 %tmp3 = icmp ne <2 x i64> %A, %B;
148 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
149 ret <2 x i64> %tmp4
150 }
152 define <8 x i8> @cmgt8xi8(<8 x i8> %A, <8 x i8> %B) {
153 ; CHECK-LABEL: cmgt8xi8:
154 ; CHECK: // %bb.0:
155 ; CHECK-NEXT: cmgt v0.8b, v0.8b, v1.8b
156 ; CHECK-NEXT: ret
157 %tmp3 = icmp sgt <8 x i8> %A, %B;
158 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
159 ret <8 x i8> %tmp4
160 }
162 define <16 x i8> @cmgt16xi8(<16 x i8> %A, <16 x i8> %B) {
163 ; CHECK-LABEL: cmgt16xi8:
164 ; CHECK: // %bb.0:
165 ; CHECK-NEXT: cmgt v0.16b, v0.16b, v1.16b
166 ; CHECK-NEXT: ret
167 %tmp3 = icmp sgt <16 x i8> %A, %B;
168 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
169 ret <16 x i8> %tmp4
170 }
172 define <4 x i16> @cmgt4xi16(<4 x i16> %A, <4 x i16> %B) {
173 ; CHECK-LABEL: cmgt4xi16:
174 ; CHECK: // %bb.0:
175 ; CHECK-NEXT: cmgt v0.4h, v0.4h, v1.4h
176 ; CHECK-NEXT: ret
177 %tmp3 = icmp sgt <4 x i16> %A, %B;
178 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
179 ret <4 x i16> %tmp4
180 }
182 define <8 x i16> @cmgt8xi16(<8 x i16> %A, <8 x i16> %B) {
183 ; CHECK-LABEL: cmgt8xi16:
184 ; CHECK: // %bb.0:
185 ; CHECK-NEXT: cmgt v0.8h, v0.8h, v1.8h
186 ; CHECK-NEXT: ret
187 %tmp3 = icmp sgt <8 x i16> %A, %B;
188 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
189 ret <8 x i16> %tmp4
190 }
192 define <2 x i32> @cmgt2xi32(<2 x i32> %A, <2 x i32> %B) {
193 ; CHECK-LABEL: cmgt2xi32:
194 ; CHECK: // %bb.0:
195 ; CHECK-NEXT: cmgt v0.2s, v0.2s, v1.2s
196 ; CHECK-NEXT: ret
197 %tmp3 = icmp sgt <2 x i32> %A, %B;
198 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
199 ret <2 x i32> %tmp4
200 }
202 define <4 x i32> @cmgt4xi32(<4 x i32> %A, <4 x i32> %B) {
203 ; CHECK-LABEL: cmgt4xi32:
204 ; CHECK: // %bb.0:
205 ; CHECK-NEXT: cmgt v0.4s, v0.4s, v1.4s
206 ; CHECK-NEXT: ret
207 %tmp3 = icmp sgt <4 x i32> %A, %B;
208 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
209 ret <4 x i32> %tmp4
210 }
212 define <2 x i64> @cmgt2xi64(<2 x i64> %A, <2 x i64> %B) {
213 ; CHECK-LABEL: cmgt2xi64:
214 ; CHECK: // %bb.0:
215 ; CHECK-NEXT: cmgt v0.2d, v0.2d, v1.2d
216 ; CHECK-NEXT: ret
217 %tmp3 = icmp sgt <2 x i64> %A, %B;
218 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
219 ret <2 x i64> %tmp4
220 }
222 ; LT implemented as GT, so check reversed operands.
223 define <8 x i8> @cmlt8xi8(<8 x i8> %A, <8 x i8> %B) {
224 ; CHECK-LABEL: cmlt8xi8:
225 ; CHECK: // %bb.0:
226 ; CHECK-NEXT: cmgt v0.8b, v1.8b, v0.8b
227 ; CHECK-NEXT: ret
228 %tmp3 = icmp slt <8 x i8> %A, %B;
229 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
230 ret <8 x i8> %tmp4
231 }
233 ; LT implemented as GT, so check reversed operands.
234 define <16 x i8> @cmlt16xi8(<16 x i8> %A, <16 x i8> %B) {
235 ; CHECK-LABEL: cmlt16xi8:
236 ; CHECK: // %bb.0:
237 ; CHECK-NEXT: cmgt v0.16b, v1.16b, v0.16b
238 ; CHECK-NEXT: ret
239 %tmp3 = icmp slt <16 x i8> %A, %B;
240 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
241 ret <16 x i8> %tmp4
242 }
244 ; LT implemented as GT, so check reversed operands.
245 define <4 x i16> @cmlt4xi16(<4 x i16> %A, <4 x i16> %B) {
246 ; CHECK-LABEL: cmlt4xi16:
247 ; CHECK: // %bb.0:
248 ; CHECK-NEXT: cmgt v0.4h, v1.4h, v0.4h
249 ; CHECK-NEXT: ret
250 %tmp3 = icmp slt <4 x i16> %A, %B;
251 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
252 ret <4 x i16> %tmp4
253 }
255 ; LT implemented as GT, so check reversed operands.
256 define <8 x i16> @cmlt8xi16(<8 x i16> %A, <8 x i16> %B) {
257 ; CHECK-LABEL: cmlt8xi16:
258 ; CHECK: // %bb.0:
259 ; CHECK-NEXT: cmgt v0.8h, v1.8h, v0.8h
260 ; CHECK-NEXT: ret
261 %tmp3 = icmp slt <8 x i16> %A, %B;
262 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
263 ret <8 x i16> %tmp4
264 }
266 ; LT implemented as GT, so check reversed operands.
267 define <2 x i32> @cmlt2xi32(<2 x i32> %A, <2 x i32> %B) {
268 ; CHECK-LABEL: cmlt2xi32:
269 ; CHECK: // %bb.0:
270 ; CHECK-NEXT: cmgt v0.2s, v1.2s, v0.2s
271 ; CHECK-NEXT: ret
272 %tmp3 = icmp slt <2 x i32> %A, %B;
273 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
274 ret <2 x i32> %tmp4
275 }
277 ; LT implemented as GT, so check reversed operands.
278 define <4 x i32> @cmlt4xi32(<4 x i32> %A, <4 x i32> %B) {
279 ; CHECK-LABEL: cmlt4xi32:
280 ; CHECK: // %bb.0:
281 ; CHECK-NEXT: cmgt v0.4s, v1.4s, v0.4s
282 ; CHECK-NEXT: ret
283 %tmp3 = icmp slt <4 x i32> %A, %B;
284 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
285 ret <4 x i32> %tmp4
286 }
288 ; LT implemented as GT, so check reversed operands.
289 define <2 x i64> @cmlt2xi64(<2 x i64> %A, <2 x i64> %B) {
290 ; CHECK-LABEL: cmlt2xi64:
291 ; CHECK: // %bb.0:
292 ; CHECK-NEXT: cmgt v0.2d, v1.2d, v0.2d
293 ; CHECK-NEXT: ret
294 %tmp3 = icmp slt <2 x i64> %A, %B;
295 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
296 ret <2 x i64> %tmp4
297 }
299 define <8 x i8> @cmge8xi8(<8 x i8> %A, <8 x i8> %B) {
300 ; CHECK-LABEL: cmge8xi8:
301 ; CHECK: // %bb.0:
302 ; CHECK-NEXT: cmge v0.8b, v0.8b, v1.8b
303 ; CHECK-NEXT: ret
304 %tmp3 = icmp sge <8 x i8> %A, %B;
305 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
306 ret <8 x i8> %tmp4
307 }
309 define <16 x i8> @cmge16xi8(<16 x i8> %A, <16 x i8> %B) {
310 ; CHECK-LABEL: cmge16xi8:
311 ; CHECK: // %bb.0:
312 ; CHECK-NEXT: cmge v0.16b, v0.16b, v1.16b
313 ; CHECK-NEXT: ret
314 %tmp3 = icmp sge <16 x i8> %A, %B;
315 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
316 ret <16 x i8> %tmp4
317 }
319 define <4 x i16> @cmge4xi16(<4 x i16> %A, <4 x i16> %B) {
320 ; CHECK-LABEL: cmge4xi16:
321 ; CHECK: // %bb.0:
322 ; CHECK-NEXT: cmge v0.4h, v0.4h, v1.4h
323 ; CHECK-NEXT: ret
324 %tmp3 = icmp sge <4 x i16> %A, %B;
325 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
326 ret <4 x i16> %tmp4
327 }
329 define <8 x i16> @cmge8xi16(<8 x i16> %A, <8 x i16> %B) {
330 ; CHECK-LABEL: cmge8xi16:
331 ; CHECK: // %bb.0:
332 ; CHECK-NEXT: cmge v0.8h, v0.8h, v1.8h
333 ; CHECK-NEXT: ret
334 %tmp3 = icmp sge <8 x i16> %A, %B;
335 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
336 ret <8 x i16> %tmp4
337 }
339 define <2 x i32> @cmge2xi32(<2 x i32> %A, <2 x i32> %B) {
340 ; CHECK-LABEL: cmge2xi32:
341 ; CHECK: // %bb.0:
342 ; CHECK-NEXT: cmge v0.2s, v0.2s, v1.2s
343 ; CHECK-NEXT: ret
344 %tmp3 = icmp sge <2 x i32> %A, %B;
345 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
346 ret <2 x i32> %tmp4
347 }
349 define <4 x i32> @cmge4xi32(<4 x i32> %A, <4 x i32> %B) {
350 ; CHECK-LABEL: cmge4xi32:
351 ; CHECK: // %bb.0:
352 ; CHECK-NEXT: cmge v0.4s, v0.4s, v1.4s
353 ; CHECK-NEXT: ret
354 %tmp3 = icmp sge <4 x i32> %A, %B;
355 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
356 ret <4 x i32> %tmp4
357 }
359 define <2 x i64> @cmge2xi64(<2 x i64> %A, <2 x i64> %B) {
360 ; CHECK-LABEL: cmge2xi64:
361 ; CHECK: // %bb.0:
362 ; CHECK-NEXT: cmge v0.2d, v0.2d, v1.2d
363 ; CHECK-NEXT: ret
364 %tmp3 = icmp sge <2 x i64> %A, %B;
365 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
366 ret <2 x i64> %tmp4
367 }
369 ; LE implemented as GE, so check reversed operands.
370 define <8 x i8> @cmle8xi8(<8 x i8> %A, <8 x i8> %B) {
371 ; CHECK-LABEL: cmle8xi8:
372 ; CHECK: // %bb.0:
373 ; CHECK-NEXT: cmge v0.8b, v1.8b, v0.8b
374 ; CHECK-NEXT: ret
375 %tmp3 = icmp sle <8 x i8> %A, %B;
376 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
377 ret <8 x i8> %tmp4
378 }
380 ; LE implemented as GE, so check reversed operands.
381 define <16 x i8> @cmle16xi8(<16 x i8> %A, <16 x i8> %B) {
382 ; CHECK-LABEL: cmle16xi8:
383 ; CHECK: // %bb.0:
384 ; CHECK-NEXT: cmge v0.16b, v1.16b, v0.16b
385 ; CHECK-NEXT: ret
386 %tmp3 = icmp sle <16 x i8> %A, %B;
387 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
388 ret <16 x i8> %tmp4
389 }
391 ; LE implemented as GE, so check reversed operands.
392 define <4 x i16> @cmle4xi16(<4 x i16> %A, <4 x i16> %B) {
393 ; CHECK-LABEL: cmle4xi16:
394 ; CHECK: // %bb.0:
395 ; CHECK-NEXT: cmge v0.4h, v1.4h, v0.4h
396 ; CHECK-NEXT: ret
397 %tmp3 = icmp sle <4 x i16> %A, %B;
398 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
399 ret <4 x i16> %tmp4
400 }
402 ; LE implemented as GE, so check reversed operands.
403 define <8 x i16> @cmle8xi16(<8 x i16> %A, <8 x i16> %B) {
404 ; CHECK-LABEL: cmle8xi16:
405 ; CHECK: // %bb.0:
406 ; CHECK-NEXT: cmge v0.8h, v1.8h, v0.8h
407 ; CHECK-NEXT: ret
408 %tmp3 = icmp sle <8 x i16> %A, %B;
409 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
410 ret <8 x i16> %tmp4
411 }
413 ; LE implemented as GE, so check reversed operands.
414 define <2 x i32> @cmle2xi32(<2 x i32> %A, <2 x i32> %B) {
415 ; CHECK-LABEL: cmle2xi32:
416 ; CHECK: // %bb.0:
417 ; CHECK-NEXT: cmge v0.2s, v1.2s, v0.2s
418 ; CHECK-NEXT: ret
419 %tmp3 = icmp sle <2 x i32> %A, %B;
420 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
421 ret <2 x i32> %tmp4
422 }
424 ; LE implemented as GE, so check reversed operands.
425 define <4 x i32> @cmle4xi32(<4 x i32> %A, <4 x i32> %B) {
426 ; CHECK-LABEL: cmle4xi32:
427 ; CHECK: // %bb.0:
428 ; CHECK-NEXT: cmge v0.4s, v1.4s, v0.4s
429 ; CHECK-NEXT: ret
430 %tmp3 = icmp sle <4 x i32> %A, %B;
431 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
432 ret <4 x i32> %tmp4
433 }
435 ; LE implemented as GE, so check reversed operands.
436 define <2 x i64> @cmle2xi64(<2 x i64> %A, <2 x i64> %B) {
437 ; CHECK-LABEL: cmle2xi64:
438 ; CHECK: // %bb.0:
439 ; CHECK-NEXT: cmge v0.2d, v1.2d, v0.2d
440 ; CHECK-NEXT: ret
441 %tmp3 = icmp sle <2 x i64> %A, %B;
442 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
443 ret <2 x i64> %tmp4
444 }
446 define <8 x i8> @cmhi8xi8(<8 x i8> %A, <8 x i8> %B) {
447 ; CHECK-LABEL: cmhi8xi8:
448 ; CHECK: // %bb.0:
449 ; CHECK-NEXT: cmhi v0.8b, v0.8b, v1.8b
450 ; CHECK-NEXT: ret
451 %tmp3 = icmp ugt <8 x i8> %A, %B;
452 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
453 ret <8 x i8> %tmp4
454 }
456 define <16 x i8> @cmhi16xi8(<16 x i8> %A, <16 x i8> %B) {
457 ; CHECK-LABEL: cmhi16xi8:
458 ; CHECK: // %bb.0:
459 ; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b
460 ; CHECK-NEXT: ret
461 %tmp3 = icmp ugt <16 x i8> %A, %B;
462 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
463 ret <16 x i8> %tmp4
464 }
466 define <4 x i16> @cmhi4xi16(<4 x i16> %A, <4 x i16> %B) {
467 ; CHECK-LABEL: cmhi4xi16:
468 ; CHECK: // %bb.0:
469 ; CHECK-NEXT: cmhi v0.4h, v0.4h, v1.4h
470 ; CHECK-NEXT: ret
471 %tmp3 = icmp ugt <4 x i16> %A, %B;
472 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
473 ret <4 x i16> %tmp4
474 }
476 define <8 x i16> @cmhi8xi16(<8 x i16> %A, <8 x i16> %B) {
477 ; CHECK-LABEL: cmhi8xi16:
478 ; CHECK: // %bb.0:
479 ; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h
480 ; CHECK-NEXT: ret
481 %tmp3 = icmp ugt <8 x i16> %A, %B;
482 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
483 ret <8 x i16> %tmp4
484 }
486 define <2 x i32> @cmhi2xi32(<2 x i32> %A, <2 x i32> %B) {
487 ; CHECK-LABEL: cmhi2xi32:
488 ; CHECK: // %bb.0:
489 ; CHECK-NEXT: cmhi v0.2s, v0.2s, v1.2s
490 ; CHECK-NEXT: ret
491 %tmp3 = icmp ugt <2 x i32> %A, %B;
492 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
493 ret <2 x i32> %tmp4
494 }
496 define <4 x i32> @cmhi4xi32(<4 x i32> %A, <4 x i32> %B) {
497 ; CHECK-LABEL: cmhi4xi32:
498 ; CHECK: // %bb.0:
499 ; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s
500 ; CHECK-NEXT: ret
501 %tmp3 = icmp ugt <4 x i32> %A, %B;
502 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
503 ret <4 x i32> %tmp4
504 }
506 define <2 x i64> @cmhi2xi64(<2 x i64> %A, <2 x i64> %B) {
507 ; CHECK-LABEL: cmhi2xi64:
508 ; CHECK: // %bb.0:
509 ; CHECK-NEXT: cmhi v0.2d, v0.2d, v1.2d
510 ; CHECK-NEXT: ret
511 %tmp3 = icmp ugt <2 x i64> %A, %B;
512 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
513 ret <2 x i64> %tmp4
514 }
516 ; LO implemented as HI, so check reversed operands.
517 define <8 x i8> @cmlo8xi8(<8 x i8> %A, <8 x i8> %B) {
518 ; CHECK-LABEL: cmlo8xi8:
519 ; CHECK: // %bb.0:
520 ; CHECK-NEXT: cmhi v0.8b, v1.8b, v0.8b
521 ; CHECK-NEXT: ret
522 %tmp3 = icmp ult <8 x i8> %A, %B;
523 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
524 ret <8 x i8> %tmp4
525 }
527 ; LO implemented as HI, so check reversed operands.
528 define <16 x i8> @cmlo16xi8(<16 x i8> %A, <16 x i8> %B) {
529 ; CHECK-LABEL: cmlo16xi8:
530 ; CHECK: // %bb.0:
531 ; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b
532 ; CHECK-NEXT: ret
533 %tmp3 = icmp ult <16 x i8> %A, %B;
534 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
535 ret <16 x i8> %tmp4
536 }
538 ; LO implemented as HI, so check reversed operands.
539 define <4 x i16> @cmlo4xi16(<4 x i16> %A, <4 x i16> %B) {
540 ; CHECK-LABEL: cmlo4xi16:
541 ; CHECK: // %bb.0:
542 ; CHECK-NEXT: cmhi v0.4h, v1.4h, v0.4h
543 ; CHECK-NEXT: ret
544 %tmp3 = icmp ult <4 x i16> %A, %B;
545 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
546 ret <4 x i16> %tmp4
547 }
549 ; LO implemented as HI, so check reversed operands.
550 define <8 x i16> @cmlo8xi16(<8 x i16> %A, <8 x i16> %B) {
551 ; CHECK-LABEL: cmlo8xi16:
552 ; CHECK: // %bb.0:
553 ; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h
554 ; CHECK-NEXT: ret
555 %tmp3 = icmp ult <8 x i16> %A, %B;
556 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
557 ret <8 x i16> %tmp4
558 }
560 ; LO implemented as HI, so check reversed operands.
561 define <2 x i32> @cmlo2xi32(<2 x i32> %A, <2 x i32> %B) {
562 ; CHECK-LABEL: cmlo2xi32:
563 ; CHECK: // %bb.0:
564 ; CHECK-NEXT: cmhi v0.2s, v1.2s, v0.2s
565 ; CHECK-NEXT: ret
566 %tmp3 = icmp ult <2 x i32> %A, %B;
567 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
568 ret <2 x i32> %tmp4
569 }
571 ; LO implemented as HI, so check reversed operands.
572 define <4 x i32> @cmlo4xi32(<4 x i32> %A, <4 x i32> %B) {
573 ; CHECK-LABEL: cmlo4xi32:
574 ; CHECK: // %bb.0:
575 ; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s
576 ; CHECK-NEXT: ret
577 %tmp3 = icmp ult <4 x i32> %A, %B;
578 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
579 ret <4 x i32> %tmp4
580 }
582 ; LO implemented as HI, so check reversed operands.
583 define <2 x i64> @cmlo2xi64(<2 x i64> %A, <2 x i64> %B) {
584 ; CHECK-LABEL: cmlo2xi64:
585 ; CHECK: // %bb.0:
586 ; CHECK-NEXT: cmhi v0.2d, v1.2d, v0.2d
587 ; CHECK-NEXT: ret
588 %tmp3 = icmp ult <2 x i64> %A, %B;
589 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
590 ret <2 x i64> %tmp4
591 }
593 define <8 x i8> @cmhs8xi8(<8 x i8> %A, <8 x i8> %B) {
594 ; CHECK-LABEL: cmhs8xi8:
595 ; CHECK: // %bb.0:
596 ; CHECK-NEXT: cmhs v0.8b, v0.8b, v1.8b
597 ; CHECK-NEXT: ret
598 %tmp3 = icmp uge <8 x i8> %A, %B;
599 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
600 ret <8 x i8> %tmp4
601 }
603 define <16 x i8> @cmhs16xi8(<16 x i8> %A, <16 x i8> %B) {
604 ; CHECK-LABEL: cmhs16xi8:
605 ; CHECK: // %bb.0:
606 ; CHECK-NEXT: cmhs v0.16b, v0.16b, v1.16b
607 ; CHECK-NEXT: ret
608 %tmp3 = icmp uge <16 x i8> %A, %B;
609 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
610 ret <16 x i8> %tmp4
611 }
613 define <4 x i16> @cmhs4xi16(<4 x i16> %A, <4 x i16> %B) {
614 ; CHECK-LABEL: cmhs4xi16:
615 ; CHECK: // %bb.0:
616 ; CHECK-NEXT: cmhs v0.4h, v0.4h, v1.4h
617 ; CHECK-NEXT: ret
618 %tmp3 = icmp uge <4 x i16> %A, %B;
619 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
620 ret <4 x i16> %tmp4
621 }
623 define <8 x i16> @cmhs8xi16(<8 x i16> %A, <8 x i16> %B) {
624 ; CHECK-LABEL: cmhs8xi16:
625 ; CHECK: // %bb.0:
626 ; CHECK-NEXT: cmhs v0.8h, v0.8h, v1.8h
627 ; CHECK-NEXT: ret
628 %tmp3 = icmp uge <8 x i16> %A, %B;
629 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
630 ret <8 x i16> %tmp4
631 }
633 define <2 x i32> @cmhs2xi32(<2 x i32> %A, <2 x i32> %B) {
634 ; CHECK-LABEL: cmhs2xi32:
635 ; CHECK: // %bb.0:
636 ; CHECK-NEXT: cmhs v0.2s, v0.2s, v1.2s
637 ; CHECK-NEXT: ret
638 %tmp3 = icmp uge <2 x i32> %A, %B;
639 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
640 ret <2 x i32> %tmp4
641 }
643 define <4 x i32> @cmhs4xi32(<4 x i32> %A, <4 x i32> %B) {
644 ; CHECK-LABEL: cmhs4xi32:
645 ; CHECK: // %bb.0:
646 ; CHECK-NEXT: cmhs v0.4s, v0.4s, v1.4s
647 ; CHECK-NEXT: ret
648 %tmp3 = icmp uge <4 x i32> %A, %B;
649 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
650 ret <4 x i32> %tmp4
651 }
653 define <2 x i64> @cmhs2xi64(<2 x i64> %A, <2 x i64> %B) {
654 ; CHECK-LABEL: cmhs2xi64:
655 ; CHECK: // %bb.0:
656 ; CHECK-NEXT: cmhs v0.2d, v0.2d, v1.2d
657 ; CHECK-NEXT: ret
658 %tmp3 = icmp uge <2 x i64> %A, %B;
659 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
660 ret <2 x i64> %tmp4
661 }
663 ; LS implemented as HS, so check reversed operands.
664 define <8 x i8> @cmls8xi8(<8 x i8> %A, <8 x i8> %B) {
665 ; CHECK-LABEL: cmls8xi8:
666 ; CHECK: // %bb.0:
667 ; CHECK-NEXT: cmhs v0.8b, v1.8b, v0.8b
668 ; CHECK-NEXT: ret
669 %tmp3 = icmp ule <8 x i8> %A, %B;
670 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
671 ret <8 x i8> %tmp4
672 }
674 ; LS implemented as HS, so check reversed operands.
675 define <16 x i8> @cmls16xi8(<16 x i8> %A, <16 x i8> %B) {
676 ; CHECK-LABEL: cmls16xi8:
677 ; CHECK: // %bb.0:
678 ; CHECK-NEXT: cmhs v0.16b, v1.16b, v0.16b
679 ; CHECK-NEXT: ret
680 %tmp3 = icmp ule <16 x i8> %A, %B;
681 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
682 ret <16 x i8> %tmp4
683 }
685 ; LS implemented as HS, so check reversed operands.
686 define <4 x i16> @cmls4xi16(<4 x i16> %A, <4 x i16> %B) {
687 ; CHECK-LABEL: cmls4xi16:
688 ; CHECK: // %bb.0:
689 ; CHECK-NEXT: cmhs v0.4h, v1.4h, v0.4h
690 ; CHECK-NEXT: ret
691 %tmp3 = icmp ule <4 x i16> %A, %B;
692 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
693 ret <4 x i16> %tmp4
694 }
696 ; LS implemented as HS, so check reversed operands.
697 define <8 x i16> @cmls8xi16(<8 x i16> %A, <8 x i16> %B) {
698 ; CHECK-LABEL: cmls8xi16:
699 ; CHECK: // %bb.0:
700 ; CHECK-NEXT: cmhs v0.8h, v1.8h, v0.8h
701 ; CHECK-NEXT: ret
702 %tmp3 = icmp ule <8 x i16> %A, %B;
703 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
704 ret <8 x i16> %tmp4
705 }
707 ; LS implemented as HS, so check reversed operands.
708 define <2 x i32> @cmls2xi32(<2 x i32> %A, <2 x i32> %B) {
709 ; CHECK-LABEL: cmls2xi32:
710 ; CHECK: // %bb.0:
711 ; CHECK-NEXT: cmhs v0.2s, v1.2s, v0.2s
712 ; CHECK-NEXT: ret
713 %tmp3 = icmp ule <2 x i32> %A, %B;
714 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
715 ret <2 x i32> %tmp4
716 }
718 ; LS implemented as HS, so check reversed operands.
719 define <4 x i32> @cmls4xi32(<4 x i32> %A, <4 x i32> %B) {
720 ; CHECK-LABEL: cmls4xi32:
721 ; CHECK: // %bb.0:
722 ; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s
723 ; CHECK-NEXT: ret
724 %tmp3 = icmp ule <4 x i32> %A, %B;
725 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
726 ret <4 x i32> %tmp4
727 }
729 ; LS implemented as HS, so check reversed operands.
730 define <2 x i64> @cmls2xi64(<2 x i64> %A, <2 x i64> %B) {
731 ; CHECK-LABEL: cmls2xi64:
732 ; CHECK: // %bb.0:
733 ; CHECK-NEXT: cmhs v0.2d, v1.2d, v0.2d
734 ; CHECK-NEXT: ret
735 %tmp3 = icmp ule <2 x i64> %A, %B;
736 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
737 ret <2 x i64> %tmp4
738 }
740 define <8 x i8> @cmtst8xi8(<8 x i8> %A, <8 x i8> %B) {
741 ; CHECK-SD-LABEL: cmtst8xi8:
742 ; CHECK-SD: // %bb.0:
743 ; CHECK-SD-NEXT: cmtst v0.8b, v0.8b, v1.8b
744 ; CHECK-SD-NEXT: ret
745 ;
746 ; CHECK-GI-LABEL: cmtst8xi8:
747 ; CHECK-GI: // %bb.0:
748 ; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
749 ; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b
750 ; CHECK-GI-NEXT: cmeq v0.8b, v0.8b, v2.8b
751 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
752 ; CHECK-GI-NEXT: ret
753 %tmp3 = and <8 x i8> %A, %B
754 %tmp4 = icmp ne <8 x i8> %tmp3, zeroinitializer
755 %tmp5 = sext <8 x i1> %tmp4 to <8 x i8>
756 ret <8 x i8> %tmp5
757 }
759 define <16 x i8> @cmtst16xi8(<16 x i8> %A, <16 x i8> %B) {
760 ; CHECK-SD-LABEL: cmtst16xi8:
761 ; CHECK-SD: // %bb.0:
762 ; CHECK-SD-NEXT: cmtst v0.16b, v0.16b, v1.16b
763 ; CHECK-SD-NEXT: ret
764 ;
765 ; CHECK-GI-LABEL: cmtst16xi8:
766 ; CHECK-GI: // %bb.0:
767 ; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
768 ; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
769 ; CHECK-GI-NEXT: cmeq v0.16b, v0.16b, v2.16b
770 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
771 ; CHECK-GI-NEXT: ret
772 %tmp3 = and <16 x i8> %A, %B
773 %tmp4 = icmp ne <16 x i8> %tmp3, zeroinitializer
774 %tmp5 = sext <16 x i1> %tmp4 to <16 x i8>
775 ret <16 x i8> %tmp5
776 }
778 define <4 x i16> @cmtst4xi16(<4 x i16> %A, <4 x i16> %B) {
779 ; CHECK-SD-LABEL: cmtst4xi16:
780 ; CHECK-SD: // %bb.0:
781 ; CHECK-SD-NEXT: cmtst v0.4h, v0.4h, v1.4h
782 ; CHECK-SD-NEXT: ret
783 ;
784 ; CHECK-GI-LABEL: cmtst4xi16:
785 ; CHECK-GI: // %bb.0:
786 ; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
787 ; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b
788 ; CHECK-GI-NEXT: cmeq v0.4h, v0.4h, v2.4h
789 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
790 ; CHECK-GI-NEXT: ret
791 %tmp3 = and <4 x i16> %A, %B
792 %tmp4 = icmp ne <4 x i16> %tmp3, zeroinitializer
793 %tmp5 = sext <4 x i1> %tmp4 to <4 x i16>
794 ret <4 x i16> %tmp5
795 }
797 define <8 x i16> @cmtst8xi16(<8 x i16> %A, <8 x i16> %B) {
798 ; CHECK-SD-LABEL: cmtst8xi16:
799 ; CHECK-SD: // %bb.0:
800 ; CHECK-SD-NEXT: cmtst v0.8h, v0.8h, v1.8h
801 ; CHECK-SD-NEXT: ret
802 ;
803 ; CHECK-GI-LABEL: cmtst8xi16:
804 ; CHECK-GI: // %bb.0:
805 ; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
806 ; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
807 ; CHECK-GI-NEXT: cmeq v0.8h, v0.8h, v2.8h
808 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
809 ; CHECK-GI-NEXT: ret
810 %tmp3 = and <8 x i16> %A, %B
811 %tmp4 = icmp ne <8 x i16> %tmp3, zeroinitializer
812 %tmp5 = sext <8 x i1> %tmp4 to <8 x i16>
813 ret <8 x i16> %tmp5
814 }
816 define <2 x i32> @cmtst2xi32(<2 x i32> %A, <2 x i32> %B) {
817 ; CHECK-SD-LABEL: cmtst2xi32:
818 ; CHECK-SD: // %bb.0:
819 ; CHECK-SD-NEXT: cmtst v0.2s, v0.2s, v1.2s
820 ; CHECK-SD-NEXT: ret
821 ;
822 ; CHECK-GI-LABEL: cmtst2xi32:
823 ; CHECK-GI: // %bb.0:
824 ; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
825 ; CHECK-GI-NEXT: and v0.8b, v0.8b, v1.8b
826 ; CHECK-GI-NEXT: cmeq v0.2s, v0.2s, v2.2s
827 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
828 ; CHECK-GI-NEXT: ret
829 %tmp3 = and <2 x i32> %A, %B
830 %tmp4 = icmp ne <2 x i32> %tmp3, zeroinitializer
831 %tmp5 = sext <2 x i1> %tmp4 to <2 x i32>
832 ret <2 x i32> %tmp5
833 }
835 define <4 x i32> @cmtst4xi32(<4 x i32> %A, <4 x i32> %B) {
836 ; CHECK-SD-LABEL: cmtst4xi32:
837 ; CHECK-SD: // %bb.0:
838 ; CHECK-SD-NEXT: cmtst v0.4s, v0.4s, v1.4s
839 ; CHECK-SD-NEXT: ret
840 ;
841 ; CHECK-GI-LABEL: cmtst4xi32:
842 ; CHECK-GI: // %bb.0:
843 ; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
844 ; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
845 ; CHECK-GI-NEXT: cmeq v0.4s, v0.4s, v2.4s
846 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
847 ; CHECK-GI-NEXT: ret
848 %tmp3 = and <4 x i32> %A, %B
849 %tmp4 = icmp ne <4 x i32> %tmp3, zeroinitializer
850 %tmp5 = sext <4 x i1> %tmp4 to <4 x i32>
851 ret <4 x i32> %tmp5
852 }
854 define <2 x i64> @cmtst2xi64(<2 x i64> %A, <2 x i64> %B) {
855 ; CHECK-SD-LABEL: cmtst2xi64:
856 ; CHECK-SD: // %bb.0:
857 ; CHECK-SD-NEXT: cmtst v0.2d, v0.2d, v1.2d
858 ; CHECK-SD-NEXT: ret
859 ;
860 ; CHECK-GI-LABEL: cmtst2xi64:
861 ; CHECK-GI: // %bb.0:
862 ; CHECK-GI-NEXT: movi v2.2d, #0000000000000000
863 ; CHECK-GI-NEXT: and v0.16b, v0.16b, v1.16b
864 ; CHECK-GI-NEXT: cmeq v0.2d, v0.2d, v2.2d
865 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
866 ; CHECK-GI-NEXT: ret
867 %tmp3 = and <2 x i64> %A, %B
868 %tmp4 = icmp ne <2 x i64> %tmp3, zeroinitializer
869 %tmp5 = sext <2 x i1> %tmp4 to <2 x i64>
870 ret <2 x i64> %tmp5
871 }
875 define <8 x i8> @cmeqz8xi8(<8 x i8> %A) {
876 ; CHECK-SD-LABEL: cmeqz8xi8:
877 ; CHECK-SD: // %bb.0:
878 ; CHECK-SD-NEXT: cmeq v0.8b, v0.8b, #0
879 ; CHECK-SD-NEXT: ret
880 ;
881 ; CHECK-GI-LABEL: cmeqz8xi8:
882 ; CHECK-GI: // %bb.0:
883 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
884 ; CHECK-GI-NEXT: cmeq v0.8b, v0.8b, v1.8b
885 ; CHECK-GI-NEXT: ret
886 %tmp3 = icmp eq <8 x i8> %A, zeroinitializer;
887 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
888 ret <8 x i8> %tmp4
889 }
891 define <16 x i8> @cmeqz16xi8(<16 x i8> %A) {
892 ; CHECK-SD-LABEL: cmeqz16xi8:
893 ; CHECK-SD: // %bb.0:
894 ; CHECK-SD-NEXT: cmeq v0.16b, v0.16b, #0
895 ; CHECK-SD-NEXT: ret
896 ;
897 ; CHECK-GI-LABEL: cmeqz16xi8:
898 ; CHECK-GI: // %bb.0:
899 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
900 ; CHECK-GI-NEXT: cmeq v0.16b, v0.16b, v1.16b
901 ; CHECK-GI-NEXT: ret
902 %tmp3 = icmp eq <16 x i8> %A, zeroinitializer;
903 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
904 ret <16 x i8> %tmp4
905 }
907 define <4 x i16> @cmeqz4xi16(<4 x i16> %A) {
908 ; CHECK-SD-LABEL: cmeqz4xi16:
909 ; CHECK-SD: // %bb.0:
910 ; CHECK-SD-NEXT: cmeq v0.4h, v0.4h, #0
911 ; CHECK-SD-NEXT: ret
912 ;
913 ; CHECK-GI-LABEL: cmeqz4xi16:
914 ; CHECK-GI: // %bb.0:
915 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
916 ; CHECK-GI-NEXT: cmeq v0.4h, v0.4h, v1.4h
917 ; CHECK-GI-NEXT: ret
918 %tmp3 = icmp eq <4 x i16> %A, zeroinitializer;
919 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
920 ret <4 x i16> %tmp4
921 }
923 define <8 x i16> @cmeqz8xi16(<8 x i16> %A) {
924 ; CHECK-SD-LABEL: cmeqz8xi16:
925 ; CHECK-SD: // %bb.0:
926 ; CHECK-SD-NEXT: cmeq v0.8h, v0.8h, #0
927 ; CHECK-SD-NEXT: ret
928 ;
929 ; CHECK-GI-LABEL: cmeqz8xi16:
930 ; CHECK-GI: // %bb.0:
931 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
932 ; CHECK-GI-NEXT: cmeq v0.8h, v0.8h, v1.8h
933 ; CHECK-GI-NEXT: ret
934 %tmp3 = icmp eq <8 x i16> %A, zeroinitializer;
935 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
936 ret <8 x i16> %tmp4
937 }
939 define <2 x i32> @cmeqz2xi32(<2 x i32> %A) {
940 ; CHECK-SD-LABEL: cmeqz2xi32:
941 ; CHECK-SD: // %bb.0:
942 ; CHECK-SD-NEXT: cmeq v0.2s, v0.2s, #0
943 ; CHECK-SD-NEXT: ret
944 ;
945 ; CHECK-GI-LABEL: cmeqz2xi32:
946 ; CHECK-GI: // %bb.0:
947 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
948 ; CHECK-GI-NEXT: cmeq v0.2s, v0.2s, v1.2s
949 ; CHECK-GI-NEXT: ret
950 %tmp3 = icmp eq <2 x i32> %A, zeroinitializer;
951 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
952 ret <2 x i32> %tmp4
953 }
955 define <4 x i32> @cmeqz4xi32(<4 x i32> %A) {
956 ; CHECK-SD-LABEL: cmeqz4xi32:
957 ; CHECK-SD: // %bb.0:
958 ; CHECK-SD-NEXT: cmeq v0.4s, v0.4s, #0
959 ; CHECK-SD-NEXT: ret
960 ;
961 ; CHECK-GI-LABEL: cmeqz4xi32:
962 ; CHECK-GI: // %bb.0:
963 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
964 ; CHECK-GI-NEXT: cmeq v0.4s, v0.4s, v1.4s
965 ; CHECK-GI-NEXT: ret
966 %tmp3 = icmp eq <4 x i32> %A, zeroinitializer;
967 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
968 ret <4 x i32> %tmp4
969 }
971 define <2 x i64> @cmeqz2xi64(<2 x i64> %A) {
972 ; CHECK-SD-LABEL: cmeqz2xi64:
973 ; CHECK-SD: // %bb.0:
974 ; CHECK-SD-NEXT: cmeq v0.2d, v0.2d, #0
975 ; CHECK-SD-NEXT: ret
976 ;
977 ; CHECK-GI-LABEL: cmeqz2xi64:
978 ; CHECK-GI: // %bb.0:
979 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
980 ; CHECK-GI-NEXT: cmeq v0.2d, v0.2d, v1.2d
981 ; CHECK-GI-NEXT: ret
982 %tmp3 = icmp eq <2 x i64> %A, zeroinitializer;
983 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
984 ret <2 x i64> %tmp4
985 }
988 define <8 x i8> @cmgez8xi8(<8 x i8> %A) {
989 ; CHECK-SD-LABEL: cmgez8xi8:
990 ; CHECK-SD: // %bb.0:
991 ; CHECK-SD-NEXT: cmge v0.8b, v0.8b, #0
992 ; CHECK-SD-NEXT: ret
993 ;
994 ; CHECK-GI-LABEL: cmgez8xi8:
995 ; CHECK-GI: // %bb.0:
996 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
997 ; CHECK-GI-NEXT: cmge v0.8b, v0.8b, v1.8b
998 ; CHECK-GI-NEXT: ret
999 %tmp3 = icmp sge <8 x i8> %A, zeroinitializer;
1000 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
1001 ret <8 x i8> %tmp4
1002 }
1004 define <16 x i8> @cmgez16xi8(<16 x i8> %A) {
1005 ; CHECK-SD-LABEL: cmgez16xi8:
1006 ; CHECK-SD: // %bb.0:
1007 ; CHECK-SD-NEXT: cmge v0.16b, v0.16b, #0
1008 ; CHECK-SD-NEXT: ret
1009 ;
1010 ; CHECK-GI-LABEL: cmgez16xi8:
1011 ; CHECK-GI: // %bb.0:
1012 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1013 ; CHECK-GI-NEXT: cmge v0.16b, v0.16b, v1.16b
1014 ; CHECK-GI-NEXT: ret
1015 %tmp3 = icmp sge <16 x i8> %A, zeroinitializer;
1016 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
1017 ret <16 x i8> %tmp4
1018 }
1020 define <4 x i16> @cmgez4xi16(<4 x i16> %A) {
1021 ; CHECK-SD-LABEL: cmgez4xi16:
1022 ; CHECK-SD: // %bb.0:
1023 ; CHECK-SD-NEXT: cmge v0.4h, v0.4h, #0
1024 ; CHECK-SD-NEXT: ret
1025 ;
1026 ; CHECK-GI-LABEL: cmgez4xi16:
1027 ; CHECK-GI: // %bb.0:
1028 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1029 ; CHECK-GI-NEXT: cmge v0.4h, v0.4h, v1.4h
1030 ; CHECK-GI-NEXT: ret
1031 %tmp3 = icmp sge <4 x i16> %A, zeroinitializer;
1032 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
1033 ret <4 x i16> %tmp4
1034 }
1036 define <8 x i16> @cmgez8xi16(<8 x i16> %A) {
1037 ; CHECK-SD-LABEL: cmgez8xi16:
1038 ; CHECK-SD: // %bb.0:
1039 ; CHECK-SD-NEXT: cmge v0.8h, v0.8h, #0
1040 ; CHECK-SD-NEXT: ret
1041 ;
1042 ; CHECK-GI-LABEL: cmgez8xi16:
1043 ; CHECK-GI: // %bb.0:
1044 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1045 ; CHECK-GI-NEXT: cmge v0.8h, v0.8h, v1.8h
1046 ; CHECK-GI-NEXT: ret
1047 %tmp3 = icmp sge <8 x i16> %A, zeroinitializer;
1048 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
1049 ret <8 x i16> %tmp4
1050 }
1052 define <2 x i32> @cmgez2xi32(<2 x i32> %A) {
1053 ; CHECK-SD-LABEL: cmgez2xi32:
1054 ; CHECK-SD: // %bb.0:
1055 ; CHECK-SD-NEXT: cmge v0.2s, v0.2s, #0
1056 ; CHECK-SD-NEXT: ret
1057 ;
1058 ; CHECK-GI-LABEL: cmgez2xi32:
1059 ; CHECK-GI: // %bb.0:
1060 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1061 ; CHECK-GI-NEXT: cmge v0.2s, v0.2s, v1.2s
1062 ; CHECK-GI-NEXT: ret
1063 %tmp3 = icmp sge <2 x i32> %A, zeroinitializer;
1064 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
1065 ret <2 x i32> %tmp4
1066 }
1068 define <4 x i32> @cmgez4xi32(<4 x i32> %A) {
1069 ; CHECK-SD-LABEL: cmgez4xi32:
1070 ; CHECK-SD: // %bb.0:
1071 ; CHECK-SD-NEXT: cmge v0.4s, v0.4s, #0
1072 ; CHECK-SD-NEXT: ret
1073 ;
1074 ; CHECK-GI-LABEL: cmgez4xi32:
1075 ; CHECK-GI: // %bb.0:
1076 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1077 ; CHECK-GI-NEXT: cmge v0.4s, v0.4s, v1.4s
1078 ; CHECK-GI-NEXT: ret
1079 %tmp3 = icmp sge <4 x i32> %A, zeroinitializer;
1080 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
1081 ret <4 x i32> %tmp4
1082 }
1084 define <2 x i64> @cmgez2xi64(<2 x i64> %A) {
1085 ; CHECK-SD-LABEL: cmgez2xi64:
1086 ; CHECK-SD: // %bb.0:
1087 ; CHECK-SD-NEXT: cmge v0.2d, v0.2d, #0
1088 ; CHECK-SD-NEXT: ret
1089 ;
1090 ; CHECK-GI-LABEL: cmgez2xi64:
1091 ; CHECK-GI: // %bb.0:
1092 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1093 ; CHECK-GI-NEXT: cmge v0.2d, v0.2d, v1.2d
1094 ; CHECK-GI-NEXT: ret
1095 %tmp3 = icmp sge <2 x i64> %A, zeroinitializer;
1096 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
1097 ret <2 x i64> %tmp4
1098 }
1101 define <8 x i8> @cmgez8xi8_alt(<8 x i8> %A) {
1102 ; CHECK-SD-LABEL: cmgez8xi8_alt:
1103 ; CHECK-SD: // %bb.0:
1104 ; CHECK-SD-NEXT: cmge v0.8b, v0.8b, #0
1105 ; CHECK-SD-NEXT: ret
1106 ;
1107 ; CHECK-GI-LABEL: cmgez8xi8_alt:
1108 ; CHECK-GI: // %bb.0:
1109 ; CHECK-GI-NEXT: sshr v0.8b, v0.8b, #7
1110 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
1111 ; CHECK-GI-NEXT: ret
1112 %sign = ashr <8 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
1113 %not = xor <8 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
1114 ret <8 x i8> %not
1115 }
1117 define <16 x i8> @cmgez16xi8_alt(<16 x i8> %A) {
1118 ; CHECK-SD-LABEL: cmgez16xi8_alt:
1119 ; CHECK-SD: // %bb.0:
1120 ; CHECK-SD-NEXT: cmge v0.16b, v0.16b, #0
1121 ; CHECK-SD-NEXT: ret
1122 ;
1123 ; CHECK-GI-LABEL: cmgez16xi8_alt:
1124 ; CHECK-GI: // %bb.0:
1125 ; CHECK-GI-NEXT: sshr v0.16b, v0.16b, #7
1126 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
1127 ; CHECK-GI-NEXT: ret
1128 %sign = ashr <16 x i8> %A, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
1129 %not = xor <16 x i8> %sign, <i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1, i8 -1>
1130 ret <16 x i8> %not
1131 }
1133 define <4 x i16> @cmgez4xi16_alt(<4 x i16> %A) {
1134 ; CHECK-SD-LABEL: cmgez4xi16_alt:
1135 ; CHECK-SD: // %bb.0:
1136 ; CHECK-SD-NEXT: cmge v0.4h, v0.4h, #0
1137 ; CHECK-SD-NEXT: ret
1138 ;
1139 ; CHECK-GI-LABEL: cmgez4xi16_alt:
1140 ; CHECK-GI: // %bb.0:
1141 ; CHECK-GI-NEXT: sshr v0.4h, v0.4h, #15
1142 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
1143 ; CHECK-GI-NEXT: ret
1144 %sign = ashr <4 x i16> %A, <i16 15, i16 15, i16 15, i16 15>
1145 %not = xor <4 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1>
1146 ret <4 x i16> %not
1147 }
1149 define <8 x i16> @cmgez8xi16_alt(<8 x i16> %A) {
1150 ; CHECK-SD-LABEL: cmgez8xi16_alt:
1151 ; CHECK-SD: // %bb.0:
1152 ; CHECK-SD-NEXT: cmge v0.8h, v0.8h, #0
1153 ; CHECK-SD-NEXT: ret
1154 ;
1155 ; CHECK-GI-LABEL: cmgez8xi16_alt:
1156 ; CHECK-GI: // %bb.0:
1157 ; CHECK-GI-NEXT: sshr v0.8h, v0.8h, #15
1158 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
1159 ; CHECK-GI-NEXT: ret
1160 %sign = ashr <8 x i16> %A, <i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15, i16 15>
1161 %not = xor <8 x i16> %sign, <i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1, i16 -1>
1162 ret <8 x i16> %not
1163 }
1165 define <2 x i32> @cmgez2xi32_alt(<2 x i32> %A) {
1166 ; CHECK-SD-LABEL: cmgez2xi32_alt:
1167 ; CHECK-SD: // %bb.0:
1168 ; CHECK-SD-NEXT: cmge v0.2s, v0.2s, #0
1169 ; CHECK-SD-NEXT: ret
1170 ;
1171 ; CHECK-GI-LABEL: cmgez2xi32_alt:
1172 ; CHECK-GI: // %bb.0:
1173 ; CHECK-GI-NEXT: sshr v0.2s, v0.2s, #31
1174 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
1175 ; CHECK-GI-NEXT: ret
1176 %sign = ashr <2 x i32> %A, <i32 31, i32 31>
1177 %not = xor <2 x i32> %sign, <i32 -1, i32 -1>
1178 ret <2 x i32> %not
1179 }
1181 define <4 x i32> @cmgez4xi32_alt(<4 x i32> %A) {
1182 ; CHECK-SD-LABEL: cmgez4xi32_alt:
1183 ; CHECK-SD: // %bb.0:
1184 ; CHECK-SD-NEXT: cmge v0.4s, v0.4s, #0
1185 ; CHECK-SD-NEXT: ret
1186 ;
1187 ; CHECK-GI-LABEL: cmgez4xi32_alt:
1188 ; CHECK-GI: // %bb.0:
1189 ; CHECK-GI-NEXT: sshr v0.4s, v0.4s, #31
1190 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
1191 ; CHECK-GI-NEXT: ret
1192 %sign = ashr <4 x i32> %A, <i32 31, i32 31, i32 31, i32 31>
1193 %not = xor <4 x i32> %sign, <i32 -1, i32 -1, i32 -1, i32 -1>
1194 ret <4 x i32> %not
1195 }
1197 define <2 x i64> @cmgez2xi64_alt(<2 x i64> %A) {
1198 ; CHECK-SD-LABEL: cmgez2xi64_alt:
1199 ; CHECK-SD: // %bb.0:
1200 ; CHECK-SD-NEXT: cmge v0.2d, v0.2d, #0
1201 ; CHECK-SD-NEXT: ret
1202 ;
1203 ; CHECK-GI-LABEL: cmgez2xi64_alt:
1204 ; CHECK-GI: // %bb.0:
1205 ; CHECK-GI-NEXT: sshr v0.2d, v0.2d, #63
1206 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
1207 ; CHECK-GI-NEXT: ret
1208 %sign = ashr <2 x i64> %A, <i64 63, i64 63>
1209 %not = xor <2 x i64> %sign, <i64 -1, i64 -1>
1210 ret <2 x i64> %not
1211 }
1214 define <8 x i8> @cmgtz8xi8(<8 x i8> %A) {
1215 ; CHECK-SD-LABEL: cmgtz8xi8:
1216 ; CHECK-SD: // %bb.0:
1217 ; CHECK-SD-NEXT: cmgt v0.8b, v0.8b, #0
1218 ; CHECK-SD-NEXT: ret
1219 ;
1220 ; CHECK-GI-LABEL: cmgtz8xi8:
1221 ; CHECK-GI: // %bb.0:
1222 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1223 ; CHECK-GI-NEXT: cmgt v0.8b, v0.8b, v1.8b
1224 ; CHECK-GI-NEXT: ret
1225 %tmp3 = icmp sgt <8 x i8> %A, zeroinitializer;
1226 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
1227 ret <8 x i8> %tmp4
1228 }
1230 define <16 x i8> @cmgtz16xi8(<16 x i8> %A) {
1231 ; CHECK-SD-LABEL: cmgtz16xi8:
1232 ; CHECK-SD: // %bb.0:
1233 ; CHECK-SD-NEXT: cmgt v0.16b, v0.16b, #0
1234 ; CHECK-SD-NEXT: ret
1235 ;
1236 ; CHECK-GI-LABEL: cmgtz16xi8:
1237 ; CHECK-GI: // %bb.0:
1238 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1239 ; CHECK-GI-NEXT: cmgt v0.16b, v0.16b, v1.16b
1240 ; CHECK-GI-NEXT: ret
1241 %tmp3 = icmp sgt <16 x i8> %A, zeroinitializer;
1242 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
1243 ret <16 x i8> %tmp4
1244 }
1246 define <4 x i16> @cmgtz4xi16(<4 x i16> %A) {
1247 ; CHECK-SD-LABEL: cmgtz4xi16:
1248 ; CHECK-SD: // %bb.0:
1249 ; CHECK-SD-NEXT: cmgt v0.4h, v0.4h, #0
1250 ; CHECK-SD-NEXT: ret
1251 ;
1252 ; CHECK-GI-LABEL: cmgtz4xi16:
1253 ; CHECK-GI: // %bb.0:
1254 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1255 ; CHECK-GI-NEXT: cmgt v0.4h, v0.4h, v1.4h
1256 ; CHECK-GI-NEXT: ret
1257 %tmp3 = icmp sgt <4 x i16> %A, zeroinitializer;
1258 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
1259 ret <4 x i16> %tmp4
1260 }
1262 define <8 x i16> @cmgtz8xi16(<8 x i16> %A) {
1263 ; CHECK-SD-LABEL: cmgtz8xi16:
1264 ; CHECK-SD: // %bb.0:
1265 ; CHECK-SD-NEXT: cmgt v0.8h, v0.8h, #0
1266 ; CHECK-SD-NEXT: ret
1267 ;
1268 ; CHECK-GI-LABEL: cmgtz8xi16:
1269 ; CHECK-GI: // %bb.0:
1270 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1271 ; CHECK-GI-NEXT: cmgt v0.8h, v0.8h, v1.8h
1272 ; CHECK-GI-NEXT: ret
1273 %tmp3 = icmp sgt <8 x i16> %A, zeroinitializer;
1274 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
1275 ret <8 x i16> %tmp4
1276 }
1278 define <2 x i32> @cmgtz2xi32(<2 x i32> %A) {
1279 ; CHECK-SD-LABEL: cmgtz2xi32:
1280 ; CHECK-SD: // %bb.0:
1281 ; CHECK-SD-NEXT: cmgt v0.2s, v0.2s, #0
1282 ; CHECK-SD-NEXT: ret
1283 ;
1284 ; CHECK-GI-LABEL: cmgtz2xi32:
1285 ; CHECK-GI: // %bb.0:
1286 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1287 ; CHECK-GI-NEXT: cmgt v0.2s, v0.2s, v1.2s
1288 ; CHECK-GI-NEXT: ret
1289 %tmp3 = icmp sgt <2 x i32> %A, zeroinitializer;
1290 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
1291 ret <2 x i32> %tmp4
1292 }
1294 define <4 x i32> @cmgtz4xi32(<4 x i32> %A) {
1295 ; CHECK-SD-LABEL: cmgtz4xi32:
1296 ; CHECK-SD: // %bb.0:
1297 ; CHECK-SD-NEXT: cmgt v0.4s, v0.4s, #0
1298 ; CHECK-SD-NEXT: ret
1299 ;
1300 ; CHECK-GI-LABEL: cmgtz4xi32:
1301 ; CHECK-GI: // %bb.0:
1302 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1303 ; CHECK-GI-NEXT: cmgt v0.4s, v0.4s, v1.4s
1304 ; CHECK-GI-NEXT: ret
1305 %tmp3 = icmp sgt <4 x i32> %A, zeroinitializer;
1306 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
1307 ret <4 x i32> %tmp4
1308 }
1310 define <2 x i64> @cmgtz2xi64(<2 x i64> %A) {
1311 ; CHECK-SD-LABEL: cmgtz2xi64:
1312 ; CHECK-SD: // %bb.0:
1313 ; CHECK-SD-NEXT: cmgt v0.2d, v0.2d, #0
1314 ; CHECK-SD-NEXT: ret
1315 ;
1316 ; CHECK-GI-LABEL: cmgtz2xi64:
1317 ; CHECK-GI: // %bb.0:
1318 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1319 ; CHECK-GI-NEXT: cmgt v0.2d, v0.2d, v1.2d
1320 ; CHECK-GI-NEXT: ret
1321 %tmp3 = icmp sgt <2 x i64> %A, zeroinitializer;
1322 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
1323 ret <2 x i64> %tmp4
1324 }
1326 define <8 x i8> @cmlez8xi8(<8 x i8> %A) {
1327 ; CHECK-SD-LABEL: cmlez8xi8:
1328 ; CHECK-SD: // %bb.0:
1329 ; CHECK-SD-NEXT: cmle v0.8b, v0.8b, #0
1330 ; CHECK-SD-NEXT: ret
1331 ;
1332 ; CHECK-GI-LABEL: cmlez8xi8:
1333 ; CHECK-GI: // %bb.0:
1334 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1335 ; CHECK-GI-NEXT: cmge v0.8b, v1.8b, v0.8b
1336 ; CHECK-GI-NEXT: ret
1337 %tmp3 = icmp sle <8 x i8> %A, zeroinitializer;
1338 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
1339 ret <8 x i8> %tmp4
1340 }
1342 define <16 x i8> @cmlez16xi8(<16 x i8> %A) {
1343 ; CHECK-SD-LABEL: cmlez16xi8:
1344 ; CHECK-SD: // %bb.0:
1345 ; CHECK-SD-NEXT: cmle v0.16b, v0.16b, #0
1346 ; CHECK-SD-NEXT: ret
1347 ;
1348 ; CHECK-GI-LABEL: cmlez16xi8:
1349 ; CHECK-GI: // %bb.0:
1350 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1351 ; CHECK-GI-NEXT: cmge v0.16b, v1.16b, v0.16b
1352 ; CHECK-GI-NEXT: ret
1353 %tmp3 = icmp sle <16 x i8> %A, zeroinitializer;
1354 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
1355 ret <16 x i8> %tmp4
1356 }
1358 define <4 x i16> @cmlez4xi16(<4 x i16> %A) {
1359 ; CHECK-SD-LABEL: cmlez4xi16:
1360 ; CHECK-SD: // %bb.0:
1361 ; CHECK-SD-NEXT: cmle v0.4h, v0.4h, #0
1362 ; CHECK-SD-NEXT: ret
1363 ;
1364 ; CHECK-GI-LABEL: cmlez4xi16:
1365 ; CHECK-GI: // %bb.0:
1366 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1367 ; CHECK-GI-NEXT: cmge v0.4h, v1.4h, v0.4h
1368 ; CHECK-GI-NEXT: ret
1369 %tmp3 = icmp sle <4 x i16> %A, zeroinitializer;
1370 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
1371 ret <4 x i16> %tmp4
1372 }
1374 define <8 x i16> @cmlez8xi16(<8 x i16> %A) {
1375 ; CHECK-SD-LABEL: cmlez8xi16:
1376 ; CHECK-SD: // %bb.0:
1377 ; CHECK-SD-NEXT: cmle v0.8h, v0.8h, #0
1378 ; CHECK-SD-NEXT: ret
1379 ;
1380 ; CHECK-GI-LABEL: cmlez8xi16:
1381 ; CHECK-GI: // %bb.0:
1382 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1383 ; CHECK-GI-NEXT: cmge v0.8h, v1.8h, v0.8h
1384 ; CHECK-GI-NEXT: ret
1385 %tmp3 = icmp sle <8 x i16> %A, zeroinitializer;
1386 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
1387 ret <8 x i16> %tmp4
1388 }
1390 define <2 x i32> @cmlez2xi32(<2 x i32> %A) {
1391 ; CHECK-SD-LABEL: cmlez2xi32:
1392 ; CHECK-SD: // %bb.0:
1393 ; CHECK-SD-NEXT: cmle v0.2s, v0.2s, #0
1394 ; CHECK-SD-NEXT: ret
1395 ;
1396 ; CHECK-GI-LABEL: cmlez2xi32:
1397 ; CHECK-GI: // %bb.0:
1398 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1399 ; CHECK-GI-NEXT: cmge v0.2s, v1.2s, v0.2s
1400 ; CHECK-GI-NEXT: ret
1401 %tmp3 = icmp sle <2 x i32> %A, zeroinitializer;
1402 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
1403 ret <2 x i32> %tmp4
1404 }
1406 define <4 x i32> @cmlez4xi32(<4 x i32> %A) {
1407 ; CHECK-SD-LABEL: cmlez4xi32:
1408 ; CHECK-SD: // %bb.0:
1409 ; CHECK-SD-NEXT: cmle v0.4s, v0.4s, #0
1410 ; CHECK-SD-NEXT: ret
1411 ;
1412 ; CHECK-GI-LABEL: cmlez4xi32:
1413 ; CHECK-GI: // %bb.0:
1414 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1415 ; CHECK-GI-NEXT: cmge v0.4s, v1.4s, v0.4s
1416 ; CHECK-GI-NEXT: ret
1417 %tmp3 = icmp sle <4 x i32> %A, zeroinitializer;
1418 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
1419 ret <4 x i32> %tmp4
1420 }
1422 define <2 x i64> @cmlez2xi64(<2 x i64> %A) {
1423 ; CHECK-SD-LABEL: cmlez2xi64:
1424 ; CHECK-SD: // %bb.0:
1425 ; CHECK-SD-NEXT: cmle v0.2d, v0.2d, #0
1426 ; CHECK-SD-NEXT: ret
1427 ;
1428 ; CHECK-GI-LABEL: cmlez2xi64:
1429 ; CHECK-GI: // %bb.0:
1430 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1431 ; CHECK-GI-NEXT: cmge v0.2d, v1.2d, v0.2d
1432 ; CHECK-GI-NEXT: ret
1433 %tmp3 = icmp sle <2 x i64> %A, zeroinitializer;
1434 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
1435 ret <2 x i64> %tmp4
1436 }
1438 define <8 x i8> @cmltz8xi8(<8 x i8> %A) {
1439 ; CHECK-SD-LABEL: cmltz8xi8:
1440 ; CHECK-SD: // %bb.0:
1441 ; CHECK-SD-NEXT: cmlt v0.8b, v0.8b, #0
1442 ; CHECK-SD-NEXT: ret
1443 ;
1444 ; CHECK-GI-LABEL: cmltz8xi8:
1445 ; CHECK-GI: // %bb.0:
1446 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1447 ; CHECK-GI-NEXT: cmgt v0.8b, v1.8b, v0.8b
1448 ; CHECK-GI-NEXT: ret
1449 %tmp3 = icmp slt <8 x i8> %A, zeroinitializer;
1450 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
1451 ret <8 x i8> %tmp4
1452 }
1454 define <16 x i8> @cmltz16xi8(<16 x i8> %A) {
1455 ; CHECK-SD-LABEL: cmltz16xi8:
1456 ; CHECK-SD: // %bb.0:
1457 ; CHECK-SD-NEXT: cmlt v0.16b, v0.16b, #0
1458 ; CHECK-SD-NEXT: ret
1459 ;
1460 ; CHECK-GI-LABEL: cmltz16xi8:
1461 ; CHECK-GI: // %bb.0:
1462 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1463 ; CHECK-GI-NEXT: cmgt v0.16b, v1.16b, v0.16b
1464 ; CHECK-GI-NEXT: ret
1465 %tmp3 = icmp slt <16 x i8> %A, zeroinitializer;
1466 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
1467 ret <16 x i8> %tmp4
1468 }
1470 define <4 x i16> @cmltz4xi16(<4 x i16> %A) {
1471 ; CHECK-SD-LABEL: cmltz4xi16:
1472 ; CHECK-SD: // %bb.0:
1473 ; CHECK-SD-NEXT: cmlt v0.4h, v0.4h, #0
1474 ; CHECK-SD-NEXT: ret
1475 ;
1476 ; CHECK-GI-LABEL: cmltz4xi16:
1477 ; CHECK-GI: // %bb.0:
1478 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1479 ; CHECK-GI-NEXT: cmgt v0.4h, v1.4h, v0.4h
1480 ; CHECK-GI-NEXT: ret
1481 %tmp3 = icmp slt <4 x i16> %A, zeroinitializer;
1482 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
1483 ret <4 x i16> %tmp4
1484 }
1486 define <8 x i16> @cmltz8xi16(<8 x i16> %A) {
1487 ; CHECK-SD-LABEL: cmltz8xi16:
1488 ; CHECK-SD: // %bb.0:
1489 ; CHECK-SD-NEXT: cmlt v0.8h, v0.8h, #0
1490 ; CHECK-SD-NEXT: ret
1491 ;
1492 ; CHECK-GI-LABEL: cmltz8xi16:
1493 ; CHECK-GI: // %bb.0:
1494 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1495 ; CHECK-GI-NEXT: cmgt v0.8h, v1.8h, v0.8h
1496 ; CHECK-GI-NEXT: ret
1497 %tmp3 = icmp slt <8 x i16> %A, zeroinitializer;
1498 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
1499 ret <8 x i16> %tmp4
1500 }
1502 define <2 x i32> @cmltz2xi32(<2 x i32> %A) {
1503 ; CHECK-SD-LABEL: cmltz2xi32:
1504 ; CHECK-SD: // %bb.0:
1505 ; CHECK-SD-NEXT: cmlt v0.2s, v0.2s, #0
1506 ; CHECK-SD-NEXT: ret
1507 ;
1508 ; CHECK-GI-LABEL: cmltz2xi32:
1509 ; CHECK-GI: // %bb.0:
1510 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1511 ; CHECK-GI-NEXT: cmgt v0.2s, v1.2s, v0.2s
1512 ; CHECK-GI-NEXT: ret
1513 %tmp3 = icmp slt <2 x i32> %A, zeroinitializer;
1514 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
1515 ret <2 x i32> %tmp4
1516 }
1518 define <4 x i32> @cmltz4xi32(<4 x i32> %A) {
1519 ; CHECK-SD-LABEL: cmltz4xi32:
1520 ; CHECK-SD: // %bb.0:
1521 ; CHECK-SD-NEXT: cmlt v0.4s, v0.4s, #0
1522 ; CHECK-SD-NEXT: ret
1523 ;
1524 ; CHECK-GI-LABEL: cmltz4xi32:
1525 ; CHECK-GI: // %bb.0:
1526 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1527 ; CHECK-GI-NEXT: cmgt v0.4s, v1.4s, v0.4s
1528 ; CHECK-GI-NEXT: ret
1529 %tmp3 = icmp slt <4 x i32> %A, zeroinitializer;
1530 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
1531 ret <4 x i32> %tmp4
1532 }
1534 define <2 x i64> @cmltz2xi64(<2 x i64> %A) {
1535 ; CHECK-SD-LABEL: cmltz2xi64:
1536 ; CHECK-SD: // %bb.0:
1537 ; CHECK-SD-NEXT: cmlt v0.2d, v0.2d, #0
1538 ; CHECK-SD-NEXT: ret
1539 ;
1540 ; CHECK-GI-LABEL: cmltz2xi64:
1541 ; CHECK-GI: // %bb.0:
1542 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1543 ; CHECK-GI-NEXT: cmgt v0.2d, v1.2d, v0.2d
1544 ; CHECK-GI-NEXT: ret
1545 %tmp3 = icmp slt <2 x i64> %A, zeroinitializer;
1546 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
1547 ret <2 x i64> %tmp4
1548 }
1550 define <8 x i8> @cmneqz8xi8(<8 x i8> %A) {
1551 ; CHECK-SD-LABEL: cmneqz8xi8:
1552 ; CHECK-SD: // %bb.0:
1553 ; CHECK-SD-NEXT: cmtst v0.8b, v0.8b, v0.8b
1554 ; CHECK-SD-NEXT: ret
1555 ;
1556 ; CHECK-GI-LABEL: cmneqz8xi8:
1557 ; CHECK-GI: // %bb.0:
1558 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1559 ; CHECK-GI-NEXT: cmeq v0.8b, v0.8b, v1.8b
1560 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
1561 ; CHECK-GI-NEXT: ret
1562 %tmp3 = icmp ne <8 x i8> %A, zeroinitializer;
1563 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
1564 ret <8 x i8> %tmp4
1565 }
1567 define <16 x i8> @cmneqz16xi8(<16 x i8> %A) {
1568 ; CHECK-SD-LABEL: cmneqz16xi8:
1569 ; CHECK-SD: // %bb.0:
1570 ; CHECK-SD-NEXT: cmtst v0.16b, v0.16b, v0.16b
1571 ; CHECK-SD-NEXT: ret
1572 ;
1573 ; CHECK-GI-LABEL: cmneqz16xi8:
1574 ; CHECK-GI: // %bb.0:
1575 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1576 ; CHECK-GI-NEXT: cmeq v0.16b, v0.16b, v1.16b
1577 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
1578 ; CHECK-GI-NEXT: ret
1579 %tmp3 = icmp ne <16 x i8> %A, zeroinitializer;
1580 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
1581 ret <16 x i8> %tmp4
1582 }
1584 define <4 x i16> @cmneqz4xi16(<4 x i16> %A) {
1585 ; CHECK-SD-LABEL: cmneqz4xi16:
1586 ; CHECK-SD: // %bb.0:
1587 ; CHECK-SD-NEXT: cmtst v0.4h, v0.4h, v0.4h
1588 ; CHECK-SD-NEXT: ret
1589 ;
1590 ; CHECK-GI-LABEL: cmneqz4xi16:
1591 ; CHECK-GI: // %bb.0:
1592 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1593 ; CHECK-GI-NEXT: cmeq v0.4h, v0.4h, v1.4h
1594 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
1595 ; CHECK-GI-NEXT: ret
1596 %tmp3 = icmp ne <4 x i16> %A, zeroinitializer;
1597 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
1598 ret <4 x i16> %tmp4
1599 }
1601 define <8 x i16> @cmneqz8xi16(<8 x i16> %A) {
1602 ; CHECK-SD-LABEL: cmneqz8xi16:
1603 ; CHECK-SD: // %bb.0:
1604 ; CHECK-SD-NEXT: cmtst v0.8h, v0.8h, v0.8h
1605 ; CHECK-SD-NEXT: ret
1606 ;
1607 ; CHECK-GI-LABEL: cmneqz8xi16:
1608 ; CHECK-GI: // %bb.0:
1609 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1610 ; CHECK-GI-NEXT: cmeq v0.8h, v0.8h, v1.8h
1611 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
1612 ; CHECK-GI-NEXT: ret
1613 %tmp3 = icmp ne <8 x i16> %A, zeroinitializer;
1614 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
1615 ret <8 x i16> %tmp4
1616 }
1618 define <2 x i32> @cmneqz2xi32(<2 x i32> %A) {
1619 ; CHECK-SD-LABEL: cmneqz2xi32:
1620 ; CHECK-SD: // %bb.0:
1621 ; CHECK-SD-NEXT: cmtst v0.2s, v0.2s, v0.2s
1622 ; CHECK-SD-NEXT: ret
1623 ;
1624 ; CHECK-GI-LABEL: cmneqz2xi32:
1625 ; CHECK-GI: // %bb.0:
1626 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1627 ; CHECK-GI-NEXT: cmeq v0.2s, v0.2s, v1.2s
1628 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
1629 ; CHECK-GI-NEXT: ret
1630 %tmp3 = icmp ne <2 x i32> %A, zeroinitializer;
1631 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
1632 ret <2 x i32> %tmp4
1633 }
1635 define <4 x i32> @cmneqz4xi32(<4 x i32> %A) {
1636 ; CHECK-SD-LABEL: cmneqz4xi32:
1637 ; CHECK-SD: // %bb.0:
1638 ; CHECK-SD-NEXT: cmtst v0.4s, v0.4s, v0.4s
1639 ; CHECK-SD-NEXT: ret
1640 ;
1641 ; CHECK-GI-LABEL: cmneqz4xi32:
1642 ; CHECK-GI: // %bb.0:
1643 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1644 ; CHECK-GI-NEXT: cmeq v0.4s, v0.4s, v1.4s
1645 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
1646 ; CHECK-GI-NEXT: ret
1647 %tmp3 = icmp ne <4 x i32> %A, zeroinitializer;
1648 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
1649 ret <4 x i32> %tmp4
1650 }
1652 define <2 x i64> @cmneqz2xi64(<2 x i64> %A) {
1653 ; CHECK-SD-LABEL: cmneqz2xi64:
1654 ; CHECK-SD: // %bb.0:
1655 ; CHECK-SD-NEXT: cmtst v0.2d, v0.2d, v0.2d
1656 ; CHECK-SD-NEXT: ret
1657 ;
1658 ; CHECK-GI-LABEL: cmneqz2xi64:
1659 ; CHECK-GI: // %bb.0:
1660 ; CHECK-GI-NEXT: movi v1.2d, #0000000000000000
1661 ; CHECK-GI-NEXT: cmeq v0.2d, v0.2d, v1.2d
1662 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
1663 ; CHECK-GI-NEXT: ret
1664 %tmp3 = icmp ne <2 x i64> %A, zeroinitializer;
1665 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
1666 ret <2 x i64> %tmp4
1667 }
1669 define <8 x i8> @cmhsz8xi8(<8 x i8> %A) {
1670 ; CHECK-LABEL: cmhsz8xi8:
1671 ; CHECK: // %bb.0:
1672 ; CHECK-NEXT: movi v1.8b, #2
1673 ; CHECK-NEXT: cmhs v0.8b, v0.8b, v1.8b
1674 ; CHECK-NEXT: ret
1675 %tmp3 = icmp uge <8 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
1676 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
1677 ret <8 x i8> %tmp4
1678 }
1680 define <16 x i8> @cmhsz16xi8(<16 x i8> %A) {
1681 ; CHECK-LABEL: cmhsz16xi8:
1682 ; CHECK: // %bb.0:
1683 ; CHECK-NEXT: movi v1.16b, #2
1684 ; CHECK-NEXT: cmhs v0.16b, v0.16b, v1.16b
1685 ; CHECK-NEXT: ret
1686 %tmp3 = icmp uge <16 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
1687 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
1688 ret <16 x i8> %tmp4
1689 }
1691 define <4 x i16> @cmhsz4xi16(<4 x i16> %A) {
1692 ; CHECK-LABEL: cmhsz4xi16:
1693 ; CHECK: // %bb.0:
1694 ; CHECK-NEXT: movi v1.4h, #2
1695 ; CHECK-NEXT: cmhs v0.4h, v0.4h, v1.4h
1696 ; CHECK-NEXT: ret
1697 %tmp3 = icmp uge <4 x i16> %A, <i16 2, i16 2, i16 2, i16 2>
1698 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
1699 ret <4 x i16> %tmp4
1700 }
1702 define <8 x i16> @cmhsz8xi16(<8 x i16> %A) {
1703 ; CHECK-LABEL: cmhsz8xi16:
1704 ; CHECK: // %bb.0:
1705 ; CHECK-NEXT: movi v1.8h, #2
1706 ; CHECK-NEXT: cmhs v0.8h, v0.8h, v1.8h
1707 ; CHECK-NEXT: ret
1708 %tmp3 = icmp uge <8 x i16> %A, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
1709 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
1710 ret <8 x i16> %tmp4
1711 }
1713 define <2 x i32> @cmhsz2xi32(<2 x i32> %A) {
1714 ; CHECK-LABEL: cmhsz2xi32:
1715 ; CHECK: // %bb.0:
1716 ; CHECK-NEXT: movi v1.2s, #2
1717 ; CHECK-NEXT: cmhs v0.2s, v0.2s, v1.2s
1718 ; CHECK-NEXT: ret
1719 %tmp3 = icmp uge <2 x i32> %A, <i32 2, i32 2>
1720 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
1721 ret <2 x i32> %tmp4
1722 }
1724 define <4 x i32> @cmhsz4xi32(<4 x i32> %A) {
1725 ; CHECK-LABEL: cmhsz4xi32:
1726 ; CHECK: // %bb.0:
1727 ; CHECK-NEXT: movi v1.4s, #2
1728 ; CHECK-NEXT: cmhs v0.4s, v0.4s, v1.4s
1729 ; CHECK-NEXT: ret
1730 %tmp3 = icmp uge <4 x i32> %A, <i32 2, i32 2, i32 2, i32 2>
1731 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
1732 ret <4 x i32> %tmp4
1733 }
1735 define <2 x i64> @cmhsz2xi64(<2 x i64> %A) {
1736 ; CHECK-SD-LABEL: cmhsz2xi64:
1737 ; CHECK-SD: // %bb.0:
1738 ; CHECK-SD-NEXT: mov w8, #2 // =0x2
1739 ; CHECK-SD-NEXT: dup v1.2d, x8
1740 ; CHECK-SD-NEXT: cmhs v0.2d, v0.2d, v1.2d
1741 ; CHECK-SD-NEXT: ret
1742 ;
1743 ; CHECK-GI-LABEL: cmhsz2xi64:
1744 ; CHECK-GI: // %bb.0:
1745 ; CHECK-GI-NEXT: adrp x8, .LCPI132_0
1746 ; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI132_0]
1747 ; CHECK-GI-NEXT: cmhs v0.2d, v0.2d, v1.2d
1748 ; CHECK-GI-NEXT: ret
1749 ; GISEL-LABEL: cmhsz2xi64:
1750 ; GISEL: // %bb.0:
1751 ; GISEL-NEXT: adrp x8, .LCPI132_0
1752 ; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI132_0]
1753 ; GISEL-NEXT: cmhs v0.2d, v0.2d, v1.2d
1754 ; GISEL-NEXT: ret
1755 %tmp3 = icmp uge <2 x i64> %A, <i64 2, i64 2>
1756 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
1757 ret <2 x i64> %tmp4
1758 }
1761 define <8 x i8> @cmhiz8xi8(<8 x i8> %A) {
1762 ; CHECK-LABEL: cmhiz8xi8:
1763 ; CHECK: // %bb.0:
1764 ; CHECK-NEXT: movi v1.8b, #1
1765 ; CHECK-NEXT: cmhi v0.8b, v0.8b, v1.8b
1766 ; CHECK-NEXT: ret
1767 %tmp3 = icmp ugt <8 x i8> %A, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
1768 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
1769 ret <8 x i8> %tmp4
1770 }
1772 define <16 x i8> @cmhiz16xi8(<16 x i8> %A) {
1773 ; CHECK-LABEL: cmhiz16xi8:
1774 ; CHECK: // %bb.0:
1775 ; CHECK-NEXT: movi v1.16b, #1
1776 ; CHECK-NEXT: cmhi v0.16b, v0.16b, v1.16b
1777 ; CHECK-NEXT: ret
1778 %tmp3 = icmp ugt <16 x i8> %A, <i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1, i8 1>
1779 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
1780 ret <16 x i8> %tmp4
1781 }
1783 define <4 x i16> @cmhiz4xi16(<4 x i16> %A) {
1784 ; CHECK-LABEL: cmhiz4xi16:
1785 ; CHECK: // %bb.0:
1786 ; CHECK-NEXT: movi v1.4h, #1
1787 ; CHECK-NEXT: cmhi v0.4h, v0.4h, v1.4h
1788 ; CHECK-NEXT: ret
1789 %tmp3 = icmp ugt <4 x i16> %A, <i16 1, i16 1, i16 1, i16 1>
1790 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
1791 ret <4 x i16> %tmp4
1792 }
1794 define <8 x i16> @cmhiz8xi16(<8 x i16> %A) {
1795 ; CHECK-LABEL: cmhiz8xi16:
1796 ; CHECK: // %bb.0:
1797 ; CHECK-NEXT: movi v1.8h, #1
1798 ; CHECK-NEXT: cmhi v0.8h, v0.8h, v1.8h
1799 ; CHECK-NEXT: ret
1800 %tmp3 = icmp ugt <8 x i16> %A, <i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1, i16 1>
1801 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
1802 ret <8 x i16> %tmp4
1803 }
1805 define <2 x i32> @cmhiz2xi32(<2 x i32> %A) {
1806 ; CHECK-LABEL: cmhiz2xi32:
1807 ; CHECK: // %bb.0:
1808 ; CHECK-NEXT: movi v1.2s, #1
1809 ; CHECK-NEXT: cmhi v0.2s, v0.2s, v1.2s
1810 ; CHECK-NEXT: ret
1811 %tmp3 = icmp ugt <2 x i32> %A, <i32 1, i32 1>
1812 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
1813 ret <2 x i32> %tmp4
1814 }
1816 define <4 x i32> @cmhiz4xi32(<4 x i32> %A) {
1817 ; CHECK-LABEL: cmhiz4xi32:
1818 ; CHECK: // %bb.0:
1819 ; CHECK-NEXT: movi v1.4s, #1
1820 ; CHECK-NEXT: cmhi v0.4s, v0.4s, v1.4s
1821 ; CHECK-NEXT: ret
1822 %tmp3 = icmp ugt <4 x i32> %A, <i32 1, i32 1, i32 1, i32 1>
1823 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
1824 ret <4 x i32> %tmp4
1825 }
1827 define <2 x i64> @cmhiz2xi64(<2 x i64> %A) {
1828 ; CHECK-SD-LABEL: cmhiz2xi64:
1829 ; CHECK-SD: // %bb.0:
1830 ; CHECK-SD-NEXT: mov w8, #1 // =0x1
1831 ; CHECK-SD-NEXT: dup v1.2d, x8
1832 ; CHECK-SD-NEXT: cmhi v0.2d, v0.2d, v1.2d
1833 ; CHECK-SD-NEXT: ret
1834 ;
1835 ; CHECK-GI-LABEL: cmhiz2xi64:
1836 ; CHECK-GI: // %bb.0:
1837 ; CHECK-GI-NEXT: adrp x8, .LCPI139_0
1838 ; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI139_0]
1839 ; CHECK-GI-NEXT: cmhi v0.2d, v0.2d, v1.2d
1840 ; CHECK-GI-NEXT: ret
1841 ; GISEL-LABEL: cmhiz2xi64:
1842 ; GISEL: // %bb.0:
1843 ; GISEL-NEXT: adrp x8, .LCPI139_0
1844 ; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI139_0]
1845 ; GISEL-NEXT: cmhi v0.2d, v0.2d, v1.2d
1846 ; GISEL-NEXT: ret
1847 %tmp3 = icmp ugt <2 x i64> %A, <i64 1, i64 1>
1848 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
1849 ret <2 x i64> %tmp4
1850 }
1852 ; LS implemented as HS, so check reversed operands.
1853 define <8 x i8> @cmlsz8xi8(<8 x i8> %A) {
1854 ; CHECK-LABEL: cmlsz8xi8:
1855 ; CHECK: // %bb.0:
1856 ; CHECK-NEXT: movi v1.2d, #0000000000000000
1857 ; CHECK-NEXT: cmhs v0.8b, v1.8b, v0.8b
1858 ; CHECK-NEXT: ret
1859 %tmp3 = icmp ule <8 x i8> %A, zeroinitializer;
1860 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
1861 ret <8 x i8> %tmp4
1862 }
1864 ; LS implemented as HS, so check reversed operands.
1865 define <16 x i8> @cmlsz16xi8(<16 x i8> %A) {
1866 ; CHECK-LABEL: cmlsz16xi8:
1867 ; CHECK: // %bb.0:
1868 ; CHECK-NEXT: movi v1.2d, #0000000000000000
1869 ; CHECK-NEXT: cmhs v0.16b, v1.16b, v0.16b
1870 ; CHECK-NEXT: ret
1871 %tmp3 = icmp ule <16 x i8> %A, zeroinitializer;
1872 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
1873 ret <16 x i8> %tmp4
1874 }
1876 ; LS implemented as HS, so check reversed operands.
1877 define <4 x i16> @cmlsz4xi16(<4 x i16> %A) {
1878 ; CHECK-LABEL: cmlsz4xi16:
1879 ; CHECK: // %bb.0:
1880 ; CHECK-NEXT: movi v1.2d, #0000000000000000
1881 ; CHECK-NEXT: cmhs v0.4h, v1.4h, v0.4h
1882 ; CHECK-NEXT: ret
1883 %tmp3 = icmp ule <4 x i16> %A, zeroinitializer;
1884 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
1885 ret <4 x i16> %tmp4
1886 }
1888 ; LS implemented as HS, so check reversed operands.
1889 define <8 x i16> @cmlsz8xi16(<8 x i16> %A) {
1890 ; CHECK-LABEL: cmlsz8xi16:
1891 ; CHECK: // %bb.0:
1892 ; CHECK-NEXT: movi v1.2d, #0000000000000000
1893 ; CHECK-NEXT: cmhs v0.8h, v1.8h, v0.8h
1894 ; CHECK-NEXT: ret
1895 %tmp3 = icmp ule <8 x i16> %A, zeroinitializer;
1896 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
1897 ret <8 x i16> %tmp4
1898 }
1900 ; LS implemented as HS, so check reversed operands.
1901 define <2 x i32> @cmlsz2xi32(<2 x i32> %A) {
1902 ; CHECK-LABEL: cmlsz2xi32:
1903 ; CHECK: // %bb.0:
1904 ; CHECK-NEXT: movi v1.2d, #0000000000000000
1905 ; CHECK-NEXT: cmhs v0.2s, v1.2s, v0.2s
1906 ; CHECK-NEXT: ret
1907 %tmp3 = icmp ule <2 x i32> %A, zeroinitializer;
1908 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
1909 ret <2 x i32> %tmp4
1910 }
1912 ; LS implemented as HS, so check reversed operands.
1913 define <4 x i32> @cmlsz4xi32(<4 x i32> %A) {
1914 ; CHECK-LABEL: cmlsz4xi32:
1915 ; CHECK: // %bb.0:
1916 ; CHECK-NEXT: movi v1.2d, #0000000000000000
1917 ; CHECK-NEXT: cmhs v0.4s, v1.4s, v0.4s
1918 ; CHECK-NEXT: ret
1919 %tmp3 = icmp ule <4 x i32> %A, zeroinitializer;
1920 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
1921 ret <4 x i32> %tmp4
1922 }
1924 ; LS implemented as HS, so check reversed operands.
1925 define <2 x i64> @cmlsz2xi64(<2 x i64> %A) {
1926 ; CHECK-LABEL: cmlsz2xi64:
1927 ; CHECK: // %bb.0:
1928 ; CHECK-NEXT: movi v1.2d, #0000000000000000
1929 ; CHECK-NEXT: cmhs v0.2d, v1.2d, v0.2d
1930 ; CHECK-NEXT: ret
1931 %tmp3 = icmp ule <2 x i64> %A, zeroinitializer;
1932 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
1933 ret <2 x i64> %tmp4
1934 }
1936 ; LO implemented as HI, so check reversed operands.
1937 define <8 x i8> @cmloz8xi8(<8 x i8> %A) {
1938 ; CHECK-LABEL: cmloz8xi8:
1939 ; CHECK: // %bb.0:
1940 ; CHECK-NEXT: movi v1.8b, #2
1941 ; CHECK-NEXT: cmhi v0.8b, v1.8b, v0.8b
1942 ; CHECK-NEXT: ret
1943 %tmp3 = icmp ult <8 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
1944 %tmp4 = sext <8 x i1> %tmp3 to <8 x i8>
1945 ret <8 x i8> %tmp4
1946 }
1948 ; LO implemented as HI, so check reversed operands.
1949 define <16 x i8> @cmloz16xi8(<16 x i8> %A) {
1950 ; CHECK-LABEL: cmloz16xi8:
1951 ; CHECK: // %bb.0:
1952 ; CHECK-NEXT: movi v1.16b, #2
1953 ; CHECK-NEXT: cmhi v0.16b, v1.16b, v0.16b
1954 ; CHECK-NEXT: ret
1955 %tmp3 = icmp ult <16 x i8> %A, <i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2, i8 2>
1956 %tmp4 = sext <16 x i1> %tmp3 to <16 x i8>
1957 ret <16 x i8> %tmp4
1958 }
1960 ; LO implemented as HI, so check reversed operands.
1961 define <4 x i16> @cmloz4xi16(<4 x i16> %A) {
1962 ; CHECK-LABEL: cmloz4xi16:
1963 ; CHECK: // %bb.0:
1964 ; CHECK-NEXT: movi v1.4h, #2
1965 ; CHECK-NEXT: cmhi v0.4h, v1.4h, v0.4h
1966 ; CHECK-NEXT: ret
1967 %tmp3 = icmp ult <4 x i16> %A, <i16 2, i16 2, i16 2, i16 2>
1968 %tmp4 = sext <4 x i1> %tmp3 to <4 x i16>
1969 ret <4 x i16> %tmp4
1970 }
1972 ; LO implemented as HI, so check reversed operands.
1973 define <8 x i16> @cmloz8xi16(<8 x i16> %A) {
1974 ; CHECK-LABEL: cmloz8xi16:
1975 ; CHECK: // %bb.0:
1976 ; CHECK-NEXT: movi v1.8h, #2
1977 ; CHECK-NEXT: cmhi v0.8h, v1.8h, v0.8h
1978 ; CHECK-NEXT: ret
1979 %tmp3 = icmp ult <8 x i16> %A, <i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2, i16 2>
1980 %tmp4 = sext <8 x i1> %tmp3 to <8 x i16>
1981 ret <8 x i16> %tmp4
1982 }
1984 ; LO implemented as HI, so check reversed operands.
1985 define <2 x i32> @cmloz2xi32(<2 x i32> %A) {
1986 ; CHECK-LABEL: cmloz2xi32:
1987 ; CHECK: // %bb.0:
1988 ; CHECK-NEXT: movi v1.2s, #2
1989 ; CHECK-NEXT: cmhi v0.2s, v1.2s, v0.2s
1990 ; CHECK-NEXT: ret
1991 %tmp3 = icmp ult <2 x i32> %A, <i32 2, i32 2>
1992 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
1993 ret <2 x i32> %tmp4
1994 }
1996 ; LO implemented as HI, so check reversed operands.
1997 define <4 x i32> @cmloz4xi32(<4 x i32> %A) {
1998 ; CHECK-LABEL: cmloz4xi32:
1999 ; CHECK: // %bb.0:
2000 ; CHECK-NEXT: movi v1.4s, #2
2001 ; CHECK-NEXT: cmhi v0.4s, v1.4s, v0.4s
2002 ; CHECK-NEXT: ret
2003 %tmp3 = icmp ult <4 x i32> %A, <i32 2, i32 2, i32 2, i32 2>
2004 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2005 ret <4 x i32> %tmp4
2006 }
2008 ; LO implemented as HI, so check reversed operands.
2009 define <2 x i64> @cmloz2xi64(<2 x i64> %A) {
2010 ; CHECK-SD-LABEL: cmloz2xi64:
2011 ; CHECK-SD: // %bb.0:
2012 ; CHECK-SD-NEXT: mov w8, #2 // =0x2
2013 ; CHECK-SD-NEXT: dup v1.2d, x8
2014 ; CHECK-SD-NEXT: cmhi v0.2d, v1.2d, v0.2d
2015 ; CHECK-SD-NEXT: ret
2016 ;
2017 ; CHECK-GI-LABEL: cmloz2xi64:
2018 ; CHECK-GI: // %bb.0:
2019 ; CHECK-GI-NEXT: adrp x8, .LCPI153_0
2020 ; CHECK-GI-NEXT: ldr q1, [x8, :lo12:.LCPI153_0]
2021 ; CHECK-GI-NEXT: cmhi v0.2d, v1.2d, v0.2d
2022 ; CHECK-GI-NEXT: ret
2023 ; GISEL-LABEL: cmloz2xi64:
2024 ; GISEL: // %bb.0:
2025 ; GISEL-NEXT: adrp x8, .LCPI153_0
2026 ; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI153_0]
2027 ; GISEL-NEXT: cmhi v0.2d, v1.2d, v0.2d
2028 ; GISEL-NEXT: ret
2029 %tmp3 = icmp ult <2 x i64> %A, <i64 2, i64 2>
2030 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2031 ret <2 x i64> %tmp4
2032 }
2034 define <2 x i32> @fcmoeq2xfloat(<2 x float> %A, <2 x float> %B) {
2035 ; CHECK-LABEL: fcmoeq2xfloat:
2036 ; CHECK: // %bb.0:
2037 ; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s
2038 ; CHECK-NEXT: ret
2039 %tmp3 = fcmp oeq <2 x float> %A, %B
2040 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2041 ret <2 x i32> %tmp4
2042 }
2044 define <4 x i32> @fcmoeq4xfloat(<4 x float> %A, <4 x float> %B) {
2045 ; CHECK-LABEL: fcmoeq4xfloat:
2046 ; CHECK: // %bb.0:
2047 ; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s
2048 ; CHECK-NEXT: ret
2049 %tmp3 = fcmp oeq <4 x float> %A, %B
2050 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2051 ret <4 x i32> %tmp4
2052 }
2053 define <2 x i64> @fcmoeq2xdouble(<2 x double> %A, <2 x double> %B) {
2054 ; CHECK-LABEL: fcmoeq2xdouble:
2055 ; CHECK: // %bb.0:
2056 ; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d
2057 ; CHECK-NEXT: ret
2058 %tmp3 = fcmp oeq <2 x double> %A, %B
2059 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2060 ret <2 x i64> %tmp4
2061 }
2063 define <2 x i32> @fcmoge2xfloat(<2 x float> %A, <2 x float> %B) {
2064 ; CHECK-LABEL: fcmoge2xfloat:
2065 ; CHECK: // %bb.0:
2066 ; CHECK-NEXT: fcmge v0.2s, v0.2s, v1.2s
2067 ; CHECK-NEXT: ret
2068 %tmp3 = fcmp oge <2 x float> %A, %B
2069 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2070 ret <2 x i32> %tmp4
2071 }
2073 define <4 x i32> @fcmoge4xfloat(<4 x float> %A, <4 x float> %B) {
2074 ; CHECK-LABEL: fcmoge4xfloat:
2075 ; CHECK: // %bb.0:
2076 ; CHECK-NEXT: fcmge v0.4s, v0.4s, v1.4s
2077 ; CHECK-NEXT: ret
2078 %tmp3 = fcmp oge <4 x float> %A, %B
2079 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2080 ret <4 x i32> %tmp4
2081 }
2082 define <2 x i64> @fcmoge2xdouble(<2 x double> %A, <2 x double> %B) {
2083 ; CHECK-LABEL: fcmoge2xdouble:
2084 ; CHECK: // %bb.0:
2085 ; CHECK-NEXT: fcmge v0.2d, v0.2d, v1.2d
2086 ; CHECK-NEXT: ret
2087 %tmp3 = fcmp oge <2 x double> %A, %B
2088 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2089 ret <2 x i64> %tmp4
2090 }
2092 define <2 x i32> @fcmogt2xfloat(<2 x float> %A, <2 x float> %B) {
2093 ; CHECK-LABEL: fcmogt2xfloat:
2094 ; CHECK: // %bb.0:
2095 ; CHECK-NEXT: fcmgt v0.2s, v0.2s, v1.2s
2096 ; CHECK-NEXT: ret
2097 %tmp3 = fcmp ogt <2 x float> %A, %B
2098 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2099 ret <2 x i32> %tmp4
2100 }
2102 define <4 x i32> @fcmogt4xfloat(<4 x float> %A, <4 x float> %B) {
2103 ; CHECK-LABEL: fcmogt4xfloat:
2104 ; CHECK: // %bb.0:
2105 ; CHECK-NEXT: fcmgt v0.4s, v0.4s, v1.4s
2106 ; CHECK-NEXT: ret
2107 %tmp3 = fcmp ogt <4 x float> %A, %B
2108 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2109 ret <4 x i32> %tmp4
2110 }
2111 define <2 x i64> @fcmogt2xdouble(<2 x double> %A, <2 x double> %B) {
2112 ; CHECK-LABEL: fcmogt2xdouble:
2113 ; CHECK: // %bb.0:
2114 ; CHECK-NEXT: fcmgt v0.2d, v0.2d, v1.2d
2115 ; CHECK-NEXT: ret
2116 %tmp3 = fcmp ogt <2 x double> %A, %B
2117 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2118 ret <2 x i64> %tmp4
2119 }
2121 ; OLE implemented as OGE, so check reversed operands.
2122 define <2 x i32> @fcmole2xfloat(<2 x float> %A, <2 x float> %B) {
2123 ; CHECK-LABEL: fcmole2xfloat:
2124 ; CHECK: // %bb.0:
2125 ; CHECK-NEXT: fcmge v0.2s, v1.2s, v0.2s
2126 ; CHECK-NEXT: ret
2127 %tmp3 = fcmp ole <2 x float> %A, %B
2128 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2129 ret <2 x i32> %tmp4
2130 }
2132 ; OLE implemented as OGE, so check reversed operands.
2133 define <4 x i32> @fcmole4xfloat(<4 x float> %A, <4 x float> %B) {
2134 ; CHECK-LABEL: fcmole4xfloat:
2135 ; CHECK: // %bb.0:
2136 ; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s
2137 ; CHECK-NEXT: ret
2138 %tmp3 = fcmp ole <4 x float> %A, %B
2139 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2140 ret <4 x i32> %tmp4
2141 }
2143 ; OLE implemented as OGE, so check reversed operands.
2144 define <2 x i64> @fcmole2xdouble(<2 x double> %A, <2 x double> %B) {
2145 ; CHECK-LABEL: fcmole2xdouble:
2146 ; CHECK: // %bb.0:
2147 ; CHECK-NEXT: fcmge v0.2d, v1.2d, v0.2d
2148 ; CHECK-NEXT: ret
2149 %tmp3 = fcmp ole <2 x double> %A, %B
2150 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2151 ret <2 x i64> %tmp4
2152 }
2154 ; OLE implemented as OGE, so check reversed operands.
2155 define <2 x i32> @fcmolt2xfloat(<2 x float> %A, <2 x float> %B) {
2156 ; CHECK-LABEL: fcmolt2xfloat:
2157 ; CHECK: // %bb.0:
2158 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
2159 ; CHECK-NEXT: ret
2160 %tmp3 = fcmp olt <2 x float> %A, %B
2161 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2162 ret <2 x i32> %tmp4
2163 }
2165 ; OLE implemented as OGE, so check reversed operands.
2166 define <4 x i32> @fcmolt4xfloat(<4 x float> %A, <4 x float> %B) {
2167 ; CHECK-LABEL: fcmolt4xfloat:
2168 ; CHECK: // %bb.0:
2169 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
2170 ; CHECK-NEXT: ret
2171 %tmp3 = fcmp olt <4 x float> %A, %B
2172 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2173 ret <4 x i32> %tmp4
2174 }
2176 ; OLE implemented as OGE, so check reversed operands.
2177 define <2 x i64> @fcmolt2xdouble(<2 x double> %A, <2 x double> %B) {
2178 ; CHECK-LABEL: fcmolt2xdouble:
2179 ; CHECK: // %bb.0:
2180 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
2181 ; CHECK-NEXT: ret
2182 %tmp3 = fcmp olt <2 x double> %A, %B
2183 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2184 ret <2 x i64> %tmp4
2185 }
2187 ; ONE = OGT | OLT, OLT implemented as OGT so check reversed operands
2188 define <2 x i32> @fcmone2xfloat(<2 x float> %A, <2 x float> %B) {
2189 ; CHECK-LABEL: fcmone2xfloat:
2190 ; CHECK: // %bb.0:
2191 ; CHECK-NEXT: fcmgt v2.2s, v0.2s, v1.2s
2192 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
2193 ; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
2194 ; CHECK-NEXT: ret
2195 %tmp3 = fcmp one <2 x float> %A, %B
2196 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2197 ret <2 x i32> %tmp4
2198 }
2200 ; ONE = OGT | OLT, OLT implemented as OGT so check reversed operands
2201 define <4 x i32> @fcmone4xfloat(<4 x float> %A, <4 x float> %B) {
2202 ; CHECK-LABEL: fcmone4xfloat:
2203 ; CHECK: // %bb.0:
2204 ; CHECK-NEXT: fcmgt v2.4s, v0.4s, v1.4s
2205 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
2206 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2207 ; CHECK-NEXT: ret
2208 %tmp3 = fcmp one <4 x float> %A, %B
2209 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2210 ret <4 x i32> %tmp4
2211 }
2213 ; ONE = OGT | OLT, OLT implemented as OGT so check reversed operands
2214 ; todo check reversed operands
2215 define <2 x i64> @fcmone2xdouble(<2 x double> %A, <2 x double> %B) {
2216 ; CHECK-LABEL: fcmone2xdouble:
2217 ; CHECK: // %bb.0:
2218 ; CHECK-NEXT: fcmgt v2.2d, v0.2d, v1.2d
2219 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
2220 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2221 ; CHECK-NEXT: ret
2222 %tmp3 = fcmp one <2 x double> %A, %B
2223 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2224 ret <2 x i64> %tmp4
2225 }
2227 ; ORD = OGE | OLT, OLT implemented as OGT, so check reversed operands.
2228 define <2 x i32> @fcmord2xfloat(<2 x float> %A, <2 x float> %B) {
2229 ; CHECK-LABEL: fcmord2xfloat:
2230 ; CHECK: // %bb.0:
2231 ; CHECK-NEXT: fcmge v2.2s, v0.2s, v1.2s
2232 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
2233 ; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
2234 ; CHECK-NEXT: ret
2235 %tmp3 = fcmp ord <2 x float> %A, %B
2236 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2237 ret <2 x i32> %tmp4
2238 }
2240 ; ORD = OGE | OLT, OLT implemented as OGT, so check reversed operands.
2241 define <4 x i32> @fcmord4xfloat(<4 x float> %A, <4 x float> %B) {
2242 ; CHECK-LABEL: fcmord4xfloat:
2243 ; CHECK: // %bb.0:
2244 ; CHECK-NEXT: fcmge v2.4s, v0.4s, v1.4s
2245 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
2246 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2247 ; CHECK-NEXT: ret
2248 %tmp3 = fcmp ord <4 x float> %A, %B
2249 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2250 ret <4 x i32> %tmp4
2251 }
2253 ; ORD = OGE | OLT, OLT implemented as OGT, so check reversed operands.
2254 define <2 x i64> @fcmord2xdouble(<2 x double> %A, <2 x double> %B) {
2255 ; CHECK-LABEL: fcmord2xdouble:
2256 ; CHECK: // %bb.0:
2257 ; CHECK-NEXT: fcmge v2.2d, v0.2d, v1.2d
2258 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
2259 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2260 ; CHECK-NEXT: ret
2261 %tmp3 = fcmp ord <2 x double> %A, %B
2262 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2263 ret <2 x i64> %tmp4
2264 }
2267 ; UNO = !(OGE | OLT), OLT implemented as OGT, so check reversed operands.
2268 define <2 x i32> @fcmuno2xfloat(<2 x float> %A, <2 x float> %B) {
2269 ; CHECK-LABEL: fcmuno2xfloat:
2270 ; CHECK: // %bb.0:
2271 ; CHECK-NEXT: fcmge v2.2s, v0.2s, v1.2s
2272 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
2273 ; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
2274 ; CHECK-NEXT: mvn v0.8b, v0.8b
2275 ; CHECK-NEXT: ret
2276 %tmp3 = fcmp uno <2 x float> %A, %B
2277 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2278 ret <2 x i32> %tmp4
2279 }
2281 ; UNO = !(OGE | OLT), OLT implemented as OGT, so check reversed operands.
2282 define <4 x i32> @fcmuno4xfloat(<4 x float> %A, <4 x float> %B) {
2283 ; CHECK-LABEL: fcmuno4xfloat:
2284 ; CHECK: // %bb.0:
2285 ; CHECK-NEXT: fcmge v2.4s, v0.4s, v1.4s
2286 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
2287 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2288 ; CHECK-NEXT: mvn v0.16b, v0.16b
2289 ; CHECK-NEXT: ret
2290 %tmp3 = fcmp uno <4 x float> %A, %B
2291 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2292 ret <4 x i32> %tmp4
2293 }
2295 ; UNO = !(OGE | OLT), OLT implemented as OGT, so check reversed operands.
2296 define <2 x i64> @fcmuno2xdouble(<2 x double> %A, <2 x double> %B) {
2297 ; CHECK-LABEL: fcmuno2xdouble:
2298 ; CHECK: // %bb.0:
2299 ; CHECK-NEXT: fcmge v2.2d, v0.2d, v1.2d
2300 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
2301 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2302 ; CHECK-NEXT: mvn v0.16b, v0.16b
2303 ; CHECK-NEXT: ret
2304 %tmp3 = fcmp uno <2 x double> %A, %B
2305 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2306 ret <2 x i64> %tmp4
2307 }
2309 ; UEQ = !ONE = !(OGT | OLT), OLT implemented as OGT so check reversed operands
2310 define <2 x i32> @fcmueq2xfloat(<2 x float> %A, <2 x float> %B) {
2311 ; CHECK-LABEL: fcmueq2xfloat:
2312 ; CHECK: // %bb.0:
2313 ; CHECK-NEXT: fcmgt v2.2s, v0.2s, v1.2s
2314 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
2315 ; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
2316 ; CHECK-NEXT: mvn v0.8b, v0.8b
2317 ; CHECK-NEXT: ret
2318 %tmp3 = fcmp ueq <2 x float> %A, %B
2319 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2320 ret <2 x i32> %tmp4
2321 }
2323 ; UEQ = !ONE = !(OGT | OLT), OLT implemented as OGT so check reversed operands
2324 define <4 x i32> @fcmueq4xfloat(<4 x float> %A, <4 x float> %B) {
2325 ; CHECK-LABEL: fcmueq4xfloat:
2326 ; CHECK: // %bb.0:
2327 ; CHECK-NEXT: fcmgt v2.4s, v0.4s, v1.4s
2328 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
2329 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2330 ; CHECK-NEXT: mvn v0.16b, v0.16b
2331 ; CHECK-NEXT: ret
2332 %tmp3 = fcmp ueq <4 x float> %A, %B
2333 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2334 ret <4 x i32> %tmp4
2335 }
2337 ; UEQ = !ONE = !(OGT | OLT), OLT implemented as OGT so check reversed operands
2338 define <2 x i64> @fcmueq2xdouble(<2 x double> %A, <2 x double> %B) {
2339 ; CHECK-LABEL: fcmueq2xdouble:
2340 ; CHECK: // %bb.0:
2341 ; CHECK-NEXT: fcmgt v2.2d, v0.2d, v1.2d
2342 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
2343 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
2344 ; CHECK-NEXT: mvn v0.16b, v0.16b
2345 ; CHECK-NEXT: ret
2346 %tmp3 = fcmp ueq <2 x double> %A, %B
2347 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2348 ret <2 x i64> %tmp4
2349 }
2351 ; UGE = ULE with swapped operands, ULE implemented as !OGT.
2352 define <2 x i32> @fcmuge2xfloat(<2 x float> %A, <2 x float> %B) {
2353 ; CHECK-LABEL: fcmuge2xfloat:
2354 ; CHECK: // %bb.0:
2355 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
2356 ; CHECK-NEXT: mvn v0.8b, v0.8b
2357 ; CHECK-NEXT: ret
2358 %tmp3 = fcmp uge <2 x float> %A, %B
2359 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2360 ret <2 x i32> %tmp4
2361 }
2363 ; UGE = ULE with swapped operands, ULE implemented as !OGT.
2364 define <4 x i32> @fcmuge4xfloat(<4 x float> %A, <4 x float> %B) {
2365 ; CHECK-LABEL: fcmuge4xfloat:
2366 ; CHECK: // %bb.0:
2367 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
2368 ; CHECK-NEXT: mvn v0.16b, v0.16b
2369 ; CHECK-NEXT: ret
2370 %tmp3 = fcmp uge <4 x float> %A, %B
2371 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2372 ret <4 x i32> %tmp4
2373 }
2375 ; UGE = ULE with swapped operands, ULE implemented as !OGT.
2376 define <2 x i64> @fcmuge2xdouble(<2 x double> %A, <2 x double> %B) {
2377 ; CHECK-LABEL: fcmuge2xdouble:
2378 ; CHECK: // %bb.0:
2379 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
2380 ; CHECK-NEXT: mvn v0.16b, v0.16b
2381 ; CHECK-NEXT: ret
2382 %tmp3 = fcmp uge <2 x double> %A, %B
2383 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2384 ret <2 x i64> %tmp4
2385 }
2387 ; UGT = ULT with swapped operands, ULT implemented as !OGE.
2388 define <2 x i32> @fcmugt2xfloat(<2 x float> %A, <2 x float> %B) {
2389 ; CHECK-LABEL: fcmugt2xfloat:
2390 ; CHECK: // %bb.0:
2391 ; CHECK-NEXT: fcmge v0.2s, v1.2s, v0.2s
2392 ; CHECK-NEXT: mvn v0.8b, v0.8b
2393 ; CHECK-NEXT: ret
2394 %tmp3 = fcmp ugt <2 x float> %A, %B
2395 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2396 ret <2 x i32> %tmp4
2397 }
2399 ; UGT = ULT with swapped operands, ULT implemented as !OGE.
2400 define <4 x i32> @fcmugt4xfloat(<4 x float> %A, <4 x float> %B) {
2401 ; CHECK-LABEL: fcmugt4xfloat:
2402 ; CHECK: // %bb.0:
2403 ; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s
2404 ; CHECK-NEXT: mvn v0.16b, v0.16b
2405 ; CHECK-NEXT: ret
2406 %tmp3 = fcmp ugt <4 x float> %A, %B
2407 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2408 ret <4 x i32> %tmp4
2409 }
2411 define <2 x i64> @fcmugt2xdouble(<2 x double> %A, <2 x double> %B) {
2412 ; CHECK-LABEL: fcmugt2xdouble:
2413 ; CHECK: // %bb.0:
2414 ; CHECK-NEXT: fcmge v0.2d, v1.2d, v0.2d
2415 ; CHECK-NEXT: mvn v0.16b, v0.16b
2416 ; CHECK-NEXT: ret
2417 %tmp3 = fcmp ugt <2 x double> %A, %B
2418 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2419 ret <2 x i64> %tmp4
2420 }
2422 ; ULE implemented as !OGT.
2423 define <2 x i32> @fcmule2xfloat(<2 x float> %A, <2 x float> %B) {
2424 ; CHECK-LABEL: fcmule2xfloat:
2425 ; CHECK: // %bb.0:
2426 ; CHECK-NEXT: fcmgt v0.2s, v0.2s, v1.2s
2427 ; CHECK-NEXT: mvn v0.8b, v0.8b
2428 ; CHECK-NEXT: ret
2429 %tmp3 = fcmp ule <2 x float> %A, %B
2430 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2431 ret <2 x i32> %tmp4
2432 }
2434 ; ULE implemented as !OGT.
2435 define <4 x i32> @fcmule4xfloat(<4 x float> %A, <4 x float> %B) {
2436 ; CHECK-LABEL: fcmule4xfloat:
2437 ; CHECK: // %bb.0:
2438 ; CHECK-NEXT: fcmgt v0.4s, v0.4s, v1.4s
2439 ; CHECK-NEXT: mvn v0.16b, v0.16b
2440 ; CHECK-NEXT: ret
2441 %tmp3 = fcmp ule <4 x float> %A, %B
2442 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2443 ret <4 x i32> %tmp4
2444 }
2446 ; ULE implemented as !OGT.
2447 define <2 x i64> @fcmule2xdouble(<2 x double> %A, <2 x double> %B) {
2448 ; CHECK-LABEL: fcmule2xdouble:
2449 ; CHECK: // %bb.0:
2450 ; CHECK-NEXT: fcmgt v0.2d, v0.2d, v1.2d
2451 ; CHECK-NEXT: mvn v0.16b, v0.16b
2452 ; CHECK-NEXT: ret
2453 %tmp3 = fcmp ule <2 x double> %A, %B
2454 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2455 ret <2 x i64> %tmp4
2456 }
2458 ; ULT implemented as !OGE.
2459 define <2 x i32> @fcmult2xfloat(<2 x float> %A, <2 x float> %B) {
2460 ; CHECK-LABEL: fcmult2xfloat:
2461 ; CHECK: // %bb.0:
2462 ; CHECK-NEXT: fcmge v0.2s, v0.2s, v1.2s
2463 ; CHECK-NEXT: mvn v0.8b, v0.8b
2464 ; CHECK-NEXT: ret
2465 %tmp3 = fcmp ult <2 x float> %A, %B
2466 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2467 ret <2 x i32> %tmp4
2468 }
2470 ; ULT implemented as !OGE.
2471 define <4 x i32> @fcmult4xfloat(<4 x float> %A, <4 x float> %B) {
2472 ; CHECK-LABEL: fcmult4xfloat:
2473 ; CHECK: // %bb.0:
2474 ; CHECK-NEXT: fcmge v0.4s, v0.4s, v1.4s
2475 ; CHECK-NEXT: mvn v0.16b, v0.16b
2476 ; CHECK-NEXT: ret
2477 %tmp3 = fcmp ult <4 x float> %A, %B
2478 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2479 ret <4 x i32> %tmp4
2480 }
2482 ; ULT implemented as !OGE.
2483 define <2 x i64> @fcmult2xdouble(<2 x double> %A, <2 x double> %B) {
2484 ; CHECK-LABEL: fcmult2xdouble:
2485 ; CHECK: // %bb.0:
2486 ; CHECK-NEXT: fcmge v0.2d, v0.2d, v1.2d
2487 ; CHECK-NEXT: mvn v0.16b, v0.16b
2488 ; CHECK-NEXT: ret
2489 %tmp3 = fcmp ult <2 x double> %A, %B
2490 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2491 ret <2 x i64> %tmp4
2492 }
2494 ; UNE = !OEQ.
2495 define <2 x i32> @fcmune2xfloat(<2 x float> %A, <2 x float> %B) {
2496 ; CHECK-LABEL: fcmune2xfloat:
2497 ; CHECK: // %bb.0:
2498 ; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s
2499 ; CHECK-NEXT: mvn v0.8b, v0.8b
2500 ; CHECK-NEXT: ret
2501 %tmp3 = fcmp une <2 x float> %A, %B
2502 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2503 ret <2 x i32> %tmp4
2504 }
2506 ; UNE = !OEQ.
2507 define <4 x i32> @fcmune4xfloat(<4 x float> %A, <4 x float> %B) {
2508 ; CHECK-LABEL: fcmune4xfloat:
2509 ; CHECK: // %bb.0:
2510 ; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s
2511 ; CHECK-NEXT: mvn v0.16b, v0.16b
2512 ; CHECK-NEXT: ret
2513 %tmp3 = fcmp une <4 x float> %A, %B
2514 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2515 ret <4 x i32> %tmp4
2516 }
2518 ; UNE = !OEQ.
2519 define <2 x i64> @fcmune2xdouble(<2 x double> %A, <2 x double> %B) {
2520 ; CHECK-LABEL: fcmune2xdouble:
2521 ; CHECK: // %bb.0:
2522 ; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d
2523 ; CHECK-NEXT: mvn v0.16b, v0.16b
2524 ; CHECK-NEXT: ret
2525 %tmp3 = fcmp une <2 x double> %A, %B
2526 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2527 ret <2 x i64> %tmp4
2528 }
2530 define <2 x i32> @fcmoeqz2xfloat(<2 x float> %A) {
2531 ; CHECK-LABEL: fcmoeqz2xfloat:
2532 ; CHECK: // %bb.0:
2533 ; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.0
2534 ; CHECK-NEXT: ret
2535 %tmp3 = fcmp oeq <2 x float> %A, zeroinitializer
2536 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2537 ret <2 x i32> %tmp4
2538 }
2540 define <4 x i32> @fcmoeqz4xfloat(<4 x float> %A) {
2541 ; CHECK-LABEL: fcmoeqz4xfloat:
2542 ; CHECK: // %bb.0:
2543 ; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.0
2544 ; CHECK-NEXT: ret
2545 %tmp3 = fcmp oeq <4 x float> %A, zeroinitializer
2546 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2547 ret <4 x i32> %tmp4
2548 }
2549 define <2 x i64> @fcmoeqz2xdouble(<2 x double> %A) {
2550 ; CHECK-LABEL: fcmoeqz2xdouble:
2551 ; CHECK: // %bb.0:
2552 ; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.0
2553 ; CHECK-NEXT: ret
2554 %tmp3 = fcmp oeq <2 x double> %A, zeroinitializer
2555 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2556 ret <2 x i64> %tmp4
2557 }
2560 define <2 x i32> @fcmogez2xfloat(<2 x float> %A) {
2561 ; CHECK-LABEL: fcmogez2xfloat:
2562 ; CHECK: // %bb.0:
2563 ; CHECK-NEXT: fcmge v0.2s, v0.2s, #0.0
2564 ; CHECK-NEXT: ret
2565 %tmp3 = fcmp oge <2 x float> %A, zeroinitializer
2566 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2567 ret <2 x i32> %tmp4
2568 }
2570 define <4 x i32> @fcmogez4xfloat(<4 x float> %A) {
2571 ; CHECK-LABEL: fcmogez4xfloat:
2572 ; CHECK: // %bb.0:
2573 ; CHECK-NEXT: fcmge v0.4s, v0.4s, #0.0
2574 ; CHECK-NEXT: ret
2575 %tmp3 = fcmp oge <4 x float> %A, zeroinitializer
2576 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2577 ret <4 x i32> %tmp4
2578 }
2579 define <2 x i64> @fcmogez2xdouble(<2 x double> %A) {
2580 ; CHECK-LABEL: fcmogez2xdouble:
2581 ; CHECK: // %bb.0:
2582 ; CHECK-NEXT: fcmge v0.2d, v0.2d, #0.0
2583 ; CHECK-NEXT: ret
2584 %tmp3 = fcmp oge <2 x double> %A, zeroinitializer
2585 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2586 ret <2 x i64> %tmp4
2587 }
2589 define <2 x i32> @fcmogtz2xfloat(<2 x float> %A) {
2590 ; CHECK-LABEL: fcmogtz2xfloat:
2591 ; CHECK: // %bb.0:
2592 ; CHECK-NEXT: fcmgt v0.2s, v0.2s, #0.0
2593 ; CHECK-NEXT: ret
2594 %tmp3 = fcmp ogt <2 x float> %A, zeroinitializer
2595 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2596 ret <2 x i32> %tmp4
2597 }
2599 define <4 x i32> @fcmogtz4xfloat(<4 x float> %A) {
2600 ; CHECK-LABEL: fcmogtz4xfloat:
2601 ; CHECK: // %bb.0:
2602 ; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.0
2603 ; CHECK-NEXT: ret
2604 %tmp3 = fcmp ogt <4 x float> %A, zeroinitializer
2605 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2606 ret <4 x i32> %tmp4
2607 }
2608 define <2 x i64> @fcmogtz2xdouble(<2 x double> %A) {
2609 ; CHECK-LABEL: fcmogtz2xdouble:
2610 ; CHECK: // %bb.0:
2611 ; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.0
2612 ; CHECK-NEXT: ret
2613 %tmp3 = fcmp ogt <2 x double> %A, zeroinitializer
2614 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2615 ret <2 x i64> %tmp4
2616 }
2618 define <2 x i32> @fcmoltz2xfloat(<2 x float> %A) {
2619 ; CHECK-LABEL: fcmoltz2xfloat:
2620 ; CHECK: // %bb.0:
2621 ; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
2622 ; CHECK-NEXT: ret
2623 %tmp3 = fcmp olt <2 x float> %A, zeroinitializer
2624 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2625 ret <2 x i32> %tmp4
2626 }
2628 define <4 x i32> @fcmoltz4xfloat(<4 x float> %A) {
2629 ; CHECK-LABEL: fcmoltz4xfloat:
2630 ; CHECK: // %bb.0:
2631 ; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
2632 ; CHECK-NEXT: ret
2633 %tmp3 = fcmp olt <4 x float> %A, zeroinitializer
2634 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2635 ret <4 x i32> %tmp4
2636 }
2638 define <2 x i64> @fcmoltz2xdouble(<2 x double> %A) {
2639 ; CHECK-LABEL: fcmoltz2xdouble:
2640 ; CHECK: // %bb.0:
2641 ; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
2642 ; CHECK-NEXT: ret
2643 %tmp3 = fcmp olt <2 x double> %A, zeroinitializer
2644 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2645 ret <2 x i64> %tmp4
2646 }
2648 define <2 x i32> @fcmolez2xfloat(<2 x float> %A) {
2649 ; CHECK-LABEL: fcmolez2xfloat:
2650 ; CHECK: // %bb.0:
2651 ; CHECK-NEXT: fcmle v0.2s, v0.2s, #0.0
2652 ; CHECK-NEXT: ret
2653 %tmp3 = fcmp ole <2 x float> %A, zeroinitializer
2654 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2655 ret <2 x i32> %tmp4
2656 }
2658 define <4 x i32> @fcmolez4xfloat(<4 x float> %A) {
2659 ; CHECK-LABEL: fcmolez4xfloat:
2660 ; CHECK: // %bb.0:
2661 ; CHECK-NEXT: fcmle v0.4s, v0.4s, #0.0
2662 ; CHECK-NEXT: ret
2663 %tmp3 = fcmp ole <4 x float> %A, zeroinitializer
2664 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2665 ret <4 x i32> %tmp4
2666 }
2668 define <2 x i64> @fcmolez2xdouble(<2 x double> %A) {
2669 ; CHECK-LABEL: fcmolez2xdouble:
2670 ; CHECK: // %bb.0:
2671 ; CHECK-NEXT: fcmle v0.2d, v0.2d, #0.0
2672 ; CHECK-NEXT: ret
2673 %tmp3 = fcmp ole <2 x double> %A, zeroinitializer
2674 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2675 ret <2 x i64> %tmp4
2676 }
2678 ; ONE with zero = OLT | OGT
2679 define <2 x i32> @fcmonez2xfloat(<2 x float> %A) {
2680 ; CHECK-LABEL: fcmonez2xfloat:
2681 ; CHECK: // %bb.0:
2682 ; CHECK-NEXT: fcmgt v1.2s, v0.2s, #0.0
2683 ; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
2684 ; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
2685 ; CHECK-NEXT: ret
2686 %tmp3 = fcmp one <2 x float> %A, zeroinitializer
2687 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2688 ret <2 x i32> %tmp4
2689 }
2691 ; ONE with zero = OLT | OGT
2692 define <4 x i32> @fcmonez4xfloat(<4 x float> %A) {
2693 ; CHECK-LABEL: fcmonez4xfloat:
2694 ; CHECK: // %bb.0:
2695 ; CHECK-NEXT: fcmgt v1.4s, v0.4s, #0.0
2696 ; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
2697 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
2698 ; CHECK-NEXT: ret
2699 %tmp3 = fcmp one <4 x float> %A, zeroinitializer
2700 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2701 ret <4 x i32> %tmp4
2702 }
2704 ; ONE with zero = OLT | OGT
2705 define <2 x i64> @fcmonez2xdouble(<2 x double> %A) {
2706 ; CHECK-LABEL: fcmonez2xdouble:
2707 ; CHECK: // %bb.0:
2708 ; CHECK-NEXT: fcmgt v1.2d, v0.2d, #0.0
2709 ; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
2710 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
2711 ; CHECK-NEXT: ret
2712 %tmp3 = fcmp one <2 x double> %A, zeroinitializer
2713 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2714 ret <2 x i64> %tmp4
2715 }
2717 ; ORD with zero = OLT | OGE
2718 define <2 x i32> @fcmordz2xfloat(<2 x float> %A) {
2719 ; CHECK-SD-LABEL: fcmordz2xfloat:
2720 ; CHECK-SD: // %bb.0:
2721 ; CHECK-SD-NEXT: fcmge v1.2s, v0.2s, #0.0
2722 ; CHECK-SD-NEXT: fcmlt v0.2s, v0.2s, #0.0
2723 ; CHECK-SD-NEXT: orr v0.8b, v0.8b, v1.8b
2724 ; CHECK-SD-NEXT: ret
2725 ;
2726 ; CHECK-GI-LABEL: fcmordz2xfloat:
2727 ; CHECK-GI: // %bb.0:
2728 ; CHECK-GI-NEXT: fcmeq v0.2s, v0.2s, v0.2s
2729 ; CHECK-GI-NEXT: ret
2730 %tmp3 = fcmp ord <2 x float> %A, zeroinitializer
2731 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2732 ret <2 x i32> %tmp4
2733 }
2735 ; ORD with zero = OLT | OGE
2736 define <4 x i32> @fcmordz4xfloat(<4 x float> %A) {
2737 ; CHECK-SD-LABEL: fcmordz4xfloat:
2738 ; CHECK-SD: // %bb.0:
2739 ; CHECK-SD-NEXT: fcmge v1.4s, v0.4s, #0.0
2740 ; CHECK-SD-NEXT: fcmlt v0.4s, v0.4s, #0.0
2741 ; CHECK-SD-NEXT: orr v0.16b, v0.16b, v1.16b
2742 ; CHECK-SD-NEXT: ret
2743 ;
2744 ; CHECK-GI-LABEL: fcmordz4xfloat:
2745 ; CHECK-GI: // %bb.0:
2746 ; CHECK-GI-NEXT: fcmeq v0.4s, v0.4s, v0.4s
2747 ; CHECK-GI-NEXT: ret
2748 %tmp3 = fcmp ord <4 x float> %A, zeroinitializer
2749 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2750 ret <4 x i32> %tmp4
2751 }
2753 ; ORD with zero = OLT | OGE
2754 define <2 x i64> @fcmordz2xdouble(<2 x double> %A) {
2755 ; CHECK-SD-LABEL: fcmordz2xdouble:
2756 ; CHECK-SD: // %bb.0:
2757 ; CHECK-SD-NEXT: fcmge v1.2d, v0.2d, #0.0
2758 ; CHECK-SD-NEXT: fcmlt v0.2d, v0.2d, #0.0
2759 ; CHECK-SD-NEXT: orr v0.16b, v0.16b, v1.16b
2760 ; CHECK-SD-NEXT: ret
2761 ;
2762 ; CHECK-GI-LABEL: fcmordz2xdouble:
2763 ; CHECK-GI: // %bb.0:
2764 ; CHECK-GI-NEXT: fcmeq v0.2d, v0.2d, v0.2d
2765 ; CHECK-GI-NEXT: ret
2766 %tmp3 = fcmp ord <2 x double> %A, zeroinitializer
2767 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2768 ret <2 x i64> %tmp4
2769 }
2771 ; UEQ with zero = !ONE = !(OLT |OGT)
2772 define <2 x i32> @fcmueqz2xfloat(<2 x float> %A) {
2773 ; CHECK-LABEL: fcmueqz2xfloat:
2774 ; CHECK: // %bb.0:
2775 ; CHECK-NEXT: fcmgt v1.2s, v0.2s, #0.0
2776 ; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
2777 ; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
2778 ; CHECK-NEXT: mvn v0.8b, v0.8b
2779 ; CHECK-NEXT: ret
2780 %tmp3 = fcmp ueq <2 x float> %A, zeroinitializer
2781 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2782 ret <2 x i32> %tmp4
2783 }
2785 ; UEQ with zero = !ONE = !(OLT |OGT)
2786 define <4 x i32> @fcmueqz4xfloat(<4 x float> %A) {
2787 ; CHECK-LABEL: fcmueqz4xfloat:
2788 ; CHECK: // %bb.0:
2789 ; CHECK-NEXT: fcmgt v1.4s, v0.4s, #0.0
2790 ; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
2791 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
2792 ; CHECK-NEXT: mvn v0.16b, v0.16b
2793 ; CHECK-NEXT: ret
2794 %tmp3 = fcmp ueq <4 x float> %A, zeroinitializer
2795 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2796 ret <4 x i32> %tmp4
2797 }
2799 ; UEQ with zero = !ONE = !(OLT |OGT)
2800 define <2 x i64> @fcmueqz2xdouble(<2 x double> %A) {
2801 ; CHECK-LABEL: fcmueqz2xdouble:
2802 ; CHECK: // %bb.0:
2803 ; CHECK-NEXT: fcmgt v1.2d, v0.2d, #0.0
2804 ; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
2805 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
2806 ; CHECK-NEXT: mvn v0.16b, v0.16b
2807 ; CHECK-NEXT: ret
2808 %tmp3 = fcmp ueq <2 x double> %A, zeroinitializer
2809 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2810 ret <2 x i64> %tmp4
2811 }
2813 ; UGE with zero = !OLT
2814 define <2 x i32> @fcmugez2xfloat(<2 x float> %A) {
2815 ; CHECK-LABEL: fcmugez2xfloat:
2816 ; CHECK: // %bb.0:
2817 ; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
2818 ; CHECK-NEXT: mvn v0.8b, v0.8b
2819 ; CHECK-NEXT: ret
2820 %tmp3 = fcmp uge <2 x float> %A, zeroinitializer
2821 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2822 ret <2 x i32> %tmp4
2823 }
2825 ; UGE with zero = !OLT
2826 define <4 x i32> @fcmugez4xfloat(<4 x float> %A) {
2827 ; CHECK-LABEL: fcmugez4xfloat:
2828 ; CHECK: // %bb.0:
2829 ; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
2830 ; CHECK-NEXT: mvn v0.16b, v0.16b
2831 ; CHECK-NEXT: ret
2832 %tmp3 = fcmp uge <4 x float> %A, zeroinitializer
2833 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2834 ret <4 x i32> %tmp4
2835 }
2837 ; UGE with zero = !OLT
2838 define <2 x i64> @fcmugez2xdouble(<2 x double> %A) {
2839 ; CHECK-LABEL: fcmugez2xdouble:
2840 ; CHECK: // %bb.0:
2841 ; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
2842 ; CHECK-NEXT: mvn v0.16b, v0.16b
2843 ; CHECK-NEXT: ret
2844 %tmp3 = fcmp uge <2 x double> %A, zeroinitializer
2845 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2846 ret <2 x i64> %tmp4
2847 }
2849 ; UGT with zero = !OLE
2850 define <2 x i32> @fcmugtz2xfloat(<2 x float> %A) {
2851 ; CHECK-LABEL: fcmugtz2xfloat:
2852 ; CHECK: // %bb.0:
2853 ; CHECK-NEXT: fcmle v0.2s, v0.2s, #0.0
2854 ; CHECK-NEXT: mvn v0.8b, v0.8b
2855 ; CHECK-NEXT: ret
2856 %tmp3 = fcmp ugt <2 x float> %A, zeroinitializer
2857 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2858 ret <2 x i32> %tmp4
2859 }
2861 ; UGT with zero = !OLE
2862 define <4 x i32> @fcmugtz4xfloat(<4 x float> %A) {
2863 ; CHECK-LABEL: fcmugtz4xfloat:
2864 ; CHECK: // %bb.0:
2865 ; CHECK-NEXT: fcmle v0.4s, v0.4s, #0.0
2866 ; CHECK-NEXT: mvn v0.16b, v0.16b
2867 ; CHECK-NEXT: ret
2868 %tmp3 = fcmp ugt <4 x float> %A, zeroinitializer
2869 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2870 ret <4 x i32> %tmp4
2871 }
2873 ; UGT with zero = !OLE
2874 define <2 x i64> @fcmugtz2xdouble(<2 x double> %A) {
2875 ; CHECK-LABEL: fcmugtz2xdouble:
2876 ; CHECK: // %bb.0:
2877 ; CHECK-NEXT: fcmle v0.2d, v0.2d, #0.0
2878 ; CHECK-NEXT: mvn v0.16b, v0.16b
2879 ; CHECK-NEXT: ret
2880 %tmp3 = fcmp ugt <2 x double> %A, zeroinitializer
2881 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2882 ret <2 x i64> %tmp4
2883 }
2885 ; ULT with zero = !OGE
2886 define <2 x i32> @fcmultz2xfloat(<2 x float> %A) {
2887 ; CHECK-LABEL: fcmultz2xfloat:
2888 ; CHECK: // %bb.0:
2889 ; CHECK-NEXT: fcmge v0.2s, v0.2s, #0.0
2890 ; CHECK-NEXT: mvn v0.8b, v0.8b
2891 ; CHECK-NEXT: ret
2892 %tmp3 = fcmp ult <2 x float> %A, zeroinitializer
2893 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2894 ret <2 x i32> %tmp4
2895 }
2897 define <4 x i32> @fcmultz4xfloat(<4 x float> %A) {
2898 ; CHECK-LABEL: fcmultz4xfloat:
2899 ; CHECK: // %bb.0:
2900 ; CHECK-NEXT: fcmge v0.4s, v0.4s, #0.0
2901 ; CHECK-NEXT: mvn v0.16b, v0.16b
2902 ; CHECK-NEXT: ret
2903 %tmp3 = fcmp ult <4 x float> %A, zeroinitializer
2904 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2905 ret <4 x i32> %tmp4
2906 }
2908 define <2 x i64> @fcmultz2xdouble(<2 x double> %A) {
2909 ; CHECK-LABEL: fcmultz2xdouble:
2910 ; CHECK: // %bb.0:
2911 ; CHECK-NEXT: fcmge v0.2d, v0.2d, #0.0
2912 ; CHECK-NEXT: mvn v0.16b, v0.16b
2913 ; CHECK-NEXT: ret
2914 %tmp3 = fcmp ult <2 x double> %A, zeroinitializer
2915 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2916 ret <2 x i64> %tmp4
2917 }
2919 ; ULE with zero = !OGT
2920 define <2 x i32> @fcmulez2xfloat(<2 x float> %A) {
2921 ; CHECK-LABEL: fcmulez2xfloat:
2922 ; CHECK: // %bb.0:
2923 ; CHECK-NEXT: fcmgt v0.2s, v0.2s, #0.0
2924 ; CHECK-NEXT: mvn v0.8b, v0.8b
2925 ; CHECK-NEXT: ret
2926 %tmp3 = fcmp ule <2 x float> %A, zeroinitializer
2927 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2928 ret <2 x i32> %tmp4
2929 }
2931 ; ULE with zero = !OGT
2932 define <4 x i32> @fcmulez4xfloat(<4 x float> %A) {
2933 ; CHECK-LABEL: fcmulez4xfloat:
2934 ; CHECK: // %bb.0:
2935 ; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.0
2936 ; CHECK-NEXT: mvn v0.16b, v0.16b
2937 ; CHECK-NEXT: ret
2938 %tmp3 = fcmp ule <4 x float> %A, zeroinitializer
2939 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2940 ret <4 x i32> %tmp4
2941 }
2943 ; ULE with zero = !OGT
2944 define <2 x i64> @fcmulez2xdouble(<2 x double> %A) {
2945 ; CHECK-LABEL: fcmulez2xdouble:
2946 ; CHECK: // %bb.0:
2947 ; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.0
2948 ; CHECK-NEXT: mvn v0.16b, v0.16b
2949 ; CHECK-NEXT: ret
2950 %tmp3 = fcmp ule <2 x double> %A, zeroinitializer
2951 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2952 ret <2 x i64> %tmp4
2953 }
2955 ; UNE with zero = !OEQ with zero
2956 define <2 x i32> @fcmunez2xfloat(<2 x float> %A) {
2957 ; CHECK-LABEL: fcmunez2xfloat:
2958 ; CHECK: // %bb.0:
2959 ; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.0
2960 ; CHECK-NEXT: mvn v0.8b, v0.8b
2961 ; CHECK-NEXT: ret
2962 %tmp3 = fcmp une <2 x float> %A, zeroinitializer
2963 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
2964 ret <2 x i32> %tmp4
2965 }
2967 ; UNE with zero = !OEQ with zero
2968 define <4 x i32> @fcmunez4xfloat(<4 x float> %A) {
2969 ; CHECK-LABEL: fcmunez4xfloat:
2970 ; CHECK: // %bb.0:
2971 ; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.0
2972 ; CHECK-NEXT: mvn v0.16b, v0.16b
2973 ; CHECK-NEXT: ret
2974 %tmp3 = fcmp une <4 x float> %A, zeroinitializer
2975 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
2976 ret <4 x i32> %tmp4
2977 }
2979 ; UNE with zero = !OEQ with zero
2980 define <2 x i64> @fcmunez2xdouble(<2 x double> %A) {
2981 ; CHECK-LABEL: fcmunez2xdouble:
2982 ; CHECK: // %bb.0:
2983 ; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.0
2984 ; CHECK-NEXT: mvn v0.16b, v0.16b
2985 ; CHECK-NEXT: ret
2986 %tmp3 = fcmp une <2 x double> %A, zeroinitializer
2987 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
2988 ret <2 x i64> %tmp4
2989 }
2991 ; UNO with zero = !ORD = !(OLT | OGE)
2992 define <2 x i32> @fcmunoz2xfloat(<2 x float> %A) {
2993 ; CHECK-LABEL: fcmunoz2xfloat:
2994 ; CHECK: // %bb.0:
2995 ; CHECK-NEXT: fcmge v1.2s, v0.2s, #0.0
2996 ; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
2997 ; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
2998 ; CHECK-NEXT: mvn v0.8b, v0.8b
2999 ; CHECK-NEXT: ret
3000 %tmp3 = fcmp uno <2 x float> %A, zeroinitializer
3001 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3002 ret <2 x i32> %tmp4
3003 }
3005 ; UNO with zero = !ORD = !(OLT | OGE)
3006 define <4 x i32> @fcmunoz4xfloat(<4 x float> %A) {
3007 ; CHECK-LABEL: fcmunoz4xfloat:
3008 ; CHECK: // %bb.0:
3009 ; CHECK-NEXT: fcmge v1.4s, v0.4s, #0.0
3010 ; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
3011 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
3012 ; CHECK-NEXT: mvn v0.16b, v0.16b
3013 ; CHECK-NEXT: ret
3014 %tmp3 = fcmp uno <4 x float> %A, zeroinitializer
3015 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3016 ret <4 x i32> %tmp4
3017 }
3019 ; UNO with zero = !ORD = !(OLT | OGE)
3020 define <2 x i64> @fcmunoz2xdouble(<2 x double> %A) {
3021 ; CHECK-LABEL: fcmunoz2xdouble:
3022 ; CHECK: // %bb.0:
3023 ; CHECK-NEXT: fcmge v1.2d, v0.2d, #0.0
3024 ; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
3025 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
3026 ; CHECK-NEXT: mvn v0.16b, v0.16b
3027 ; CHECK-NEXT: ret
3028 %tmp3 = fcmp uno <2 x double> %A, zeroinitializer
3029 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3030 ret <2 x i64> %tmp4
3032 }
3034 define <2 x i32> @fcmoeq2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3035 ; CHECK-LABEL: fcmoeq2xfloat_fast:
3036 ; CHECK: // %bb.0:
3037 ; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s
3038 ; CHECK-NEXT: ret
3039 %tmp3 = fcmp fast oeq <2 x float> %A, %B
3040 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3041 ret <2 x i32> %tmp4
3042 }
3044 define <4 x i32> @fcmoeq4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3045 ; CHECK-LABEL: fcmoeq4xfloat_fast:
3046 ; CHECK: // %bb.0:
3047 ; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s
3048 ; CHECK-NEXT: ret
3049 %tmp3 = fcmp fast oeq <4 x float> %A, %B
3050 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3051 ret <4 x i32> %tmp4
3052 }
3053 define <2 x i64> @fcmoeq2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3054 ; CHECK-LABEL: fcmoeq2xdouble_fast:
3055 ; CHECK: // %bb.0:
3056 ; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d
3057 ; CHECK-NEXT: ret
3058 %tmp3 = fcmp fast oeq <2 x double> %A, %B
3059 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3060 ret <2 x i64> %tmp4
3061 }
3063 define <2 x i32> @fcmoge2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3064 ; CHECK-LABEL: fcmoge2xfloat_fast:
3065 ; CHECK: // %bb.0:
3066 ; CHECK-NEXT: fcmge v0.2s, v0.2s, v1.2s
3067 ; CHECK-NEXT: ret
3068 %tmp3 = fcmp fast oge <2 x float> %A, %B
3069 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3070 ret <2 x i32> %tmp4
3071 }
3073 define <4 x i32> @fcmoge4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3074 ; CHECK-LABEL: fcmoge4xfloat_fast:
3075 ; CHECK: // %bb.0:
3076 ; CHECK-NEXT: fcmge v0.4s, v0.4s, v1.4s
3077 ; CHECK-NEXT: ret
3078 %tmp3 = fcmp fast oge <4 x float> %A, %B
3079 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3080 ret <4 x i32> %tmp4
3081 }
3082 define <2 x i64> @fcmoge2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3083 ; CHECK-LABEL: fcmoge2xdouble_fast:
3084 ; CHECK: // %bb.0:
3085 ; CHECK-NEXT: fcmge v0.2d, v0.2d, v1.2d
3086 ; CHECK-NEXT: ret
3087 %tmp3 = fcmp fast oge <2 x double> %A, %B
3088 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3089 ret <2 x i64> %tmp4
3090 }
3092 define <2 x i32> @fcmogt2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3093 ; CHECK-LABEL: fcmogt2xfloat_fast:
3094 ; CHECK: // %bb.0:
3095 ; CHECK-NEXT: fcmgt v0.2s, v0.2s, v1.2s
3096 ; CHECK-NEXT: ret
3097 %tmp3 = fcmp fast ogt <2 x float> %A, %B
3098 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3099 ret <2 x i32> %tmp4
3100 }
3102 define <4 x i32> @fcmogt4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3103 ; CHECK-LABEL: fcmogt4xfloat_fast:
3104 ; CHECK: // %bb.0:
3105 ; CHECK-NEXT: fcmgt v0.4s, v0.4s, v1.4s
3106 ; CHECK-NEXT: ret
3107 %tmp3 = fcmp fast ogt <4 x float> %A, %B
3108 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3109 ret <4 x i32> %tmp4
3110 }
3111 define <2 x i64> @fcmogt2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3112 ; CHECK-LABEL: fcmogt2xdouble_fast:
3113 ; CHECK: // %bb.0:
3114 ; CHECK-NEXT: fcmgt v0.2d, v0.2d, v1.2d
3115 ; CHECK-NEXT: ret
3116 %tmp3 = fcmp fast ogt <2 x double> %A, %B
3117 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3118 ret <2 x i64> %tmp4
3119 }
3121 define <2 x i32> @fcmole2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3122 ; CHECK-LABEL: fcmole2xfloat_fast:
3123 ; CHECK: // %bb.0:
3124 ; CHECK-NEXT: fcmge v0.2s, v1.2s, v0.2s
3125 ; CHECK-NEXT: ret
3126 %tmp3 = fcmp fast ole <2 x float> %A, %B
3127 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3128 ret <2 x i32> %tmp4
3129 }
3131 define <4 x i32> @fcmole4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3132 ; CHECK-LABEL: fcmole4xfloat_fast:
3133 ; CHECK: // %bb.0:
3134 ; CHECK-NEXT: fcmge v0.4s, v1.4s, v0.4s
3135 ; CHECK-NEXT: ret
3136 %tmp3 = fcmp fast ole <4 x float> %A, %B
3137 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3138 ret <4 x i32> %tmp4
3139 }
3141 define <2 x i64> @fcmole2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3142 ; CHECK-LABEL: fcmole2xdouble_fast:
3143 ; CHECK: // %bb.0:
3144 ; CHECK-NEXT: fcmge v0.2d, v1.2d, v0.2d
3145 ; CHECK-NEXT: ret
3146 %tmp3 = fcmp fast ole <2 x double> %A, %B
3147 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3148 ret <2 x i64> %tmp4
3149 }
3151 define <2 x i32> @fcmolt2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3152 ; CHECK-LABEL: fcmolt2xfloat_fast:
3153 ; CHECK: // %bb.0:
3154 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
3155 ; CHECK-NEXT: ret
3156 %tmp3 = fcmp fast olt <2 x float> %A, %B
3157 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3158 ret <2 x i32> %tmp4
3159 }
3161 define <4 x i32> @fcmolt4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3162 ; CHECK-LABEL: fcmolt4xfloat_fast:
3163 ; CHECK: // %bb.0:
3164 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
3165 ; CHECK-NEXT: ret
3166 %tmp3 = fcmp fast olt <4 x float> %A, %B
3167 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3168 ret <4 x i32> %tmp4
3169 }
3171 define <2 x i64> @fcmolt2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3172 ; CHECK-LABEL: fcmolt2xdouble_fast:
3173 ; CHECK: // %bb.0:
3174 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
3175 ; CHECK-NEXT: ret
3176 %tmp3 = fcmp fast olt <2 x double> %A, %B
3177 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3178 ret <2 x i64> %tmp4
3179 }
3181 define <2 x i32> @fcmone2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3182 ; CHECK-SD-LABEL: fcmone2xfloat_fast:
3183 ; CHECK-SD: // %bb.0:
3184 ; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, v1.2s
3185 ; CHECK-SD-NEXT: mvn v0.8b, v0.8b
3186 ; CHECK-SD-NEXT: ret
3187 ;
3188 ; CHECK-GI-LABEL: fcmone2xfloat_fast:
3189 ; CHECK-GI: // %bb.0:
3190 ; CHECK-GI-NEXT: fcmgt v2.2s, v0.2s, v1.2s
3191 ; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s
3192 ; CHECK-GI-NEXT: orr v0.8b, v0.8b, v2.8b
3193 ; CHECK-GI-NEXT: ret
3194 %tmp3 = fcmp fast one <2 x float> %A, %B
3195 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3196 ret <2 x i32> %tmp4
3197 }
3199 define <4 x i32> @fcmone4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3200 ; CHECK-SD-LABEL: fcmone4xfloat_fast:
3201 ; CHECK-SD: // %bb.0:
3202 ; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, v1.4s
3203 ; CHECK-SD-NEXT: mvn v0.16b, v0.16b
3204 ; CHECK-SD-NEXT: ret
3205 ;
3206 ; CHECK-GI-LABEL: fcmone4xfloat_fast:
3207 ; CHECK-GI: // %bb.0:
3208 ; CHECK-GI-NEXT: fcmgt v2.4s, v0.4s, v1.4s
3209 ; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
3210 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
3211 ; CHECK-GI-NEXT: ret
3212 %tmp3 = fcmp fast one <4 x float> %A, %B
3213 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3214 ret <4 x i32> %tmp4
3215 }
3217 define <2 x i64> @fcmone2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3218 ; CHECK-SD-LABEL: fcmone2xdouble_fast:
3219 ; CHECK-SD: // %bb.0:
3220 ; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, v1.2d
3221 ; CHECK-SD-NEXT: mvn v0.16b, v0.16b
3222 ; CHECK-SD-NEXT: ret
3223 ;
3224 ; CHECK-GI-LABEL: fcmone2xdouble_fast:
3225 ; CHECK-GI: // %bb.0:
3226 ; CHECK-GI-NEXT: fcmgt v2.2d, v0.2d, v1.2d
3227 ; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d
3228 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
3229 ; CHECK-GI-NEXT: ret
3230 %tmp3 = fcmp fast one <2 x double> %A, %B
3231 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3232 ret <2 x i64> %tmp4
3233 }
3235 define <2 x i32> @fcmord2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3236 ; CHECK-LABEL: fcmord2xfloat_fast:
3237 ; CHECK: // %bb.0:
3238 ; CHECK-NEXT: fcmge v2.2s, v0.2s, v1.2s
3239 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
3240 ; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
3241 ; CHECK-NEXT: ret
3242 %tmp3 = fcmp fast ord <2 x float> %A, %B
3243 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3244 ret <2 x i32> %tmp4
3245 }
3247 define <4 x i32> @fcmord4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3248 ; CHECK-LABEL: fcmord4xfloat_fast:
3249 ; CHECK: // %bb.0:
3250 ; CHECK-NEXT: fcmge v2.4s, v0.4s, v1.4s
3251 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
3252 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
3253 ; CHECK-NEXT: ret
3254 %tmp3 = fcmp fast ord <4 x float> %A, %B
3255 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3256 ret <4 x i32> %tmp4
3257 }
3259 define <2 x i64> @fcmord2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3260 ; CHECK-LABEL: fcmord2xdouble_fast:
3261 ; CHECK: // %bb.0:
3262 ; CHECK-NEXT: fcmge v2.2d, v0.2d, v1.2d
3263 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
3264 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
3265 ; CHECK-NEXT: ret
3266 %tmp3 = fcmp fast ord <2 x double> %A, %B
3267 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3268 ret <2 x i64> %tmp4
3269 }
3272 define <2 x i32> @fcmuno2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3273 ; CHECK-LABEL: fcmuno2xfloat_fast:
3274 ; CHECK: // %bb.0:
3275 ; CHECK-NEXT: fcmge v2.2s, v0.2s, v1.2s
3276 ; CHECK-NEXT: fcmgt v0.2s, v1.2s, v0.2s
3277 ; CHECK-NEXT: orr v0.8b, v0.8b, v2.8b
3278 ; CHECK-NEXT: mvn v0.8b, v0.8b
3279 ; CHECK-NEXT: ret
3280 %tmp3 = fcmp fast uno <2 x float> %A, %B
3281 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3282 ret <2 x i32> %tmp4
3283 }
3285 define <4 x i32> @fcmuno4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3286 ; CHECK-LABEL: fcmuno4xfloat_fast:
3287 ; CHECK: // %bb.0:
3288 ; CHECK-NEXT: fcmge v2.4s, v0.4s, v1.4s
3289 ; CHECK-NEXT: fcmgt v0.4s, v1.4s, v0.4s
3290 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
3291 ; CHECK-NEXT: mvn v0.16b, v0.16b
3292 ; CHECK-NEXT: ret
3293 %tmp3 = fcmp fast uno <4 x float> %A, %B
3294 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3295 ret <4 x i32> %tmp4
3296 }
3298 define <2 x i64> @fcmuno2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3299 ; CHECK-LABEL: fcmuno2xdouble_fast:
3300 ; CHECK: // %bb.0:
3301 ; CHECK-NEXT: fcmge v2.2d, v0.2d, v1.2d
3302 ; CHECK-NEXT: fcmgt v0.2d, v1.2d, v0.2d
3303 ; CHECK-NEXT: orr v0.16b, v0.16b, v2.16b
3304 ; CHECK-NEXT: mvn v0.16b, v0.16b
3305 ; CHECK-NEXT: ret
3306 %tmp3 = fcmp fast uno <2 x double> %A, %B
3307 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3308 ret <2 x i64> %tmp4
3309 }
3311 define <2 x i32> @fcmueq2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3312 ; CHECK-SD-LABEL: fcmueq2xfloat_fast:
3313 ; CHECK-SD: // %bb.0:
3314 ; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, v1.2s
3315 ; CHECK-SD-NEXT: ret
3316 ;
3317 ; CHECK-GI-LABEL: fcmueq2xfloat_fast:
3318 ; CHECK-GI: // %bb.0:
3319 ; CHECK-GI-NEXT: fcmgt v2.2s, v0.2s, v1.2s
3320 ; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s
3321 ; CHECK-GI-NEXT: orr v0.8b, v0.8b, v2.8b
3322 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
3323 ; CHECK-GI-NEXT: ret
3324 %tmp3 = fcmp fast ueq <2 x float> %A, %B
3325 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3326 ret <2 x i32> %tmp4
3327 }
3329 define <4 x i32> @fcmueq4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3330 ; CHECK-SD-LABEL: fcmueq4xfloat_fast:
3331 ; CHECK-SD: // %bb.0:
3332 ; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, v1.4s
3333 ; CHECK-SD-NEXT: ret
3334 ;
3335 ; CHECK-GI-LABEL: fcmueq4xfloat_fast:
3336 ; CHECK-GI: // %bb.0:
3337 ; CHECK-GI-NEXT: fcmgt v2.4s, v0.4s, v1.4s
3338 ; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
3339 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
3340 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3341 ; CHECK-GI-NEXT: ret
3342 %tmp3 = fcmp fast ueq <4 x float> %A, %B
3343 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3344 ret <4 x i32> %tmp4
3345 }
3347 define <2 x i64> @fcmueq2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3348 ; CHECK-SD-LABEL: fcmueq2xdouble_fast:
3349 ; CHECK-SD: // %bb.0:
3350 ; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, v1.2d
3351 ; CHECK-SD-NEXT: ret
3352 ;
3353 ; CHECK-GI-LABEL: fcmueq2xdouble_fast:
3354 ; CHECK-GI: // %bb.0:
3355 ; CHECK-GI-NEXT: fcmgt v2.2d, v0.2d, v1.2d
3356 ; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d
3357 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v2.16b
3358 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3359 ; CHECK-GI-NEXT: ret
3360 %tmp3 = fcmp fast ueq <2 x double> %A, %B
3361 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3362 ret <2 x i64> %tmp4
3363 }
3365 define <2 x i32> @fcmuge2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3366 ; CHECK-SD-LABEL: fcmuge2xfloat_fast:
3367 ; CHECK-SD: // %bb.0:
3368 ; CHECK-SD-NEXT: fcmge v0.2s, v0.2s, v1.2s
3369 ; CHECK-SD-NEXT: ret
3370 ;
3371 ; CHECK-GI-LABEL: fcmuge2xfloat_fast:
3372 ; CHECK-GI: // %bb.0:
3373 ; CHECK-GI-NEXT: fcmgt v0.2s, v1.2s, v0.2s
3374 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
3375 ; CHECK-GI-NEXT: ret
3376 %tmp3 = fcmp fast uge <2 x float> %A, %B
3377 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3378 ret <2 x i32> %tmp4
3379 }
3381 define <4 x i32> @fcmuge4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3382 ; CHECK-SD-LABEL: fcmuge4xfloat_fast:
3383 ; CHECK-SD: // %bb.0:
3384 ; CHECK-SD-NEXT: fcmge v0.4s, v0.4s, v1.4s
3385 ; CHECK-SD-NEXT: ret
3386 ;
3387 ; CHECK-GI-LABEL: fcmuge4xfloat_fast:
3388 ; CHECK-GI: // %bb.0:
3389 ; CHECK-GI-NEXT: fcmgt v0.4s, v1.4s, v0.4s
3390 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3391 ; CHECK-GI-NEXT: ret
3392 %tmp3 = fcmp fast uge <4 x float> %A, %B
3393 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3394 ret <4 x i32> %tmp4
3395 }
3397 define <2 x i64> @fcmuge2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3398 ; CHECK-SD-LABEL: fcmuge2xdouble_fast:
3399 ; CHECK-SD: // %bb.0:
3400 ; CHECK-SD-NEXT: fcmge v0.2d, v0.2d, v1.2d
3401 ; CHECK-SD-NEXT: ret
3402 ;
3403 ; CHECK-GI-LABEL: fcmuge2xdouble_fast:
3404 ; CHECK-GI: // %bb.0:
3405 ; CHECK-GI-NEXT: fcmgt v0.2d, v1.2d, v0.2d
3406 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3407 ; CHECK-GI-NEXT: ret
3408 %tmp3 = fcmp fast uge <2 x double> %A, %B
3409 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3410 ret <2 x i64> %tmp4
3411 }
3413 define <2 x i32> @fcmugt2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3414 ; CHECK-SD-LABEL: fcmugt2xfloat_fast:
3415 ; CHECK-SD: // %bb.0:
3416 ; CHECK-SD-NEXT: fcmgt v0.2s, v0.2s, v1.2s
3417 ; CHECK-SD-NEXT: ret
3418 ;
3419 ; CHECK-GI-LABEL: fcmugt2xfloat_fast:
3420 ; CHECK-GI: // %bb.0:
3421 ; CHECK-GI-NEXT: fcmge v0.2s, v1.2s, v0.2s
3422 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
3423 ; CHECK-GI-NEXT: ret
3424 %tmp3 = fcmp fast ugt <2 x float> %A, %B
3425 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3426 ret <2 x i32> %tmp4
3427 }
3429 define <4 x i32> @fcmugt4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3430 ; CHECK-SD-LABEL: fcmugt4xfloat_fast:
3431 ; CHECK-SD: // %bb.0:
3432 ; CHECK-SD-NEXT: fcmgt v0.4s, v0.4s, v1.4s
3433 ; CHECK-SD-NEXT: ret
3434 ;
3435 ; CHECK-GI-LABEL: fcmugt4xfloat_fast:
3436 ; CHECK-GI: // %bb.0:
3437 ; CHECK-GI-NEXT: fcmge v0.4s, v1.4s, v0.4s
3438 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3439 ; CHECK-GI-NEXT: ret
3440 %tmp3 = fcmp fast ugt <4 x float> %A, %B
3441 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3442 ret <4 x i32> %tmp4
3443 }
3445 define <2 x i64> @fcmugt2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3446 ; CHECK-SD-LABEL: fcmugt2xdouble_fast:
3447 ; CHECK-SD: // %bb.0:
3448 ; CHECK-SD-NEXT: fcmgt v0.2d, v0.2d, v1.2d
3449 ; CHECK-SD-NEXT: ret
3450 ;
3451 ; CHECK-GI-LABEL: fcmugt2xdouble_fast:
3452 ; CHECK-GI: // %bb.0:
3453 ; CHECK-GI-NEXT: fcmge v0.2d, v1.2d, v0.2d
3454 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3455 ; CHECK-GI-NEXT: ret
3456 %tmp3 = fcmp fast ugt <2 x double> %A, %B
3457 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3458 ret <2 x i64> %tmp4
3459 }
3461 define <2 x i32> @fcmule2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3462 ; CHECK-SD-LABEL: fcmule2xfloat_fast:
3463 ; CHECK-SD: // %bb.0:
3464 ; CHECK-SD-NEXT: fcmge v0.2s, v1.2s, v0.2s
3465 ; CHECK-SD-NEXT: ret
3466 ;
3467 ; CHECK-GI-LABEL: fcmule2xfloat_fast:
3468 ; CHECK-GI: // %bb.0:
3469 ; CHECK-GI-NEXT: fcmgt v0.2s, v0.2s, v1.2s
3470 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
3471 ; CHECK-GI-NEXT: ret
3472 %tmp3 = fcmp fast ule <2 x float> %A, %B
3473 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3474 ret <2 x i32> %tmp4
3475 }
3477 define <4 x i32> @fcmule4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3478 ; CHECK-SD-LABEL: fcmule4xfloat_fast:
3479 ; CHECK-SD: // %bb.0:
3480 ; CHECK-SD-NEXT: fcmge v0.4s, v1.4s, v0.4s
3481 ; CHECK-SD-NEXT: ret
3482 ;
3483 ; CHECK-GI-LABEL: fcmule4xfloat_fast:
3484 ; CHECK-GI: // %bb.0:
3485 ; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, v1.4s
3486 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3487 ; CHECK-GI-NEXT: ret
3488 %tmp3 = fcmp fast ule <4 x float> %A, %B
3489 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3490 ret <4 x i32> %tmp4
3491 }
3493 define <2 x i64> @fcmule2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3494 ; CHECK-SD-LABEL: fcmule2xdouble_fast:
3495 ; CHECK-SD: // %bb.0:
3496 ; CHECK-SD-NEXT: fcmge v0.2d, v1.2d, v0.2d
3497 ; CHECK-SD-NEXT: ret
3498 ;
3499 ; CHECK-GI-LABEL: fcmule2xdouble_fast:
3500 ; CHECK-GI: // %bb.0:
3501 ; CHECK-GI-NEXT: fcmgt v0.2d, v0.2d, v1.2d
3502 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3503 ; CHECK-GI-NEXT: ret
3504 %tmp3 = fcmp fast ule <2 x double> %A, %B
3505 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3506 ret <2 x i64> %tmp4
3507 }
3509 define <2 x i32> @fcmult2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3510 ; CHECK-SD-LABEL: fcmult2xfloat_fast:
3511 ; CHECK-SD: // %bb.0:
3512 ; CHECK-SD-NEXT: fcmgt v0.2s, v1.2s, v0.2s
3513 ; CHECK-SD-NEXT: ret
3514 ;
3515 ; CHECK-GI-LABEL: fcmult2xfloat_fast:
3516 ; CHECK-GI: // %bb.0:
3517 ; CHECK-GI-NEXT: fcmge v0.2s, v0.2s, v1.2s
3518 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
3519 ; CHECK-GI-NEXT: ret
3520 %tmp3 = fcmp fast ult <2 x float> %A, %B
3521 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3522 ret <2 x i32> %tmp4
3523 }
3525 define <4 x i32> @fcmult4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3526 ; CHECK-SD-LABEL: fcmult4xfloat_fast:
3527 ; CHECK-SD: // %bb.0:
3528 ; CHECK-SD-NEXT: fcmgt v0.4s, v1.4s, v0.4s
3529 ; CHECK-SD-NEXT: ret
3530 ;
3531 ; CHECK-GI-LABEL: fcmult4xfloat_fast:
3532 ; CHECK-GI: // %bb.0:
3533 ; CHECK-GI-NEXT: fcmge v0.4s, v0.4s, v1.4s
3534 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3535 ; CHECK-GI-NEXT: ret
3536 %tmp3 = fcmp fast ult <4 x float> %A, %B
3537 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3538 ret <4 x i32> %tmp4
3539 }
3541 define <2 x i64> @fcmult2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3542 ; CHECK-SD-LABEL: fcmult2xdouble_fast:
3543 ; CHECK-SD: // %bb.0:
3544 ; CHECK-SD-NEXT: fcmgt v0.2d, v1.2d, v0.2d
3545 ; CHECK-SD-NEXT: ret
3546 ;
3547 ; CHECK-GI-LABEL: fcmult2xdouble_fast:
3548 ; CHECK-GI: // %bb.0:
3549 ; CHECK-GI-NEXT: fcmge v0.2d, v0.2d, v1.2d
3550 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3551 ; CHECK-GI-NEXT: ret
3552 %tmp3 = fcmp fast ult <2 x double> %A, %B
3553 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3554 ret <2 x i64> %tmp4
3555 }
3557 define <2 x i32> @fcmune2xfloat_fast(<2 x float> %A, <2 x float> %B) {
3558 ; CHECK-LABEL: fcmune2xfloat_fast:
3559 ; CHECK: // %bb.0:
3560 ; CHECK-NEXT: fcmeq v0.2s, v0.2s, v1.2s
3561 ; CHECK-NEXT: mvn v0.8b, v0.8b
3562 ; CHECK-NEXT: ret
3563 %tmp3 = fcmp fast une <2 x float> %A, %B
3564 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3565 ret <2 x i32> %tmp4
3566 }
3568 define <4 x i32> @fcmune4xfloat_fast(<4 x float> %A, <4 x float> %B) {
3569 ; CHECK-LABEL: fcmune4xfloat_fast:
3570 ; CHECK: // %bb.0:
3571 ; CHECK-NEXT: fcmeq v0.4s, v0.4s, v1.4s
3572 ; CHECK-NEXT: mvn v0.16b, v0.16b
3573 ; CHECK-NEXT: ret
3574 %tmp3 = fcmp fast une <4 x float> %A, %B
3575 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3576 ret <4 x i32> %tmp4
3577 }
3579 define <2 x i64> @fcmune2xdouble_fast(<2 x double> %A, <2 x double> %B) {
3580 ; CHECK-LABEL: fcmune2xdouble_fast:
3581 ; CHECK: // %bb.0:
3582 ; CHECK-NEXT: fcmeq v0.2d, v0.2d, v1.2d
3583 ; CHECK-NEXT: mvn v0.16b, v0.16b
3584 ; CHECK-NEXT: ret
3585 %tmp3 = fcmp fast une <2 x double> %A, %B
3586 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3587 ret <2 x i64> %tmp4
3588 }
3590 define <2 x i32> @fcmoeqz2xfloat_fast(<2 x float> %A) {
3591 ; CHECK-LABEL: fcmoeqz2xfloat_fast:
3592 ; CHECK: // %bb.0:
3593 ; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.0
3594 ; CHECK-NEXT: ret
3595 %tmp3 = fcmp fast oeq <2 x float> %A, zeroinitializer
3596 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3597 ret <2 x i32> %tmp4
3598 }
3600 define <4 x i32> @fcmoeqz4xfloat_fast(<4 x float> %A) {
3601 ; CHECK-LABEL: fcmoeqz4xfloat_fast:
3602 ; CHECK: // %bb.0:
3603 ; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.0
3604 ; CHECK-NEXT: ret
3605 %tmp3 = fcmp fast oeq <4 x float> %A, zeroinitializer
3606 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3607 ret <4 x i32> %tmp4
3608 }
3609 define <2 x i64> @fcmoeqz2xdouble_fast(<2 x double> %A) {
3610 ; CHECK-LABEL: fcmoeqz2xdouble_fast:
3611 ; CHECK: // %bb.0:
3612 ; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.0
3613 ; CHECK-NEXT: ret
3614 %tmp3 = fcmp fast oeq <2 x double> %A, zeroinitializer
3615 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3616 ret <2 x i64> %tmp4
3617 }
3620 define <2 x i32> @fcmogez2xfloat_fast(<2 x float> %A) {
3621 ; CHECK-LABEL: fcmogez2xfloat_fast:
3622 ; CHECK: // %bb.0:
3623 ; CHECK-NEXT: fcmge v0.2s, v0.2s, #0.0
3624 ; CHECK-NEXT: ret
3625 %tmp3 = fcmp fast oge <2 x float> %A, zeroinitializer
3626 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3627 ret <2 x i32> %tmp4
3628 }
3630 define <4 x i32> @fcmogez4xfloat_fast(<4 x float> %A) {
3631 ; CHECK-LABEL: fcmogez4xfloat_fast:
3632 ; CHECK: // %bb.0:
3633 ; CHECK-NEXT: fcmge v0.4s, v0.4s, #0.0
3634 ; CHECK-NEXT: ret
3635 %tmp3 = fcmp fast oge <4 x float> %A, zeroinitializer
3636 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3637 ret <4 x i32> %tmp4
3638 }
3639 define <2 x i64> @fcmogez2xdouble_fast(<2 x double> %A) {
3640 ; CHECK-LABEL: fcmogez2xdouble_fast:
3641 ; CHECK: // %bb.0:
3642 ; CHECK-NEXT: fcmge v0.2d, v0.2d, #0.0
3643 ; CHECK-NEXT: ret
3644 %tmp3 = fcmp fast oge <2 x double> %A, zeroinitializer
3645 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3646 ret <2 x i64> %tmp4
3647 }
3649 define <2 x i32> @fcmogtz2xfloat_fast(<2 x float> %A) {
3650 ; CHECK-LABEL: fcmogtz2xfloat_fast:
3651 ; CHECK: // %bb.0:
3652 ; CHECK-NEXT: fcmgt v0.2s, v0.2s, #0.0
3653 ; CHECK-NEXT: ret
3654 %tmp3 = fcmp fast ogt <2 x float> %A, zeroinitializer
3655 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3656 ret <2 x i32> %tmp4
3657 }
3659 define <4 x i32> @fcmogtz4xfloat_fast(<4 x float> %A) {
3660 ; CHECK-LABEL: fcmogtz4xfloat_fast:
3661 ; CHECK: // %bb.0:
3662 ; CHECK-NEXT: fcmgt v0.4s, v0.4s, #0.0
3663 ; CHECK-NEXT: ret
3664 %tmp3 = fcmp fast ogt <4 x float> %A, zeroinitializer
3665 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3666 ret <4 x i32> %tmp4
3667 }
3668 define <2 x i64> @fcmogtz2xdouble_fast(<2 x double> %A) {
3669 ; CHECK-LABEL: fcmogtz2xdouble_fast:
3670 ; CHECK: // %bb.0:
3671 ; CHECK-NEXT: fcmgt v0.2d, v0.2d, #0.0
3672 ; CHECK-NEXT: ret
3673 %tmp3 = fcmp fast ogt <2 x double> %A, zeroinitializer
3674 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3675 ret <2 x i64> %tmp4
3676 }
3678 define <2 x i32> @fcmoltz2xfloat_fast(<2 x float> %A) {
3679 ; CHECK-LABEL: fcmoltz2xfloat_fast:
3680 ; CHECK: // %bb.0:
3681 ; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
3682 ; CHECK-NEXT: ret
3683 %tmp3 = fcmp fast olt <2 x float> %A, zeroinitializer
3684 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3685 ret <2 x i32> %tmp4
3686 }
3688 define <4 x i32> @fcmoltz4xfloat_fast(<4 x float> %A) {
3689 ; CHECK-LABEL: fcmoltz4xfloat_fast:
3690 ; CHECK: // %bb.0:
3691 ; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
3692 ; CHECK-NEXT: ret
3693 %tmp3 = fcmp fast olt <4 x float> %A, zeroinitializer
3694 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3695 ret <4 x i32> %tmp4
3696 }
3698 define <2 x i64> @fcmoltz2xdouble_fast(<2 x double> %A) {
3699 ; CHECK-LABEL: fcmoltz2xdouble_fast:
3700 ; CHECK: // %bb.0:
3701 ; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
3702 ; CHECK-NEXT: ret
3703 %tmp3 = fcmp fast olt <2 x double> %A, zeroinitializer
3704 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3705 ret <2 x i64> %tmp4
3706 }
3708 define <2 x i32> @fcmolez2xfloat_fast(<2 x float> %A) {
3709 ; CHECK-LABEL: fcmolez2xfloat_fast:
3710 ; CHECK: // %bb.0:
3711 ; CHECK-NEXT: fcmle v0.2s, v0.2s, #0.0
3712 ; CHECK-NEXT: ret
3713 %tmp3 = fcmp fast ole <2 x float> %A, zeroinitializer
3714 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3715 ret <2 x i32> %tmp4
3716 }
3718 define <4 x i32> @fcmolez4xfloat_fast(<4 x float> %A) {
3719 ; CHECK-LABEL: fcmolez4xfloat_fast:
3720 ; CHECK: // %bb.0:
3721 ; CHECK-NEXT: fcmle v0.4s, v0.4s, #0.0
3722 ; CHECK-NEXT: ret
3723 %tmp3 = fcmp fast ole <4 x float> %A, zeroinitializer
3724 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3725 ret <4 x i32> %tmp4
3726 }
3728 define <2 x i64> @fcmolez2xdouble_fast(<2 x double> %A) {
3729 ; CHECK-LABEL: fcmolez2xdouble_fast:
3730 ; CHECK: // %bb.0:
3731 ; CHECK-NEXT: fcmle v0.2d, v0.2d, #0.0
3732 ; CHECK-NEXT: ret
3733 %tmp3 = fcmp fast ole <2 x double> %A, zeroinitializer
3734 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3735 ret <2 x i64> %tmp4
3736 }
3738 define <2 x i32> @fcmonez2xfloat_fast(<2 x float> %A) {
3739 ; CHECK-SD-LABEL: fcmonez2xfloat_fast:
3740 ; CHECK-SD: // %bb.0:
3741 ; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, #0.0
3742 ; CHECK-SD-NEXT: mvn v0.8b, v0.8b
3743 ; CHECK-SD-NEXT: ret
3744 ;
3745 ; CHECK-GI-LABEL: fcmonez2xfloat_fast:
3746 ; CHECK-GI: // %bb.0:
3747 ; CHECK-GI-NEXT: fcmgt v1.2s, v0.2s, #0.0
3748 ; CHECK-GI-NEXT: fcmlt v0.2s, v0.2s, #0.0
3749 ; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b
3750 ; CHECK-GI-NEXT: ret
3751 %tmp3 = fcmp fast one <2 x float> %A, zeroinitializer
3752 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3753 ret <2 x i32> %tmp4
3754 }
3756 define <4 x i32> @fcmonez4xfloat_fast(<4 x float> %A) {
3757 ; CHECK-SD-LABEL: fcmonez4xfloat_fast:
3758 ; CHECK-SD: // %bb.0:
3759 ; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, #0.0
3760 ; CHECK-SD-NEXT: mvn v0.16b, v0.16b
3761 ; CHECK-SD-NEXT: ret
3762 ;
3763 ; CHECK-GI-LABEL: fcmonez4xfloat_fast:
3764 ; CHECK-GI: // %bb.0:
3765 ; CHECK-GI-NEXT: fcmgt v1.4s, v0.4s, #0.0
3766 ; CHECK-GI-NEXT: fcmlt v0.4s, v0.4s, #0.0
3767 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
3768 ; CHECK-GI-NEXT: ret
3769 %tmp3 = fcmp fast one <4 x float> %A, zeroinitializer
3770 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3771 ret <4 x i32> %tmp4
3772 }
3774 define <2 x i64> @fcmonez2xdouble_fast(<2 x double> %A) {
3775 ; CHECK-SD-LABEL: fcmonez2xdouble_fast:
3776 ; CHECK-SD: // %bb.0:
3777 ; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, #0.0
3778 ; CHECK-SD-NEXT: mvn v0.16b, v0.16b
3779 ; CHECK-SD-NEXT: ret
3780 ;
3781 ; CHECK-GI-LABEL: fcmonez2xdouble_fast:
3782 ; CHECK-GI: // %bb.0:
3783 ; CHECK-GI-NEXT: fcmgt v1.2d, v0.2d, #0.0
3784 ; CHECK-GI-NEXT: fcmlt v0.2d, v0.2d, #0.0
3785 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
3786 ; CHECK-GI-NEXT: ret
3787 %tmp3 = fcmp fast one <2 x double> %A, zeroinitializer
3788 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3789 ret <2 x i64> %tmp4
3790 }
3792 define <2 x i32> @fcmordz2xfloat_fast(<2 x float> %A) {
3793 ; CHECK-SD-LABEL: fcmordz2xfloat_fast:
3794 ; CHECK-SD: // %bb.0:
3795 ; CHECK-SD-NEXT: fcmge v1.2s, v0.2s, #0.0
3796 ; CHECK-SD-NEXT: fcmlt v0.2s, v0.2s, #0.0
3797 ; CHECK-SD-NEXT: orr v0.8b, v0.8b, v1.8b
3798 ; CHECK-SD-NEXT: ret
3799 ;
3800 ; CHECK-GI-LABEL: fcmordz2xfloat_fast:
3801 ; CHECK-GI: // %bb.0:
3802 ; CHECK-GI-NEXT: fcmeq v0.2s, v0.2s, v0.2s
3803 ; CHECK-GI-NEXT: ret
3804 %tmp3 = fcmp fast ord <2 x float> %A, zeroinitializer
3805 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3806 ret <2 x i32> %tmp4
3807 }
3809 define <4 x i32> @fcmordz4xfloat_fast(<4 x float> %A) {
3810 ; CHECK-SD-LABEL: fcmordz4xfloat_fast:
3811 ; CHECK-SD: // %bb.0:
3812 ; CHECK-SD-NEXT: fcmge v1.4s, v0.4s, #0.0
3813 ; CHECK-SD-NEXT: fcmlt v0.4s, v0.4s, #0.0
3814 ; CHECK-SD-NEXT: orr v0.16b, v0.16b, v1.16b
3815 ; CHECK-SD-NEXT: ret
3816 ;
3817 ; CHECK-GI-LABEL: fcmordz4xfloat_fast:
3818 ; CHECK-GI: // %bb.0:
3819 ; CHECK-GI-NEXT: fcmeq v0.4s, v0.4s, v0.4s
3820 ; CHECK-GI-NEXT: ret
3821 %tmp3 = fcmp fast ord <4 x float> %A, zeroinitializer
3822 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3823 ret <4 x i32> %tmp4
3824 }
3826 define <2 x i64> @fcmordz2xdouble_fast(<2 x double> %A) {
3827 ; CHECK-SD-LABEL: fcmordz2xdouble_fast:
3828 ; CHECK-SD: // %bb.0:
3829 ; CHECK-SD-NEXT: fcmge v1.2d, v0.2d, #0.0
3830 ; CHECK-SD-NEXT: fcmlt v0.2d, v0.2d, #0.0
3831 ; CHECK-SD-NEXT: orr v0.16b, v0.16b, v1.16b
3832 ; CHECK-SD-NEXT: ret
3833 ;
3834 ; CHECK-GI-LABEL: fcmordz2xdouble_fast:
3835 ; CHECK-GI: // %bb.0:
3836 ; CHECK-GI-NEXT: fcmeq v0.2d, v0.2d, v0.2d
3837 ; CHECK-GI-NEXT: ret
3838 %tmp3 = fcmp fast ord <2 x double> %A, zeroinitializer
3839 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3840 ret <2 x i64> %tmp4
3841 }
3843 define <2 x i32> @fcmueqz2xfloat_fast(<2 x float> %A) {
3844 ; CHECK-SD-LABEL: fcmueqz2xfloat_fast:
3845 ; CHECK-SD: // %bb.0:
3846 ; CHECK-SD-NEXT: fcmeq v0.2s, v0.2s, #0.0
3847 ; CHECK-SD-NEXT: ret
3848 ;
3849 ; CHECK-GI-LABEL: fcmueqz2xfloat_fast:
3850 ; CHECK-GI: // %bb.0:
3851 ; CHECK-GI-NEXT: fcmgt v1.2s, v0.2s, #0.0
3852 ; CHECK-GI-NEXT: fcmlt v0.2s, v0.2s, #0.0
3853 ; CHECK-GI-NEXT: orr v0.8b, v0.8b, v1.8b
3854 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
3855 ; CHECK-GI-NEXT: ret
3856 %tmp3 = fcmp fast ueq <2 x float> %A, zeroinitializer
3857 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3858 ret <2 x i32> %tmp4
3859 }
3861 define <4 x i32> @fcmueqz4xfloat_fast(<4 x float> %A) {
3862 ; CHECK-SD-LABEL: fcmueqz4xfloat_fast:
3863 ; CHECK-SD: // %bb.0:
3864 ; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, #0.0
3865 ; CHECK-SD-NEXT: ret
3866 ;
3867 ; CHECK-GI-LABEL: fcmueqz4xfloat_fast:
3868 ; CHECK-GI: // %bb.0:
3869 ; CHECK-GI-NEXT: fcmgt v1.4s, v0.4s, #0.0
3870 ; CHECK-GI-NEXT: fcmlt v0.4s, v0.4s, #0.0
3871 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
3872 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3873 ; CHECK-GI-NEXT: ret
3874 %tmp3 = fcmp fast ueq <4 x float> %A, zeroinitializer
3875 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3876 ret <4 x i32> %tmp4
3877 }
3879 define <2 x i64> @fcmueqz2xdouble_fast(<2 x double> %A) {
3880 ; CHECK-SD-LABEL: fcmueqz2xdouble_fast:
3881 ; CHECK-SD: // %bb.0:
3882 ; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, #0.0
3883 ; CHECK-SD-NEXT: ret
3884 ;
3885 ; CHECK-GI-LABEL: fcmueqz2xdouble_fast:
3886 ; CHECK-GI: // %bb.0:
3887 ; CHECK-GI-NEXT: fcmgt v1.2d, v0.2d, #0.0
3888 ; CHECK-GI-NEXT: fcmlt v0.2d, v0.2d, #0.0
3889 ; CHECK-GI-NEXT: orr v0.16b, v0.16b, v1.16b
3890 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3891 ; CHECK-GI-NEXT: ret
3892 %tmp3 = fcmp fast ueq <2 x double> %A, zeroinitializer
3893 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3894 ret <2 x i64> %tmp4
3895 }
3897 define <2 x i32> @fcmugez2xfloat_fast(<2 x float> %A) {
3898 ; CHECK-SD-LABEL: fcmugez2xfloat_fast:
3899 ; CHECK-SD: // %bb.0:
3900 ; CHECK-SD-NEXT: fcmge v0.2s, v0.2s, #0.0
3901 ; CHECK-SD-NEXT: ret
3902 ;
3903 ; CHECK-GI-LABEL: fcmugez2xfloat_fast:
3904 ; CHECK-GI: // %bb.0:
3905 ; CHECK-GI-NEXT: fcmlt v0.2s, v0.2s, #0.0
3906 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
3907 ; CHECK-GI-NEXT: ret
3908 %tmp3 = fcmp fast uge <2 x float> %A, zeroinitializer
3909 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3910 ret <2 x i32> %tmp4
3911 }
3913 define <4 x i32> @fcmugez4xfloat_fast(<4 x float> %A) {
3914 ; CHECK-SD-LABEL: fcmugez4xfloat_fast:
3915 ; CHECK-SD: // %bb.0:
3916 ; CHECK-SD-NEXT: fcmge v0.4s, v0.4s, #0.0
3917 ; CHECK-SD-NEXT: ret
3918 ;
3919 ; CHECK-GI-LABEL: fcmugez4xfloat_fast:
3920 ; CHECK-GI: // %bb.0:
3921 ; CHECK-GI-NEXT: fcmlt v0.4s, v0.4s, #0.0
3922 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3923 ; CHECK-GI-NEXT: ret
3924 %tmp3 = fcmp fast uge <4 x float> %A, zeroinitializer
3925 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3926 ret <4 x i32> %tmp4
3927 }
3929 define <2 x i64> @fcmugez2xdouble_fast(<2 x double> %A) {
3930 ; CHECK-SD-LABEL: fcmugez2xdouble_fast:
3931 ; CHECK-SD: // %bb.0:
3932 ; CHECK-SD-NEXT: fcmge v0.2d, v0.2d, #0.0
3933 ; CHECK-SD-NEXT: ret
3934 ;
3935 ; CHECK-GI-LABEL: fcmugez2xdouble_fast:
3936 ; CHECK-GI: // %bb.0:
3937 ; CHECK-GI-NEXT: fcmlt v0.2d, v0.2d, #0.0
3938 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3939 ; CHECK-GI-NEXT: ret
3940 %tmp3 = fcmp fast uge <2 x double> %A, zeroinitializer
3941 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3942 ret <2 x i64> %tmp4
3943 }
3945 define <2 x i32> @fcmugtz2xfloat_fast(<2 x float> %A) {
3946 ; CHECK-SD-LABEL: fcmugtz2xfloat_fast:
3947 ; CHECK-SD: // %bb.0:
3948 ; CHECK-SD-NEXT: fcmgt v0.2s, v0.2s, #0.0
3949 ; CHECK-SD-NEXT: ret
3950 ;
3951 ; CHECK-GI-LABEL: fcmugtz2xfloat_fast:
3952 ; CHECK-GI: // %bb.0:
3953 ; CHECK-GI-NEXT: fcmle v0.2s, v0.2s, #0.0
3954 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
3955 ; CHECK-GI-NEXT: ret
3956 %tmp3 = fcmp fast ugt <2 x float> %A, zeroinitializer
3957 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
3958 ret <2 x i32> %tmp4
3959 }
3961 define <4 x i32> @fcmugtz4xfloat_fast(<4 x float> %A) {
3962 ; CHECK-SD-LABEL: fcmugtz4xfloat_fast:
3963 ; CHECK-SD: // %bb.0:
3964 ; CHECK-SD-NEXT: fcmgt v0.4s, v0.4s, #0.0
3965 ; CHECK-SD-NEXT: ret
3966 ;
3967 ; CHECK-GI-LABEL: fcmugtz4xfloat_fast:
3968 ; CHECK-GI: // %bb.0:
3969 ; CHECK-GI-NEXT: fcmle v0.4s, v0.4s, #0.0
3970 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3971 ; CHECK-GI-NEXT: ret
3972 %tmp3 = fcmp fast ugt <4 x float> %A, zeroinitializer
3973 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
3974 ret <4 x i32> %tmp4
3975 }
3977 define <2 x i64> @fcmugtz2xdouble_fast(<2 x double> %A) {
3978 ; CHECK-SD-LABEL: fcmugtz2xdouble_fast:
3979 ; CHECK-SD: // %bb.0:
3980 ; CHECK-SD-NEXT: fcmgt v0.2d, v0.2d, #0.0
3981 ; CHECK-SD-NEXT: ret
3982 ;
3983 ; CHECK-GI-LABEL: fcmugtz2xdouble_fast:
3984 ; CHECK-GI: // %bb.0:
3985 ; CHECK-GI-NEXT: fcmle v0.2d, v0.2d, #0.0
3986 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
3987 ; CHECK-GI-NEXT: ret
3988 %tmp3 = fcmp fast ugt <2 x double> %A, zeroinitializer
3989 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
3990 ret <2 x i64> %tmp4
3991 }
3993 define <2 x i32> @fcmultz2xfloat_fast(<2 x float> %A) {
3994 ; CHECK-SD-LABEL: fcmultz2xfloat_fast:
3995 ; CHECK-SD: // %bb.0:
3996 ; CHECK-SD-NEXT: fcmlt v0.2s, v0.2s, #0.0
3997 ; CHECK-SD-NEXT: ret
3998 ;
3999 ; CHECK-GI-LABEL: fcmultz2xfloat_fast:
4000 ; CHECK-GI: // %bb.0:
4001 ; CHECK-GI-NEXT: fcmge v0.2s, v0.2s, #0.0
4002 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
4003 ; CHECK-GI-NEXT: ret
4004 %tmp3 = fcmp fast ult <2 x float> %A, zeroinitializer
4005 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
4006 ret <2 x i32> %tmp4
4007 }
4009 define <4 x i32> @fcmultz4xfloat_fast(<4 x float> %A) {
4010 ; CHECK-SD-LABEL: fcmultz4xfloat_fast:
4011 ; CHECK-SD: // %bb.0:
4012 ; CHECK-SD-NEXT: fcmlt v0.4s, v0.4s, #0.0
4013 ; CHECK-SD-NEXT: ret
4014 ;
4015 ; CHECK-GI-LABEL: fcmultz4xfloat_fast:
4016 ; CHECK-GI: // %bb.0:
4017 ; CHECK-GI-NEXT: fcmge v0.4s, v0.4s, #0.0
4018 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
4019 ; CHECK-GI-NEXT: ret
4020 %tmp3 = fcmp fast ult <4 x float> %A, zeroinitializer
4021 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
4022 ret <4 x i32> %tmp4
4023 }
4025 define <2 x i64> @fcmultz2xdouble_fast(<2 x double> %A) {
4026 ; CHECK-SD-LABEL: fcmultz2xdouble_fast:
4027 ; CHECK-SD: // %bb.0:
4028 ; CHECK-SD-NEXT: fcmlt v0.2d, v0.2d, #0.0
4029 ; CHECK-SD-NEXT: ret
4030 ;
4031 ; CHECK-GI-LABEL: fcmultz2xdouble_fast:
4032 ; CHECK-GI: // %bb.0:
4033 ; CHECK-GI-NEXT: fcmge v0.2d, v0.2d, #0.0
4034 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
4035 ; CHECK-GI-NEXT: ret
4036 %tmp3 = fcmp fast ult <2 x double> %A, zeroinitializer
4037 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
4038 ret <2 x i64> %tmp4
4039 }
4041 ; ULE with zero = !OGT
4042 define <2 x i32> @fcmulez2xfloat_fast(<2 x float> %A) {
4043 ; CHECK-SD-LABEL: fcmulez2xfloat_fast:
4044 ; CHECK-SD: // %bb.0:
4045 ; CHECK-SD-NEXT: fcmle v0.2s, v0.2s, #0.0
4046 ; CHECK-SD-NEXT: ret
4047 ;
4048 ; CHECK-GI-LABEL: fcmulez2xfloat_fast:
4049 ; CHECK-GI: // %bb.0:
4050 ; CHECK-GI-NEXT: fcmgt v0.2s, v0.2s, #0.0
4051 ; CHECK-GI-NEXT: mvn v0.8b, v0.8b
4052 ; CHECK-GI-NEXT: ret
4053 %tmp3 = fcmp fast ule <2 x float> %A, zeroinitializer
4054 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
4055 ret <2 x i32> %tmp4
4056 }
4058 define <4 x i32> @fcmulez4xfloat_fast(<4 x float> %A) {
4059 ; CHECK-SD-LABEL: fcmulez4xfloat_fast:
4060 ; CHECK-SD: // %bb.0:
4061 ; CHECK-SD-NEXT: fcmle v0.4s, v0.4s, #0.0
4062 ; CHECK-SD-NEXT: ret
4063 ;
4064 ; CHECK-GI-LABEL: fcmulez4xfloat_fast:
4065 ; CHECK-GI: // %bb.0:
4066 ; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, #0.0
4067 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
4068 ; CHECK-GI-NEXT: ret
4069 %tmp3 = fcmp fast ule <4 x float> %A, zeroinitializer
4070 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
4071 ret <4 x i32> %tmp4
4072 }
4074 define <2 x i64> @fcmulez2xdouble_fast(<2 x double> %A) {
4075 ; CHECK-SD-LABEL: fcmulez2xdouble_fast:
4076 ; CHECK-SD: // %bb.0:
4077 ; CHECK-SD-NEXT: fcmle v0.2d, v0.2d, #0.0
4078 ; CHECK-SD-NEXT: ret
4079 ;
4080 ; CHECK-GI-LABEL: fcmulez2xdouble_fast:
4081 ; CHECK-GI: // %bb.0:
4082 ; CHECK-GI-NEXT: fcmgt v0.2d, v0.2d, #0.0
4083 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
4084 ; CHECK-GI-NEXT: ret
4085 %tmp3 = fcmp fast ule <2 x double> %A, zeroinitializer
4086 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
4087 ret <2 x i64> %tmp4
4088 }
4090 define <2 x i32> @fcmunez2xfloat_fast(<2 x float> %A) {
4091 ; CHECK-LABEL: fcmunez2xfloat_fast:
4092 ; CHECK: // %bb.0:
4093 ; CHECK-NEXT: fcmeq v0.2s, v0.2s, #0.0
4094 ; CHECK-NEXT: mvn v0.8b, v0.8b
4095 ; CHECK-NEXT: ret
4096 %tmp3 = fcmp fast une <2 x float> %A, zeroinitializer
4097 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
4098 ret <2 x i32> %tmp4
4099 }
4101 define <4 x i32> @fcmunez4xfloat_fast(<4 x float> %A) {
4102 ; CHECK-LABEL: fcmunez4xfloat_fast:
4103 ; CHECK: // %bb.0:
4104 ; CHECK-NEXT: fcmeq v0.4s, v0.4s, #0.0
4105 ; CHECK-NEXT: mvn v0.16b, v0.16b
4106 ; CHECK-NEXT: ret
4107 %tmp3 = fcmp fast une <4 x float> %A, zeroinitializer
4108 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
4109 ret <4 x i32> %tmp4
4110 }
4112 define <2 x i64> @fcmunez2xdouble_fast(<2 x double> %A) {
4113 ; CHECK-LABEL: fcmunez2xdouble_fast:
4114 ; CHECK: // %bb.0:
4115 ; CHECK-NEXT: fcmeq v0.2d, v0.2d, #0.0
4116 ; CHECK-NEXT: mvn v0.16b, v0.16b
4117 ; CHECK-NEXT: ret
4118 %tmp3 = fcmp fast une <2 x double> %A, zeroinitializer
4119 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
4120 ret <2 x i64> %tmp4
4121 }
4123 define <2 x i32> @fcmunoz2xfloat_fast(<2 x float> %A) {
4124 ; CHECK-LABEL: fcmunoz2xfloat_fast:
4125 ; CHECK: // %bb.0:
4126 ; CHECK-NEXT: fcmge v1.2s, v0.2s, #0.0
4127 ; CHECK-NEXT: fcmlt v0.2s, v0.2s, #0.0
4128 ; CHECK-NEXT: orr v0.8b, v0.8b, v1.8b
4129 ; CHECK-NEXT: mvn v0.8b, v0.8b
4130 ; CHECK-NEXT: ret
4131 %tmp3 = fcmp fast uno <2 x float> %A, zeroinitializer
4132 %tmp4 = sext <2 x i1> %tmp3 to <2 x i32>
4133 ret <2 x i32> %tmp4
4134 }
4136 define <4 x i32> @fcmunoz4xfloat_fast(<4 x float> %A) {
4137 ; CHECK-LABEL: fcmunoz4xfloat_fast:
4138 ; CHECK: // %bb.0:
4139 ; CHECK-NEXT: fcmge v1.4s, v0.4s, #0.0
4140 ; CHECK-NEXT: fcmlt v0.4s, v0.4s, #0.0
4141 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
4142 ; CHECK-NEXT: mvn v0.16b, v0.16b
4143 ; CHECK-NEXT: ret
4144 %tmp3 = fcmp fast uno <4 x float> %A, zeroinitializer
4145 %tmp4 = sext <4 x i1> %tmp3 to <4 x i32>
4146 ret <4 x i32> %tmp4
4147 }
4149 define <2 x i64> @fcmunoz2xdouble_fast(<2 x double> %A) {
4150 ; CHECK-LABEL: fcmunoz2xdouble_fast:
4151 ; CHECK: // %bb.0:
4152 ; CHECK-NEXT: fcmge v1.2d, v0.2d, #0.0
4153 ; CHECK-NEXT: fcmlt v0.2d, v0.2d, #0.0
4154 ; CHECK-NEXT: orr v0.16b, v0.16b, v1.16b
4155 ; CHECK-NEXT: mvn v0.16b, v0.16b
4156 ; CHECK-NEXT: ret
4157 %tmp3 = fcmp fast uno <2 x double> %A, zeroinitializer
4158 %tmp4 = sext <2 x i1> %tmp3 to <2 x i64>
4159 ret <2 x i64> %tmp4
4161 }
4163 ; Test SETCC fast-math flags are propagated when combining zext(setcc).
4164 define <4 x i32> @fcmule4xfloat_fast_zext(<4 x float> %A, <4 x float> %B) {
4165 ; CHECK-SD-LABEL: fcmule4xfloat_fast_zext:
4166 ; CHECK-SD: // %bb.0:
4167 ; CHECK-SD-NEXT: movi v2.4s, #1
4168 ; CHECK-SD-NEXT: fcmge v0.4s, v1.4s, v0.4s
4169 ; CHECK-SD-NEXT: and v0.16b, v0.16b, v2.16b
4170 ; CHECK-SD-NEXT: ret
4171 ;
4172 ; CHECK-GI-LABEL: fcmule4xfloat_fast_zext:
4173 ; CHECK-GI: // %bb.0:
4174 ; CHECK-GI-NEXT: movi v2.4s, #1
4175 ; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, v1.4s
4176 ; CHECK-GI-NEXT: bic v0.16b, v2.16b, v0.16b
4177 ; CHECK-GI-NEXT: ret
4178 ; GISEL-LABEL: fcmule4xfloat_fast_zext:
4179 ; GISEL: // %bb.0:
4180 ; GISEL-NEXT: fcmgt v0.4s, v0.4s, v1.4s
4181 ; GISEL-NEXT: adrp x8, .LCPI322_0
4182 ; GISEL-NEXT: ldr q1, [x8, :lo12:.LCPI322_0]
4183 ; GISEL-NEXT: bic v0.16b, v1.16b, v0.16b
4184 ; GISEL-NEXT: ret
4185 %tmp3 = fcmp fast ule <4 x float> %A, %B
4186 %tmp4 = zext <4 x i1> %tmp3 to <4 x i32>
4187 ret <4 x i32> %tmp4
4188 }
4190 ; Test SETCC fast-math flags are propagated when combining aext(setcc).
4191 define <4 x i1> @fcmule4xfloat_fast_aext(<4 x float> %A, <4 x float> %B) {
4192 ; CHECK-SD-LABEL: fcmule4xfloat_fast_aext:
4193 ; CHECK-SD: // %bb.0:
4194 ; CHECK-SD-NEXT: fcmge v0.4s, v1.4s, v0.4s
4195 ; CHECK-SD-NEXT: xtn v0.4h, v0.4s
4196 ; CHECK-SD-NEXT: ret
4197 ;
4198 ; CHECK-GI-LABEL: fcmule4xfloat_fast_aext:
4199 ; CHECK-GI: // %bb.0:
4200 ; CHECK-GI-NEXT: fcmgt v0.4s, v0.4s, v1.4s
4201 ; CHECK-GI-NEXT: mvn v0.16b, v0.16b
4202 ; CHECK-GI-NEXT: xtn v0.4h, v0.4s
4203 ; CHECK-GI-NEXT: ret
4204 %tmp3 = fcmp fast ule <4 x float> %A, %B
4205 ret <4 x i1> %tmp3
4206 }
4208 define <4 x i64> @fcmoeq4xdouble(<4 x double> %A, <4 x double> %B) {
4209 ; CHECK-SD-LABEL: fcmoeq4xdouble:
4210 ; CHECK-SD: // %bb.0:
4211 ; CHECK-SD-NEXT: fcmeq v1.2d, v1.2d, v3.2d
4212 ; CHECK-SD-NEXT: fcmeq v0.2d, v0.2d, v2.2d
4213 ; CHECK-SD-NEXT: ret
4214 ;
4215 ; CHECK-GI-LABEL: fcmoeq4xdouble:
4216 ; CHECK-GI: // %bb.0:
4217 ; CHECK-GI-NEXT: fcmeq v0.2d, v0.2d, v2.2d
4218 ; CHECK-GI-NEXT: fcmeq v1.2d, v1.2d, v3.2d
4219 ; CHECK-GI-NEXT: shl v0.2d, v0.2d, #63
4220 ; CHECK-GI-NEXT: shl v1.2d, v1.2d, #63
4221 ; CHECK-GI-NEXT: sshr v0.2d, v0.2d, #63
4222 ; CHECK-GI-NEXT: sshr v1.2d, v1.2d, #63
4223 ; CHECK-GI-NEXT: ret
4224 %tmp3 = fcmp oeq <4 x double> %A, %B
4225 %tmp4 = sext <4 x i1> %tmp3 to <4 x i64>
4226 ret <4 x i64> %tmp4
4227 }
4229 define <8 x i32> @fcmoeq8xfloat(<8 x float> %A, <8 x float> %B) {
4230 ; CHECK-SD-LABEL: fcmoeq8xfloat:
4231 ; CHECK-SD: // %bb.0:
4232 ; CHECK-SD-NEXT: fcmeq v1.4s, v1.4s, v3.4s
4233 ; CHECK-SD-NEXT: fcmeq v0.4s, v0.4s, v2.4s
4234 ; CHECK-SD-NEXT: ret
4235 ;
4236 ; CHECK-GI-LABEL: fcmoeq8xfloat:
4237 ; CHECK-GI: // %bb.0:
4238 ; CHECK-GI-NEXT: fcmeq v0.4s, v0.4s, v2.4s
4239 ; CHECK-GI-NEXT: fcmeq v1.4s, v1.4s, v3.4s
4240 ; CHECK-GI-NEXT: shl v0.4s, v0.4s, #31
4241 ; CHECK-GI-NEXT: shl v1.4s, v1.4s, #31
4242 ; CHECK-GI-NEXT: sshr v0.4s, v0.4s, #31
4243 ; CHECK-GI-NEXT: sshr v1.4s, v1.4s, #31
4244 ; CHECK-GI-NEXT: ret
4245 %tmp3 = fcmp oeq <8 x float> %A, %B
4246 %tmp4 = sext <8 x i1> %tmp3 to <8 x i32>
4247 ret <8 x i32> %tmp4
4248 }