llvm/test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgpu-ffbh-u32.mir

   1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
   2 # RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s
   3
   4 ---
   5
   6 name:            ffbh_u32_s32_s_s
   7 legalized:       true
   8 regBankSelected: true
   9 tracksRegLiveness: true
  10
  11 body: |
  12   bb.0:
  13     liveins: $sgpr0
  14
  15     ; CHECK-LABEL: name: ffbh_u32_s32_s_s
  16     ; CHECK: liveins: $sgpr0
  17     ; CHECK-NEXT: {{  $}}
  18     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  19     ; CHECK-NEXT: [[S_FLBIT_I32_B32_:%[0-9]+]]:sreg_32 = S_FLBIT_I32_B32 [[COPY]]
  20     ; CHECK-NEXT: S_ENDPGM 0, implicit [[S_FLBIT_I32_B32_]]
  21   %0:sgpr(s32) = COPY $sgpr0
  22   %1:sgpr(s32) = G_AMDGPU_FFBH_U32 %0
  23   S_ENDPGM 0, implicit %1
  24
  25 ...
  26
  27 ---
  28
  29 name:            ffbh_u32_s32_v_v
  30 legalized:       true
  31 regBankSelected: true
  32 tracksRegLiveness: true
  33
  34 body: |
  35   bb.0:
  36     liveins: $vgpr0
  37
  38     ; CHECK-LABEL: name: ffbh_u32_s32_v_v
  39     ; CHECK: liveins: $vgpr0
  40     ; CHECK-NEXT: {{  $}}
  41     ; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
  42     ; CHECK-NEXT: [[V_FFBH_U32_e64_:%[0-9]+]]:vgpr_32 = V_FFBH_U32_e64 [[COPY]], implicit $exec
  43     ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_FFBH_U32_e64_]]
  44   %0:vgpr(s32) = COPY $vgpr0
  45   %1:vgpr(s32) = G_AMDGPU_FFBH_U32 %0
  46   S_ENDPGM 0, implicit %1
  47
  48 ...
  49
  50 ---
  51
  52 name:            ffbh_u32_v_s
  53 legalized:       true
  54 regBankSelected: true
  55 tracksRegLiveness: true
  56
  57 body: |
  58   bb.0:
  59     liveins: $sgpr0
  60
  61     ; CHECK-LABEL: name: ffbh_u32_v_s
  62     ; CHECK: liveins: $sgpr0
  63     ; CHECK-NEXT: {{  $}}
  64     ; CHECK-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
  65     ; CHECK-NEXT: [[V_FFBH_U32_e64_:%[0-9]+]]:vgpr_32 = V_FFBH_U32_e64 [[COPY]], implicit $exec
  66     ; CHECK-NEXT: S_ENDPGM 0, implicit [[V_FFBH_U32_e64_]]
  67   %0:sgpr(s32) = COPY $sgpr0
  68   %1:vgpr(s32) = G_AMDGPU_FFBH_U32 %0
  69   S_ENDPGM 0, implicit %1
  70
  71 ...