Run DCE after a LoopFlatten test to reduce spurious output [nfc]
[llvm-project.git] / llvm / test / CodeGen / AMDGPU / GlobalISel / inst-select-sext.mir
blob1822e6a103e490181ec9281de9dd54a7a31008b6
1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -march=amdgcn -run-pass=instruction-select -verify-machineinstrs -global-isel %s -o - | FileCheck %s -check-prefixes=GCN
4 ---
6 name: sext_sgpr_s1_to_sgpr_s16
7 legalized:       true
8 regBankSelected: true
9 body: |
10   bb.0:
11     liveins: $sgpr0
13     ; GCN-LABEL: name: sext_sgpr_s1_to_sgpr_s16
14     ; GCN: liveins: $sgpr0
15     ; GCN-NEXT: {{  $}}
16     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
17     ; GCN-NEXT: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 65536, implicit-def $scc
18     ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
19     ; GCN-NEXT: [[S_AND_B32_:%[0-9]+]]:sreg_32 = S_AND_B32 [[S_MOV_B32_]], [[S_BFE_I32_]], implicit-def dead $scc
20     ; GCN-NEXT: $sgpr0 = COPY [[S_AND_B32_]]
21     %0:sgpr(s32) = COPY $sgpr0
22     %1:sgpr(s1) = G_TRUNC %0
23     %2:sgpr(s16) = G_SEXT %1
24     %3:sgpr(s32) = G_ZEXT %2
25     $sgpr0 = COPY %3
26 ...
28 ---
30 name: sext_sgpr_s1_to_sgpr_s32
31 legalized:       true
32 regBankSelected: true
33 body: |
34   bb.0:
35     liveins: $sgpr0
37     ; GCN-LABEL: name: sext_sgpr_s1_to_sgpr_s32
38     ; GCN: liveins: $sgpr0
39     ; GCN-NEXT: {{  $}}
40     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
41     ; GCN-NEXT: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 65536, implicit-def $scc
42     ; GCN-NEXT: $sgpr0 = COPY [[S_BFE_I32_]]
43     %0:sgpr(s32) = COPY $sgpr0
44     %1:sgpr(s1) = G_TRUNC %0
45     %2:sgpr(s32) = G_SEXT %1
46     $sgpr0 = COPY %2
47 ...
49 ---
51 name: sext_sgpr_s1_to_sgpr_s64
52 legalized:       true
53 regBankSelected: true
54 body: |
55   bb.0:
56     liveins: $sgpr0
58     ; GCN-LABEL: name: sext_sgpr_s1_to_sgpr_s64
59     ; GCN: liveins: $sgpr0
60     ; GCN-NEXT: {{  $}}
61     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
62     ; GCN-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
63     ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[DEF]], %subreg.sub1
64     ; GCN-NEXT: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 65536, implicit-def $scc
65     ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
66     %0:sgpr(s32) = COPY $sgpr0
67     %1:sgpr(s1) = G_TRUNC %0
68     %2:sgpr(s64) = G_SEXT %1
69     $sgpr0_sgpr1 = COPY %2
70 ...
72 ---
74 name: sext_sgpr_s16_to_sgpr_s32
75 legalized:       true
76 regBankSelected: true
77 body: |
78   bb.0:
79     liveins: $sgpr0
81     ; GCN-LABEL: name: sext_sgpr_s16_to_sgpr_s32
82     ; GCN: liveins: $sgpr0
83     ; GCN-NEXT: {{  $}}
84     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
85     ; GCN-NEXT: [[S_SEXT_I32_I16_:%[0-9]+]]:sreg_32 = S_SEXT_I32_I16 [[COPY]]
86     ; GCN-NEXT: $sgpr0 = COPY [[S_SEXT_I32_I16_]]
87     %0:sgpr(s32) = COPY $sgpr0
88     %1:sgpr(s16) = G_TRUNC %0
89     %2:sgpr(s32) = G_SEXT %1
90     $sgpr0 = COPY %2
92 ...
94 ---
96 name: sext_sgpr_s16_to_sgpr_s64
97 legalized:       true
98 regBankSelected: true
99 body: |
100   bb.0:
101     liveins: $sgpr0
103     ; GCN-LABEL: name: sext_sgpr_s16_to_sgpr_s64
104     ; GCN: liveins: $sgpr0
105     ; GCN-NEXT: {{  $}}
106     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
107     ; GCN-NEXT: [[DEF:%[0-9]+]]:sreg_32 = IMPLICIT_DEF
108     ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[DEF]], %subreg.sub1
109     ; GCN-NEXT: [[S_BFE_I64_:%[0-9]+]]:sreg_64 = S_BFE_I64 [[REG_SEQUENCE]], 1048576, implicit-def $scc
110     ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[S_BFE_I64_]]
111     %0:sgpr(s32) = COPY $sgpr0
112     %1:sgpr(s16) = G_TRUNC %0
113     %2:sgpr(s64) = G_SEXT %1
114     $sgpr0_sgpr1 = COPY %2
120 name: sext_sgpr_s32_to_sgpr_s64
121 legalized:       true
122 regBankSelected: true
123 body: |
124   bb.0:
125     liveins: $sgpr0
127     ; GCN-LABEL: name: sext_sgpr_s32_to_sgpr_s64
128     ; GCN: liveins: $sgpr0
129     ; GCN-NEXT: {{  $}}
130     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
131     ; GCN-NEXT: [[S_ASHR_I32_:%[0-9]+]]:sreg_32 = S_ASHR_I32 [[COPY]], 31, implicit-def dead $scc
132     ; GCN-NEXT: [[REG_SEQUENCE:%[0-9]+]]:sreg_64 = REG_SEQUENCE [[COPY]], %subreg.sub0, [[S_ASHR_I32_]], %subreg.sub1
133     ; GCN-NEXT: $sgpr0_sgpr1 = COPY [[REG_SEQUENCE]]
134     %0:sgpr(s32) = COPY $sgpr0
135     %1:sgpr(s64) = G_SEXT %0
136     $sgpr0_sgpr1 = COPY %1
140 # ---
142 # name: sext_vcc_s1_to_vgpr_s32
143 # legalized:       true
144 # regBankSelected: true
145 # body: |
146 #   bb.0:
147 #     liveins: $vgpr0
149 #     %0:vgpr(s32) = COPY $vgpr0
150 #     %1:vcc(s1) = G_ICMP intpred(eq), %0, %0
151 #     %2:vgpr(s32) = G_SEXT %1
152 #     $vgpr0 = COPY %2
153 # ...
157 name: sext_vgpr_s1_to_vgpr_s16
158 legalized:       true
159 regBankSelected: true
160 body: |
161   bb.0:
162     liveins: $vgpr0
164     ; GCN-LABEL: name: sext_vgpr_s1_to_vgpr_s16
165     ; GCN: liveins: $vgpr0
166     ; GCN-NEXT: {{  $}}
167     ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
168     ; GCN-NEXT: [[V_BFE_I32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_I32_e64 [[COPY]], 0, 1, implicit $exec
169     ; GCN-NEXT: [[S_MOV_B32_:%[0-9]+]]:sreg_32 = S_MOV_B32 65535
170     ; GCN-NEXT: [[V_AND_B32_e64_:%[0-9]+]]:vgpr_32 = V_AND_B32_e64 [[S_MOV_B32_]], [[V_BFE_I32_e64_]], implicit $exec
171     ; GCN-NEXT: $vgpr0 = COPY [[V_AND_B32_e64_]]
172     %0:vgpr(s32) = COPY $vgpr0
173     %1:vgpr(s1) = G_TRUNC %0
174     %2:vgpr(s16) = G_SEXT %1
175     %3:vgpr(s32) = G_ZEXT %2
176     $vgpr0 = COPY %3
181 name: sext_vgpr_s1_to_vgpr_s32
182 legalized:       true
183 regBankSelected: true
184 body: |
185   bb.0:
186     liveins: $vgpr0
188     ; GCN-LABEL: name: sext_vgpr_s1_to_vgpr_s32
189     ; GCN: liveins: $vgpr0
190     ; GCN-NEXT: {{  $}}
191     ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
192     ; GCN-NEXT: [[V_BFE_I32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_I32_e64 [[COPY]], 0, 1, implicit $exec
193     ; GCN-NEXT: $vgpr0 = COPY [[V_BFE_I32_e64_]]
194     %0:vgpr(s32) = COPY $vgpr0
195     %1:vgpr(s1) = G_TRUNC %0
196     %2:vgpr(s32) = G_SEXT %1
197     $vgpr0 = COPY %2
202 name: sext_vgpr_s16_to_vgpr_s32
203 legalized:       true
204 regBankSelected: true
205 body: |
206   bb.0:
207     liveins: $vgpr0
209     ; GCN-LABEL: name: sext_vgpr_s16_to_vgpr_s32
210     ; GCN: liveins: $vgpr0
211     ; GCN-NEXT: {{  $}}
212     ; GCN-NEXT: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
213     ; GCN-NEXT: [[V_BFE_I32_e64_:%[0-9]+]]:vgpr_32 = V_BFE_I32_e64 [[COPY]], 0, 16, implicit $exec
214     ; GCN-NEXT: $vgpr0 = COPY [[V_BFE_I32_e64_]]
215     %0:vgpr(s32) = COPY $vgpr0
216     %1:vgpr(s16) = G_TRUNC %0
217     %2:vgpr(s32) = G_SEXT %1
218     $vgpr0 = COPY %2
224 name: sext_sgpr_reg_class_s1_to_sgpr_s32
225 legalized:       true
226 regBankSelected: true
227 body: |
228   bb.0:
229     liveins: $sgpr0
231     ; GCN-LABEL: name: sext_sgpr_reg_class_s1_to_sgpr_s32
232     ; GCN: liveins: $sgpr0
233     ; GCN-NEXT: {{  $}}
234     ; GCN-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr0
235     ; GCN-NEXT: [[S_BFE_I32_:%[0-9]+]]:sreg_32 = S_BFE_I32 [[COPY]], 65536, implicit-def $scc
236     ; GCN-NEXT: $sgpr0 = COPY [[S_BFE_I32_]]
237     %0:sgpr(s32) = COPY $sgpr0
238     %1:sreg_32(s1) = G_TRUNC %0
239     %2:sgpr(s32) = G_SEXT %1
240     $sgpr0 = COPY %2