1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py UTC_ARGS: --version 2
2 # RUN: llc -march=amdgcn -mcpu=gfx1030 -run-pass=instruction-select -o - %s | FileCheck -check-prefix=GFX10-WAVE32 %s
3 # RUN: llc -march=amdgcn -mcpu=gfx1030 -mattr=+wavefrontsize64 -run-pass=instruction-select -o - %s | FileCheck -check-prefix=GFX10-WAVE64 %s
6 name: stackrestore_waveaddress_sgpr
11 ; GFX10-WAVE32-LABEL: name: stackrestore_waveaddress_sgpr
12 ; GFX10-WAVE32: $sgpr32 = COPY $sgpr32
14 ; GFX10-WAVE64-LABEL: name: stackrestore_waveaddress_sgpr
15 ; GFX10-WAVE64: $sgpr32 = COPY $sgpr32
16 %0:sgpr(p5) = G_AMDGPU_WAVE_ADDRESS $sgpr32
21 # Test we aren't special casing the direct register value.
23 name: stackrestore_direct_sp_sgpr
29 ; GFX10-WAVE32-LABEL: name: stackrestore_direct_sp_sgpr
30 ; GFX10-WAVE32: liveins: $sgpr10
31 ; GFX10-WAVE32-NEXT: {{ $}}
32 ; GFX10-WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr32
33 ; GFX10-WAVE32-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 5, implicit-def dead $scc
34 ; GFX10-WAVE32-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
36 ; GFX10-WAVE64-LABEL: name: stackrestore_direct_sp_sgpr
37 ; GFX10-WAVE64: liveins: $sgpr10
38 ; GFX10-WAVE64-NEXT: {{ $}}
39 ; GFX10-WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr32
40 ; GFX10-WAVE64-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 6, implicit-def dead $scc
41 ; GFX10-WAVE64-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
42 %0:sgpr(p5) = COPY $sgpr32
48 name: stackrestore_any_sgpr
54 ; GFX10-WAVE32-LABEL: name: stackrestore_any_sgpr
55 ; GFX10-WAVE32: liveins: $sgpr10
56 ; GFX10-WAVE32-NEXT: {{ $}}
57 ; GFX10-WAVE32-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr10
58 ; GFX10-WAVE32-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 5, implicit-def dead $scc
59 ; GFX10-WAVE32-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
61 ; GFX10-WAVE64-LABEL: name: stackrestore_any_sgpr
62 ; GFX10-WAVE64: liveins: $sgpr10
63 ; GFX10-WAVE64-NEXT: {{ $}}
64 ; GFX10-WAVE64-NEXT: [[COPY:%[0-9]+]]:sreg_32 = COPY $sgpr10
65 ; GFX10-WAVE64-NEXT: [[S_LSHR_B32_:%[0-9]+]]:sreg_32 = S_LSHR_B32 [[COPY]], 6, implicit-def dead $scc
66 ; GFX10-WAVE64-NEXT: $sgpr32 = COPY [[S_LSHR_B32_]]
67 %0:sgpr(p5) = COPY $sgpr10