| blob | ab2a83f409b6cb1f59b21dc51b0946506545beb8 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc < %s -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s -check-prefix=SI
3 ; RUN: llc < %s -march=amdgcn -mcpu=hawaii -verify-machineinstrs | FileCheck %s -check-prefix=GFX7
4 ; RUN: llc < %s -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck %s -check-prefix=GFX10
5 ; RUN: llc < %s -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs | FileCheck %s -check-prefix=GFX1030
6 ; RUN: llc < %s -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs | FileCheck %s -check-prefix=GFX1100
8 ; RUN: llc < %s -global-isel -march=amdgcn -mcpu=verde -verify-machineinstrs | FileCheck %s -check-prefix=G_SI
9 ; RUN: llc < %s -global-isel -march=amdgcn -mcpu=hawaii -verify-machineinstrs | FileCheck %s -check-prefix=G_GFX7
10 ; RUN: llc < %s -global-isel -march=amdgcn -mcpu=gfx1010 -verify-machineinstrs | FileCheck %s -check-prefix=G_GFX10
11 ; RUN: llc < %s -global-isel -march=amdgcn -mcpu=gfx1030 -verify-machineinstrs | FileCheck %s -check-prefix=G_GFX1030
12 ; RUN: llc < %s -global-isel -march=amdgcn -mcpu=gfx1100 -verify-machineinstrs | FileCheck %s -check-prefix=G_GFX1100
14 declare float @llvm.amdgcn.raw.buffer.atomic.fmin.f32(float, <4 x i32>, i32, i32, i32 immarg)
15 declare float @llvm.amdgcn.raw.buffer.atomic.fmax.f32(float, <4 x i32>, i32, i32, i32 immarg)
18 define amdgpu_kernel void @raw_buffer_atomic_min_noret_f32(<4 x i32> inreg %rsrc, float %data, i32 %vindex) {
19 ; SI-LABEL: raw_buffer_atomic_min_noret_f32:
20 ; SI: ; %bb.0: ; %main_body
21 ; SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
22 ; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
23 ; SI-NEXT: s_waitcnt lgkmcnt(0)
24 ; SI-NEXT: v_mov_b32_e32 v0, s4
25 ; SI-NEXT: v_mov_b32_e32 v1, s5
26 ; SI-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen
27 ; SI-NEXT: s_endpgm
28 ;
29 ; GFX7-LABEL: raw_buffer_atomic_min_noret_f32:
30 ; GFX7: ; %bb.0: ; %main_body
31 ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
32 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
33 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
34 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
35 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
36 ; GFX7-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen
37 ; GFX7-NEXT: s_endpgm
38 ;
39 ; GFX10-LABEL: raw_buffer_atomic_min_noret_f32:
40 ; GFX10: ; %bb.0: ; %main_body
41 ; GFX10-NEXT: s_clause 0x1
42 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
43 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
44 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
45 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
46 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
47 ; GFX10-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 0 offen
48 ; GFX10-NEXT: s_endpgm
49 ;
50 ; GFX1030-LABEL: raw_buffer_atomic_min_noret_f32:
51 ; GFX1030: ; %bb.0: ; %main_body
52 ; GFX1030-NEXT: s_clause 0x1
53 ; GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
54 ; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
55 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
56 ; GFX1030-NEXT: v_mov_b32_e32 v0, s4
57 ; GFX1030-NEXT: v_mov_b32_e32 v1, s5
58 ; GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen
59 ; GFX1030-NEXT: s_endpgm
60 ;
61 ; GFX1100-LABEL: raw_buffer_atomic_min_noret_f32:
62 ; GFX1100: ; %bb.0: ; %main_body
63 ; GFX1100-NEXT: s_clause 0x1
64 ; GFX1100-NEXT: s_load_b64 s[4:5], s[0:1], 0x34
65 ; GFX1100-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
66 ; GFX1100-NEXT: s_waitcnt lgkmcnt(0)
67 ; GFX1100-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
68 ; GFX1100-NEXT: buffer_atomic_min_f32 v0, v1, s[0:3], 0 offen
69 ; GFX1100-NEXT: s_nop 0
70 ; GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
71 ; GFX1100-NEXT: s_endpgm
72 ;
73 ; G_SI-LABEL: raw_buffer_atomic_min_noret_f32:
74 ; G_SI: ; %bb.0: ; %main_body
75 ; G_SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
76 ; G_SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
77 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
78 ; G_SI-NEXT: v_mov_b32_e32 v0, s4
79 ; G_SI-NEXT: v_mov_b32_e32 v1, s5
80 ; G_SI-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen
81 ; G_SI-NEXT: s_endpgm
82 ;
83 ; G_GFX7-LABEL: raw_buffer_atomic_min_noret_f32:
84 ; G_GFX7: ; %bb.0: ; %main_body
85 ; G_GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
86 ; G_GFX7-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
87 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
88 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s4
89 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s5
90 ; G_GFX7-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen
91 ; G_GFX7-NEXT: s_endpgm
92 ;
93 ; G_GFX10-LABEL: raw_buffer_atomic_min_noret_f32:
94 ; G_GFX10: ; %bb.0: ; %main_body
95 ; G_GFX10-NEXT: s_clause 0x1
96 ; G_GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
97 ; G_GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
98 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
99 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s2
100 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s3
101 ; G_GFX10-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 0 offen
102 ; G_GFX10-NEXT: s_endpgm
103 ;
104 ; G_GFX1030-LABEL: raw_buffer_atomic_min_noret_f32:
105 ; G_GFX1030: ; %bb.0: ; %main_body
106 ; G_GFX1030-NEXT: s_clause 0x1
107 ; G_GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
108 ; G_GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
109 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
110 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s4
111 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s5
112 ; G_GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen
113 ; G_GFX1030-NEXT: s_endpgm
114 ;
115 ; G_GFX1100-LABEL: raw_buffer_atomic_min_noret_f32:
116 ; G_GFX1100: ; %bb.0: ; %main_body
117 ; G_GFX1100-NEXT: s_clause 0x1
118 ; G_GFX1100-NEXT: s_load_b64 s[4:5], s[0:1], 0x34
119 ; G_GFX1100-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
120 ; G_GFX1100-NEXT: s_waitcnt lgkmcnt(0)
121 ; G_GFX1100-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
122 ; G_GFX1100-NEXT: buffer_atomic_min_f32 v0, v1, s[0:3], 0 offen
123 ; G_GFX1100-NEXT: s_nop 0
124 ; G_GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
125 ; G_GFX1100-NEXT: s_endpgm
126 main_body:
127 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmin.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
128 ret void
129 }
131 define amdgpu_ps void @raw_buffer_atomic_min_rtn_f32(<4 x i32> inreg %rsrc, float %data, i32 %vindex) {
132 ; SI-LABEL: raw_buffer_atomic_min_rtn_f32:
133 ; SI: ; %bb.0: ; %main_body
134 ; SI-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
135 ; SI-NEXT: s_mov_b32 s3, 0xf000
136 ; SI-NEXT: s_mov_b32 s2, -1
137 ; SI-NEXT: s_waitcnt vmcnt(0)
138 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
139 ; SI-NEXT: s_endpgm
140 ;
141 ; GFX7-LABEL: raw_buffer_atomic_min_rtn_f32:
142 ; GFX7: ; %bb.0: ; %main_body
143 ; GFX7-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
144 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
145 ; GFX7-NEXT: s_mov_b32 s2, -1
146 ; GFX7-NEXT: s_waitcnt vmcnt(0)
147 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
148 ; GFX7-NEXT: s_endpgm
149 ;
150 ; GFX10-LABEL: raw_buffer_atomic_min_rtn_f32:
151 ; GFX10: ; %bb.0: ; %main_body
152 ; GFX10-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
153 ; GFX10-NEXT: s_waitcnt vmcnt(0)
154 ; GFX10-NEXT: global_store_dword v[0:1], v0, off
155 ; GFX10-NEXT: s_endpgm
156 ;
157 ; GFX1030-LABEL: raw_buffer_atomic_min_rtn_f32:
158 ; GFX1030: ; %bb.0: ; %main_body
159 ; GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
160 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
161 ; GFX1030-NEXT: global_store_dword v[0:1], v0, off
162 ; GFX1030-NEXT: s_endpgm
163 ;
164 ; GFX1100-LABEL: raw_buffer_atomic_min_rtn_f32:
165 ; GFX1100: ; %bb.0: ; %main_body
166 ; GFX1100-NEXT: buffer_atomic_min_f32 v0, v1, s[0:3], 0 offen glc
167 ; GFX1100-NEXT: s_waitcnt vmcnt(0)
168 ; GFX1100-NEXT: global_store_b32 v[0:1], v0, off
169 ; GFX1100-NEXT: s_nop 0
170 ; GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
171 ; GFX1100-NEXT: s_endpgm
172 ;
173 ; G_SI-LABEL: raw_buffer_atomic_min_rtn_f32:
174 ; G_SI: ; %bb.0: ; %main_body
175 ; G_SI-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
176 ; G_SI-NEXT: s_mov_b32 s2, -1
177 ; G_SI-NEXT: s_mov_b32 s3, 0xf000
178 ; G_SI-NEXT: s_waitcnt vmcnt(0)
179 ; G_SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
180 ; G_SI-NEXT: s_endpgm
181 ;
182 ; G_GFX7-LABEL: raw_buffer_atomic_min_rtn_f32:
183 ; G_GFX7: ; %bb.0: ; %main_body
184 ; G_GFX7-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
185 ; G_GFX7-NEXT: s_mov_b32 s2, -1
186 ; G_GFX7-NEXT: s_mov_b32 s3, 0xf000
187 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
188 ; G_GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
189 ; G_GFX7-NEXT: s_endpgm
190 ;
191 ; G_GFX10-LABEL: raw_buffer_atomic_min_rtn_f32:
192 ; G_GFX10: ; %bb.0: ; %main_body
193 ; G_GFX10-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
194 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
195 ; G_GFX10-NEXT: global_store_dword v[0:1], v0, off
196 ; G_GFX10-NEXT: s_endpgm
197 ;
198 ; G_GFX1030-LABEL: raw_buffer_atomic_min_rtn_f32:
199 ; G_GFX1030: ; %bb.0: ; %main_body
200 ; G_GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[0:3], 0 offen glc
201 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
202 ; G_GFX1030-NEXT: global_store_dword v[0:1], v0, off
203 ; G_GFX1030-NEXT: s_endpgm
204 ;
205 ; G_GFX1100-LABEL: raw_buffer_atomic_min_rtn_f32:
206 ; G_GFX1100: ; %bb.0: ; %main_body
207 ; G_GFX1100-NEXT: buffer_atomic_min_f32 v0, v1, s[0:3], 0 offen glc
208 ; G_GFX1100-NEXT: s_waitcnt vmcnt(0)
209 ; G_GFX1100-NEXT: global_store_b32 v[0:1], v0, off
210 ; G_GFX1100-NEXT: s_nop 0
211 ; G_GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
212 ; G_GFX1100-NEXT: s_endpgm
213 main_body:
214 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmin.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
215 store float %ret, ptr addrspace(1) undef
216 ret void
217 }
219 define amdgpu_kernel void @raw_buffer_atomic_min_rtn_f32_off4_slc(<4 x i32> inreg %rsrc, float %data, i32 %vindex, ptr addrspace(3) %out) {
220 ; SI-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
221 ; SI: ; %bb.0: ; %main_body
222 ; SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
223 ; SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
224 ; SI-NEXT: s_load_dword s0, s[0:1], 0xf
225 ; SI-NEXT: s_mov_b32 m0, -1
226 ; SI-NEXT: s_waitcnt lgkmcnt(0)
227 ; SI-NEXT: v_mov_b32_e32 v0, s2
228 ; SI-NEXT: v_mov_b32_e32 v1, s3
229 ; SI-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
230 ; SI-NEXT: v_mov_b32_e32 v1, s0
231 ; SI-NEXT: s_waitcnt vmcnt(0)
232 ; SI-NEXT: ds_write_b32 v1, v0
233 ; SI-NEXT: s_endpgm
234 ;
235 ; GFX7-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
236 ; GFX7: ; %bb.0: ; %main_body
237 ; GFX7-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
238 ; GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
239 ; GFX7-NEXT: s_load_dword s0, s[0:1], 0xf
240 ; GFX7-NEXT: s_mov_b32 m0, -1
241 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
242 ; GFX7-NEXT: v_mov_b32_e32 v0, s2
243 ; GFX7-NEXT: v_mov_b32_e32 v1, s3
244 ; GFX7-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
245 ; GFX7-NEXT: v_mov_b32_e32 v1, s0
246 ; GFX7-NEXT: s_waitcnt vmcnt(0)
247 ; GFX7-NEXT: ds_write_b32 v1, v0
248 ; GFX7-NEXT: s_endpgm
249 ;
250 ; GFX10-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
251 ; GFX10: ; %bb.0: ; %main_body
252 ; GFX10-NEXT: s_clause 0x1
253 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
254 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
255 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
256 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
257 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
258 ; GFX10-NEXT: s_load_dword s0, s[0:1], 0x3c
259 ; GFX10-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
260 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
261 ; GFX10-NEXT: v_mov_b32_e32 v1, s0
262 ; GFX10-NEXT: s_waitcnt vmcnt(0)
263 ; GFX10-NEXT: ds_write_b32 v1, v0
264 ; GFX10-NEXT: s_endpgm
265 ;
266 ; GFX1030-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
267 ; GFX1030: ; %bb.0: ; %main_body
268 ; GFX1030-NEXT: s_clause 0x2
269 ; GFX1030-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
270 ; GFX1030-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
271 ; GFX1030-NEXT: s_load_dword s0, s[0:1], 0x3c
272 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
273 ; GFX1030-NEXT: v_mov_b32_e32 v0, s2
274 ; GFX1030-NEXT: v_mov_b32_e32 v1, s3
275 ; GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
276 ; GFX1030-NEXT: v_mov_b32_e32 v1, s0
277 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
278 ; GFX1030-NEXT: ds_write_b32 v1, v0
279 ; GFX1030-NEXT: s_endpgm
280 ;
281 ; GFX1100-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
282 ; GFX1100: ; %bb.0: ; %main_body
283 ; GFX1100-NEXT: s_clause 0x2
284 ; GFX1100-NEXT: s_load_b64 s[2:3], s[0:1], 0x34
285 ; GFX1100-NEXT: s_load_b128 s[4:7], s[0:1], 0x24
286 ; GFX1100-NEXT: s_load_b32 s0, s[0:1], 0x3c
287 ; GFX1100-NEXT: s_waitcnt lgkmcnt(0)
288 ; GFX1100-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
289 ; GFX1100-NEXT: buffer_atomic_min_f32 v0, v1, s[4:7], 4 offen glc slc
290 ; GFX1100-NEXT: v_mov_b32_e32 v1, s0
291 ; GFX1100-NEXT: s_waitcnt vmcnt(0)
292 ; GFX1100-NEXT: ds_store_b32 v1, v0
293 ; GFX1100-NEXT: s_endpgm
294 ;
295 ; G_SI-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
296 ; G_SI: ; %bb.0: ; %main_body
297 ; G_SI-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
298 ; G_SI-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
299 ; G_SI-NEXT: s_load_dword s0, s[0:1], 0xf
300 ; G_SI-NEXT: s_mov_b32 m0, -1
301 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
302 ; G_SI-NEXT: v_mov_b32_e32 v0, s2
303 ; G_SI-NEXT: v_mov_b32_e32 v1, s3
304 ; G_SI-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
305 ; G_SI-NEXT: v_mov_b32_e32 v1, s0
306 ; G_SI-NEXT: s_waitcnt vmcnt(0)
307 ; G_SI-NEXT: ds_write_b32 v1, v0
308 ; G_SI-NEXT: s_endpgm
309 ;
310 ; G_GFX7-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
311 ; G_GFX7: ; %bb.0: ; %main_body
312 ; G_GFX7-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0xd
313 ; G_GFX7-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x9
314 ; G_GFX7-NEXT: s_load_dword s0, s[0:1], 0xf
315 ; G_GFX7-NEXT: s_mov_b32 m0, -1
316 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
317 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s2
318 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s3
319 ; G_GFX7-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
320 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s0
321 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
322 ; G_GFX7-NEXT: ds_write_b32 v1, v0
323 ; G_GFX7-NEXT: s_endpgm
324 ;
325 ; G_GFX10-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
326 ; G_GFX10: ; %bb.0: ; %main_body
327 ; G_GFX10-NEXT: s_clause 0x1
328 ; G_GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
329 ; G_GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
330 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
331 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s2
332 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s3
333 ; G_GFX10-NEXT: s_load_dword s0, s[0:1], 0x3c
334 ; G_GFX10-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
335 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
336 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s0
337 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
338 ; G_GFX10-NEXT: ds_write_b32 v1, v0
339 ; G_GFX10-NEXT: s_endpgm
340 ;
341 ; G_GFX1030-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
342 ; G_GFX1030: ; %bb.0: ; %main_body
343 ; G_GFX1030-NEXT: s_clause 0x2
344 ; G_GFX1030-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
345 ; G_GFX1030-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
346 ; G_GFX1030-NEXT: s_load_dword s0, s[0:1], 0x3c
347 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
348 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s2
349 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s3
350 ; G_GFX1030-NEXT: buffer_atomic_fmin v0, v1, s[4:7], 4 offen glc slc
351 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s0
352 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
353 ; G_GFX1030-NEXT: ds_write_b32 v1, v0
354 ; G_GFX1030-NEXT: s_endpgm
355 ;
356 ; G_GFX1100-LABEL: raw_buffer_atomic_min_rtn_f32_off4_slc:
357 ; G_GFX1100: ; %bb.0: ; %main_body
358 ; G_GFX1100-NEXT: s_clause 0x2
359 ; G_GFX1100-NEXT: s_load_b64 s[2:3], s[0:1], 0x34
360 ; G_GFX1100-NEXT: s_load_b128 s[4:7], s[0:1], 0x24
361 ; G_GFX1100-NEXT: s_load_b32 s0, s[0:1], 0x3c
362 ; G_GFX1100-NEXT: s_waitcnt lgkmcnt(0)
363 ; G_GFX1100-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s3
364 ; G_GFX1100-NEXT: buffer_atomic_min_f32 v0, v1, s[4:7], 4 offen glc slc
365 ; G_GFX1100-NEXT: v_mov_b32_e32 v1, s0
366 ; G_GFX1100-NEXT: s_waitcnt vmcnt(0)
367 ; G_GFX1100-NEXT: ds_store_b32 v1, v0
368 ; G_GFX1100-NEXT: s_endpgm
369 main_body:
370 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmin.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 4, i32 2)
371 store float %ret, ptr addrspace(3) %out, align 8
372 ret void
373 }
375 define amdgpu_kernel void @raw_buffer_atomic_max_noret_f32(<4 x i32> inreg %rsrc, float %data, i32 %vindex) {
376 ; SI-LABEL: raw_buffer_atomic_max_noret_f32:
377 ; SI: ; %bb.0: ; %main_body
378 ; SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
379 ; SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
380 ; SI-NEXT: s_waitcnt lgkmcnt(0)
381 ; SI-NEXT: v_mov_b32_e32 v0, s4
382 ; SI-NEXT: v_mov_b32_e32 v1, s5
383 ; SI-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen
384 ; SI-NEXT: s_endpgm
385 ;
386 ; GFX7-LABEL: raw_buffer_atomic_max_noret_f32:
387 ; GFX7: ; %bb.0: ; %main_body
388 ; GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
389 ; GFX7-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
390 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
391 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
392 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
393 ; GFX7-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen
394 ; GFX7-NEXT: s_endpgm
395 ;
396 ; GFX10-LABEL: raw_buffer_atomic_max_noret_f32:
397 ; GFX10: ; %bb.0: ; %main_body
398 ; GFX10-NEXT: s_clause 0x1
399 ; GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
400 ; GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
401 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
402 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
403 ; GFX10-NEXT: v_mov_b32_e32 v1, s3
404 ; GFX10-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 0 offen
405 ; GFX10-NEXT: s_endpgm
406 ;
407 ; GFX1030-LABEL: raw_buffer_atomic_max_noret_f32:
408 ; GFX1030: ; %bb.0: ; %main_body
409 ; GFX1030-NEXT: s_clause 0x1
410 ; GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
411 ; GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
412 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
413 ; GFX1030-NEXT: v_mov_b32_e32 v0, s4
414 ; GFX1030-NEXT: v_mov_b32_e32 v1, s5
415 ; GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen
416 ; GFX1030-NEXT: s_endpgm
417 ;
418 ; GFX1100-LABEL: raw_buffer_atomic_max_noret_f32:
419 ; GFX1100: ; %bb.0: ; %main_body
420 ; GFX1100-NEXT: s_clause 0x1
421 ; GFX1100-NEXT: s_load_b64 s[4:5], s[0:1], 0x34
422 ; GFX1100-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
423 ; GFX1100-NEXT: s_waitcnt lgkmcnt(0)
424 ; GFX1100-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
425 ; GFX1100-NEXT: buffer_atomic_max_f32 v0, v1, s[0:3], 0 offen
426 ; GFX1100-NEXT: s_nop 0
427 ; GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
428 ; GFX1100-NEXT: s_endpgm
429 ;
430 ; G_SI-LABEL: raw_buffer_atomic_max_noret_f32:
431 ; G_SI: ; %bb.0: ; %main_body
432 ; G_SI-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
433 ; G_SI-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
434 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
435 ; G_SI-NEXT: v_mov_b32_e32 v0, s4
436 ; G_SI-NEXT: v_mov_b32_e32 v1, s5
437 ; G_SI-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen
438 ; G_SI-NEXT: s_endpgm
439 ;
440 ; G_GFX7-LABEL: raw_buffer_atomic_max_noret_f32:
441 ; G_GFX7: ; %bb.0: ; %main_body
442 ; G_GFX7-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0xd
443 ; G_GFX7-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
444 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
445 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s4
446 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s5
447 ; G_GFX7-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen
448 ; G_GFX7-NEXT: s_endpgm
449 ;
450 ; G_GFX10-LABEL: raw_buffer_atomic_max_noret_f32:
451 ; G_GFX10: ; %bb.0: ; %main_body
452 ; G_GFX10-NEXT: s_clause 0x1
453 ; G_GFX10-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x34
454 ; G_GFX10-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x24
455 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
456 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s2
457 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s3
458 ; G_GFX10-NEXT: buffer_atomic_fmax v0, v1, s[4:7], 0 offen
459 ; G_GFX10-NEXT: s_endpgm
460 ;
461 ; G_GFX1030-LABEL: raw_buffer_atomic_max_noret_f32:
462 ; G_GFX1030: ; %bb.0: ; %main_body
463 ; G_GFX1030-NEXT: s_clause 0x1
464 ; G_GFX1030-NEXT: s_load_dwordx2 s[4:5], s[0:1], 0x34
465 ; G_GFX1030-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
466 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
467 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s4
468 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s5
469 ; G_GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen
470 ; G_GFX1030-NEXT: s_endpgm
471 ;
472 ; G_GFX1100-LABEL: raw_buffer_atomic_max_noret_f32:
473 ; G_GFX1100: ; %bb.0: ; %main_body
474 ; G_GFX1100-NEXT: s_clause 0x1
475 ; G_GFX1100-NEXT: s_load_b64 s[4:5], s[0:1], 0x34
476 ; G_GFX1100-NEXT: s_load_b128 s[0:3], s[0:1], 0x24
477 ; G_GFX1100-NEXT: s_waitcnt lgkmcnt(0)
478 ; G_GFX1100-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
479 ; G_GFX1100-NEXT: buffer_atomic_max_f32 v0, v1, s[0:3], 0 offen
480 ; G_GFX1100-NEXT: s_nop 0
481 ; G_GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
482 ; G_GFX1100-NEXT: s_endpgm
483 main_body:
484 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmax.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
485 ret void
486 }
488 define amdgpu_ps void @raw_buffer_atomic_max_rtn_f32(<4 x i32> inreg %rsrc, float %data, i32 %vindex) {
489 ; SI-LABEL: raw_buffer_atomic_max_rtn_f32:
490 ; SI: ; %bb.0: ; %main_body
491 ; SI-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
492 ; SI-NEXT: s_mov_b32 s3, 0xf000
493 ; SI-NEXT: s_mov_b32 s2, -1
494 ; SI-NEXT: s_waitcnt vmcnt(0)
495 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
496 ; SI-NEXT: s_endpgm
497 ;
498 ; GFX7-LABEL: raw_buffer_atomic_max_rtn_f32:
499 ; GFX7: ; %bb.0: ; %main_body
500 ; GFX7-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
501 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
502 ; GFX7-NEXT: s_mov_b32 s2, -1
503 ; GFX7-NEXT: s_waitcnt vmcnt(0)
504 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
505 ; GFX7-NEXT: s_endpgm
506 ;
507 ; GFX10-LABEL: raw_buffer_atomic_max_rtn_f32:
508 ; GFX10: ; %bb.0: ; %main_body
509 ; GFX10-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
510 ; GFX10-NEXT: s_waitcnt vmcnt(0)
511 ; GFX10-NEXT: global_store_dword v[0:1], v0, off
512 ; GFX10-NEXT: s_endpgm
513 ;
514 ; GFX1030-LABEL: raw_buffer_atomic_max_rtn_f32:
515 ; GFX1030: ; %bb.0: ; %main_body
516 ; GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
517 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
518 ; GFX1030-NEXT: global_store_dword v[0:1], v0, off
519 ; GFX1030-NEXT: s_endpgm
520 ;
521 ; GFX1100-LABEL: raw_buffer_atomic_max_rtn_f32:
522 ; GFX1100: ; %bb.0: ; %main_body
523 ; GFX1100-NEXT: buffer_atomic_max_f32 v0, v1, s[0:3], 0 offen glc
524 ; GFX1100-NEXT: s_waitcnt vmcnt(0)
525 ; GFX1100-NEXT: global_store_b32 v[0:1], v0, off
526 ; GFX1100-NEXT: s_nop 0
527 ; GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
528 ; GFX1100-NEXT: s_endpgm
529 ;
530 ; G_SI-LABEL: raw_buffer_atomic_max_rtn_f32:
531 ; G_SI: ; %bb.0: ; %main_body
532 ; G_SI-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
533 ; G_SI-NEXT: s_mov_b32 s2, -1
534 ; G_SI-NEXT: s_mov_b32 s3, 0xf000
535 ; G_SI-NEXT: s_waitcnt vmcnt(0)
536 ; G_SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
537 ; G_SI-NEXT: s_endpgm
538 ;
539 ; G_GFX7-LABEL: raw_buffer_atomic_max_rtn_f32:
540 ; G_GFX7: ; %bb.0: ; %main_body
541 ; G_GFX7-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
542 ; G_GFX7-NEXT: s_mov_b32 s2, -1
543 ; G_GFX7-NEXT: s_mov_b32 s3, 0xf000
544 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
545 ; G_GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
546 ; G_GFX7-NEXT: s_endpgm
547 ;
548 ; G_GFX10-LABEL: raw_buffer_atomic_max_rtn_f32:
549 ; G_GFX10: ; %bb.0: ; %main_body
550 ; G_GFX10-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
551 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
552 ; G_GFX10-NEXT: global_store_dword v[0:1], v0, off
553 ; G_GFX10-NEXT: s_endpgm
554 ;
555 ; G_GFX1030-LABEL: raw_buffer_atomic_max_rtn_f32:
556 ; G_GFX1030: ; %bb.0: ; %main_body
557 ; G_GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 0 offen glc
558 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
559 ; G_GFX1030-NEXT: global_store_dword v[0:1], v0, off
560 ; G_GFX1030-NEXT: s_endpgm
561 ;
562 ; G_GFX1100-LABEL: raw_buffer_atomic_max_rtn_f32:
563 ; G_GFX1100: ; %bb.0: ; %main_body
564 ; G_GFX1100-NEXT: buffer_atomic_max_f32 v0, v1, s[0:3], 0 offen glc
565 ; G_GFX1100-NEXT: s_waitcnt vmcnt(0)
566 ; G_GFX1100-NEXT: global_store_b32 v[0:1], v0, off
567 ; G_GFX1100-NEXT: s_nop 0
568 ; G_GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
569 ; G_GFX1100-NEXT: s_endpgm
570 main_body:
571 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmax.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 0, i32 0)
572 store float %ret, ptr addrspace(1) undef
573 ret void
574 }
576 define amdgpu_kernel void @raw_buffer_atomic_max_rtn_f32_off4_slc(<4 x i32> inreg %rsrc, float %data, i32 %vindex, ptr addrspace(1) %out) {
577 ; SI-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
578 ; SI: ; %bb.0: ; %main_body
579 ; SI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x9
580 ; SI-NEXT: s_waitcnt lgkmcnt(0)
581 ; SI-NEXT: v_mov_b32_e32 v0, s4
582 ; SI-NEXT: v_mov_b32_e32 v1, s5
583 ; SI-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 4 offen glc slc
584 ; SI-NEXT: s_mov_b32 s3, 0xf000
585 ; SI-NEXT: s_mov_b32 s2, -1
586 ; SI-NEXT: s_mov_b32 s0, s6
587 ; SI-NEXT: s_mov_b32 s1, s7
588 ; SI-NEXT: s_waitcnt vmcnt(0)
589 ; SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
590 ; SI-NEXT: s_endpgm
591 ;
592 ; GFX7-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
593 ; GFX7: ; %bb.0: ; %main_body
594 ; GFX7-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x9
595 ; GFX7-NEXT: s_waitcnt lgkmcnt(0)
596 ; GFX7-NEXT: v_mov_b32_e32 v0, s4
597 ; GFX7-NEXT: v_mov_b32_e32 v1, s5
598 ; GFX7-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 4 offen glc slc
599 ; GFX7-NEXT: s_mov_b32 s3, 0xf000
600 ; GFX7-NEXT: s_mov_b32 s2, -1
601 ; GFX7-NEXT: s_mov_b32 s0, s6
602 ; GFX7-NEXT: s_mov_b32 s1, s7
603 ; GFX7-NEXT: s_waitcnt vmcnt(0)
604 ; GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
605 ; GFX7-NEXT: s_endpgm
606 ;
607 ; GFX10-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
608 ; GFX10: ; %bb.0: ; %main_body
609 ; GFX10-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24
610 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
611 ; GFX10-NEXT: v_mov_b32_e32 v0, s4
612 ; GFX10-NEXT: v_mov_b32_e32 v1, s5
613 ; GFX10-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 4 offen glc slc
614 ; GFX10-NEXT: v_mov_b32_e32 v1, 0
615 ; GFX10-NEXT: s_waitcnt vmcnt(0)
616 ; GFX10-NEXT: global_store_dword v1, v0, s[6:7]
617 ; GFX10-NEXT: s_endpgm
618 ;
619 ; GFX1030-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
620 ; GFX1030: ; %bb.0: ; %main_body
621 ; GFX1030-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24
622 ; GFX1030-NEXT: s_waitcnt lgkmcnt(0)
623 ; GFX1030-NEXT: v_mov_b32_e32 v0, s4
624 ; GFX1030-NEXT: v_mov_b32_e32 v1, s5
625 ; GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 4 offen glc slc
626 ; GFX1030-NEXT: v_mov_b32_e32 v1, 0
627 ; GFX1030-NEXT: s_waitcnt vmcnt(0)
628 ; GFX1030-NEXT: global_store_dword v1, v0, s[6:7]
629 ; GFX1030-NEXT: s_endpgm
630 ;
631 ; GFX1100-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
632 ; GFX1100: ; %bb.0: ; %main_body
633 ; GFX1100-NEXT: s_load_b256 s[0:7], s[0:1], 0x24
634 ; GFX1100-NEXT: s_waitcnt lgkmcnt(0)
635 ; GFX1100-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
636 ; GFX1100-NEXT: buffer_atomic_max_f32 v0, v1, s[0:3], 4 offen glc slc
637 ; GFX1100-NEXT: v_mov_b32_e32 v1, 0
638 ; GFX1100-NEXT: s_waitcnt vmcnt(0)
639 ; GFX1100-NEXT: global_store_b32 v1, v0, s[6:7]
640 ; GFX1100-NEXT: s_nop 0
641 ; GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
642 ; GFX1100-NEXT: s_endpgm
643 ;
644 ; G_SI-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
645 ; G_SI: ; %bb.0: ; %main_body
646 ; G_SI-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x9
647 ; G_SI-NEXT: s_waitcnt lgkmcnt(0)
648 ; G_SI-NEXT: v_mov_b32_e32 v0, s4
649 ; G_SI-NEXT: v_mov_b32_e32 v1, s5
650 ; G_SI-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 4 offen glc slc
651 ; G_SI-NEXT: s_mov_b32 s2, -1
652 ; G_SI-NEXT: s_mov_b32 s3, 0xf000
653 ; G_SI-NEXT: s_mov_b64 s[0:1], s[6:7]
654 ; G_SI-NEXT: s_waitcnt vmcnt(0)
655 ; G_SI-NEXT: buffer_store_dword v0, off, s[0:3], 0
656 ; G_SI-NEXT: s_endpgm
657 ;
658 ; G_GFX7-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
659 ; G_GFX7: ; %bb.0: ; %main_body
660 ; G_GFX7-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x9
661 ; G_GFX7-NEXT: s_waitcnt lgkmcnt(0)
662 ; G_GFX7-NEXT: v_mov_b32_e32 v0, s4
663 ; G_GFX7-NEXT: v_mov_b32_e32 v1, s5
664 ; G_GFX7-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 4 offen glc slc
665 ; G_GFX7-NEXT: s_mov_b32 s2, -1
666 ; G_GFX7-NEXT: s_mov_b32 s3, 0xf000
667 ; G_GFX7-NEXT: s_mov_b64 s[0:1], s[6:7]
668 ; G_GFX7-NEXT: s_waitcnt vmcnt(0)
669 ; G_GFX7-NEXT: buffer_store_dword v0, off, s[0:3], 0
670 ; G_GFX7-NEXT: s_endpgm
671 ;
672 ; G_GFX10-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
673 ; G_GFX10: ; %bb.0: ; %main_body
674 ; G_GFX10-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24
675 ; G_GFX10-NEXT: s_waitcnt lgkmcnt(0)
676 ; G_GFX10-NEXT: v_mov_b32_e32 v0, s4
677 ; G_GFX10-NEXT: v_mov_b32_e32 v1, s5
678 ; G_GFX10-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 4 offen glc slc
679 ; G_GFX10-NEXT: v_mov_b32_e32 v1, 0
680 ; G_GFX10-NEXT: s_waitcnt vmcnt(0)
681 ; G_GFX10-NEXT: global_store_dword v1, v0, s[6:7]
682 ; G_GFX10-NEXT: s_endpgm
683 ;
684 ; G_GFX1030-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
685 ; G_GFX1030: ; %bb.0: ; %main_body
686 ; G_GFX1030-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x24
687 ; G_GFX1030-NEXT: s_waitcnt lgkmcnt(0)
688 ; G_GFX1030-NEXT: v_mov_b32_e32 v0, s4
689 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, s5
690 ; G_GFX1030-NEXT: buffer_atomic_fmax v0, v1, s[0:3], 4 offen glc slc
691 ; G_GFX1030-NEXT: v_mov_b32_e32 v1, 0
692 ; G_GFX1030-NEXT: s_waitcnt vmcnt(0)
693 ; G_GFX1030-NEXT: global_store_dword v1, v0, s[6:7]
694 ; G_GFX1030-NEXT: s_endpgm
695 ;
696 ; G_GFX1100-LABEL: raw_buffer_atomic_max_rtn_f32_off4_slc:
697 ; G_GFX1100: ; %bb.0: ; %main_body
698 ; G_GFX1100-NEXT: s_load_b256 s[0:7], s[0:1], 0x24
699 ; G_GFX1100-NEXT: s_waitcnt lgkmcnt(0)
700 ; G_GFX1100-NEXT: v_dual_mov_b32 v0, s4 :: v_dual_mov_b32 v1, s5
701 ; G_GFX1100-NEXT: buffer_atomic_max_f32 v0, v1, s[0:3], 4 offen glc slc
702 ; G_GFX1100-NEXT: v_mov_b32_e32 v1, 0
703 ; G_GFX1100-NEXT: s_waitcnt vmcnt(0)
704 ; G_GFX1100-NEXT: global_store_b32 v1, v0, s[6:7]
705 ; G_GFX1100-NEXT: s_nop 0
706 ; G_GFX1100-NEXT: s_sendmsg sendmsg(MSG_DEALLOC_VGPRS)
707 ; G_GFX1100-NEXT: s_endpgm
708 main_body:
709 %ret = call float @llvm.amdgcn.raw.buffer.atomic.fmax.f32(float %data, <4 x i32> %rsrc, i32 %vindex, i32 4, i32 2)
710 store float %ret, ptr addrspace(1) %out, align 8
711 ret void
712 }