| blob | 3bc503e3714fe5b7cb9cb0ba0911ca8495affcb5 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -march=amdgcn -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=GCN %s
4 define amdgpu_kernel void @float4_inselt(ptr addrspace(1) %out, <4 x float> %vec, i32 %sel) {
5 ; GCN-LABEL: float4_inselt:
6 ; GCN: ; %bb.0: ; %entry
7 ; GCN-NEXT: s_load_dword s2, s[0:1], 0x44
8 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
9 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
10 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
11 ; GCN-NEXT: s_cmp_lg_u32 s2, 3
12 ; GCN-NEXT: v_mov_b32_e32 v0, s7
13 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
14 ; GCN-NEXT: s_cmp_lg_u32 s2, 2
15 ; GCN-NEXT: v_cndmask_b32_e32 v3, 1.0, v0, vcc
16 ; GCN-NEXT: v_mov_b32_e32 v0, s6
17 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
18 ; GCN-NEXT: s_cmp_lg_u32 s2, 1
19 ; GCN-NEXT: v_cndmask_b32_e32 v2, 1.0, v0, vcc
20 ; GCN-NEXT: v_mov_b32_e32 v0, s5
21 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
22 ; GCN-NEXT: s_cmp_lg_u32 s2, 0
23 ; GCN-NEXT: v_cndmask_b32_e32 v1, 1.0, v0, vcc
24 ; GCN-NEXT: v_mov_b32_e32 v0, s4
25 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
26 ; GCN-NEXT: v_mov_b32_e32 v5, s1
27 ; GCN-NEXT: v_cndmask_b32_e32 v0, 1.0, v0, vcc
28 ; GCN-NEXT: v_mov_b32_e32 v4, s0
29 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
30 ; GCN-NEXT: s_endpgm
31 entry:
32 %v = insertelement <4 x float> %vec, float 1.000000e+00, i32 %sel
33 store <4 x float> %v, ptr addrspace(1) %out
34 ret void
35 }
37 define amdgpu_kernel void @float4_inselt_undef(ptr addrspace(1) %out, i32 %sel) {
38 ; GCN-LABEL: float4_inselt_undef:
39 ; GCN: ; %bb.0: ; %entry
40 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
41 ; GCN-NEXT: v_mov_b32_e32 v0, 1.0
42 ; GCN-NEXT: v_mov_b32_e32 v1, v0
43 ; GCN-NEXT: v_mov_b32_e32 v2, v0
44 ; GCN-NEXT: v_mov_b32_e32 v3, v0
45 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
46 ; GCN-NEXT: v_mov_b32_e32 v5, s1
47 ; GCN-NEXT: v_mov_b32_e32 v4, s0
48 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
49 ; GCN-NEXT: s_endpgm
50 entry:
51 %v = insertelement <4 x float> undef, float 1.000000e+00, i32 %sel
52 store <4 x float> %v, ptr addrspace(1) %out
53 ret void
54 }
56 define amdgpu_kernel void @int4_inselt(ptr addrspace(1) %out, <4 x i32> %vec, i32 %sel) {
57 ; GCN-LABEL: int4_inselt:
58 ; GCN: ; %bb.0: ; %entry
59 ; GCN-NEXT: s_load_dword s2, s[0:1], 0x44
60 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
61 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
62 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
63 ; GCN-NEXT: s_cmp_lg_u32 s2, 3
64 ; GCN-NEXT: s_cselect_b32 s3, s7, 1
65 ; GCN-NEXT: s_cmp_lg_u32 s2, 2
66 ; GCN-NEXT: s_cselect_b32 s6, s6, 1
67 ; GCN-NEXT: s_cmp_lg_u32 s2, 1
68 ; GCN-NEXT: s_cselect_b32 s5, s5, 1
69 ; GCN-NEXT: s_cmp_lg_u32 s2, 0
70 ; GCN-NEXT: s_cselect_b32 s2, s4, 1
71 ; GCN-NEXT: v_mov_b32_e32 v5, s1
72 ; GCN-NEXT: v_mov_b32_e32 v0, s2
73 ; GCN-NEXT: v_mov_b32_e32 v1, s5
74 ; GCN-NEXT: v_mov_b32_e32 v2, s6
75 ; GCN-NEXT: v_mov_b32_e32 v3, s3
76 ; GCN-NEXT: v_mov_b32_e32 v4, s0
77 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
78 ; GCN-NEXT: s_endpgm
79 entry:
80 %v = insertelement <4 x i32> %vec, i32 1, i32 %sel
81 store <4 x i32> %v, ptr addrspace(1) %out
82 ret void
83 }
85 define amdgpu_kernel void @float2_inselt(ptr addrspace(1) %out, <2 x float> %vec, i32 %sel) {
86 ; GCN-LABEL: float2_inselt:
87 ; GCN: ; %bb.0: ; %entry
88 ; GCN-NEXT: s_load_dword s4, s[0:1], 0x34
89 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
90 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
91 ; GCN-NEXT: s_cmp_lg_u32 s4, 1
92 ; GCN-NEXT: v_mov_b32_e32 v0, s3
93 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
94 ; GCN-NEXT: s_cmp_lg_u32 s4, 0
95 ; GCN-NEXT: v_cndmask_b32_e32 v1, 1.0, v0, vcc
96 ; GCN-NEXT: v_mov_b32_e32 v0, s2
97 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
98 ; GCN-NEXT: v_mov_b32_e32 v3, s1
99 ; GCN-NEXT: v_cndmask_b32_e32 v0, 1.0, v0, vcc
100 ; GCN-NEXT: v_mov_b32_e32 v2, s0
101 ; GCN-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
102 ; GCN-NEXT: s_endpgm
103 entry:
104 %v = insertelement <2 x float> %vec, float 1.000000e+00, i32 %sel
105 store <2 x float> %v, ptr addrspace(1) %out
106 ret void
107 }
109 define amdgpu_kernel void @float8_inselt(ptr addrspace(1) %out, <8 x float> %vec, i32 %sel) {
110 ; GCN-LABEL: float8_inselt:
111 ; GCN: ; %bb.0: ; %entry
112 ; GCN-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x44
113 ; GCN-NEXT: s_load_dword s2, s[0:1], 0x64
114 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
115 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
116 ; GCN-NEXT: v_mov_b32_e32 v0, s4
117 ; GCN-NEXT: s_mov_b32 m0, s2
118 ; GCN-NEXT: s_add_u32 s2, s0, 16
119 ; GCN-NEXT: s_addc_u32 s3, s1, 0
120 ; GCN-NEXT: v_mov_b32_e32 v1, s5
121 ; GCN-NEXT: v_mov_b32_e32 v2, s6
122 ; GCN-NEXT: v_mov_b32_e32 v3, s7
123 ; GCN-NEXT: v_mov_b32_e32 v4, s8
124 ; GCN-NEXT: v_mov_b32_e32 v5, s9
125 ; GCN-NEXT: v_mov_b32_e32 v6, s10
126 ; GCN-NEXT: v_mov_b32_e32 v7, s11
127 ; GCN-NEXT: v_mov_b32_e32 v9, s3
128 ; GCN-NEXT: v_movreld_b32_e32 v0, 1.0
129 ; GCN-NEXT: v_mov_b32_e32 v8, s2
130 ; GCN-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
131 ; GCN-NEXT: s_nop 0
132 ; GCN-NEXT: v_mov_b32_e32 v5, s1
133 ; GCN-NEXT: v_mov_b32_e32 v4, s0
134 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
135 ; GCN-NEXT: s_endpgm
136 entry:
137 %v = insertelement <8 x float> %vec, float 1.000000e+00, i32 %sel
138 store <8 x float> %v, ptr addrspace(1) %out
139 ret void
140 }
142 define amdgpu_kernel void @float16_inselt(ptr addrspace(1) %out, <16 x float> %vec, i32 %sel) {
143 ; GCN-LABEL: float16_inselt:
144 ; GCN: ; %bb.0: ; %entry
145 ; GCN-NEXT: s_load_dwordx16 s[4:19], s[0:1], 0x64
146 ; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
147 ; GCN-NEXT: s_load_dword s20, s[0:1], 0xa4
148 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
149 ; GCN-NEXT: v_mov_b32_e32 v0, s4
150 ; GCN-NEXT: s_add_u32 s0, s2, 48
151 ; GCN-NEXT: s_addc_u32 s1, s3, 0
152 ; GCN-NEXT: v_mov_b32_e32 v17, s1
153 ; GCN-NEXT: v_mov_b32_e32 v1, s5
154 ; GCN-NEXT: v_mov_b32_e32 v2, s6
155 ; GCN-NEXT: v_mov_b32_e32 v3, s7
156 ; GCN-NEXT: v_mov_b32_e32 v4, s8
157 ; GCN-NEXT: v_mov_b32_e32 v5, s9
158 ; GCN-NEXT: v_mov_b32_e32 v6, s10
159 ; GCN-NEXT: v_mov_b32_e32 v7, s11
160 ; GCN-NEXT: v_mov_b32_e32 v8, s12
161 ; GCN-NEXT: v_mov_b32_e32 v9, s13
162 ; GCN-NEXT: v_mov_b32_e32 v10, s14
163 ; GCN-NEXT: v_mov_b32_e32 v11, s15
164 ; GCN-NEXT: v_mov_b32_e32 v12, s16
165 ; GCN-NEXT: v_mov_b32_e32 v13, s17
166 ; GCN-NEXT: v_mov_b32_e32 v14, s18
167 ; GCN-NEXT: v_mov_b32_e32 v15, s19
168 ; GCN-NEXT: s_mov_b32 m0, s20
169 ; GCN-NEXT: v_mov_b32_e32 v16, s0
170 ; GCN-NEXT: s_add_u32 s0, s2, 32
171 ; GCN-NEXT: v_movreld_b32_e32 v0, 1.0
172 ; GCN-NEXT: s_addc_u32 s1, s3, 0
173 ; GCN-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
174 ; GCN-NEXT: s_nop 0
175 ; GCN-NEXT: v_mov_b32_e32 v13, s1
176 ; GCN-NEXT: v_mov_b32_e32 v12, s0
177 ; GCN-NEXT: s_add_u32 s0, s2, 16
178 ; GCN-NEXT: s_addc_u32 s1, s3, 0
179 ; GCN-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
180 ; GCN-NEXT: s_nop 0
181 ; GCN-NEXT: v_mov_b32_e32 v9, s1
182 ; GCN-NEXT: v_mov_b32_e32 v8, s0
183 ; GCN-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
184 ; GCN-NEXT: s_nop 0
185 ; GCN-NEXT: v_mov_b32_e32 v5, s3
186 ; GCN-NEXT: v_mov_b32_e32 v4, s2
187 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
188 ; GCN-NEXT: s_endpgm
189 entry:
190 %v = insertelement <16 x float> %vec, float 1.000000e+00, i32 %sel
191 store <16 x float> %v, ptr addrspace(1) %out
192 ret void
193 }
195 define amdgpu_kernel void @float32_inselt(ptr addrspace(1) %out, <32 x float> %vec, i32 %sel) {
196 ; GCN-LABEL: float32_inselt:
197 ; GCN: ; %bb.0: ; %entry
198 ; GCN-NEXT: s_load_dwordx16 s[36:51], s[0:1], 0xa4
199 ; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
200 ; GCN-NEXT: s_load_dwordx16 s[4:19], s[0:1], 0xe4
201 ; GCN-NEXT: s_load_dword s0, s[0:1], 0x124
202 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
203 ; GCN-NEXT: v_mov_b32_e32 v0, s36
204 ; GCN-NEXT: v_mov_b32_e32 v1, s37
205 ; GCN-NEXT: v_mov_b32_e32 v2, s38
206 ; GCN-NEXT: s_mov_b32 m0, s0
207 ; GCN-NEXT: s_add_u32 s0, s2, 0x70
208 ; GCN-NEXT: s_addc_u32 s1, s3, 0
209 ; GCN-NEXT: v_mov_b32_e32 v33, s1
210 ; GCN-NEXT: v_mov_b32_e32 v3, s39
211 ; GCN-NEXT: v_mov_b32_e32 v4, s40
212 ; GCN-NEXT: v_mov_b32_e32 v5, s41
213 ; GCN-NEXT: v_mov_b32_e32 v6, s42
214 ; GCN-NEXT: v_mov_b32_e32 v7, s43
215 ; GCN-NEXT: v_mov_b32_e32 v8, s44
216 ; GCN-NEXT: v_mov_b32_e32 v9, s45
217 ; GCN-NEXT: v_mov_b32_e32 v10, s46
218 ; GCN-NEXT: v_mov_b32_e32 v11, s47
219 ; GCN-NEXT: v_mov_b32_e32 v12, s48
220 ; GCN-NEXT: v_mov_b32_e32 v13, s49
221 ; GCN-NEXT: v_mov_b32_e32 v14, s50
222 ; GCN-NEXT: v_mov_b32_e32 v15, s51
223 ; GCN-NEXT: v_mov_b32_e32 v16, s4
224 ; GCN-NEXT: v_mov_b32_e32 v17, s5
225 ; GCN-NEXT: v_mov_b32_e32 v18, s6
226 ; GCN-NEXT: v_mov_b32_e32 v19, s7
227 ; GCN-NEXT: v_mov_b32_e32 v20, s8
228 ; GCN-NEXT: v_mov_b32_e32 v21, s9
229 ; GCN-NEXT: v_mov_b32_e32 v22, s10
230 ; GCN-NEXT: v_mov_b32_e32 v23, s11
231 ; GCN-NEXT: v_mov_b32_e32 v24, s12
232 ; GCN-NEXT: v_mov_b32_e32 v25, s13
233 ; GCN-NEXT: v_mov_b32_e32 v26, s14
234 ; GCN-NEXT: v_mov_b32_e32 v27, s15
235 ; GCN-NEXT: v_mov_b32_e32 v28, s16
236 ; GCN-NEXT: v_mov_b32_e32 v29, s17
237 ; GCN-NEXT: v_mov_b32_e32 v30, s18
238 ; GCN-NEXT: v_mov_b32_e32 v31, s19
239 ; GCN-NEXT: v_mov_b32_e32 v32, s0
240 ; GCN-NEXT: s_add_u32 s0, s2, 0x60
241 ; GCN-NEXT: v_movreld_b32_e32 v0, 1.0
242 ; GCN-NEXT: s_addc_u32 s1, s3, 0
243 ; GCN-NEXT: flat_store_dwordx4 v[32:33], v[28:31]
244 ; GCN-NEXT: s_nop 0
245 ; GCN-NEXT: v_mov_b32_e32 v29, s1
246 ; GCN-NEXT: v_mov_b32_e32 v28, s0
247 ; GCN-NEXT: s_add_u32 s0, s2, 0x50
248 ; GCN-NEXT: s_addc_u32 s1, s3, 0
249 ; GCN-NEXT: flat_store_dwordx4 v[28:29], v[24:27]
250 ; GCN-NEXT: s_nop 0
251 ; GCN-NEXT: v_mov_b32_e32 v25, s1
252 ; GCN-NEXT: v_mov_b32_e32 v24, s0
253 ; GCN-NEXT: s_add_u32 s0, s2, 64
254 ; GCN-NEXT: s_addc_u32 s1, s3, 0
255 ; GCN-NEXT: flat_store_dwordx4 v[24:25], v[20:23]
256 ; GCN-NEXT: s_nop 0
257 ; GCN-NEXT: v_mov_b32_e32 v21, s1
258 ; GCN-NEXT: v_mov_b32_e32 v20, s0
259 ; GCN-NEXT: s_add_u32 s0, s2, 48
260 ; GCN-NEXT: s_addc_u32 s1, s3, 0
261 ; GCN-NEXT: flat_store_dwordx4 v[20:21], v[16:19]
262 ; GCN-NEXT: s_nop 0
263 ; GCN-NEXT: v_mov_b32_e32 v17, s1
264 ; GCN-NEXT: v_mov_b32_e32 v16, s0
265 ; GCN-NEXT: s_add_u32 s0, s2, 32
266 ; GCN-NEXT: s_addc_u32 s1, s3, 0
267 ; GCN-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
268 ; GCN-NEXT: s_nop 0
269 ; GCN-NEXT: v_mov_b32_e32 v13, s1
270 ; GCN-NEXT: v_mov_b32_e32 v12, s0
271 ; GCN-NEXT: s_add_u32 s0, s2, 16
272 ; GCN-NEXT: s_addc_u32 s1, s3, 0
273 ; GCN-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
274 ; GCN-NEXT: s_nop 0
275 ; GCN-NEXT: v_mov_b32_e32 v9, s1
276 ; GCN-NEXT: v_mov_b32_e32 v8, s0
277 ; GCN-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
278 ; GCN-NEXT: s_nop 0
279 ; GCN-NEXT: v_mov_b32_e32 v5, s3
280 ; GCN-NEXT: v_mov_b32_e32 v4, s2
281 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
282 ; GCN-NEXT: s_endpgm
283 entry:
284 %v = insertelement <32 x float> %vec, float 1.000000e+00, i32 %sel
285 store <32 x float> %v, ptr addrspace(1) %out
286 ret void
287 }
289 define amdgpu_kernel void @half4_inselt(ptr addrspace(1) %out, <4 x half> %vec, i32 %sel) {
290 ; GCN-LABEL: half4_inselt:
291 ; GCN: ; %bb.0: ; %entry
292 ; GCN-NEXT: s_load_dword s6, s[0:1], 0x34
293 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
294 ; GCN-NEXT: s_mov_b32 s4, 0x3c003c00
295 ; GCN-NEXT: s_mov_b32 s5, s4
296 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
297 ; GCN-NEXT: s_lshl_b32 s6, s6, 4
298 ; GCN-NEXT: s_lshl_b64 s[6:7], 0xffff, s6
299 ; GCN-NEXT: s_andn2_b64 s[2:3], s[2:3], s[6:7]
300 ; GCN-NEXT: s_and_b64 s[4:5], s[6:7], s[4:5]
301 ; GCN-NEXT: s_or_b64 s[2:3], s[4:5], s[2:3]
302 ; GCN-NEXT: v_mov_b32_e32 v0, s0
303 ; GCN-NEXT: v_mov_b32_e32 v2, s2
304 ; GCN-NEXT: v_mov_b32_e32 v1, s1
305 ; GCN-NEXT: v_mov_b32_e32 v3, s3
306 ; GCN-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
307 ; GCN-NEXT: s_endpgm
308 entry:
309 %v = insertelement <4 x half> %vec, half 1.000000e+00, i32 %sel
310 store <4 x half> %v, ptr addrspace(1) %out
311 ret void
312 }
314 define amdgpu_kernel void @half2_inselt(ptr addrspace(1) %out, <2 x half> %vec, i32 %sel) {
315 ; GCN-LABEL: half2_inselt:
316 ; GCN: ; %bb.0: ; %entry
317 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
318 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
319 ; GCN-NEXT: s_lshl_b32 s3, s3, 4
320 ; GCN-NEXT: s_lshl_b32 s3, 0xffff, s3
321 ; GCN-NEXT: s_andn2_b32 s2, s2, s3
322 ; GCN-NEXT: s_and_b32 s3, s3, 0x3c003c00
323 ; GCN-NEXT: s_or_b32 s2, s3, s2
324 ; GCN-NEXT: v_mov_b32_e32 v0, s0
325 ; GCN-NEXT: v_mov_b32_e32 v1, s1
326 ; GCN-NEXT: v_mov_b32_e32 v2, s2
327 ; GCN-NEXT: flat_store_dword v[0:1], v2
328 ; GCN-NEXT: s_endpgm
329 entry:
330 %v = insertelement <2 x half> %vec, half 1.000000e+00, i32 %sel
331 store <2 x half> %v, ptr addrspace(1) %out
332 ret void
333 }
335 define amdgpu_kernel void @half8_inselt(ptr addrspace(1) %out, <8 x half> %vec, i32 %sel) {
336 ; GCN-LABEL: half8_inselt:
337 ; GCN: ; %bb.0: ; %entry
338 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
339 ; GCN-NEXT: s_load_dword s2, s[0:1], 0x44
340 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
341 ; GCN-NEXT: v_mov_b32_e32 v0, 0x3c00
342 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
343 ; GCN-NEXT: s_lshr_b32 s3, s7, 16
344 ; GCN-NEXT: s_cmp_lg_u32 s2, 7
345 ; GCN-NEXT: v_mov_b32_e32 v1, s3
346 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
347 ; GCN-NEXT: s_cmp_lg_u32 s2, 6
348 ; GCN-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc
349 ; GCN-NEXT: v_mov_b32_e32 v2, s7
350 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
351 ; GCN-NEXT: s_lshr_b32 s3, s6, 16
352 ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v1
353 ; GCN-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc
354 ; GCN-NEXT: s_cmp_lg_u32 s2, 5
355 ; GCN-NEXT: v_or_b32_sdwa v3, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
356 ; GCN-NEXT: v_mov_b32_e32 v1, s3
357 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
358 ; GCN-NEXT: s_cmp_lg_u32 s2, 4
359 ; GCN-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc
360 ; GCN-NEXT: v_mov_b32_e32 v2, s6
361 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
362 ; GCN-NEXT: s_lshr_b32 s3, s5, 16
363 ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v1
364 ; GCN-NEXT: v_cndmask_b32_e32 v2, v0, v2, vcc
365 ; GCN-NEXT: s_cmp_lg_u32 s2, 3
366 ; GCN-NEXT: v_or_b32_sdwa v2, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
367 ; GCN-NEXT: v_mov_b32_e32 v1, s3
368 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
369 ; GCN-NEXT: s_cmp_lg_u32 s2, 2
370 ; GCN-NEXT: v_cndmask_b32_e32 v1, v0, v1, vcc
371 ; GCN-NEXT: v_mov_b32_e32 v4, s5
372 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
373 ; GCN-NEXT: s_lshr_b32 s3, s4, 16
374 ; GCN-NEXT: v_lshlrev_b32_e32 v1, 16, v1
375 ; GCN-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc
376 ; GCN-NEXT: s_cmp_lg_u32 s2, 1
377 ; GCN-NEXT: v_or_b32_sdwa v1, v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
378 ; GCN-NEXT: v_mov_b32_e32 v4, s3
379 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
380 ; GCN-NEXT: s_cmp_lg_u32 s2, 0
381 ; GCN-NEXT: v_cndmask_b32_e32 v4, v0, v4, vcc
382 ; GCN-NEXT: v_mov_b32_e32 v5, s4
383 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
384 ; GCN-NEXT: v_lshlrev_b32_e32 v4, 16, v4
385 ; GCN-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc
386 ; GCN-NEXT: v_or_b32_sdwa v0, v0, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
387 ; GCN-NEXT: v_mov_b32_e32 v5, s1
388 ; GCN-NEXT: v_mov_b32_e32 v4, s0
389 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
390 ; GCN-NEXT: s_endpgm
391 entry:
392 %v = insertelement <8 x half> %vec, half 1.000000e+00, i32 %sel
393 store <8 x half> %v, ptr addrspace(1) %out
394 ret void
395 }
397 define amdgpu_kernel void @short2_inselt(ptr addrspace(1) %out, <2 x i16> %vec, i32 %sel) {
398 ; GCN-LABEL: short2_inselt:
399 ; GCN: ; %bb.0: ; %entry
400 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
401 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
402 ; GCN-NEXT: s_lshl_b32 s3, s3, 4
403 ; GCN-NEXT: s_lshl_b32 s3, 0xffff, s3
404 ; GCN-NEXT: s_andn2_b32 s2, s2, s3
405 ; GCN-NEXT: s_and_b32 s3, s3, 0x10001
406 ; GCN-NEXT: s_or_b32 s2, s3, s2
407 ; GCN-NEXT: v_mov_b32_e32 v0, s0
408 ; GCN-NEXT: v_mov_b32_e32 v1, s1
409 ; GCN-NEXT: v_mov_b32_e32 v2, s2
410 ; GCN-NEXT: flat_store_dword v[0:1], v2
411 ; GCN-NEXT: s_endpgm
412 entry:
413 %v = insertelement <2 x i16> %vec, i16 1, i32 %sel
414 store <2 x i16> %v, ptr addrspace(1) %out
415 ret void
416 }
418 define amdgpu_kernel void @short4_inselt(ptr addrspace(1) %out, <4 x i16> %vec, i32 %sel) {
419 ; GCN-LABEL: short4_inselt:
420 ; GCN: ; %bb.0: ; %entry
421 ; GCN-NEXT: s_load_dword s6, s[0:1], 0x34
422 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
423 ; GCN-NEXT: s_mov_b32 s4, 0x10001
424 ; GCN-NEXT: s_mov_b32 s5, s4
425 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
426 ; GCN-NEXT: s_lshl_b32 s6, s6, 4
427 ; GCN-NEXT: s_lshl_b64 s[6:7], 0xffff, s6
428 ; GCN-NEXT: s_andn2_b64 s[2:3], s[2:3], s[6:7]
429 ; GCN-NEXT: s_and_b64 s[4:5], s[6:7], s[4:5]
430 ; GCN-NEXT: s_or_b64 s[2:3], s[4:5], s[2:3]
431 ; GCN-NEXT: v_mov_b32_e32 v0, s0
432 ; GCN-NEXT: v_mov_b32_e32 v2, s2
433 ; GCN-NEXT: v_mov_b32_e32 v1, s1
434 ; GCN-NEXT: v_mov_b32_e32 v3, s3
435 ; GCN-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
436 ; GCN-NEXT: s_endpgm
437 entry:
438 %v = insertelement <4 x i16> %vec, i16 1, i32 %sel
439 store <4 x i16> %v, ptr addrspace(1) %out
440 ret void
441 }
443 define amdgpu_kernel void @byte8_inselt(ptr addrspace(1) %out, <8 x i8> %vec, i32 %sel) {
444 ; GCN-LABEL: byte8_inselt:
445 ; GCN: ; %bb.0: ; %entry
446 ; GCN-NEXT: s_load_dword s4, s[0:1], 0x34
447 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
448 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
449 ; GCN-NEXT: s_lshl_b32 s4, s4, 3
450 ; GCN-NEXT: s_lshl_b64 s[4:5], 0xff, s4
451 ; GCN-NEXT: s_and_b32 s7, s5, 0x1010101
452 ; GCN-NEXT: s_and_b32 s6, s4, 0x1010101
453 ; GCN-NEXT: s_andn2_b64 s[2:3], s[2:3], s[4:5]
454 ; GCN-NEXT: s_or_b64 s[2:3], s[6:7], s[2:3]
455 ; GCN-NEXT: v_mov_b32_e32 v3, s1
456 ; GCN-NEXT: v_mov_b32_e32 v0, s2
457 ; GCN-NEXT: v_mov_b32_e32 v1, s3
458 ; GCN-NEXT: v_mov_b32_e32 v2, s0
459 ; GCN-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
460 ; GCN-NEXT: s_endpgm
461 entry:
462 %v = insertelement <8 x i8> %vec, i8 1, i32 %sel
463 store <8 x i8> %v, ptr addrspace(1) %out
464 ret void
465 }
467 define amdgpu_kernel void @byte16_inselt(ptr addrspace(1) %out, <16 x i8> %vec, i32 %sel) {
468 ; GCN-LABEL: byte16_inselt:
469 ; GCN: ; %bb.0: ; %entry
470 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
471 ; GCN-NEXT: s_load_dword s2, s[0:1], 0x44
472 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
473 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
474 ; GCN-NEXT: s_lshr_b32 s3, s7, 24
475 ; GCN-NEXT: s_cmp_lg_u32 s2, 15
476 ; GCN-NEXT: v_mov_b32_e32 v0, s3
477 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
478 ; GCN-NEXT: s_lshr_b32 s3, s7, 16
479 ; GCN-NEXT: s_cmp_lg_u32 s2, 14
480 ; GCN-NEXT: v_cndmask_b32_e32 v0, 1, v0, vcc
481 ; GCN-NEXT: v_mov_b32_e32 v1, s3
482 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
483 ; GCN-NEXT: s_lshr_b32 s3, s7, 8
484 ; GCN-NEXT: v_lshlrev_b16_e32 v0, 8, v0
485 ; GCN-NEXT: v_cndmask_b32_e32 v1, 1, v1, vcc
486 ; GCN-NEXT: s_cmp_lg_u32 s2, 13
487 ; GCN-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
488 ; GCN-NEXT: v_mov_b32_e32 v1, s3
489 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
490 ; GCN-NEXT: s_cmp_lg_u32 s2, 12
491 ; GCN-NEXT: v_cndmask_b32_e32 v1, 1, v1, vcc
492 ; GCN-NEXT: v_mov_b32_e32 v2, s7
493 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
494 ; GCN-NEXT: v_lshlrev_b16_e32 v1, 8, v1
495 ; GCN-NEXT: v_cndmask_b32_e32 v2, 1, v2, vcc
496 ; GCN-NEXT: s_lshr_b32 s3, s6, 24
497 ; GCN-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
498 ; GCN-NEXT: s_cmp_lg_u32 s2, 11
499 ; GCN-NEXT: v_or_b32_sdwa v3, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
500 ; GCN-NEXT: v_mov_b32_e32 v0, s3
501 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
502 ; GCN-NEXT: s_lshr_b32 s3, s6, 16
503 ; GCN-NEXT: s_cmp_lg_u32 s2, 10
504 ; GCN-NEXT: v_cndmask_b32_e32 v0, 1, v0, vcc
505 ; GCN-NEXT: v_mov_b32_e32 v1, s3
506 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
507 ; GCN-NEXT: s_lshr_b32 s3, s6, 8
508 ; GCN-NEXT: v_lshlrev_b16_e32 v0, 8, v0
509 ; GCN-NEXT: v_cndmask_b32_e32 v1, 1, v1, vcc
510 ; GCN-NEXT: s_cmp_lg_u32 s2, 9
511 ; GCN-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
512 ; GCN-NEXT: v_mov_b32_e32 v1, s3
513 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
514 ; GCN-NEXT: s_cmp_lg_u32 s2, 8
515 ; GCN-NEXT: v_cndmask_b32_e32 v1, 1, v1, vcc
516 ; GCN-NEXT: v_mov_b32_e32 v2, s6
517 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
518 ; GCN-NEXT: v_lshlrev_b16_e32 v1, 8, v1
519 ; GCN-NEXT: v_cndmask_b32_e32 v2, 1, v2, vcc
520 ; GCN-NEXT: s_lshr_b32 s3, s5, 24
521 ; GCN-NEXT: v_or_b32_sdwa v1, v2, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
522 ; GCN-NEXT: s_cmp_lg_u32 s2, 7
523 ; GCN-NEXT: v_or_b32_sdwa v2, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
524 ; GCN-NEXT: v_mov_b32_e32 v0, s3
525 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
526 ; GCN-NEXT: s_lshr_b32 s3, s5, 16
527 ; GCN-NEXT: s_cmp_lg_u32 s2, 6
528 ; GCN-NEXT: v_cndmask_b32_e32 v0, 1, v0, vcc
529 ; GCN-NEXT: v_mov_b32_e32 v1, s3
530 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
531 ; GCN-NEXT: s_lshr_b32 s3, s5, 8
532 ; GCN-NEXT: v_lshlrev_b16_e32 v0, 8, v0
533 ; GCN-NEXT: v_cndmask_b32_e32 v1, 1, v1, vcc
534 ; GCN-NEXT: s_cmp_lg_u32 s2, 5
535 ; GCN-NEXT: v_or_b32_sdwa v0, v1, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
536 ; GCN-NEXT: v_mov_b32_e32 v1, s3
537 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
538 ; GCN-NEXT: s_cmp_lg_u32 s2, 4
539 ; GCN-NEXT: v_cndmask_b32_e32 v1, 1, v1, vcc
540 ; GCN-NEXT: v_mov_b32_e32 v4, s5
541 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
542 ; GCN-NEXT: v_lshlrev_b16_e32 v1, 8, v1
543 ; GCN-NEXT: v_cndmask_b32_e32 v4, 1, v4, vcc
544 ; GCN-NEXT: s_lshr_b32 s3, s4, 24
545 ; GCN-NEXT: v_or_b32_sdwa v1, v4, v1 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
546 ; GCN-NEXT: s_cmp_lg_u32 s2, 3
547 ; GCN-NEXT: v_or_b32_sdwa v1, v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
548 ; GCN-NEXT: v_mov_b32_e32 v0, s3
549 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
550 ; GCN-NEXT: s_lshr_b32 s3, s4, 16
551 ; GCN-NEXT: s_cmp_lg_u32 s2, 2
552 ; GCN-NEXT: v_cndmask_b32_e32 v0, 1, v0, vcc
553 ; GCN-NEXT: v_mov_b32_e32 v4, s3
554 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
555 ; GCN-NEXT: s_lshr_b32 s3, s4, 8
556 ; GCN-NEXT: v_lshlrev_b16_e32 v0, 8, v0
557 ; GCN-NEXT: v_cndmask_b32_e32 v4, 1, v4, vcc
558 ; GCN-NEXT: s_cmp_lg_u32 s2, 1
559 ; GCN-NEXT: v_or_b32_sdwa v0, v4, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
560 ; GCN-NEXT: v_mov_b32_e32 v4, s3
561 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
562 ; GCN-NEXT: s_cmp_lg_u32 s2, 0
563 ; GCN-NEXT: v_cndmask_b32_e32 v4, 1, v4, vcc
564 ; GCN-NEXT: v_mov_b32_e32 v5, s4
565 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
566 ; GCN-NEXT: v_lshlrev_b16_e32 v4, 8, v4
567 ; GCN-NEXT: v_cndmask_b32_e32 v5, 1, v5, vcc
568 ; GCN-NEXT: v_or_b32_sdwa v4, v5, v4 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
569 ; GCN-NEXT: v_or_b32_sdwa v0, v4, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
570 ; GCN-NEXT: v_mov_b32_e32 v5, s1
571 ; GCN-NEXT: v_mov_b32_e32 v4, s0
572 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
573 ; GCN-NEXT: s_endpgm
574 entry:
575 %v = insertelement <16 x i8> %vec, i8 1, i32 %sel
576 store <16 x i8> %v, ptr addrspace(1) %out
577 ret void
578 }
580 define amdgpu_kernel void @double2_inselt(ptr addrspace(1) %out, <2 x double> %vec, i32 %sel) {
581 ; GCN-LABEL: double2_inselt:
582 ; GCN: ; %bb.0: ; %entry
583 ; GCN-NEXT: s_load_dword s2, s[0:1], 0x44
584 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
585 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
586 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
587 ; GCN-NEXT: s_cmp_eq_u32 s2, 1
588 ; GCN-NEXT: s_cselect_b32 s3, 0x3ff00000, s7
589 ; GCN-NEXT: s_cselect_b32 s6, 0, s6
590 ; GCN-NEXT: s_cmp_eq_u32 s2, 0
591 ; GCN-NEXT: s_cselect_b32 s2, 0x3ff00000, s5
592 ; GCN-NEXT: s_cselect_b32 s4, 0, s4
593 ; GCN-NEXT: v_mov_b32_e32 v5, s1
594 ; GCN-NEXT: v_mov_b32_e32 v0, s4
595 ; GCN-NEXT: v_mov_b32_e32 v1, s2
596 ; GCN-NEXT: v_mov_b32_e32 v2, s6
597 ; GCN-NEXT: v_mov_b32_e32 v3, s3
598 ; GCN-NEXT: v_mov_b32_e32 v4, s0
599 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
600 ; GCN-NEXT: s_endpgm
601 entry:
602 %v = insertelement <2 x double> %vec, double 1.000000e+00, i32 %sel
603 store <2 x double> %v, ptr addrspace(1) %out
604 ret void
605 }
607 define amdgpu_kernel void @double5_inselt(ptr addrspace(1) %out, <5 x double> %vec, i32 %sel) {
608 ; GCN-LABEL: double5_inselt:
609 ; GCN: ; %bb.0: ; %entry
610 ; GCN-NEXT: s_load_dword s12, s[0:1], 0xa4
611 ; GCN-NEXT: s_load_dwordx2 s[8:9], s[0:1], 0x84
612 ; GCN-NEXT: s_load_dwordx2 s[10:11], s[0:1], 0x24
613 ; GCN-NEXT: s_load_dwordx8 s[0:7], s[0:1], 0x64
614 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
615 ; GCN-NEXT: s_cmp_eq_u32 s12, 4
616 ; GCN-NEXT: s_cselect_b32 s9, 0x3ff00000, s9
617 ; GCN-NEXT: s_cselect_b32 s8, 0, s8
618 ; GCN-NEXT: s_cmp_eq_u32 s12, 1
619 ; GCN-NEXT: s_cselect_b32 s3, 0x3ff00000, s3
620 ; GCN-NEXT: s_cselect_b32 s2, 0, s2
621 ; GCN-NEXT: s_cmp_eq_u32 s12, 0
622 ; GCN-NEXT: s_cselect_b32 s13, 0x3ff00000, s1
623 ; GCN-NEXT: s_cselect_b32 s14, 0, s0
624 ; GCN-NEXT: s_cmp_eq_u32 s12, 3
625 ; GCN-NEXT: s_cselect_b32 s0, 0x3ff00000, s7
626 ; GCN-NEXT: s_cselect_b32 s1, 0, s6
627 ; GCN-NEXT: s_cmp_eq_u32 s12, 2
628 ; GCN-NEXT: s_cselect_b32 s5, 0x3ff00000, s5
629 ; GCN-NEXT: s_cselect_b32 s4, 0, s4
630 ; GCN-NEXT: v_mov_b32_e32 v3, s0
631 ; GCN-NEXT: s_add_u32 s0, s10, 16
632 ; GCN-NEXT: v_mov_b32_e32 v2, s1
633 ; GCN-NEXT: s_addc_u32 s1, s11, 0
634 ; GCN-NEXT: v_mov_b32_e32 v5, s1
635 ; GCN-NEXT: v_mov_b32_e32 v0, s4
636 ; GCN-NEXT: v_mov_b32_e32 v1, s5
637 ; GCN-NEXT: v_mov_b32_e32 v4, s0
638 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
639 ; GCN-NEXT: v_mov_b32_e32 v4, s10
640 ; GCN-NEXT: s_add_u32 s0, s10, 32
641 ; GCN-NEXT: v_mov_b32_e32 v0, s14
642 ; GCN-NEXT: v_mov_b32_e32 v1, s13
643 ; GCN-NEXT: v_mov_b32_e32 v2, s2
644 ; GCN-NEXT: v_mov_b32_e32 v3, s3
645 ; GCN-NEXT: v_mov_b32_e32 v5, s11
646 ; GCN-NEXT: s_addc_u32 s1, s11, 0
647 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
648 ; GCN-NEXT: s_nop 0
649 ; GCN-NEXT: v_mov_b32_e32 v3, s1
650 ; GCN-NEXT: v_mov_b32_e32 v0, s8
651 ; GCN-NEXT: v_mov_b32_e32 v1, s9
652 ; GCN-NEXT: v_mov_b32_e32 v2, s0
653 ; GCN-NEXT: flat_store_dwordx2 v[2:3], v[0:1]
654 ; GCN-NEXT: s_endpgm
655 entry:
656 %v = insertelement <5 x double> %vec, double 1.000000e+00, i32 %sel
657 store <5 x double> %v, ptr addrspace(1) %out
658 ret void
659 }
661 define amdgpu_kernel void @double8_inselt(ptr addrspace(1) %out, <8 x double> %vec, i32 %sel) {
662 ; GCN-LABEL: double8_inselt:
663 ; GCN: ; %bb.0: ; %entry
664 ; GCN-NEXT: s_load_dword s2, s[0:1], 0xa4
665 ; GCN-NEXT: s_load_dwordx16 s[4:19], s[0:1], 0x64
666 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
667 ; GCN-NEXT: v_mov_b32_e32 v16, 0x3ff00000
668 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
669 ; GCN-NEXT: s_lshl_b32 s2, s2, 1
670 ; GCN-NEXT: v_mov_b32_e32 v0, s4
671 ; GCN-NEXT: v_mov_b32_e32 v1, s5
672 ; GCN-NEXT: v_mov_b32_e32 v2, s6
673 ; GCN-NEXT: v_mov_b32_e32 v3, s7
674 ; GCN-NEXT: v_mov_b32_e32 v4, s8
675 ; GCN-NEXT: v_mov_b32_e32 v5, s9
676 ; GCN-NEXT: v_mov_b32_e32 v6, s10
677 ; GCN-NEXT: v_mov_b32_e32 v7, s11
678 ; GCN-NEXT: v_mov_b32_e32 v8, s12
679 ; GCN-NEXT: v_mov_b32_e32 v9, s13
680 ; GCN-NEXT: v_mov_b32_e32 v10, s14
681 ; GCN-NEXT: v_mov_b32_e32 v11, s15
682 ; GCN-NEXT: v_mov_b32_e32 v12, s16
683 ; GCN-NEXT: v_mov_b32_e32 v13, s17
684 ; GCN-NEXT: v_mov_b32_e32 v14, s18
685 ; GCN-NEXT: v_mov_b32_e32 v15, s19
686 ; GCN-NEXT: s_mov_b32 m0, s2
687 ; GCN-NEXT: s_add_u32 s2, s0, 48
688 ; GCN-NEXT: v_movreld_b32_e32 v0, 0
689 ; GCN-NEXT: s_addc_u32 s3, s1, 0
690 ; GCN-NEXT: v_movreld_b32_e32 v1, v16
691 ; GCN-NEXT: v_mov_b32_e32 v17, s3
692 ; GCN-NEXT: v_mov_b32_e32 v16, s2
693 ; GCN-NEXT: s_add_u32 s2, s0, 32
694 ; GCN-NEXT: s_addc_u32 s3, s1, 0
695 ; GCN-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
696 ; GCN-NEXT: s_nop 0
697 ; GCN-NEXT: v_mov_b32_e32 v13, s3
698 ; GCN-NEXT: v_mov_b32_e32 v12, s2
699 ; GCN-NEXT: s_add_u32 s2, s0, 16
700 ; GCN-NEXT: s_addc_u32 s3, s1, 0
701 ; GCN-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
702 ; GCN-NEXT: s_nop 0
703 ; GCN-NEXT: v_mov_b32_e32 v9, s3
704 ; GCN-NEXT: v_mov_b32_e32 v8, s2
705 ; GCN-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
706 ; GCN-NEXT: s_nop 0
707 ; GCN-NEXT: v_mov_b32_e32 v5, s1
708 ; GCN-NEXT: v_mov_b32_e32 v4, s0
709 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
710 ; GCN-NEXT: s_endpgm
711 entry:
712 %v = insertelement <8 x double> %vec, double 1.000000e+00, i32 %sel
713 store <8 x double> %v, ptr addrspace(1) %out
714 ret void
715 }
717 define amdgpu_kernel void @double7_inselt(ptr addrspace(1) %out, <7 x double> %vec, i32 %sel) {
718 ; GCN-LABEL: double7_inselt:
719 ; GCN: ; %bb.0: ; %entry
720 ; GCN-NEXT: s_load_dwordx8 s[4:11], s[0:1], 0x64
721 ; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
722 ; GCN-NEXT: s_load_dwordx2 s[16:17], s[0:1], 0x94
723 ; GCN-NEXT: s_load_dwordx4 s[12:15], s[0:1], 0x84
724 ; GCN-NEXT: s_load_dword s0, s[0:1], 0xa4
725 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
726 ; GCN-NEXT: v_mov_b32_e32 v0, s4
727 ; GCN-NEXT: v_mov_b32_e32 v1, s5
728 ; GCN-NEXT: v_mov_b32_e32 v2, s6
729 ; GCN-NEXT: v_mov_b32_e32 v3, s7
730 ; GCN-NEXT: s_lshl_b32 s0, s0, 1
731 ; GCN-NEXT: v_mov_b32_e32 v4, s8
732 ; GCN-NEXT: v_mov_b32_e32 v5, s9
733 ; GCN-NEXT: v_mov_b32_e32 v6, s10
734 ; GCN-NEXT: v_mov_b32_e32 v7, s11
735 ; GCN-NEXT: v_mov_b32_e32 v8, s12
736 ; GCN-NEXT: v_mov_b32_e32 v9, s13
737 ; GCN-NEXT: v_mov_b32_e32 v10, s14
738 ; GCN-NEXT: v_mov_b32_e32 v11, s15
739 ; GCN-NEXT: v_mov_b32_e32 v12, s16
740 ; GCN-NEXT: v_mov_b32_e32 v13, s17
741 ; GCN-NEXT: s_mov_b32 m0, s0
742 ; GCN-NEXT: v_movreld_b32_e32 v0, 0
743 ; GCN-NEXT: v_mov_b32_e32 v16, 0x3ff00000
744 ; GCN-NEXT: s_add_u32 s0, s2, 16
745 ; GCN-NEXT: v_movreld_b32_e32 v1, v16
746 ; GCN-NEXT: s_addc_u32 s1, s3, 0
747 ; GCN-NEXT: v_mov_b32_e32 v15, s1
748 ; GCN-NEXT: v_mov_b32_e32 v14, s0
749 ; GCN-NEXT: flat_store_dwordx4 v[14:15], v[4:7]
750 ; GCN-NEXT: s_add_u32 s0, s2, 48
751 ; GCN-NEXT: v_mov_b32_e32 v5, s3
752 ; GCN-NEXT: v_mov_b32_e32 v4, s2
753 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
754 ; GCN-NEXT: s_addc_u32 s1, s3, 0
755 ; GCN-NEXT: v_mov_b32_e32 v0, s0
756 ; GCN-NEXT: v_mov_b32_e32 v1, s1
757 ; GCN-NEXT: s_add_u32 s0, s2, 32
758 ; GCN-NEXT: flat_store_dwordx2 v[0:1], v[12:13]
759 ; GCN-NEXT: s_addc_u32 s1, s3, 0
760 ; GCN-NEXT: v_mov_b32_e32 v0, s0
761 ; GCN-NEXT: v_mov_b32_e32 v1, s1
762 ; GCN-NEXT: flat_store_dwordx4 v[0:1], v[8:11]
763 ; GCN-NEXT: s_endpgm
764 entry:
765 %v = insertelement <7 x double> %vec, double 1.000000e+00, i32 %sel
766 store <7 x double> %v, ptr addrspace(1) %out
767 ret void
768 }
770 define amdgpu_kernel void @double16_inselt(ptr addrspace(1) %out, <16 x double> %vec, i32 %sel) {
771 ; GCN-LABEL: double16_inselt:
772 ; GCN: ; %bb.0: ; %entry
773 ; GCN-NEXT: s_load_dword s2, s[0:1], 0x124
774 ; GCN-NEXT: s_load_dwordx16 s[36:51], s[0:1], 0xa4
775 ; GCN-NEXT: s_load_dwordx16 s[4:19], s[0:1], 0xe4
776 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
777 ; GCN-NEXT: v_mov_b32_e32 v32, 0x3ff00000
778 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
779 ; GCN-NEXT: v_mov_b32_e32 v0, s36
780 ; GCN-NEXT: s_lshl_b32 s2, s2, 1
781 ; GCN-NEXT: v_mov_b32_e32 v1, s37
782 ; GCN-NEXT: v_mov_b32_e32 v2, s38
783 ; GCN-NEXT: v_mov_b32_e32 v3, s39
784 ; GCN-NEXT: v_mov_b32_e32 v4, s40
785 ; GCN-NEXT: v_mov_b32_e32 v5, s41
786 ; GCN-NEXT: v_mov_b32_e32 v6, s42
787 ; GCN-NEXT: v_mov_b32_e32 v7, s43
788 ; GCN-NEXT: v_mov_b32_e32 v8, s44
789 ; GCN-NEXT: v_mov_b32_e32 v9, s45
790 ; GCN-NEXT: v_mov_b32_e32 v10, s46
791 ; GCN-NEXT: v_mov_b32_e32 v11, s47
792 ; GCN-NEXT: v_mov_b32_e32 v12, s48
793 ; GCN-NEXT: v_mov_b32_e32 v13, s49
794 ; GCN-NEXT: v_mov_b32_e32 v14, s50
795 ; GCN-NEXT: v_mov_b32_e32 v15, s51
796 ; GCN-NEXT: v_mov_b32_e32 v16, s4
797 ; GCN-NEXT: v_mov_b32_e32 v17, s5
798 ; GCN-NEXT: v_mov_b32_e32 v18, s6
799 ; GCN-NEXT: v_mov_b32_e32 v19, s7
800 ; GCN-NEXT: v_mov_b32_e32 v20, s8
801 ; GCN-NEXT: v_mov_b32_e32 v21, s9
802 ; GCN-NEXT: v_mov_b32_e32 v22, s10
803 ; GCN-NEXT: v_mov_b32_e32 v23, s11
804 ; GCN-NEXT: v_mov_b32_e32 v24, s12
805 ; GCN-NEXT: v_mov_b32_e32 v25, s13
806 ; GCN-NEXT: v_mov_b32_e32 v26, s14
807 ; GCN-NEXT: v_mov_b32_e32 v27, s15
808 ; GCN-NEXT: v_mov_b32_e32 v28, s16
809 ; GCN-NEXT: v_mov_b32_e32 v29, s17
810 ; GCN-NEXT: v_mov_b32_e32 v30, s18
811 ; GCN-NEXT: v_mov_b32_e32 v31, s19
812 ; GCN-NEXT: s_mov_b32 m0, s2
813 ; GCN-NEXT: s_add_u32 s2, s0, 0x70
814 ; GCN-NEXT: v_movreld_b32_e32 v0, 0
815 ; GCN-NEXT: s_addc_u32 s3, s1, 0
816 ; GCN-NEXT: v_movreld_b32_e32 v1, v32
817 ; GCN-NEXT: v_mov_b32_e32 v33, s3
818 ; GCN-NEXT: v_mov_b32_e32 v32, s2
819 ; GCN-NEXT: s_add_u32 s2, s0, 0x60
820 ; GCN-NEXT: s_addc_u32 s3, s1, 0
821 ; GCN-NEXT: flat_store_dwordx4 v[32:33], v[28:31]
822 ; GCN-NEXT: s_nop 0
823 ; GCN-NEXT: v_mov_b32_e32 v29, s3
824 ; GCN-NEXT: v_mov_b32_e32 v28, s2
825 ; GCN-NEXT: s_add_u32 s2, s0, 0x50
826 ; GCN-NEXT: s_addc_u32 s3, s1, 0
827 ; GCN-NEXT: flat_store_dwordx4 v[28:29], v[24:27]
828 ; GCN-NEXT: s_nop 0
829 ; GCN-NEXT: v_mov_b32_e32 v25, s3
830 ; GCN-NEXT: v_mov_b32_e32 v24, s2
831 ; GCN-NEXT: s_add_u32 s2, s0, 64
832 ; GCN-NEXT: s_addc_u32 s3, s1, 0
833 ; GCN-NEXT: flat_store_dwordx4 v[24:25], v[20:23]
834 ; GCN-NEXT: s_nop 0
835 ; GCN-NEXT: v_mov_b32_e32 v21, s3
836 ; GCN-NEXT: v_mov_b32_e32 v20, s2
837 ; GCN-NEXT: s_add_u32 s2, s0, 48
838 ; GCN-NEXT: s_addc_u32 s3, s1, 0
839 ; GCN-NEXT: flat_store_dwordx4 v[20:21], v[16:19]
840 ; GCN-NEXT: s_nop 0
841 ; GCN-NEXT: v_mov_b32_e32 v17, s3
842 ; GCN-NEXT: v_mov_b32_e32 v16, s2
843 ; GCN-NEXT: s_add_u32 s2, s0, 32
844 ; GCN-NEXT: s_addc_u32 s3, s1, 0
845 ; GCN-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
846 ; GCN-NEXT: s_nop 0
847 ; GCN-NEXT: v_mov_b32_e32 v13, s3
848 ; GCN-NEXT: v_mov_b32_e32 v12, s2
849 ; GCN-NEXT: s_add_u32 s2, s0, 16
850 ; GCN-NEXT: s_addc_u32 s3, s1, 0
851 ; GCN-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
852 ; GCN-NEXT: s_nop 0
853 ; GCN-NEXT: v_mov_b32_e32 v9, s3
854 ; GCN-NEXT: v_mov_b32_e32 v8, s2
855 ; GCN-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
856 ; GCN-NEXT: s_nop 0
857 ; GCN-NEXT: v_mov_b32_e32 v5, s1
858 ; GCN-NEXT: v_mov_b32_e32 v4, s0
859 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
860 ; GCN-NEXT: s_endpgm
861 entry:
862 %v = insertelement <16 x double> %vec, double 1.000000e+00, i32 %sel
863 store <16 x double> %v, ptr addrspace(1) %out
864 ret void
865 }
867 define amdgpu_kernel void @double15_inselt(ptr addrspace(1) %out, <15 x double> %vec, i32 %sel) {
868 ; GCN-LABEL: double15_inselt:
869 ; GCN: ; %bb.0: ; %entry
870 ; GCN-NEXT: s_load_dwordx16 s[4:19], s[0:1], 0xa4
871 ; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x114
872 ; GCN-NEXT: s_load_dwordx4 s[20:23], s[0:1], 0x104
873 ; GCN-NEXT: s_load_dwordx8 s[24:31], s[0:1], 0xe4
874 ; GCN-NEXT: v_mov_b32_e32 v32, 0x3ff00000
875 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
876 ; GCN-NEXT: v_mov_b32_e32 v0, s4
877 ; GCN-NEXT: s_load_dword s4, s[0:1], 0x124
878 ; GCN-NEXT: s_load_dwordx2 s[0:1], s[0:1], 0x24
879 ; GCN-NEXT: v_mov_b32_e32 v28, s2
880 ; GCN-NEXT: v_mov_b32_e32 v1, s5
881 ; GCN-NEXT: v_mov_b32_e32 v2, s6
882 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
883 ; GCN-NEXT: s_lshl_b32 s2, s4, 1
884 ; GCN-NEXT: v_mov_b32_e32 v3, s7
885 ; GCN-NEXT: v_mov_b32_e32 v4, s8
886 ; GCN-NEXT: v_mov_b32_e32 v5, s9
887 ; GCN-NEXT: v_mov_b32_e32 v6, s10
888 ; GCN-NEXT: v_mov_b32_e32 v7, s11
889 ; GCN-NEXT: v_mov_b32_e32 v8, s12
890 ; GCN-NEXT: v_mov_b32_e32 v9, s13
891 ; GCN-NEXT: v_mov_b32_e32 v10, s14
892 ; GCN-NEXT: v_mov_b32_e32 v11, s15
893 ; GCN-NEXT: v_mov_b32_e32 v12, s16
894 ; GCN-NEXT: v_mov_b32_e32 v13, s17
895 ; GCN-NEXT: v_mov_b32_e32 v14, s18
896 ; GCN-NEXT: v_mov_b32_e32 v15, s19
897 ; GCN-NEXT: v_mov_b32_e32 v16, s24
898 ; GCN-NEXT: v_mov_b32_e32 v17, s25
899 ; GCN-NEXT: v_mov_b32_e32 v18, s26
900 ; GCN-NEXT: v_mov_b32_e32 v19, s27
901 ; GCN-NEXT: v_mov_b32_e32 v20, s28
902 ; GCN-NEXT: v_mov_b32_e32 v21, s29
903 ; GCN-NEXT: v_mov_b32_e32 v22, s30
904 ; GCN-NEXT: v_mov_b32_e32 v23, s31
905 ; GCN-NEXT: v_mov_b32_e32 v24, s20
906 ; GCN-NEXT: v_mov_b32_e32 v25, s21
907 ; GCN-NEXT: v_mov_b32_e32 v26, s22
908 ; GCN-NEXT: v_mov_b32_e32 v27, s23
909 ; GCN-NEXT: v_mov_b32_e32 v29, s3
910 ; GCN-NEXT: s_mov_b32 m0, s2
911 ; GCN-NEXT: v_movreld_b32_e32 v0, 0
912 ; GCN-NEXT: s_add_u32 s2, s0, 0x50
913 ; GCN-NEXT: v_movreld_b32_e32 v1, v32
914 ; GCN-NEXT: s_addc_u32 s3, s1, 0
915 ; GCN-NEXT: v_mov_b32_e32 v31, s3
916 ; GCN-NEXT: v_mov_b32_e32 v30, s2
917 ; GCN-NEXT: s_add_u32 s2, s0, 64
918 ; GCN-NEXT: s_addc_u32 s3, s1, 0
919 ; GCN-NEXT: flat_store_dwordx4 v[30:31], v[20:23]
920 ; GCN-NEXT: s_nop 0
921 ; GCN-NEXT: v_mov_b32_e32 v21, s3
922 ; GCN-NEXT: v_mov_b32_e32 v20, s2
923 ; GCN-NEXT: s_add_u32 s2, s0, 48
924 ; GCN-NEXT: s_addc_u32 s3, s1, 0
925 ; GCN-NEXT: flat_store_dwordx4 v[20:21], v[16:19]
926 ; GCN-NEXT: s_nop 0
927 ; GCN-NEXT: v_mov_b32_e32 v17, s3
928 ; GCN-NEXT: v_mov_b32_e32 v16, s2
929 ; GCN-NEXT: s_add_u32 s2, s0, 32
930 ; GCN-NEXT: s_addc_u32 s3, s1, 0
931 ; GCN-NEXT: flat_store_dwordx4 v[16:17], v[12:15]
932 ; GCN-NEXT: s_nop 0
933 ; GCN-NEXT: v_mov_b32_e32 v13, s3
934 ; GCN-NEXT: v_mov_b32_e32 v12, s2
935 ; GCN-NEXT: s_add_u32 s2, s0, 16
936 ; GCN-NEXT: s_addc_u32 s3, s1, 0
937 ; GCN-NEXT: flat_store_dwordx4 v[12:13], v[8:11]
938 ; GCN-NEXT: s_nop 0
939 ; GCN-NEXT: v_mov_b32_e32 v9, s3
940 ; GCN-NEXT: v_mov_b32_e32 v8, s2
941 ; GCN-NEXT: flat_store_dwordx4 v[8:9], v[4:7]
942 ; GCN-NEXT: s_add_u32 s2, s0, 0x70
943 ; GCN-NEXT: v_mov_b32_e32 v5, s1
944 ; GCN-NEXT: v_mov_b32_e32 v4, s0
945 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
946 ; GCN-NEXT: s_addc_u32 s3, s1, 0
947 ; GCN-NEXT: v_mov_b32_e32 v0, s2
948 ; GCN-NEXT: v_mov_b32_e32 v1, s3
949 ; GCN-NEXT: s_add_u32 s0, s0, 0x60
950 ; GCN-NEXT: flat_store_dwordx2 v[0:1], v[28:29]
951 ; GCN-NEXT: s_addc_u32 s1, s1, 0
952 ; GCN-NEXT: v_mov_b32_e32 v0, s0
953 ; GCN-NEXT: v_mov_b32_e32 v1, s1
954 ; GCN-NEXT: flat_store_dwordx4 v[0:1], v[24:27]
955 ; GCN-NEXT: s_endpgm
956 entry:
957 %v = insertelement <15 x double> %vec, double 1.000000e+00, i32 %sel
958 store <15 x double> %v, ptr addrspace(1) %out
959 ret void
960 }
962 define amdgpu_kernel void @bit4_inselt(ptr addrspace(1) %out, <4 x i1> %vec, i32 %sel) {
963 ; GCN-LABEL: bit4_inselt:
964 ; GCN: ; %bb.0: ; %entry
965 ; GCN-NEXT: s_mov_b32 s4, SCRATCH_RSRC_DWORD0
966 ; GCN-NEXT: s_mov_b32 s5, SCRATCH_RSRC_DWORD1
967 ; GCN-NEXT: s_mov_b32 s6, -1
968 ; GCN-NEXT: s_mov_b32 s7, 0xe80000
969 ; GCN-NEXT: s_add_u32 s4, s4, s3
970 ; GCN-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
971 ; GCN-NEXT: s_addc_u32 s5, s5, 0
972 ; GCN-NEXT: v_mov_b32_e32 v0, 4
973 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
974 ; GCN-NEXT: s_and_b32 s3, s3, 3
975 ; GCN-NEXT: v_mov_b32_e32 v1, s2
976 ; GCN-NEXT: v_lshrrev_b16_e64 v2, 1, s2
977 ; GCN-NEXT: v_lshrrev_b16_e64 v3, 2, s2
978 ; GCN-NEXT: v_lshrrev_b16_e64 v4, 3, s2
979 ; GCN-NEXT: v_or_b32_e32 v0, s3, v0
980 ; GCN-NEXT: v_and_b32_e32 v2, 1, v2
981 ; GCN-NEXT: v_and_b32_e32 v3, 3, v3
982 ; GCN-NEXT: v_and_b32_e32 v4, 1, v4
983 ; GCN-NEXT: buffer_store_byte v1, off, s[4:7], 0 offset:4
984 ; GCN-NEXT: buffer_store_byte v4, off, s[4:7], 0 offset:7
985 ; GCN-NEXT: buffer_store_byte v3, off, s[4:7], 0 offset:6
986 ; GCN-NEXT: buffer_store_byte v2, off, s[4:7], 0 offset:5
987 ; GCN-NEXT: v_mov_b32_e32 v1, 1
988 ; GCN-NEXT: buffer_store_byte v1, v0, s[4:7], 0 offen
989 ; GCN-NEXT: buffer_load_ubyte v0, off, s[4:7], 0 offset:4
990 ; GCN-NEXT: buffer_load_ubyte v1, off, s[4:7], 0 offset:5
991 ; GCN-NEXT: buffer_load_ubyte v2, off, s[4:7], 0 offset:6
992 ; GCN-NEXT: buffer_load_ubyte v3, off, s[4:7], 0 offset:7
993 ; GCN-NEXT: s_waitcnt vmcnt(3)
994 ; GCN-NEXT: v_and_b32_e32 v0, 1, v0
995 ; GCN-NEXT: s_waitcnt vmcnt(2)
996 ; GCN-NEXT: v_and_b32_e32 v1, 1, v1
997 ; GCN-NEXT: s_waitcnt vmcnt(1)
998 ; GCN-NEXT: v_and_b32_e32 v2, 1, v2
999 ; GCN-NEXT: v_lshlrev_b16_e32 v1, 1, v1
1000 ; GCN-NEXT: v_lshlrev_b16_e32 v2, 2, v2
1001 ; GCN-NEXT: v_or_b32_e32 v0, v0, v1
1002 ; GCN-NEXT: s_waitcnt vmcnt(0)
1003 ; GCN-NEXT: v_lshlrev_b16_e32 v3, 3, v3
1004 ; GCN-NEXT: v_or_b32_e32 v0, v0, v2
1005 ; GCN-NEXT: v_or_b32_e32 v0, v0, v3
1006 ; GCN-NEXT: v_and_b32_e32 v2, 15, v0
1007 ; GCN-NEXT: v_mov_b32_e32 v0, s0
1008 ; GCN-NEXT: v_mov_b32_e32 v1, s1
1009 ; GCN-NEXT: flat_store_byte v[0:1], v2
1010 ; GCN-NEXT: s_endpgm
1011 entry:
1012 %v = insertelement <4 x i1> %vec, i1 1, i32 %sel
1013 store <4 x i1> %v, ptr addrspace(1) %out
1014 ret void
1015 }
1017 define amdgpu_kernel void @bit128_inselt(ptr addrspace(1) %out, <128 x i1> %vec, i32 %sel) {
1018 ; GCN-LABEL: bit128_inselt:
1019 ; GCN: ; %bb.0: ; %entry
1020 ; GCN-NEXT: s_load_dwordx4 s[4:7], s[0:1], 0x34
1021 ; GCN-NEXT: s_load_dwordx2 s[2:3], s[0:1], 0x24
1022 ; GCN-NEXT: s_load_dword s0, s[0:1], 0x44
1023 ; GCN-NEXT: s_waitcnt lgkmcnt(0)
1024 ; GCN-NEXT: s_lshr_b32 s1, s4, 24
1025 ; GCN-NEXT: s_lshr_b32 s8, s4, 16
1026 ; GCN-NEXT: s_lshr_b32 s9, s4, 17
1027 ; GCN-NEXT: s_lshr_b32 s10, s4, 18
1028 ; GCN-NEXT: s_lshr_b32 s11, s4, 19
1029 ; GCN-NEXT: s_lshr_b32 s12, s4, 20
1030 ; GCN-NEXT: s_lshr_b32 s13, s4, 21
1031 ; GCN-NEXT: s_lshr_b32 s14, s4, 22
1032 ; GCN-NEXT: s_lshr_b32 s15, s4, 23
1033 ; GCN-NEXT: s_lshr_b32 s16, s5, 24
1034 ; GCN-NEXT: s_lshr_b32 s17, s5, 16
1035 ; GCN-NEXT: s_lshr_b32 s18, s5, 17
1036 ; GCN-NEXT: s_lshr_b32 s19, s5, 18
1037 ; GCN-NEXT: s_lshr_b32 s20, s5, 19
1038 ; GCN-NEXT: s_lshr_b32 s21, s5, 20
1039 ; GCN-NEXT: s_lshr_b32 s22, s5, 21
1040 ; GCN-NEXT: s_lshr_b32 s23, s5, 22
1041 ; GCN-NEXT: s_lshr_b32 s24, s5, 23
1042 ; GCN-NEXT: s_lshr_b32 s25, s6, 24
1043 ; GCN-NEXT: s_lshr_b32 s26, s6, 16
1044 ; GCN-NEXT: s_lshr_b32 s27, s6, 17
1045 ; GCN-NEXT: s_lshr_b32 s28, s6, 18
1046 ; GCN-NEXT: s_lshr_b32 s29, s6, 19
1047 ; GCN-NEXT: s_lshr_b32 s30, s6, 20
1048 ; GCN-NEXT: s_lshr_b32 s31, s6, 21
1049 ; GCN-NEXT: s_lshr_b32 s33, s6, 22
1050 ; GCN-NEXT: s_lshr_b32 s34, s6, 23
1051 ; GCN-NEXT: s_lshr_b32 s35, s7, 24
1052 ; GCN-NEXT: s_lshr_b32 s36, s7, 16
1053 ; GCN-NEXT: s_lshr_b32 s37, s7, 17
1054 ; GCN-NEXT: s_lshr_b32 s38, s7, 18
1055 ; GCN-NEXT: s_lshr_b32 s39, s7, 19
1056 ; GCN-NEXT: s_lshr_b32 s40, s7, 20
1057 ; GCN-NEXT: s_lshr_b32 s41, s7, 21
1058 ; GCN-NEXT: s_lshr_b32 s42, s7, 22
1059 ; GCN-NEXT: s_lshr_b32 s43, s7, 23
1060 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x77
1061 ; GCN-NEXT: v_mov_b32_e32 v15, s43
1062 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1063 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x76
1064 ; GCN-NEXT: v_cndmask_b32_e32 v15, 1, v15, vcc
1065 ; GCN-NEXT: v_mov_b32_e32 v18, s42
1066 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1067 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1068 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1069 ; GCN-NEXT: v_lshlrev_b16_e32 v15, 3, v15
1070 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 2, v18
1071 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x75
1072 ; GCN-NEXT: v_or_b32_e32 v15, v15, v18
1073 ; GCN-NEXT: v_mov_b32_e32 v18, s41
1074 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1075 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x74
1076 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1077 ; GCN-NEXT: v_mov_b32_e32 v19, s40
1078 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1079 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1080 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 1, v18
1081 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1082 ; GCN-NEXT: v_or_b32_e32 v18, v19, v18
1083 ; GCN-NEXT: v_and_b32_e32 v18, 3, v18
1084 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x73
1085 ; GCN-NEXT: v_or_b32_e32 v15, v18, v15
1086 ; GCN-NEXT: v_mov_b32_e32 v18, s39
1087 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1088 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x72
1089 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1090 ; GCN-NEXT: v_mov_b32_e32 v19, s38
1091 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1092 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1093 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1094 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 3, v18
1095 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 2, v19
1096 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x71
1097 ; GCN-NEXT: v_or_b32_e32 v18, v18, v19
1098 ; GCN-NEXT: v_mov_b32_e32 v19, s37
1099 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1100 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x70
1101 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1102 ; GCN-NEXT: v_mov_b32_e32 v20, s36
1103 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1104 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1105 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 1, v19
1106 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1107 ; GCN-NEXT: v_or_b32_e32 v19, v20, v19
1108 ; GCN-NEXT: v_and_b32_e32 v19, 3, v19
1109 ; GCN-NEXT: v_or_b32_e32 v18, v19, v18
1110 ; GCN-NEXT: v_lshlrev_b16_e32 v15, 4, v15
1111 ; GCN-NEXT: v_and_b32_e32 v18, 15, v18
1112 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x7f
1113 ; GCN-NEXT: v_or_b32_e32 v15, v18, v15
1114 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 7, s35
1115 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1116 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x7e
1117 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 6, s35
1118 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1119 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1120 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1121 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1122 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 3, v18
1123 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 2, v19
1124 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x7d
1125 ; GCN-NEXT: v_or_b32_e32 v18, v18, v19
1126 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 5, s35
1127 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1128 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x7c
1129 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 4, s35
1130 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1131 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1132 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1133 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 1, v19
1134 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1135 ; GCN-NEXT: v_or_b32_e32 v19, v20, v19
1136 ; GCN-NEXT: v_and_b32_e32 v19, 3, v19
1137 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x7b
1138 ; GCN-NEXT: v_or_b32_e32 v18, v19, v18
1139 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 3, s35
1140 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1141 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x7a
1142 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 2, s35
1143 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1144 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1145 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1146 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1147 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x78
1148 ; GCN-NEXT: v_mov_b32_e32 v13, s35
1149 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 3, v19
1150 ; GCN-NEXT: v_lshlrev_b16_e32 v20, 2, v20
1151 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1152 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x79
1153 ; GCN-NEXT: v_or_b32_e32 v19, v19, v20
1154 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 1, s35
1155 ; GCN-NEXT: v_cndmask_b32_e32 v13, 1, v13, vcc
1156 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1157 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1158 ; GCN-NEXT: v_and_b32_e32 v13, 1, v13
1159 ; GCN-NEXT: v_lshlrev_b16_e32 v20, 1, v20
1160 ; GCN-NEXT: v_or_b32_e32 v13, v13, v20
1161 ; GCN-NEXT: v_and_b32_e32 v13, 3, v13
1162 ; GCN-NEXT: v_or_b32_e32 v19, v13, v19
1163 ; GCN-NEXT: v_mov_b32_e32 v13, 15
1164 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 12, v18
1165 ; GCN-NEXT: v_and_b32_sdwa v19, v19, v13 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
1166 ; GCN-NEXT: v_or_b32_e32 v18, v18, v19
1167 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x6f
1168 ; GCN-NEXT: v_or_b32_sdwa v15, v15, v18 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
1169 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 15, s7
1170 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1171 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x6e
1172 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 14, s7
1173 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1174 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1175 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1176 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1177 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 3, v18
1178 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 2, v19
1179 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x6d
1180 ; GCN-NEXT: v_or_b32_e32 v18, v18, v19
1181 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 13, s7
1182 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1183 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x6c
1184 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 12, s7
1185 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1186 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1187 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1188 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 1, v19
1189 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1190 ; GCN-NEXT: v_or_b32_e32 v19, v20, v19
1191 ; GCN-NEXT: v_and_b32_e32 v19, 3, v19
1192 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x6b
1193 ; GCN-NEXT: v_or_b32_e32 v18, v19, v18
1194 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 11, s7
1195 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1196 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x6a
1197 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 10, s7
1198 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1199 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1200 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1201 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1202 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 3, v19
1203 ; GCN-NEXT: v_lshlrev_b16_e32 v20, 2, v20
1204 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x69
1205 ; GCN-NEXT: v_or_b32_e32 v19, v19, v20
1206 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 9, s7
1207 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1208 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x68
1209 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 8, s7
1210 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1211 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1212 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1213 ; GCN-NEXT: v_lshlrev_b16_e32 v20, 1, v20
1214 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1215 ; GCN-NEXT: v_or_b32_e32 v17, v17, v20
1216 ; GCN-NEXT: v_and_b32_e32 v17, 3, v17
1217 ; GCN-NEXT: v_or_b32_e32 v17, v17, v19
1218 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 12, v18
1219 ; GCN-NEXT: v_and_b32_sdwa v17, v17, v13 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
1220 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x67
1221 ; GCN-NEXT: v_or_b32_e32 v17, v18, v17
1222 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 7, s7
1223 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1224 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x66
1225 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 6, s7
1226 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1227 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1228 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1229 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1230 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 3, v18
1231 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 2, v19
1232 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x65
1233 ; GCN-NEXT: v_or_b32_e32 v18, v18, v19
1234 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 5, s7
1235 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1236 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x64
1237 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 4, s7
1238 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1239 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1240 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1241 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 1, v19
1242 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1243 ; GCN-NEXT: v_or_b32_e32 v19, v20, v19
1244 ; GCN-NEXT: v_and_b32_e32 v19, 3, v19
1245 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x63
1246 ; GCN-NEXT: v_or_b32_e32 v18, v19, v18
1247 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 3, s7
1248 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1249 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x62
1250 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 2, s7
1251 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1252 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1253 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1254 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1255 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 3, v19
1256 ; GCN-NEXT: v_lshlrev_b16_e32 v20, 2, v20
1257 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x61
1258 ; GCN-NEXT: v_or_b32_e32 v19, v19, v20
1259 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 1, s7
1260 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1261 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x60
1262 ; GCN-NEXT: v_mov_b32_e32 v16, s7
1263 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1264 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1265 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1266 ; GCN-NEXT: v_lshlrev_b16_e32 v20, 1, v20
1267 ; GCN-NEXT: v_and_b32_e32 v16, 1, v16
1268 ; GCN-NEXT: v_or_b32_e32 v16, v16, v20
1269 ; GCN-NEXT: v_and_b32_e32 v16, 3, v16
1270 ; GCN-NEXT: v_or_b32_e32 v16, v16, v19
1271 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 4, v18
1272 ; GCN-NEXT: v_and_b32_e32 v16, 15, v16
1273 ; GCN-NEXT: v_or_b32_e32 v16, v16, v18
1274 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x57
1275 ; GCN-NEXT: v_or_b32_sdwa v16, v16, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
1276 ; GCN-NEXT: v_mov_b32_e32 v17, s34
1277 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1278 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x56
1279 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1280 ; GCN-NEXT: v_mov_b32_e32 v18, s33
1281 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1282 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1283 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1284 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 3, v17
1285 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 2, v18
1286 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x55
1287 ; GCN-NEXT: v_or_b32_e32 v17, v17, v18
1288 ; GCN-NEXT: v_mov_b32_e32 v18, s31
1289 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1290 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x54
1291 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1292 ; GCN-NEXT: v_mov_b32_e32 v19, s30
1293 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1294 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1295 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 1, v18
1296 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1297 ; GCN-NEXT: v_or_b32_e32 v18, v19, v18
1298 ; GCN-NEXT: v_and_b32_e32 v18, 3, v18
1299 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x53
1300 ; GCN-NEXT: v_or_b32_e32 v17, v18, v17
1301 ; GCN-NEXT: v_mov_b32_e32 v18, s29
1302 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1303 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x52
1304 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1305 ; GCN-NEXT: v_mov_b32_e32 v19, s28
1306 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1307 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1308 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1309 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 3, v18
1310 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 2, v19
1311 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x51
1312 ; GCN-NEXT: v_or_b32_e32 v18, v18, v19
1313 ; GCN-NEXT: v_mov_b32_e32 v19, s27
1314 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1315 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x50
1316 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1317 ; GCN-NEXT: v_mov_b32_e32 v20, s26
1318 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1319 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1320 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 1, v19
1321 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1322 ; GCN-NEXT: v_or_b32_e32 v19, v20, v19
1323 ; GCN-NEXT: v_and_b32_e32 v19, 3, v19
1324 ; GCN-NEXT: v_or_b32_e32 v18, v19, v18
1325 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 4, v17
1326 ; GCN-NEXT: v_and_b32_e32 v18, 15, v18
1327 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x5f
1328 ; GCN-NEXT: v_or_b32_e32 v17, v18, v17
1329 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 7, s25
1330 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1331 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x5e
1332 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 6, s25
1333 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1334 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1335 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1336 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1337 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 3, v18
1338 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 2, v19
1339 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x5d
1340 ; GCN-NEXT: v_or_b32_e32 v18, v18, v19
1341 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 5, s25
1342 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1343 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x5c
1344 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 4, s25
1345 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1346 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1347 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1348 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 1, v19
1349 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1350 ; GCN-NEXT: v_or_b32_e32 v19, v20, v19
1351 ; GCN-NEXT: v_and_b32_e32 v19, 3, v19
1352 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x5b
1353 ; GCN-NEXT: v_or_b32_e32 v18, v19, v18
1354 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 3, s25
1355 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1356 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x5a
1357 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 2, s25
1358 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1359 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1360 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1361 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1362 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x58
1363 ; GCN-NEXT: v_mov_b32_e32 v3, s25
1364 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 3, v19
1365 ; GCN-NEXT: v_lshlrev_b16_e32 v20, 2, v20
1366 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1367 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x59
1368 ; GCN-NEXT: v_or_b32_e32 v19, v19, v20
1369 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 1, s25
1370 ; GCN-NEXT: v_cndmask_b32_e32 v3, 1, v3, vcc
1371 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1372 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1373 ; GCN-NEXT: v_and_b32_e32 v3, 1, v3
1374 ; GCN-NEXT: v_lshlrev_b16_e32 v20, 1, v20
1375 ; GCN-NEXT: v_or_b32_e32 v3, v3, v20
1376 ; GCN-NEXT: v_and_b32_e32 v3, 3, v3
1377 ; GCN-NEXT: v_or_b32_e32 v3, v3, v19
1378 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 12, v18
1379 ; GCN-NEXT: v_and_b32_sdwa v3, v3, v13 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
1380 ; GCN-NEXT: v_or_b32_e32 v3, v18, v3
1381 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x4f
1382 ; GCN-NEXT: v_or_b32_sdwa v17, v17, v3 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
1383 ; GCN-NEXT: v_lshrrev_b16_e64 v3, 15, s6
1384 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1385 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x4e
1386 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 14, s6
1387 ; GCN-NEXT: v_cndmask_b32_e32 v3, 1, v3, vcc
1388 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1389 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1390 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1391 ; GCN-NEXT: v_lshlrev_b16_e32 v3, 3, v3
1392 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 2, v18
1393 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x4d
1394 ; GCN-NEXT: v_or_b32_e32 v3, v3, v18
1395 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 13, s6
1396 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1397 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x4c
1398 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 12, s6
1399 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1400 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1401 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1402 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 1, v18
1403 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1404 ; GCN-NEXT: v_or_b32_e32 v18, v19, v18
1405 ; GCN-NEXT: v_and_b32_e32 v18, 3, v18
1406 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x4b
1407 ; GCN-NEXT: v_or_b32_e32 v3, v18, v3
1408 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 11, s6
1409 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1410 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x4a
1411 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 10, s6
1412 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1413 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1414 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1415 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1416 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 3, v18
1417 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 2, v19
1418 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x49
1419 ; GCN-NEXT: v_or_b32_e32 v18, v18, v19
1420 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 9, s6
1421 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1422 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x48
1423 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 8, s6
1424 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1425 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1426 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1427 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 1, v19
1428 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1429 ; GCN-NEXT: v_or_b32_e32 v19, v20, v19
1430 ; GCN-NEXT: v_and_b32_e32 v19, 3, v19
1431 ; GCN-NEXT: v_or_b32_e32 v18, v19, v18
1432 ; GCN-NEXT: v_lshlrev_b16_e32 v3, 12, v3
1433 ; GCN-NEXT: v_and_b32_sdwa v18, v18, v13 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
1434 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x47
1435 ; GCN-NEXT: v_or_b32_e32 v18, v3, v18
1436 ; GCN-NEXT: v_lshrrev_b16_e64 v3, 7, s6
1437 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1438 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x46
1439 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 6, s6
1440 ; GCN-NEXT: v_cndmask_b32_e32 v3, 1, v3, vcc
1441 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1442 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1443 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1444 ; GCN-NEXT: v_lshlrev_b16_e32 v3, 3, v3
1445 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 2, v19
1446 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x45
1447 ; GCN-NEXT: v_or_b32_e32 v3, v3, v19
1448 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 5, s6
1449 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1450 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x44
1451 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 4, s6
1452 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1453 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1454 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1455 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 1, v19
1456 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1457 ; GCN-NEXT: v_or_b32_e32 v19, v20, v19
1458 ; GCN-NEXT: v_and_b32_e32 v19, 3, v19
1459 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x43
1460 ; GCN-NEXT: v_or_b32_e32 v19, v19, v3
1461 ; GCN-NEXT: v_lshrrev_b16_e64 v3, 3, s6
1462 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1463 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x42
1464 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 2, s6
1465 ; GCN-NEXT: v_cndmask_b32_e32 v3, 1, v3, vcc
1466 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1467 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1468 ; GCN-NEXT: v_and_b32_e32 v20, 1, v20
1469 ; GCN-NEXT: v_lshlrev_b16_e32 v3, 3, v3
1470 ; GCN-NEXT: v_lshlrev_b16_e32 v20, 2, v20
1471 ; GCN-NEXT: s_cmpk_lg_i32 s0, 0x41
1472 ; GCN-NEXT: v_or_b32_e32 v3, v3, v20
1473 ; GCN-NEXT: v_lshrrev_b16_e64 v20, 1, s6
1474 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1475 ; GCN-NEXT: s_cmp_lg_u32 s0, 64
1476 ; GCN-NEXT: v_mov_b32_e32 v2, s6
1477 ; GCN-NEXT: v_cndmask_b32_e32 v20, 1, v20, vcc
1478 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1479 ; GCN-NEXT: v_cndmask_b32_e32 v2, 1, v2, vcc
1480 ; GCN-NEXT: v_lshlrev_b16_e32 v20, 1, v20
1481 ; GCN-NEXT: v_and_b32_e32 v2, 1, v2
1482 ; GCN-NEXT: v_or_b32_e32 v2, v2, v20
1483 ; GCN-NEXT: v_and_b32_e32 v2, 3, v2
1484 ; GCN-NEXT: v_or_b32_e32 v2, v2, v3
1485 ; GCN-NEXT: v_or_b32_sdwa v3, v16, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
1486 ; GCN-NEXT: v_lshlrev_b16_e32 v15, 4, v19
1487 ; GCN-NEXT: v_and_b32_e32 v2, 15, v2
1488 ; GCN-NEXT: s_cmp_lg_u32 s0, 55
1489 ; GCN-NEXT: v_or_b32_e32 v2, v2, v15
1490 ; GCN-NEXT: v_mov_b32_e32 v15, s24
1491 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1492 ; GCN-NEXT: s_cmp_lg_u32 s0, 54
1493 ; GCN-NEXT: v_cndmask_b32_e32 v15, 1, v15, vcc
1494 ; GCN-NEXT: v_mov_b32_e32 v16, s23
1495 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1496 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1497 ; GCN-NEXT: v_and_b32_e32 v16, 1, v16
1498 ; GCN-NEXT: v_lshlrev_b16_e32 v15, 3, v15
1499 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 2, v16
1500 ; GCN-NEXT: s_cmp_lg_u32 s0, 53
1501 ; GCN-NEXT: v_or_b32_sdwa v2, v2, v18 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
1502 ; GCN-NEXT: v_or_b32_e32 v15, v15, v16
1503 ; GCN-NEXT: v_mov_b32_e32 v16, s22
1504 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1505 ; GCN-NEXT: s_cmp_lg_u32 s0, 52
1506 ; GCN-NEXT: v_or_b32_sdwa v2, v2, v17 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
1507 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1508 ; GCN-NEXT: v_mov_b32_e32 v17, s21
1509 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1510 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1511 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 1, v16
1512 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1513 ; GCN-NEXT: v_or_b32_e32 v16, v17, v16
1514 ; GCN-NEXT: v_and_b32_e32 v16, 3, v16
1515 ; GCN-NEXT: s_cmp_lg_u32 s0, 51
1516 ; GCN-NEXT: v_or_b32_e32 v15, v16, v15
1517 ; GCN-NEXT: v_mov_b32_e32 v16, s20
1518 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1519 ; GCN-NEXT: s_cmp_lg_u32 s0, 50
1520 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1521 ; GCN-NEXT: v_mov_b32_e32 v17, s19
1522 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1523 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1524 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1525 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 3, v16
1526 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 2, v17
1527 ; GCN-NEXT: s_cmp_lg_u32 s0, 49
1528 ; GCN-NEXT: v_or_b32_e32 v16, v16, v17
1529 ; GCN-NEXT: v_mov_b32_e32 v17, s18
1530 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1531 ; GCN-NEXT: s_cmp_lg_u32 s0, 48
1532 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1533 ; GCN-NEXT: v_mov_b32_e32 v18, s17
1534 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1535 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1536 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 1, v17
1537 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1538 ; GCN-NEXT: v_or_b32_e32 v17, v18, v17
1539 ; GCN-NEXT: v_and_b32_e32 v17, 3, v17
1540 ; GCN-NEXT: v_or_b32_e32 v16, v17, v16
1541 ; GCN-NEXT: v_lshlrev_b16_e32 v15, 4, v15
1542 ; GCN-NEXT: v_and_b32_e32 v16, 15, v16
1543 ; GCN-NEXT: s_cmp_lg_u32 s0, 63
1544 ; GCN-NEXT: v_or_b32_e32 v15, v16, v15
1545 ; GCN-NEXT: v_lshrrev_b16_e64 v16, 7, s16
1546 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1547 ; GCN-NEXT: s_cmp_lg_u32 s0, 62
1548 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 6, s16
1549 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1550 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1551 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1552 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1553 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 3, v16
1554 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 2, v17
1555 ; GCN-NEXT: s_cmp_lg_u32 s0, 61
1556 ; GCN-NEXT: v_or_b32_e32 v16, v16, v17
1557 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 5, s16
1558 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1559 ; GCN-NEXT: s_cmp_lg_u32 s0, 60
1560 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 4, s16
1561 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1562 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1563 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1564 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 1, v17
1565 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1566 ; GCN-NEXT: v_or_b32_e32 v17, v18, v17
1567 ; GCN-NEXT: v_and_b32_e32 v17, 3, v17
1568 ; GCN-NEXT: s_cmp_lg_u32 s0, 59
1569 ; GCN-NEXT: v_or_b32_e32 v16, v17, v16
1570 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 3, s16
1571 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1572 ; GCN-NEXT: s_cmp_lg_u32 s0, 58
1573 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 2, s16
1574 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1575 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1576 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1577 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1578 ; GCN-NEXT: s_cmp_lg_u32 s0, 56
1579 ; GCN-NEXT: v_mov_b32_e32 v14, s16
1580 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 3, v17
1581 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 2, v18
1582 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1583 ; GCN-NEXT: s_cmp_lg_u32 s0, 57
1584 ; GCN-NEXT: v_or_b32_e32 v17, v17, v18
1585 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 1, s16
1586 ; GCN-NEXT: v_cndmask_b32_e32 v14, 1, v14, vcc
1587 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1588 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1589 ; GCN-NEXT: v_and_b32_e32 v14, 1, v14
1590 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 1, v18
1591 ; GCN-NEXT: v_or_b32_e32 v14, v14, v18
1592 ; GCN-NEXT: v_and_b32_e32 v14, 3, v14
1593 ; GCN-NEXT: v_or_b32_e32 v14, v14, v17
1594 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 12, v16
1595 ; GCN-NEXT: v_and_b32_sdwa v14, v14, v13 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
1596 ; GCN-NEXT: v_or_b32_e32 v14, v16, v14
1597 ; GCN-NEXT: s_cmp_lg_u32 s0, 47
1598 ; GCN-NEXT: v_or_b32_sdwa v15, v15, v14 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
1599 ; GCN-NEXT: v_lshrrev_b16_e64 v14, 15, s5
1600 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1601 ; GCN-NEXT: s_cmp_lg_u32 s0, 46
1602 ; GCN-NEXT: v_lshrrev_b16_e64 v16, 14, s5
1603 ; GCN-NEXT: v_cndmask_b32_e32 v14, 1, v14, vcc
1604 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1605 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1606 ; GCN-NEXT: v_and_b32_e32 v16, 1, v16
1607 ; GCN-NEXT: v_lshlrev_b16_e32 v14, 3, v14
1608 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 2, v16
1609 ; GCN-NEXT: s_cmp_lg_u32 s0, 45
1610 ; GCN-NEXT: v_or_b32_e32 v14, v14, v16
1611 ; GCN-NEXT: v_lshrrev_b16_e64 v16, 13, s5
1612 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1613 ; GCN-NEXT: s_cmp_lg_u32 s0, 44
1614 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 12, s5
1615 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1616 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1617 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1618 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 1, v16
1619 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1620 ; GCN-NEXT: v_or_b32_e32 v16, v17, v16
1621 ; GCN-NEXT: v_and_b32_e32 v16, 3, v16
1622 ; GCN-NEXT: s_cmp_lg_u32 s0, 43
1623 ; GCN-NEXT: v_or_b32_e32 v14, v16, v14
1624 ; GCN-NEXT: v_lshrrev_b16_e64 v16, 11, s5
1625 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1626 ; GCN-NEXT: s_cmp_lg_u32 s0, 42
1627 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 10, s5
1628 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1629 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1630 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1631 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1632 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 3, v16
1633 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 2, v17
1634 ; GCN-NEXT: s_cmp_lg_u32 s0, 41
1635 ; GCN-NEXT: v_or_b32_e32 v16, v16, v17
1636 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 9, s5
1637 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1638 ; GCN-NEXT: s_cmp_lg_u32 s0, 40
1639 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 8, s5
1640 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1641 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1642 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1643 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 1, v17
1644 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1645 ; GCN-NEXT: v_or_b32_e32 v17, v18, v17
1646 ; GCN-NEXT: v_and_b32_e32 v17, 3, v17
1647 ; GCN-NEXT: v_or_b32_e32 v16, v17, v16
1648 ; GCN-NEXT: v_lshlrev_b16_e32 v14, 12, v14
1649 ; GCN-NEXT: v_and_b32_sdwa v16, v16, v13 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
1650 ; GCN-NEXT: s_cmp_lg_u32 s0, 39
1651 ; GCN-NEXT: v_or_b32_e32 v16, v14, v16
1652 ; GCN-NEXT: v_lshrrev_b16_e64 v14, 7, s5
1653 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1654 ; GCN-NEXT: s_cmp_lg_u32 s0, 38
1655 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 6, s5
1656 ; GCN-NEXT: v_cndmask_b32_e32 v14, 1, v14, vcc
1657 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1658 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1659 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1660 ; GCN-NEXT: v_lshlrev_b16_e32 v14, 3, v14
1661 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 2, v17
1662 ; GCN-NEXT: s_cmp_lg_u32 s0, 37
1663 ; GCN-NEXT: v_or_b32_e32 v14, v14, v17
1664 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 5, s5
1665 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1666 ; GCN-NEXT: s_cmp_lg_u32 s0, 36
1667 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 4, s5
1668 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1669 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1670 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1671 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 1, v17
1672 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1673 ; GCN-NEXT: v_or_b32_e32 v17, v18, v17
1674 ; GCN-NEXT: v_and_b32_e32 v17, 3, v17
1675 ; GCN-NEXT: s_cmp_lg_u32 s0, 35
1676 ; GCN-NEXT: v_or_b32_e32 v17, v17, v14
1677 ; GCN-NEXT: v_lshrrev_b16_e64 v14, 3, s5
1678 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1679 ; GCN-NEXT: s_cmp_lg_u32 s0, 34
1680 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 2, s5
1681 ; GCN-NEXT: v_cndmask_b32_e32 v14, 1, v14, vcc
1682 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1683 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1684 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1685 ; GCN-NEXT: v_lshlrev_b16_e32 v14, 3, v14
1686 ; GCN-NEXT: v_lshlrev_b16_e32 v18, 2, v18
1687 ; GCN-NEXT: s_cmp_lg_u32 s0, 33
1688 ; GCN-NEXT: v_or_b32_e32 v18, v14, v18
1689 ; GCN-NEXT: v_lshrrev_b16_e64 v14, 1, s5
1690 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1691 ; GCN-NEXT: s_cmp_lg_u32 s0, 32
1692 ; GCN-NEXT: v_mov_b32_e32 v1, s5
1693 ; GCN-NEXT: v_cndmask_b32_e32 v14, 1, v14, vcc
1694 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1695 ; GCN-NEXT: v_cndmask_b32_e32 v1, 1, v1, vcc
1696 ; GCN-NEXT: v_lshlrev_b16_e32 v14, 1, v14
1697 ; GCN-NEXT: v_and_b32_e32 v1, 1, v1
1698 ; GCN-NEXT: v_or_b32_e32 v1, v1, v14
1699 ; GCN-NEXT: v_and_b32_e32 v1, 3, v1
1700 ; GCN-NEXT: v_or_b32_e32 v1, v1, v18
1701 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 4, v17
1702 ; GCN-NEXT: v_and_b32_e32 v1, 15, v1
1703 ; GCN-NEXT: v_or_b32_e32 v1, v1, v17
1704 ; GCN-NEXT: v_or_b32_sdwa v1, v1, v16 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
1705 ; GCN-NEXT: s_cmp_lg_u32 s0, 23
1706 ; GCN-NEXT: v_or_b32_sdwa v1, v1, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
1707 ; GCN-NEXT: v_mov_b32_e32 v15, s15
1708 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1709 ; GCN-NEXT: s_cmp_lg_u32 s0, 22
1710 ; GCN-NEXT: v_cndmask_b32_e32 v15, 1, v15, vcc
1711 ; GCN-NEXT: v_mov_b32_e32 v16, s14
1712 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1713 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1714 ; GCN-NEXT: v_and_b32_e32 v16, 1, v16
1715 ; GCN-NEXT: v_lshlrev_b16_e32 v15, 3, v15
1716 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 2, v16
1717 ; GCN-NEXT: s_cmp_lg_u32 s0, 21
1718 ; GCN-NEXT: v_or_b32_e32 v15, v15, v16
1719 ; GCN-NEXT: v_mov_b32_e32 v16, s13
1720 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1721 ; GCN-NEXT: s_cmp_lg_u32 s0, 20
1722 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1723 ; GCN-NEXT: v_mov_b32_e32 v17, s12
1724 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1725 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1726 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 1, v16
1727 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1728 ; GCN-NEXT: v_or_b32_e32 v16, v17, v16
1729 ; GCN-NEXT: v_and_b32_e32 v16, 3, v16
1730 ; GCN-NEXT: s_cmp_lg_u32 s0, 19
1731 ; GCN-NEXT: v_or_b32_e32 v15, v16, v15
1732 ; GCN-NEXT: v_mov_b32_e32 v16, s11
1733 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1734 ; GCN-NEXT: s_cmp_lg_u32 s0, 18
1735 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1736 ; GCN-NEXT: v_mov_b32_e32 v17, s10
1737 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1738 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1739 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1740 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 3, v16
1741 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 2, v17
1742 ; GCN-NEXT: s_cmp_lg_u32 s0, 17
1743 ; GCN-NEXT: v_or_b32_e32 v16, v16, v17
1744 ; GCN-NEXT: v_mov_b32_e32 v17, s9
1745 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1746 ; GCN-NEXT: s_cmp_lg_u32 s0, 16
1747 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1748 ; GCN-NEXT: v_mov_b32_e32 v19, s8
1749 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1750 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1751 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 1, v17
1752 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1753 ; GCN-NEXT: v_or_b32_e32 v17, v19, v17
1754 ; GCN-NEXT: v_and_b32_e32 v17, 3, v17
1755 ; GCN-NEXT: v_or_b32_e32 v16, v17, v16
1756 ; GCN-NEXT: v_lshlrev_b16_e32 v15, 4, v15
1757 ; GCN-NEXT: v_and_b32_e32 v16, 15, v16
1758 ; GCN-NEXT: s_cmp_lg_u32 s0, 31
1759 ; GCN-NEXT: v_or_b32_e32 v15, v16, v15
1760 ; GCN-NEXT: v_lshrrev_b16_e64 v16, 7, s1
1761 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1762 ; GCN-NEXT: s_cmp_lg_u32 s0, 30
1763 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 6, s1
1764 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1765 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1766 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1767 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1768 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 3, v16
1769 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 2, v17
1770 ; GCN-NEXT: s_cmp_lg_u32 s0, 29
1771 ; GCN-NEXT: v_or_b32_e32 v16, v16, v17
1772 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 5, s1
1773 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1774 ; GCN-NEXT: s_cmp_lg_u32 s0, 28
1775 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 4, s1
1776 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1777 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1778 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1779 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 1, v17
1780 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1781 ; GCN-NEXT: v_or_b32_e32 v17, v19, v17
1782 ; GCN-NEXT: v_and_b32_e32 v17, 3, v17
1783 ; GCN-NEXT: s_cmp_lg_u32 s0, 27
1784 ; GCN-NEXT: v_or_b32_e32 v16, v17, v16
1785 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 3, s1
1786 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1787 ; GCN-NEXT: s_cmp_lg_u32 s0, 26
1788 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 2, s1
1789 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1790 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1791 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1792 ; GCN-NEXT: v_and_b32_e32 v19, 1, v19
1793 ; GCN-NEXT: s_cmp_lg_u32 s0, 24
1794 ; GCN-NEXT: v_mov_b32_e32 v18, s1
1795 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 3, v17
1796 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 2, v19
1797 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1798 ; GCN-NEXT: s_cmp_lg_u32 s0, 25
1799 ; GCN-NEXT: v_or_b32_e32 v17, v17, v19
1800 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 1, s1
1801 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1802 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1803 ; GCN-NEXT: v_cndmask_b32_e32 v19, 1, v19, vcc
1804 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1805 ; GCN-NEXT: v_lshlrev_b16_e32 v19, 1, v19
1806 ; GCN-NEXT: v_or_b32_e32 v18, v18, v19
1807 ; GCN-NEXT: v_and_b32_e32 v18, 3, v18
1808 ; GCN-NEXT: v_or_b32_e32 v17, v18, v17
1809 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 12, v16
1810 ; GCN-NEXT: v_and_b32_sdwa v17, v17, v13 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
1811 ; GCN-NEXT: v_or_b32_e32 v16, v16, v17
1812 ; GCN-NEXT: s_cmp_lg_u32 s0, 15
1813 ; GCN-NEXT: v_or_b32_sdwa v15, v15, v16 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
1814 ; GCN-NEXT: v_lshrrev_b16_e64 v16, 15, s4
1815 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1816 ; GCN-NEXT: s_cmp_lg_u32 s0, 14
1817 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 14, s4
1818 ; GCN-NEXT: v_cndmask_b32_e32 v16, 1, v16, vcc
1819 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1820 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1821 ; GCN-NEXT: v_and_b32_e32 v17, 1, v17
1822 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 3, v16
1823 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 2, v17
1824 ; GCN-NEXT: s_cmp_lg_u32 s0, 13
1825 ; GCN-NEXT: v_or_b32_e32 v16, v16, v17
1826 ; GCN-NEXT: v_lshrrev_b16_e64 v17, 13, s4
1827 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1828 ; GCN-NEXT: s_cmp_lg_u32 s0, 12
1829 ; GCN-NEXT: v_lshrrev_b16_e64 v18, 12, s4
1830 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v17, vcc
1831 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1832 ; GCN-NEXT: v_cndmask_b32_e32 v18, 1, v18, vcc
1833 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 1, v17
1834 ; GCN-NEXT: v_and_b32_e32 v18, 1, v18
1835 ; GCN-NEXT: v_or_b32_e32 v17, v18, v17
1836 ; GCN-NEXT: s_cmp_lg_u32 s0, 11
1837 ; GCN-NEXT: v_lshrrev_b16_e64 v19, 11, s4
1838 ; GCN-NEXT: v_and_b32_e32 v17, 3, v17
1839 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1840 ; GCN-NEXT: s_cmp_lg_u32 s0, 10
1841 ; GCN-NEXT: v_lshrrev_b16_e64 v14, 10, s4
1842 ; GCN-NEXT: v_or_b32_e32 v16, v17, v16
1843 ; GCN-NEXT: v_cndmask_b32_e32 v17, 1, v19, vcc
1844 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1845 ; GCN-NEXT: s_cmp_lg_u32 s0, 9
1846 ; GCN-NEXT: v_lshrrev_b16_e64 v12, 9, s4
1847 ; GCN-NEXT: v_cndmask_b32_e32 v14, 1, v14, vcc
1848 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1849 ; GCN-NEXT: s_cmp_lg_u32 s0, 8
1850 ; GCN-NEXT: v_lshrrev_b16_e64 v11, 8, s4
1851 ; GCN-NEXT: v_cndmask_b32_e32 v12, 1, v12, vcc
1852 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1853 ; GCN-NEXT: s_cmp_lg_u32 s0, 7
1854 ; GCN-NEXT: v_lshrrev_b16_e64 v10, 7, s4
1855 ; GCN-NEXT: v_cndmask_b32_e32 v11, 1, v11, vcc
1856 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1857 ; GCN-NEXT: s_cmp_lg_u32 s0, 6
1858 ; GCN-NEXT: v_lshrrev_b16_e64 v9, 6, s4
1859 ; GCN-NEXT: v_cndmask_b32_e32 v10, 1, v10, vcc
1860 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1861 ; GCN-NEXT: s_cmp_lg_u32 s0, 5
1862 ; GCN-NEXT: v_lshrrev_b16_e64 v8, 5, s4
1863 ; GCN-NEXT: v_cndmask_b32_e32 v9, 1, v9, vcc
1864 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1865 ; GCN-NEXT: s_cmp_lg_u32 s0, 4
1866 ; GCN-NEXT: v_lshrrev_b16_e64 v7, 4, s4
1867 ; GCN-NEXT: v_cndmask_b32_e32 v8, 1, v8, vcc
1868 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1869 ; GCN-NEXT: s_cmp_lg_u32 s0, 3
1870 ; GCN-NEXT: v_lshrrev_b16_e64 v6, 3, s4
1871 ; GCN-NEXT: v_cndmask_b32_e32 v7, 1, v7, vcc
1872 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1873 ; GCN-NEXT: s_cmp_lg_u32 s0, 2
1874 ; GCN-NEXT: v_lshrrev_b16_e64 v5, 2, s4
1875 ; GCN-NEXT: v_cndmask_b32_e32 v6, 1, v6, vcc
1876 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1877 ; GCN-NEXT: s_cmp_lg_u32 s0, 1
1878 ; GCN-NEXT: v_lshrrev_b16_e64 v4, 1, s4
1879 ; GCN-NEXT: v_cndmask_b32_e32 v5, 1, v5, vcc
1880 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1881 ; GCN-NEXT: s_cmp_lg_u32 s0, 0
1882 ; GCN-NEXT: v_mov_b32_e32 v0, s4
1883 ; GCN-NEXT: v_cndmask_b32_e32 v4, 1, v4, vcc
1884 ; GCN-NEXT: s_cselect_b64 vcc, -1, 0
1885 ; GCN-NEXT: v_cndmask_b32_e32 v0, 1, v0, vcc
1886 ; GCN-NEXT: v_and_b32_e32 v14, 1, v14
1887 ; GCN-NEXT: v_lshlrev_b16_e32 v12, 1, v12
1888 ; GCN-NEXT: v_and_b32_e32 v11, 1, v11
1889 ; GCN-NEXT: v_and_b32_e32 v9, 1, v9
1890 ; GCN-NEXT: v_lshlrev_b16_e32 v8, 1, v8
1891 ; GCN-NEXT: v_and_b32_e32 v7, 1, v7
1892 ; GCN-NEXT: v_and_b32_e32 v5, 1, v5
1893 ; GCN-NEXT: v_lshlrev_b16_e32 v4, 1, v4
1894 ; GCN-NEXT: v_and_b32_e32 v0, 1, v0
1895 ; GCN-NEXT: v_lshlrev_b16_e32 v17, 3, v17
1896 ; GCN-NEXT: v_lshlrev_b16_e32 v14, 2, v14
1897 ; GCN-NEXT: v_or_b32_e32 v11, v11, v12
1898 ; GCN-NEXT: v_lshlrev_b16_e32 v10, 3, v10
1899 ; GCN-NEXT: v_lshlrev_b16_e32 v9, 2, v9
1900 ; GCN-NEXT: v_or_b32_e32 v7, v7, v8
1901 ; GCN-NEXT: v_lshlrev_b16_e32 v6, 3, v6
1902 ; GCN-NEXT: v_lshlrev_b16_e32 v5, 2, v5
1903 ; GCN-NEXT: v_or_b32_e32 v0, v0, v4
1904 ; GCN-NEXT: v_or_b32_e32 v14, v17, v14
1905 ; GCN-NEXT: v_and_b32_e32 v11, 3, v11
1906 ; GCN-NEXT: v_or_b32_e32 v9, v10, v9
1907 ; GCN-NEXT: v_and_b32_e32 v7, 3, v7
1908 ; GCN-NEXT: v_or_b32_e32 v5, v6, v5
1909 ; GCN-NEXT: v_and_b32_e32 v0, 3, v0
1910 ; GCN-NEXT: v_or_b32_e32 v11, v11, v14
1911 ; GCN-NEXT: v_or_b32_e32 v7, v7, v9
1912 ; GCN-NEXT: v_or_b32_e32 v0, v0, v5
1913 ; GCN-NEXT: v_lshlrev_b16_e32 v16, 12, v16
1914 ; GCN-NEXT: v_and_b32_sdwa v11, v11, v13 dst_sel:BYTE_1 dst_unused:UNUSED_PAD src0_sel:DWORD src1_sel:DWORD
1915 ; GCN-NEXT: v_lshlrev_b16_e32 v7, 4, v7
1916 ; GCN-NEXT: v_and_b32_e32 v0, 15, v0
1917 ; GCN-NEXT: v_or_b32_e32 v11, v16, v11
1918 ; GCN-NEXT: v_or_b32_e32 v0, v0, v7
1919 ; GCN-NEXT: v_or_b32_sdwa v0, v0, v11 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:BYTE_0 src1_sel:DWORD
1920 ; GCN-NEXT: v_mov_b32_e32 v5, s3
1921 ; GCN-NEXT: v_or_b32_sdwa v0, v0, v15 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_0 src1_sel:DWORD
1922 ; GCN-NEXT: v_mov_b32_e32 v4, s2
1923 ; GCN-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1924 ; GCN-NEXT: s_endpgm
1925 entry:
1926 %v = insertelement <128 x i1> %vec, i1 1, i32 %sel
1927 store <128 x i1> %v, ptr addrspace(1) %out
1928 ret void
1929 }
1931 define amdgpu_ps <32 x float> @float32_inselt_vec(<32 x float> %vec, i32 %sel) {
1932 ; GCN-LABEL: float32_inselt_vec:
1933 ; GCN: ; %bb.0: ; %entry
1934 ; GCN-NEXT: v_cmp_ne_u32_e32 vcc, 1, v32
1935 ; GCN-NEXT: v_cmp_ne_u32_e64 s[0:1], 2, v32
1936 ; GCN-NEXT: v_cmp_ne_u32_e64 s[2:3], 3, v32
1937 ; GCN-NEXT: v_cmp_ne_u32_e64 s[4:5], 4, v32
1938 ; GCN-NEXT: v_cmp_ne_u32_e64 s[6:7], 5, v32
1939 ; GCN-NEXT: v_cmp_ne_u32_e64 s[8:9], 6, v32
1940 ; GCN-NEXT: v_cmp_ne_u32_e64 s[10:11], 7, v32
1941 ; GCN-NEXT: v_cmp_ne_u32_e64 s[12:13], 8, v32
1942 ; GCN-NEXT: v_cmp_ne_u32_e64 s[14:15], 9, v32
1943 ; GCN-NEXT: v_cmp_ne_u32_e64 s[16:17], 10, v32
1944 ; GCN-NEXT: v_cmp_ne_u32_e64 s[18:19], 11, v32
1945 ; GCN-NEXT: v_cmp_ne_u32_e64 s[20:21], 12, v32
1946 ; GCN-NEXT: v_cmp_ne_u32_e64 s[22:23], 13, v32
1947 ; GCN-NEXT: v_cmp_ne_u32_e64 s[24:25], 14, v32
1948 ; GCN-NEXT: v_cmp_ne_u32_e64 s[26:27], 15, v32
1949 ; GCN-NEXT: v_cmp_ne_u32_e64 s[28:29], 16, v32
1950 ; GCN-NEXT: v_cmp_ne_u32_e64 s[30:31], 17, v32
1951 ; GCN-NEXT: v_cmp_ne_u32_e64 s[34:35], 18, v32
1952 ; GCN-NEXT: v_cmp_ne_u32_e64 s[36:37], 19, v32
1953 ; GCN-NEXT: v_cmp_ne_u32_e64 s[38:39], 20, v32
1954 ; GCN-NEXT: v_cmp_ne_u32_e64 s[40:41], 21, v32
1955 ; GCN-NEXT: v_cmp_ne_u32_e64 s[42:43], 22, v32
1956 ; GCN-NEXT: v_cmp_ne_u32_e64 s[44:45], 23, v32
1957 ; GCN-NEXT: v_cmp_ne_u32_e64 s[46:47], 24, v32
1958 ; GCN-NEXT: v_cmp_ne_u32_e64 s[48:49], 25, v32
1959 ; GCN-NEXT: v_cmp_ne_u32_e64 s[50:51], 26, v32
1960 ; GCN-NEXT: v_cmp_ne_u32_e64 s[52:53], 27, v32
1961 ; GCN-NEXT: v_cmp_ne_u32_e64 s[54:55], 28, v32
1962 ; GCN-NEXT: v_cmp_ne_u32_e64 s[56:57], 29, v32
1963 ; GCN-NEXT: v_cmp_ne_u32_e64 s[58:59], 30, v32
1964 ; GCN-NEXT: v_cmp_ne_u32_e64 s[60:61], 31, v32
1965 ; GCN-NEXT: v_cmp_ne_u32_e64 s[62:63], 0, v32
1966 ; GCN-NEXT: v_cndmask_b32_e64 v0, 1.0, v0, s[62:63]
1967 ; GCN-NEXT: v_cndmask_b32_e32 v1, 1.0, v1, vcc
1968 ; GCN-NEXT: v_cndmask_b32_e64 v2, 1.0, v2, s[0:1]
1969 ; GCN-NEXT: v_cndmask_b32_e64 v3, 1.0, v3, s[2:3]
1970 ; GCN-NEXT: v_cndmask_b32_e64 v4, 1.0, v4, s[4:5]
1971 ; GCN-NEXT: v_cndmask_b32_e64 v5, 1.0, v5, s[6:7]
1972 ; GCN-NEXT: v_cndmask_b32_e64 v6, 1.0, v6, s[8:9]
1973 ; GCN-NEXT: v_cndmask_b32_e64 v7, 1.0, v7, s[10:11]
1974 ; GCN-NEXT: v_cndmask_b32_e64 v8, 1.0, v8, s[12:13]
1975 ; GCN-NEXT: v_cndmask_b32_e64 v9, 1.0, v9, s[14:15]
1976 ; GCN-NEXT: v_cndmask_b32_e64 v10, 1.0, v10, s[16:17]
1977 ; GCN-NEXT: v_cndmask_b32_e64 v11, 1.0, v11, s[18:19]
1978 ; GCN-NEXT: v_cndmask_b32_e64 v12, 1.0, v12, s[20:21]
1979 ; GCN-NEXT: v_cndmask_b32_e64 v13, 1.0, v13, s[22:23]
1980 ; GCN-NEXT: v_cndmask_b32_e64 v14, 1.0, v14, s[24:25]
1981 ; GCN-NEXT: v_cndmask_b32_e64 v15, 1.0, v15, s[26:27]
1982 ; GCN-NEXT: v_cndmask_b32_e64 v16, 1.0, v16, s[28:29]
1983 ; GCN-NEXT: v_cndmask_b32_e64 v17, 1.0, v17, s[30:31]
1984 ; GCN-NEXT: v_cndmask_b32_e64 v18, 1.0, v18, s[34:35]
1985 ; GCN-NEXT: v_cndmask_b32_e64 v19, 1.0, v19, s[36:37]
1986 ; GCN-NEXT: v_cndmask_b32_e64 v20, 1.0, v20, s[38:39]
1987 ; GCN-NEXT: v_cndmask_b32_e64 v21, 1.0, v21, s[40:41]
1988 ; GCN-NEXT: v_cndmask_b32_e64 v22, 1.0, v22, s[42:43]
1989 ; GCN-NEXT: v_cndmask_b32_e64 v23, 1.0, v23, s[44:45]
1990 ; GCN-NEXT: v_cndmask_b32_e64 v24, 1.0, v24, s[46:47]
1991 ; GCN-NEXT: v_cndmask_b32_e64 v25, 1.0, v25, s[48:49]
1992 ; GCN-NEXT: v_cndmask_b32_e64 v26, 1.0, v26, s[50:51]
1993 ; GCN-NEXT: v_cndmask_b32_e64 v27, 1.0, v27, s[52:53]
1994 ; GCN-NEXT: v_cndmask_b32_e64 v28, 1.0, v28, s[54:55]
1995 ; GCN-NEXT: v_cndmask_b32_e64 v29, 1.0, v29, s[56:57]
1996 ; GCN-NEXT: v_cndmask_b32_e64 v30, 1.0, v30, s[58:59]
1997 ; GCN-NEXT: v_cndmask_b32_e64 v31, 1.0, v31, s[60:61]
1998 ; GCN-NEXT: ; return to shader part epilog
1999 entry:
2000 %v = insertelement <32 x float> %vec, float 1.000000e+00, i32 %sel
2001 ret <32 x float> %v
2002 }
2004 define <8 x double> @double8_inselt_vec(<8 x double> %vec, i32 %sel) {
2005 ; GCN-LABEL: double8_inselt_vec:
2006 ; GCN: ; %bb.0: ; %entry
2007 ; GCN-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
2008 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 0, v16
2009 ; GCN-NEXT: v_mov_b32_e32 v17, 0x3ff00000
2010 ; GCN-NEXT: v_cndmask_b32_e64 v0, v0, 0, vcc
2011 ; GCN-NEXT: v_cndmask_b32_e32 v1, v1, v17, vcc
2012 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 1, v16
2013 ; GCN-NEXT: v_cndmask_b32_e64 v2, v2, 0, vcc
2014 ; GCN-NEXT: v_cndmask_b32_e32 v3, v3, v17, vcc
2015 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 2, v16
2016 ; GCN-NEXT: v_cndmask_b32_e64 v4, v4, 0, vcc
2017 ; GCN-NEXT: v_cndmask_b32_e32 v5, v5, v17, vcc
2018 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 3, v16
2019 ; GCN-NEXT: v_cndmask_b32_e64 v6, v6, 0, vcc
2020 ; GCN-NEXT: v_cndmask_b32_e32 v7, v7, v17, vcc
2021 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 4, v16
2022 ; GCN-NEXT: v_cndmask_b32_e64 v8, v8, 0, vcc
2023 ; GCN-NEXT: v_cndmask_b32_e32 v9, v9, v17, vcc
2024 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 5, v16
2025 ; GCN-NEXT: v_cndmask_b32_e64 v10, v10, 0, vcc
2026 ; GCN-NEXT: v_cndmask_b32_e32 v11, v11, v17, vcc
2027 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 6, v16
2028 ; GCN-NEXT: v_cndmask_b32_e64 v12, v12, 0, vcc
2029 ; GCN-NEXT: v_cndmask_b32_e32 v13, v13, v17, vcc
2030 ; GCN-NEXT: v_cmp_eq_u32_e32 vcc, 7, v16
2031 ; GCN-NEXT: v_cndmask_b32_e64 v14, v14, 0, vcc
2032 ; GCN-NEXT: v_cndmask_b32_e32 v15, v15, v17, vcc
2033 ; GCN-NEXT: s_setpc_b64 s[30:31]
2034 entry:
2035 %v = insertelement <8 x double> %vec, double 1.000000e+00, i32 %sel
2036 ret <8 x double> %v
2037 }