| blob | 03c85b4470628fabdc17cb92875087bddfaa619e |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -O0 -verify-machineinstrs %s -o - | FileCheck %s
4 ; The forced spill to preserve the scratch VGPR require the voffset to hold the large offset
5 ; value in the MUBUF instruction being emitted before s_cbranch_scc1 as it clobbers the SCC.
7 define amdgpu_kernel void @test_kernel(i32 %val) #0 {
8 ; CHECK-LABEL: test_kernel:
9 ; CHECK: ; %bb.0:
10 ; CHECK-NEXT: s_mov_b32 s32, 0x180000
11 ; CHECK-NEXT: s_mov_b32 s33, 0
12 ; CHECK-NEXT: s_add_u32 flat_scratch_lo, s12, s17
13 ; CHECK-NEXT: s_addc_u32 flat_scratch_hi, s13, 0
14 ; CHECK-NEXT: s_add_u32 s0, s0, s17
15 ; CHECK-NEXT: s_addc_u32 s1, s1, 0
16 ; CHECK-NEXT: ; implicit-def: $vgpr3 : SGPR spill to VGPR lane
17 ; CHECK-NEXT: v_writelane_b32 v3, s16, 0
18 ; CHECK-NEXT: s_or_saveexec_b64 s[34:35], -1
19 ; CHECK-NEXT: s_add_i32 s12, s33, 0x100200
20 ; CHECK-NEXT: buffer_store_dword v3, off, s[0:3], s12 ; 4-byte Folded Spill
21 ; CHECK-NEXT: s_mov_b64 exec, s[34:35]
22 ; CHECK-NEXT: s_mov_b32 s13, s15
23 ; CHECK-NEXT: s_mov_b32 s12, s14
24 ; CHECK-NEXT: v_readlane_b32 s14, v3, 0
25 ; CHECK-NEXT: s_mov_b64 s[16:17], s[8:9]
26 ; CHECK-NEXT: v_mov_b32_e32 v3, v2
27 ; CHECK-NEXT: v_mov_b32_e32 v2, v1
28 ; CHECK-NEXT: v_mov_b32_e32 v1, v0
29 ; CHECK-NEXT: s_or_saveexec_b64 s[34:35], -1
30 ; CHECK-NEXT: s_add_i32 s8, s33, 0x100200
31 ; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s8 ; 4-byte Folded Reload
32 ; CHECK-NEXT: s_mov_b64 exec, s[34:35]
33 ; CHECK-NEXT: s_load_dword s8, s[16:17], 0x0
34 ; CHECK-NEXT: s_waitcnt vmcnt(0) lgkmcnt(0)
35 ; CHECK-NEXT: v_writelane_b32 v0, s8, 1
36 ; CHECK-NEXT: s_or_saveexec_b64 s[34:35], -1
37 ; CHECK-NEXT: s_add_i32 s8, s33, 0x100200
38 ; CHECK-NEXT: buffer_store_dword v0, off, s[0:3], s8 ; 4-byte Folded Spill
39 ; CHECK-NEXT: s_mov_b64 exec, s[34:35]
40 ; CHECK-NEXT: ;;#ASMSTART
41 ; CHECK-NEXT: ; def vgpr10
42 ; CHECK-NEXT: ;;#ASMEND
43 ; CHECK-NEXT: s_add_i32 s8, s33, 0x100100
44 ; CHECK-NEXT: buffer_store_dword v10, off, s[0:3], s8 ; 4-byte Folded Spill
45 ; CHECK-NEXT: s_mov_b64 s[18:19], 8
46 ; CHECK-NEXT: s_mov_b32 s8, s16
47 ; CHECK-NEXT: s_mov_b32 s9, s17
48 ; CHECK-NEXT: s_mov_b32 s16, s18
49 ; CHECK-NEXT: s_mov_b32 s15, s19
50 ; CHECK-NEXT: s_add_u32 s8, s8, s16
51 ; CHECK-NEXT: s_addc_u32 s15, s9, s15
52 ; CHECK-NEXT: ; kill: def $sgpr8 killed $sgpr8 def $sgpr8_sgpr9
53 ; CHECK-NEXT: s_mov_b32 s9, s15
54 ; CHECK-NEXT: v_mov_b32_e32 v0, 0x2000
55 ; CHECK-NEXT: ; implicit-def: $sgpr15
56 ; CHECK-NEXT: s_getpc_b64 s[16:17]
57 ; CHECK-NEXT: s_add_u32 s16, s16, device_func@gotpcrel32@lo+4
58 ; CHECK-NEXT: s_addc_u32 s17, s17, device_func@gotpcrel32@hi+12
59 ; CHECK-NEXT: s_load_dwordx2 s[16:17], s[16:17], 0x0
60 ; CHECK-NEXT: s_mov_b64 s[22:23], s[2:3]
61 ; CHECK-NEXT: s_mov_b64 s[20:21], s[0:1]
62 ; CHECK-NEXT: s_mov_b32 s15, 20
63 ; CHECK-NEXT: v_lshlrev_b32_e64 v3, s15, v3
64 ; CHECK-NEXT: s_mov_b32 s15, 10
65 ; CHECK-NEXT: v_lshlrev_b32_e64 v2, s15, v2
66 ; CHECK-NEXT: v_or3_b32 v31, v1, v2, v3
67 ; CHECK-NEXT: ; implicit-def: $sgpr15
68 ; CHECK-NEXT: s_mov_b64 s[0:1], s[20:21]
69 ; CHECK-NEXT: s_mov_b64 s[2:3], s[22:23]
70 ; CHECK-NEXT: s_waitcnt lgkmcnt(0)
71 ; CHECK-NEXT: s_swappc_b64 s[30:31], s[16:17]
72 ; CHECK-NEXT: s_or_saveexec_b64 s[34:35], -1
73 ; CHECK-NEXT: s_add_i32 s4, s33, 0x100200
74 ; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s4 ; 4-byte Folded Reload
75 ; CHECK-NEXT: s_mov_b64 exec, s[34:35]
76 ; CHECK-NEXT: s_add_i32 s4, s33, 0x100100
77 ; CHECK-NEXT: buffer_load_dword v10, off, s[0:3], s4 ; 4-byte Folded Reload
78 ; CHECK-NEXT: s_waitcnt vmcnt(1)
79 ; CHECK-NEXT: v_readlane_b32 s4, v0, 1
80 ; CHECK-NEXT: s_mov_b32 s5, 0
81 ; CHECK-NEXT: s_cmp_eq_u32 s4, s5
82 ; CHECK-NEXT: v_mov_b32_e32 v0, 0x4000
83 ; CHECK-NEXT: s_waitcnt vmcnt(0)
84 ; CHECK-NEXT: buffer_store_dword v10, v0, s[0:3], s33 offen ; 4-byte Folded Spill
85 ; CHECK-NEXT: s_cbranch_scc1 .LBB0_2
86 ; CHECK-NEXT: ; %bb.1: ; %store
87 ; CHECK-NEXT: s_or_saveexec_b64 s[34:35], -1
88 ; CHECK-NEXT: s_add_i32 s4, s33, 0x100200
89 ; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s4 ; 4-byte Folded Reload
90 ; CHECK-NEXT: s_mov_b64 exec, s[34:35]
91 ; CHECK-NEXT: s_add_i32 s4, s33, 0x100000
92 ; CHECK-NEXT: buffer_load_dword v2, off, s[0:3], s4 ; 4-byte Folded Reload
93 ; CHECK-NEXT: ; implicit-def: $sgpr4
94 ; CHECK-NEXT: v_mov_b32_e32 v1, s4
95 ; CHECK-NEXT: s_waitcnt vmcnt(0)
96 ; CHECK-NEXT: ds_write_b32 v1, v2
97 ; CHECK-NEXT: ; kill: killed $vgpr0
98 ; CHECK-NEXT: s_endpgm
99 ; CHECK-NEXT: .LBB0_2: ; %end
100 ; CHECK-NEXT: s_or_saveexec_b64 s[34:35], -1
101 ; CHECK-NEXT: s_add_i32 s4, s33, 0x100200
102 ; CHECK-NEXT: buffer_load_dword v0, off, s[0:3], s4 ; 4-byte Folded Reload
103 ; CHECK-NEXT: s_mov_b64 exec, s[34:35]
104 ; CHECK-NEXT: ; kill: killed $vgpr0
105 ; CHECK-NEXT: s_endpgm
106 %arr = alloca < 1339 x i32>, align 8192, addrspace(5)
107 %cmp = icmp ne i32 %val, 0
108 %vreg = call i32 asm sideeffect "; def vgpr10", "={v10}"()
109 call void @device_func(ptr addrspace(5) %arr)
110 br i1 %cmp, label %store, label %end
112 store:
113 store volatile i32 %vreg, ptr addrspace(3) undef
114 ret void
116 end:
117 ret void
118 }
120 declare void @device_func(ptr addrspace(5))
122 attributes #0 = { nounwind "frame-pointer"="all" }