1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,GFX6,GFX6-SDAG %s
3 ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,GFX8,GFX8-SDAG %s
4 ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,GFX9-SDAG %s
5 ; RUN: llc -global-isel=0 -march=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-SDAG %s
7 ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=tahiti < %s | FileCheck -check-prefixes=GCN,GFX6,GFX6-GISEL %s
8 ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=tonga < %s | FileCheck -check-prefixes=GCN,GFX8,GFX8-GISEL %s
9 ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx900 < %s | FileCheck -check-prefixes=GCN,GFX9,GFX9-GISEL %s
10 ; RUN: llc -global-isel=1 -march=amdgcn -mcpu=gfx1100 < %s | FileCheck -check-prefixes=GCN,GFX11,GFX11-GISEL %s
12 define { half, i32 } @test_frexp_f16_i32(half %a) {
13 ; GFX6-SDAG-LABEL: test_frexp_f16_i32:
15 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
16 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
17 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
18 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
19 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v1, v0
20 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
21 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
22 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
23 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc
24 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
26 ; GFX8-LABEL: test_frexp_f16_i32:
28 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
29 ; GFX8-NEXT: v_frexp_mant_f16_e32 v2, v0
30 ; GFX8-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
31 ; GFX8-NEXT: v_bfe_i32 v1, v0, 0, 16
32 ; GFX8-NEXT: v_mov_b32_e32 v0, v2
33 ; GFX8-NEXT: s_setpc_b64 s[30:31]
35 ; GFX9-LABEL: test_frexp_f16_i32:
37 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
38 ; GFX9-NEXT: v_frexp_mant_f16_e32 v2, v0
39 ; GFX9-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
40 ; GFX9-NEXT: v_bfe_i32 v1, v0, 0, 16
41 ; GFX9-NEXT: v_mov_b32_e32 v0, v2
42 ; GFX9-NEXT: s_setpc_b64 s[30:31]
44 ; GFX11-LABEL: test_frexp_f16_i32:
46 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
47 ; GFX11-NEXT: v_frexp_exp_i16_f16_e32 v1, v0
48 ; GFX11-NEXT: v_frexp_mant_f16_e32 v0, v0
49 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
50 ; GFX11-NEXT: v_bfe_i32 v1, v1, 0, 16
51 ; GFX11-NEXT: s_setpc_b64 s[30:31]
53 ; GFX6-GISEL-LABEL: test_frexp_f16_i32:
54 ; GFX6-GISEL: ; %bb.0:
55 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
56 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
57 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v1, 0x7f800000
58 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v2, v0
59 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v1
60 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v3, v0
61 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
62 ; GFX6-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
63 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc
64 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
65 %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
66 ret { half, i32 } %result
69 define half @test_frexp_f16_i32_only_use_fract(half %a) {
70 ; GFX6-SDAG-LABEL: test_frexp_f16_i32_only_use_fract:
72 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
73 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
74 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
75 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
76 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v1, v0
77 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
78 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
79 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
81 ; GFX8-LABEL: test_frexp_f16_i32_only_use_fract:
83 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
84 ; GFX8-NEXT: v_frexp_mant_f16_e32 v0, v0
85 ; GFX8-NEXT: s_setpc_b64 s[30:31]
87 ; GFX9-LABEL: test_frexp_f16_i32_only_use_fract:
89 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
90 ; GFX9-NEXT: v_frexp_mant_f16_e32 v0, v0
91 ; GFX9-NEXT: s_setpc_b64 s[30:31]
93 ; GFX11-LABEL: test_frexp_f16_i32_only_use_fract:
95 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
96 ; GFX11-NEXT: v_frexp_mant_f16_e32 v0, v0
97 ; GFX11-NEXT: s_setpc_b64 s[30:31]
99 ; GFX6-GISEL-LABEL: test_frexp_f16_i32_only_use_fract:
100 ; GFX6-GISEL: ; %bb.0:
101 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
102 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
103 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v1, 0x7f800000
104 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v2, v0
105 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v1
106 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
107 ; GFX6-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
108 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
109 %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
110 %result.0 = extractvalue { half, i32 } %result, 0
114 define i32 @test_frexp_f16_i32_only_use_exp(half %a) {
115 ; GFX6-SDAG-LABEL: test_frexp_f16_i32_only_use_exp:
116 ; GFX6-SDAG: ; %bb.0:
117 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
118 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
119 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
120 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
121 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v1, v0
122 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
123 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc
124 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
126 ; GFX8-LABEL: test_frexp_f16_i32_only_use_exp:
128 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
129 ; GFX8-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
130 ; GFX8-NEXT: v_bfe_i32 v0, v0, 0, 16
131 ; GFX8-NEXT: s_setpc_b64 s[30:31]
133 ; GFX9-LABEL: test_frexp_f16_i32_only_use_exp:
135 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
136 ; GFX9-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
137 ; GFX9-NEXT: v_bfe_i32 v0, v0, 0, 16
138 ; GFX9-NEXT: s_setpc_b64 s[30:31]
140 ; GFX11-LABEL: test_frexp_f16_i32_only_use_exp:
142 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
143 ; GFX11-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
144 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
145 ; GFX11-NEXT: v_bfe_i32 v0, v0, 0, 16
146 ; GFX11-NEXT: s_setpc_b64 s[30:31]
148 ; GFX6-GISEL-LABEL: test_frexp_f16_i32_only_use_exp:
149 ; GFX6-GISEL: ; %bb.0:
150 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
151 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
152 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v1, 0x7f800000
153 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
154 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v1
155 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc
156 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
157 %result = call { half, i32 } @llvm.frexp.f16.i32(half %a)
158 %result.0 = extractvalue { half, i32 } %result, 1
162 define { <2 x half>, <2 x i32> } @test_frexp_v2f16_v2i32(<2 x half> %a) {
163 ; GFX6-SDAG-LABEL: test_frexp_v2f16_v2i32:
164 ; GFX6-SDAG: ; %bb.0:
165 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
166 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
167 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
168 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
169 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v2, v0
170 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v3, v1
171 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v0, v2
172 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v1, v3
173 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v2|, s4
174 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v3|, s4
175 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, v2, v0, vcc
176 ; GFX6-SDAG-NEXT: v_cndmask_b32_e64 v1, v3, v1, s[4:5]
177 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v2, v2
178 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v3, v3
179 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc
180 ; GFX6-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v3, s[4:5]
181 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
183 ; GFX8-SDAG-LABEL: test_frexp_v2f16_v2i32:
184 ; GFX8-SDAG: ; %bb.0:
185 ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
186 ; GFX8-SDAG-NEXT: v_lshrrev_b32_e32 v2, 16, v0
187 ; GFX8-SDAG-NEXT: v_frexp_mant_f16_e32 v1, v0
188 ; GFX8-SDAG-NEXT: v_frexp_mant_f16_sdwa v3, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
189 ; GFX8-SDAG-NEXT: v_or_b32_e32 v3, v1, v3
190 ; GFX8-SDAG-NEXT: v_frexp_exp_i16_f16_e32 v1, v2
191 ; GFX8-SDAG-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
192 ; GFX8-SDAG-NEXT: v_bfe_i32 v2, v1, 0, 16
193 ; GFX8-SDAG-NEXT: v_bfe_i32 v1, v0, 0, 16
194 ; GFX8-SDAG-NEXT: v_mov_b32_e32 v0, v3
195 ; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
197 ; GFX9-SDAG-LABEL: test_frexp_v2f16_v2i32:
198 ; GFX9-SDAG: ; %bb.0:
199 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
200 ; GFX9-SDAG-NEXT: v_lshrrev_b32_e32 v1, 16, v0
201 ; GFX9-SDAG-NEXT: v_frexp_mant_f16_e32 v2, v1
202 ; GFX9-SDAG-NEXT: v_frexp_mant_f16_e32 v3, v0
203 ; GFX9-SDAG-NEXT: v_pack_b32_f16 v3, v3, v2
204 ; GFX9-SDAG-NEXT: v_frexp_exp_i16_f16_e32 v1, v1
205 ; GFX9-SDAG-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
206 ; GFX9-SDAG-NEXT: v_bfe_i32 v2, v1, 0, 16
207 ; GFX9-SDAG-NEXT: v_bfe_i32 v1, v0, 0, 16
208 ; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v3
209 ; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
211 ; GFX11-LABEL: test_frexp_v2f16_v2i32:
213 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
214 ; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0
215 ; GFX11-NEXT: v_frexp_mant_f16_e32 v2, v0
216 ; GFX11-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
217 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(SKIP_1) | instid1(VALU_DEP_3)
218 ; GFX11-NEXT: v_frexp_mant_f16_e32 v3, v1
219 ; GFX11-NEXT: v_frexp_exp_i16_f16_e32 v4, v1
220 ; GFX11-NEXT: v_bfe_i32 v1, v0, 0, 16
221 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3) | instskip(NEXT) | instid1(VALU_DEP_3)
222 ; GFX11-NEXT: v_pack_b32_f16 v0, v2, v3
223 ; GFX11-NEXT: v_bfe_i32 v2, v4, 0, 16
224 ; GFX11-NEXT: s_setpc_b64 s[30:31]
226 ; GFX6-GISEL-LABEL: test_frexp_v2f16_v2i32:
227 ; GFX6-GISEL: ; %bb.0:
228 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
229 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
230 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
231 ; GFX6-GISEL-NEXT: s_mov_b32 s4, 0x7f800000
232 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v3, v0
233 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
234 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
235 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc
236 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
237 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v4, v1
238 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s4
239 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v3, v1
240 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
241 ; GFX6-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
242 ; GFX6-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
243 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc
244 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
246 ; GFX8-GISEL-LABEL: test_frexp_v2f16_v2i32:
247 ; GFX8-GISEL: ; %bb.0:
248 ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
249 ; GFX8-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
250 ; GFX8-GISEL-NEXT: v_frexp_mant_f16_e32 v3, v0
251 ; GFX8-GISEL-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
252 ; GFX8-GISEL-NEXT: v_bfe_i32 v1, v0, 0, 16
253 ; GFX8-GISEL-NEXT: v_frexp_mant_f16_sdwa v0, v2 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:DWORD
254 ; GFX8-GISEL-NEXT: v_frexp_exp_i16_f16_e32 v2, v2
255 ; GFX8-GISEL-NEXT: v_bfe_i32 v2, v2, 0, 16
256 ; GFX8-GISEL-NEXT: v_or_b32_e32 v0, v3, v0
257 ; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
259 ; GFX9-GISEL-LABEL: test_frexp_v2f16_v2i32:
260 ; GFX9-GISEL: ; %bb.0:
261 ; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
262 ; GFX9-GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
263 ; GFX9-GISEL-NEXT: v_frexp_mant_f16_e32 v3, v0
264 ; GFX9-GISEL-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
265 ; GFX9-GISEL-NEXT: v_bfe_i32 v1, v0, 0, 16
266 ; GFX9-GISEL-NEXT: v_frexp_mant_f16_e32 v0, v2
267 ; GFX9-GISEL-NEXT: v_frexp_exp_i16_f16_e32 v2, v2
268 ; GFX9-GISEL-NEXT: v_bfe_i32 v2, v2, 0, 16
269 ; GFX9-GISEL-NEXT: v_pack_b32_f16 v0, v3, v0
270 ; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
271 %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
272 ret { <2 x half>, <2 x i32> } %result
275 define <2 x half> @test_frexp_v2f16_v2i32_only_use_fract(<2 x half> %a) {
276 ; GFX6-SDAG-LABEL: test_frexp_v2f16_v2i32_only_use_fract:
277 ; GFX6-SDAG: ; %bb.0:
278 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
279 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
280 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
281 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
282 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
283 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
284 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v2, v0
285 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
286 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v3, v1
287 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
288 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s4
289 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
290 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
292 ; GFX8-LABEL: test_frexp_v2f16_v2i32_only_use_fract:
294 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
295 ; GFX8-NEXT: v_frexp_mant_f16_e32 v1, v0
296 ; GFX8-NEXT: v_frexp_mant_f16_sdwa v0, v0 dst_sel:WORD_1 dst_unused:UNUSED_PAD src0_sel:WORD_1
297 ; GFX8-NEXT: v_or_b32_e32 v0, v1, v0
298 ; GFX8-NEXT: s_setpc_b64 s[30:31]
300 ; GFX9-SDAG-LABEL: test_frexp_v2f16_v2i32_only_use_fract:
301 ; GFX9-SDAG: ; %bb.0:
302 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
303 ; GFX9-SDAG-NEXT: v_frexp_mant_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
304 ; GFX9-SDAG-NEXT: v_frexp_mant_f16_e32 v0, v0
305 ; GFX9-SDAG-NEXT: v_pack_b32_f16 v0, v0, v1
306 ; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
308 ; GFX11-LABEL: test_frexp_v2f16_v2i32_only_use_fract:
310 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
311 ; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0
312 ; GFX11-NEXT: v_frexp_mant_f16_e32 v0, v0
313 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_1)
314 ; GFX11-NEXT: v_frexp_mant_f16_e32 v1, v1
315 ; GFX11-NEXT: v_pack_b32_f16 v0, v0, v1
316 ; GFX11-NEXT: s_setpc_b64 s[30:31]
318 ; GFX6-GISEL-LABEL: test_frexp_v2f16_v2i32_only_use_fract:
319 ; GFX6-GISEL: ; %bb.0:
320 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
321 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
322 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
323 ; GFX6-GISEL-NEXT: s_mov_b32 s4, 0x7f800000
324 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v2, v0
325 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
326 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
327 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v2, v1
328 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s4
329 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
330 ; GFX6-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
331 ; GFX6-GISEL-NEXT: v_cvt_f16_f32_e32 v1, v1
332 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
334 ; GFX9-GISEL-LABEL: test_frexp_v2f16_v2i32_only_use_fract:
335 ; GFX9-GISEL: ; %bb.0:
336 ; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
337 ; GFX9-GISEL-NEXT: v_frexp_mant_f16_e32 v1, v0
338 ; GFX9-GISEL-NEXT: v_frexp_mant_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
339 ; GFX9-GISEL-NEXT: v_pack_b32_f16 v0, v1, v0
340 ; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
341 %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
342 %result.0 = extractvalue { <2 x half>, <2 x i32> } %result, 0
343 ret <2 x half> %result.0
346 define <2 x i32> @test_frexp_v2f16_v2i32_only_use_exp(<2 x half> %a) {
347 ; GFX6-SDAG-LABEL: test_frexp_v2f16_v2i32_only_use_exp:
348 ; GFX6-SDAG: ; %bb.0:
349 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
350 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
351 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v1, v1
352 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
353 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
354 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v1, v1
355 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
356 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
357 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v3, v1
358 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc
359 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s4
360 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc
361 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
363 ; GFX8-SDAG-LABEL: test_frexp_v2f16_v2i32_only_use_exp:
364 ; GFX8-SDAG: ; %bb.0:
365 ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
366 ; GFX8-SDAG-NEXT: v_frexp_exp_i16_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
367 ; GFX8-SDAG-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
368 ; GFX8-SDAG-NEXT: v_bfe_i32 v1, v1, 0, 16
369 ; GFX8-SDAG-NEXT: v_bfe_i32 v0, v0, 0, 16
370 ; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
372 ; GFX9-SDAG-LABEL: test_frexp_v2f16_v2i32_only_use_exp:
373 ; GFX9-SDAG: ; %bb.0:
374 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
375 ; GFX9-SDAG-NEXT: v_frexp_exp_i16_f16_sdwa v1, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
376 ; GFX9-SDAG-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
377 ; GFX9-SDAG-NEXT: v_bfe_i32 v1, v1, 0, 16
378 ; GFX9-SDAG-NEXT: v_bfe_i32 v0, v0, 0, 16
379 ; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
381 ; GFX11-LABEL: test_frexp_v2f16_v2i32_only_use_exp:
383 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
384 ; GFX11-NEXT: v_lshrrev_b32_e32 v1, 16, v0
385 ; GFX11-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
386 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2) | instskip(NEXT) | instid1(VALU_DEP_2)
387 ; GFX11-NEXT: v_frexp_exp_i16_f16_e32 v1, v1
388 ; GFX11-NEXT: v_bfe_i32 v0, v0, 0, 16
389 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
390 ; GFX11-NEXT: v_bfe_i32 v1, v1, 0, 16
391 ; GFX11-NEXT: s_setpc_b64 s[30:31]
393 ; GFX6-GISEL-LABEL: test_frexp_v2f16_v2i32_only_use_exp:
394 ; GFX6-GISEL: ; %bb.0:
395 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
396 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
397 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v1, v1
398 ; GFX6-GISEL-NEXT: s_mov_b32 s4, 0x7f800000
399 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
400 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
401 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc
402 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v2, v1
403 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s4
404 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc
405 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
407 ; GFX8-GISEL-LABEL: test_frexp_v2f16_v2i32_only_use_exp:
408 ; GFX8-GISEL: ; %bb.0:
409 ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
410 ; GFX8-GISEL-NEXT: v_frexp_exp_i16_f16_e32 v1, v0
411 ; GFX8-GISEL-NEXT: v_bfe_i32 v2, v1, 0, 16
412 ; GFX8-GISEL-NEXT: v_frexp_exp_i16_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
413 ; GFX8-GISEL-NEXT: v_bfe_i32 v1, v0, 0, 16
414 ; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, v2
415 ; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
417 ; GFX9-GISEL-LABEL: test_frexp_v2f16_v2i32_only_use_exp:
418 ; GFX9-GISEL: ; %bb.0:
419 ; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
420 ; GFX9-GISEL-NEXT: v_frexp_exp_i16_f16_e32 v1, v0
421 ; GFX9-GISEL-NEXT: v_bfe_i32 v2, v1, 0, 16
422 ; GFX9-GISEL-NEXT: v_frexp_exp_i16_f16_sdwa v0, v0 dst_sel:DWORD dst_unused:UNUSED_PAD src0_sel:WORD_1
423 ; GFX9-GISEL-NEXT: v_bfe_i32 v1, v0, 0, 16
424 ; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, v2
425 ; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
426 %result = call { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half> %a)
427 %result.1 = extractvalue { <2 x half>, <2 x i32> } %result, 1
428 ret <2 x i32> %result.1
431 define { half, i16 } @test_frexp_f16_i16(half %a) {
432 ; GFX6-SDAG-LABEL: test_frexp_f16_i16:
433 ; GFX6-SDAG: ; %bb.0:
434 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
435 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
436 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
437 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
438 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v1, v0
439 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
440 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
441 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
442 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc
443 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
445 ; GFX8-LABEL: test_frexp_f16_i16:
447 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
448 ; GFX8-NEXT: v_frexp_mant_f16_e32 v2, v0
449 ; GFX8-NEXT: v_frexp_exp_i16_f16_e32 v1, v0
450 ; GFX8-NEXT: v_mov_b32_e32 v0, v2
451 ; GFX8-NEXT: s_setpc_b64 s[30:31]
453 ; GFX9-LABEL: test_frexp_f16_i16:
455 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
456 ; GFX9-NEXT: v_frexp_mant_f16_e32 v2, v0
457 ; GFX9-NEXT: v_frexp_exp_i16_f16_e32 v1, v0
458 ; GFX9-NEXT: v_mov_b32_e32 v0, v2
459 ; GFX9-NEXT: s_setpc_b64 s[30:31]
461 ; GFX11-LABEL: test_frexp_f16_i16:
463 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
464 ; GFX11-NEXT: v_frexp_mant_f16_e32 v2, v0
465 ; GFX11-NEXT: v_frexp_exp_i16_f16_e32 v1, v0
466 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
467 ; GFX11-NEXT: v_mov_b32_e32 v0, v2
468 ; GFX11-NEXT: s_setpc_b64 s[30:31]
470 ; GFX6-GISEL-LABEL: test_frexp_f16_i16:
471 ; GFX6-GISEL: ; %bb.0:
472 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
473 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
474 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v1, 0x7f800000
475 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v2, v0
476 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v1
477 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v3, v0
478 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
479 ; GFX6-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
480 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v3, vcc
481 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
482 %result = call { half, i16 } @llvm.frexp.f16.i16(half %a)
483 ret { half, i16 } %result
486 define half @test_frexp_f16_i16_only_use_fract(half %a) {
487 ; GFX6-SDAG-LABEL: test_frexp_f16_i16_only_use_fract:
488 ; GFX6-SDAG: ; %bb.0:
489 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
490 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
491 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
492 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
493 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v1, v0
494 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
495 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
496 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
498 ; GFX8-LABEL: test_frexp_f16_i16_only_use_fract:
500 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
501 ; GFX8-NEXT: v_frexp_mant_f16_e32 v0, v0
502 ; GFX8-NEXT: s_setpc_b64 s[30:31]
504 ; GFX9-LABEL: test_frexp_f16_i16_only_use_fract:
506 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
507 ; GFX9-NEXT: v_frexp_mant_f16_e32 v0, v0
508 ; GFX9-NEXT: s_setpc_b64 s[30:31]
510 ; GFX11-LABEL: test_frexp_f16_i16_only_use_fract:
512 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
513 ; GFX11-NEXT: v_frexp_mant_f16_e32 v0, v0
514 ; GFX11-NEXT: s_setpc_b64 s[30:31]
516 ; GFX6-GISEL-LABEL: test_frexp_f16_i16_only_use_fract:
517 ; GFX6-GISEL: ; %bb.0:
518 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
519 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
520 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v1, 0x7f800000
521 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v2, v0
522 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v1
523 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
524 ; GFX6-GISEL-NEXT: v_cvt_f16_f32_e32 v0, v0
525 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
526 %result = call { half, i16 } @llvm.frexp.f16.i16(half %a)
527 %result.0 = extractvalue { half, i16 } %result, 0
531 define i16 @test_frexp_f16_i16_only_use_exp(half %a) {
532 ; GFX6-SDAG-LABEL: test_frexp_f16_i16_only_use_exp:
533 ; GFX6-SDAG: ; %bb.0:
534 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
535 ; GFX6-SDAG-NEXT: v_cvt_f16_f32_e32 v0, v0
536 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
537 ; GFX6-SDAG-NEXT: v_cvt_f32_f16_e32 v0, v0
538 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v1, v0
539 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
540 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc
541 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
543 ; GFX8-LABEL: test_frexp_f16_i16_only_use_exp:
545 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
546 ; GFX8-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
547 ; GFX8-NEXT: s_setpc_b64 s[30:31]
549 ; GFX9-LABEL: test_frexp_f16_i16_only_use_exp:
551 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
552 ; GFX9-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
553 ; GFX9-NEXT: s_setpc_b64 s[30:31]
555 ; GFX11-LABEL: test_frexp_f16_i16_only_use_exp:
557 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
558 ; GFX11-NEXT: v_frexp_exp_i16_f16_e32 v0, v0
559 ; GFX11-NEXT: s_setpc_b64 s[30:31]
561 ; GFX6-GISEL-LABEL: test_frexp_f16_i16_only_use_exp:
562 ; GFX6-GISEL: ; %bb.0:
563 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
564 ; GFX6-GISEL-NEXT: v_cvt_f32_f16_e32 v0, v0
565 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v1, 0x7f800000
566 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
567 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v1
568 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc
569 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
570 %result = call { half, i16 } @llvm.frexp.f16.i16(half %a)
571 %result.0 = extractvalue { half, i16 } %result, 1
575 ; define { <2 x half>, <2 x i16> } @test_frexp_v2f16_v2i16(<2 x half> %a) {
576 ; %result = call { <2 x half>, <2 x i16> } @llvm.frexp.v2f16.v2i16(<2 x half> %a)
577 ; ret { <2 x half>, <2 x i16> } %result
580 ; define <2 x half> @test_frexp_v2f16_v2i16_only_use_fract(<2 x half> %a) {
581 ; %result = call { <2 x half>, <2 x i16> } @llvm.frexp.v2f16.v2i16(<2 x half> %a)
582 ; %result.0 = extractvalue { <2 x half>, <2 x i16> } %result, 0
583 ; ret <2 x half> %result.0
586 ; define <2 x i16> @test_frexp_v2f16_v2i16_only_use_exp(<2 x half> %a) {
587 ; %result = call { <2 x half>, <2 x i16> } @llvm.frexp.v2f16.v2i16(<2 x half> %a)
588 ; %result.1 = extractvalue { <2 x half>, <2 x i16> } %result, 1
589 ; ret <2 x i16> %result.1
592 define { float, i32 } @test_frexp_f32_i32(float %a) {
593 ; GFX6-SDAG-LABEL: test_frexp_f32_i32:
594 ; GFX6-SDAG: ; %bb.0:
595 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
596 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
597 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v1, v0
598 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
599 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v2, v0, v1, vcc
600 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v0, v0
601 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v1, 0, v0, vcc
602 ; GFX6-SDAG-NEXT: v_mov_b32_e32 v0, v2
603 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
605 ; GFX8-LABEL: test_frexp_f32_i32:
607 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
608 ; GFX8-NEXT: v_frexp_mant_f32_e32 v2, v0
609 ; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v0
610 ; GFX8-NEXT: v_mov_b32_e32 v0, v2
611 ; GFX8-NEXT: s_setpc_b64 s[30:31]
613 ; GFX9-LABEL: test_frexp_f32_i32:
615 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
616 ; GFX9-NEXT: v_frexp_mant_f32_e32 v2, v0
617 ; GFX9-NEXT: v_frexp_exp_i32_f32_e32 v1, v0
618 ; GFX9-NEXT: v_mov_b32_e32 v0, v2
619 ; GFX9-NEXT: s_setpc_b64 s[30:31]
621 ; GFX11-LABEL: test_frexp_f32_i32:
623 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
624 ; GFX11-NEXT: v_frexp_mant_f32_e32 v2, v0
625 ; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v0
626 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
627 ; GFX11-NEXT: v_mov_b32_e32 v0, v2
628 ; GFX11-NEXT: s_setpc_b64 s[30:31]
630 ; GFX6-GISEL-LABEL: test_frexp_f32_i32:
631 ; GFX6-GISEL: ; %bb.0:
632 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
633 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v3, 0x7f800000
634 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v2, v0
635 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v1, v0
636 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v3
637 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
638 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
639 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
640 %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)
641 ret { float, i32 } %result
644 define float @test_frexp_f32_i32_only_use_fract(float %a) {
645 ; GFX6-SDAG-LABEL: test_frexp_f32_i32_only_use_fract:
646 ; GFX6-SDAG: ; %bb.0:
647 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
648 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
649 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v1, v0
650 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
651 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
652 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
654 ; GFX8-LABEL: test_frexp_f32_i32_only_use_fract:
656 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
657 ; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v0
658 ; GFX8-NEXT: s_setpc_b64 s[30:31]
660 ; GFX9-LABEL: test_frexp_f32_i32_only_use_fract:
662 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
663 ; GFX9-NEXT: v_frexp_mant_f32_e32 v0, v0
664 ; GFX9-NEXT: s_setpc_b64 s[30:31]
666 ; GFX11-LABEL: test_frexp_f32_i32_only_use_fract:
668 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
669 ; GFX11-NEXT: v_frexp_mant_f32_e32 v0, v0
670 ; GFX11-NEXT: s_setpc_b64 s[30:31]
672 ; GFX6-GISEL-LABEL: test_frexp_f32_i32_only_use_fract:
673 ; GFX6-GISEL: ; %bb.0:
674 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
675 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
676 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v1, v0
677 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v2
678 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v1, vcc
679 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
680 %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)
681 %result.0 = extractvalue { float, i32 } %result, 0
685 define i32 @test_frexp_f32_i32_only_use_exp(float %a) {
686 ; GFX6-SDAG-LABEL: test_frexp_f32_i32_only_use_exp:
687 ; GFX6-SDAG: ; %bb.0:
688 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
689 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
690 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v1, v0
691 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
692 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc
693 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
695 ; GFX8-LABEL: test_frexp_f32_i32_only_use_exp:
697 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
698 ; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v0, v0
699 ; GFX8-NEXT: s_setpc_b64 s[30:31]
701 ; GFX9-LABEL: test_frexp_f32_i32_only_use_exp:
703 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
704 ; GFX9-NEXT: v_frexp_exp_i32_f32_e32 v0, v0
705 ; GFX9-NEXT: s_setpc_b64 s[30:31]
707 ; GFX11-LABEL: test_frexp_f32_i32_only_use_exp:
709 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
710 ; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v0
711 ; GFX11-NEXT: s_setpc_b64 s[30:31]
713 ; GFX6-GISEL-LABEL: test_frexp_f32_i32_only_use_exp:
714 ; GFX6-GISEL: ; %bb.0:
715 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
716 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v2, 0x7f800000
717 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v1, v0
718 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, v2
719 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v1, vcc
720 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
721 %result = call { float, i32 } @llvm.frexp.f32.i32(float %a)
722 %result.0 = extractvalue { float, i32 } %result, 1
726 define { <2 x float>, <2 x i32> } @test_frexp_v2f32_v2i32(<2 x float> %a) {
727 ; GFX6-SDAG-LABEL: test_frexp_v2f32_v2i32:
728 ; GFX6-SDAG: ; %bb.0:
729 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
730 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0x7f800000
731 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v2, v0
732 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
733 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v4, v0, v2, vcc
734 ; GFX6-SDAG-NEXT: v_frexp_mant_f32_e32 v2, v1
735 ; GFX6-SDAG-NEXT: v_cmp_lt_f32_e64 s[4:5], |v1|, s4
736 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v0, v0
737 ; GFX6-SDAG-NEXT: v_cndmask_b32_e64 v5, v1, v2, s[4:5]
738 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v0, vcc
739 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v0, v1
740 ; GFX6-SDAG-NEXT: v_cndmask_b32_e64 v3, 0, v0, s[4:5]
741 ; GFX6-SDAG-NEXT: v_mov_b32_e32 v0, v4
742 ; GFX6-SDAG-NEXT: v_mov_b32_e32 v1, v5
743 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
745 ; GFX8-SDAG-LABEL: test_frexp_v2f32_v2i32:
746 ; GFX8-SDAG: ; %bb.0:
747 ; GFX8-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
748 ; GFX8-SDAG-NEXT: v_frexp_mant_f32_e32 v4, v0
749 ; GFX8-SDAG-NEXT: v_frexp_mant_f32_e32 v5, v1
750 ; GFX8-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
751 ; GFX8-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v3, v1
752 ; GFX8-SDAG-NEXT: v_mov_b32_e32 v0, v4
753 ; GFX8-SDAG-NEXT: v_mov_b32_e32 v1, v5
754 ; GFX8-SDAG-NEXT: s_setpc_b64 s[30:31]
756 ; GFX9-SDAG-LABEL: test_frexp_v2f32_v2i32:
757 ; GFX9-SDAG: ; %bb.0:
758 ; GFX9-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
759 ; GFX9-SDAG-NEXT: v_frexp_mant_f32_e32 v4, v0
760 ; GFX9-SDAG-NEXT: v_frexp_mant_f32_e32 v5, v1
761 ; GFX9-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
762 ; GFX9-SDAG-NEXT: v_frexp_exp_i32_f32_e32 v3, v1
763 ; GFX9-SDAG-NEXT: v_mov_b32_e32 v0, v4
764 ; GFX9-SDAG-NEXT: v_mov_b32_e32 v1, v5
765 ; GFX9-SDAG-NEXT: s_setpc_b64 s[30:31]
767 ; GFX11-LABEL: test_frexp_v2f32_v2i32:
769 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
770 ; GFX11-NEXT: v_frexp_mant_f32_e32 v4, v0
771 ; GFX11-NEXT: v_frexp_mant_f32_e32 v5, v1
772 ; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
773 ; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v3, v1
774 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_3)
775 ; GFX11-NEXT: v_dual_mov_b32 v0, v4 :: v_dual_mov_b32 v1, v5
776 ; GFX11-NEXT: s_setpc_b64 s[30:31]
778 ; GFX6-GISEL-LABEL: test_frexp_v2f32_v2i32:
779 ; GFX6-GISEL: ; %bb.0:
780 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
781 ; GFX6-GISEL-NEXT: s_mov_b32 s4, 0x7f800000
782 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v3, v0
783 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
784 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
785 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc
786 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
787 ; GFX6-GISEL-NEXT: v_frexp_mant_f32_e32 v4, v1
788 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v3, v1
789 ; GFX6-GISEL-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s4
790 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v3, 0, v3, vcc
791 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
792 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
794 ; GFX8-GISEL-LABEL: test_frexp_v2f32_v2i32:
795 ; GFX8-GISEL: ; %bb.0:
796 ; GFX8-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
797 ; GFX8-GISEL-NEXT: v_frexp_mant_f32_e32 v5, v0
798 ; GFX8-GISEL-NEXT: v_frexp_mant_f32_e32 v4, v1
799 ; GFX8-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
800 ; GFX8-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v3, v1
801 ; GFX8-GISEL-NEXT: v_mov_b32_e32 v0, v5
802 ; GFX8-GISEL-NEXT: v_mov_b32_e32 v1, v4
803 ; GFX8-GISEL-NEXT: s_setpc_b64 s[30:31]
805 ; GFX9-GISEL-LABEL: test_frexp_v2f32_v2i32:
806 ; GFX9-GISEL: ; %bb.0:
807 ; GFX9-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
808 ; GFX9-GISEL-NEXT: v_frexp_mant_f32_e32 v5, v0
809 ; GFX9-GISEL-NEXT: v_frexp_mant_f32_e32 v4, v1
810 ; GFX9-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
811 ; GFX9-GISEL-NEXT: v_frexp_exp_i32_f32_e32 v3, v1
812 ; GFX9-GISEL-NEXT: v_mov_b32_e32 v0, v5
813 ; GFX9-GISEL-NEXT: v_mov_b32_e32 v1, v4
814 ; GFX9-GISEL-NEXT: s_setpc_b64 s[30:31]
815 %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)
816 ret { <2 x float>, <2 x i32> } %result
819 define <2 x float> @test_frexp_v2f32_v2i32_only_use_fract(<2 x float> %a) {
820 ; GFX6-LABEL: test_frexp_v2f32_v2i32_only_use_fract:
822 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
823 ; GFX6-NEXT: s_mov_b32 s4, 0x7f800000
824 ; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v0
825 ; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
826 ; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
827 ; GFX6-NEXT: v_frexp_mant_f32_e32 v2, v1
828 ; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s4
829 ; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v2, vcc
830 ; GFX6-NEXT: s_setpc_b64 s[30:31]
832 ; GFX8-LABEL: test_frexp_v2f32_v2i32_only_use_fract:
834 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
835 ; GFX8-NEXT: v_frexp_mant_f32_e32 v0, v0
836 ; GFX8-NEXT: v_frexp_mant_f32_e32 v1, v1
837 ; GFX8-NEXT: s_setpc_b64 s[30:31]
839 ; GFX9-LABEL: test_frexp_v2f32_v2i32_only_use_fract:
841 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
842 ; GFX9-NEXT: v_frexp_mant_f32_e32 v0, v0
843 ; GFX9-NEXT: v_frexp_mant_f32_e32 v1, v1
844 ; GFX9-NEXT: s_setpc_b64 s[30:31]
846 ; GFX11-LABEL: test_frexp_v2f32_v2i32_only_use_fract:
848 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
849 ; GFX11-NEXT: v_frexp_mant_f32_e32 v0, v0
850 ; GFX11-NEXT: v_frexp_mant_f32_e32 v1, v1
851 ; GFX11-NEXT: s_setpc_b64 s[30:31]
852 %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)
853 %result.0 = extractvalue { <2 x float>, <2 x i32> } %result, 0
854 ret <2 x float> %result.0
857 define <2 x i32> @test_frexp_v2f32_v2i32_only_use_exp(<2 x float> %a) {
858 ; GFX6-LABEL: test_frexp_v2f32_v2i32_only_use_exp:
860 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
861 ; GFX6-NEXT: s_mov_b32 s4, 0x7f800000
862 ; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v2, v0
863 ; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v0|, s4
864 ; GFX6-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc
865 ; GFX6-NEXT: v_frexp_exp_i32_f32_e32 v2, v1
866 ; GFX6-NEXT: v_cmp_lt_f32_e64 vcc, |v1|, s4
867 ; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v2, vcc
868 ; GFX6-NEXT: s_setpc_b64 s[30:31]
870 ; GFX8-LABEL: test_frexp_v2f32_v2i32_only_use_exp:
872 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
873 ; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v0, v0
874 ; GFX8-NEXT: v_frexp_exp_i32_f32_e32 v1, v1
875 ; GFX8-NEXT: s_setpc_b64 s[30:31]
877 ; GFX9-LABEL: test_frexp_v2f32_v2i32_only_use_exp:
879 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
880 ; GFX9-NEXT: v_frexp_exp_i32_f32_e32 v0, v0
881 ; GFX9-NEXT: v_frexp_exp_i32_f32_e32 v1, v1
882 ; GFX9-NEXT: s_setpc_b64 s[30:31]
884 ; GFX11-LABEL: test_frexp_v2f32_v2i32_only_use_exp:
886 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
887 ; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v0, v0
888 ; GFX11-NEXT: v_frexp_exp_i32_f32_e32 v1, v1
889 ; GFX11-NEXT: s_setpc_b64 s[30:31]
890 %result = call { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float> %a)
891 %result.1 = extractvalue { <2 x float>, <2 x i32> } %result, 1
892 ret <2 x i32> %result.1
895 define { double, i32 } @test_frexp_f64_i32(double %a) {
896 ; GFX6-SDAG-LABEL: test_frexp_f64_i32:
897 ; GFX6-SDAG: ; %bb.0:
898 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
899 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0
900 ; GFX6-SDAG-NEXT: s_mov_b32 s5, 0x7ff00000
901 ; GFX6-SDAG-NEXT: v_frexp_mant_f64_e32 v[3:4], v[0:1]
902 ; GFX6-SDAG-NEXT: v_cmp_lt_f64_e64 vcc, |v[0:1]|, s[4:5]
903 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v3, v0, v3, vcc
904 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f64_e32 v0, v[0:1]
905 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
906 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v2, 0, v0, vcc
907 ; GFX6-SDAG-NEXT: v_mov_b32_e32 v0, v3
908 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
910 ; GFX8-LABEL: test_frexp_f64_i32:
912 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
913 ; GFX8-NEXT: v_frexp_mant_f64_e32 v[3:4], v[0:1]
914 ; GFX8-NEXT: v_frexp_exp_i32_f64_e32 v2, v[0:1]
915 ; GFX8-NEXT: v_mov_b32_e32 v0, v3
916 ; GFX8-NEXT: v_mov_b32_e32 v1, v4
917 ; GFX8-NEXT: s_setpc_b64 s[30:31]
919 ; GFX9-LABEL: test_frexp_f64_i32:
921 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
922 ; GFX9-NEXT: v_frexp_mant_f64_e32 v[3:4], v[0:1]
923 ; GFX9-NEXT: v_frexp_exp_i32_f64_e32 v2, v[0:1]
924 ; GFX9-NEXT: v_mov_b32_e32 v0, v3
925 ; GFX9-NEXT: v_mov_b32_e32 v1, v4
926 ; GFX9-NEXT: s_setpc_b64 s[30:31]
928 ; GFX11-LABEL: test_frexp_f64_i32:
930 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
931 ; GFX11-NEXT: v_frexp_mant_f64_e32 v[3:4], v[0:1]
932 ; GFX11-NEXT: v_frexp_exp_i32_f64_e32 v2, v[0:1]
933 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_2)
934 ; GFX11-NEXT: v_dual_mov_b32 v0, v3 :: v_dual_mov_b32 v1, v4
935 ; GFX11-NEXT: s_setpc_b64 s[30:31]
937 ; GFX6-GISEL-LABEL: test_frexp_f64_i32:
938 ; GFX6-GISEL: ; %bb.0:
939 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
940 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v5, 0
941 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v6, 0x7ff00000
942 ; GFX6-GISEL-NEXT: v_frexp_mant_f64_e32 v[3:4], v[0:1]
943 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f64_e32 v2, v[0:1]
944 ; GFX6-GISEL-NEXT: v_cmp_lt_f64_e64 vcc, |v[0:1]|, v[5:6]
945 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v2, 0, v2, vcc
946 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v3, vcc
947 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v4, vcc
948 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
949 %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)
950 ret { double, i32 } %result
953 define double @test_frexp_f64_i32_only_use_fract(double %a) {
954 ; GFX6-SDAG-LABEL: test_frexp_f64_i32_only_use_fract:
955 ; GFX6-SDAG: ; %bb.0:
956 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
957 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0
958 ; GFX6-SDAG-NEXT: s_mov_b32 s5, 0x7ff00000
959 ; GFX6-SDAG-NEXT: v_frexp_mant_f64_e32 v[2:3], v[0:1]
960 ; GFX6-SDAG-NEXT: v_cmp_lt_f64_e64 vcc, |v[0:1]|, s[4:5]
961 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v2, vcc
962 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v3, vcc
963 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
965 ; GFX8-LABEL: test_frexp_f64_i32_only_use_fract:
967 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
968 ; GFX8-NEXT: v_frexp_mant_f64_e32 v[0:1], v[0:1]
969 ; GFX8-NEXT: s_setpc_b64 s[30:31]
971 ; GFX9-LABEL: test_frexp_f64_i32_only_use_fract:
973 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
974 ; GFX9-NEXT: v_frexp_mant_f64_e32 v[0:1], v[0:1]
975 ; GFX9-NEXT: s_setpc_b64 s[30:31]
977 ; GFX11-LABEL: test_frexp_f64_i32_only_use_fract:
979 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
980 ; GFX11-NEXT: v_frexp_mant_f64_e32 v[0:1], v[0:1]
981 ; GFX11-NEXT: s_setpc_b64 s[30:31]
983 ; GFX6-GISEL-LABEL: test_frexp_f64_i32_only_use_fract:
984 ; GFX6-GISEL: ; %bb.0:
985 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
986 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v2, 0
987 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v3, 0x7ff00000
988 ; GFX6-GISEL-NEXT: v_frexp_mant_f64_e32 v[4:5], v[0:1]
989 ; GFX6-GISEL-NEXT: v_cmp_lt_f64_e64 vcc, |v[0:1]|, v[2:3]
990 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
991 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
992 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
993 %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)
994 %result.0 = extractvalue { double, i32 } %result, 0
998 define i32 @test_frexp_f64_i32_only_use_exp(double %a) {
999 ; GFX6-SDAG-LABEL: test_frexp_f64_i32_only_use_exp:
1000 ; GFX6-SDAG: ; %bb.0:
1001 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1002 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0
1003 ; GFX6-SDAG-NEXT: s_mov_b32 s5, 0x7ff00000
1004 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f64_e32 v2, v[0:1]
1005 ; GFX6-SDAG-NEXT: v_cmp_lt_f64_e64 vcc, |v[0:1]|, s[4:5]
1006 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, 0, v2, vcc
1007 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
1009 ; GFX8-LABEL: test_frexp_f64_i32_only_use_exp:
1011 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1012 ; GFX8-NEXT: v_frexp_exp_i32_f64_e32 v0, v[0:1]
1013 ; GFX8-NEXT: s_setpc_b64 s[30:31]
1015 ; GFX9-LABEL: test_frexp_f64_i32_only_use_exp:
1017 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1018 ; GFX9-NEXT: v_frexp_exp_i32_f64_e32 v0, v[0:1]
1019 ; GFX9-NEXT: s_setpc_b64 s[30:31]
1021 ; GFX11-LABEL: test_frexp_f64_i32_only_use_exp:
1023 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1024 ; GFX11-NEXT: v_frexp_exp_i32_f64_e32 v0, v[0:1]
1025 ; GFX11-NEXT: s_setpc_b64 s[30:31]
1027 ; GFX6-GISEL-LABEL: test_frexp_f64_i32_only_use_exp:
1028 ; GFX6-GISEL: ; %bb.0:
1029 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1030 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v2, 0
1031 ; GFX6-GISEL-NEXT: v_mov_b32_e32 v3, 0x7ff00000
1032 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f64_e32 v4, v[0:1]
1033 ; GFX6-GISEL-NEXT: v_cmp_lt_f64_e64 vcc, |v[0:1]|, v[2:3]
1034 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, 0, v4, vcc
1035 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
1036 %result = call { double, i32 } @llvm.frexp.f64.i32(double %a)
1037 %result.0 = extractvalue { double, i32 } %result, 1
1041 define { <2 x double>, <2 x i32> } @test_frexp_v2f64_v2i32(<2 x double> %a) {
1042 ; GFX6-SDAG-LABEL: test_frexp_v2f64_v2i32:
1043 ; GFX6-SDAG: ; %bb.0:
1044 ; GFX6-SDAG-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1045 ; GFX6-SDAG-NEXT: s_mov_b32 s4, 0
1046 ; GFX6-SDAG-NEXT: s_mov_b32 s5, 0x7ff00000
1047 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f64_e32 v4, v[0:1]
1048 ; GFX6-SDAG-NEXT: v_cmp_lt_f64_e64 vcc, |v[0:1]|, s[4:5]
1049 ; GFX6-SDAG-NEXT: v_frexp_exp_i32_f64_e32 v5, v[2:3]
1050 ; GFX6-SDAG-NEXT: v_frexp_mant_f64_e32 v[6:7], v[0:1]
1051 ; GFX6-SDAG-NEXT: v_cmp_lt_f64_e64 s[4:5], |v[2:3]|, s[4:5]
1052 ; GFX6-SDAG-NEXT: v_frexp_mant_f64_e32 v[8:9], v[2:3]
1053 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc
1054 ; GFX6-SDAG-NEXT: v_cndmask_b32_e64 v5, 0, v5, s[4:5]
1055 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v0, v0, v6, vcc
1056 ; GFX6-SDAG-NEXT: v_cndmask_b32_e32 v1, v1, v7, vcc
1057 ; GFX6-SDAG-NEXT: v_cndmask_b32_e64 v2, v2, v8, s[4:5]
1058 ; GFX6-SDAG-NEXT: v_cndmask_b32_e64 v3, v3, v9, s[4:5]
1059 ; GFX6-SDAG-NEXT: s_setpc_b64 s[30:31]
1061 ; GFX8-LABEL: test_frexp_v2f64_v2i32:
1063 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1064 ; GFX8-NEXT: v_frexp_mant_f64_e32 v[8:9], v[0:1]
1065 ; GFX8-NEXT: v_frexp_mant_f64_e32 v[6:7], v[2:3]
1066 ; GFX8-NEXT: v_frexp_exp_i32_f64_e32 v4, v[0:1]
1067 ; GFX8-NEXT: v_frexp_exp_i32_f64_e32 v5, v[2:3]
1068 ; GFX8-NEXT: v_mov_b32_e32 v0, v8
1069 ; GFX8-NEXT: v_mov_b32_e32 v1, v9
1070 ; GFX8-NEXT: v_mov_b32_e32 v2, v6
1071 ; GFX8-NEXT: v_mov_b32_e32 v3, v7
1072 ; GFX8-NEXT: s_setpc_b64 s[30:31]
1074 ; GFX9-LABEL: test_frexp_v2f64_v2i32:
1076 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1077 ; GFX9-NEXT: v_frexp_mant_f64_e32 v[8:9], v[0:1]
1078 ; GFX9-NEXT: v_frexp_mant_f64_e32 v[6:7], v[2:3]
1079 ; GFX9-NEXT: v_frexp_exp_i32_f64_e32 v4, v[0:1]
1080 ; GFX9-NEXT: v_frexp_exp_i32_f64_e32 v5, v[2:3]
1081 ; GFX9-NEXT: v_mov_b32_e32 v0, v8
1082 ; GFX9-NEXT: v_mov_b32_e32 v1, v9
1083 ; GFX9-NEXT: v_mov_b32_e32 v2, v6
1084 ; GFX9-NEXT: v_mov_b32_e32 v3, v7
1085 ; GFX9-NEXT: s_setpc_b64 s[30:31]
1087 ; GFX11-LABEL: test_frexp_v2f64_v2i32:
1089 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1090 ; GFX11-NEXT: v_frexp_mant_f64_e32 v[8:9], v[0:1]
1091 ; GFX11-NEXT: v_frexp_mant_f64_e32 v[6:7], v[2:3]
1092 ; GFX11-NEXT: v_frexp_exp_i32_f64_e32 v4, v[0:1]
1093 ; GFX11-NEXT: v_frexp_exp_i32_f64_e32 v5, v[2:3]
1094 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_4) | instskip(NEXT) | instid1(VALU_DEP_4)
1095 ; GFX11-NEXT: v_dual_mov_b32 v0, v8 :: v_dual_mov_b32 v1, v9
1096 ; GFX11-NEXT: v_dual_mov_b32 v2, v6 :: v_dual_mov_b32 v3, v7
1097 ; GFX11-NEXT: s_setpc_b64 s[30:31]
1099 ; GFX6-GISEL-LABEL: test_frexp_v2f64_v2i32:
1100 ; GFX6-GISEL: ; %bb.0:
1101 ; GFX6-GISEL-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1102 ; GFX6-GISEL-NEXT: s_mov_b32 s4, 0
1103 ; GFX6-GISEL-NEXT: s_mov_b32 s5, 0x7ff00000
1104 ; GFX6-GISEL-NEXT: v_frexp_mant_f64_e32 v[5:6], v[0:1]
1105 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f64_e32 v4, v[0:1]
1106 ; GFX6-GISEL-NEXT: v_cmp_lt_f64_e64 vcc, |v[0:1]|, s[4:5]
1107 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v4, 0, v4, vcc
1108 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v0, v0, v5, vcc
1109 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v1, v1, v6, vcc
1110 ; GFX6-GISEL-NEXT: v_frexp_mant_f64_e32 v[6:7], v[2:3]
1111 ; GFX6-GISEL-NEXT: v_frexp_exp_i32_f64_e32 v5, v[2:3]
1112 ; GFX6-GISEL-NEXT: v_cmp_lt_f64_e64 vcc, |v[2:3]|, s[4:5]
1113 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v5, 0, v5, vcc
1114 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v2, v2, v6, vcc
1115 ; GFX6-GISEL-NEXT: v_cndmask_b32_e32 v3, v3, v7, vcc
1116 ; GFX6-GISEL-NEXT: s_setpc_b64 s[30:31]
1117 %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)
1118 ret { <2 x double>, <2 x i32> } %result
1121 define <2 x double> @test_frexp_v2f64_v2i32_only_use_fract(<2 x double> %a) {
1122 ; GFX6-LABEL: test_frexp_v2f64_v2i32_only_use_fract:
1124 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1125 ; GFX6-NEXT: s_mov_b32 s4, 0
1126 ; GFX6-NEXT: s_mov_b32 s5, 0x7ff00000
1127 ; GFX6-NEXT: v_frexp_mant_f64_e32 v[4:5], v[0:1]
1128 ; GFX6-NEXT: v_cmp_lt_f64_e64 vcc, |v[0:1]|, s[4:5]
1129 ; GFX6-NEXT: v_cndmask_b32_e32 v0, v0, v4, vcc
1130 ; GFX6-NEXT: v_cndmask_b32_e32 v1, v1, v5, vcc
1131 ; GFX6-NEXT: v_frexp_mant_f64_e32 v[4:5], v[2:3]
1132 ; GFX6-NEXT: v_cmp_lt_f64_e64 vcc, |v[2:3]|, s[4:5]
1133 ; GFX6-NEXT: v_cndmask_b32_e32 v2, v2, v4, vcc
1134 ; GFX6-NEXT: v_cndmask_b32_e32 v3, v3, v5, vcc
1135 ; GFX6-NEXT: s_setpc_b64 s[30:31]
1137 ; GFX8-LABEL: test_frexp_v2f64_v2i32_only_use_fract:
1139 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1140 ; GFX8-NEXT: v_frexp_mant_f64_e32 v[0:1], v[0:1]
1141 ; GFX8-NEXT: v_frexp_mant_f64_e32 v[2:3], v[2:3]
1142 ; GFX8-NEXT: s_setpc_b64 s[30:31]
1144 ; GFX9-LABEL: test_frexp_v2f64_v2i32_only_use_fract:
1146 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1147 ; GFX9-NEXT: v_frexp_mant_f64_e32 v[0:1], v[0:1]
1148 ; GFX9-NEXT: v_frexp_mant_f64_e32 v[2:3], v[2:3]
1149 ; GFX9-NEXT: s_setpc_b64 s[30:31]
1151 ; GFX11-LABEL: test_frexp_v2f64_v2i32_only_use_fract:
1153 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1154 ; GFX11-NEXT: v_frexp_mant_f64_e32 v[0:1], v[0:1]
1155 ; GFX11-NEXT: v_frexp_mant_f64_e32 v[2:3], v[2:3]
1156 ; GFX11-NEXT: s_setpc_b64 s[30:31]
1157 %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)
1158 %result.0 = extractvalue { <2 x double>, <2 x i32> } %result, 0
1159 ret <2 x double> %result.0
1162 define <2 x i32> @test_frexp_v2f64_v2i32_only_use_exp(<2 x double> %a) {
1163 ; GFX6-LABEL: test_frexp_v2f64_v2i32_only_use_exp:
1165 ; GFX6-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1166 ; GFX6-NEXT: s_mov_b32 s4, 0
1167 ; GFX6-NEXT: s_mov_b32 s5, 0x7ff00000
1168 ; GFX6-NEXT: v_frexp_exp_i32_f64_e32 v4, v[0:1]
1169 ; GFX6-NEXT: v_cmp_lt_f64_e64 vcc, |v[0:1]|, s[4:5]
1170 ; GFX6-NEXT: v_frexp_exp_i32_f64_e32 v1, v[2:3]
1171 ; GFX6-NEXT: v_cndmask_b32_e32 v0, 0, v4, vcc
1172 ; GFX6-NEXT: v_cmp_lt_f64_e64 vcc, |v[2:3]|, s[4:5]
1173 ; GFX6-NEXT: v_cndmask_b32_e32 v1, 0, v1, vcc
1174 ; GFX6-NEXT: s_setpc_b64 s[30:31]
1176 ; GFX8-LABEL: test_frexp_v2f64_v2i32_only_use_exp:
1178 ; GFX8-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1179 ; GFX8-NEXT: v_frexp_exp_i32_f64_e32 v0, v[0:1]
1180 ; GFX8-NEXT: v_frexp_exp_i32_f64_e32 v1, v[2:3]
1181 ; GFX8-NEXT: s_setpc_b64 s[30:31]
1183 ; GFX9-LABEL: test_frexp_v2f64_v2i32_only_use_exp:
1185 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1186 ; GFX9-NEXT: v_frexp_exp_i32_f64_e32 v0, v[0:1]
1187 ; GFX9-NEXT: v_frexp_exp_i32_f64_e32 v1, v[2:3]
1188 ; GFX9-NEXT: s_setpc_b64 s[30:31]
1190 ; GFX11-LABEL: test_frexp_v2f64_v2i32_only_use_exp:
1192 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
1193 ; GFX11-NEXT: v_frexp_exp_i32_f64_e32 v0, v[0:1]
1194 ; GFX11-NEXT: v_frexp_exp_i32_f64_e32 v1, v[2:3]
1195 ; GFX11-NEXT: s_setpc_b64 s[30:31]
1196 %result = call { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double> %a)
1197 %result.1 = extractvalue { <2 x double>, <2 x i32> } %result, 1
1198 ret <2 x i32> %result.1
1201 declare { float, i32 } @llvm.frexp.f32.i32(float) #0
1202 declare { <2 x float>, <2 x i32> } @llvm.frexp.v2f32.v2i32(<2 x float>) #0
1204 declare { half, i32 } @llvm.frexp.f16.i32(half) #0
1205 declare { <2 x half>, <2 x i32> } @llvm.frexp.v2f16.v2i32(<2 x half>) #0
1207 declare { double, i32 } @llvm.frexp.f64.i32(double) #0
1208 declare { <2 x double>, <2 x i32> } @llvm.frexp.v2f64.v2i32(<2 x double>) #0
1210 declare { half, i16 } @llvm.frexp.f16.i16(half) #0
1211 declare { <2 x half>, <2 x i16> } @llvm.frexp.v2f16.v2i16(<2 x half>) #0
1213 attributes #0 = { nocallback nofree nosync nounwind speculatable willreturn memory(none) }
1214 ;; NOTE: These prefixes are unused and the list is autogenerated. Do not add tests below this line:
1216 ; GFX11-GISEL: {{.*}}
1217 ; GFX11-SDAG: {{.*}}