| blob | 87913841012184c12eb1d7691f0bfb2b4b221bc9 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py UTC_ARGS: --version 2
2 ; RUN: llc -mtriple=amdgcn -verify-machineinstrs < %s | FileCheck -check-prefix=GFX6-NOHSA %s
3 ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=kaveri -verify-machineinstrs < %s | FileCheck -check-prefix=GFX7-HSA %s
4 ; RUN: llc -mtriple=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=GFX8-NOHSA %s
5 ; RUN: llc -march=r600 -mcpu=redwood < %s | FileCheck -check-prefix=EG %s
6 ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9-HSA %s
7 ; RUN: llc -mtriple=amdgcn--amdhsa -mcpu=gfx908 -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9-HSA %s
9 define amdgpu_kernel void @constant_load_i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
10 ; GFX6-NOHSA-LABEL: constant_load_i32:
11 ; GFX6-NOHSA: ; %bb.0: ; %entry
12 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
13 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
14 ; GFX6-NOHSA-NEXT: s_load_dword s4, s[2:3], 0x0
15 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
16 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
17 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
18 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
19 ; GFX6-NOHSA-NEXT: buffer_store_dword v0, off, s[0:3], 0
20 ; GFX6-NOHSA-NEXT: s_endpgm
21 ;
22 ; GFX7-HSA-LABEL: constant_load_i32:
23 ; GFX7-HSA: ; %bb.0: ; %entry
24 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
25 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
26 ; GFX7-HSA-NEXT: s_load_dword s2, s[2:3], 0x0
27 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
28 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
29 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
30 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
31 ; GFX7-HSA-NEXT: flat_store_dword v[0:1], v2
32 ; GFX7-HSA-NEXT: s_endpgm
33 ;
34 ; GFX8-NOHSA-LABEL: constant_load_i32:
35 ; GFX8-NOHSA: ; %bb.0: ; %entry
36 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
37 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
38 ; GFX8-NOHSA-NEXT: s_load_dword s2, s[2:3], 0x0
39 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
40 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
41 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
42 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
43 ; GFX8-NOHSA-NEXT: flat_store_dword v[0:1], v2
44 ; GFX8-NOHSA-NEXT: s_endpgm
45 ;
46 ; EG-LABEL: constant_load_i32:
47 ; EG: ; %bb.0: ; %entry
48 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
49 ; EG-NEXT: TEX 0 @6
50 ; EG-NEXT: ALU 1, @9, KC0[CB0:0-32], KC1[]
51 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T1.X, 1
52 ; EG-NEXT: CF_END
53 ; EG-NEXT: PAD
54 ; EG-NEXT: Fetch clause starting at 6:
55 ; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #1
56 ; EG-NEXT: ALU clause starting at 8:
57 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
58 ; EG-NEXT: ALU clause starting at 9:
59 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
60 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
61 ;
62 ; GFX9-HSA-LABEL: constant_load_i32:
63 ; GFX9-HSA: ; %bb.0: ; %entry
64 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
65 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, 0
66 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
67 ; GFX9-HSA-NEXT: s_load_dword s2, s[2:3], 0x0
68 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
69 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s2
70 ; GFX9-HSA-NEXT: global_store_dword v0, v1, s[0:1]
71 ; GFX9-HSA-NEXT: s_endpgm
72 entry:
73 %ld = load i32, ptr addrspace(4) %in
74 store i32 %ld, ptr addrspace(1) %out
75 ret void
76 }
78 define amdgpu_kernel void @constant_load_v2i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
79 ; GFX6-NOHSA-LABEL: constant_load_v2i32:
80 ; GFX6-NOHSA: ; %bb.0: ; %entry
81 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
82 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
83 ; GFX6-NOHSA-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0
84 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
85 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
86 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
87 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
88 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
89 ; GFX6-NOHSA-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
90 ; GFX6-NOHSA-NEXT: s_endpgm
91 ;
92 ; GFX7-HSA-LABEL: constant_load_v2i32:
93 ; GFX7-HSA: ; %bb.0: ; %entry
94 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
95 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
96 ; GFX7-HSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
97 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
98 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
99 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
100 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
101 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s3
102 ; GFX7-HSA-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
103 ; GFX7-HSA-NEXT: s_endpgm
104 ;
105 ; GFX8-NOHSA-LABEL: constant_load_v2i32:
106 ; GFX8-NOHSA: ; %bb.0: ; %entry
107 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
108 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
109 ; GFX8-NOHSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
110 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
111 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
112 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
113 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
114 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s3
115 ; GFX8-NOHSA-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
116 ; GFX8-NOHSA-NEXT: s_endpgm
117 ;
118 ; EG-LABEL: constant_load_v2i32:
119 ; EG: ; %bb.0: ; %entry
120 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
121 ; EG-NEXT: TEX 0 @6
122 ; EG-NEXT: ALU 1, @9, KC0[CB0:0-32], KC1[]
123 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
124 ; EG-NEXT: CF_END
125 ; EG-NEXT: PAD
126 ; EG-NEXT: Fetch clause starting at 6:
127 ; EG-NEXT: VTX_READ_64 T0.XY, T0.X, 0, #1
128 ; EG-NEXT: ALU clause starting at 8:
129 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
130 ; EG-NEXT: ALU clause starting at 9:
131 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
132 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
133 ;
134 ; GFX9-HSA-LABEL: constant_load_v2i32:
135 ; GFX9-HSA: ; %bb.0: ; %entry
136 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
137 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, 0
138 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
139 ; GFX9-HSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
140 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
141 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
142 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s3
143 ; GFX9-HSA-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
144 ; GFX9-HSA-NEXT: s_endpgm
145 entry:
146 %ld = load <2 x i32>, ptr addrspace(4) %in
147 store <2 x i32> %ld, ptr addrspace(1) %out
148 ret void
149 }
151 define amdgpu_kernel void @constant_load_v3i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
152 ; GFX6-NOHSA-LABEL: constant_load_v3i32:
153 ; GFX6-NOHSA: ; %bb.0: ; %entry
154 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
155 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
156 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
157 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
158 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
159 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
160 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6
161 ; GFX6-NOHSA-NEXT: buffer_store_dword v0, off, s[0:3], 0 offset:8
162 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
163 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
164 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
165 ; GFX6-NOHSA-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
166 ; GFX6-NOHSA-NEXT: s_endpgm
167 ;
168 ; GFX7-HSA-LABEL: constant_load_v3i32:
169 ; GFX7-HSA: ; %bb.0: ; %entry
170 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
171 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
172 ; GFX7-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
173 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s0
174 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s1
175 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
176 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
177 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5
178 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6
179 ; GFX7-HSA-NEXT: flat_store_dwordx3 v[3:4], v[0:2]
180 ; GFX7-HSA-NEXT: s_endpgm
181 ;
182 ; GFX8-NOHSA-LABEL: constant_load_v3i32:
183 ; GFX8-NOHSA: ; %bb.0: ; %entry
184 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
185 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
186 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
187 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s0
188 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s1
189 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
190 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
191 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s5
192 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s6
193 ; GFX8-NOHSA-NEXT: flat_store_dwordx3 v[3:4], v[0:2]
194 ; GFX8-NOHSA-NEXT: s_endpgm
195 ;
196 ; EG-LABEL: constant_load_v3i32:
197 ; EG: ; %bb.0: ; %entry
198 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
199 ; EG-NEXT: TEX 0 @6
200 ; EG-NEXT: ALU 6, @9, KC0[CB0:0-32], KC1[]
201 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.X, T3.X, 0
202 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
203 ; EG-NEXT: CF_END
204 ; EG-NEXT: Fetch clause starting at 6:
205 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
206 ; EG-NEXT: ALU clause starting at 8:
207 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
208 ; EG-NEXT: ALU clause starting at 9:
209 ; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,
210 ; EG-NEXT: MOV * T2.X, T0.Z,
211 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
212 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
213 ; EG-NEXT: 8(1.121039e-44), 0(0.000000e+00)
214 ; EG-NEXT: LSHR * T3.X, PV.W, literal.x,
215 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
216 ;
217 ; GFX9-HSA-LABEL: constant_load_v3i32:
218 ; GFX9-HSA: ; %bb.0: ; %entry
219 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
220 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, 0
221 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
222 ; GFX9-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
223 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
224 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
225 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s5
226 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s6
227 ; GFX9-HSA-NEXT: global_store_dwordx3 v3, v[0:2], s[0:1]
228 ; GFX9-HSA-NEXT: s_endpgm
229 entry:
230 %ld = load <3 x i32>, ptr addrspace(4) %in
231 store <3 x i32> %ld, ptr addrspace(1) %out
232 ret void
233 }
235 define amdgpu_kernel void @constant_load_v4i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
236 ; GFX6-NOHSA-LABEL: constant_load_v4i32:
237 ; GFX6-NOHSA: ; %bb.0: ; %entry
238 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
239 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
240 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
241 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
242 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
243 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
244 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
245 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
246 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s6
247 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s7
248 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
249 ; GFX6-NOHSA-NEXT: s_endpgm
250 ;
251 ; GFX7-HSA-LABEL: constant_load_v4i32:
252 ; GFX7-HSA: ; %bb.0: ; %entry
253 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
254 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
255 ; GFX7-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
256 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0
257 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1
258 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
259 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
260 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5
261 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6
262 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s7
263 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
264 ; GFX7-HSA-NEXT: s_endpgm
265 ;
266 ; GFX8-NOHSA-LABEL: constant_load_v4i32:
267 ; GFX8-NOHSA: ; %bb.0: ; %entry
268 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
269 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
270 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
271 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s0
272 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s1
273 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
274 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
275 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s5
276 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s6
277 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s7
278 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
279 ; GFX8-NOHSA-NEXT: s_endpgm
280 ;
281 ; EG-LABEL: constant_load_v4i32:
282 ; EG: ; %bb.0: ; %entry
283 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
284 ; EG-NEXT: TEX 0 @6
285 ; EG-NEXT: ALU 1, @9, KC0[CB0:0-32], KC1[]
286 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T1.X, 1
287 ; EG-NEXT: CF_END
288 ; EG-NEXT: PAD
289 ; EG-NEXT: Fetch clause starting at 6:
290 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
291 ; EG-NEXT: ALU clause starting at 8:
292 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
293 ; EG-NEXT: ALU clause starting at 9:
294 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
295 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
296 ;
297 ; GFX9-HSA-LABEL: constant_load_v4i32:
298 ; GFX9-HSA: ; %bb.0: ; %entry
299 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
300 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, 0
301 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
302 ; GFX9-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
303 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
304 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
305 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s5
306 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s6
307 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s7
308 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
309 ; GFX9-HSA-NEXT: s_endpgm
310 entry:
311 %ld = load <4 x i32>, ptr addrspace(4) %in
312 store <4 x i32> %ld, ptr addrspace(1) %out
313 ret void
314 }
316 define amdgpu_kernel void @constant_load_v8i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
317 ; GFX6-NOHSA-LABEL: constant_load_v8i32:
318 ; GFX6-NOHSA: ; %bb.0: ; %entry
319 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
320 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
321 ; GFX6-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
322 ; GFX6-NOHSA-NEXT: s_mov_b32 s11, 0xf000
323 ; GFX6-NOHSA-NEXT: s_mov_b32 s10, -1
324 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
325 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
326 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
327 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s6
328 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s7
329 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:16
330 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
331 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
332 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s1
333 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s2
334 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s3
335 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
336 ; GFX6-NOHSA-NEXT: s_endpgm
337 ;
338 ; GFX7-HSA-LABEL: constant_load_v8i32:
339 ; GFX7-HSA: ; %bb.0: ; %entry
340 ; GFX7-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
341 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
342 ; GFX7-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
343 ; GFX7-HSA-NEXT: s_add_u32 s10, s8, 16
344 ; GFX7-HSA-NEXT: s_addc_u32 s11, s9, 0
345 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s10
346 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s11
347 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
348 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
349 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5
350 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6
351 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s7
352 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3]
353 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0
354 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
355 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1
356 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s2
357 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s3
358 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s9
359 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
360 ; GFX7-HSA-NEXT: s_endpgm
361 ;
362 ; GFX8-NOHSA-LABEL: constant_load_v8i32:
363 ; GFX8-NOHSA: ; %bb.0: ; %entry
364 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x24
365 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
366 ; GFX8-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
367 ; GFX8-NOHSA-NEXT: s_add_u32 s10, s8, 16
368 ; GFX8-NOHSA-NEXT: s_addc_u32 s11, s9, 0
369 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s10
370 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v7, s11
371 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
372 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
373 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s5
374 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s6
375 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s7
376 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3]
377 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s0
378 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s8
379 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s1
380 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s2
381 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v7, s3
382 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s9
383 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
384 ; GFX8-NOHSA-NEXT: s_endpgm
385 ;
386 ; EG-LABEL: constant_load_v8i32:
387 ; EG: ; %bb.0: ; %entry
388 ; EG-NEXT: ALU 0, @10, KC0[CB0:0-32], KC1[]
389 ; EG-NEXT: TEX 1 @6
390 ; EG-NEXT: ALU 4, @11, KC0[CB0:0-32], KC1[]
391 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T3.X, 0
392 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T2.X, 1
393 ; EG-NEXT: CF_END
394 ; EG-NEXT: Fetch clause starting at 6:
395 ; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #1
396 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
397 ; EG-NEXT: ALU clause starting at 10:
398 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
399 ; EG-NEXT: ALU clause starting at 11:
400 ; EG-NEXT: LSHR T2.X, KC0[2].Y, literal.x,
401 ; EG-NEXT: ADD_INT * T2.W, KC0[2].Y, literal.y,
402 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
403 ; EG-NEXT: LSHR * T3.X, PV.W, literal.x,
404 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
405 ;
406 ; GFX9-HSA-LABEL: constant_load_v8i32:
407 ; GFX9-HSA: ; %bb.0: ; %entry
408 ; GFX9-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
409 ; GFX9-HSA-NEXT: v_mov_b32_e32 v8, 0
410 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
411 ; GFX9-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
412 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
413 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
414 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s5
415 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s6
416 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s7
417 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s0
418 ; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s1
419 ; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s2
420 ; GFX9-HSA-NEXT: v_mov_b32_e32 v7, s3
421 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[8:9] offset:16
422 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[4:7], s[8:9]
423 ; GFX9-HSA-NEXT: s_endpgm
424 entry:
425 %ld = load <8 x i32>, ptr addrspace(4) %in
426 store <8 x i32> %ld, ptr addrspace(1) %out
427 ret void
428 }
430 define amdgpu_kernel void @constant_load_v9i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
431 ; GFX6-NOHSA-LABEL: constant_load_v9i32:
432 ; GFX6-NOHSA: ; %bb.0: ; %entry
433 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
434 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
435 ; GFX6-NOHSA-NEXT: s_load_dword s12, s[10:11], 0x8
436 ; GFX6-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
437 ; GFX6-NOHSA-NEXT: s_mov_b32 s11, 0xf000
438 ; GFX6-NOHSA-NEXT: s_mov_b32 s10, -1
439 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
440 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12
441 ; GFX6-NOHSA-NEXT: buffer_store_dword v0, off, s[8:11], 0 offset:32
442 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
443 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
444 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
445 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s6
446 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s7
447 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:16
448 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
449 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
450 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s1
451 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s2
452 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s3
453 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
454 ; GFX6-NOHSA-NEXT: s_endpgm
455 ;
456 ; GFX7-HSA-LABEL: constant_load_v9i32:
457 ; GFX7-HSA: ; %bb.0: ; %entry
458 ; GFX7-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
459 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
460 ; GFX7-HSA-NEXT: s_load_dword s12, s[10:11], 0x8
461 ; GFX7-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
462 ; GFX7-HSA-NEXT: s_add_u32 s10, s8, 32
463 ; GFX7-HSA-NEXT: s_addc_u32 s11, s9, 0
464 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10
465 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11
466 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
467 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s12
468 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
469 ; GFX7-HSA-NEXT: s_add_u32 s4, s8, 16
470 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5
471 ; GFX7-HSA-NEXT: flat_store_dword v[4:5], v6
472 ; GFX7-HSA-NEXT: s_addc_u32 s5, s9, 0
473 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
474 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6
475 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s7
476 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
477 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
478 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8
479 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
480 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
481 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
482 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s3
483 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
484 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
485 ; GFX7-HSA-NEXT: s_endpgm
486 ;
487 ; GFX8-NOHSA-LABEL: constant_load_v9i32:
488 ; GFX8-NOHSA: ; %bb.0: ; %entry
489 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x24
490 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
491 ; GFX8-NOHSA-NEXT: s_load_dword s12, s[10:11], 0x20
492 ; GFX8-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
493 ; GFX8-NOHSA-NEXT: s_add_u32 s10, s8, 32
494 ; GFX8-NOHSA-NEXT: s_addc_u32 s11, s9, 0
495 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s10
496 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s11
497 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
498 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s12
499 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
500 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s8, 16
501 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s5
502 ; GFX8-NOHSA-NEXT: flat_store_dword v[4:5], v6
503 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s9, 0
504 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
505 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s6
506 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s7
507 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
508 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
509 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
510 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
511 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
512 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
513 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s3
514 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
515 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
516 ; GFX8-NOHSA-NEXT: s_endpgm
517 ;
518 ; EG-LABEL: constant_load_v9i32:
519 ; EG: ; %bb.0: ; %entry
520 ; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]
521 ; EG-NEXT: TEX 2 @8
522 ; EG-NEXT: ALU 7, @15, KC0[CB0:0-32], KC1[]
523 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.X, T5.X, 0
524 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T4.X, 0
525 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T3.X, 1
526 ; EG-NEXT: CF_END
527 ; EG-NEXT: PAD
528 ; EG-NEXT: Fetch clause starting at 8:
529 ; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #1
530 ; EG-NEXT: VTX_READ_128 T2.XYZW, T0.X, 0, #1
531 ; EG-NEXT: VTX_READ_32 T0.X, T0.X, 32, #1
532 ; EG-NEXT: ALU clause starting at 14:
533 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
534 ; EG-NEXT: ALU clause starting at 15:
535 ; EG-NEXT: LSHR T3.X, KC0[2].Y, literal.x,
536 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
537 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
538 ; EG-NEXT: LSHR T4.X, PV.W, literal.x,
539 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
540 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
541 ; EG-NEXT: LSHR * T5.X, PV.W, literal.x,
542 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
543 ;
544 ; GFX9-HSA-LABEL: constant_load_v9i32:
545 ; GFX9-HSA: ; %bb.0: ; %entry
546 ; GFX9-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
547 ; GFX9-HSA-NEXT: v_mov_b32_e32 v8, 0
548 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
549 ; GFX9-HSA-NEXT: s_load_dword s12, s[10:11], 0x20
550 ; GFX9-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
551 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
552 ; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s12
553 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
554 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s5
555 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s6
556 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s7
557 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s0
558 ; GFX9-HSA-NEXT: global_store_dword v8, v5, s[8:9] offset:32
559 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[8:9] offset:16
560 ; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s1
561 ; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s2
562 ; GFX9-HSA-NEXT: v_mov_b32_e32 v7, s3
563 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[4:7], s[8:9]
564 ; GFX9-HSA-NEXT: s_endpgm
565 entry:
566 %ld = load <9 x i32>, ptr addrspace(4) %in
567 store <9 x i32> %ld, ptr addrspace(1) %out
568 ret void
569 }
571 define amdgpu_kernel void @constant_load_v10i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
572 ; GFX6-NOHSA-LABEL: constant_load_v10i32:
573 ; GFX6-NOHSA: ; %bb.0: ; %entry
574 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
575 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
576 ; GFX6-NOHSA-NEXT: s_load_dwordx2 s[12:13], s[10:11], 0x8
577 ; GFX6-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
578 ; GFX6-NOHSA-NEXT: s_mov_b32 s11, 0xf000
579 ; GFX6-NOHSA-NEXT: s_mov_b32 s10, -1
580 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
581 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12
582 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s13
583 ; GFX6-NOHSA-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0 offset:32
584 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
585 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
586 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
587 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s6
588 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s7
589 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:16
590 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
591 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
592 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s1
593 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s2
594 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s3
595 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
596 ; GFX6-NOHSA-NEXT: s_endpgm
597 ;
598 ; GFX7-HSA-LABEL: constant_load_v10i32:
599 ; GFX7-HSA: ; %bb.0: ; %entry
600 ; GFX7-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
601 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
602 ; GFX7-HSA-NEXT: s_load_dwordx2 s[12:13], s[10:11], 0x8
603 ; GFX7-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
604 ; GFX7-HSA-NEXT: s_add_u32 s10, s8, 32
605 ; GFX7-HSA-NEXT: s_addc_u32 s11, s9, 0
606 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10
607 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
608 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s12
609 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11
610 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s13
611 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
612 ; GFX7-HSA-NEXT: s_add_u32 s4, s8, 16
613 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5
614 ; GFX7-HSA-NEXT: flat_store_dwordx2 v[4:5], v[6:7]
615 ; GFX7-HSA-NEXT: s_addc_u32 s5, s9, 0
616 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
617 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6
618 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s7
619 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
620 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
621 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8
622 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
623 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
624 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
625 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s3
626 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
627 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
628 ; GFX7-HSA-NEXT: s_endpgm
629 ;
630 ; GFX8-NOHSA-LABEL: constant_load_v10i32:
631 ; GFX8-NOHSA: ; %bb.0: ; %entry
632 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x24
633 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
634 ; GFX8-NOHSA-NEXT: s_load_dwordx2 s[12:13], s[10:11], 0x20
635 ; GFX8-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
636 ; GFX8-NOHSA-NEXT: s_add_u32 s10, s8, 32
637 ; GFX8-NOHSA-NEXT: s_addc_u32 s11, s9, 0
638 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s10
639 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
640 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s12
641 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s11
642 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v7, s13
643 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
644 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s8, 16
645 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s5
646 ; GFX8-NOHSA-NEXT: flat_store_dwordx2 v[4:5], v[6:7]
647 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s9, 0
648 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
649 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s6
650 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s7
651 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
652 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
653 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
654 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
655 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
656 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
657 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s3
658 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
659 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
660 ; GFX8-NOHSA-NEXT: s_endpgm
661 ;
662 ; EG-LABEL: constant_load_v10i32:
663 ; EG: ; %bb.0: ; %entry
664 ; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]
665 ; EG-NEXT: TEX 2 @8
666 ; EG-NEXT: ALU 8, @15, KC0[CB0:0-32], KC1[]
667 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T5.X, 0
668 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T4.X, 0
669 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T3.X, 1
670 ; EG-NEXT: CF_END
671 ; EG-NEXT: PAD
672 ; EG-NEXT: Fetch clause starting at 8:
673 ; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #1
674 ; EG-NEXT: VTX_READ_128 T2.XYZW, T0.X, 0, #1
675 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 32, #1
676 ; EG-NEXT: ALU clause starting at 14:
677 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
678 ; EG-NEXT: ALU clause starting at 15:
679 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
680 ; EG-NEXT: 32(4.484155e-44), 0(0.000000e+00)
681 ; EG-NEXT: LSHR T3.X, PV.W, literal.x,
682 ; EG-NEXT: LSHR * T4.X, KC0[2].Y, literal.x,
683 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
684 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
685 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
686 ; EG-NEXT: LSHR * T5.X, PV.W, literal.x,
687 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
688 ;
689 ; GFX9-HSA-LABEL: constant_load_v10i32:
690 ; GFX9-HSA: ; %bb.0: ; %entry
691 ; GFX9-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
692 ; GFX9-HSA-NEXT: v_mov_b32_e32 v8, 0
693 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
694 ; GFX9-HSA-NEXT: s_load_dwordx2 s[12:13], s[10:11], 0x20
695 ; GFX9-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
696 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
697 ; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s12
698 ; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s13
699 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
700 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s5
701 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s6
702 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s7
703 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s0
704 ; GFX9-HSA-NEXT: global_store_dwordx2 v8, v[5:6], s[8:9] offset:32
705 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[8:9] offset:16
706 ; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s1
707 ; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s2
708 ; GFX9-HSA-NEXT: v_mov_b32_e32 v7, s3
709 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[4:7], s[8:9]
710 ; GFX9-HSA-NEXT: s_endpgm
711 entry:
712 %ld = load <10 x i32>, ptr addrspace(4) %in
713 store <10 x i32> %ld, ptr addrspace(1) %out
714 ret void
715 }
717 define amdgpu_kernel void @constant_load_v11i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
718 ; GFX6-NOHSA-LABEL: constant_load_v11i32:
719 ; GFX6-NOHSA: ; %bb.0: ; %entry
720 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
721 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
722 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[12:15], s[10:11], 0x8
723 ; GFX6-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
724 ; GFX6-NOHSA-NEXT: s_mov_b32 s11, 0xf000
725 ; GFX6-NOHSA-NEXT: s_mov_b32 s10, -1
726 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
727 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s14
728 ; GFX6-NOHSA-NEXT: buffer_store_dword v0, off, s[8:11], 0 offset:40
729 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
730 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12
731 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s13
732 ; GFX6-NOHSA-NEXT: buffer_store_dwordx2 v[0:1], off, s[8:11], 0 offset:32
733 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
734 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
735 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
736 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s6
737 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s7
738 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:16
739 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
740 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
741 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s1
742 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s2
743 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s3
744 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
745 ; GFX6-NOHSA-NEXT: s_endpgm
746 ;
747 ; GFX7-HSA-LABEL: constant_load_v11i32:
748 ; GFX7-HSA: ; %bb.0: ; %entry
749 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
750 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
751 ; GFX7-HSA-NEXT: s_load_dwordx4 s[12:15], s[2:3], 0x8
752 ; GFX7-HSA-NEXT: s_load_dwordx8 s[4:11], s[2:3], 0x0
753 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 16
754 ; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0
755 ; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s3
756 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s2
757 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
758 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
759 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s9
760 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s10
761 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s11
762 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[7:8], v[0:3]
763 ; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s1
764 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
765 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5
766 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6
767 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s7
768 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s0
769 ; GFX7-HSA-NEXT: s_add_u32 s0, s0, 32
770 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[7:8], v[0:3]
771 ; GFX7-HSA-NEXT: s_addc_u32 s1, s1, 0
772 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
773 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12
774 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13
775 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s14
776 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
777 ; GFX7-HSA-NEXT: flat_store_dwordx3 v[0:1], v[4:6]
778 ; GFX7-HSA-NEXT: s_endpgm
779 ;
780 ; GFX8-NOHSA-LABEL: constant_load_v11i32:
781 ; GFX8-NOHSA: ; %bb.0: ; %entry
782 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
783 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
784 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[12:15], s[2:3], 0x20
785 ; GFX8-NOHSA-NEXT: s_load_dwordx8 s[4:11], s[2:3], 0x0
786 ; GFX8-NOHSA-NEXT: s_add_u32 s2, s0, 16
787 ; GFX8-NOHSA-NEXT: s_addc_u32 s3, s1, 0
788 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v8, s3
789 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v7, s2
790 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
791 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s8
792 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s9
793 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s10
794 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s11
795 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[7:8], v[0:3]
796 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v8, s1
797 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
798 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s5
799 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s6
800 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s7
801 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v7, s0
802 ; GFX8-NOHSA-NEXT: s_add_u32 s0, s0, 32
803 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[7:8], v[0:3]
804 ; GFX8-NOHSA-NEXT: s_addc_u32 s1, s1, 0
805 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
806 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s12
807 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s13
808 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s14
809 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
810 ; GFX8-NOHSA-NEXT: flat_store_dwordx3 v[0:1], v[4:6]
811 ; GFX8-NOHSA-NEXT: s_endpgm
812 ;
813 ; EG-LABEL: constant_load_v11i32:
814 ; EG: ; %bb.0: ; %entry
815 ; EG-NEXT: ALU 0, @14, KC0[CB0:0-32], KC1[]
816 ; EG-NEXT: TEX 2 @8
817 ; EG-NEXT: ALU 13, @15, KC0[CB0:0-32], KC1[]
818 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T7.X, 0
819 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T6.X, 0
820 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T4.X, T5.X, 0
821 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T3.X, 1
822 ; EG-NEXT: CF_END
823 ; EG-NEXT: Fetch clause starting at 8:
824 ; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #1
825 ; EG-NEXT: VTX_READ_128 T2.XYZW, T0.X, 0, #1
826 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 32, #1
827 ; EG-NEXT: ALU clause starting at 14:
828 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
829 ; EG-NEXT: ALU clause starting at 15:
830 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
831 ; EG-NEXT: 32(4.484155e-44), 0(0.000000e+00)
832 ; EG-NEXT: LSHR T3.X, PV.W, literal.x,
833 ; EG-NEXT: MOV * T4.X, T0.Z,
834 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
835 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
836 ; EG-NEXT: 40(5.605194e-44), 0(0.000000e+00)
837 ; EG-NEXT: LSHR T5.X, PV.W, literal.x,
838 ; EG-NEXT: LSHR * T6.X, KC0[2].Y, literal.x,
839 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
840 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
841 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
842 ; EG-NEXT: LSHR * T7.X, PV.W, literal.x,
843 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
844 ;
845 ; GFX9-HSA-LABEL: constant_load_v11i32:
846 ; GFX9-HSA: ; %bb.0: ; %entry
847 ; GFX9-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
848 ; GFX9-HSA-NEXT: v_mov_b32_e32 v7, 0
849 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
850 ; GFX9-HSA-NEXT: s_load_dwordx4 s[12:15], s[10:11], 0x20
851 ; GFX9-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
852 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
853 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s12
854 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
855 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s5
856 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s6
857 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s7
858 ; GFX9-HSA-NEXT: global_store_dwordx4 v7, v[0:3], s[8:9] offset:16
859 ; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s13
860 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s0
861 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s1
862 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s2
863 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s3
864 ; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s14
865 ; GFX9-HSA-NEXT: global_store_dwordx4 v7, v[0:3], s[8:9]
866 ; GFX9-HSA-NEXT: global_store_dwordx3 v7, v[4:6], s[8:9] offset:32
867 ; GFX9-HSA-NEXT: s_endpgm
868 entry:
869 %ld = load <11 x i32>, ptr addrspace(4) %in
870 store <11 x i32> %ld, ptr addrspace(1) %out
871 ret void
872 }
874 define amdgpu_kernel void @constant_load_v12i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
875 ; GFX6-NOHSA-LABEL: constant_load_v12i32:
876 ; GFX6-NOHSA: ; %bb.0: ; %entry
877 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
878 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
879 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[12:15], s[10:11], 0x8
880 ; GFX6-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
881 ; GFX6-NOHSA-NEXT: s_mov_b32 s11, 0xf000
882 ; GFX6-NOHSA-NEXT: s_mov_b32 s10, -1
883 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
884 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12
885 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s13
886 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s14
887 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s15
888 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:32
889 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
890 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
891 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
892 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s6
893 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s7
894 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:16
895 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
896 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
897 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s1
898 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s2
899 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s3
900 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
901 ; GFX6-NOHSA-NEXT: s_endpgm
902 ;
903 ; GFX7-HSA-LABEL: constant_load_v12i32:
904 ; GFX7-HSA: ; %bb.0: ; %entry
905 ; GFX7-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
906 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
907 ; GFX7-HSA-NEXT: s_load_dwordx4 s[12:15], s[10:11], 0x8
908 ; GFX7-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
909 ; GFX7-HSA-NEXT: s_add_u32 s10, s8, 32
910 ; GFX7-HSA-NEXT: s_addc_u32 s11, s9, 0
911 ; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s10
912 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
913 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12
914 ; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s11
915 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13
916 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s14
917 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s15
918 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
919 ; GFX7-HSA-NEXT: s_add_u32 s4, s8, 16
920 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
921 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
922 ; GFX7-HSA-NEXT: s_addc_u32 s5, s9, 0
923 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
924 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s6
925 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s7
926 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5
927 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
928 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
929 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8
930 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
931 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
932 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s3
933 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
934 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
935 ; GFX7-HSA-NEXT: s_endpgm
936 ;
937 ; GFX8-NOHSA-LABEL: constant_load_v12i32:
938 ; GFX8-NOHSA: ; %bb.0: ; %entry
939 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x24
940 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
941 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[12:15], s[10:11], 0x20
942 ; GFX8-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
943 ; GFX8-NOHSA-NEXT: s_add_u32 s10, s8, 32
944 ; GFX8-NOHSA-NEXT: s_addc_u32 s11, s9, 0
945 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v8, s10
946 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
947 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s12
948 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v9, s11
949 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s13
950 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s14
951 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s15
952 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
953 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s8, 16
954 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
955 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[8:9], v[0:3]
956 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s9, 0
957 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
958 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s6
959 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v7, s7
960 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s5
961 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
962 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
963 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
964 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
965 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
966 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s3
967 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
968 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
969 ; GFX8-NOHSA-NEXT: s_endpgm
970 ;
971 ; EG-LABEL: constant_load_v12i32:
972 ; EG: ; %bb.0: ; %entry
973 ; EG-NEXT: ALU 7, @14, KC0[CB0:0-32], KC1[]
974 ; EG-NEXT: TEX 2 @8
975 ; EG-NEXT: ALU 1, @22, KC0[], KC1[]
976 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T3.XYZW, T5.X, 0
977 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T1.X, 0
978 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T0.X, 1
979 ; EG-NEXT: CF_END
980 ; EG-NEXT: PAD
981 ; EG-NEXT: Fetch clause starting at 8:
982 ; EG-NEXT: VTX_READ_128 T3.XYZW, T2.X, 32, #1
983 ; EG-NEXT: VTX_READ_128 T4.XYZW, T2.X, 16, #1
984 ; EG-NEXT: VTX_READ_128 T2.XYZW, T2.X, 0, #1
985 ; EG-NEXT: ALU clause starting at 14:
986 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
987 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
988 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
989 ; EG-NEXT: LSHR T1.X, PV.W, literal.x,
990 ; EG-NEXT: MOV * T2.X, KC0[2].Z,
991 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
992 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
993 ; EG-NEXT: 32(4.484155e-44), 0(0.000000e+00)
994 ; EG-NEXT: ALU clause starting at 22:
995 ; EG-NEXT: LSHR * T5.X, T0.W, literal.x,
996 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
997 ;
998 ; GFX9-HSA-LABEL: constant_load_v12i32:
999 ; GFX9-HSA: ; %bb.0: ; %entry
1000 ; GFX9-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
1001 ; GFX9-HSA-NEXT: v_mov_b32_e32 v12, 0
1002 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1003 ; GFX9-HSA-NEXT: s_load_dwordx4 s[12:15], s[10:11], 0x20
1004 ; GFX9-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
1005 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1006 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s12
1007 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s13
1008 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s14
1009 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s15
1010 ; GFX9-HSA-NEXT: v_mov_b32_e32 v8, s0
1011 ; GFX9-HSA-NEXT: v_mov_b32_e32 v9, s1
1012 ; GFX9-HSA-NEXT: v_mov_b32_e32 v10, s2
1013 ; GFX9-HSA-NEXT: v_mov_b32_e32 v11, s3
1014 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s4
1015 ; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s5
1016 ; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s6
1017 ; GFX9-HSA-NEXT: v_mov_b32_e32 v7, s7
1018 ; GFX9-HSA-NEXT: global_store_dwordx4 v12, v[0:3], s[8:9] offset:32
1019 ; GFX9-HSA-NEXT: global_store_dwordx4 v12, v[4:7], s[8:9] offset:16
1020 ; GFX9-HSA-NEXT: global_store_dwordx4 v12, v[8:11], s[8:9]
1021 ; GFX9-HSA-NEXT: s_endpgm
1022 entry:
1023 %ld = load <12 x i32>, ptr addrspace(4) %in
1024 store <12 x i32> %ld, ptr addrspace(1) %out
1025 ret void
1026 }
1028 define amdgpu_kernel void @constant_load_v16i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
1029 ; GFX6-NOHSA-LABEL: constant_load_v16i32:
1030 ; GFX6-NOHSA: ; %bb.0: ; %entry
1031 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[16:19], s[0:1], 0x9
1032 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1033 ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
1034 ; GFX6-NOHSA-NEXT: s_mov_b32 s19, 0xf000
1035 ; GFX6-NOHSA-NEXT: s_mov_b32 s18, -1
1036 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1037 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12
1038 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s13
1039 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s14
1040 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s15
1041 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:48
1042 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
1043 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s8
1044 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s9
1045 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s10
1046 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s11
1047 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:32
1048 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
1049 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1050 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
1051 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s6
1052 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s7
1053 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:16
1054 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
1055 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
1056 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s1
1057 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s2
1058 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s3
1059 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0
1060 ; GFX6-NOHSA-NEXT: s_endpgm
1061 ;
1062 ; GFX7-HSA-LABEL: constant_load_v16i32:
1063 ; GFX7-HSA: ; %bb.0: ; %entry
1064 ; GFX7-HSA-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x0
1065 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1066 ; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
1067 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 48
1068 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0
1069 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s18
1070 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s19
1071 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1072 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12
1073 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13
1074 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s14
1075 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s15
1076 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8
1077 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 32
1078 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
1079 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3]
1080 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0
1081 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
1082 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s10
1083 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s11
1084 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s9
1085 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
1086 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
1087 ; GFX7-HSA-NEXT: s_add_u32 s4, s16, 16
1088 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5
1089 ; GFX7-HSA-NEXT: s_addc_u32 s5, s17, 0
1090 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
1091 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6
1092 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s7
1093 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
1094 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1095 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16
1096 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
1097 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
1098 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
1099 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s3
1100 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17
1101 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1102 ; GFX7-HSA-NEXT: s_endpgm
1103 ;
1104 ; GFX8-NOHSA-LABEL: constant_load_v16i32:
1105 ; GFX8-NOHSA: ; %bb.0: ; %entry
1106 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[16:19], s[0:1], 0x24
1107 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1108 ; GFX8-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
1109 ; GFX8-NOHSA-NEXT: s_add_u32 s18, s16, 48
1110 ; GFX8-NOHSA-NEXT: s_addc_u32 s19, s17, 0
1111 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s18
1112 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v7, s19
1113 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1114 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s12
1115 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s13
1116 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s14
1117 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s15
1118 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
1119 ; GFX8-NOHSA-NEXT: s_add_u32 s8, s16, 32
1120 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
1121 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[6:7], v[0:3]
1122 ; GFX8-NOHSA-NEXT: s_addc_u32 s9, s17, 0
1123 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s8
1124 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s10
1125 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v7, s11
1126 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s9
1127 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
1128 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1129 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s16, 16
1130 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s5
1131 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s17, 0
1132 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
1133 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s6
1134 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s7
1135 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
1136 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1137 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s16
1138 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
1139 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
1140 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
1141 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s3
1142 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s17
1143 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1144 ; GFX8-NOHSA-NEXT: s_endpgm
1145 ;
1146 ; EG-LABEL: constant_load_v16i32:
1147 ; EG: ; %bb.0: ; %entry
1148 ; EG-NEXT: ALU 10, @16, KC0[CB0:0-32], KC1[]
1149 ; EG-NEXT: TEX 3 @8
1150 ; EG-NEXT: ALU 1, @27, KC0[], KC1[]
1151 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T7.X, 0
1152 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T2.X, 0
1153 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T1.X, 0
1154 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T3.XYZW, T0.X, 1
1155 ; EG-NEXT: CF_END
1156 ; EG-NEXT: Fetch clause starting at 8:
1157 ; EG-NEXT: VTX_READ_128 T4.XYZW, T3.X, 48, #1
1158 ; EG-NEXT: VTX_READ_128 T5.XYZW, T3.X, 32, #1
1159 ; EG-NEXT: VTX_READ_128 T6.XYZW, T3.X, 16, #1
1160 ; EG-NEXT: VTX_READ_128 T3.XYZW, T3.X, 0, #1
1161 ; EG-NEXT: ALU clause starting at 16:
1162 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
1163 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
1164 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
1165 ; EG-NEXT: LSHR T1.X, PV.W, literal.x,
1166 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
1167 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
1168 ; EG-NEXT: LSHR T2.X, PV.W, literal.x,
1169 ; EG-NEXT: MOV * T3.X, KC0[2].Z,
1170 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1171 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
1172 ; EG-NEXT: 48(6.726233e-44), 0(0.000000e+00)
1173 ; EG-NEXT: ALU clause starting at 27:
1174 ; EG-NEXT: LSHR * T7.X, T0.W, literal.x,
1175 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1176 ;
1177 ; GFX9-HSA-LABEL: constant_load_v16i32:
1178 ; GFX9-HSA: ; %bb.0: ; %entry
1179 ; GFX9-HSA-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x0
1180 ; GFX9-HSA-NEXT: v_mov_b32_e32 v8, 0
1181 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1182 ; GFX9-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
1183 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1184 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s12
1185 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s13
1186 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s14
1187 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s15
1188 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s8
1189 ; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s9
1190 ; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s10
1191 ; GFX9-HSA-NEXT: v_mov_b32_e32 v7, s11
1192 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:48
1193 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[4:7], s[16:17] offset:32
1194 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
1195 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s5
1196 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s6
1197 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s7
1198 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17] offset:16
1199 ; GFX9-HSA-NEXT: s_nop 0
1200 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s0
1201 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s1
1202 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s2
1203 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s3
1204 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[16:17]
1205 ; GFX9-HSA-NEXT: s_endpgm
1206 entry:
1207 %ld = load <16 x i32>, ptr addrspace(4) %in
1208 store <16 x i32> %ld, ptr addrspace(1) %out
1209 ret void
1210 }
1212 define amdgpu_kernel void @constant_zextload_i32_to_i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
1213 ; GFX6-NOHSA-LABEL: constant_zextload_i32_to_i64:
1214 ; GFX6-NOHSA: ; %bb.0:
1215 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1216 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1217 ; GFX6-NOHSA-NEXT: s_load_dword s4, s[2:3], 0x0
1218 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
1219 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
1220 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, 0
1221 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1222 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1223 ; GFX6-NOHSA-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1224 ; GFX6-NOHSA-NEXT: s_endpgm
1225 ;
1226 ; GFX7-HSA-LABEL: constant_zextload_i32_to_i64:
1227 ; GFX7-HSA: ; %bb.0:
1228 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1229 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, 0
1230 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1231 ; GFX7-HSA-NEXT: s_load_dword s2, s[2:3], 0x0
1232 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
1233 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
1234 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1235 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
1236 ; GFX7-HSA-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
1237 ; GFX7-HSA-NEXT: s_endpgm
1238 ;
1239 ; GFX8-NOHSA-LABEL: constant_zextload_i32_to_i64:
1240 ; GFX8-NOHSA: ; %bb.0:
1241 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1242 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, 0
1243 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1244 ; GFX8-NOHSA-NEXT: s_load_dword s2, s[2:3], 0x0
1245 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
1246 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
1247 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1248 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
1249 ; GFX8-NOHSA-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
1250 ; GFX8-NOHSA-NEXT: s_endpgm
1251 ;
1252 ; EG-LABEL: constant_zextload_i32_to_i64:
1253 ; EG: ; %bb.0:
1254 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1255 ; EG-NEXT: TEX 0 @6
1256 ; EG-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]
1257 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
1258 ; EG-NEXT: CF_END
1259 ; EG-NEXT: PAD
1260 ; EG-NEXT: Fetch clause starting at 6:
1261 ; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #1
1262 ; EG-NEXT: ALU clause starting at 8:
1263 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1264 ; EG-NEXT: ALU clause starting at 9:
1265 ; EG-NEXT: MOV * T0.Y, 0.0,
1266 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
1267 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1268 ;
1269 ; GFX9-HSA-LABEL: constant_zextload_i32_to_i64:
1270 ; GFX9-HSA: ; %bb.0:
1271 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1272 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, 0
1273 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1274 ; GFX9-HSA-NEXT: s_load_dword s2, s[2:3], 0x0
1275 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1276 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
1277 ; GFX9-HSA-NEXT: global_store_dwordx2 v1, v[0:1], s[0:1]
1278 ; GFX9-HSA-NEXT: s_endpgm
1279 %ld = load i32, ptr addrspace(4) %in
1280 %ext = zext i32 %ld to i64
1281 store i64 %ext, ptr addrspace(1) %out
1282 ret void
1283 }
1285 define amdgpu_kernel void @constant_sextload_i32_to_i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
1286 ; GFX6-NOHSA-LABEL: constant_sextload_i32_to_i64:
1287 ; GFX6-NOHSA: ; %bb.0:
1288 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1289 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1290 ; GFX6-NOHSA-NEXT: s_load_dword s4, s[2:3], 0x0
1291 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
1292 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1293 ; GFX6-NOHSA-NEXT: s_ashr_i32 s5, s4, 31
1294 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
1295 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1296 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
1297 ; GFX6-NOHSA-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1298 ; GFX6-NOHSA-NEXT: s_endpgm
1299 ;
1300 ; GFX7-HSA-LABEL: constant_sextload_i32_to_i64:
1301 ; GFX7-HSA: ; %bb.0:
1302 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1303 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1304 ; GFX7-HSA-NEXT: s_load_dword s2, s[2:3], 0x0
1305 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
1306 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
1307 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1308 ; GFX7-HSA-NEXT: s_ashr_i32 s0, s2, 31
1309 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
1310 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s0
1311 ; GFX7-HSA-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
1312 ; GFX7-HSA-NEXT: s_endpgm
1313 ;
1314 ; GFX8-NOHSA-LABEL: constant_sextload_i32_to_i64:
1315 ; GFX8-NOHSA: ; %bb.0:
1316 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1317 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1318 ; GFX8-NOHSA-NEXT: s_load_dword s2, s[2:3], 0x0
1319 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
1320 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
1321 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1322 ; GFX8-NOHSA-NEXT: s_ashr_i32 s0, s2, 31
1323 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
1324 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s0
1325 ; GFX8-NOHSA-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
1326 ; GFX8-NOHSA-NEXT: s_endpgm
1327 ;
1328 ; EG-LABEL: constant_sextload_i32_to_i64:
1329 ; EG: ; %bb.0:
1330 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1331 ; EG-NEXT: TEX 0 @6
1332 ; EG-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]
1333 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
1334 ; EG-NEXT: CF_END
1335 ; EG-NEXT: PAD
1336 ; EG-NEXT: Fetch clause starting at 6:
1337 ; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #1
1338 ; EG-NEXT: ALU clause starting at 8:
1339 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1340 ; EG-NEXT: ALU clause starting at 9:
1341 ; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,
1342 ; EG-NEXT: ASHR * T0.Y, T0.X, literal.y,
1343 ; EG-NEXT: 2(2.802597e-45), 31(4.344025e-44)
1344 ;
1345 ; GFX9-HSA-LABEL: constant_sextload_i32_to_i64:
1346 ; GFX9-HSA: ; %bb.0:
1347 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1348 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, 0
1349 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1350 ; GFX9-HSA-NEXT: s_load_dword s2, s[2:3], 0x0
1351 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1352 ; GFX9-HSA-NEXT: s_ashr_i32 s3, s2, 31
1353 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
1354 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s3
1355 ; GFX9-HSA-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
1356 ; GFX9-HSA-NEXT: s_endpgm
1357 %ld = load i32, ptr addrspace(4) %in
1358 %ext = sext i32 %ld to i64
1359 store i64 %ext, ptr addrspace(1) %out
1360 ret void
1361 }
1363 define amdgpu_kernel void @constant_zextload_v1i32_to_v1i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
1364 ; GFX6-NOHSA-LABEL: constant_zextload_v1i32_to_v1i64:
1365 ; GFX6-NOHSA: ; %bb.0:
1366 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1367 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1368 ; GFX6-NOHSA-NEXT: s_load_dword s4, s[2:3], 0x0
1369 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
1370 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
1371 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, 0
1372 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1373 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1374 ; GFX6-NOHSA-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1375 ; GFX6-NOHSA-NEXT: s_endpgm
1376 ;
1377 ; GFX7-HSA-LABEL: constant_zextload_v1i32_to_v1i64:
1378 ; GFX7-HSA: ; %bb.0:
1379 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1380 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, 0
1381 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1382 ; GFX7-HSA-NEXT: s_load_dword s2, s[2:3], 0x0
1383 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
1384 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
1385 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1386 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
1387 ; GFX7-HSA-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
1388 ; GFX7-HSA-NEXT: s_endpgm
1389 ;
1390 ; GFX8-NOHSA-LABEL: constant_zextload_v1i32_to_v1i64:
1391 ; GFX8-NOHSA: ; %bb.0:
1392 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1393 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, 0
1394 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1395 ; GFX8-NOHSA-NEXT: s_load_dword s2, s[2:3], 0x0
1396 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
1397 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
1398 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1399 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
1400 ; GFX8-NOHSA-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
1401 ; GFX8-NOHSA-NEXT: s_endpgm
1402 ;
1403 ; EG-LABEL: constant_zextload_v1i32_to_v1i64:
1404 ; EG: ; %bb.0:
1405 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1406 ; EG-NEXT: TEX 0 @6
1407 ; EG-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]
1408 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
1409 ; EG-NEXT: CF_END
1410 ; EG-NEXT: PAD
1411 ; EG-NEXT: Fetch clause starting at 6:
1412 ; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #1
1413 ; EG-NEXT: ALU clause starting at 8:
1414 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1415 ; EG-NEXT: ALU clause starting at 9:
1416 ; EG-NEXT: MOV * T0.Y, 0.0,
1417 ; EG-NEXT: LSHR * T1.X, KC0[2].Y, literal.x,
1418 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1419 ;
1420 ; GFX9-HSA-LABEL: constant_zextload_v1i32_to_v1i64:
1421 ; GFX9-HSA: ; %bb.0:
1422 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1423 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, 0
1424 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1425 ; GFX9-HSA-NEXT: s_load_dword s2, s[2:3], 0x0
1426 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1427 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
1428 ; GFX9-HSA-NEXT: global_store_dwordx2 v1, v[0:1], s[0:1]
1429 ; GFX9-HSA-NEXT: s_endpgm
1430 %ld = load <1 x i32>, ptr addrspace(4) %in
1431 %ext = zext <1 x i32> %ld to <1 x i64>
1432 store <1 x i64> %ext, ptr addrspace(1) %out
1433 ret void
1434 }
1436 define amdgpu_kernel void @constant_sextload_v1i32_to_v1i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
1437 ; GFX6-NOHSA-LABEL: constant_sextload_v1i32_to_v1i64:
1438 ; GFX6-NOHSA: ; %bb.0:
1439 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1440 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1441 ; GFX6-NOHSA-NEXT: s_load_dword s4, s[2:3], 0x0
1442 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
1443 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1444 ; GFX6-NOHSA-NEXT: s_ashr_i32 s5, s4, 31
1445 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
1446 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1447 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
1448 ; GFX6-NOHSA-NEXT: buffer_store_dwordx2 v[0:1], off, s[0:3], 0
1449 ; GFX6-NOHSA-NEXT: s_endpgm
1450 ;
1451 ; GFX7-HSA-LABEL: constant_sextload_v1i32_to_v1i64:
1452 ; GFX7-HSA: ; %bb.0:
1453 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1454 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1455 ; GFX7-HSA-NEXT: s_load_dword s2, s[2:3], 0x0
1456 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
1457 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
1458 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1459 ; GFX7-HSA-NEXT: s_ashr_i32 s0, s2, 31
1460 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
1461 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s0
1462 ; GFX7-HSA-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
1463 ; GFX7-HSA-NEXT: s_endpgm
1464 ;
1465 ; GFX8-NOHSA-LABEL: constant_sextload_v1i32_to_v1i64:
1466 ; GFX8-NOHSA: ; %bb.0:
1467 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1468 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1469 ; GFX8-NOHSA-NEXT: s_load_dword s2, s[2:3], 0x0
1470 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
1471 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
1472 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1473 ; GFX8-NOHSA-NEXT: s_ashr_i32 s0, s2, 31
1474 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
1475 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s0
1476 ; GFX8-NOHSA-NEXT: flat_store_dwordx2 v[0:1], v[2:3]
1477 ; GFX8-NOHSA-NEXT: s_endpgm
1478 ;
1479 ; EG-LABEL: constant_sextload_v1i32_to_v1i64:
1480 ; EG: ; %bb.0:
1481 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1482 ; EG-NEXT: TEX 0 @6
1483 ; EG-NEXT: ALU 2, @9, KC0[CB0:0-32], KC1[]
1484 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XY, T1.X, 1
1485 ; EG-NEXT: CF_END
1486 ; EG-NEXT: PAD
1487 ; EG-NEXT: Fetch clause starting at 6:
1488 ; EG-NEXT: VTX_READ_32 T0.X, T0.X, 0, #1
1489 ; EG-NEXT: ALU clause starting at 8:
1490 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1491 ; EG-NEXT: ALU clause starting at 9:
1492 ; EG-NEXT: LSHR T1.X, KC0[2].Y, literal.x,
1493 ; EG-NEXT: ASHR * T0.Y, T0.X, literal.y,
1494 ; EG-NEXT: 2(2.802597e-45), 31(4.344025e-44)
1495 ;
1496 ; GFX9-HSA-LABEL: constant_sextload_v1i32_to_v1i64:
1497 ; GFX9-HSA: ; %bb.0:
1498 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1499 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, 0
1500 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1501 ; GFX9-HSA-NEXT: s_load_dword s2, s[2:3], 0x0
1502 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1503 ; GFX9-HSA-NEXT: s_ashr_i32 s3, s2, 31
1504 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
1505 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s3
1506 ; GFX9-HSA-NEXT: global_store_dwordx2 v2, v[0:1], s[0:1]
1507 ; GFX9-HSA-NEXT: s_endpgm
1508 %ld = load <1 x i32>, ptr addrspace(4) %in
1509 %ext = sext <1 x i32> %ld to <1 x i64>
1510 store <1 x i64> %ext, ptr addrspace(1) %out
1511 ret void
1512 }
1514 define amdgpu_kernel void @constant_zextload_v2i32_to_v2i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
1515 ; GFX6-NOHSA-LABEL: constant_zextload_v2i32_to_v2i64:
1516 ; GFX6-NOHSA: ; %bb.0:
1517 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1518 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1519 ; GFX6-NOHSA-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0
1520 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
1521 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, 0
1522 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
1523 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, v1
1524 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1525 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1526 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s5
1527 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1528 ; GFX6-NOHSA-NEXT: s_endpgm
1529 ;
1530 ; GFX7-HSA-LABEL: constant_zextload_v2i32_to_v2i64:
1531 ; GFX7-HSA: ; %bb.0:
1532 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1533 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, 0
1534 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, v1
1535 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1536 ; GFX7-HSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
1537 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0
1538 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1
1539 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1540 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2
1541 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3
1542 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1543 ; GFX7-HSA-NEXT: s_endpgm
1544 ;
1545 ; GFX8-NOHSA-LABEL: constant_zextload_v2i32_to_v2i64:
1546 ; GFX8-NOHSA: ; %bb.0:
1547 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1548 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, 0
1549 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, v1
1550 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1551 ; GFX8-NOHSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
1552 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s0
1553 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s1
1554 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1555 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s2
1556 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s3
1557 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1558 ; GFX8-NOHSA-NEXT: s_endpgm
1559 ;
1560 ; EG-LABEL: constant_zextload_v2i32_to_v2i64:
1561 ; EG: ; %bb.0:
1562 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1563 ; EG-NEXT: TEX 0 @6
1564 ; EG-NEXT: ALU 5, @9, KC0[CB0:0-32], KC1[]
1565 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
1566 ; EG-NEXT: CF_END
1567 ; EG-NEXT: PAD
1568 ; EG-NEXT: Fetch clause starting at 6:
1569 ; EG-NEXT: VTX_READ_64 T0.XY, T0.X, 0, #1
1570 ; EG-NEXT: ALU clause starting at 8:
1571 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1572 ; EG-NEXT: ALU clause starting at 9:
1573 ; EG-NEXT: MOV T1.X, T0.X,
1574 ; EG-NEXT: MOV T1.Y, 0.0,
1575 ; EG-NEXT: MOV T1.Z, T0.Y,
1576 ; EG-NEXT: MOV T1.W, 0.0,
1577 ; EG-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,
1578 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1579 ;
1580 ; GFX9-HSA-LABEL: constant_zextload_v2i32_to_v2i64:
1581 ; GFX9-HSA: ; %bb.0:
1582 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1583 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, 0
1584 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, v1
1585 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1586 ; GFX9-HSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
1587 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1588 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
1589 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s3
1590 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[0:1]
1591 ; GFX9-HSA-NEXT: s_endpgm
1592 %ld = load <2 x i32>, ptr addrspace(4) %in
1593 %ext = zext <2 x i32> %ld to <2 x i64>
1594 store <2 x i64> %ext, ptr addrspace(1) %out
1595 ret void
1596 }
1598 define amdgpu_kernel void @constant_sextload_v2i32_to_v2i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
1599 ; GFX6-NOHSA-LABEL: constant_sextload_v2i32_to_v2i64:
1600 ; GFX6-NOHSA: ; %bb.0:
1601 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1602 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1603 ; GFX6-NOHSA-NEXT: s_load_dwordx2 s[4:5], s[2:3], 0x0
1604 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
1605 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1606 ; GFX6-NOHSA-NEXT: s_ashr_i32 s7, s5, 31
1607 ; GFX6-NOHSA-NEXT: s_ashr_i32 s8, s4, 31
1608 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
1609 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1610 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s5
1611 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s8
1612 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s7
1613 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1614 ; GFX6-NOHSA-NEXT: s_endpgm
1615 ;
1616 ; GFX7-HSA-LABEL: constant_sextload_v2i32_to_v2i64:
1617 ; GFX7-HSA: ; %bb.0:
1618 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1619 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1620 ; GFX7-HSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
1621 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0
1622 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1
1623 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1624 ; GFX7-HSA-NEXT: s_ashr_i32 s1, s3, 31
1625 ; GFX7-HSA-NEXT: s_mov_b32 s0, s3
1626 ; GFX7-HSA-NEXT: s_ashr_i32 s3, s2, 31
1627 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2
1628 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s3
1629 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s0
1630 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s1
1631 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1632 ; GFX7-HSA-NEXT: s_endpgm
1633 ;
1634 ; GFX8-NOHSA-LABEL: constant_sextload_v2i32_to_v2i64:
1635 ; GFX8-NOHSA: ; %bb.0:
1636 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1637 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1638 ; GFX8-NOHSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
1639 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s0
1640 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s1
1641 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1642 ; GFX8-NOHSA-NEXT: s_ashr_i32 s1, s3, 31
1643 ; GFX8-NOHSA-NEXT: s_mov_b32 s0, s3
1644 ; GFX8-NOHSA-NEXT: s_ashr_i32 s3, s2, 31
1645 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s2
1646 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s3
1647 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s0
1648 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s1
1649 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1650 ; GFX8-NOHSA-NEXT: s_endpgm
1651 ;
1652 ; EG-LABEL: constant_sextload_v2i32_to_v2i64:
1653 ; EG: ; %bb.0:
1654 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1655 ; EG-NEXT: TEX 0 @6
1656 ; EG-NEXT: ALU 7, @9, KC0[CB0:0-32], KC1[]
1657 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T0.X, 1
1658 ; EG-NEXT: CF_END
1659 ; EG-NEXT: PAD
1660 ; EG-NEXT: Fetch clause starting at 6:
1661 ; EG-NEXT: VTX_READ_64 T0.XY, T0.X, 0, #1
1662 ; EG-NEXT: ALU clause starting at 8:
1663 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1664 ; EG-NEXT: ALU clause starting at 9:
1665 ; EG-NEXT: ASHR * T1.W, T0.Y, literal.x,
1666 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
1667 ; EG-NEXT: ASHR * T1.Y, T0.X, literal.x,
1668 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
1669 ; EG-NEXT: MOV T1.X, T0.X,
1670 ; EG-NEXT: LSHR * T0.X, KC0[2].Y, literal.x,
1671 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1672 ; EG-NEXT: MOV * T1.Z, T0.Y,
1673 ;
1674 ; GFX9-HSA-LABEL: constant_sextload_v2i32_to_v2i64:
1675 ; GFX9-HSA: ; %bb.0:
1676 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1677 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, 0
1678 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1679 ; GFX9-HSA-NEXT: s_load_dwordx2 s[2:3], s[2:3], 0x0
1680 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1681 ; GFX9-HSA-NEXT: s_ashr_i32 s5, s3, 31
1682 ; GFX9-HSA-NEXT: s_mov_b32 s4, s3
1683 ; GFX9-HSA-NEXT: s_ashr_i32 s3, s2, 31
1684 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
1685 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s3
1686 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s4
1687 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s5
1688 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
1689 ; GFX9-HSA-NEXT: s_endpgm
1690 %ld = load <2 x i32>, ptr addrspace(4) %in
1691 %ext = sext <2 x i32> %ld to <2 x i64>
1692 store <2 x i64> %ext, ptr addrspace(1) %out
1693 ret void
1694 }
1696 define amdgpu_kernel void @constant_zextload_v4i32_to_v4i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
1697 ; GFX6-NOHSA-LABEL: constant_zextload_v4i32_to_v4i64:
1698 ; GFX6-NOHSA: ; %bb.0:
1699 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1700 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1701 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
1702 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
1703 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, 0
1704 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
1705 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, v1
1706 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1707 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6
1708 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s7
1709 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
1710 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
1711 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1712 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s5
1713 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0
1714 ; GFX6-NOHSA-NEXT: s_endpgm
1715 ;
1716 ; GFX7-HSA-LABEL: constant_zextload_v4i32_to_v4i64:
1717 ; GFX7-HSA: ; %bb.0:
1718 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1719 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, 0
1720 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, v1
1721 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1722 ; GFX7-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
1723 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 16
1724 ; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0
1725 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3
1726 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2
1727 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1728 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6
1729 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7
1730 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1731 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1
1732 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
1733 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5
1734 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0
1735 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1736 ; GFX7-HSA-NEXT: s_endpgm
1737 ;
1738 ; GFX8-NOHSA-LABEL: constant_zextload_v4i32_to_v4i64:
1739 ; GFX8-NOHSA: ; %bb.0:
1740 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1741 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, 0
1742 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, v1
1743 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1744 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
1745 ; GFX8-NOHSA-NEXT: s_add_u32 s2, s0, 16
1746 ; GFX8-NOHSA-NEXT: s_addc_u32 s3, s1, 0
1747 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s3
1748 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s2
1749 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1750 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s6
1751 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s7
1752 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1753 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s1
1754 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1755 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s5
1756 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s0
1757 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1758 ; GFX8-NOHSA-NEXT: s_endpgm
1759 ;
1760 ; EG-LABEL: constant_zextload_v4i32_to_v4i64:
1761 ; EG: ; %bb.0:
1762 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1763 ; EG-NEXT: TEX 0 @6
1764 ; EG-NEXT: ALU 12, @9, KC0[CB0:0-32], KC1[]
1765 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T3.X, 0
1766 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T0.X, 1
1767 ; EG-NEXT: CF_END
1768 ; EG-NEXT: Fetch clause starting at 6:
1769 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
1770 ; EG-NEXT: ALU clause starting at 8:
1771 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1772 ; EG-NEXT: ALU clause starting at 9:
1773 ; EG-NEXT: MOV T1.X, T0.Z,
1774 ; EG-NEXT: MOV T1.Y, 0.0,
1775 ; EG-NEXT: MOV * T2.X, T0.X,
1776 ; EG-NEXT: MOV T2.Y, 0.0,
1777 ; EG-NEXT: MOV T1.Z, T0.W,
1778 ; EG-NEXT: MOV T1.W, 0.0,
1779 ; EG-NEXT: MOV * T2.Z, T0.Y,
1780 ; EG-NEXT: MOV * T2.W, 0.0,
1781 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
1782 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
1783 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
1784 ; EG-NEXT: LSHR * T3.X, PV.W, literal.x,
1785 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1786 ;
1787 ; GFX9-HSA-LABEL: constant_zextload_v4i32_to_v4i64:
1788 ; GFX9-HSA: ; %bb.0:
1789 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1790 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, 0
1791 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, v1
1792 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1793 ; GFX9-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
1794 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1795 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s6
1796 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s7
1797 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[0:1] offset:16
1798 ; GFX9-HSA-NEXT: s_nop 0
1799 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
1800 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s5
1801 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[0:1]
1802 ; GFX9-HSA-NEXT: s_endpgm
1803 %ld = load <4 x i32>, ptr addrspace(4) %in
1804 %ext = zext <4 x i32> %ld to <4 x i64>
1805 store <4 x i64> %ext, ptr addrspace(1) %out
1806 ret void
1807 }
1809 define amdgpu_kernel void @constant_sextload_v4i32_to_v4i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
1810 ; GFX6-NOHSA-LABEL: constant_sextload_v4i32_to_v4i64:
1811 ; GFX6-NOHSA: ; %bb.0:
1812 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
1813 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1814 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
1815 ; GFX6-NOHSA-NEXT: s_mov_b32 s3, 0xf000
1816 ; GFX6-NOHSA-NEXT: s_mov_b32 s2, -1
1817 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1818 ; GFX6-NOHSA-NEXT: s_ashr_i32 s8, s5, 31
1819 ; GFX6-NOHSA-NEXT: s_ashr_i32 s9, s7, 31
1820 ; GFX6-NOHSA-NEXT: s_ashr_i32 s10, s6, 31
1821 ; GFX6-NOHSA-NEXT: s_ashr_i32 s11, s4, 31
1822 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6
1823 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s7
1824 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s4
1825 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s5
1826 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s10
1827 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s9
1828 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[0:3], 0 offset:16
1829 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s11
1830 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s8
1831 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[0:3], 0
1832 ; GFX6-NOHSA-NEXT: s_endpgm
1833 ;
1834 ; GFX7-HSA-LABEL: constant_sextload_v4i32_to_v4i64:
1835 ; GFX7-HSA: ; %bb.0:
1836 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1837 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1838 ; GFX7-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
1839 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1840 ; GFX7-HSA-NEXT: s_ashr_i32 s8, s5, 31
1841 ; GFX7-HSA-NEXT: s_ashr_i32 s9, s4, 31
1842 ; GFX7-HSA-NEXT: s_ashr_i32 s2, s7, 31
1843 ; GFX7-HSA-NEXT: s_ashr_i32 s3, s6, 31
1844 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s2
1845 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 16
1846 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s3
1847 ; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0
1848 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s3
1849 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6
1850 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7
1851 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s2
1852 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[5:6], v[0:3]
1853 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
1854 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
1855 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
1856 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s5
1857 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s8
1858 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
1859 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
1860 ; GFX7-HSA-NEXT: s_endpgm
1861 ;
1862 ; GFX8-NOHSA-LABEL: constant_sextload_v4i32_to_v4i64:
1863 ; GFX8-NOHSA: ; %bb.0:
1864 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x24
1865 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1866 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
1867 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1868 ; GFX8-NOHSA-NEXT: s_ashr_i32 s8, s5, 31
1869 ; GFX8-NOHSA-NEXT: s_ashr_i32 s9, s4, 31
1870 ; GFX8-NOHSA-NEXT: s_ashr_i32 s2, s7, 31
1871 ; GFX8-NOHSA-NEXT: s_ashr_i32 s3, s6, 31
1872 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s2
1873 ; GFX8-NOHSA-NEXT: s_add_u32 s2, s0, 16
1874 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s3
1875 ; GFX8-NOHSA-NEXT: s_addc_u32 s3, s1, 0
1876 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s3
1877 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s6
1878 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s7
1879 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s2
1880 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[5:6], v[0:3]
1881 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
1882 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
1883 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
1884 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s5
1885 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v7, s8
1886 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
1887 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
1888 ; GFX8-NOHSA-NEXT: s_endpgm
1889 ;
1890 ; EG-LABEL: constant_sextload_v4i32_to_v4i64:
1891 ; EG: ; %bb.0:
1892 ; EG-NEXT: ALU 0, @8, KC0[CB0:0-32], KC1[]
1893 ; EG-NEXT: TEX 0 @6
1894 ; EG-NEXT: ALU 15, @9, KC0[CB0:0-32], KC1[]
1895 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T3.XYZW, T0.X, 0
1896 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T1.XYZW, T2.X, 1
1897 ; EG-NEXT: CF_END
1898 ; EG-NEXT: Fetch clause starting at 6:
1899 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
1900 ; EG-NEXT: ALU clause starting at 8:
1901 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
1902 ; EG-NEXT: ALU clause starting at 9:
1903 ; EG-NEXT: ASHR * T1.W, T0.Y, literal.x,
1904 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
1905 ; EG-NEXT: LSHR T2.X, KC0[2].Y, literal.x,
1906 ; EG-NEXT: ASHR T1.Y, T0.X, literal.y,
1907 ; EG-NEXT: ASHR T3.W, T0.W, literal.y,
1908 ; EG-NEXT: MOV * T1.X, T0.X,
1909 ; EG-NEXT: 2(2.802597e-45), 31(4.344025e-44)
1910 ; EG-NEXT: ASHR * T3.Y, T0.Z, literal.x,
1911 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
1912 ; EG-NEXT: MOV T3.X, T0.Z,
1913 ; EG-NEXT: MOV T1.Z, T0.Y,
1914 ; EG-NEXT: ADD_INT * T2.W, KC0[2].Y, literal.x,
1915 ; EG-NEXT: 16(2.242078e-44), 0(0.000000e+00)
1916 ; EG-NEXT: LSHR T0.X, PV.W, literal.x,
1917 ; EG-NEXT: MOV * T3.Z, T0.W,
1918 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
1919 ;
1920 ; GFX9-HSA-LABEL: constant_sextload_v4i32_to_v4i64:
1921 ; GFX9-HSA: ; %bb.0:
1922 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1923 ; GFX9-HSA-NEXT: v_mov_b32_e32 v8, 0
1924 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1925 ; GFX9-HSA-NEXT: s_load_dwordx4 s[4:7], s[2:3], 0x0
1926 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
1927 ; GFX9-HSA-NEXT: s_ashr_i32 s2, s5, 31
1928 ; GFX9-HSA-NEXT: s_ashr_i32 s3, s4, 31
1929 ; GFX9-HSA-NEXT: s_ashr_i32 s8, s7, 31
1930 ; GFX9-HSA-NEXT: s_ashr_i32 s9, s6, 31
1931 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s6
1932 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s7
1933 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s4
1934 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s9
1935 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s8
1936 ; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s3
1937 ; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s5
1938 ; GFX9-HSA-NEXT: v_mov_b32_e32 v7, s2
1939 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[0:1] offset:16
1940 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[4:7], s[0:1]
1941 ; GFX9-HSA-NEXT: s_endpgm
1942 %ld = load <4 x i32>, ptr addrspace(4) %in
1943 %ext = sext <4 x i32> %ld to <4 x i64>
1944 store <4 x i64> %ext, ptr addrspace(1) %out
1945 ret void
1946 }
1948 define amdgpu_kernel void @constant_zextload_v8i32_to_v8i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
1949 ; GFX6-NOHSA-LABEL: constant_zextload_v8i32_to_v8i64:
1950 ; GFX6-NOHSA: ; %bb.0:
1951 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
1952 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1953 ; GFX6-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
1954 ; GFX6-NOHSA-NEXT: s_mov_b32 s11, 0xf000
1955 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, 0
1956 ; GFX6-NOHSA-NEXT: s_mov_b32 s10, -1
1957 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, v1
1958 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
1959 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6
1960 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s7
1961 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:48
1962 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
1963 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
1964 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s5
1965 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:32
1966 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
1967 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s2
1968 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s3
1969 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:16
1970 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
1971 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
1972 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s1
1973 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0
1974 ; GFX6-NOHSA-NEXT: s_endpgm
1975 ;
1976 ; GFX7-HSA-LABEL: constant_zextload_v8i32_to_v8i64:
1977 ; GFX7-HSA: ; %bb.0:
1978 ; GFX7-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
1979 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, 0
1980 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, v1
1981 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1982 ; GFX7-HSA-NEXT: s_load_dwordx8 s[4:11], s[2:3], 0x0
1983 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 48
1984 ; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0
1985 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3
1986 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2
1987 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 32
1988 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
1989 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10
1990 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11
1991 ; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0
1992 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
1993 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3
1994 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2
1995 ; GFX7-HSA-NEXT: s_add_u32 s2, s0, 16
1996 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
1997 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s9
1998 ; GFX7-HSA-NEXT: s_addc_u32 s3, s1, 0
1999 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2000 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3
2001 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6
2002 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7
2003 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2
2004 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2005 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s1
2006 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
2007 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5
2008 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s0
2009 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2010 ; GFX7-HSA-NEXT: s_endpgm
2011 ;
2012 ; GFX8-NOHSA-LABEL: constant_zextload_v8i32_to_v8i64:
2013 ; GFX8-NOHSA: ; %bb.0:
2014 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x24
2015 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, 0
2016 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, v1
2017 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2018 ; GFX8-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
2019 ; GFX8-NOHSA-NEXT: s_add_u32 s10, s8, 48
2020 ; GFX8-NOHSA-NEXT: s_addc_u32 s11, s9, 0
2021 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s10
2022 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s11
2023 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2024 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s6
2025 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s7
2026 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2027 ; GFX8-NOHSA-NEXT: s_nop 0
2028 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
2029 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s8, 32
2030 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s5
2031 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s9, 0
2032 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
2033 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
2034 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2035 ; GFX8-NOHSA-NEXT: s_nop 0
2036 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s2
2037 ; GFX8-NOHSA-NEXT: s_add_u32 s2, s8, 16
2038 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s3
2039 ; GFX8-NOHSA-NEXT: s_addc_u32 s3, s9, 0
2040 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s3
2041 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s2
2042 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2043 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
2044 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
2045 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s1
2046 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
2047 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2048 ; GFX8-NOHSA-NEXT: s_endpgm
2049 ;
2050 ; EG-LABEL: constant_zextload_v8i32_to_v8i64:
2051 ; EG: ; %bb.0:
2052 ; EG-NEXT: ALU 0, @12, KC0[CB0:0-32], KC1[]
2053 ; EG-NEXT: TEX 1 @8
2054 ; EG-NEXT: ALU 26, @13, KC0[CB0:0-32], KC1[]
2055 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T2.XYZW, T7.X, 0
2056 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T3.XYZW, T6.X, 0
2057 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T1.X, 0
2058 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T0.X, 1
2059 ; EG-NEXT: CF_END
2060 ; EG-NEXT: Fetch clause starting at 8:
2061 ; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #1
2062 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
2063 ; EG-NEXT: ALU clause starting at 12:
2064 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
2065 ; EG-NEXT: ALU clause starting at 13:
2066 ; EG-NEXT: MOV T2.X, T1.Z,
2067 ; EG-NEXT: MOV T2.Y, 0.0,
2068 ; EG-NEXT: MOV * T3.X, T1.X,
2069 ; EG-NEXT: MOV * T3.Y, 0.0,
2070 ; EG-NEXT: MOV T4.X, T0.Z,
2071 ; EG-NEXT: MOV T4.Y, 0.0,
2072 ; EG-NEXT: MOV * T5.X, T0.X,
2073 ; EG-NEXT: MOV T5.Y, 0.0,
2074 ; EG-NEXT: MOV T2.Z, T1.W,
2075 ; EG-NEXT: MOV T2.W, 0.0,
2076 ; EG-NEXT: MOV * T3.Z, T1.Y,
2077 ; EG-NEXT: MOV * T3.W, 0.0,
2078 ; EG-NEXT: MOV T4.Z, T0.W,
2079 ; EG-NEXT: MOV T4.W, 0.0,
2080 ; EG-NEXT: MOV * T5.Z, T0.Y,
2081 ; EG-NEXT: MOV * T5.W, 0.0,
2082 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
2083 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
2084 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
2085 ; EG-NEXT: LSHR T1.X, PV.W, literal.x,
2086 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
2087 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
2088 ; EG-NEXT: LSHR T6.X, PV.W, literal.x,
2089 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
2090 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
2091 ; EG-NEXT: LSHR * T7.X, PV.W, literal.x,
2092 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
2093 ;
2094 ; GFX9-HSA-LABEL: constant_zextload_v8i32_to_v8i64:
2095 ; GFX9-HSA: ; %bb.0:
2096 ; GFX9-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
2097 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, 0
2098 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, v1
2099 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
2100 ; GFX9-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
2101 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
2102 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s6
2103 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s7
2104 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[8:9] offset:48
2105 ; GFX9-HSA-NEXT: s_nop 0
2106 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
2107 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s5
2108 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[8:9] offset:32
2109 ; GFX9-HSA-NEXT: s_nop 0
2110 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
2111 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s3
2112 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[8:9] offset:16
2113 ; GFX9-HSA-NEXT: s_nop 0
2114 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s0
2115 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s1
2116 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[8:9]
2117 ; GFX9-HSA-NEXT: s_endpgm
2118 %ld = load <8 x i32>, ptr addrspace(4) %in
2119 %ext = zext <8 x i32> %ld to <8 x i64>
2120 store <8 x i64> %ext, ptr addrspace(1) %out
2121 ret void
2122 }
2124 define amdgpu_kernel void @constant_sextload_v8i32_to_v8i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
2125 ; GFX6-NOHSA-LABEL: constant_sextload_v8i32_to_v8i64:
2126 ; GFX6-NOHSA: ; %bb.0:
2127 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x9
2128 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2129 ; GFX6-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
2130 ; GFX6-NOHSA-NEXT: s_mov_b32 s11, 0xf000
2131 ; GFX6-NOHSA-NEXT: s_mov_b32 s10, -1
2132 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2133 ; GFX6-NOHSA-NEXT: s_ashr_i32 s12, s1, 31
2134 ; GFX6-NOHSA-NEXT: s_ashr_i32 s13, s0, 31
2135 ; GFX6-NOHSA-NEXT: s_ashr_i32 s14, s3, 31
2136 ; GFX6-NOHSA-NEXT: s_ashr_i32 s15, s2, 31
2137 ; GFX6-NOHSA-NEXT: s_ashr_i32 s16, s5, 31
2138 ; GFX6-NOHSA-NEXT: s_ashr_i32 s17, s7, 31
2139 ; GFX6-NOHSA-NEXT: s_ashr_i32 s18, s6, 31
2140 ; GFX6-NOHSA-NEXT: s_ashr_i32 s19, s4, 31
2141 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6
2142 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s7
2143 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s4
2144 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s5
2145 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s2
2146 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s3
2147 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s0
2148 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s1
2149 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s18
2150 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s17
2151 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[8:11], 0 offset:48
2152 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s19
2153 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s16
2154 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[8:11], 0 offset:32
2155 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s15
2156 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s14
2157 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[8:11], 0 offset:16
2158 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s13
2159 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s12
2160 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[8:11], 0
2161 ; GFX6-NOHSA-NEXT: s_endpgm
2162 ;
2163 ; GFX7-HSA-LABEL: constant_sextload_v8i32_to_v8i64:
2164 ; GFX7-HSA: ; %bb.0:
2165 ; GFX7-HSA-NEXT: s_load_dwordx4 s[8:11], s[4:5], 0x0
2166 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
2167 ; GFX7-HSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
2168 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
2169 ; GFX7-HSA-NEXT: s_ashr_i32 s10, s1, 31
2170 ; GFX7-HSA-NEXT: s_ashr_i32 s11, s0, 31
2171 ; GFX7-HSA-NEXT: s_ashr_i32 s12, s3, 31
2172 ; GFX7-HSA-NEXT: s_ashr_i32 s13, s2, 31
2173 ; GFX7-HSA-NEXT: s_ashr_i32 s14, s5, 31
2174 ; GFX7-HSA-NEXT: s_ashr_i32 s15, s4, 31
2175 ; GFX7-HSA-NEXT: s_ashr_i32 s16, s7, 31
2176 ; GFX7-HSA-NEXT: s_ashr_i32 s17, s6, 31
2177 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6
2178 ; GFX7-HSA-NEXT: s_add_u32 s6, s8, 48
2179 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7
2180 ; GFX7-HSA-NEXT: s_addc_u32 s7, s9, 0
2181 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6
2182 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s17
2183 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s16
2184 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7
2185 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2186 ; GFX7-HSA-NEXT: s_nop 0
2187 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
2188 ; GFX7-HSA-NEXT: s_add_u32 s4, s8, 32
2189 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5
2190 ; GFX7-HSA-NEXT: s_addc_u32 s5, s9, 0
2191 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
2192 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s15
2193 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s14
2194 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
2195 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2196 ; GFX7-HSA-NEXT: s_nop 0
2197 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2
2198 ; GFX7-HSA-NEXT: s_add_u32 s2, s8, 16
2199 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3
2200 ; GFX7-HSA-NEXT: s_addc_u32 s3, s9, 0
2201 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3
2202 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13
2203 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s12
2204 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2
2205 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2206 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8
2207 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
2208 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s11
2209 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s1
2210 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s10
2211 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
2212 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2213 ; GFX7-HSA-NEXT: s_endpgm
2214 ;
2215 ; GFX8-NOHSA-LABEL: constant_sextload_v8i32_to_v8i64:
2216 ; GFX8-NOHSA: ; %bb.0:
2217 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[8:11], s[0:1], 0x24
2218 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2219 ; GFX8-NOHSA-NEXT: s_load_dwordx8 s[0:7], s[10:11], 0x0
2220 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2221 ; GFX8-NOHSA-NEXT: s_ashr_i32 s10, s1, 31
2222 ; GFX8-NOHSA-NEXT: s_ashr_i32 s11, s0, 31
2223 ; GFX8-NOHSA-NEXT: s_ashr_i32 s12, s3, 31
2224 ; GFX8-NOHSA-NEXT: s_ashr_i32 s13, s2, 31
2225 ; GFX8-NOHSA-NEXT: s_ashr_i32 s14, s5, 31
2226 ; GFX8-NOHSA-NEXT: s_ashr_i32 s15, s4, 31
2227 ; GFX8-NOHSA-NEXT: s_ashr_i32 s16, s7, 31
2228 ; GFX8-NOHSA-NEXT: s_ashr_i32 s17, s6, 31
2229 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s6
2230 ; GFX8-NOHSA-NEXT: s_add_u32 s6, s8, 48
2231 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s7
2232 ; GFX8-NOHSA-NEXT: s_addc_u32 s7, s9, 0
2233 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s6
2234 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s17
2235 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s16
2236 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s7
2237 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2238 ; GFX8-NOHSA-NEXT: s_nop 0
2239 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
2240 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s8, 32
2241 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s5
2242 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s9, 0
2243 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
2244 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s15
2245 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s14
2246 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
2247 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2248 ; GFX8-NOHSA-NEXT: s_nop 0
2249 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s2
2250 ; GFX8-NOHSA-NEXT: s_add_u32 s2, s8, 16
2251 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s3
2252 ; GFX8-NOHSA-NEXT: s_addc_u32 s3, s9, 0
2253 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s3
2254 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s13
2255 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s12
2256 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s2
2257 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2258 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
2259 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
2260 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s11
2261 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s1
2262 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s10
2263 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
2264 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2265 ; GFX8-NOHSA-NEXT: s_endpgm
2266 ;
2267 ; EG-LABEL: constant_sextload_v8i32_to_v8i64:
2268 ; EG: ; %bb.0:
2269 ; EG-NEXT: ALU 0, @12, KC0[CB0:0-32], KC1[]
2270 ; EG-NEXT: TEX 1 @8
2271 ; EG-NEXT: ALU 31, @13, KC0[CB0:0-32], KC1[]
2272 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T0.X, 0
2273 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T5.X, 0
2274 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T3.X, 0
2275 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T2.X, 1
2276 ; EG-NEXT: CF_END
2277 ; EG-NEXT: Fetch clause starting at 8:
2278 ; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 16, #1
2279 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
2280 ; EG-NEXT: ALU clause starting at 12:
2281 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
2282 ; EG-NEXT: ALU clause starting at 13:
2283 ; EG-NEXT: LSHR T2.X, KC0[2].Y, literal.x,
2284 ; EG-NEXT: ADD_INT * T2.W, KC0[2].Y, literal.y,
2285 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
2286 ; EG-NEXT: LSHR T3.X, PV.W, literal.x,
2287 ; EG-NEXT: ADD_INT T2.W, KC0[2].Y, literal.y,
2288 ; EG-NEXT: ASHR * T4.W, T0.Y, literal.z,
2289 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
2290 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2291 ; EG-NEXT: LSHR T5.X, PV.W, literal.x,
2292 ; EG-NEXT: ASHR T4.Y, T0.X, literal.y,
2293 ; EG-NEXT: ASHR T6.W, T0.W, literal.y,
2294 ; EG-NEXT: MOV * T4.X, T0.X,
2295 ; EG-NEXT: 2(2.802597e-45), 31(4.344025e-44)
2296 ; EG-NEXT: ASHR T6.Y, T0.Z, literal.x,
2297 ; EG-NEXT: ASHR * T7.W, T1.Y, literal.x,
2298 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2299 ; EG-NEXT: MOV T6.X, T0.Z,
2300 ; EG-NEXT: ASHR T7.Y, T1.X, literal.x,
2301 ; EG-NEXT: MOV T4.Z, T0.Y,
2302 ; EG-NEXT: ASHR T8.W, T1.W, literal.x,
2303 ; EG-NEXT: MOV * T7.X, T1.X,
2304 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2305 ; EG-NEXT: ASHR T8.Y, T1.Z, literal.x,
2306 ; EG-NEXT: MOV * T6.Z, T0.W,
2307 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2308 ; EG-NEXT: MOV T8.X, T1.Z,
2309 ; EG-NEXT: MOV T7.Z, T1.Y,
2310 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
2311 ; EG-NEXT: 48(6.726233e-44), 0(0.000000e+00)
2312 ; EG-NEXT: LSHR T0.X, PV.W, literal.x,
2313 ; EG-NEXT: MOV * T8.Z, T1.W,
2314 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
2315 ;
2316 ; GFX9-HSA-LABEL: constant_sextload_v8i32_to_v8i64:
2317 ; GFX9-HSA: ; %bb.0:
2318 ; GFX9-HSA-NEXT: s_load_dwordx4 s[0:3], s[4:5], 0x0
2319 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, 0
2320 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
2321 ; GFX9-HSA-NEXT: s_load_dwordx8 s[4:11], s[2:3], 0x0
2322 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
2323 ; GFX9-HSA-NEXT: s_ashr_i32 s16, s11, 31
2324 ; GFX9-HSA-NEXT: s_ashr_i32 s17, s10, 31
2325 ; GFX9-HSA-NEXT: s_ashr_i32 s14, s9, 31
2326 ; GFX9-HSA-NEXT: s_ashr_i32 s15, s8, 31
2327 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s10
2328 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s17
2329 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s11
2330 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s16
2331 ; GFX9-HSA-NEXT: s_ashr_i32 s12, s7, 31
2332 ; GFX9-HSA-NEXT: s_ashr_i32 s13, s6, 31
2333 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1] offset:48
2334 ; GFX9-HSA-NEXT: s_ashr_i32 s2, s5, 31
2335 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s8
2336 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s15
2337 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s9
2338 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s14
2339 ; GFX9-HSA-NEXT: s_ashr_i32 s3, s4, 31
2340 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1] offset:32
2341 ; GFX9-HSA-NEXT: s_nop 0
2342 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s6
2343 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s13
2344 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s7
2345 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s12
2346 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1] offset:16
2347 ; GFX9-HSA-NEXT: s_nop 0
2348 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
2349 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s3
2350 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s5
2351 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s2
2352 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[0:1]
2353 ; GFX9-HSA-NEXT: s_endpgm
2354 %ld = load <8 x i32>, ptr addrspace(4) %in
2355 %ext = sext <8 x i32> %ld to <8 x i64>
2356 store <8 x i64> %ext, ptr addrspace(1) %out
2357 ret void
2358 }
2360 define amdgpu_kernel void @constant_sextload_v16i32_to_v16i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
2361 ; GFX6-NOHSA-LABEL: constant_sextload_v16i32_to_v16i64:
2362 ; GFX6-NOHSA: ; %bb.0:
2363 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[16:19], s[0:1], 0x9
2364 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2365 ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
2366 ; GFX6-NOHSA-NEXT: s_mov_b32 s19, 0xf000
2367 ; GFX6-NOHSA-NEXT: s_mov_b32 s18, -1
2368 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2369 ; GFX6-NOHSA-NEXT: s_ashr_i32 s20, s1, 31
2370 ; GFX6-NOHSA-NEXT: s_ashr_i32 s21, s0, 31
2371 ; GFX6-NOHSA-NEXT: s_ashr_i32 s22, s3, 31
2372 ; GFX6-NOHSA-NEXT: s_ashr_i32 s23, s2, 31
2373 ; GFX6-NOHSA-NEXT: s_ashr_i32 s24, s5, 31
2374 ; GFX6-NOHSA-NEXT: s_ashr_i32 s25, s4, 31
2375 ; GFX6-NOHSA-NEXT: s_ashr_i32 s26, s7, 31
2376 ; GFX6-NOHSA-NEXT: s_ashr_i32 s27, s6, 31
2377 ; GFX6-NOHSA-NEXT: s_ashr_i32 s28, s9, 31
2378 ; GFX6-NOHSA-NEXT: s_ashr_i32 s29, s8, 31
2379 ; GFX6-NOHSA-NEXT: s_ashr_i32 s30, s11, 31
2380 ; GFX6-NOHSA-NEXT: s_ashr_i32 s31, s10, 31
2381 ; GFX6-NOHSA-NEXT: s_ashr_i32 s33, s13, 31
2382 ; GFX6-NOHSA-NEXT: s_ashr_i32 s34, s15, 31
2383 ; GFX6-NOHSA-NEXT: s_ashr_i32 s35, s14, 31
2384 ; GFX6-NOHSA-NEXT: s_ashr_i32 s36, s12, 31
2385 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s14
2386 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s15
2387 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s12
2388 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s13
2389 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s10
2390 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s11
2391 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s8
2392 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s9
2393 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s6
2394 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s7
2395 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v20, s4
2396 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v22, s5
2397 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v24, s2
2398 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v26, s3
2399 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s35
2400 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s34
2401 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:112
2402 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
2403 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
2404 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s1
2405 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s36
2406 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s33
2407 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[16:19], 0 offset:96
2408 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s31
2409 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s30
2410 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[16:19], 0 offset:80
2411 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s29
2412 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s28
2413 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[16:19], 0 offset:64
2414 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s27
2415 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s26
2416 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[16:19], 0 offset:48
2417 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v21, s25
2418 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v23, s24
2419 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[20:23], off, s[16:19], 0 offset:32
2420 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v25, s23
2421 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v27, s22
2422 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[24:27], off, s[16:19], 0 offset:16
2423 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s21
2424 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s20
2425 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0
2426 ; GFX6-NOHSA-NEXT: s_endpgm
2427 ;
2428 ; GFX7-HSA-LABEL: constant_sextload_v16i32_to_v16i64:
2429 ; GFX7-HSA: ; %bb.0:
2430 ; GFX7-HSA-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x0
2431 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
2432 ; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
2433 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
2434 ; GFX7-HSA-NEXT: s_ashr_i32 s18, s1, 31
2435 ; GFX7-HSA-NEXT: s_ashr_i32 s19, s0, 31
2436 ; GFX7-HSA-NEXT: s_ashr_i32 s20, s3, 31
2437 ; GFX7-HSA-NEXT: s_ashr_i32 s21, s2, 31
2438 ; GFX7-HSA-NEXT: s_ashr_i32 s22, s5, 31
2439 ; GFX7-HSA-NEXT: s_ashr_i32 s23, s4, 31
2440 ; GFX7-HSA-NEXT: s_ashr_i32 s24, s7, 31
2441 ; GFX7-HSA-NEXT: s_ashr_i32 s25, s6, 31
2442 ; GFX7-HSA-NEXT: s_ashr_i32 s26, s9, 31
2443 ; GFX7-HSA-NEXT: s_ashr_i32 s27, s8, 31
2444 ; GFX7-HSA-NEXT: s_ashr_i32 s28, s11, 31
2445 ; GFX7-HSA-NEXT: s_ashr_i32 s29, s10, 31
2446 ; GFX7-HSA-NEXT: s_ashr_i32 s30, s13, 31
2447 ; GFX7-HSA-NEXT: s_ashr_i32 s31, s12, 31
2448 ; GFX7-HSA-NEXT: s_ashr_i32 s33, s15, 31
2449 ; GFX7-HSA-NEXT: s_ashr_i32 s34, s14, 31
2450 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14
2451 ; GFX7-HSA-NEXT: s_add_u32 s14, s16, 0x70
2452 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s15
2453 ; GFX7-HSA-NEXT: s_addc_u32 s15, s17, 0
2454 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s14
2455 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s34
2456 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s33
2457 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s15
2458 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2459 ; GFX7-HSA-NEXT: s_nop 0
2460 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12
2461 ; GFX7-HSA-NEXT: s_add_u32 s12, s16, 0x60
2462 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s13
2463 ; GFX7-HSA-NEXT: s_addc_u32 s13, s17, 0
2464 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12
2465 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s31
2466 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s30
2467 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13
2468 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2469 ; GFX7-HSA-NEXT: s_nop 0
2470 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10
2471 ; GFX7-HSA-NEXT: s_add_u32 s10, s16, 0x50
2472 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11
2473 ; GFX7-HSA-NEXT: s_addc_u32 s11, s17, 0
2474 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10
2475 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s29
2476 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s28
2477 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11
2478 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2479 ; GFX7-HSA-NEXT: s_nop 0
2480 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
2481 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 64
2482 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s9
2483 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0
2484 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8
2485 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s27
2486 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s26
2487 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
2488 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2489 ; GFX7-HSA-NEXT: s_nop 0
2490 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6
2491 ; GFX7-HSA-NEXT: s_add_u32 s6, s16, 48
2492 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7
2493 ; GFX7-HSA-NEXT: s_addc_u32 s7, s17, 0
2494 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6
2495 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s25
2496 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s24
2497 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7
2498 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2499 ; GFX7-HSA-NEXT: s_nop 0
2500 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
2501 ; GFX7-HSA-NEXT: s_add_u32 s4, s16, 32
2502 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5
2503 ; GFX7-HSA-NEXT: s_addc_u32 s5, s17, 0
2504 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
2505 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s23
2506 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s22
2507 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
2508 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2509 ; GFX7-HSA-NEXT: s_nop 0
2510 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2
2511 ; GFX7-HSA-NEXT: s_add_u32 s2, s16, 16
2512 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3
2513 ; GFX7-HSA-NEXT: s_addc_u32 s3, s17, 0
2514 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3
2515 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s21
2516 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s20
2517 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2
2518 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2519 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16
2520 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
2521 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19
2522 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s1
2523 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s18
2524 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17
2525 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2526 ; GFX7-HSA-NEXT: s_endpgm
2527 ;
2528 ; GFX8-NOHSA-LABEL: constant_sextload_v16i32_to_v16i64:
2529 ; GFX8-NOHSA: ; %bb.0:
2530 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[16:19], s[0:1], 0x24
2531 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2532 ; GFX8-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
2533 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2534 ; GFX8-NOHSA-NEXT: s_ashr_i32 s18, s1, 31
2535 ; GFX8-NOHSA-NEXT: s_ashr_i32 s19, s0, 31
2536 ; GFX8-NOHSA-NEXT: s_ashr_i32 s20, s3, 31
2537 ; GFX8-NOHSA-NEXT: s_ashr_i32 s21, s2, 31
2538 ; GFX8-NOHSA-NEXT: s_ashr_i32 s22, s5, 31
2539 ; GFX8-NOHSA-NEXT: s_ashr_i32 s23, s4, 31
2540 ; GFX8-NOHSA-NEXT: s_ashr_i32 s24, s7, 31
2541 ; GFX8-NOHSA-NEXT: s_ashr_i32 s25, s6, 31
2542 ; GFX8-NOHSA-NEXT: s_ashr_i32 s26, s9, 31
2543 ; GFX8-NOHSA-NEXT: s_ashr_i32 s27, s8, 31
2544 ; GFX8-NOHSA-NEXT: s_ashr_i32 s28, s11, 31
2545 ; GFX8-NOHSA-NEXT: s_ashr_i32 s29, s10, 31
2546 ; GFX8-NOHSA-NEXT: s_ashr_i32 s30, s13, 31
2547 ; GFX8-NOHSA-NEXT: s_ashr_i32 s31, s12, 31
2548 ; GFX8-NOHSA-NEXT: s_ashr_i32 s33, s15, 31
2549 ; GFX8-NOHSA-NEXT: s_ashr_i32 s34, s14, 31
2550 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s14
2551 ; GFX8-NOHSA-NEXT: s_add_u32 s14, s16, 0x70
2552 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s15
2553 ; GFX8-NOHSA-NEXT: s_addc_u32 s15, s17, 0
2554 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s14
2555 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s34
2556 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s33
2557 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s15
2558 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2559 ; GFX8-NOHSA-NEXT: s_nop 0
2560 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s12
2561 ; GFX8-NOHSA-NEXT: s_add_u32 s12, s16, 0x60
2562 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s13
2563 ; GFX8-NOHSA-NEXT: s_addc_u32 s13, s17, 0
2564 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s12
2565 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s31
2566 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s30
2567 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s13
2568 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2569 ; GFX8-NOHSA-NEXT: s_nop 0
2570 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s10
2571 ; GFX8-NOHSA-NEXT: s_add_u32 s10, s16, 0x50
2572 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s11
2573 ; GFX8-NOHSA-NEXT: s_addc_u32 s11, s17, 0
2574 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s10
2575 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s29
2576 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s28
2577 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s11
2578 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2579 ; GFX8-NOHSA-NEXT: s_nop 0
2580 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s8
2581 ; GFX8-NOHSA-NEXT: s_add_u32 s8, s16, 64
2582 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s9
2583 ; GFX8-NOHSA-NEXT: s_addc_u32 s9, s17, 0
2584 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
2585 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s27
2586 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s26
2587 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
2588 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2589 ; GFX8-NOHSA-NEXT: s_nop 0
2590 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s6
2591 ; GFX8-NOHSA-NEXT: s_add_u32 s6, s16, 48
2592 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s7
2593 ; GFX8-NOHSA-NEXT: s_addc_u32 s7, s17, 0
2594 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s6
2595 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s25
2596 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s24
2597 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s7
2598 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2599 ; GFX8-NOHSA-NEXT: s_nop 0
2600 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
2601 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s16, 32
2602 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s5
2603 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s17, 0
2604 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
2605 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s23
2606 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s22
2607 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
2608 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2609 ; GFX8-NOHSA-NEXT: s_nop 0
2610 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s2
2611 ; GFX8-NOHSA-NEXT: s_add_u32 s2, s16, 16
2612 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s3
2613 ; GFX8-NOHSA-NEXT: s_addc_u32 s3, s17, 0
2614 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s3
2615 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s21
2616 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s20
2617 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s2
2618 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2619 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s16
2620 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
2621 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s19
2622 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s1
2623 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s18
2624 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s17
2625 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2626 ; GFX8-NOHSA-NEXT: s_endpgm
2627 ;
2628 ; EG-LABEL: constant_sextload_v16i32_to_v16i64:
2629 ; EG: ; %bb.0:
2630 ; EG-NEXT: ALU 0, @20, KC0[CB0:0-32], KC1[]
2631 ; EG-NEXT: TEX 3 @12
2632 ; EG-NEXT: ALU 63, @21, KC0[CB0:0-32], KC1[]
2633 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T16.XYZW, T1.X, 0
2634 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T3.XYZW, T11.X, 0
2635 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T15.XYZW, T9.X, 0
2636 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T0.XYZW, T8.X, 0
2637 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T7.X, 0
2638 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T6.X, 0
2639 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T5.X, 0
2640 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T4.X, 1
2641 ; EG-NEXT: CF_END
2642 ; EG-NEXT: Fetch clause starting at 12:
2643 ; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 48, #1
2644 ; EG-NEXT: VTX_READ_128 T2.XYZW, T0.X, 32, #1
2645 ; EG-NEXT: VTX_READ_128 T3.XYZW, T0.X, 16, #1
2646 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 0, #1
2647 ; EG-NEXT: ALU clause starting at 20:
2648 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
2649 ; EG-NEXT: ALU clause starting at 21:
2650 ; EG-NEXT: LSHR T4.X, KC0[2].Y, literal.x,
2651 ; EG-NEXT: ADD_INT * T4.W, KC0[2].Y, literal.y,
2652 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
2653 ; EG-NEXT: LSHR T5.X, PV.W, literal.x,
2654 ; EG-NEXT: ADD_INT * T4.W, KC0[2].Y, literal.y,
2655 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
2656 ; EG-NEXT: LSHR T6.X, PV.W, literal.x,
2657 ; EG-NEXT: ADD_INT * T4.W, KC0[2].Y, literal.y,
2658 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
2659 ; EG-NEXT: LSHR T7.X, PV.W, literal.x,
2660 ; EG-NEXT: ADD_INT * T4.W, KC0[2].Y, literal.y,
2661 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
2662 ; EG-NEXT: LSHR T8.X, PV.W, literal.x,
2663 ; EG-NEXT: ADD_INT * T4.W, KC0[2].Y, literal.y,
2664 ; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)
2665 ; EG-NEXT: LSHR T9.X, PV.W, literal.x,
2666 ; EG-NEXT: ADD_INT T4.W, KC0[2].Y, literal.y,
2667 ; EG-NEXT: ASHR * T10.W, T0.Y, literal.z,
2668 ; EG-NEXT: 2(2.802597e-45), 96(1.345247e-43)
2669 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2670 ; EG-NEXT: LSHR T11.X, PV.W, literal.x,
2671 ; EG-NEXT: ASHR T10.Y, T0.X, literal.y,
2672 ; EG-NEXT: ASHR T12.W, T0.W, literal.y,
2673 ; EG-NEXT: MOV * T10.X, T0.X,
2674 ; EG-NEXT: 2(2.802597e-45), 31(4.344025e-44)
2675 ; EG-NEXT: ASHR T12.Y, T0.Z, literal.x,
2676 ; EG-NEXT: ASHR * T13.W, T3.Y, literal.x,
2677 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2678 ; EG-NEXT: MOV T12.X, T0.Z,
2679 ; EG-NEXT: ASHR T13.Y, T3.X, literal.x,
2680 ; EG-NEXT: MOV T10.Z, T0.Y,
2681 ; EG-NEXT: ASHR T14.W, T3.W, literal.x,
2682 ; EG-NEXT: MOV * T13.X, T3.X,
2683 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2684 ; EG-NEXT: ASHR T14.Y, T3.Z, literal.x,
2685 ; EG-NEXT: MOV T12.Z, T0.W,
2686 ; EG-NEXT: ASHR * T0.W, T2.Y, literal.x,
2687 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2688 ; EG-NEXT: MOV T14.X, T3.Z,
2689 ; EG-NEXT: ASHR T0.Y, T2.X, literal.x,
2690 ; EG-NEXT: MOV T13.Z, T3.Y,
2691 ; EG-NEXT: ASHR T15.W, T2.W, literal.x,
2692 ; EG-NEXT: MOV * T0.X, T2.X,
2693 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2694 ; EG-NEXT: ASHR T15.Y, T2.Z, literal.x,
2695 ; EG-NEXT: MOV T14.Z, T3.W,
2696 ; EG-NEXT: ASHR * T3.W, T1.Y, literal.x,
2697 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2698 ; EG-NEXT: MOV T15.X, T2.Z,
2699 ; EG-NEXT: ASHR T3.Y, T1.X, literal.x,
2700 ; EG-NEXT: MOV T0.Z, T2.Y,
2701 ; EG-NEXT: ASHR T16.W, T1.W, literal.x,
2702 ; EG-NEXT: MOV * T3.X, T1.X,
2703 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2704 ; EG-NEXT: ASHR T16.Y, T1.Z, literal.x,
2705 ; EG-NEXT: MOV * T15.Z, T2.W,
2706 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
2707 ; EG-NEXT: MOV T16.X, T1.Z,
2708 ; EG-NEXT: MOV T3.Z, T1.Y,
2709 ; EG-NEXT: ADD_INT * T2.W, KC0[2].Y, literal.x,
2710 ; EG-NEXT: 112(1.569454e-43), 0(0.000000e+00)
2711 ; EG-NEXT: LSHR T1.X, PV.W, literal.x,
2712 ; EG-NEXT: MOV * T16.Z, T1.W,
2713 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
2714 ;
2715 ; GFX9-HSA-LABEL: constant_sextload_v16i32_to_v16i64:
2716 ; GFX9-HSA: ; %bb.0:
2717 ; GFX9-HSA-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x0
2718 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, 0
2719 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
2720 ; GFX9-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
2721 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
2722 ; GFX9-HSA-NEXT: s_ashr_i32 s33, s15, 31
2723 ; GFX9-HSA-NEXT: s_ashr_i32 s34, s14, 31
2724 ; GFX9-HSA-NEXT: s_ashr_i32 s30, s13, 31
2725 ; GFX9-HSA-NEXT: s_ashr_i32 s31, s12, 31
2726 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s14
2727 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s34
2728 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s15
2729 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s33
2730 ; GFX9-HSA-NEXT: s_ashr_i32 s28, s11, 31
2731 ; GFX9-HSA-NEXT: s_ashr_i32 s29, s10, 31
2732 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:112
2733 ; GFX9-HSA-NEXT: s_ashr_i32 s26, s9, 31
2734 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s12
2735 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s31
2736 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s13
2737 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s30
2738 ; GFX9-HSA-NEXT: s_ashr_i32 s27, s8, 31
2739 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:96
2740 ; GFX9-HSA-NEXT: s_ashr_i32 s24, s7, 31
2741 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s10
2742 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s29
2743 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s11
2744 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s28
2745 ; GFX9-HSA-NEXT: s_ashr_i32 s25, s6, 31
2746 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:80
2747 ; GFX9-HSA-NEXT: s_ashr_i32 s22, s5, 31
2748 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s8
2749 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s27
2750 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s9
2751 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s26
2752 ; GFX9-HSA-NEXT: s_ashr_i32 s23, s4, 31
2753 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:64
2754 ; GFX9-HSA-NEXT: s_ashr_i32 s20, s3, 31
2755 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s6
2756 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s25
2757 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s7
2758 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s24
2759 ; GFX9-HSA-NEXT: s_ashr_i32 s21, s2, 31
2760 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:48
2761 ; GFX9-HSA-NEXT: s_ashr_i32 s18, s1, 31
2762 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
2763 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s23
2764 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s5
2765 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s22
2766 ; GFX9-HSA-NEXT: s_ashr_i32 s19, s0, 31
2767 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:32
2768 ; GFX9-HSA-NEXT: s_nop 0
2769 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
2770 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s21
2771 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s3
2772 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s20
2773 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17] offset:16
2774 ; GFX9-HSA-NEXT: s_nop 0
2775 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s0
2776 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s19
2777 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s1
2778 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s18
2779 ; GFX9-HSA-NEXT: global_store_dwordx4 v4, v[0:3], s[16:17]
2780 ; GFX9-HSA-NEXT: s_endpgm
2781 %ld = load <16 x i32>, ptr addrspace(4) %in
2782 %ext = sext <16 x i32> %ld to <16 x i64>
2783 store <16 x i64> %ext, ptr addrspace(1) %out
2784 ret void
2785 }
2787 define amdgpu_kernel void @constant_zextload_v16i32_to_v16i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
2788 ; GFX6-NOHSA-LABEL: constant_zextload_v16i32_to_v16i64:
2789 ; GFX6-NOHSA: ; %bb.0:
2790 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[16:19], s[0:1], 0x9
2791 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2792 ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
2793 ; GFX6-NOHSA-NEXT: s_mov_b32 s19, 0xf000
2794 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, 0
2795 ; GFX6-NOHSA-NEXT: s_mov_b32 s18, -1
2796 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, v1
2797 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2798 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s14
2799 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s15
2800 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:112
2801 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
2802 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12
2803 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s13
2804 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:96
2805 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
2806 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s10
2807 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s11
2808 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:80
2809 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
2810 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s8
2811 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s9
2812 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:64
2813 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
2814 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6
2815 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s7
2816 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:48
2817 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
2818 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
2819 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s5
2820 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:32
2821 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
2822 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s2
2823 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s3
2824 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0 offset:16
2825 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
2826 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
2827 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s1
2828 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[16:19], 0
2829 ; GFX6-NOHSA-NEXT: s_endpgm
2830 ;
2831 ; GFX7-HSA-LABEL: constant_zextload_v16i32_to_v16i64:
2832 ; GFX7-HSA: ; %bb.0:
2833 ; GFX7-HSA-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x0
2834 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, 0
2835 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, v1
2836 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
2837 ; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
2838 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0x70
2839 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0
2840 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s18
2841 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s19
2842 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
2843 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14
2844 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s15
2845 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2846 ; GFX7-HSA-NEXT: s_nop 0
2847 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12
2848 ; GFX7-HSA-NEXT: s_add_u32 s12, s16, 0x60
2849 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s13
2850 ; GFX7-HSA-NEXT: s_addc_u32 s13, s17, 0
2851 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12
2852 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13
2853 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2854 ; GFX7-HSA-NEXT: s_nop 0
2855 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10
2856 ; GFX7-HSA-NEXT: s_add_u32 s10, s16, 0x50
2857 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11
2858 ; GFX7-HSA-NEXT: s_addc_u32 s11, s17, 0
2859 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10
2860 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11
2861 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2862 ; GFX7-HSA-NEXT: s_nop 0
2863 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
2864 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 64
2865 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s9
2866 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0
2867 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8
2868 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
2869 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2870 ; GFX7-HSA-NEXT: s_nop 0
2871 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6
2872 ; GFX7-HSA-NEXT: s_add_u32 s6, s16, 48
2873 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7
2874 ; GFX7-HSA-NEXT: s_addc_u32 s7, s17, 0
2875 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6
2876 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7
2877 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2878 ; GFX7-HSA-NEXT: s_nop 0
2879 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
2880 ; GFX7-HSA-NEXT: s_add_u32 s4, s16, 32
2881 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5
2882 ; GFX7-HSA-NEXT: s_addc_u32 s5, s17, 0
2883 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
2884 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
2885 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2886 ; GFX7-HSA-NEXT: s_nop 0
2887 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2
2888 ; GFX7-HSA-NEXT: s_add_u32 s2, s16, 16
2889 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3
2890 ; GFX7-HSA-NEXT: s_addc_u32 s3, s17, 0
2891 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3
2892 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2
2893 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2894 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16
2895 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
2896 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s1
2897 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17
2898 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2899 ; GFX7-HSA-NEXT: s_endpgm
2900 ;
2901 ; GFX8-NOHSA-LABEL: constant_zextload_v16i32_to_v16i64:
2902 ; GFX8-NOHSA: ; %bb.0:
2903 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[16:19], s[0:1], 0x24
2904 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, 0
2905 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, v1
2906 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2907 ; GFX8-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
2908 ; GFX8-NOHSA-NEXT: s_add_u32 s18, s16, 0x70
2909 ; GFX8-NOHSA-NEXT: s_addc_u32 s19, s17, 0
2910 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s18
2911 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s19
2912 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
2913 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s14
2914 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s15
2915 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2916 ; GFX8-NOHSA-NEXT: s_nop 0
2917 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s12
2918 ; GFX8-NOHSA-NEXT: s_add_u32 s12, s16, 0x60
2919 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s13
2920 ; GFX8-NOHSA-NEXT: s_addc_u32 s13, s17, 0
2921 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s12
2922 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s13
2923 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2924 ; GFX8-NOHSA-NEXT: s_nop 0
2925 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s10
2926 ; GFX8-NOHSA-NEXT: s_add_u32 s10, s16, 0x50
2927 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s11
2928 ; GFX8-NOHSA-NEXT: s_addc_u32 s11, s17, 0
2929 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s10
2930 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s11
2931 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2932 ; GFX8-NOHSA-NEXT: s_nop 0
2933 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s8
2934 ; GFX8-NOHSA-NEXT: s_add_u32 s8, s16, 64
2935 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s9
2936 ; GFX8-NOHSA-NEXT: s_addc_u32 s9, s17, 0
2937 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
2938 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
2939 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2940 ; GFX8-NOHSA-NEXT: s_nop 0
2941 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s6
2942 ; GFX8-NOHSA-NEXT: s_add_u32 s6, s16, 48
2943 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s7
2944 ; GFX8-NOHSA-NEXT: s_addc_u32 s7, s17, 0
2945 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s6
2946 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s7
2947 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2948 ; GFX8-NOHSA-NEXT: s_nop 0
2949 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
2950 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s16, 32
2951 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s5
2952 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s17, 0
2953 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
2954 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
2955 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2956 ; GFX8-NOHSA-NEXT: s_nop 0
2957 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s2
2958 ; GFX8-NOHSA-NEXT: s_add_u32 s2, s16, 16
2959 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s3
2960 ; GFX8-NOHSA-NEXT: s_addc_u32 s3, s17, 0
2961 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s3
2962 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s2
2963 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2964 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s16
2965 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
2966 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s1
2967 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s17
2968 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
2969 ; GFX8-NOHSA-NEXT: s_endpgm
2970 ;
2971 ; EG-LABEL: constant_zextload_v16i32_to_v16i64:
2972 ; EG: ; %bb.0:
2973 ; EG-NEXT: ALU 0, @20, KC0[CB0:0-32], KC1[]
2974 ; EG-NEXT: TEX 3 @12
2975 ; EG-NEXT: ALU 54, @21, KC0[CB0:0-32], KC1[]
2976 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T15.X, 0
2977 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T14.X, 0
2978 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T13.X, 0
2979 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T12.X, 0
2980 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T3.X, 0
2981 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T2.X, 0
2982 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T1.X, 0
2983 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T0.X, 1
2984 ; EG-NEXT: CF_END
2985 ; EG-NEXT: Fetch clause starting at 12:
2986 ; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 48, #1
2987 ; EG-NEXT: VTX_READ_128 T2.XYZW, T0.X, 0, #1
2988 ; EG-NEXT: VTX_READ_128 T3.XYZW, T0.X, 16, #1
2989 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 32, #1
2990 ; EG-NEXT: ALU clause starting at 20:
2991 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
2992 ; EG-NEXT: ALU clause starting at 21:
2993 ; EG-NEXT: MOV T4.X, T1.Z,
2994 ; EG-NEXT: MOV T4.Y, 0.0,
2995 ; EG-NEXT: MOV * T5.X, T1.X,
2996 ; EG-NEXT: MOV * T5.Y, 0.0,
2997 ; EG-NEXT: MOV T6.X, T0.Z,
2998 ; EG-NEXT: MOV T6.Y, 0.0,
2999 ; EG-NEXT: MOV * T7.X, T0.X,
3000 ; EG-NEXT: MOV * T7.Y, 0.0,
3001 ; EG-NEXT: MOV T8.X, T3.Z,
3002 ; EG-NEXT: MOV T8.Y, 0.0,
3003 ; EG-NEXT: MOV * T9.X, T3.X,
3004 ; EG-NEXT: MOV * T9.Y, 0.0,
3005 ; EG-NEXT: MOV T10.X, T2.Z,
3006 ; EG-NEXT: MOV T10.Y, 0.0,
3007 ; EG-NEXT: MOV * T11.X, T2.X,
3008 ; EG-NEXT: MOV T11.Y, 0.0,
3009 ; EG-NEXT: MOV T4.Z, T1.W,
3010 ; EG-NEXT: MOV T4.W, 0.0,
3011 ; EG-NEXT: MOV * T5.Z, T1.Y,
3012 ; EG-NEXT: MOV * T5.W, 0.0,
3013 ; EG-NEXT: MOV T6.Z, T0.W,
3014 ; EG-NEXT: MOV T6.W, 0.0,
3015 ; EG-NEXT: MOV * T7.Z, T0.Y,
3016 ; EG-NEXT: MOV * T7.W, 0.0,
3017 ; EG-NEXT: MOV T8.Z, T3.W,
3018 ; EG-NEXT: MOV T8.W, 0.0,
3019 ; EG-NEXT: MOV * T9.Z, T3.Y,
3020 ; EG-NEXT: MOV * T9.W, 0.0,
3021 ; EG-NEXT: MOV T10.Z, T2.W,
3022 ; EG-NEXT: MOV T10.W, 0.0,
3023 ; EG-NEXT: MOV * T11.Z, T2.Y,
3024 ; EG-NEXT: MOV * T11.W, 0.0,
3025 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
3026 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3027 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
3028 ; EG-NEXT: LSHR T1.X, PV.W, literal.x,
3029 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3030 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
3031 ; EG-NEXT: LSHR T2.X, PV.W, literal.x,
3032 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3033 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
3034 ; EG-NEXT: LSHR T3.X, PV.W, literal.x,
3035 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3036 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
3037 ; EG-NEXT: LSHR T12.X, PV.W, literal.x,
3038 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3039 ; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)
3040 ; EG-NEXT: LSHR T13.X, PV.W, literal.x,
3041 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3042 ; EG-NEXT: 2(2.802597e-45), 96(1.345247e-43)
3043 ; EG-NEXT: LSHR T14.X, PV.W, literal.x,
3044 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3045 ; EG-NEXT: 2(2.802597e-45), 112(1.569454e-43)
3046 ; EG-NEXT: LSHR * T15.X, PV.W, literal.x,
3047 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3048 ;
3049 ; GFX9-HSA-LABEL: constant_zextload_v16i32_to_v16i64:
3050 ; GFX9-HSA: ; %bb.0:
3051 ; GFX9-HSA-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x0
3052 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, 0
3053 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, v1
3054 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
3055 ; GFX9-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
3056 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
3057 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s14
3058 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s15
3059 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[16:17] offset:112
3060 ; GFX9-HSA-NEXT: s_nop 0
3061 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s12
3062 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s13
3063 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[16:17] offset:96
3064 ; GFX9-HSA-NEXT: s_nop 0
3065 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s10
3066 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s11
3067 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[16:17] offset:80
3068 ; GFX9-HSA-NEXT: s_nop 0
3069 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s8
3070 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s9
3071 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[16:17] offset:64
3072 ; GFX9-HSA-NEXT: s_nop 0
3073 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s6
3074 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s7
3075 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[16:17] offset:48
3076 ; GFX9-HSA-NEXT: s_nop 0
3077 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
3078 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s5
3079 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[16:17] offset:32
3080 ; GFX9-HSA-NEXT: s_nop 0
3081 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
3082 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s3
3083 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[16:17] offset:16
3084 ; GFX9-HSA-NEXT: s_nop 0
3085 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s0
3086 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s1
3087 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[16:17]
3088 ; GFX9-HSA-NEXT: s_endpgm
3089 %ld = load <16 x i32>, ptr addrspace(4) %in
3090 %ext = zext <16 x i32> %ld to <16 x i64>
3091 store <16 x i64> %ext, ptr addrspace(1) %out
3092 ret void
3093 }
3095 define amdgpu_kernel void @constant_sextload_v32i32_to_v32i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
3096 ; GFX6-NOHSA-LABEL: constant_sextload_v32i32_to_v32i64:
3097 ; GFX6-NOHSA: ; %bb.0:
3098 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[16:19], s[0:1], 0x9
3099 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
3100 ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
3101 ; GFX6-NOHSA-NEXT: s_mov_b32 s39, 0xf000
3102 ; GFX6-NOHSA-NEXT: s_mov_b32 s38, -1
3103 ; GFX6-NOHSA-NEXT: s_mov_b32 s36, s16
3104 ; GFX6-NOHSA-NEXT: s_mov_b32 s37, s17
3105 ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[16:31], s[18:19], 0x10
3106 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
3107 ; GFX6-NOHSA-NEXT: s_ashr_i32 s33, s1, 31
3108 ; GFX6-NOHSA-NEXT: s_ashr_i32 s34, s0, 31
3109 ; GFX6-NOHSA-NEXT: s_ashr_i32 s35, s3, 31
3110 ; GFX6-NOHSA-NEXT: s_ashr_i32 s40, s2, 31
3111 ; GFX6-NOHSA-NEXT: s_ashr_i32 s41, s5, 31
3112 ; GFX6-NOHSA-NEXT: s_ashr_i32 s42, s4, 31
3113 ; GFX6-NOHSA-NEXT: s_ashr_i32 s43, s7, 31
3114 ; GFX6-NOHSA-NEXT: s_ashr_i32 s44, s6, 31
3115 ; GFX6-NOHSA-NEXT: s_ashr_i32 s45, s17, 31
3116 ; GFX6-NOHSA-NEXT: s_ashr_i32 s46, s16, 31
3117 ; GFX6-NOHSA-NEXT: s_ashr_i32 s47, s19, 31
3118 ; GFX6-NOHSA-NEXT: s_ashr_i32 s48, s18, 31
3119 ; GFX6-NOHSA-NEXT: s_ashr_i32 s49, s21, 31
3120 ; GFX6-NOHSA-NEXT: s_ashr_i32 s50, s20, 31
3121 ; GFX6-NOHSA-NEXT: s_ashr_i32 s51, s23, 31
3122 ; GFX6-NOHSA-NEXT: s_ashr_i32 s52, s30, 31
3123 ; GFX6-NOHSA-NEXT: s_ashr_i32 s53, s31, 31
3124 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s52
3125 ; GFX6-NOHSA-NEXT: s_ashr_i32 s52, s28, 31
3126 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s53
3127 ; GFX6-NOHSA-NEXT: s_ashr_i32 s53, s29, 31
3128 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s52
3129 ; GFX6-NOHSA-NEXT: s_ashr_i32 s52, s26, 31
3130 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s53
3131 ; GFX6-NOHSA-NEXT: s_ashr_i32 s53, s27, 31
3132 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s52
3133 ; GFX6-NOHSA-NEXT: s_ashr_i32 s52, s22, 31
3134 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s53
3135 ; GFX6-NOHSA-NEXT: s_ashr_i32 s53, s25, 31
3136 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s30
3137 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s31
3138 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s28
3139 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s29
3140 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s26
3141 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s27
3142 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s24
3143 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s25
3144 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s22
3145 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s23
3146 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:240
3147 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3148 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s20
3149 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s21
3150 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[36:39], 0 offset:224
3151 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3152 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s18
3153 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s19
3154 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[36:39], 0 offset:208
3155 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3156 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s16
3157 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s17
3158 ; GFX6-NOHSA-NEXT: s_ashr_i32 s16, s24, 31
3159 ; GFX6-NOHSA-NEXT: s_ashr_i32 s17, s9, 31
3160 ; GFX6-NOHSA-NEXT: s_ashr_i32 s18, s8, 31
3161 ; GFX6-NOHSA-NEXT: s_ashr_i32 s19, s11, 31
3162 ; GFX6-NOHSA-NEXT: s_ashr_i32 s20, s10, 31
3163 ; GFX6-NOHSA-NEXT: s_ashr_i32 s21, s13, 31
3164 ; GFX6-NOHSA-NEXT: s_ashr_i32 s22, s12, 31
3165 ; GFX6-NOHSA-NEXT: s_ashr_i32 s23, s15, 31
3166 ; GFX6-NOHSA-NEXT: s_ashr_i32 s24, s14, 31
3167 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s16
3168 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s53
3169 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[36:39], 0 offset:192
3170 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3171 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s14
3172 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s15
3173 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s52
3174 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s51
3175 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[36:39], 0 offset:176
3176 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3177 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s12
3178 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s13
3179 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s50
3180 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s49
3181 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:160
3182 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3183 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s10
3184 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s11
3185 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s48
3186 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s47
3187 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[36:39], 0 offset:144
3188 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3189 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v4, s8
3190 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v6, s9
3191 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s46
3192 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s45
3193 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[36:39], 0 offset:128
3194 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3195 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v8, s6
3196 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v10, s7
3197 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s24
3198 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s23
3199 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[36:39], 0 offset:112
3200 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3201 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v12, s4
3202 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v14, s5
3203 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s22
3204 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s21
3205 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[36:39], 0 offset:96
3206 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3207 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v16, s2
3208 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v18, s3
3209 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s20
3210 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s19
3211 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:80
3212 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3213 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
3214 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s1
3215 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v5, s18
3216 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v7, s17
3217 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[4:7], off, s[36:39], 0 offset:64
3218 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v9, s44
3219 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v11, s43
3220 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[8:11], off, s[36:39], 0 offset:48
3221 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v13, s42
3222 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v15, s41
3223 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[12:15], off, s[36:39], 0 offset:32
3224 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v17, s40
3225 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v19, s35
3226 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[16:19], off, s[36:39], 0 offset:16
3227 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s34
3228 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s33
3229 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0
3230 ; GFX6-NOHSA-NEXT: s_endpgm
3231 ;
3232 ; GFX7-HSA-LABEL: constant_sextload_v32i32_to_v32i64:
3233 ; GFX7-HSA: ; %bb.0:
3234 ; GFX7-HSA-NEXT: s_load_dwordx4 s[16:19], s[4:5], 0x0
3235 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
3236 ; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x10
3237 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
3238 ; GFX7-HSA-NEXT: s_ashr_i32 s20, s1, 31
3239 ; GFX7-HSA-NEXT: s_ashr_i32 s21, s0, 31
3240 ; GFX7-HSA-NEXT: s_ashr_i32 s22, s3, 31
3241 ; GFX7-HSA-NEXT: s_ashr_i32 s23, s2, 31
3242 ; GFX7-HSA-NEXT: s_ashr_i32 s24, s5, 31
3243 ; GFX7-HSA-NEXT: s_ashr_i32 s25, s4, 31
3244 ; GFX7-HSA-NEXT: s_ashr_i32 s26, s7, 31
3245 ; GFX7-HSA-NEXT: s_ashr_i32 s27, s6, 31
3246 ; GFX7-HSA-NEXT: s_ashr_i32 s28, s9, 31
3247 ; GFX7-HSA-NEXT: s_ashr_i32 s29, s8, 31
3248 ; GFX7-HSA-NEXT: s_ashr_i32 s30, s11, 31
3249 ; GFX7-HSA-NEXT: s_ashr_i32 s31, s10, 31
3250 ; GFX7-HSA-NEXT: s_ashr_i32 s33, s13, 31
3251 ; GFX7-HSA-NEXT: s_ashr_i32 s34, s12, 31
3252 ; GFX7-HSA-NEXT: s_ashr_i32 s35, s15, 31
3253 ; GFX7-HSA-NEXT: s_ashr_i32 s36, s14, 31
3254 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14
3255 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s15
3256 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12
3257 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s13
3258 ; GFX7-HSA-NEXT: v_mov_b32_e32 v8, s10
3259 ; GFX7-HSA-NEXT: v_mov_b32_e32 v10, s11
3260 ; GFX7-HSA-NEXT: v_mov_b32_e32 v12, s8
3261 ; GFX7-HSA-NEXT: v_mov_b32_e32 v14, s9
3262 ; GFX7-HSA-NEXT: v_mov_b32_e32 v16, s6
3263 ; GFX7-HSA-NEXT: v_mov_b32_e32 v18, s7
3264 ; GFX7-HSA-NEXT: v_mov_b32_e32 v20, s4
3265 ; GFX7-HSA-NEXT: v_mov_b32_e32 v22, s5
3266 ; GFX7-HSA-NEXT: v_mov_b32_e32 v24, s2
3267 ; GFX7-HSA-NEXT: v_mov_b32_e32 v26, s3
3268 ; GFX7-HSA-NEXT: v_mov_b32_e32 v28, s0
3269 ; GFX7-HSA-NEXT: v_mov_b32_e32 v30, s1
3270 ; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[18:19], 0x0
3271 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s36
3272 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s35
3273 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s34
3274 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s33
3275 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
3276 ; GFX7-HSA-NEXT: s_ashr_i32 s37, s1, 31
3277 ; GFX7-HSA-NEXT: s_ashr_i32 s38, s0, 31
3278 ; GFX7-HSA-NEXT: s_ashr_i32 s39, s3, 31
3279 ; GFX7-HSA-NEXT: s_ashr_i32 s40, s2, 31
3280 ; GFX7-HSA-NEXT: s_ashr_i32 s41, s5, 31
3281 ; GFX7-HSA-NEXT: s_ashr_i32 s42, s4, 31
3282 ; GFX7-HSA-NEXT: s_ashr_i32 s43, s7, 31
3283 ; GFX7-HSA-NEXT: s_ashr_i32 s44, s6, 31
3284 ; GFX7-HSA-NEXT: s_ashr_i32 s45, s9, 31
3285 ; GFX7-HSA-NEXT: s_ashr_i32 s46, s8, 31
3286 ; GFX7-HSA-NEXT: s_ashr_i32 s47, s11, 31
3287 ; GFX7-HSA-NEXT: s_ashr_i32 s48, s10, 31
3288 ; GFX7-HSA-NEXT: s_ashr_i32 s49, s13, 31
3289 ; GFX7-HSA-NEXT: s_ashr_i32 s50, s12, 31
3290 ; GFX7-HSA-NEXT: s_ashr_i32 s51, s15, 31
3291 ; GFX7-HSA-NEXT: s_ashr_i32 s52, s14, 31
3292 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0xf0
3293 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0
3294 ; GFX7-HSA-NEXT: v_mov_b32_e32 v32, s19
3295 ; GFX7-HSA-NEXT: v_mov_b32_e32 v31, s18
3296 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0xe0
3297 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0
3298 ; GFX7-HSA-NEXT: v_mov_b32_e32 v34, s19
3299 ; GFX7-HSA-NEXT: v_mov_b32_e32 v33, s18
3300 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0xd0
3301 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[31:32], v[0:3]
3302 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0
3303 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18
3304 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19
3305 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0xc0
3306 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0
3307 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s18
3308 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s19
3309 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0xb0
3310 ; GFX7-HSA-NEXT: v_mov_b32_e32 v9, s31
3311 ; GFX7-HSA-NEXT: v_mov_b32_e32 v11, s30
3312 ; GFX7-HSA-NEXT: v_mov_b32_e32 v13, s29
3313 ; GFX7-HSA-NEXT: v_mov_b32_e32 v15, s28
3314 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[33:34], v[4:7]
3315 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[8:11]
3316 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[2:3], v[12:15]
3317 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0
3318 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18
3319 ; GFX7-HSA-NEXT: v_mov_b32_e32 v17, s27
3320 ; GFX7-HSA-NEXT: v_mov_b32_e32 v19, s26
3321 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19
3322 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0xa0
3323 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[16:19]
3324 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0
3325 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18
3326 ; GFX7-HSA-NEXT: v_mov_b32_e32 v21, s25
3327 ; GFX7-HSA-NEXT: v_mov_b32_e32 v23, s24
3328 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19
3329 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0x90
3330 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[20:23]
3331 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0
3332 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18
3333 ; GFX7-HSA-NEXT: v_mov_b32_e32 v25, s23
3334 ; GFX7-HSA-NEXT: v_mov_b32_e32 v27, s22
3335 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19
3336 ; GFX7-HSA-NEXT: s_add_u32 s18, s16, 0x80
3337 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[24:27]
3338 ; GFX7-HSA-NEXT: s_addc_u32 s19, s17, 0
3339 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18
3340 ; GFX7-HSA-NEXT: v_mov_b32_e32 v29, s21
3341 ; GFX7-HSA-NEXT: v_mov_b32_e32 v31, s20
3342 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s19
3343 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[28:31]
3344 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14
3345 ; GFX7-HSA-NEXT: s_add_u32 s14, s16, 0x70
3346 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s15
3347 ; GFX7-HSA-NEXT: s_addc_u32 s15, s17, 0
3348 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s14
3349 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s52
3350 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s51
3351 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s15
3352 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3353 ; GFX7-HSA-NEXT: s_nop 0
3354 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12
3355 ; GFX7-HSA-NEXT: s_add_u32 s12, s16, 0x60
3356 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s13
3357 ; GFX7-HSA-NEXT: s_addc_u32 s13, s17, 0
3358 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12
3359 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s50
3360 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s49
3361 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13
3362 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3363 ; GFX7-HSA-NEXT: s_nop 0
3364 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10
3365 ; GFX7-HSA-NEXT: s_add_u32 s10, s16, 0x50
3366 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11
3367 ; GFX7-HSA-NEXT: s_addc_u32 s11, s17, 0
3368 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10
3369 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s48
3370 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s47
3371 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11
3372 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3373 ; GFX7-HSA-NEXT: s_nop 0
3374 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
3375 ; GFX7-HSA-NEXT: s_add_u32 s8, s16, 64
3376 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s9
3377 ; GFX7-HSA-NEXT: s_addc_u32 s9, s17, 0
3378 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8
3379 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s46
3380 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s45
3381 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
3382 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3383 ; GFX7-HSA-NEXT: s_nop 0
3384 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6
3385 ; GFX7-HSA-NEXT: s_add_u32 s6, s16, 48
3386 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7
3387 ; GFX7-HSA-NEXT: s_addc_u32 s7, s17, 0
3388 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6
3389 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s44
3390 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s43
3391 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7
3392 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3393 ; GFX7-HSA-NEXT: s_nop 0
3394 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
3395 ; GFX7-HSA-NEXT: s_add_u32 s4, s16, 32
3396 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5
3397 ; GFX7-HSA-NEXT: s_addc_u32 s5, s17, 0
3398 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
3399 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s42
3400 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s41
3401 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
3402 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3403 ; GFX7-HSA-NEXT: s_nop 0
3404 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2
3405 ; GFX7-HSA-NEXT: s_add_u32 s2, s16, 16
3406 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3
3407 ; GFX7-HSA-NEXT: s_addc_u32 s3, s17, 0
3408 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3
3409 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s40
3410 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s39
3411 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2
3412 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3413 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16
3414 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
3415 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s38
3416 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s1
3417 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s37
3418 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17
3419 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3420 ; GFX7-HSA-NEXT: s_endpgm
3421 ;
3422 ; GFX8-NOHSA-LABEL: constant_sextload_v32i32_to_v32i64:
3423 ; GFX8-NOHSA: ; %bb.0:
3424 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[36:39], s[0:1], 0x24
3425 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
3426 ; GFX8-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0
3427 ; GFX8-NOHSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x40
3428 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
3429 ; GFX8-NOHSA-NEXT: s_ashr_i32 s33, s1, 31
3430 ; GFX8-NOHSA-NEXT: s_ashr_i32 s34, s0, 31
3431 ; GFX8-NOHSA-NEXT: s_ashr_i32 s35, s3, 31
3432 ; GFX8-NOHSA-NEXT: s_ashr_i32 s38, s2, 31
3433 ; GFX8-NOHSA-NEXT: s_ashr_i32 s39, s5, 31
3434 ; GFX8-NOHSA-NEXT: s_ashr_i32 s40, s4, 31
3435 ; GFX8-NOHSA-NEXT: s_ashr_i32 s41, s7, 31
3436 ; GFX8-NOHSA-NEXT: s_ashr_i32 s42, s6, 31
3437 ; GFX8-NOHSA-NEXT: s_ashr_i32 s43, s9, 31
3438 ; GFX8-NOHSA-NEXT: s_ashr_i32 s44, s8, 31
3439 ; GFX8-NOHSA-NEXT: s_ashr_i32 s45, s11, 31
3440 ; GFX8-NOHSA-NEXT: s_ashr_i32 s46, s10, 31
3441 ; GFX8-NOHSA-NEXT: s_ashr_i32 s47, s13, 31
3442 ; GFX8-NOHSA-NEXT: s_ashr_i32 s48, s12, 31
3443 ; GFX8-NOHSA-NEXT: s_ashr_i32 s49, s15, 31
3444 ; GFX8-NOHSA-NEXT: s_ashr_i32 s50, s14, 31
3445 ; GFX8-NOHSA-NEXT: s_ashr_i32 s51, s17, 31
3446 ; GFX8-NOHSA-NEXT: s_ashr_i32 s52, s16, 31
3447 ; GFX8-NOHSA-NEXT: s_ashr_i32 s53, s19, 31
3448 ; GFX8-NOHSA-NEXT: s_ashr_i32 s54, s18, 31
3449 ; GFX8-NOHSA-NEXT: s_ashr_i32 s55, s21, 31
3450 ; GFX8-NOHSA-NEXT: s_ashr_i32 s56, s20, 31
3451 ; GFX8-NOHSA-NEXT: s_ashr_i32 s57, s23, 31
3452 ; GFX8-NOHSA-NEXT: s_ashr_i32 s58, s22, 31
3453 ; GFX8-NOHSA-NEXT: s_ashr_i32 s59, s25, 31
3454 ; GFX8-NOHSA-NEXT: s_ashr_i32 s60, s24, 31
3455 ; GFX8-NOHSA-NEXT: s_ashr_i32 s61, s27, 31
3456 ; GFX8-NOHSA-NEXT: s_ashr_i32 s62, s26, 31
3457 ; GFX8-NOHSA-NEXT: s_ashr_i32 s63, s29, 31
3458 ; GFX8-NOHSA-NEXT: s_ashr_i32 s64, s28, 31
3459 ; GFX8-NOHSA-NEXT: s_ashr_i32 s65, s31, 31
3460 ; GFX8-NOHSA-NEXT: s_ashr_i32 s66, s30, 31
3461 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s30
3462 ; GFX8-NOHSA-NEXT: s_add_u32 s30, s36, 0xf0
3463 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s31
3464 ; GFX8-NOHSA-NEXT: s_addc_u32 s31, s37, 0
3465 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s30
3466 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s66
3467 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s65
3468 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s31
3469 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3470 ; GFX8-NOHSA-NEXT: s_nop 0
3471 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s28
3472 ; GFX8-NOHSA-NEXT: s_add_u32 s28, s36, 0xe0
3473 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s29
3474 ; GFX8-NOHSA-NEXT: s_addc_u32 s29, s37, 0
3475 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s28
3476 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s64
3477 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s63
3478 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s29
3479 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3480 ; GFX8-NOHSA-NEXT: s_nop 0
3481 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s26
3482 ; GFX8-NOHSA-NEXT: s_add_u32 s26, s36, 0xd0
3483 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s27
3484 ; GFX8-NOHSA-NEXT: s_addc_u32 s27, s37, 0
3485 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s26
3486 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s62
3487 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s61
3488 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s27
3489 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3490 ; GFX8-NOHSA-NEXT: s_nop 0
3491 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s24
3492 ; GFX8-NOHSA-NEXT: s_add_u32 s24, s36, 0xc0
3493 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s25
3494 ; GFX8-NOHSA-NEXT: s_addc_u32 s25, s37, 0
3495 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s24
3496 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s60
3497 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s59
3498 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s25
3499 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3500 ; GFX8-NOHSA-NEXT: s_nop 0
3501 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s22
3502 ; GFX8-NOHSA-NEXT: s_add_u32 s22, s36, 0xb0
3503 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s23
3504 ; GFX8-NOHSA-NEXT: s_addc_u32 s23, s37, 0
3505 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s22
3506 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s58
3507 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s57
3508 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s23
3509 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3510 ; GFX8-NOHSA-NEXT: s_nop 0
3511 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s20
3512 ; GFX8-NOHSA-NEXT: s_add_u32 s20, s36, 0xa0
3513 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s21
3514 ; GFX8-NOHSA-NEXT: s_addc_u32 s21, s37, 0
3515 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s20
3516 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s56
3517 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s55
3518 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s21
3519 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3520 ; GFX8-NOHSA-NEXT: s_nop 0
3521 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s18
3522 ; GFX8-NOHSA-NEXT: s_add_u32 s18, s36, 0x90
3523 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s19
3524 ; GFX8-NOHSA-NEXT: s_addc_u32 s19, s37, 0
3525 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s18
3526 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s54
3527 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s53
3528 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s19
3529 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3530 ; GFX8-NOHSA-NEXT: s_nop 0
3531 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s16
3532 ; GFX8-NOHSA-NEXT: s_add_u32 s16, s36, 0x80
3533 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s17
3534 ; GFX8-NOHSA-NEXT: s_addc_u32 s17, s37, 0
3535 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s16
3536 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s52
3537 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s51
3538 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s17
3539 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3540 ; GFX8-NOHSA-NEXT: s_nop 0
3541 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s14
3542 ; GFX8-NOHSA-NEXT: s_add_u32 s14, s36, 0x70
3543 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s15
3544 ; GFX8-NOHSA-NEXT: s_addc_u32 s15, s37, 0
3545 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s14
3546 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s50
3547 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s49
3548 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s15
3549 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3550 ; GFX8-NOHSA-NEXT: s_nop 0
3551 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s12
3552 ; GFX8-NOHSA-NEXT: s_add_u32 s12, s36, 0x60
3553 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s13
3554 ; GFX8-NOHSA-NEXT: s_addc_u32 s13, s37, 0
3555 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s12
3556 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s48
3557 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s47
3558 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s13
3559 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3560 ; GFX8-NOHSA-NEXT: s_nop 0
3561 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s10
3562 ; GFX8-NOHSA-NEXT: s_add_u32 s10, s36, 0x50
3563 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s11
3564 ; GFX8-NOHSA-NEXT: s_addc_u32 s11, s37, 0
3565 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s10
3566 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s46
3567 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s45
3568 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s11
3569 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3570 ; GFX8-NOHSA-NEXT: s_nop 0
3571 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s8
3572 ; GFX8-NOHSA-NEXT: s_add_u32 s8, s36, 64
3573 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s9
3574 ; GFX8-NOHSA-NEXT: s_addc_u32 s9, s37, 0
3575 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
3576 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s44
3577 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s43
3578 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
3579 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3580 ; GFX8-NOHSA-NEXT: s_nop 0
3581 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s6
3582 ; GFX8-NOHSA-NEXT: s_add_u32 s6, s36, 48
3583 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s7
3584 ; GFX8-NOHSA-NEXT: s_addc_u32 s7, s37, 0
3585 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s6
3586 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s42
3587 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s41
3588 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s7
3589 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3590 ; GFX8-NOHSA-NEXT: s_nop 0
3591 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
3592 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s36, 32
3593 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s5
3594 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s37, 0
3595 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
3596 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s40
3597 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s39
3598 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
3599 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3600 ; GFX8-NOHSA-NEXT: s_nop 0
3601 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s2
3602 ; GFX8-NOHSA-NEXT: s_add_u32 s2, s36, 16
3603 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s3
3604 ; GFX8-NOHSA-NEXT: s_addc_u32 s3, s37, 0
3605 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s3
3606 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s38
3607 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s35
3608 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s2
3609 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3610 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s36
3611 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
3612 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s34
3613 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s1
3614 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s33
3615 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s37
3616 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
3617 ; GFX8-NOHSA-NEXT: s_endpgm
3618 ;
3619 ; EG-LABEL: constant_sextload_v32i32_to_v32i64:
3620 ; EG: ; %bb.0:
3621 ; EG-NEXT: ALU 32, @36, KC0[CB0:0-32], KC1[]
3622 ; EG-NEXT: TEX 7 @20
3623 ; EG-NEXT: ALU 96, @69, KC0[CB0:0-32], KC1[]
3624 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T32.XYZW, T12.X, 0
3625 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T23.X, 0
3626 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T31.XYZW, T21.X, 0
3627 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T15.XYZW, T20.X, 0
3628 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T30.XYZW, T19.X, 0
3629 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T16.XYZW, T10.X, 0
3630 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T29.XYZW, T9.X, 0
3631 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T17.XYZW, T8.X, 0
3632 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T28.XYZW, T7.X, 0
3633 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T18.XYZW, T6.X, 0
3634 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T27.XYZW, T5.X, 0
3635 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T4.X, 0
3636 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T26.XYZW, T3.X, 0
3637 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T25.XYZW, T2.X, 0
3638 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T24.XYZW, T1.X, 0
3639 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T0.X, 1
3640 ; EG-NEXT: CF_END
3641 ; EG-NEXT: Fetch clause starting at 20:
3642 ; EG-NEXT: VTX_READ_128 T12.XYZW, T11.X, 112, #1
3643 ; EG-NEXT: VTX_READ_128 T13.XYZW, T11.X, 96, #1
3644 ; EG-NEXT: VTX_READ_128 T14.XYZW, T11.X, 80, #1
3645 ; EG-NEXT: VTX_READ_128 T15.XYZW, T11.X, 64, #1
3646 ; EG-NEXT: VTX_READ_128 T16.XYZW, T11.X, 48, #1
3647 ; EG-NEXT: VTX_READ_128 T17.XYZW, T11.X, 32, #1
3648 ; EG-NEXT: VTX_READ_128 T18.XYZW, T11.X, 16, #1
3649 ; EG-NEXT: VTX_READ_128 T11.XYZW, T11.X, 0, #1
3650 ; EG-NEXT: ALU clause starting at 36:
3651 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
3652 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3653 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
3654 ; EG-NEXT: LSHR T1.X, PV.W, literal.x,
3655 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3656 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
3657 ; EG-NEXT: LSHR T2.X, PV.W, literal.x,
3658 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3659 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
3660 ; EG-NEXT: LSHR T3.X, PV.W, literal.x,
3661 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3662 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
3663 ; EG-NEXT: LSHR T4.X, PV.W, literal.x,
3664 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3665 ; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)
3666 ; EG-NEXT: LSHR T5.X, PV.W, literal.x,
3667 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3668 ; EG-NEXT: 2(2.802597e-45), 96(1.345247e-43)
3669 ; EG-NEXT: LSHR T6.X, PV.W, literal.x,
3670 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3671 ; EG-NEXT: 2(2.802597e-45), 112(1.569454e-43)
3672 ; EG-NEXT: LSHR T7.X, PV.W, literal.x,
3673 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3674 ; EG-NEXT: 2(2.802597e-45), 128(1.793662e-43)
3675 ; EG-NEXT: LSHR T8.X, PV.W, literal.x,
3676 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3677 ; EG-NEXT: 2(2.802597e-45), 144(2.017870e-43)
3678 ; EG-NEXT: LSHR T9.X, PV.W, literal.x,
3679 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3680 ; EG-NEXT: 2(2.802597e-45), 160(2.242078e-43)
3681 ; EG-NEXT: LSHR T10.X, PV.W, literal.x,
3682 ; EG-NEXT: MOV * T11.X, KC0[2].Z,
3683 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3684 ; EG-NEXT: ALU clause starting at 69:
3685 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
3686 ; EG-NEXT: 176(2.466285e-43), 0(0.000000e+00)
3687 ; EG-NEXT: LSHR T19.X, PV.W, literal.x,
3688 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3689 ; EG-NEXT: 2(2.802597e-45), 192(2.690493e-43)
3690 ; EG-NEXT: LSHR T20.X, PV.W, literal.x,
3691 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
3692 ; EG-NEXT: 2(2.802597e-45), 208(2.914701e-43)
3693 ; EG-NEXT: LSHR T21.X, PV.W, literal.x,
3694 ; EG-NEXT: ADD_INT T0.W, KC0[2].Y, literal.y,
3695 ; EG-NEXT: ASHR * T22.W, T11.Y, literal.z,
3696 ; EG-NEXT: 2(2.802597e-45), 224(3.138909e-43)
3697 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3698 ; EG-NEXT: LSHR T23.X, PV.W, literal.x,
3699 ; EG-NEXT: ASHR T22.Y, T11.X, literal.y,
3700 ; EG-NEXT: ASHR T24.W, T11.W, literal.y,
3701 ; EG-NEXT: MOV * T22.X, T11.X,
3702 ; EG-NEXT: 2(2.802597e-45), 31(4.344025e-44)
3703 ; EG-NEXT: ASHR T24.Y, T11.Z, literal.x,
3704 ; EG-NEXT: ASHR * T25.W, T18.Y, literal.x,
3705 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3706 ; EG-NEXT: MOV T24.X, T11.Z,
3707 ; EG-NEXT: ASHR T25.Y, T18.X, literal.x,
3708 ; EG-NEXT: MOV T22.Z, T11.Y,
3709 ; EG-NEXT: ASHR T26.W, T18.W, literal.x,
3710 ; EG-NEXT: MOV * T25.X, T18.X,
3711 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3712 ; EG-NEXT: ASHR T26.Y, T18.Z, literal.x,
3713 ; EG-NEXT: MOV T24.Z, T11.W,
3714 ; EG-NEXT: ASHR * T11.W, T17.Y, literal.x,
3715 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3716 ; EG-NEXT: MOV T26.X, T18.Z,
3717 ; EG-NEXT: ASHR T11.Y, T17.X, literal.x,
3718 ; EG-NEXT: MOV T25.Z, T18.Y,
3719 ; EG-NEXT: ASHR T27.W, T17.W, literal.x,
3720 ; EG-NEXT: MOV * T11.X, T17.X,
3721 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3722 ; EG-NEXT: ASHR T27.Y, T17.Z, literal.x,
3723 ; EG-NEXT: MOV T26.Z, T18.W,
3724 ; EG-NEXT: ASHR * T18.W, T16.Y, literal.x,
3725 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3726 ; EG-NEXT: MOV T27.X, T17.Z,
3727 ; EG-NEXT: ASHR T18.Y, T16.X, literal.x,
3728 ; EG-NEXT: MOV T11.Z, T17.Y,
3729 ; EG-NEXT: ASHR T28.W, T16.W, literal.x,
3730 ; EG-NEXT: MOV * T18.X, T16.X,
3731 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3732 ; EG-NEXT: ASHR T28.Y, T16.Z, literal.x,
3733 ; EG-NEXT: MOV T27.Z, T17.W,
3734 ; EG-NEXT: ASHR * T17.W, T15.Y, literal.x,
3735 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3736 ; EG-NEXT: MOV T28.X, T16.Z,
3737 ; EG-NEXT: ASHR T17.Y, T15.X, literal.x,
3738 ; EG-NEXT: MOV T18.Z, T16.Y,
3739 ; EG-NEXT: ASHR T29.W, T15.W, literal.x,
3740 ; EG-NEXT: MOV * T17.X, T15.X,
3741 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3742 ; EG-NEXT: ASHR T29.Y, T15.Z, literal.x,
3743 ; EG-NEXT: MOV T28.Z, T16.W,
3744 ; EG-NEXT: ASHR * T16.W, T14.Y, literal.x,
3745 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3746 ; EG-NEXT: MOV T29.X, T15.Z,
3747 ; EG-NEXT: ASHR T16.Y, T14.X, literal.x,
3748 ; EG-NEXT: MOV T17.Z, T15.Y,
3749 ; EG-NEXT: ASHR T30.W, T14.W, literal.x,
3750 ; EG-NEXT: MOV * T16.X, T14.X,
3751 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3752 ; EG-NEXT: ASHR T30.Y, T14.Z, literal.x,
3753 ; EG-NEXT: MOV T29.Z, T15.W,
3754 ; EG-NEXT: ASHR * T15.W, T13.Y, literal.x,
3755 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3756 ; EG-NEXT: MOV T30.X, T14.Z,
3757 ; EG-NEXT: ASHR T15.Y, T13.X, literal.x,
3758 ; EG-NEXT: MOV T16.Z, T14.Y,
3759 ; EG-NEXT: ASHR T31.W, T13.W, literal.x,
3760 ; EG-NEXT: MOV * T15.X, T13.X,
3761 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3762 ; EG-NEXT: ASHR T31.Y, T13.Z, literal.x,
3763 ; EG-NEXT: MOV T30.Z, T14.W,
3764 ; EG-NEXT: ASHR * T14.W, T12.Y, literal.x,
3765 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3766 ; EG-NEXT: MOV T31.X, T13.Z,
3767 ; EG-NEXT: ASHR T14.Y, T12.X, literal.x,
3768 ; EG-NEXT: MOV T15.Z, T13.Y,
3769 ; EG-NEXT: ASHR T32.W, T12.W, literal.x,
3770 ; EG-NEXT: MOV * T14.X, T12.X,
3771 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3772 ; EG-NEXT: ASHR T32.Y, T12.Z, literal.x,
3773 ; EG-NEXT: MOV * T31.Z, T13.W,
3774 ; EG-NEXT: 31(4.344025e-44), 0(0.000000e+00)
3775 ; EG-NEXT: MOV T32.X, T12.Z,
3776 ; EG-NEXT: MOV T14.Z, T12.Y,
3777 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
3778 ; EG-NEXT: 240(3.363116e-43), 0(0.000000e+00)
3779 ; EG-NEXT: LSHR T12.X, PV.W, literal.x,
3780 ; EG-NEXT: MOV * T32.Z, T12.W,
3781 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
3782 ;
3783 ; GFX9-HSA-LABEL: constant_sextload_v32i32_to_v32i64:
3784 ; GFX9-HSA: ; %bb.0:
3785 ; GFX9-HSA-NEXT: s_load_dwordx4 s[36:39], s[4:5], 0x0
3786 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, 0
3787 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
3788 ; GFX9-HSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x40
3789 ; GFX9-HSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0
3790 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
3791 ; GFX9-HSA-NEXT: s_ashr_i32 s65, s31, 31
3792 ; GFX9-HSA-NEXT: s_ashr_i32 s66, s30, 31
3793 ; GFX9-HSA-NEXT: s_ashr_i32 s63, s29, 31
3794 ; GFX9-HSA-NEXT: s_ashr_i32 s64, s28, 31
3795 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s30
3796 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s66
3797 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s31
3798 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s65
3799 ; GFX9-HSA-NEXT: s_ashr_i32 s61, s27, 31
3800 ; GFX9-HSA-NEXT: s_ashr_i32 s62, s26, 31
3801 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:240
3802 ; GFX9-HSA-NEXT: s_ashr_i32 s59, s25, 31
3803 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s28
3804 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s64
3805 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s29
3806 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s63
3807 ; GFX9-HSA-NEXT: s_ashr_i32 s60, s24, 31
3808 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:224
3809 ; GFX9-HSA-NEXT: s_ashr_i32 s57, s23, 31
3810 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s26
3811 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s62
3812 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s27
3813 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s61
3814 ; GFX9-HSA-NEXT: s_ashr_i32 s58, s22, 31
3815 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:208
3816 ; GFX9-HSA-NEXT: s_ashr_i32 s55, s21, 31
3817 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s24
3818 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s60
3819 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s25
3820 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s59
3821 ; GFX9-HSA-NEXT: s_ashr_i32 s56, s20, 31
3822 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:192
3823 ; GFX9-HSA-NEXT: s_ashr_i32 s53, s19, 31
3824 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s22
3825 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s58
3826 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s23
3827 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s57
3828 ; GFX9-HSA-NEXT: s_ashr_i32 s54, s18, 31
3829 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:176
3830 ; GFX9-HSA-NEXT: s_ashr_i32 s51, s17, 31
3831 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s20
3832 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s56
3833 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s21
3834 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s55
3835 ; GFX9-HSA-NEXT: s_ashr_i32 s52, s16, 31
3836 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:160
3837 ; GFX9-HSA-NEXT: s_ashr_i32 s49, s15, 31
3838 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s18
3839 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s54
3840 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s19
3841 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s53
3842 ; GFX9-HSA-NEXT: s_ashr_i32 s50, s14, 31
3843 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:144
3844 ; GFX9-HSA-NEXT: s_ashr_i32 s47, s13, 31
3845 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s16
3846 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s52
3847 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s17
3848 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s51
3849 ; GFX9-HSA-NEXT: s_ashr_i32 s48, s12, 31
3850 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:128
3851 ; GFX9-HSA-NEXT: s_ashr_i32 s45, s11, 31
3852 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s14
3853 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s50
3854 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s15
3855 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s49
3856 ; GFX9-HSA-NEXT: s_ashr_i32 s46, s10, 31
3857 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:112
3858 ; GFX9-HSA-NEXT: s_ashr_i32 s43, s9, 31
3859 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s12
3860 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s48
3861 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s13
3862 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s47
3863 ; GFX9-HSA-NEXT: s_ashr_i32 s44, s8, 31
3864 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:96
3865 ; GFX9-HSA-NEXT: s_ashr_i32 s41, s7, 31
3866 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s10
3867 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s46
3868 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s11
3869 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s45
3870 ; GFX9-HSA-NEXT: s_ashr_i32 s42, s6, 31
3871 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:80
3872 ; GFX9-HSA-NEXT: s_ashr_i32 s39, s5, 31
3873 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s8
3874 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s44
3875 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s9
3876 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s43
3877 ; GFX9-HSA-NEXT: s_ashr_i32 s40, s4, 31
3878 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:64
3879 ; GFX9-HSA-NEXT: s_ashr_i32 s35, s3, 31
3880 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s6
3881 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s42
3882 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s7
3883 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s41
3884 ; GFX9-HSA-NEXT: s_ashr_i32 s38, s2, 31
3885 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:48
3886 ; GFX9-HSA-NEXT: s_ashr_i32 s33, s1, 31
3887 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s4
3888 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s40
3889 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s5
3890 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s39
3891 ; GFX9-HSA-NEXT: s_ashr_i32 s34, s0, 31
3892 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:32
3893 ; GFX9-HSA-NEXT: s_nop 0
3894 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s2
3895 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s38
3896 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s3
3897 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s35
3898 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37] offset:16
3899 ; GFX9-HSA-NEXT: s_nop 0
3900 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s0
3901 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s34
3902 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s1
3903 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s33
3904 ; GFX9-HSA-NEXT: global_store_dwordx4 v0, v[1:4], s[36:37]
3905 ; GFX9-HSA-NEXT: s_endpgm
3906 %ld = load <32 x i32>, ptr addrspace(4) %in
3907 %ext = sext <32 x i32> %ld to <32 x i64>
3908 store <32 x i64> %ext, ptr addrspace(1) %out
3909 ret void
3910 }
3912 define amdgpu_kernel void @constant_zextload_v32i32_to_v32i64(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
3913 ; GFX6-NOHSA-LABEL: constant_zextload_v32i32_to_v32i64:
3914 ; GFX6-NOHSA: ; %bb.0:
3915 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
3916 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
3917 ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[16:31], s[2:3], 0x10
3918 ; GFX6-NOHSA-NEXT: s_mov_b32 s39, 0xf000
3919 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, 0
3920 ; GFX6-NOHSA-NEXT: s_mov_b32 s38, -1
3921 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, v1
3922 ; GFX6-NOHSA-NEXT: s_mov_b32 s36, s0
3923 ; GFX6-NOHSA-NEXT: s_mov_b32 s37, s1
3924 ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[2:3], 0x0
3925 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
3926 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s30
3927 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s31
3928 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:240
3929 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3930 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s28
3931 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s29
3932 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:224
3933 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3934 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s26
3935 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s27
3936 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:208
3937 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3938 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s24
3939 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s25
3940 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:192
3941 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3942 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s22
3943 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s23
3944 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:176
3945 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3946 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s20
3947 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s21
3948 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:160
3949 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3950 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s18
3951 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s19
3952 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:144
3953 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3954 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s16
3955 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s17
3956 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:128
3957 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3958 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s14
3959 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s15
3960 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:112
3961 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3962 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12
3963 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s13
3964 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:96
3965 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3966 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s10
3967 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s11
3968 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:80
3969 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3970 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s8
3971 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s9
3972 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:64
3973 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3974 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s6
3975 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s7
3976 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:48
3977 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3978 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
3979 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s5
3980 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:32
3981 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3982 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s2
3983 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s3
3984 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:16
3985 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
3986 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
3987 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s1
3988 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0
3989 ; GFX6-NOHSA-NEXT: s_endpgm
3990 ;
3991 ; GFX7-HSA-LABEL: constant_zextload_v32i32_to_v32i64:
3992 ; GFX7-HSA: ; %bb.0:
3993 ; GFX7-HSA-NEXT: s_load_dwordx4 s[36:39], s[4:5], 0x0
3994 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, 0
3995 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, v1
3996 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
3997 ; GFX7-HSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x10
3998 ; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0
3999 ; GFX7-HSA-NEXT: s_add_u32 s34, s36, 0xf0
4000 ; GFX7-HSA-NEXT: s_addc_u32 s35, s37, 0
4001 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s34
4002 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s35
4003 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
4004 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s30
4005 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s31
4006 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4007 ; GFX7-HSA-NEXT: s_nop 0
4008 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s28
4009 ; GFX7-HSA-NEXT: s_add_u32 s28, s36, 0xe0
4010 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s29
4011 ; GFX7-HSA-NEXT: s_addc_u32 s29, s37, 0
4012 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s28
4013 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s29
4014 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4015 ; GFX7-HSA-NEXT: s_nop 0
4016 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s26
4017 ; GFX7-HSA-NEXT: s_add_u32 s26, s36, 0xd0
4018 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s27
4019 ; GFX7-HSA-NEXT: s_addc_u32 s27, s37, 0
4020 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s26
4021 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s27
4022 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4023 ; GFX7-HSA-NEXT: s_nop 0
4024 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s24
4025 ; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0xc0
4026 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s25
4027 ; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0
4028 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s24
4029 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s25
4030 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4031 ; GFX7-HSA-NEXT: s_nop 0
4032 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s22
4033 ; GFX7-HSA-NEXT: s_add_u32 s22, s36, 0xb0
4034 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s23
4035 ; GFX7-HSA-NEXT: s_addc_u32 s23, s37, 0
4036 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s22
4037 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s23
4038 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4039 ; GFX7-HSA-NEXT: s_nop 0
4040 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s20
4041 ; GFX7-HSA-NEXT: s_add_u32 s20, s36, 0xa0
4042 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s21
4043 ; GFX7-HSA-NEXT: s_addc_u32 s21, s37, 0
4044 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s20
4045 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s21
4046 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4047 ; GFX7-HSA-NEXT: s_nop 0
4048 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s18
4049 ; GFX7-HSA-NEXT: s_add_u32 s18, s36, 0x90
4050 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s19
4051 ; GFX7-HSA-NEXT: s_addc_u32 s19, s37, 0
4052 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s18
4053 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s19
4054 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4055 ; GFX7-HSA-NEXT: s_nop 0
4056 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s16
4057 ; GFX7-HSA-NEXT: s_add_u32 s16, s36, 0x80
4058 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s17
4059 ; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0
4060 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16
4061 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17
4062 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4063 ; GFX7-HSA-NEXT: s_nop 0
4064 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s14
4065 ; GFX7-HSA-NEXT: s_add_u32 s14, s36, 0x70
4066 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s15
4067 ; GFX7-HSA-NEXT: s_addc_u32 s15, s37, 0
4068 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s14
4069 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s15
4070 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4071 ; GFX7-HSA-NEXT: s_nop 0
4072 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12
4073 ; GFX7-HSA-NEXT: s_add_u32 s12, s36, 0x60
4074 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s13
4075 ; GFX7-HSA-NEXT: s_addc_u32 s13, s37, 0
4076 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12
4077 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13
4078 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4079 ; GFX7-HSA-NEXT: s_nop 0
4080 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s10
4081 ; GFX7-HSA-NEXT: s_add_u32 s10, s36, 0x50
4082 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s11
4083 ; GFX7-HSA-NEXT: s_addc_u32 s11, s37, 0
4084 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s10
4085 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s11
4086 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4087 ; GFX7-HSA-NEXT: s_nop 0
4088 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
4089 ; GFX7-HSA-NEXT: s_add_u32 s8, s36, 64
4090 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s9
4091 ; GFX7-HSA-NEXT: s_addc_u32 s9, s37, 0
4092 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8
4093 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
4094 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4095 ; GFX7-HSA-NEXT: s_nop 0
4096 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s6
4097 ; GFX7-HSA-NEXT: s_add_u32 s6, s36, 48
4098 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s7
4099 ; GFX7-HSA-NEXT: s_addc_u32 s7, s37, 0
4100 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s6
4101 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s7
4102 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4103 ; GFX7-HSA-NEXT: s_nop 0
4104 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
4105 ; GFX7-HSA-NEXT: s_add_u32 s4, s36, 32
4106 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s5
4107 ; GFX7-HSA-NEXT: s_addc_u32 s5, s37, 0
4108 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
4109 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
4110 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4111 ; GFX7-HSA-NEXT: s_nop 0
4112 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s2
4113 ; GFX7-HSA-NEXT: s_add_u32 s2, s36, 16
4114 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s3
4115 ; GFX7-HSA-NEXT: s_addc_u32 s3, s37, 0
4116 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s3
4117 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s2
4118 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4119 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s36
4120 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
4121 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s1
4122 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s37
4123 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4124 ; GFX7-HSA-NEXT: s_endpgm
4125 ;
4126 ; GFX8-NOHSA-LABEL: constant_zextload_v32i32_to_v32i64:
4127 ; GFX8-NOHSA: ; %bb.0:
4128 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[36:39], s[0:1], 0x24
4129 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, 0
4130 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, v1
4131 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
4132 ; GFX8-NOHSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x40
4133 ; GFX8-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0
4134 ; GFX8-NOHSA-NEXT: s_add_u32 s34, s36, 0xf0
4135 ; GFX8-NOHSA-NEXT: s_addc_u32 s35, s37, 0
4136 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s34
4137 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s35
4138 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
4139 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s30
4140 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s31
4141 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4142 ; GFX8-NOHSA-NEXT: s_nop 0
4143 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s28
4144 ; GFX8-NOHSA-NEXT: s_add_u32 s28, s36, 0xe0
4145 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s29
4146 ; GFX8-NOHSA-NEXT: s_addc_u32 s29, s37, 0
4147 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s28
4148 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s29
4149 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4150 ; GFX8-NOHSA-NEXT: s_nop 0
4151 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s26
4152 ; GFX8-NOHSA-NEXT: s_add_u32 s26, s36, 0xd0
4153 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s27
4154 ; GFX8-NOHSA-NEXT: s_addc_u32 s27, s37, 0
4155 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s26
4156 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s27
4157 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4158 ; GFX8-NOHSA-NEXT: s_nop 0
4159 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s24
4160 ; GFX8-NOHSA-NEXT: s_add_u32 s24, s36, 0xc0
4161 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s25
4162 ; GFX8-NOHSA-NEXT: s_addc_u32 s25, s37, 0
4163 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s24
4164 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s25
4165 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4166 ; GFX8-NOHSA-NEXT: s_nop 0
4167 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s22
4168 ; GFX8-NOHSA-NEXT: s_add_u32 s22, s36, 0xb0
4169 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s23
4170 ; GFX8-NOHSA-NEXT: s_addc_u32 s23, s37, 0
4171 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s22
4172 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s23
4173 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4174 ; GFX8-NOHSA-NEXT: s_nop 0
4175 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s20
4176 ; GFX8-NOHSA-NEXT: s_add_u32 s20, s36, 0xa0
4177 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s21
4178 ; GFX8-NOHSA-NEXT: s_addc_u32 s21, s37, 0
4179 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s20
4180 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s21
4181 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4182 ; GFX8-NOHSA-NEXT: s_nop 0
4183 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s18
4184 ; GFX8-NOHSA-NEXT: s_add_u32 s18, s36, 0x90
4185 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s19
4186 ; GFX8-NOHSA-NEXT: s_addc_u32 s19, s37, 0
4187 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s18
4188 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s19
4189 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4190 ; GFX8-NOHSA-NEXT: s_nop 0
4191 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s16
4192 ; GFX8-NOHSA-NEXT: s_add_u32 s16, s36, 0x80
4193 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s17
4194 ; GFX8-NOHSA-NEXT: s_addc_u32 s17, s37, 0
4195 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s16
4196 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s17
4197 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4198 ; GFX8-NOHSA-NEXT: s_nop 0
4199 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s14
4200 ; GFX8-NOHSA-NEXT: s_add_u32 s14, s36, 0x70
4201 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s15
4202 ; GFX8-NOHSA-NEXT: s_addc_u32 s15, s37, 0
4203 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s14
4204 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s15
4205 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4206 ; GFX8-NOHSA-NEXT: s_nop 0
4207 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s12
4208 ; GFX8-NOHSA-NEXT: s_add_u32 s12, s36, 0x60
4209 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s13
4210 ; GFX8-NOHSA-NEXT: s_addc_u32 s13, s37, 0
4211 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s12
4212 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s13
4213 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4214 ; GFX8-NOHSA-NEXT: s_nop 0
4215 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s10
4216 ; GFX8-NOHSA-NEXT: s_add_u32 s10, s36, 0x50
4217 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s11
4218 ; GFX8-NOHSA-NEXT: s_addc_u32 s11, s37, 0
4219 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s10
4220 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s11
4221 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4222 ; GFX8-NOHSA-NEXT: s_nop 0
4223 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s8
4224 ; GFX8-NOHSA-NEXT: s_add_u32 s8, s36, 64
4225 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s9
4226 ; GFX8-NOHSA-NEXT: s_addc_u32 s9, s37, 0
4227 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
4228 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
4229 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4230 ; GFX8-NOHSA-NEXT: s_nop 0
4231 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s6
4232 ; GFX8-NOHSA-NEXT: s_add_u32 s6, s36, 48
4233 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s7
4234 ; GFX8-NOHSA-NEXT: s_addc_u32 s7, s37, 0
4235 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s6
4236 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s7
4237 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4238 ; GFX8-NOHSA-NEXT: s_nop 0
4239 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
4240 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s36, 32
4241 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s5
4242 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s37, 0
4243 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
4244 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
4245 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4246 ; GFX8-NOHSA-NEXT: s_nop 0
4247 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s2
4248 ; GFX8-NOHSA-NEXT: s_add_u32 s2, s36, 16
4249 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s3
4250 ; GFX8-NOHSA-NEXT: s_addc_u32 s3, s37, 0
4251 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s3
4252 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s2
4253 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4254 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s36
4255 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
4256 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s1
4257 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s37
4258 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4259 ; GFX8-NOHSA-NEXT: s_endpgm
4260 ;
4261 ; EG-LABEL: constant_zextload_v32i32_to_v32i64:
4262 ; EG: ; %bb.0:
4263 ; EG-NEXT: ALU 0, @38, KC0[CB0:0-32], KC1[]
4264 ; EG-NEXT: TEX 2 @22
4265 ; EG-NEXT: ALU 10, @39, KC0[], KC1[]
4266 ; EG-NEXT: TEX 4 @28
4267 ; EG-NEXT: ALU 99, @50, KC0[CB0:0-32], KC1[]
4268 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T4.XYZW, T31.X, 0
4269 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T5.XYZW, T30.X, 0
4270 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T6.XYZW, T29.X, 0
4271 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T28.X, 0
4272 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T27.X, 0
4273 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T26.X, 0
4274 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T25.X, 0
4275 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T15.XYZW, T24.X, 0
4276 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T16.XYZW, T13.X, 0
4277 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T17.XYZW, T12.X, 0
4278 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T18.XYZW, T11.X, 0
4279 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T19.XYZW, T10.X, 0
4280 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T20.XYZW, T3.X, 0
4281 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T21.XYZW, T2.X, 0
4282 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T22.XYZW, T1.X, 0
4283 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T23.XYZW, T0.X, 1
4284 ; EG-NEXT: CF_END
4285 ; EG-NEXT: Fetch clause starting at 22:
4286 ; EG-NEXT: VTX_READ_128 T1.XYZW, T0.X, 112, #1
4287 ; EG-NEXT: VTX_READ_128 T2.XYZW, T0.X, 80, #1
4288 ; EG-NEXT: VTX_READ_128 T3.XYZW, T0.X, 96, #1
4289 ; EG-NEXT: Fetch clause starting at 28:
4290 ; EG-NEXT: VTX_READ_128 T10.XYZW, T0.X, 0, #1
4291 ; EG-NEXT: VTX_READ_128 T11.XYZW, T0.X, 16, #1
4292 ; EG-NEXT: VTX_READ_128 T12.XYZW, T0.X, 32, #1
4293 ; EG-NEXT: VTX_READ_128 T13.XYZW, T0.X, 48, #1
4294 ; EG-NEXT: VTX_READ_128 T0.XYZW, T0.X, 64, #1
4295 ; EG-NEXT: ALU clause starting at 38:
4296 ; EG-NEXT: MOV * T0.X, KC0[2].Z,
4297 ; EG-NEXT: ALU clause starting at 39:
4298 ; EG-NEXT: MOV T4.X, T1.Z,
4299 ; EG-NEXT: MOV T4.Y, 0.0,
4300 ; EG-NEXT: MOV * T5.X, T1.X,
4301 ; EG-NEXT: MOV * T5.Y, 0.0,
4302 ; EG-NEXT: MOV T6.X, T3.Z,
4303 ; EG-NEXT: MOV T6.Y, 0.0,
4304 ; EG-NEXT: MOV * T7.X, T3.X,
4305 ; EG-NEXT: MOV * T7.Y, 0.0,
4306 ; EG-NEXT: MOV T8.X, T2.Z,
4307 ; EG-NEXT: MOV T8.Y, 0.0,
4308 ; EG-NEXT: MOV * T9.X, T2.X,
4309 ; EG-NEXT: ALU clause starting at 50:
4310 ; EG-NEXT: MOV * T9.Y, 0.0,
4311 ; EG-NEXT: MOV T14.X, T0.Z,
4312 ; EG-NEXT: MOV T14.Y, 0.0,
4313 ; EG-NEXT: MOV * T15.X, T0.X,
4314 ; EG-NEXT: MOV * T15.Y, 0.0,
4315 ; EG-NEXT: MOV T16.X, T13.Z,
4316 ; EG-NEXT: MOV T16.Y, 0.0,
4317 ; EG-NEXT: MOV * T17.X, T13.X,
4318 ; EG-NEXT: MOV * T17.Y, 0.0,
4319 ; EG-NEXT: MOV T18.X, T12.Z,
4320 ; EG-NEXT: MOV T18.Y, 0.0,
4321 ; EG-NEXT: MOV * T19.X, T12.X,
4322 ; EG-NEXT: MOV * T19.Y, 0.0,
4323 ; EG-NEXT: MOV T20.X, T11.Z,
4324 ; EG-NEXT: MOV T20.Y, 0.0,
4325 ; EG-NEXT: MOV * T21.X, T11.X,
4326 ; EG-NEXT: MOV * T21.Y, 0.0,
4327 ; EG-NEXT: MOV T22.X, T10.Z,
4328 ; EG-NEXT: MOV T22.Y, 0.0,
4329 ; EG-NEXT: MOV * T23.X, T10.X,
4330 ; EG-NEXT: MOV T23.Y, 0.0,
4331 ; EG-NEXT: MOV T4.Z, T1.W,
4332 ; EG-NEXT: MOV T4.W, 0.0,
4333 ; EG-NEXT: MOV * T5.Z, T1.Y,
4334 ; EG-NEXT: MOV * T5.W, 0.0,
4335 ; EG-NEXT: MOV T6.Z, T3.W,
4336 ; EG-NEXT: MOV T6.W, 0.0,
4337 ; EG-NEXT: MOV * T7.Z, T3.Y,
4338 ; EG-NEXT: MOV * T7.W, 0.0,
4339 ; EG-NEXT: MOV T8.Z, T2.W,
4340 ; EG-NEXT: MOV T8.W, 0.0,
4341 ; EG-NEXT: MOV * T9.Z, T2.Y,
4342 ; EG-NEXT: MOV * T9.W, 0.0,
4343 ; EG-NEXT: MOV T14.Z, T0.W,
4344 ; EG-NEXT: MOV T14.W, 0.0,
4345 ; EG-NEXT: MOV * T15.Z, T0.Y,
4346 ; EG-NEXT: MOV * T15.W, 0.0,
4347 ; EG-NEXT: MOV T16.Z, T13.W,
4348 ; EG-NEXT: MOV T16.W, 0.0,
4349 ; EG-NEXT: MOV * T17.Z, T13.Y,
4350 ; EG-NEXT: MOV * T17.W, 0.0,
4351 ; EG-NEXT: MOV T18.Z, T12.W,
4352 ; EG-NEXT: MOV T18.W, 0.0,
4353 ; EG-NEXT: MOV * T19.Z, T12.Y,
4354 ; EG-NEXT: MOV * T19.W, 0.0,
4355 ; EG-NEXT: MOV T20.Z, T11.W,
4356 ; EG-NEXT: MOV T20.W, 0.0,
4357 ; EG-NEXT: MOV * T21.Z, T11.Y,
4358 ; EG-NEXT: MOV * T21.W, 0.0,
4359 ; EG-NEXT: MOV T22.Z, T10.W,
4360 ; EG-NEXT: MOV T22.W, 0.0,
4361 ; EG-NEXT: MOV * T23.Z, T10.Y,
4362 ; EG-NEXT: MOV * T23.W, 0.0,
4363 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
4364 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4365 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
4366 ; EG-NEXT: LSHR T1.X, PV.W, literal.x,
4367 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4368 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
4369 ; EG-NEXT: LSHR T2.X, PV.W, literal.x,
4370 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4371 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
4372 ; EG-NEXT: LSHR T3.X, PV.W, literal.x,
4373 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4374 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
4375 ; EG-NEXT: LSHR T10.X, PV.W, literal.x,
4376 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4377 ; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)
4378 ; EG-NEXT: LSHR T11.X, PV.W, literal.x,
4379 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4380 ; EG-NEXT: 2(2.802597e-45), 96(1.345247e-43)
4381 ; EG-NEXT: LSHR T12.X, PV.W, literal.x,
4382 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4383 ; EG-NEXT: 2(2.802597e-45), 112(1.569454e-43)
4384 ; EG-NEXT: LSHR T13.X, PV.W, literal.x,
4385 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4386 ; EG-NEXT: 2(2.802597e-45), 128(1.793662e-43)
4387 ; EG-NEXT: LSHR T24.X, PV.W, literal.x,
4388 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4389 ; EG-NEXT: 2(2.802597e-45), 144(2.017870e-43)
4390 ; EG-NEXT: LSHR T25.X, PV.W, literal.x,
4391 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4392 ; EG-NEXT: 2(2.802597e-45), 160(2.242078e-43)
4393 ; EG-NEXT: LSHR T26.X, PV.W, literal.x,
4394 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4395 ; EG-NEXT: 2(2.802597e-45), 176(2.466285e-43)
4396 ; EG-NEXT: LSHR T27.X, PV.W, literal.x,
4397 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4398 ; EG-NEXT: 2(2.802597e-45), 192(2.690493e-43)
4399 ; EG-NEXT: LSHR T28.X, PV.W, literal.x,
4400 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4401 ; EG-NEXT: 2(2.802597e-45), 208(2.914701e-43)
4402 ; EG-NEXT: LSHR T29.X, PV.W, literal.x,
4403 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4404 ; EG-NEXT: 2(2.802597e-45), 224(3.138909e-43)
4405 ; EG-NEXT: LSHR T30.X, PV.W, literal.x,
4406 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4407 ; EG-NEXT: 2(2.802597e-45), 240(3.363116e-43)
4408 ; EG-NEXT: LSHR * T31.X, PV.W, literal.x,
4409 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4410 ;
4411 ; GFX9-HSA-LABEL: constant_zextload_v32i32_to_v32i64:
4412 ; GFX9-HSA: ; %bb.0:
4413 ; GFX9-HSA-NEXT: s_load_dwordx4 s[36:39], s[4:5], 0x0
4414 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, 0
4415 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, v1
4416 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
4417 ; GFX9-HSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x40
4418 ; GFX9-HSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0
4419 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
4420 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s30
4421 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s31
4422 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:240
4423 ; GFX9-HSA-NEXT: s_nop 0
4424 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s28
4425 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s29
4426 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:224
4427 ; GFX9-HSA-NEXT: s_nop 0
4428 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s26
4429 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s27
4430 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:208
4431 ; GFX9-HSA-NEXT: s_nop 0
4432 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s24
4433 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s25
4434 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:192
4435 ; GFX9-HSA-NEXT: s_nop 0
4436 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s22
4437 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s23
4438 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:176
4439 ; GFX9-HSA-NEXT: s_nop 0
4440 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s20
4441 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s21
4442 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:160
4443 ; GFX9-HSA-NEXT: s_nop 0
4444 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s18
4445 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s19
4446 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:144
4447 ; GFX9-HSA-NEXT: s_nop 0
4448 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s16
4449 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s17
4450 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:128
4451 ; GFX9-HSA-NEXT: s_nop 0
4452 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s14
4453 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s15
4454 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:112
4455 ; GFX9-HSA-NEXT: s_nop 0
4456 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s12
4457 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s13
4458 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:96
4459 ; GFX9-HSA-NEXT: s_nop 0
4460 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s10
4461 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s11
4462 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:80
4463 ; GFX9-HSA-NEXT: s_nop 0
4464 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s8
4465 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s9
4466 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:64
4467 ; GFX9-HSA-NEXT: s_nop 0
4468 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s6
4469 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s7
4470 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:48
4471 ; GFX9-HSA-NEXT: s_nop 0
4472 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
4473 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s5
4474 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:32
4475 ; GFX9-HSA-NEXT: s_nop 0
4476 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s2
4477 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s3
4478 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37] offset:16
4479 ; GFX9-HSA-NEXT: s_nop 0
4480 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s0
4481 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s1
4482 ; GFX9-HSA-NEXT: global_store_dwordx4 v1, v[0:3], s[36:37]
4483 ; GFX9-HSA-NEXT: s_endpgm
4484 %ld = load <32 x i32>, ptr addrspace(4) %in
4485 %ext = zext <32 x i32> %ld to <32 x i64>
4486 store <32 x i64> %ext, ptr addrspace(1) %out
4487 ret void
4488 }
4490 define amdgpu_kernel void @constant_load_v32i32(ptr addrspace(1) %out, ptr addrspace(4) %in) #0 {
4491 ; GFX6-NOHSA-LABEL: constant_load_v32i32:
4492 ; GFX6-NOHSA: ; %bb.0:
4493 ; GFX6-NOHSA-NEXT: s_load_dwordx4 s[0:3], s[0:1], 0x9
4494 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
4495 ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[16:31], s[2:3], 0x10
4496 ; GFX6-NOHSA-NEXT: s_mov_b32 s39, 0xf000
4497 ; GFX6-NOHSA-NEXT: s_mov_b32 s38, -1
4498 ; GFX6-NOHSA-NEXT: s_mov_b32 s36, s0
4499 ; GFX6-NOHSA-NEXT: s_mov_b32 s37, s1
4500 ; GFX6-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[2:3], 0x0
4501 ; GFX6-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
4502 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s28
4503 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s29
4504 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s30
4505 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s31
4506 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:112
4507 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
4508 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s24
4509 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s25
4510 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s26
4511 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s27
4512 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:96
4513 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
4514 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s20
4515 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s21
4516 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s22
4517 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s23
4518 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:80
4519 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
4520 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s16
4521 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s17
4522 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s18
4523 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s19
4524 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:64
4525 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
4526 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s12
4527 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s13
4528 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s14
4529 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s15
4530 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:48
4531 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
4532 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s8
4533 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s9
4534 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s10
4535 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s11
4536 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:32
4537 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
4538 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s4
4539 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s5
4540 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s6
4541 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s7
4542 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0 offset:16
4543 ; GFX6-NOHSA-NEXT: s_waitcnt expcnt(0)
4544 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v0, s0
4545 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v1, s1
4546 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v2, s2
4547 ; GFX6-NOHSA-NEXT: v_mov_b32_e32 v3, s3
4548 ; GFX6-NOHSA-NEXT: buffer_store_dwordx4 v[0:3], off, s[36:39], 0
4549 ; GFX6-NOHSA-NEXT: s_endpgm
4550 ;
4551 ; GFX7-HSA-LABEL: constant_load_v32i32:
4552 ; GFX7-HSA: ; %bb.0:
4553 ; GFX7-HSA-NEXT: s_load_dwordx4 s[36:39], s[4:5], 0x0
4554 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
4555 ; GFX7-HSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x10
4556 ; GFX7-HSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0
4557 ; GFX7-HSA-NEXT: s_add_u32 s34, s36, 0x70
4558 ; GFX7-HSA-NEXT: s_addc_u32 s35, s37, 0
4559 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s34
4560 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s35
4561 ; GFX7-HSA-NEXT: s_waitcnt lgkmcnt(0)
4562 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s28
4563 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s29
4564 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s30
4565 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s31
4566 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s24
4567 ; GFX7-HSA-NEXT: s_add_u32 s24, s36, 0x60
4568 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[5:6], v[0:3]
4569 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s25
4570 ; GFX7-HSA-NEXT: s_addc_u32 s25, s37, 0
4571 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s24
4572 ; GFX7-HSA-NEXT: v_mov_b32_e32 v6, s26
4573 ; GFX7-HSA-NEXT: v_mov_b32_e32 v7, s27
4574 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s25
4575 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
4576 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s20
4577 ; GFX7-HSA-NEXT: s_add_u32 s20, s36, 0x50
4578 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s21
4579 ; GFX7-HSA-NEXT: s_addc_u32 s21, s37, 0
4580 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s20
4581 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s22
4582 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s23
4583 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s21
4584 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4585 ; GFX7-HSA-NEXT: s_nop 0
4586 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s16
4587 ; GFX7-HSA-NEXT: s_add_u32 s16, s36, 64
4588 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s17
4589 ; GFX7-HSA-NEXT: s_addc_u32 s17, s37, 0
4590 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s16
4591 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s18
4592 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s19
4593 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s17
4594 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4595 ; GFX7-HSA-NEXT: s_nop 0
4596 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s12
4597 ; GFX7-HSA-NEXT: s_add_u32 s12, s36, 48
4598 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s13
4599 ; GFX7-HSA-NEXT: s_addc_u32 s13, s37, 0
4600 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s12
4601 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s14
4602 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s15
4603 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s13
4604 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4605 ; GFX7-HSA-NEXT: s_nop 0
4606 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s8
4607 ; GFX7-HSA-NEXT: s_add_u32 s8, s36, 32
4608 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s9
4609 ; GFX7-HSA-NEXT: s_addc_u32 s9, s37, 0
4610 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s8
4611 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s10
4612 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s11
4613 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s9
4614 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4615 ; GFX7-HSA-NEXT: s_nop 0
4616 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s4
4617 ; GFX7-HSA-NEXT: s_add_u32 s4, s36, 16
4618 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s5
4619 ; GFX7-HSA-NEXT: s_addc_u32 s5, s37, 0
4620 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s4
4621 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s6
4622 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s7
4623 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s5
4624 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4625 ; GFX7-HSA-NEXT: v_mov_b32_e32 v4, s36
4626 ; GFX7-HSA-NEXT: v_mov_b32_e32 v0, s0
4627 ; GFX7-HSA-NEXT: v_mov_b32_e32 v1, s1
4628 ; GFX7-HSA-NEXT: v_mov_b32_e32 v2, s2
4629 ; GFX7-HSA-NEXT: v_mov_b32_e32 v3, s3
4630 ; GFX7-HSA-NEXT: v_mov_b32_e32 v5, s37
4631 ; GFX7-HSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4632 ; GFX7-HSA-NEXT: s_endpgm
4633 ;
4634 ; GFX8-NOHSA-LABEL: constant_load_v32i32:
4635 ; GFX8-NOHSA: ; %bb.0:
4636 ; GFX8-NOHSA-NEXT: s_load_dwordx4 s[36:39], s[0:1], 0x24
4637 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
4638 ; GFX8-NOHSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x40
4639 ; GFX8-NOHSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0
4640 ; GFX8-NOHSA-NEXT: s_add_u32 s34, s36, 0x70
4641 ; GFX8-NOHSA-NEXT: s_addc_u32 s35, s37, 0
4642 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s34
4643 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s35
4644 ; GFX8-NOHSA-NEXT: s_waitcnt lgkmcnt(0)
4645 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s28
4646 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s29
4647 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s30
4648 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s31
4649 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s24
4650 ; GFX8-NOHSA-NEXT: s_add_u32 s24, s36, 0x60
4651 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[5:6], v[0:3]
4652 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s25
4653 ; GFX8-NOHSA-NEXT: s_addc_u32 s25, s37, 0
4654 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s24
4655 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v6, s26
4656 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v7, s27
4657 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s25
4658 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
4659 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s20
4660 ; GFX8-NOHSA-NEXT: s_add_u32 s20, s36, 0x50
4661 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s21
4662 ; GFX8-NOHSA-NEXT: s_addc_u32 s21, s37, 0
4663 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s20
4664 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s22
4665 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s23
4666 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s21
4667 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4668 ; GFX8-NOHSA-NEXT: s_nop 0
4669 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s16
4670 ; GFX8-NOHSA-NEXT: s_add_u32 s16, s36, 64
4671 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s17
4672 ; GFX8-NOHSA-NEXT: s_addc_u32 s17, s37, 0
4673 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s16
4674 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s18
4675 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s19
4676 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s17
4677 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4678 ; GFX8-NOHSA-NEXT: s_nop 0
4679 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s12
4680 ; GFX8-NOHSA-NEXT: s_add_u32 s12, s36, 48
4681 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s13
4682 ; GFX8-NOHSA-NEXT: s_addc_u32 s13, s37, 0
4683 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s12
4684 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s14
4685 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s15
4686 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s13
4687 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4688 ; GFX8-NOHSA-NEXT: s_nop 0
4689 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s8
4690 ; GFX8-NOHSA-NEXT: s_add_u32 s8, s36, 32
4691 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s9
4692 ; GFX8-NOHSA-NEXT: s_addc_u32 s9, s37, 0
4693 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s8
4694 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s10
4695 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s11
4696 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s9
4697 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4698 ; GFX8-NOHSA-NEXT: s_nop 0
4699 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s4
4700 ; GFX8-NOHSA-NEXT: s_add_u32 s4, s36, 16
4701 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s5
4702 ; GFX8-NOHSA-NEXT: s_addc_u32 s5, s37, 0
4703 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s4
4704 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s6
4705 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s7
4706 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s5
4707 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4708 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v4, s36
4709 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v0, s0
4710 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v1, s1
4711 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v2, s2
4712 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v3, s3
4713 ; GFX8-NOHSA-NEXT: v_mov_b32_e32 v5, s37
4714 ; GFX8-NOHSA-NEXT: flat_store_dwordx4 v[4:5], v[0:3]
4715 ; GFX8-NOHSA-NEXT: s_endpgm
4716 ;
4717 ; EG-LABEL: constant_load_v32i32:
4718 ; EG: ; %bb.0:
4719 ; EG-NEXT: ALU 22, @28, KC0[CB0:0-32], KC1[]
4720 ; EG-NEXT: TEX 7 @12
4721 ; EG-NEXT: ALU 1, @51, KC0[], KC1[]
4722 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T8.XYZW, T15.X, 0
4723 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T9.XYZW, T6.X, 0
4724 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T10.XYZW, T5.X, 0
4725 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T11.XYZW, T4.X, 0
4726 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T12.XYZW, T3.X, 0
4727 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T13.XYZW, T2.X, 0
4728 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T14.XYZW, T1.X, 0
4729 ; EG-NEXT: MEM_RAT_CACHELESS STORE_RAW T7.XYZW, T0.X, 1
4730 ; EG-NEXT: CF_END
4731 ; EG-NEXT: Fetch clause starting at 12:
4732 ; EG-NEXT: VTX_READ_128 T8.XYZW, T7.X, 112, #1
4733 ; EG-NEXT: VTX_READ_128 T9.XYZW, T7.X, 96, #1
4734 ; EG-NEXT: VTX_READ_128 T10.XYZW, T7.X, 80, #1
4735 ; EG-NEXT: VTX_READ_128 T11.XYZW, T7.X, 64, #1
4736 ; EG-NEXT: VTX_READ_128 T12.XYZW, T7.X, 48, #1
4737 ; EG-NEXT: VTX_READ_128 T13.XYZW, T7.X, 32, #1
4738 ; EG-NEXT: VTX_READ_128 T14.XYZW, T7.X, 16, #1
4739 ; EG-NEXT: VTX_READ_128 T7.XYZW, T7.X, 0, #1
4740 ; EG-NEXT: ALU clause starting at 28:
4741 ; EG-NEXT: LSHR T0.X, KC0[2].Y, literal.x,
4742 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4743 ; EG-NEXT: 2(2.802597e-45), 16(2.242078e-44)
4744 ; EG-NEXT: LSHR T1.X, PV.W, literal.x,
4745 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4746 ; EG-NEXT: 2(2.802597e-45), 32(4.484155e-44)
4747 ; EG-NEXT: LSHR T2.X, PV.W, literal.x,
4748 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4749 ; EG-NEXT: 2(2.802597e-45), 48(6.726233e-44)
4750 ; EG-NEXT: LSHR T3.X, PV.W, literal.x,
4751 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4752 ; EG-NEXT: 2(2.802597e-45), 64(8.968310e-44)
4753 ; EG-NEXT: LSHR T4.X, PV.W, literal.x,
4754 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4755 ; EG-NEXT: 2(2.802597e-45), 80(1.121039e-43)
4756 ; EG-NEXT: LSHR T5.X, PV.W, literal.x,
4757 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.y,
4758 ; EG-NEXT: 2(2.802597e-45), 96(1.345247e-43)
4759 ; EG-NEXT: LSHR T6.X, PV.W, literal.x,
4760 ; EG-NEXT: MOV * T7.X, KC0[2].Z,
4761 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4762 ; EG-NEXT: ADD_INT * T0.W, KC0[2].Y, literal.x,
4763 ; EG-NEXT: 112(1.569454e-43), 0(0.000000e+00)
4764 ; EG-NEXT: ALU clause starting at 51:
4765 ; EG-NEXT: LSHR * T15.X, T0.W, literal.x,
4766 ; EG-NEXT: 2(2.802597e-45), 0(0.000000e+00)
4767 ;
4768 ; GFX9-HSA-LABEL: constant_load_v32i32:
4769 ; GFX9-HSA: ; %bb.0:
4770 ; GFX9-HSA-NEXT: s_load_dwordx4 s[36:39], s[4:5], 0x0
4771 ; GFX9-HSA-NEXT: v_mov_b32_e32 v8, 0
4772 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
4773 ; GFX9-HSA-NEXT: s_load_dwordx16 s[16:31], s[38:39], 0x40
4774 ; GFX9-HSA-NEXT: s_load_dwordx16 s[0:15], s[38:39], 0x0
4775 ; GFX9-HSA-NEXT: s_waitcnt lgkmcnt(0)
4776 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s28
4777 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s29
4778 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s30
4779 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s31
4780 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[36:37] offset:112
4781 ; GFX9-HSA-NEXT: v_mov_b32_e32 v4, s24
4782 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s20
4783 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s21
4784 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s22
4785 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s23
4786 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[36:37] offset:80
4787 ; GFX9-HSA-NEXT: v_mov_b32_e32 v5, s25
4788 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s16
4789 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s17
4790 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s18
4791 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s19
4792 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[36:37] offset:64
4793 ; GFX9-HSA-NEXT: v_mov_b32_e32 v6, s26
4794 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s12
4795 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s13
4796 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s14
4797 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s15
4798 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[36:37] offset:48
4799 ; GFX9-HSA-NEXT: v_mov_b32_e32 v7, s27
4800 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s8
4801 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s9
4802 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s10
4803 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s11
4804 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[36:37] offset:32
4805 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[4:7], s[36:37] offset:96
4806 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s4
4807 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s5
4808 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s6
4809 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s7
4810 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[36:37] offset:16
4811 ; GFX9-HSA-NEXT: s_nop 0
4812 ; GFX9-HSA-NEXT: v_mov_b32_e32 v0, s0
4813 ; GFX9-HSA-NEXT: v_mov_b32_e32 v1, s1
4814 ; GFX9-HSA-NEXT: v_mov_b32_e32 v2, s2
4815 ; GFX9-HSA-NEXT: v_mov_b32_e32 v3, s3
4816 ; GFX9-HSA-NEXT: global_store_dwordx4 v8, v[0:3], s[36:37]
4817 ; GFX9-HSA-NEXT: s_endpgm
4818 %ld = load <32 x i32>, ptr addrspace(4) %in
4819 store <32 x i32> %ld, ptr addrspace(1) %out
4820 ret void
4821 }
4823 attributes #0 = { nounwind }