| blob | f88aaf389ca9aeb54bb2e6ed8b939b0aed70d269 |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=hawaii -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=CIVI,HAWAII %s
3 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=fiji -verify-machineinstrs < %s | FileCheck -enable-var-scope -check-prefixes=CIVI,FIJI %s
4 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx900 -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX9 %s
5 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1010 -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX10 %s
6 ; RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx1100 -verify-machineinstrs < %s | FileCheck -enable-var-scope --check-prefix=GFX11 %s
8 define void @local_store_i56(ptr addrspace(3) %ptr, i56 %arg) #0 {
9 ; CIVI-LABEL: local_store_i56:
10 ; CIVI: ; %bb.0:
11 ; CIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
12 ; CIVI-NEXT: s_mov_b32 m0, -1
13 ; CIVI-NEXT: ds_write_b16 v0, v2 offset:4
14 ; CIVI-NEXT: ds_write_b32 v0, v1
15 ; CIVI-NEXT: v_lshrrev_b32_e32 v1, 16, v2
16 ; CIVI-NEXT: ds_write_b8 v0, v1 offset:6
17 ; CIVI-NEXT: s_waitcnt lgkmcnt(0)
18 ; CIVI-NEXT: s_setpc_b64 s[30:31]
19 ;
20 ; GFX9-LABEL: local_store_i56:
21 ; GFX9: ; %bb.0:
22 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
23 ; GFX9-NEXT: ds_write_b8_d16_hi v0, v2 offset:6
24 ; GFX9-NEXT: ds_write_b16 v0, v2 offset:4
25 ; GFX9-NEXT: ds_write_b32 v0, v1
26 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
27 ; GFX9-NEXT: s_setpc_b64 s[30:31]
28 ;
29 ; GFX10-LABEL: local_store_i56:
30 ; GFX10: ; %bb.0:
31 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
32 ; GFX10-NEXT: ds_write_b8_d16_hi v0, v2 offset:6
33 ; GFX10-NEXT: ds_write_b16 v0, v2 offset:4
34 ; GFX10-NEXT: ds_write_b32 v0, v1
35 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
36 ; GFX10-NEXT: s_setpc_b64 s[30:31]
37 ;
38 ; GFX11-LABEL: local_store_i56:
39 ; GFX11: ; %bb.0:
40 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
41 ; GFX11-NEXT: ds_store_b8_d16_hi v0, v2 offset:6
42 ; GFX11-NEXT: ds_store_b16 v0, v2 offset:4
43 ; GFX11-NEXT: ds_store_b32 v0, v1
44 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
45 ; GFX11-NEXT: s_setpc_b64 s[30:31]
46 store i56 %arg, ptr addrspace(3) %ptr, align 8
47 ret void
48 }
50 define amdgpu_kernel void @local_store_i55(ptr addrspace(3) %ptr, i55 %arg) #0 {
51 ; HAWAII-LABEL: local_store_i55:
52 ; HAWAII: ; %bb.0:
53 ; HAWAII-NEXT: s_or_b32 s0, s4, 14
54 ; HAWAII-NEXT: v_mov_b32_e32 v0, s0
55 ; HAWAII-NEXT: v_mov_b32_e32 v1, s5
56 ; HAWAII-NEXT: flat_load_ubyte v0, v[0:1]
57 ; HAWAII-NEXT: s_load_dword s2, s[4:5], 0x0
58 ; HAWAII-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
59 ; HAWAII-NEXT: s_mov_b32 m0, -1
60 ; HAWAII-NEXT: s_waitcnt lgkmcnt(0)
61 ; HAWAII-NEXT: v_mov_b32_e32 v1, s2
62 ; HAWAII-NEXT: v_mov_b32_e32 v2, s1
63 ; HAWAII-NEXT: v_mov_b32_e32 v3, s0
64 ; HAWAII-NEXT: ds_write_b16 v1, v2 offset:4
65 ; HAWAII-NEXT: s_waitcnt vmcnt(0)
66 ; HAWAII-NEXT: v_and_b32_e32 v0, 0x7f, v0
67 ; HAWAII-NEXT: ds_write_b8 v1, v0 offset:6
68 ; HAWAII-NEXT: ds_write_b32 v1, v3
69 ; HAWAII-NEXT: s_endpgm
70 ;
71 ; FIJI-LABEL: local_store_i55:
72 ; FIJI: ; %bb.0:
73 ; FIJI-NEXT: s_or_b32 s0, s4, 14
74 ; FIJI-NEXT: v_mov_b32_e32 v0, s0
75 ; FIJI-NEXT: v_mov_b32_e32 v1, s5
76 ; FIJI-NEXT: flat_load_ubyte v0, v[0:1]
77 ; FIJI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
78 ; FIJI-NEXT: s_load_dword s2, s[4:5], 0x0
79 ; FIJI-NEXT: s_mov_b32 m0, -1
80 ; FIJI-NEXT: s_waitcnt lgkmcnt(0)
81 ; FIJI-NEXT: s_and_b32 s3, s1, 0xffff
82 ; FIJI-NEXT: v_mov_b32_e32 v1, s2
83 ; FIJI-NEXT: v_mov_b32_e32 v2, s1
84 ; FIJI-NEXT: v_mov_b32_e32 v3, s0
85 ; FIJI-NEXT: ds_write_b16 v1, v2 offset:4
86 ; FIJI-NEXT: s_waitcnt vmcnt(0)
87 ; FIJI-NEXT: v_lshlrev_b32_e32 v0, 16, v0
88 ; FIJI-NEXT: v_or_b32_e32 v0, s3, v0
89 ; FIJI-NEXT: v_bfe_u32 v0, v0, 16, 7
90 ; FIJI-NEXT: ds_write_b8 v1, v0 offset:6
91 ; FIJI-NEXT: ds_write_b32 v1, v3
92 ; FIJI-NEXT: s_endpgm
93 ;
94 ; GFX9-LABEL: local_store_i55:
95 ; GFX9: ; %bb.0:
96 ; GFX9-NEXT: v_mov_b32_e32 v0, 0
97 ; GFX9-NEXT: global_load_ubyte_d16_hi v0, v0, s[4:5] offset:14
98 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
99 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0
100 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
101 ; GFX9-NEXT: s_and_b32 s3, s1, 0xffff
102 ; GFX9-NEXT: v_mov_b32_e32 v1, s2
103 ; GFX9-NEXT: v_mov_b32_e32 v2, s1
104 ; GFX9-NEXT: v_mov_b32_e32 v3, s0
105 ; GFX9-NEXT: ds_write_b16 v1, v2 offset:4
106 ; GFX9-NEXT: s_waitcnt vmcnt(0)
107 ; GFX9-NEXT: v_or_b32_e32 v0, s3, v0
108 ; GFX9-NEXT: v_and_b32_e32 v0, 0x7fffff, v0
109 ; GFX9-NEXT: ds_write_b8_d16_hi v1, v0 offset:6
110 ; GFX9-NEXT: ds_write_b32 v1, v3
111 ; GFX9-NEXT: s_endpgm
112 ;
113 ; GFX10-LABEL: local_store_i55:
114 ; GFX10: ; %bb.0:
115 ; GFX10-NEXT: v_mov_b32_e32 v0, 0
116 ; GFX10-NEXT: s_clause 0x1
117 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
118 ; GFX10-NEXT: s_load_dword s2, s[4:5], 0x0
119 ; GFX10-NEXT: global_load_ubyte_d16_hi v0, v0, s[4:5] offset:14
120 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
121 ; GFX10-NEXT: s_and_b32 s3, s1, 0xffff
122 ; GFX10-NEXT: v_mov_b32_e32 v1, s2
123 ; GFX10-NEXT: v_mov_b32_e32 v2, s1
124 ; GFX10-NEXT: v_mov_b32_e32 v3, s0
125 ; GFX10-NEXT: s_waitcnt vmcnt(0)
126 ; GFX10-NEXT: v_or_b32_e32 v0, s3, v0
127 ; GFX10-NEXT: v_and_b32_e32 v0, 0x7fffff, v0
128 ; GFX10-NEXT: ds_write_b16 v1, v2 offset:4
129 ; GFX10-NEXT: ds_write_b8_d16_hi v1, v0 offset:6
130 ; GFX10-NEXT: ds_write_b32 v1, v3
131 ; GFX10-NEXT: s_endpgm
132 ;
133 ; GFX11-LABEL: local_store_i55:
134 ; GFX11: ; %bb.0:
135 ; GFX11-NEXT: v_mov_b32_e32 v0, 0
136 ; GFX11-NEXT: global_load_d16_hi_u8 v0, v0, s[0:1] offset:14
137 ; GFX11-NEXT: s_clause 0x1
138 ; GFX11-NEXT: s_load_b64 s[2:3], s[0:1], 0x8
139 ; GFX11-NEXT: s_load_b32 s0, s[0:1], 0x0
140 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
141 ; GFX11-NEXT: s_and_b32 s1, s3, 0xffff
142 ; GFX11-NEXT: v_dual_mov_b32 v1, s0 :: v_dual_mov_b32 v2, s3
143 ; GFX11-NEXT: v_mov_b32_e32 v3, s2
144 ; GFX11-NEXT: s_waitcnt vmcnt(0)
145 ; GFX11-NEXT: v_or_b32_e32 v0, s1, v0
146 ; GFX11-NEXT: s_delay_alu instid0(VALU_DEP_1)
147 ; GFX11-NEXT: v_and_b32_e32 v0, 0x7fffff, v0
148 ; GFX11-NEXT: ds_store_b8_d16_hi v1, v0 offset:6
149 ; GFX11-NEXT: ds_store_b16 v1, v2 offset:4
150 ; GFX11-NEXT: ds_store_b32 v1, v3
151 ; GFX11-NEXT: s_endpgm
152 store i55 %arg, ptr addrspace(3) %ptr, align 8
153 ret void
154 }
156 define amdgpu_kernel void @local_store_i48(ptr addrspace(3) %ptr, i48 %arg) #0 {
157 ; HAWAII-LABEL: local_store_i48:
158 ; HAWAII: ; %bb.0:
159 ; HAWAII-NEXT: s_load_dword s2, s[4:5], 0x0
160 ; HAWAII-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
161 ; HAWAII-NEXT: s_mov_b32 m0, -1
162 ; HAWAII-NEXT: s_waitcnt lgkmcnt(0)
163 ; HAWAII-NEXT: v_mov_b32_e32 v0, s2
164 ; HAWAII-NEXT: v_mov_b32_e32 v1, s1
165 ; HAWAII-NEXT: v_mov_b32_e32 v2, s0
166 ; HAWAII-NEXT: ds_write_b16 v0, v1 offset:4
167 ; HAWAII-NEXT: ds_write_b32 v0, v2
168 ; HAWAII-NEXT: s_endpgm
169 ;
170 ; FIJI-LABEL: local_store_i48:
171 ; FIJI: ; %bb.0:
172 ; FIJI-NEXT: s_load_dword s2, s[4:5], 0x0
173 ; FIJI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
174 ; FIJI-NEXT: s_mov_b32 m0, -1
175 ; FIJI-NEXT: s_waitcnt lgkmcnt(0)
176 ; FIJI-NEXT: v_mov_b32_e32 v0, s2
177 ; FIJI-NEXT: v_mov_b32_e32 v1, s1
178 ; FIJI-NEXT: v_mov_b32_e32 v2, s0
179 ; FIJI-NEXT: ds_write_b16 v0, v1 offset:4
180 ; FIJI-NEXT: ds_write_b32 v0, v2
181 ; FIJI-NEXT: s_endpgm
182 ;
183 ; GFX9-LABEL: local_store_i48:
184 ; GFX9: ; %bb.0:
185 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x0
186 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
187 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
188 ; GFX9-NEXT: v_mov_b32_e32 v0, s2
189 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
190 ; GFX9-NEXT: v_mov_b32_e32 v2, s0
191 ; GFX9-NEXT: ds_write_b16 v0, v1 offset:4
192 ; GFX9-NEXT: ds_write_b32 v0, v2
193 ; GFX9-NEXT: s_endpgm
194 ;
195 ; GFX10-LABEL: local_store_i48:
196 ; GFX10: ; %bb.0:
197 ; GFX10-NEXT: s_clause 0x1
198 ; GFX10-NEXT: s_load_dword s2, s[4:5], 0x0
199 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
200 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
201 ; GFX10-NEXT: v_mov_b32_e32 v0, s2
202 ; GFX10-NEXT: v_mov_b32_e32 v1, s1
203 ; GFX10-NEXT: v_mov_b32_e32 v2, s0
204 ; GFX10-NEXT: ds_write_b16 v0, v1 offset:4
205 ; GFX10-NEXT: ds_write_b32 v0, v2
206 ; GFX10-NEXT: s_endpgm
207 ;
208 ; GFX11-LABEL: local_store_i48:
209 ; GFX11: ; %bb.0:
210 ; GFX11-NEXT: s_clause 0x1
211 ; GFX11-NEXT: s_load_b32 s2, s[0:1], 0x0
212 ; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x8
213 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
214 ; GFX11-NEXT: v_dual_mov_b32 v0, s2 :: v_dual_mov_b32 v1, s1
215 ; GFX11-NEXT: v_mov_b32_e32 v2, s0
216 ; GFX11-NEXT: ds_store_b16 v0, v1 offset:4
217 ; GFX11-NEXT: ds_store_b32 v0, v2
218 ; GFX11-NEXT: s_endpgm
219 store i48 %arg, ptr addrspace(3) %ptr, align 8
220 ret void
221 }
223 define amdgpu_kernel void @local_store_i65(ptr addrspace(3) %ptr, i65 %arg) #0 {
224 ; HAWAII-LABEL: local_store_i65:
225 ; HAWAII: ; %bb.0:
226 ; HAWAII-NEXT: s_load_dword s2, s[4:5], 0x4
227 ; HAWAII-NEXT: s_load_dword s3, s[4:5], 0x0
228 ; HAWAII-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x2
229 ; HAWAII-NEXT: s_mov_b32 m0, -1
230 ; HAWAII-NEXT: s_waitcnt lgkmcnt(0)
231 ; HAWAII-NEXT: s_and_b32 s2, s2, 1
232 ; HAWAII-NEXT: v_mov_b32_e32 v2, s3
233 ; HAWAII-NEXT: v_mov_b32_e32 v0, s2
234 ; HAWAII-NEXT: ds_write_b8 v2, v0 offset:8
235 ; HAWAII-NEXT: v_mov_b32_e32 v0, s0
236 ; HAWAII-NEXT: v_mov_b32_e32 v1, s1
237 ; HAWAII-NEXT: ds_write_b64 v2, v[0:1]
238 ; HAWAII-NEXT: s_endpgm
239 ;
240 ; FIJI-LABEL: local_store_i65:
241 ; FIJI: ; %bb.0:
242 ; FIJI-NEXT: s_load_dword s2, s[4:5], 0x10
243 ; FIJI-NEXT: s_load_dword s3, s[4:5], 0x0
244 ; FIJI-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
245 ; FIJI-NEXT: s_mov_b32 m0, -1
246 ; FIJI-NEXT: s_waitcnt lgkmcnt(0)
247 ; FIJI-NEXT: s_and_b32 s2, s2, 1
248 ; FIJI-NEXT: v_mov_b32_e32 v2, s3
249 ; FIJI-NEXT: v_mov_b32_e32 v0, s2
250 ; FIJI-NEXT: ds_write_b8 v2, v0 offset:8
251 ; FIJI-NEXT: v_mov_b32_e32 v0, s0
252 ; FIJI-NEXT: v_mov_b32_e32 v1, s1
253 ; FIJI-NEXT: ds_write_b64 v2, v[0:1]
254 ; FIJI-NEXT: s_endpgm
255 ;
256 ; GFX9-LABEL: local_store_i65:
257 ; GFX9: ; %bb.0:
258 ; GFX9-NEXT: s_load_dword s2, s[4:5], 0x10
259 ; GFX9-NEXT: s_load_dword s3, s[4:5], 0x0
260 ; GFX9-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
261 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
262 ; GFX9-NEXT: s_and_b32 s2, s2, 1
263 ; GFX9-NEXT: v_mov_b32_e32 v2, s3
264 ; GFX9-NEXT: v_mov_b32_e32 v0, s0
265 ; GFX9-NEXT: v_mov_b32_e32 v3, s2
266 ; GFX9-NEXT: v_mov_b32_e32 v1, s1
267 ; GFX9-NEXT: ds_write_b8 v2, v3 offset:8
268 ; GFX9-NEXT: ds_write_b64 v2, v[0:1]
269 ; GFX9-NEXT: s_endpgm
270 ;
271 ; GFX10-LABEL: local_store_i65:
272 ; GFX10: ; %bb.0:
273 ; GFX10-NEXT: s_clause 0x2
274 ; GFX10-NEXT: s_load_dword s2, s[4:5], 0x10
275 ; GFX10-NEXT: s_load_dword s3, s[4:5], 0x0
276 ; GFX10-NEXT: s_load_dwordx2 s[0:1], s[4:5], 0x8
277 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
278 ; GFX10-NEXT: s_and_b32 s2, s2, 1
279 ; GFX10-NEXT: v_mov_b32_e32 v2, s3
280 ; GFX10-NEXT: v_mov_b32_e32 v3, s2
281 ; GFX10-NEXT: v_mov_b32_e32 v0, s0
282 ; GFX10-NEXT: v_mov_b32_e32 v1, s1
283 ; GFX10-NEXT: ds_write_b8 v2, v3 offset:8
284 ; GFX10-NEXT: ds_write_b64 v2, v[0:1]
285 ; GFX10-NEXT: s_endpgm
286 ;
287 ; GFX11-LABEL: local_store_i65:
288 ; GFX11: ; %bb.0:
289 ; GFX11-NEXT: s_clause 0x2
290 ; GFX11-NEXT: s_load_b32 s2, s[0:1], 0x10
291 ; GFX11-NEXT: s_load_b32 s3, s[0:1], 0x0
292 ; GFX11-NEXT: s_load_b64 s[0:1], s[0:1], 0x8
293 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
294 ; GFX11-NEXT: s_and_b32 s2, s2, 1
295 ; GFX11-NEXT: s_delay_alu instid0(SALU_CYCLE_1)
296 ; GFX11-NEXT: v_dual_mov_b32 v2, s3 :: v_dual_mov_b32 v3, s2
297 ; GFX11-NEXT: v_dual_mov_b32 v0, s0 :: v_dual_mov_b32 v1, s1
298 ; GFX11-NEXT: ds_store_b8 v2, v3 offset:8
299 ; GFX11-NEXT: ds_store_b64 v2, v[0:1]
300 ; GFX11-NEXT: s_endpgm
301 store i65 %arg, ptr addrspace(3) %ptr, align 8
302 ret void
303 }
305 define void @local_store_i13(ptr addrspace(3) %ptr, i13 %arg) #0 {
306 ; CIVI-LABEL: local_store_i13:
307 ; CIVI: ; %bb.0:
308 ; CIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
309 ; CIVI-NEXT: v_and_b32_e32 v1, 0x1fff, v1
310 ; CIVI-NEXT: s_mov_b32 m0, -1
311 ; CIVI-NEXT: ds_write_b16 v0, v1
312 ; CIVI-NEXT: s_waitcnt lgkmcnt(0)
313 ; CIVI-NEXT: s_setpc_b64 s[30:31]
314 ;
315 ; GFX9-LABEL: local_store_i13:
316 ; GFX9: ; %bb.0:
317 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
318 ; GFX9-NEXT: v_and_b32_e32 v1, 0x1fff, v1
319 ; GFX9-NEXT: ds_write_b16 v0, v1
320 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
321 ; GFX9-NEXT: s_setpc_b64 s[30:31]
322 ;
323 ; GFX10-LABEL: local_store_i13:
324 ; GFX10: ; %bb.0:
325 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
326 ; GFX10-NEXT: v_and_b32_e32 v1, 0x1fff, v1
327 ; GFX10-NEXT: ds_write_b16 v0, v1
328 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
329 ; GFX10-NEXT: s_setpc_b64 s[30:31]
330 ;
331 ; GFX11-LABEL: local_store_i13:
332 ; GFX11: ; %bb.0:
333 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
334 ; GFX11-NEXT: v_and_b32_e32 v1, 0x1fff, v1
335 ; GFX11-NEXT: ds_store_b16 v0, v1
336 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
337 ; GFX11-NEXT: s_setpc_b64 s[30:31]
338 store i13 %arg, ptr addrspace(3) %ptr, align 8
339 ret void
340 }
342 define void @local_store_i17(ptr addrspace(3) %ptr, i17 %arg) #0 {
343 ; CIVI-LABEL: local_store_i17:
344 ; CIVI: ; %bb.0:
345 ; CIVI-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
346 ; CIVI-NEXT: s_mov_b32 m0, -1
347 ; CIVI-NEXT: ds_write_b16 v0, v1
348 ; CIVI-NEXT: v_bfe_u32 v1, v1, 16, 1
349 ; CIVI-NEXT: ds_write_b8 v0, v1 offset:2
350 ; CIVI-NEXT: s_waitcnt lgkmcnt(0)
351 ; CIVI-NEXT: s_setpc_b64 s[30:31]
352 ;
353 ; GFX9-LABEL: local_store_i17:
354 ; GFX9: ; %bb.0:
355 ; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
356 ; GFX9-NEXT: ds_write_b16 v0, v1
357 ; GFX9-NEXT: v_and_b32_e32 v1, 0x1ffff, v1
358 ; GFX9-NEXT: ds_write_b8_d16_hi v0, v1 offset:2
359 ; GFX9-NEXT: s_waitcnt lgkmcnt(0)
360 ; GFX9-NEXT: s_setpc_b64 s[30:31]
361 ;
362 ; GFX10-LABEL: local_store_i17:
363 ; GFX10: ; %bb.0:
364 ; GFX10-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
365 ; GFX10-NEXT: v_and_b32_e32 v2, 0x1ffff, v1
366 ; GFX10-NEXT: ds_write_b16 v0, v1
367 ; GFX10-NEXT: ds_write_b8_d16_hi v0, v2 offset:2
368 ; GFX10-NEXT: s_waitcnt lgkmcnt(0)
369 ; GFX10-NEXT: s_setpc_b64 s[30:31]
370 ;
371 ; GFX11-LABEL: local_store_i17:
372 ; GFX11: ; %bb.0:
373 ; GFX11-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
374 ; GFX11-NEXT: v_and_b32_e32 v2, 0x1ffff, v1
375 ; GFX11-NEXT: ds_store_b16 v0, v1
376 ; GFX11-NEXT: ds_store_b8_d16_hi v0, v2 offset:2
377 ; GFX11-NEXT: s_waitcnt lgkmcnt(0)
378 ; GFX11-NEXT: s_setpc_b64 s[30:31]
379 store i17 %arg, ptr addrspace(3) %ptr, align 8
380 ret void
381 }
383 attributes #0 = { nounwind }