1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -float-abi hard -mattr=+bf16,+fullfp16 < %s | FileCheck %s --check-prefix=HARD
3 ; RUN: llc -float-abi soft -mattr=+bf16,+fullfp16 < %s | FileCheck %s --check-prefix=SOFT
5 target datalayout = "e-m:e-p:32:32-Fi8-i64:64-v128:64:128-a:0:32-n32-S64"
6 target triple = "armv8.6a-arm-none-eabi"
8 define bfloat @load_scalar_bf(ptr %addr) {
9 ; HARD-LABEL: load_scalar_bf:
10 ; HARD: @ %bb.0: @ %entry
11 ; HARD-NEXT: vldr.16 s0, [r0]
14 ; SOFT-LABEL: load_scalar_bf:
15 ; SOFT: @ %bb.0: @ %entry
16 ; SOFT-NEXT: vldr.16 s0, [r0]
17 ; SOFT-NEXT: vmov r0, s0
20 %0 = load bfloat, ptr %addr, align 2
24 define void @store_scalar_bf(bfloat %v, ptr %addr) {
25 ; HARD-LABEL: store_scalar_bf:
26 ; HARD: @ %bb.0: @ %entry
27 ; HARD-NEXT: vstr.16 s0, [r0]
30 ; SOFT-LABEL: store_scalar_bf:
31 ; SOFT: @ %bb.0: @ %entry
32 ; SOFT-NEXT: vmov.f16 s0, r0
33 ; SOFT-NEXT: vstr.16 s0, [r1]
36 store bfloat %v, ptr %addr, align 2
40 define <4 x bfloat> @load_vector4_bf(ptr %addr) {
41 ; HARD-LABEL: load_vector4_bf:
42 ; HARD: @ %bb.0: @ %entry
43 ; HARD-NEXT: vldr d0, [r0]
46 ; SOFT-LABEL: load_vector4_bf:
47 ; SOFT: @ %bb.0: @ %entry
48 ; SOFT-NEXT: vldr d16, [r0]
49 ; SOFT-NEXT: vmov r0, r1, d16
52 %0 = load <4 x bfloat>, ptr %addr, align 8
56 define void @store_vector4_bf(<4 x bfloat> %v, ptr %addr) {
57 ; HARD-LABEL: store_vector4_bf:
58 ; HARD: @ %bb.0: @ %entry
59 ; HARD-NEXT: vstr d0, [r0]
62 ; SOFT-LABEL: store_vector4_bf:
63 ; SOFT: @ %bb.0: @ %entry
64 ; SOFT-NEXT: strd r0, r1, [r2]
67 store <4 x bfloat> %v, ptr %addr, align 8
71 define <8 x bfloat> @load_vector8_bf(ptr %addr) {
72 ; HARD-LABEL: load_vector8_bf:
73 ; HARD: @ %bb.0: @ %entry
74 ; HARD-NEXT: vld1.64 {d0, d1}, [r0]
77 ; SOFT-LABEL: load_vector8_bf:
78 ; SOFT: @ %bb.0: @ %entry
79 ; SOFT-NEXT: vld1.64 {d16, d17}, [r0]
80 ; SOFT-NEXT: vmov r0, r1, d16
81 ; SOFT-NEXT: vmov r2, r3, d17
84 %0 = load <8 x bfloat>, ptr %addr, align 8
88 define void @store_vector8_bf(<8 x bfloat> %v, ptr %addr) {
89 ; HARD-LABEL: store_vector8_bf:
90 ; HARD: @ %bb.0: @ %entry
91 ; HARD-NEXT: vst1.64 {d0, d1}, [r0]
94 ; SOFT-LABEL: store_vector8_bf:
95 ; SOFT: @ %bb.0: @ %entry
96 ; SOFT-NEXT: vmov d17, r2, r3
97 ; SOFT-NEXT: ldr r12, [sp]
98 ; SOFT-NEXT: vmov d16, r0, r1
99 ; SOFT-NEXT: vst1.64 {d16, d17}, [r12]
102 store <8 x bfloat> %v, ptr %addr, align 8