1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc --mtriple=loongarch64 --mattr=+lsx < %s | FileCheck %s
4 declare <2 x i64> @llvm.loongarch.lsx.vldi(i32)
6 define <2 x i64> @lsx_vldi() nounwind {
7 ; CHECK-LABEL: lsx_vldi:
8 ; CHECK: # %bb.0: # %entry
9 ; CHECK-NEXT: vldi $vr0, 4095
12 %res = call <2 x i64> @llvm.loongarch.lsx.vldi(i32 4095)
16 declare <16 x i8> @llvm.loongarch.lsx.vrepli.b(i32)
18 define <16 x i8> @lsx_vrepli_b() nounwind {
19 ; CHECK-LABEL: lsx_vrepli_b:
20 ; CHECK: # %bb.0: # %entry
21 ; CHECK-NEXT: vrepli.b $vr0, 511
24 %res = call <16 x i8> @llvm.loongarch.lsx.vrepli.b(i32 511)
28 declare <8 x i16> @llvm.loongarch.lsx.vrepli.h(i32)
30 define <8 x i16> @lsx_vrepli_h() nounwind {
31 ; CHECK-LABEL: lsx_vrepli_h:
32 ; CHECK: # %bb.0: # %entry
33 ; CHECK-NEXT: vrepli.h $vr0, 511
36 %res = call <8 x i16> @llvm.loongarch.lsx.vrepli.h(i32 511)
40 declare <4 x i32> @llvm.loongarch.lsx.vrepli.w(i32)
42 define <4 x i32> @lsx_vrepli_w() nounwind {
43 ; CHECK-LABEL: lsx_vrepli_w:
44 ; CHECK: # %bb.0: # %entry
45 ; CHECK-NEXT: vrepli.w $vr0, 511
48 %res = call <4 x i32> @llvm.loongarch.lsx.vrepli.w(i32 511)
52 declare <2 x i64> @llvm.loongarch.lsx.vrepli.d(i32)
54 define <2 x i64> @lsx_vrepli_d() nounwind {
55 ; CHECK-LABEL: lsx_vrepli_d:
56 ; CHECK: # %bb.0: # %entry
57 ; CHECK-NEXT: vrepli.d $vr0, 511
60 %res = call <2 x i64> @llvm.loongarch.lsx.vrepli.d(i32 511)