1 # NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2 # RUN: llc -O0 -mtriple=mipsel-linux-gnu -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP32
3 # RUN: llc -O0 -mtriple=mipsel-linux-gnu -mattr=+fp64,+mips32r2 -run-pass=legalizer -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=FP64
6 define void @f32toi64() {entry: ret void}
7 define void @f32toi32() {entry: ret void}
8 define void @f32toi16() {entry: ret void}
9 define void @f32toi8() {entry: ret void}
10 define void @f64toi64() {entry: ret void}
11 define void @f64toi32() {entry: ret void}
12 define void @f64toi16() {entry: ret void}
13 define void @f64toi8() {entry: ret void}
14 define void @f32tou64() {entry: ret void}
15 define void @f32tou32() {entry: ret void}
16 define void @f32tou16() {entry: ret void}
17 define void @f32tou8() {entry: ret void}
18 define void @f64tou64() {entry: ret void}
19 define void @f64tou32() {entry: ret void}
20 define void @f64tou16() {entry: ret void}
21 define void @f64tou8() {entry: ret void}
27 tracksRegLiveness: true
32 ; FP32-LABEL: name: f32toi64
34 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
35 ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
36 ; FP32: $f12 = COPY [[COPY]](s32)
37 ; FP32: JAL &__fixsfdi, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $v0, implicit-def $v1
38 ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
39 ; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
40 ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
41 ; FP32: $v0 = COPY [[COPY1]](s32)
42 ; FP32: $v1 = COPY [[COPY2]](s32)
43 ; FP32: RetRA implicit $v0, implicit $v1
44 ; FP64-LABEL: name: f32toi64
46 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
47 ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
48 ; FP64: $f12 = COPY [[COPY]](s32)
49 ; FP64: JAL &__fixsfdi, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $v0, implicit-def $v1
50 ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
51 ; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
52 ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
53 ; FP64: $v0 = COPY [[COPY1]](s32)
54 ; FP64: $v1 = COPY [[COPY2]](s32)
55 ; FP64: RetRA implicit $v0, implicit $v1
57 %1:_(s64) = G_FPTOSI %0(s32)
58 %2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
61 RetRA implicit $v0, implicit $v1
67 tracksRegLiveness: true
72 ; FP32-LABEL: name: f32toi32
74 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
75 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
76 ; FP32: $v0 = COPY [[FPTOSI]](s32)
77 ; FP32: RetRA implicit $v0
78 ; FP64-LABEL: name: f32toi32
80 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
81 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
82 ; FP64: $v0 = COPY [[FPTOSI]](s32)
83 ; FP64: RetRA implicit $v0
85 %1:_(s32) = G_FPTOSI %0(s32)
93 tracksRegLiveness: true
98 ; FP32-LABEL: name: f32toi16
100 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
101 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
102 ; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
103 ; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[FPTOSI]], [[C]](s32)
104 ; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
105 ; FP32: $v0 = COPY [[ASHR]](s32)
106 ; FP32: RetRA implicit $v0
107 ; FP64-LABEL: name: f32toi16
108 ; FP64: liveins: $f12
109 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
110 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
111 ; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
112 ; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[FPTOSI]], [[C]](s32)
113 ; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
114 ; FP64: $v0 = COPY [[ASHR]](s32)
115 ; FP64: RetRA implicit $v0
116 %0:_(s32) = COPY $f12
117 %1:_(s16) = G_FPTOSI %0(s32)
118 %2:_(s32) = G_SEXT %1(s16)
126 tracksRegLiveness: true
131 ; FP32-LABEL: name: f32toi8
132 ; FP32: liveins: $f12
133 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
134 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
135 ; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
136 ; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[FPTOSI]], [[C]](s32)
137 ; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
138 ; FP32: $v0 = COPY [[ASHR]](s32)
139 ; FP32: RetRA implicit $v0
140 ; FP64-LABEL: name: f32toi8
141 ; FP64: liveins: $f12
142 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
143 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
144 ; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
145 ; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[FPTOSI]], [[C]](s32)
146 ; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
147 ; FP64: $v0 = COPY [[ASHR]](s32)
148 ; FP64: RetRA implicit $v0
149 %0:_(s32) = COPY $f12
150 %1:_(s8) = G_FPTOSI %0(s32)
151 %2:_(s32) = G_SEXT %1(s8)
159 tracksRegLiveness: true
164 ; FP32-LABEL: name: f64toi64
166 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
167 ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
168 ; FP32: $d6 = COPY [[COPY]](s64)
169 ; FP32: JAL &__fixdfdi, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit-def $v0, implicit-def $v1
170 ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
171 ; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
172 ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
173 ; FP32: $v0 = COPY [[COPY1]](s32)
174 ; FP32: $v1 = COPY [[COPY2]](s32)
175 ; FP32: RetRA implicit $v0, implicit $v1
176 ; FP64-LABEL: name: f64toi64
178 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
179 ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
180 ; FP64: $d12_64 = COPY [[COPY]](s64)
181 ; FP64: JAL &__fixdfdi, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $d12_64, implicit-def $v0, implicit-def $v1
182 ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
183 ; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
184 ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
185 ; FP64: $v0 = COPY [[COPY1]](s32)
186 ; FP64: $v1 = COPY [[COPY2]](s32)
187 ; FP64: RetRA implicit $v0, implicit $v1
189 %1:_(s64) = G_FPTOSI %0(s64)
190 %2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
193 RetRA implicit $v0, implicit $v1
199 tracksRegLiveness: true
204 ; FP32-LABEL: name: f64toi32
206 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
207 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
208 ; FP32: $v0 = COPY [[FPTOSI]](s32)
209 ; FP32: RetRA implicit $v0
210 ; FP64-LABEL: name: f64toi32
212 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
213 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
214 ; FP64: $v0 = COPY [[FPTOSI]](s32)
215 ; FP64: RetRA implicit $v0
217 %1:_(s32) = G_FPTOSI %0(s64)
225 tracksRegLiveness: true
230 ; FP32-LABEL: name: f64toi16
232 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
233 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
234 ; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
235 ; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[FPTOSI]], [[C]](s32)
236 ; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
237 ; FP32: $v0 = COPY [[ASHR]](s32)
238 ; FP32: RetRA implicit $v0
239 ; FP64-LABEL: name: f64toi16
241 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
242 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
243 ; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 16
244 ; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[FPTOSI]], [[C]](s32)
245 ; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
246 ; FP64: $v0 = COPY [[ASHR]](s32)
247 ; FP64: RetRA implicit $v0
249 %1:_(s16) = G_FPTOSI %0(s64)
250 %2:_(s32) = G_SEXT %1(s16)
258 tracksRegLiveness: true
263 ; FP32-LABEL: name: f64toi8
265 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
266 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
267 ; FP32: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
268 ; FP32: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[FPTOSI]], [[C]](s32)
269 ; FP32: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
270 ; FP32: $v0 = COPY [[ASHR]](s32)
271 ; FP32: RetRA implicit $v0
272 ; FP64-LABEL: name: f64toi8
274 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
275 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
276 ; FP64: [[C:%[0-9]+]]:_(s32) = G_CONSTANT i32 24
277 ; FP64: [[SHL:%[0-9]+]]:_(s32) = G_SHL [[FPTOSI]], [[C]](s32)
278 ; FP64: [[ASHR:%[0-9]+]]:_(s32) = G_ASHR [[SHL]], [[C]](s32)
279 ; FP64: $v0 = COPY [[ASHR]](s32)
280 ; FP64: RetRA implicit $v0
282 %1:_(s8) = G_FPTOSI %0(s64)
283 %2:_(s32) = G_SEXT %1(s8)
291 tracksRegLiveness: true
296 ; FP32-LABEL: name: f32tou64
297 ; FP32: liveins: $f12
298 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
299 ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
300 ; FP32: $f12 = COPY [[COPY]](s32)
301 ; FP32: JAL &__fixunssfdi, csr_o32, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $v0, implicit-def $v1
302 ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
303 ; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
304 ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
305 ; FP32: $v0 = COPY [[COPY1]](s32)
306 ; FP32: $v1 = COPY [[COPY2]](s32)
307 ; FP32: RetRA implicit $v0, implicit $v1
308 ; FP64-LABEL: name: f32tou64
309 ; FP64: liveins: $f12
310 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
311 ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
312 ; FP64: $f12 = COPY [[COPY]](s32)
313 ; FP64: JAL &__fixunssfdi, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $f12, implicit-def $v0, implicit-def $v1
314 ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
315 ; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
316 ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
317 ; FP64: $v0 = COPY [[COPY1]](s32)
318 ; FP64: $v1 = COPY [[COPY2]](s32)
319 ; FP64: RetRA implicit $v0, implicit $v1
320 %0:_(s32) = COPY $f12
321 %1:_(s64) = G_FPTOUI %0(s32)
322 %2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
325 RetRA implicit $v0, implicit $v1
331 tracksRegLiveness: true
336 ; FP32-LABEL: name: f32tou32
337 ; FP32: liveins: $f12
338 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
339 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
340 ; FP32: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
341 ; FP32: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
342 ; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
343 ; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
344 ; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
345 ; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
346 ; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
347 ; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
348 ; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
349 ; FP32: $v0 = COPY [[SELECT]](s32)
350 ; FP32: RetRA implicit $v0
351 ; FP64-LABEL: name: f32tou32
352 ; FP64: liveins: $f12
353 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
354 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
355 ; FP64: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
356 ; FP64: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
357 ; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
358 ; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
359 ; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
360 ; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
361 ; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
362 ; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
363 ; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
364 ; FP64: $v0 = COPY [[SELECT]](s32)
365 ; FP64: RetRA implicit $v0
366 %0:_(s32) = COPY $f12
367 %1:_(s32) = G_FPTOUI %0(s32)
375 tracksRegLiveness: true
380 ; FP32-LABEL: name: f32tou16
381 ; FP32: liveins: $f12
382 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
383 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
384 ; FP32: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
385 ; FP32: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
386 ; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
387 ; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
388 ; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
389 ; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
390 ; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
391 ; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
392 ; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
393 ; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
394 ; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SELECT]], [[C3]]
395 ; FP32: $v0 = COPY [[AND1]](s32)
396 ; FP32: RetRA implicit $v0
397 ; FP64-LABEL: name: f32tou16
398 ; FP64: liveins: $f12
399 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
400 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
401 ; FP64: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
402 ; FP64: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
403 ; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
404 ; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
405 ; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
406 ; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
407 ; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
408 ; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
409 ; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
410 ; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
411 ; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SELECT]], [[C3]]
412 ; FP64: $v0 = COPY [[AND1]](s32)
413 ; FP64: RetRA implicit $v0
414 %0:_(s32) = COPY $f12
415 %1:_(s16) = G_FPTOUI %0(s32)
416 %2:_(s32) = G_ZEXT %1(s16)
424 tracksRegLiveness: true
429 ; FP32-LABEL: name: f32tou8
430 ; FP32: liveins: $f12
431 ; FP32: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
432 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
433 ; FP32: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
434 ; FP32: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
435 ; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
436 ; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
437 ; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
438 ; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
439 ; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
440 ; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
441 ; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
442 ; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
443 ; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SELECT]], [[C3]]
444 ; FP32: $v0 = COPY [[AND1]](s32)
445 ; FP32: RetRA implicit $v0
446 ; FP64-LABEL: name: f32tou8
447 ; FP64: liveins: $f12
448 ; FP64: [[COPY:%[0-9]+]]:_(s32) = COPY $f12
449 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s32)
450 ; FP64: [[C:%[0-9]+]]:_(s32) = G_FCONSTANT float 0x41E0000000000000
451 ; FP64: [[FSUB:%[0-9]+]]:_(s32) = G_FSUB [[COPY]], [[C]]
452 ; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s32)
453 ; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
454 ; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
455 ; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s32), [[C]]
456 ; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
457 ; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
458 ; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
459 ; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
460 ; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SELECT]], [[C3]]
461 ; FP64: $v0 = COPY [[AND1]](s32)
462 ; FP64: RetRA implicit $v0
463 %0:_(s32) = COPY $f12
464 %1:_(s8) = G_FPTOUI %0(s32)
465 %2:_(s32) = G_ZEXT %1(s8)
473 tracksRegLiveness: true
478 ; FP32-LABEL: name: f64tou64
480 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
481 ; FP32: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
482 ; FP32: $d6 = COPY [[COPY]](s64)
483 ; FP32: JAL &__fixunsdfdi, csr_o32, implicit-def $ra, implicit-def $sp, implicit $d6, implicit-def $v0, implicit-def $v1
484 ; FP32: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
485 ; FP32: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
486 ; FP32: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
487 ; FP32: $v0 = COPY [[COPY1]](s32)
488 ; FP32: $v1 = COPY [[COPY2]](s32)
489 ; FP32: RetRA implicit $v0, implicit $v1
490 ; FP64-LABEL: name: f64tou64
492 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
493 ; FP64: ADJCALLSTACKDOWN 16, 0, implicit-def $sp, implicit $sp
494 ; FP64: $d12_64 = COPY [[COPY]](s64)
495 ; FP64: JAL &__fixunsdfdi, csr_o32_fp64, implicit-def $ra, implicit-def $sp, implicit $d12_64, implicit-def $v0, implicit-def $v1
496 ; FP64: [[COPY1:%[0-9]+]]:_(s32) = COPY $v0
497 ; FP64: [[COPY2:%[0-9]+]]:_(s32) = COPY $v1
498 ; FP64: ADJCALLSTACKUP 16, 0, implicit-def $sp, implicit $sp
499 ; FP64: $v0 = COPY [[COPY1]](s32)
500 ; FP64: $v1 = COPY [[COPY2]](s32)
501 ; FP64: RetRA implicit $v0, implicit $v1
503 %1:_(s64) = G_FPTOUI %0(s64)
504 %2:_(s32), %3:_(s32) = G_UNMERGE_VALUES %1(s64)
507 RetRA implicit $v0, implicit $v1
513 tracksRegLiveness: true
518 ; FP32-LABEL: name: f64tou32
520 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
521 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
522 ; FP32: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
523 ; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
524 ; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
525 ; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
526 ; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
527 ; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
528 ; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
529 ; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
530 ; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
531 ; FP32: $v0 = COPY [[SELECT]](s32)
532 ; FP32: RetRA implicit $v0
533 ; FP64-LABEL: name: f64tou32
535 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
536 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
537 ; FP64: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
538 ; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
539 ; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
540 ; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
541 ; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
542 ; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
543 ; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
544 ; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
545 ; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
546 ; FP64: $v0 = COPY [[SELECT]](s32)
547 ; FP64: RetRA implicit $v0
549 %1:_(s32) = G_FPTOUI %0(s64)
557 tracksRegLiveness: true
562 ; FP32-LABEL: name: f64tou16
564 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
565 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
566 ; FP32: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
567 ; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
568 ; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
569 ; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
570 ; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
571 ; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
572 ; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
573 ; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
574 ; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
575 ; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
576 ; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SELECT]], [[C3]]
577 ; FP32: $v0 = COPY [[AND1]](s32)
578 ; FP32: RetRA implicit $v0
579 ; FP64-LABEL: name: f64tou16
581 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
582 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
583 ; FP64: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
584 ; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
585 ; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
586 ; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
587 ; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
588 ; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
589 ; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
590 ; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
591 ; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
592 ; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 65535
593 ; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SELECT]], [[C3]]
594 ; FP64: $v0 = COPY [[AND1]](s32)
595 ; FP64: RetRA implicit $v0
597 %1:_(s16) = G_FPTOUI %0(s64)
598 %2:_(s32) = G_ZEXT %1(s16)
606 tracksRegLiveness: true
611 ; FP32-LABEL: name: f64tou8
613 ; FP32: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
614 ; FP32: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
615 ; FP32: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
616 ; FP32: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
617 ; FP32: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
618 ; FP32: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
619 ; FP32: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
620 ; FP32: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
621 ; FP32: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
622 ; FP32: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
623 ; FP32: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
624 ; FP32: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
625 ; FP32: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SELECT]], [[C3]]
626 ; FP32: $v0 = COPY [[AND1]](s32)
627 ; FP32: RetRA implicit $v0
628 ; FP64-LABEL: name: f64tou8
630 ; FP64: [[COPY:%[0-9]+]]:_(s64) = COPY $d6
631 ; FP64: [[FPTOSI:%[0-9]+]]:_(s32) = G_FPTOSI [[COPY]](s64)
632 ; FP64: [[C:%[0-9]+]]:_(s64) = G_FCONSTANT double 0x41E0000000000000
633 ; FP64: [[FSUB:%[0-9]+]]:_(s64) = G_FSUB [[COPY]], [[C]]
634 ; FP64: [[FPTOSI1:%[0-9]+]]:_(s32) = G_FPTOSI [[FSUB]](s64)
635 ; FP64: [[C1:%[0-9]+]]:_(s32) = G_CONSTANT i32 -2147483648
636 ; FP64: [[XOR:%[0-9]+]]:_(s32) = G_XOR [[FPTOSI1]], [[C1]]
637 ; FP64: [[FCMP:%[0-9]+]]:_(s32) = G_FCMP floatpred(ult), [[COPY]](s64), [[C]]
638 ; FP64: [[C2:%[0-9]+]]:_(s32) = G_CONSTANT i32 1
639 ; FP64: [[AND:%[0-9]+]]:_(s32) = G_AND [[FCMP]], [[C2]]
640 ; FP64: [[SELECT:%[0-9]+]]:_(s32) = G_SELECT [[AND]](s32), [[FPTOSI]], [[XOR]]
641 ; FP64: [[C3:%[0-9]+]]:_(s32) = G_CONSTANT i32 255
642 ; FP64: [[AND1:%[0-9]+]]:_(s32) = G_AND [[SELECT]], [[C3]]
643 ; FP64: $v0 = COPY [[AND1]](s32)
644 ; FP64: RetRA implicit $v0
646 %1:_(s8) = G_FPTOUI %0(s64)
647 %2:_(s32) = G_ZEXT %1(s8)