| blob | 30c1ba0b542c8560bd6cdfaddd895b497e17645a |
1 ; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
2 ; RUN: llc -mtriple=riscv32 -code-model=small -verify-machineinstrs < %s \
3 ; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-SMALL
4 ; RUN: llc -mtriple=riscv32 -code-model=medium -verify-machineinstrs < %s \
5 ; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-MEDIUM
6 ; RUN: llc -mtriple=riscv32 -relocation-model=pic -verify-machineinstrs < %s \
7 ; RUN: | FileCheck %s -check-prefixes=CHECK,RV32I-PIC
8 ; RUN: llc -mtriple=riscv64 -code-model=small -verify-machineinstrs < %s \
9 ; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-SMALL
10 ; RUN: llc -mtriple=riscv64 -code-model=medium -verify-machineinstrs < %s \
11 ; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-MEDIUM
12 ; RUN: llc -mtriple=riscv64 -relocation-model=pic -verify-machineinstrs < %s \
13 ; RUN: | FileCheck %s -check-prefixes=CHECK,RV64I-PIC
15 define void @below_threshold(i32 signext %in, ptr %out) nounwind {
16 ; CHECK-LABEL: below_threshold:
17 ; CHECK: # %bb.0: # %entry
18 ; CHECK-NEXT: li a2, 2
19 ; CHECK-NEXT: blt a2, a0, .LBB0_4
20 ; CHECK-NEXT: # %bb.1: # %entry
21 ; CHECK-NEXT: li a2, 1
22 ; CHECK-NEXT: beq a0, a2, .LBB0_7
23 ; CHECK-NEXT: # %bb.2: # %entry
24 ; CHECK-NEXT: li a2, 2
25 ; CHECK-NEXT: bne a0, a2, .LBB0_10
26 ; CHECK-NEXT: # %bb.3: # %bb2
27 ; CHECK-NEXT: li a0, 3
28 ; CHECK-NEXT: j .LBB0_9
29 ; CHECK-NEXT: .LBB0_4: # %entry
30 ; CHECK-NEXT: li a2, 3
31 ; CHECK-NEXT: beq a0, a2, .LBB0_8
32 ; CHECK-NEXT: # %bb.5: # %entry
33 ; CHECK-NEXT: li a2, 4
34 ; CHECK-NEXT: bne a0, a2, .LBB0_10
35 ; CHECK-NEXT: # %bb.6: # %bb4
36 ; CHECK-NEXT: li a0, 1
37 ; CHECK-NEXT: j .LBB0_9
38 ; CHECK-NEXT: .LBB0_7: # %bb1
39 ; CHECK-NEXT: li a0, 4
40 ; CHECK-NEXT: j .LBB0_9
41 ; CHECK-NEXT: .LBB0_8: # %bb3
42 ; CHECK-NEXT: li a0, 2
43 ; CHECK-NEXT: .LBB0_9: # %exit
44 ; CHECK-NEXT: sw a0, 0(a1)
45 ; CHECK-NEXT: .LBB0_10: # %exit
46 ; CHECK-NEXT: ret
47 entry:
48 switch i32 %in, label %exit [
49 i32 1, label %bb1
50 i32 2, label %bb2
51 i32 3, label %bb3
52 i32 4, label %bb4
53 ]
54 bb1:
55 store i32 4, ptr %out
56 br label %exit
57 bb2:
58 store i32 3, ptr %out
59 br label %exit
60 bb3:
61 store i32 2, ptr %out
62 br label %exit
63 bb4:
64 store i32 1, ptr %out
65 br label %exit
66 exit:
67 ret void
68 }
70 define void @above_threshold(i32 signext %in, ptr %out) nounwind {
71 ; RV32I-SMALL-LABEL: above_threshold:
72 ; RV32I-SMALL: # %bb.0: # %entry
73 ; RV32I-SMALL-NEXT: addi a0, a0, -1
74 ; RV32I-SMALL-NEXT: li a2, 5
75 ; RV32I-SMALL-NEXT: bltu a2, a0, .LBB1_9
76 ; RV32I-SMALL-NEXT: # %bb.1: # %entry
77 ; RV32I-SMALL-NEXT: slli a0, a0, 2
78 ; RV32I-SMALL-NEXT: lui a2, %hi(.LJTI1_0)
79 ; RV32I-SMALL-NEXT: addi a2, a2, %lo(.LJTI1_0)
80 ; RV32I-SMALL-NEXT: add a0, a0, a2
81 ; RV32I-SMALL-NEXT: lw a0, 0(a0)
82 ; RV32I-SMALL-NEXT: jr a0
83 ; RV32I-SMALL-NEXT: .LBB1_2: # %bb1
84 ; RV32I-SMALL-NEXT: li a0, 4
85 ; RV32I-SMALL-NEXT: j .LBB1_8
86 ; RV32I-SMALL-NEXT: .LBB1_3: # %bb5
87 ; RV32I-SMALL-NEXT: li a0, 100
88 ; RV32I-SMALL-NEXT: j .LBB1_8
89 ; RV32I-SMALL-NEXT: .LBB1_4: # %bb3
90 ; RV32I-SMALL-NEXT: li a0, 2
91 ; RV32I-SMALL-NEXT: j .LBB1_8
92 ; RV32I-SMALL-NEXT: .LBB1_5: # %bb4
93 ; RV32I-SMALL-NEXT: li a0, 1
94 ; RV32I-SMALL-NEXT: j .LBB1_8
95 ; RV32I-SMALL-NEXT: .LBB1_6: # %bb2
96 ; RV32I-SMALL-NEXT: li a0, 3
97 ; RV32I-SMALL-NEXT: j .LBB1_8
98 ; RV32I-SMALL-NEXT: .LBB1_7: # %bb6
99 ; RV32I-SMALL-NEXT: li a0, 200
100 ; RV32I-SMALL-NEXT: .LBB1_8: # %exit
101 ; RV32I-SMALL-NEXT: sw a0, 0(a1)
102 ; RV32I-SMALL-NEXT: .LBB1_9: # %exit
103 ; RV32I-SMALL-NEXT: ret
104 ;
105 ; RV32I-MEDIUM-LABEL: above_threshold:
106 ; RV32I-MEDIUM: # %bb.0: # %entry
107 ; RV32I-MEDIUM-NEXT: addi a0, a0, -1
108 ; RV32I-MEDIUM-NEXT: li a2, 5
109 ; RV32I-MEDIUM-NEXT: bltu a2, a0, .LBB1_9
110 ; RV32I-MEDIUM-NEXT: # %bb.1: # %entry
111 ; RV32I-MEDIUM-NEXT: slli a0, a0, 2
112 ; RV32I-MEDIUM-NEXT: .Lpcrel_hi0:
113 ; RV32I-MEDIUM-NEXT: auipc a2, %pcrel_hi(.LJTI1_0)
114 ; RV32I-MEDIUM-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)
115 ; RV32I-MEDIUM-NEXT: add a0, a0, a2
116 ; RV32I-MEDIUM-NEXT: lw a0, 0(a0)
117 ; RV32I-MEDIUM-NEXT: jr a0
118 ; RV32I-MEDIUM-NEXT: .LBB1_2: # %bb1
119 ; RV32I-MEDIUM-NEXT: li a0, 4
120 ; RV32I-MEDIUM-NEXT: j .LBB1_8
121 ; RV32I-MEDIUM-NEXT: .LBB1_3: # %bb5
122 ; RV32I-MEDIUM-NEXT: li a0, 100
123 ; RV32I-MEDIUM-NEXT: j .LBB1_8
124 ; RV32I-MEDIUM-NEXT: .LBB1_4: # %bb3
125 ; RV32I-MEDIUM-NEXT: li a0, 2
126 ; RV32I-MEDIUM-NEXT: j .LBB1_8
127 ; RV32I-MEDIUM-NEXT: .LBB1_5: # %bb4
128 ; RV32I-MEDIUM-NEXT: li a0, 1
129 ; RV32I-MEDIUM-NEXT: j .LBB1_8
130 ; RV32I-MEDIUM-NEXT: .LBB1_6: # %bb2
131 ; RV32I-MEDIUM-NEXT: li a0, 3
132 ; RV32I-MEDIUM-NEXT: j .LBB1_8
133 ; RV32I-MEDIUM-NEXT: .LBB1_7: # %bb6
134 ; RV32I-MEDIUM-NEXT: li a0, 200
135 ; RV32I-MEDIUM-NEXT: .LBB1_8: # %exit
136 ; RV32I-MEDIUM-NEXT: sw a0, 0(a1)
137 ; RV32I-MEDIUM-NEXT: .LBB1_9: # %exit
138 ; RV32I-MEDIUM-NEXT: ret
139 ;
140 ; RV32I-PIC-LABEL: above_threshold:
141 ; RV32I-PIC: # %bb.0: # %entry
142 ; RV32I-PIC-NEXT: addi a0, a0, -1
143 ; RV32I-PIC-NEXT: li a2, 5
144 ; RV32I-PIC-NEXT: bltu a2, a0, .LBB1_9
145 ; RV32I-PIC-NEXT: # %bb.1: # %entry
146 ; RV32I-PIC-NEXT: slli a0, a0, 2
147 ; RV32I-PIC-NEXT: .Lpcrel_hi0:
148 ; RV32I-PIC-NEXT: auipc a2, %pcrel_hi(.LJTI1_0)
149 ; RV32I-PIC-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)
150 ; RV32I-PIC-NEXT: add a0, a0, a2
151 ; RV32I-PIC-NEXT: lw a0, 0(a0)
152 ; RV32I-PIC-NEXT: add a0, a0, a2
153 ; RV32I-PIC-NEXT: jr a0
154 ; RV32I-PIC-NEXT: .LBB1_2: # %bb1
155 ; RV32I-PIC-NEXT: li a0, 4
156 ; RV32I-PIC-NEXT: j .LBB1_8
157 ; RV32I-PIC-NEXT: .LBB1_3: # %bb5
158 ; RV32I-PIC-NEXT: li a0, 100
159 ; RV32I-PIC-NEXT: j .LBB1_8
160 ; RV32I-PIC-NEXT: .LBB1_4: # %bb3
161 ; RV32I-PIC-NEXT: li a0, 2
162 ; RV32I-PIC-NEXT: j .LBB1_8
163 ; RV32I-PIC-NEXT: .LBB1_5: # %bb4
164 ; RV32I-PIC-NEXT: li a0, 1
165 ; RV32I-PIC-NEXT: j .LBB1_8
166 ; RV32I-PIC-NEXT: .LBB1_6: # %bb2
167 ; RV32I-PIC-NEXT: li a0, 3
168 ; RV32I-PIC-NEXT: j .LBB1_8
169 ; RV32I-PIC-NEXT: .LBB1_7: # %bb6
170 ; RV32I-PIC-NEXT: li a0, 200
171 ; RV32I-PIC-NEXT: .LBB1_8: # %exit
172 ; RV32I-PIC-NEXT: sw a0, 0(a1)
173 ; RV32I-PIC-NEXT: .LBB1_9: # %exit
174 ; RV32I-PIC-NEXT: ret
175 ;
176 ; RV64I-SMALL-LABEL: above_threshold:
177 ; RV64I-SMALL: # %bb.0: # %entry
178 ; RV64I-SMALL-NEXT: addi a0, a0, -1
179 ; RV64I-SMALL-NEXT: li a2, 5
180 ; RV64I-SMALL-NEXT: bltu a2, a0, .LBB1_9
181 ; RV64I-SMALL-NEXT: # %bb.1: # %entry
182 ; RV64I-SMALL-NEXT: slli a0, a0, 2
183 ; RV64I-SMALL-NEXT: lui a2, %hi(.LJTI1_0)
184 ; RV64I-SMALL-NEXT: addi a2, a2, %lo(.LJTI1_0)
185 ; RV64I-SMALL-NEXT: add a0, a0, a2
186 ; RV64I-SMALL-NEXT: lw a0, 0(a0)
187 ; RV64I-SMALL-NEXT: jr a0
188 ; RV64I-SMALL-NEXT: .LBB1_2: # %bb1
189 ; RV64I-SMALL-NEXT: li a0, 4
190 ; RV64I-SMALL-NEXT: j .LBB1_8
191 ; RV64I-SMALL-NEXT: .LBB1_3: # %bb5
192 ; RV64I-SMALL-NEXT: li a0, 100
193 ; RV64I-SMALL-NEXT: j .LBB1_8
194 ; RV64I-SMALL-NEXT: .LBB1_4: # %bb3
195 ; RV64I-SMALL-NEXT: li a0, 2
196 ; RV64I-SMALL-NEXT: j .LBB1_8
197 ; RV64I-SMALL-NEXT: .LBB1_5: # %bb4
198 ; RV64I-SMALL-NEXT: li a0, 1
199 ; RV64I-SMALL-NEXT: j .LBB1_8
200 ; RV64I-SMALL-NEXT: .LBB1_6: # %bb2
201 ; RV64I-SMALL-NEXT: li a0, 3
202 ; RV64I-SMALL-NEXT: j .LBB1_8
203 ; RV64I-SMALL-NEXT: .LBB1_7: # %bb6
204 ; RV64I-SMALL-NEXT: li a0, 200
205 ; RV64I-SMALL-NEXT: .LBB1_8: # %exit
206 ; RV64I-SMALL-NEXT: sw a0, 0(a1)
207 ; RV64I-SMALL-NEXT: .LBB1_9: # %exit
208 ; RV64I-SMALL-NEXT: ret
209 ;
210 ; RV64I-MEDIUM-LABEL: above_threshold:
211 ; RV64I-MEDIUM: # %bb.0: # %entry
212 ; RV64I-MEDIUM-NEXT: addi a0, a0, -1
213 ; RV64I-MEDIUM-NEXT: li a2, 5
214 ; RV64I-MEDIUM-NEXT: bltu a2, a0, .LBB1_9
215 ; RV64I-MEDIUM-NEXT: # %bb.1: # %entry
216 ; RV64I-MEDIUM-NEXT: slli a0, a0, 3
217 ; RV64I-MEDIUM-NEXT: .Lpcrel_hi0:
218 ; RV64I-MEDIUM-NEXT: auipc a2, %pcrel_hi(.LJTI1_0)
219 ; RV64I-MEDIUM-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)
220 ; RV64I-MEDIUM-NEXT: add a0, a0, a2
221 ; RV64I-MEDIUM-NEXT: ld a0, 0(a0)
222 ; RV64I-MEDIUM-NEXT: jr a0
223 ; RV64I-MEDIUM-NEXT: .LBB1_2: # %bb1
224 ; RV64I-MEDIUM-NEXT: li a0, 4
225 ; RV64I-MEDIUM-NEXT: j .LBB1_8
226 ; RV64I-MEDIUM-NEXT: .LBB1_3: # %bb5
227 ; RV64I-MEDIUM-NEXT: li a0, 100
228 ; RV64I-MEDIUM-NEXT: j .LBB1_8
229 ; RV64I-MEDIUM-NEXT: .LBB1_4: # %bb3
230 ; RV64I-MEDIUM-NEXT: li a0, 2
231 ; RV64I-MEDIUM-NEXT: j .LBB1_8
232 ; RV64I-MEDIUM-NEXT: .LBB1_5: # %bb4
233 ; RV64I-MEDIUM-NEXT: li a0, 1
234 ; RV64I-MEDIUM-NEXT: j .LBB1_8
235 ; RV64I-MEDIUM-NEXT: .LBB1_6: # %bb2
236 ; RV64I-MEDIUM-NEXT: li a0, 3
237 ; RV64I-MEDIUM-NEXT: j .LBB1_8
238 ; RV64I-MEDIUM-NEXT: .LBB1_7: # %bb6
239 ; RV64I-MEDIUM-NEXT: li a0, 200
240 ; RV64I-MEDIUM-NEXT: .LBB1_8: # %exit
241 ; RV64I-MEDIUM-NEXT: sw a0, 0(a1)
242 ; RV64I-MEDIUM-NEXT: .LBB1_9: # %exit
243 ; RV64I-MEDIUM-NEXT: ret
244 ;
245 ; RV64I-PIC-LABEL: above_threshold:
246 ; RV64I-PIC: # %bb.0: # %entry
247 ; RV64I-PIC-NEXT: addi a0, a0, -1
248 ; RV64I-PIC-NEXT: li a2, 5
249 ; RV64I-PIC-NEXT: bltu a2, a0, .LBB1_9
250 ; RV64I-PIC-NEXT: # %bb.1: # %entry
251 ; RV64I-PIC-NEXT: slli a0, a0, 2
252 ; RV64I-PIC-NEXT: .Lpcrel_hi0:
253 ; RV64I-PIC-NEXT: auipc a2, %pcrel_hi(.LJTI1_0)
254 ; RV64I-PIC-NEXT: addi a2, a2, %pcrel_lo(.Lpcrel_hi0)
255 ; RV64I-PIC-NEXT: add a0, a0, a2
256 ; RV64I-PIC-NEXT: lw a0, 0(a0)
257 ; RV64I-PIC-NEXT: add a0, a0, a2
258 ; RV64I-PIC-NEXT: jr a0
259 ; RV64I-PIC-NEXT: .LBB1_2: # %bb1
260 ; RV64I-PIC-NEXT: li a0, 4
261 ; RV64I-PIC-NEXT: j .LBB1_8
262 ; RV64I-PIC-NEXT: .LBB1_3: # %bb5
263 ; RV64I-PIC-NEXT: li a0, 100
264 ; RV64I-PIC-NEXT: j .LBB1_8
265 ; RV64I-PIC-NEXT: .LBB1_4: # %bb3
266 ; RV64I-PIC-NEXT: li a0, 2
267 ; RV64I-PIC-NEXT: j .LBB1_8
268 ; RV64I-PIC-NEXT: .LBB1_5: # %bb4
269 ; RV64I-PIC-NEXT: li a0, 1
270 ; RV64I-PIC-NEXT: j .LBB1_8
271 ; RV64I-PIC-NEXT: .LBB1_6: # %bb2
272 ; RV64I-PIC-NEXT: li a0, 3
273 ; RV64I-PIC-NEXT: j .LBB1_8
274 ; RV64I-PIC-NEXT: .LBB1_7: # %bb6
275 ; RV64I-PIC-NEXT: li a0, 200
276 ; RV64I-PIC-NEXT: .LBB1_8: # %exit
277 ; RV64I-PIC-NEXT: sw a0, 0(a1)
278 ; RV64I-PIC-NEXT: .LBB1_9: # %exit
279 ; RV64I-PIC-NEXT: ret
280 entry:
281 switch i32 %in, label %exit [
282 i32 1, label %bb1
283 i32 2, label %bb2
284 i32 3, label %bb3
285 i32 4, label %bb4
286 i32 5, label %bb5
287 i32 6, label %bb6
288 ]
289 bb1:
290 store i32 4, ptr %out
291 br label %exit
292 bb2:
293 store i32 3, ptr %out
294 br label %exit
295 bb3:
296 store i32 2, ptr %out
297 br label %exit
298 bb4:
299 store i32 1, ptr %out
300 br label %exit
301 bb5:
302 store i32 100, ptr %out
303 br label %exit
304 bb6:
305 store i32 200, ptr %out
306 br label %exit
307 exit:
308 ret void
309 }